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TARGET_EFM32GG11_STK3701/TOOLCHAIN_GCC_ARM/efm32gg11b_rtcc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 170:e95d10626187 1 /**************************************************************************//**
AnnaBridge 170:e95d10626187 2 * @file efm32gg11b_rtcc.h
AnnaBridge 170:e95d10626187 3 * @brief EFM32GG11B_RTCC register and bit field definitions
AnnaBridge 170:e95d10626187 4 * @version 5.3.2
AnnaBridge 170:e95d10626187 5 ******************************************************************************
AnnaBridge 170:e95d10626187 6 * # License
AnnaBridge 170:e95d10626187 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 170:e95d10626187 8 ******************************************************************************
AnnaBridge 170:e95d10626187 9 *
AnnaBridge 170:e95d10626187 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 170:e95d10626187 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 170:e95d10626187 12 * freely, subject to the following restrictions:
AnnaBridge 170:e95d10626187 13 *
AnnaBridge 170:e95d10626187 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 170:e95d10626187 15 * claim that you wrote the original software.@n
AnnaBridge 170:e95d10626187 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 170:e95d10626187 17 * misrepresented as being the original software.@n
AnnaBridge 170:e95d10626187 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 170:e95d10626187 19 *
AnnaBridge 170:e95d10626187 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 170:e95d10626187 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 170:e95d10626187 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 170:e95d10626187 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 170:e95d10626187 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 170:e95d10626187 25 * infringement of any proprietary rights of a third party.
AnnaBridge 170:e95d10626187 26 *
AnnaBridge 170:e95d10626187 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 170:e95d10626187 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 170:e95d10626187 29 * any third party, arising from your use of this Software.
AnnaBridge 170:e95d10626187 30 *
AnnaBridge 170:e95d10626187 31 *****************************************************************************/
AnnaBridge 170:e95d10626187 32
AnnaBridge 170:e95d10626187 33 #if defined(__ICCARM__)
AnnaBridge 170:e95d10626187 34 #pragma system_include /* Treat file as system include file. */
AnnaBridge 170:e95d10626187 35 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
AnnaBridge 170:e95d10626187 36 #pragma clang system_header /* Treat file as system include file. */
AnnaBridge 170:e95d10626187 37 #endif
AnnaBridge 170:e95d10626187 38
AnnaBridge 170:e95d10626187 39 /**************************************************************************//**
AnnaBridge 170:e95d10626187 40 * @addtogroup Parts
AnnaBridge 170:e95d10626187 41 * @{
AnnaBridge 170:e95d10626187 42 ******************************************************************************/
AnnaBridge 170:e95d10626187 43 /**************************************************************************//**
AnnaBridge 170:e95d10626187 44 * @defgroup EFM32GG11B_RTCC RTCC
AnnaBridge 170:e95d10626187 45 * @{
AnnaBridge 170:e95d10626187 46 * @brief EFM32GG11B_RTCC Register Declaration
AnnaBridge 170:e95d10626187 47 *****************************************************************************/
AnnaBridge 170:e95d10626187 48 /** RTCC Register Declaration */
AnnaBridge 170:e95d10626187 49 typedef struct {
AnnaBridge 170:e95d10626187 50 __IOM uint32_t CTRL; /**< Control Register */
AnnaBridge 170:e95d10626187 51 __IOM uint32_t PRECNT; /**< Pre-Counter Value Register */
AnnaBridge 170:e95d10626187 52 __IOM uint32_t CNT; /**< Counter Value Register */
AnnaBridge 170:e95d10626187 53 __IM uint32_t COMBCNT; /**< Combined Pre-Counter and Counter Value Register */
AnnaBridge 170:e95d10626187 54 __IOM uint32_t TIME; /**< Time of day register */
AnnaBridge 170:e95d10626187 55 __IOM uint32_t DATE; /**< Date register */
AnnaBridge 170:e95d10626187 56 __IM uint32_t IF; /**< RTCC Interrupt Flags */
AnnaBridge 170:e95d10626187 57 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
AnnaBridge 170:e95d10626187 58 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
AnnaBridge 170:e95d10626187 59 __IOM uint32_t IEN; /**< Interrupt Enable Register */
AnnaBridge 170:e95d10626187 60 __IM uint32_t STATUS; /**< Status register */
AnnaBridge 170:e95d10626187 61 __IOM uint32_t CMD; /**< Command Register */
AnnaBridge 170:e95d10626187 62 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
AnnaBridge 170:e95d10626187 63 __IOM uint32_t POWERDOWN; /**< Retention RAM power-down register */
AnnaBridge 170:e95d10626187 64 __IOM uint32_t LOCK; /**< Configuration Lock Register */
AnnaBridge 170:e95d10626187 65 __IOM uint32_t EM4WUEN; /**< Wake Up Enable */
AnnaBridge 170:e95d10626187 66
AnnaBridge 170:e95d10626187 67 RTCC_CC_TypeDef CC[3]; /**< Capture/Compare Channel */
AnnaBridge 170:e95d10626187 68
AnnaBridge 170:e95d10626187 69 uint32_t RESERVED0[37]; /**< Reserved registers */
AnnaBridge 170:e95d10626187 70 RTCC_RET_TypeDef RET[32]; /**< RetentionReg */
AnnaBridge 170:e95d10626187 71 } RTCC_TypeDef; /** @} */
AnnaBridge 170:e95d10626187 72
AnnaBridge 170:e95d10626187 73 /**************************************************************************//**
AnnaBridge 170:e95d10626187 74 * @addtogroup EFM32GG11B_RTCC
AnnaBridge 170:e95d10626187 75 * @{
AnnaBridge 170:e95d10626187 76 * @defgroup EFM32GG11B_RTCC_BitFields RTCC Bit Fields
AnnaBridge 170:e95d10626187 77 * @{
AnnaBridge 170:e95d10626187 78 *****************************************************************************/
AnnaBridge 170:e95d10626187 79
AnnaBridge 170:e95d10626187 80 /* Bit fields for RTCC CTRL */
AnnaBridge 170:e95d10626187 81 #define _RTCC_CTRL_RESETVALUE 0x00000000UL /**< Default value for RTCC_CTRL */
AnnaBridge 170:e95d10626187 82 #define _RTCC_CTRL_MASK 0x0003DF35UL /**< Mask for RTCC_CTRL */
AnnaBridge 170:e95d10626187 83 #define RTCC_CTRL_ENABLE (0x1UL << 0) /**< RTCC Enable */
AnnaBridge 170:e95d10626187 84 #define _RTCC_CTRL_ENABLE_SHIFT 0 /**< Shift value for RTCC_ENABLE */
AnnaBridge 170:e95d10626187 85 #define _RTCC_CTRL_ENABLE_MASK 0x1UL /**< Bit mask for RTCC_ENABLE */
AnnaBridge 170:e95d10626187 86 #define _RTCC_CTRL_ENABLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 87 #define RTCC_CTRL_ENABLE_DEFAULT (_RTCC_CTRL_ENABLE_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 88 #define RTCC_CTRL_DEBUGRUN (0x1UL << 2) /**< Debug Mode Run Enable */
AnnaBridge 170:e95d10626187 89 #define _RTCC_CTRL_DEBUGRUN_SHIFT 2 /**< Shift value for RTCC_DEBUGRUN */
AnnaBridge 170:e95d10626187 90 #define _RTCC_CTRL_DEBUGRUN_MASK 0x4UL /**< Bit mask for RTCC_DEBUGRUN */
AnnaBridge 170:e95d10626187 91 #define _RTCC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 92 #define RTCC_CTRL_DEBUGRUN_DEFAULT (_RTCC_CTRL_DEBUGRUN_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 93 #define RTCC_CTRL_PRECCV0TOP (0x1UL << 4) /**< Pre-counter CCV0 top value enable. */
AnnaBridge 170:e95d10626187 94 #define _RTCC_CTRL_PRECCV0TOP_SHIFT 4 /**< Shift value for RTCC_PRECCV0TOP */
AnnaBridge 170:e95d10626187 95 #define _RTCC_CTRL_PRECCV0TOP_MASK 0x10UL /**< Bit mask for RTCC_PRECCV0TOP */
AnnaBridge 170:e95d10626187 96 #define _RTCC_CTRL_PRECCV0TOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 97 #define RTCC_CTRL_PRECCV0TOP_DEFAULT (_RTCC_CTRL_PRECCV0TOP_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 98 #define RTCC_CTRL_CCV1TOP (0x1UL << 5) /**< CCV1 top value enable */
AnnaBridge 170:e95d10626187 99 #define _RTCC_CTRL_CCV1TOP_SHIFT 5 /**< Shift value for RTCC_CCV1TOP */
AnnaBridge 170:e95d10626187 100 #define _RTCC_CTRL_CCV1TOP_MASK 0x20UL /**< Bit mask for RTCC_CCV1TOP */
AnnaBridge 170:e95d10626187 101 #define _RTCC_CTRL_CCV1TOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 102 #define RTCC_CTRL_CCV1TOP_DEFAULT (_RTCC_CTRL_CCV1TOP_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 103 #define _RTCC_CTRL_CNTPRESC_SHIFT 8 /**< Shift value for RTCC_CNTPRESC */
AnnaBridge 170:e95d10626187 104 #define _RTCC_CTRL_CNTPRESC_MASK 0xF00UL /**< Bit mask for RTCC_CNTPRESC */
AnnaBridge 170:e95d10626187 105 #define _RTCC_CTRL_CNTPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 106 #define _RTCC_CTRL_CNTPRESC_DIV1 0x00000000UL /**< Mode DIV1 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 107 #define _RTCC_CTRL_CNTPRESC_DIV2 0x00000001UL /**< Mode DIV2 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 108 #define _RTCC_CTRL_CNTPRESC_DIV4 0x00000002UL /**< Mode DIV4 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 109 #define _RTCC_CTRL_CNTPRESC_DIV8 0x00000003UL /**< Mode DIV8 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 110 #define _RTCC_CTRL_CNTPRESC_DIV16 0x00000004UL /**< Mode DIV16 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 111 #define _RTCC_CTRL_CNTPRESC_DIV32 0x00000005UL /**< Mode DIV32 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 112 #define _RTCC_CTRL_CNTPRESC_DIV64 0x00000006UL /**< Mode DIV64 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 113 #define _RTCC_CTRL_CNTPRESC_DIV128 0x00000007UL /**< Mode DIV128 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 114 #define _RTCC_CTRL_CNTPRESC_DIV256 0x00000008UL /**< Mode DIV256 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 115 #define _RTCC_CTRL_CNTPRESC_DIV512 0x00000009UL /**< Mode DIV512 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 116 #define _RTCC_CTRL_CNTPRESC_DIV1024 0x0000000AUL /**< Mode DIV1024 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 117 #define _RTCC_CTRL_CNTPRESC_DIV2048 0x0000000BUL /**< Mode DIV2048 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 118 #define _RTCC_CTRL_CNTPRESC_DIV4096 0x0000000CUL /**< Mode DIV4096 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 119 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV8192 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 120 #define _RTCC_CTRL_CNTPRESC_DIV16384 0x0000000EUL /**< Mode DIV16384 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 121 #define _RTCC_CTRL_CNTPRESC_DIV32768 0x0000000FUL /**< Mode DIV32768 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 122 #define RTCC_CTRL_CNTPRESC_DEFAULT (_RTCC_CTRL_CNTPRESC_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 123 #define RTCC_CTRL_CNTPRESC_DIV1 (_RTCC_CTRL_CNTPRESC_DIV1 << 8) /**< Shifted mode DIV1 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 124 #define RTCC_CTRL_CNTPRESC_DIV2 (_RTCC_CTRL_CNTPRESC_DIV2 << 8) /**< Shifted mode DIV2 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 125 #define RTCC_CTRL_CNTPRESC_DIV4 (_RTCC_CTRL_CNTPRESC_DIV4 << 8) /**< Shifted mode DIV4 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 126 #define RTCC_CTRL_CNTPRESC_DIV8 (_RTCC_CTRL_CNTPRESC_DIV8 << 8) /**< Shifted mode DIV8 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 127 #define RTCC_CTRL_CNTPRESC_DIV16 (_RTCC_CTRL_CNTPRESC_DIV16 << 8) /**< Shifted mode DIV16 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 128 #define RTCC_CTRL_CNTPRESC_DIV32 (_RTCC_CTRL_CNTPRESC_DIV32 << 8) /**< Shifted mode DIV32 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 129 #define RTCC_CTRL_CNTPRESC_DIV64 (_RTCC_CTRL_CNTPRESC_DIV64 << 8) /**< Shifted mode DIV64 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 130 #define RTCC_CTRL_CNTPRESC_DIV128 (_RTCC_CTRL_CNTPRESC_DIV128 << 8) /**< Shifted mode DIV128 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 131 #define RTCC_CTRL_CNTPRESC_DIV256 (_RTCC_CTRL_CNTPRESC_DIV256 << 8) /**< Shifted mode DIV256 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 132 #define RTCC_CTRL_CNTPRESC_DIV512 (_RTCC_CTRL_CNTPRESC_DIV512 << 8) /**< Shifted mode DIV512 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 133 #define RTCC_CTRL_CNTPRESC_DIV1024 (_RTCC_CTRL_CNTPRESC_DIV1024 << 8) /**< Shifted mode DIV1024 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 134 #define RTCC_CTRL_CNTPRESC_DIV2048 (_RTCC_CTRL_CNTPRESC_DIV2048 << 8) /**< Shifted mode DIV2048 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 135 #define RTCC_CTRL_CNTPRESC_DIV4096 (_RTCC_CTRL_CNTPRESC_DIV4096 << 8) /**< Shifted mode DIV4096 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 136 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mode DIV8192 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 137 #define RTCC_CTRL_CNTPRESC_DIV16384 (_RTCC_CTRL_CNTPRESC_DIV16384 << 8) /**< Shifted mode DIV16384 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 138 #define RTCC_CTRL_CNTPRESC_DIV32768 (_RTCC_CTRL_CNTPRESC_DIV32768 << 8) /**< Shifted mode DIV32768 for RTCC_CTRL */
AnnaBridge 170:e95d10626187 139 #define RTCC_CTRL_CNTTICK (0x1UL << 12) /**< Counter prescaler mode. */
AnnaBridge 170:e95d10626187 140 #define _RTCC_CTRL_CNTTICK_SHIFT 12 /**< Shift value for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 141 #define _RTCC_CTRL_CNTTICK_MASK 0x1000UL /**< Bit mask for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 142 #define _RTCC_CTRL_CNTTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 143 #define _RTCC_CTRL_CNTTICK_PRESC 0x00000000UL /**< Mode PRESC for RTCC_CTRL */
AnnaBridge 170:e95d10626187 144 #define _RTCC_CTRL_CNTTICK_CCV0MATCH 0x00000001UL /**< Mode CCV0MATCH for RTCC_CTRL */
AnnaBridge 170:e95d10626187 145 #define RTCC_CTRL_CNTTICK_DEFAULT (_RTCC_CTRL_CNTTICK_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 146 #define RTCC_CTRL_CNTTICK_PRESC (_RTCC_CTRL_CNTTICK_PRESC << 12) /**< Shifted mode PRESC for RTCC_CTRL */
AnnaBridge 170:e95d10626187 147 #define RTCC_CTRL_CNTTICK_CCV0MATCH (_RTCC_CTRL_CNTTICK_CCV0MATCH << 12) /**< Shifted mode CCV0MATCH for RTCC_CTRL */
AnnaBridge 170:e95d10626187 148 #define RTCC_CTRL_BUMODETSEN (0x1UL << 14) /**< Backup mode timestamp enable */
AnnaBridge 170:e95d10626187 149 #define _RTCC_CTRL_BUMODETSEN_SHIFT 14 /**< Shift value for RTCC_BUMODETSEN */
AnnaBridge 170:e95d10626187 150 #define _RTCC_CTRL_BUMODETSEN_MASK 0x4000UL /**< Bit mask for RTCC_BUMODETSEN */
AnnaBridge 170:e95d10626187 151 #define _RTCC_CTRL_BUMODETSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 152 #define RTCC_CTRL_BUMODETSEN_DEFAULT (_RTCC_CTRL_BUMODETSEN_DEFAULT << 14) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 153 #define RTCC_CTRL_OSCFDETEN (0x1UL << 15) /**< Oscillator failure detection enable */
AnnaBridge 170:e95d10626187 154 #define _RTCC_CTRL_OSCFDETEN_SHIFT 15 /**< Shift value for RTCC_OSCFDETEN */
AnnaBridge 170:e95d10626187 155 #define _RTCC_CTRL_OSCFDETEN_MASK 0x8000UL /**< Bit mask for RTCC_OSCFDETEN */
AnnaBridge 170:e95d10626187 156 #define _RTCC_CTRL_OSCFDETEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 157 #define RTCC_CTRL_OSCFDETEN_DEFAULT (_RTCC_CTRL_OSCFDETEN_DEFAULT << 15) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 158 #define RTCC_CTRL_CNTMODE (0x1UL << 16) /**< Main counter mode */
AnnaBridge 170:e95d10626187 159 #define _RTCC_CTRL_CNTMODE_SHIFT 16 /**< Shift value for RTCC_CNTMODE */
AnnaBridge 170:e95d10626187 160 #define _RTCC_CTRL_CNTMODE_MASK 0x10000UL /**< Bit mask for RTCC_CNTMODE */
AnnaBridge 170:e95d10626187 161 #define _RTCC_CTRL_CNTMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 162 #define _RTCC_CTRL_CNTMODE_NORMAL 0x00000000UL /**< Mode NORMAL for RTCC_CTRL */
AnnaBridge 170:e95d10626187 163 #define _RTCC_CTRL_CNTMODE_CALENDAR 0x00000001UL /**< Mode CALENDAR for RTCC_CTRL */
AnnaBridge 170:e95d10626187 164 #define RTCC_CTRL_CNTMODE_DEFAULT (_RTCC_CTRL_CNTMODE_DEFAULT << 16) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 165 #define RTCC_CTRL_CNTMODE_NORMAL (_RTCC_CTRL_CNTMODE_NORMAL << 16) /**< Shifted mode NORMAL for RTCC_CTRL */
AnnaBridge 170:e95d10626187 166 #define RTCC_CTRL_CNTMODE_CALENDAR (_RTCC_CTRL_CNTMODE_CALENDAR << 16) /**< Shifted mode CALENDAR for RTCC_CTRL */
AnnaBridge 170:e95d10626187 167 #define RTCC_CTRL_LYEARCORRDIS (0x1UL << 17) /**< Leap year correction disabled. */
AnnaBridge 170:e95d10626187 168 #define _RTCC_CTRL_LYEARCORRDIS_SHIFT 17 /**< Shift value for RTCC_LYEARCORRDIS */
AnnaBridge 170:e95d10626187 169 #define _RTCC_CTRL_LYEARCORRDIS_MASK 0x20000UL /**< Bit mask for RTCC_LYEARCORRDIS */
AnnaBridge 170:e95d10626187 170 #define _RTCC_CTRL_LYEARCORRDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 171 #define RTCC_CTRL_LYEARCORRDIS_DEFAULT (_RTCC_CTRL_LYEARCORRDIS_DEFAULT << 17) /**< Shifted mode DEFAULT for RTCC_CTRL */
AnnaBridge 170:e95d10626187 172
AnnaBridge 170:e95d10626187 173 /* Bit fields for RTCC PRECNT */
AnnaBridge 170:e95d10626187 174 #define _RTCC_PRECNT_RESETVALUE 0x00000000UL /**< Default value for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 175 #define _RTCC_PRECNT_MASK 0x00007FFFUL /**< Mask for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 176 #define _RTCC_PRECNT_PRECNT_SHIFT 0 /**< Shift value for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 177 #define _RTCC_PRECNT_PRECNT_MASK 0x7FFFUL /**< Bit mask for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 178 #define _RTCC_PRECNT_PRECNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 179 #define RTCC_PRECNT_PRECNT_DEFAULT (_RTCC_PRECNT_PRECNT_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 180
AnnaBridge 170:e95d10626187 181 /* Bit fields for RTCC CNT */
AnnaBridge 170:e95d10626187 182 #define _RTCC_CNT_RESETVALUE 0x00000000UL /**< Default value for RTCC_CNT */
AnnaBridge 170:e95d10626187 183 #define _RTCC_CNT_MASK 0xFFFFFFFFUL /**< Mask for RTCC_CNT */
AnnaBridge 170:e95d10626187 184 #define _RTCC_CNT_CNT_SHIFT 0 /**< Shift value for RTCC_CNT */
AnnaBridge 170:e95d10626187 185 #define _RTCC_CNT_CNT_MASK 0xFFFFFFFFUL /**< Bit mask for RTCC_CNT */
AnnaBridge 170:e95d10626187 186 #define _RTCC_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CNT */
AnnaBridge 170:e95d10626187 187 #define RTCC_CNT_CNT_DEFAULT (_RTCC_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CNT */
AnnaBridge 170:e95d10626187 188
AnnaBridge 170:e95d10626187 189 /* Bit fields for RTCC COMBCNT */
AnnaBridge 170:e95d10626187 190 #define _RTCC_COMBCNT_RESETVALUE 0x00000000UL /**< Default value for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 191 #define _RTCC_COMBCNT_MASK 0xFFFFFFFFUL /**< Mask for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 192 #define _RTCC_COMBCNT_PRECNT_SHIFT 0 /**< Shift value for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 193 #define _RTCC_COMBCNT_PRECNT_MASK 0x7FFFUL /**< Bit mask for RTCC_PRECNT */
AnnaBridge 170:e95d10626187 194 #define _RTCC_COMBCNT_PRECNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 195 #define RTCC_COMBCNT_PRECNT_DEFAULT (_RTCC_COMBCNT_PRECNT_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 196 #define _RTCC_COMBCNT_CNTLSB_SHIFT 15 /**< Shift value for RTCC_CNTLSB */
AnnaBridge 170:e95d10626187 197 #define _RTCC_COMBCNT_CNTLSB_MASK 0xFFFF8000UL /**< Bit mask for RTCC_CNTLSB */
AnnaBridge 170:e95d10626187 198 #define _RTCC_COMBCNT_CNTLSB_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 199 #define RTCC_COMBCNT_CNTLSB_DEFAULT (_RTCC_COMBCNT_CNTLSB_DEFAULT << 15) /**< Shifted mode DEFAULT for RTCC_COMBCNT */
AnnaBridge 170:e95d10626187 200
AnnaBridge 170:e95d10626187 201 /* Bit fields for RTCC TIME */
AnnaBridge 170:e95d10626187 202 #define _RTCC_TIME_RESETVALUE 0x00000000UL /**< Default value for RTCC_TIME */
AnnaBridge 170:e95d10626187 203 #define _RTCC_TIME_MASK 0x003F7F7FUL /**< Mask for RTCC_TIME */
AnnaBridge 170:e95d10626187 204 #define _RTCC_TIME_SECU_SHIFT 0 /**< Shift value for RTCC_SECU */
AnnaBridge 170:e95d10626187 205 #define _RTCC_TIME_SECU_MASK 0xFUL /**< Bit mask for RTCC_SECU */
AnnaBridge 170:e95d10626187 206 #define _RTCC_TIME_SECU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 207 #define RTCC_TIME_SECU_DEFAULT (_RTCC_TIME_SECU_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 208 #define _RTCC_TIME_SECT_SHIFT 4 /**< Shift value for RTCC_SECT */
AnnaBridge 170:e95d10626187 209 #define _RTCC_TIME_SECT_MASK 0x70UL /**< Bit mask for RTCC_SECT */
AnnaBridge 170:e95d10626187 210 #define _RTCC_TIME_SECT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 211 #define RTCC_TIME_SECT_DEFAULT (_RTCC_TIME_SECT_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 212 #define _RTCC_TIME_MINU_SHIFT 8 /**< Shift value for RTCC_MINU */
AnnaBridge 170:e95d10626187 213 #define _RTCC_TIME_MINU_MASK 0xF00UL /**< Bit mask for RTCC_MINU */
AnnaBridge 170:e95d10626187 214 #define _RTCC_TIME_MINU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 215 #define RTCC_TIME_MINU_DEFAULT (_RTCC_TIME_MINU_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 216 #define _RTCC_TIME_MINT_SHIFT 12 /**< Shift value for RTCC_MINT */
AnnaBridge 170:e95d10626187 217 #define _RTCC_TIME_MINT_MASK 0x7000UL /**< Bit mask for RTCC_MINT */
AnnaBridge 170:e95d10626187 218 #define _RTCC_TIME_MINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 219 #define RTCC_TIME_MINT_DEFAULT (_RTCC_TIME_MINT_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 220 #define _RTCC_TIME_HOURU_SHIFT 16 /**< Shift value for RTCC_HOURU */
AnnaBridge 170:e95d10626187 221 #define _RTCC_TIME_HOURU_MASK 0xF0000UL /**< Bit mask for RTCC_HOURU */
AnnaBridge 170:e95d10626187 222 #define _RTCC_TIME_HOURU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 223 #define RTCC_TIME_HOURU_DEFAULT (_RTCC_TIME_HOURU_DEFAULT << 16) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 224 #define _RTCC_TIME_HOURT_SHIFT 20 /**< Shift value for RTCC_HOURT */
AnnaBridge 170:e95d10626187 225 #define _RTCC_TIME_HOURT_MASK 0x300000UL /**< Bit mask for RTCC_HOURT */
AnnaBridge 170:e95d10626187 226 #define _RTCC_TIME_HOURT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 227 #define RTCC_TIME_HOURT_DEFAULT (_RTCC_TIME_HOURT_DEFAULT << 20) /**< Shifted mode DEFAULT for RTCC_TIME */
AnnaBridge 170:e95d10626187 228
AnnaBridge 170:e95d10626187 229 /* Bit fields for RTCC DATE */
AnnaBridge 170:e95d10626187 230 #define _RTCC_DATE_RESETVALUE 0x00000000UL /**< Default value for RTCC_DATE */
AnnaBridge 170:e95d10626187 231 #define _RTCC_DATE_MASK 0x07FF1F3FUL /**< Mask for RTCC_DATE */
AnnaBridge 170:e95d10626187 232 #define _RTCC_DATE_DAYOMU_SHIFT 0 /**< Shift value for RTCC_DAYOMU */
AnnaBridge 170:e95d10626187 233 #define _RTCC_DATE_DAYOMU_MASK 0xFUL /**< Bit mask for RTCC_DAYOMU */
AnnaBridge 170:e95d10626187 234 #define _RTCC_DATE_DAYOMU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 235 #define RTCC_DATE_DAYOMU_DEFAULT (_RTCC_DATE_DAYOMU_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 236 #define _RTCC_DATE_DAYOMT_SHIFT 4 /**< Shift value for RTCC_DAYOMT */
AnnaBridge 170:e95d10626187 237 #define _RTCC_DATE_DAYOMT_MASK 0x30UL /**< Bit mask for RTCC_DAYOMT */
AnnaBridge 170:e95d10626187 238 #define _RTCC_DATE_DAYOMT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 239 #define RTCC_DATE_DAYOMT_DEFAULT (_RTCC_DATE_DAYOMT_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 240 #define _RTCC_DATE_MONTHU_SHIFT 8 /**< Shift value for RTCC_MONTHU */
AnnaBridge 170:e95d10626187 241 #define _RTCC_DATE_MONTHU_MASK 0xF00UL /**< Bit mask for RTCC_MONTHU */
AnnaBridge 170:e95d10626187 242 #define _RTCC_DATE_MONTHU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 243 #define RTCC_DATE_MONTHU_DEFAULT (_RTCC_DATE_MONTHU_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 244 #define RTCC_DATE_MONTHT (0x1UL << 12) /**< Month, tens. */
AnnaBridge 170:e95d10626187 245 #define _RTCC_DATE_MONTHT_SHIFT 12 /**< Shift value for RTCC_MONTHT */
AnnaBridge 170:e95d10626187 246 #define _RTCC_DATE_MONTHT_MASK 0x1000UL /**< Bit mask for RTCC_MONTHT */
AnnaBridge 170:e95d10626187 247 #define _RTCC_DATE_MONTHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 248 #define RTCC_DATE_MONTHT_DEFAULT (_RTCC_DATE_MONTHT_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 249 #define _RTCC_DATE_YEARU_SHIFT 16 /**< Shift value for RTCC_YEARU */
AnnaBridge 170:e95d10626187 250 #define _RTCC_DATE_YEARU_MASK 0xF0000UL /**< Bit mask for RTCC_YEARU */
AnnaBridge 170:e95d10626187 251 #define _RTCC_DATE_YEARU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 252 #define RTCC_DATE_YEARU_DEFAULT (_RTCC_DATE_YEARU_DEFAULT << 16) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 253 #define _RTCC_DATE_YEART_SHIFT 20 /**< Shift value for RTCC_YEART */
AnnaBridge 170:e95d10626187 254 #define _RTCC_DATE_YEART_MASK 0xF00000UL /**< Bit mask for RTCC_YEART */
AnnaBridge 170:e95d10626187 255 #define _RTCC_DATE_YEART_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 256 #define RTCC_DATE_YEART_DEFAULT (_RTCC_DATE_YEART_DEFAULT << 20) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 257 #define _RTCC_DATE_DAYOW_SHIFT 24 /**< Shift value for RTCC_DAYOW */
AnnaBridge 170:e95d10626187 258 #define _RTCC_DATE_DAYOW_MASK 0x7000000UL /**< Bit mask for RTCC_DAYOW */
AnnaBridge 170:e95d10626187 259 #define _RTCC_DATE_DAYOW_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 260 #define RTCC_DATE_DAYOW_DEFAULT (_RTCC_DATE_DAYOW_DEFAULT << 24) /**< Shifted mode DEFAULT for RTCC_DATE */
AnnaBridge 170:e95d10626187 261
AnnaBridge 170:e95d10626187 262 /* Bit fields for RTCC IF */
AnnaBridge 170:e95d10626187 263 #define _RTCC_IF_RESETVALUE 0x00000000UL /**< Default value for RTCC_IF */
AnnaBridge 170:e95d10626187 264 #define _RTCC_IF_MASK 0x000007FFUL /**< Mask for RTCC_IF */
AnnaBridge 170:e95d10626187 265 #define RTCC_IF_OF (0x1UL << 0) /**< Overflow Interrupt Flag */
AnnaBridge 170:e95d10626187 266 #define _RTCC_IF_OF_SHIFT 0 /**< Shift value for RTCC_OF */
AnnaBridge 170:e95d10626187 267 #define _RTCC_IF_OF_MASK 0x1UL /**< Bit mask for RTCC_OF */
AnnaBridge 170:e95d10626187 268 #define _RTCC_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 269 #define RTCC_IF_OF_DEFAULT (_RTCC_IF_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 270 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Interrupt Flag */
AnnaBridge 170:e95d10626187 271 #define _RTCC_IF_CC0_SHIFT 1 /**< Shift value for RTCC_CC0 */
AnnaBridge 170:e95d10626187 272 #define _RTCC_IF_CC0_MASK 0x2UL /**< Bit mask for RTCC_CC0 */
AnnaBridge 170:e95d10626187 273 #define _RTCC_IF_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 274 #define RTCC_IF_CC0_DEFAULT (_RTCC_IF_CC0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 275 #define RTCC_IF_CC1 (0x1UL << 2) /**< Channel 1 Interrupt Flag */
AnnaBridge 170:e95d10626187 276 #define _RTCC_IF_CC1_SHIFT 2 /**< Shift value for RTCC_CC1 */
AnnaBridge 170:e95d10626187 277 #define _RTCC_IF_CC1_MASK 0x4UL /**< Bit mask for RTCC_CC1 */
AnnaBridge 170:e95d10626187 278 #define _RTCC_IF_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 279 #define RTCC_IF_CC1_DEFAULT (_RTCC_IF_CC1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 280 #define RTCC_IF_CC2 (0x1UL << 3) /**< Channel 2 Interrupt Flag */
AnnaBridge 170:e95d10626187 281 #define _RTCC_IF_CC2_SHIFT 3 /**< Shift value for RTCC_CC2 */
AnnaBridge 170:e95d10626187 282 #define _RTCC_IF_CC2_MASK 0x8UL /**< Bit mask for RTCC_CC2 */
AnnaBridge 170:e95d10626187 283 #define _RTCC_IF_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 284 #define RTCC_IF_CC2_DEFAULT (_RTCC_IF_CC2_DEFAULT << 3) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 285 #define RTCC_IF_OSCFAIL (0x1UL << 4) /**< Oscillator failure Interrupt Flag */
AnnaBridge 170:e95d10626187 286 #define _RTCC_IF_OSCFAIL_SHIFT 4 /**< Shift value for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 287 #define _RTCC_IF_OSCFAIL_MASK 0x10UL /**< Bit mask for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 288 #define _RTCC_IF_OSCFAIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 289 #define RTCC_IF_OSCFAIL_DEFAULT (_RTCC_IF_OSCFAIL_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 290 #define RTCC_IF_CNTTICK (0x1UL << 5) /**< Main counter tick */
AnnaBridge 170:e95d10626187 291 #define _RTCC_IF_CNTTICK_SHIFT 5 /**< Shift value for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 292 #define _RTCC_IF_CNTTICK_MASK 0x20UL /**< Bit mask for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 293 #define _RTCC_IF_CNTTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 294 #define RTCC_IF_CNTTICK_DEFAULT (_RTCC_IF_CNTTICK_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 295 #define RTCC_IF_MINTICK (0x1UL << 6) /**< Minute tick */
AnnaBridge 170:e95d10626187 296 #define _RTCC_IF_MINTICK_SHIFT 6 /**< Shift value for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 297 #define _RTCC_IF_MINTICK_MASK 0x40UL /**< Bit mask for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 298 #define _RTCC_IF_MINTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 299 #define RTCC_IF_MINTICK_DEFAULT (_RTCC_IF_MINTICK_DEFAULT << 6) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 300 #define RTCC_IF_HOURTICK (0x1UL << 7) /**< Hour tick */
AnnaBridge 170:e95d10626187 301 #define _RTCC_IF_HOURTICK_SHIFT 7 /**< Shift value for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 302 #define _RTCC_IF_HOURTICK_MASK 0x80UL /**< Bit mask for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 303 #define _RTCC_IF_HOURTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 304 #define RTCC_IF_HOURTICK_DEFAULT (_RTCC_IF_HOURTICK_DEFAULT << 7) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 305 #define RTCC_IF_DAYTICK (0x1UL << 8) /**< Day tick */
AnnaBridge 170:e95d10626187 306 #define _RTCC_IF_DAYTICK_SHIFT 8 /**< Shift value for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 307 #define _RTCC_IF_DAYTICK_MASK 0x100UL /**< Bit mask for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 308 #define _RTCC_IF_DAYTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 309 #define RTCC_IF_DAYTICK_DEFAULT (_RTCC_IF_DAYTICK_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 310 #define RTCC_IF_DAYOWOF (0x1UL << 9) /**< Day of week overflow */
AnnaBridge 170:e95d10626187 311 #define _RTCC_IF_DAYOWOF_SHIFT 9 /**< Shift value for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 312 #define _RTCC_IF_DAYOWOF_MASK 0x200UL /**< Bit mask for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 313 #define _RTCC_IF_DAYOWOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 314 #define RTCC_IF_DAYOWOF_DEFAULT (_RTCC_IF_DAYOWOF_DEFAULT << 9) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 315 #define RTCC_IF_MONTHTICK (0x1UL << 10) /**< Month tick */
AnnaBridge 170:e95d10626187 316 #define _RTCC_IF_MONTHTICK_SHIFT 10 /**< Shift value for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 317 #define _RTCC_IF_MONTHTICK_MASK 0x400UL /**< Bit mask for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 318 #define _RTCC_IF_MONTHTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 319 #define RTCC_IF_MONTHTICK_DEFAULT (_RTCC_IF_MONTHTICK_DEFAULT << 10) /**< Shifted mode DEFAULT for RTCC_IF */
AnnaBridge 170:e95d10626187 320
AnnaBridge 170:e95d10626187 321 /* Bit fields for RTCC IFS */
AnnaBridge 170:e95d10626187 322 #define _RTCC_IFS_RESETVALUE 0x00000000UL /**< Default value for RTCC_IFS */
AnnaBridge 170:e95d10626187 323 #define _RTCC_IFS_MASK 0x000007FFUL /**< Mask for RTCC_IFS */
AnnaBridge 170:e95d10626187 324 #define RTCC_IFS_OF (0x1UL << 0) /**< Set OF Interrupt Flag */
AnnaBridge 170:e95d10626187 325 #define _RTCC_IFS_OF_SHIFT 0 /**< Shift value for RTCC_OF */
AnnaBridge 170:e95d10626187 326 #define _RTCC_IFS_OF_MASK 0x1UL /**< Bit mask for RTCC_OF */
AnnaBridge 170:e95d10626187 327 #define _RTCC_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 328 #define RTCC_IFS_OF_DEFAULT (_RTCC_IFS_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 329 #define RTCC_IFS_CC0 (0x1UL << 1) /**< Set CC0 Interrupt Flag */
AnnaBridge 170:e95d10626187 330 #define _RTCC_IFS_CC0_SHIFT 1 /**< Shift value for RTCC_CC0 */
AnnaBridge 170:e95d10626187 331 #define _RTCC_IFS_CC0_MASK 0x2UL /**< Bit mask for RTCC_CC0 */
AnnaBridge 170:e95d10626187 332 #define _RTCC_IFS_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 333 #define RTCC_IFS_CC0_DEFAULT (_RTCC_IFS_CC0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 334 #define RTCC_IFS_CC1 (0x1UL << 2) /**< Set CC1 Interrupt Flag */
AnnaBridge 170:e95d10626187 335 #define _RTCC_IFS_CC1_SHIFT 2 /**< Shift value for RTCC_CC1 */
AnnaBridge 170:e95d10626187 336 #define _RTCC_IFS_CC1_MASK 0x4UL /**< Bit mask for RTCC_CC1 */
AnnaBridge 170:e95d10626187 337 #define _RTCC_IFS_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 338 #define RTCC_IFS_CC1_DEFAULT (_RTCC_IFS_CC1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 339 #define RTCC_IFS_CC2 (0x1UL << 3) /**< Set CC2 Interrupt Flag */
AnnaBridge 170:e95d10626187 340 #define _RTCC_IFS_CC2_SHIFT 3 /**< Shift value for RTCC_CC2 */
AnnaBridge 170:e95d10626187 341 #define _RTCC_IFS_CC2_MASK 0x8UL /**< Bit mask for RTCC_CC2 */
AnnaBridge 170:e95d10626187 342 #define _RTCC_IFS_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 343 #define RTCC_IFS_CC2_DEFAULT (_RTCC_IFS_CC2_DEFAULT << 3) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 344 #define RTCC_IFS_OSCFAIL (0x1UL << 4) /**< Set OSCFAIL Interrupt Flag */
AnnaBridge 170:e95d10626187 345 #define _RTCC_IFS_OSCFAIL_SHIFT 4 /**< Shift value for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 346 #define _RTCC_IFS_OSCFAIL_MASK 0x10UL /**< Bit mask for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 347 #define _RTCC_IFS_OSCFAIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 348 #define RTCC_IFS_OSCFAIL_DEFAULT (_RTCC_IFS_OSCFAIL_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 349 #define RTCC_IFS_CNTTICK (0x1UL << 5) /**< Set CNTTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 350 #define _RTCC_IFS_CNTTICK_SHIFT 5 /**< Shift value for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 351 #define _RTCC_IFS_CNTTICK_MASK 0x20UL /**< Bit mask for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 352 #define _RTCC_IFS_CNTTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 353 #define RTCC_IFS_CNTTICK_DEFAULT (_RTCC_IFS_CNTTICK_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 354 #define RTCC_IFS_MINTICK (0x1UL << 6) /**< Set MINTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 355 #define _RTCC_IFS_MINTICK_SHIFT 6 /**< Shift value for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 356 #define _RTCC_IFS_MINTICK_MASK 0x40UL /**< Bit mask for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 357 #define _RTCC_IFS_MINTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 358 #define RTCC_IFS_MINTICK_DEFAULT (_RTCC_IFS_MINTICK_DEFAULT << 6) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 359 #define RTCC_IFS_HOURTICK (0x1UL << 7) /**< Set HOURTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 360 #define _RTCC_IFS_HOURTICK_SHIFT 7 /**< Shift value for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 361 #define _RTCC_IFS_HOURTICK_MASK 0x80UL /**< Bit mask for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 362 #define _RTCC_IFS_HOURTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 363 #define RTCC_IFS_HOURTICK_DEFAULT (_RTCC_IFS_HOURTICK_DEFAULT << 7) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 364 #define RTCC_IFS_DAYTICK (0x1UL << 8) /**< Set DAYTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 365 #define _RTCC_IFS_DAYTICK_SHIFT 8 /**< Shift value for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 366 #define _RTCC_IFS_DAYTICK_MASK 0x100UL /**< Bit mask for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 367 #define _RTCC_IFS_DAYTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 368 #define RTCC_IFS_DAYTICK_DEFAULT (_RTCC_IFS_DAYTICK_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 369 #define RTCC_IFS_DAYOWOF (0x1UL << 9) /**< Set DAYOWOF Interrupt Flag */
AnnaBridge 170:e95d10626187 370 #define _RTCC_IFS_DAYOWOF_SHIFT 9 /**< Shift value for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 371 #define _RTCC_IFS_DAYOWOF_MASK 0x200UL /**< Bit mask for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 372 #define _RTCC_IFS_DAYOWOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 373 #define RTCC_IFS_DAYOWOF_DEFAULT (_RTCC_IFS_DAYOWOF_DEFAULT << 9) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 374 #define RTCC_IFS_MONTHTICK (0x1UL << 10) /**< Set MONTHTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 375 #define _RTCC_IFS_MONTHTICK_SHIFT 10 /**< Shift value for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 376 #define _RTCC_IFS_MONTHTICK_MASK 0x400UL /**< Bit mask for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 377 #define _RTCC_IFS_MONTHTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 378 #define RTCC_IFS_MONTHTICK_DEFAULT (_RTCC_IFS_MONTHTICK_DEFAULT << 10) /**< Shifted mode DEFAULT for RTCC_IFS */
AnnaBridge 170:e95d10626187 379
AnnaBridge 170:e95d10626187 380 /* Bit fields for RTCC IFC */
AnnaBridge 170:e95d10626187 381 #define _RTCC_IFC_RESETVALUE 0x00000000UL /**< Default value for RTCC_IFC */
AnnaBridge 170:e95d10626187 382 #define _RTCC_IFC_MASK 0x000007FFUL /**< Mask for RTCC_IFC */
AnnaBridge 170:e95d10626187 383 #define RTCC_IFC_OF (0x1UL << 0) /**< Clear OF Interrupt Flag */
AnnaBridge 170:e95d10626187 384 #define _RTCC_IFC_OF_SHIFT 0 /**< Shift value for RTCC_OF */
AnnaBridge 170:e95d10626187 385 #define _RTCC_IFC_OF_MASK 0x1UL /**< Bit mask for RTCC_OF */
AnnaBridge 170:e95d10626187 386 #define _RTCC_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 387 #define RTCC_IFC_OF_DEFAULT (_RTCC_IFC_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 388 #define RTCC_IFC_CC0 (0x1UL << 1) /**< Clear CC0 Interrupt Flag */
AnnaBridge 170:e95d10626187 389 #define _RTCC_IFC_CC0_SHIFT 1 /**< Shift value for RTCC_CC0 */
AnnaBridge 170:e95d10626187 390 #define _RTCC_IFC_CC0_MASK 0x2UL /**< Bit mask for RTCC_CC0 */
AnnaBridge 170:e95d10626187 391 #define _RTCC_IFC_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 392 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 393 #define RTCC_IFC_CC1 (0x1UL << 2) /**< Clear CC1 Interrupt Flag */
AnnaBridge 170:e95d10626187 394 #define _RTCC_IFC_CC1_SHIFT 2 /**< Shift value for RTCC_CC1 */
AnnaBridge 170:e95d10626187 395 #define _RTCC_IFC_CC1_MASK 0x4UL /**< Bit mask for RTCC_CC1 */
AnnaBridge 170:e95d10626187 396 #define _RTCC_IFC_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 397 #define RTCC_IFC_CC1_DEFAULT (_RTCC_IFC_CC1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 398 #define RTCC_IFC_CC2 (0x1UL << 3) /**< Clear CC2 Interrupt Flag */
AnnaBridge 170:e95d10626187 399 #define _RTCC_IFC_CC2_SHIFT 3 /**< Shift value for RTCC_CC2 */
AnnaBridge 170:e95d10626187 400 #define _RTCC_IFC_CC2_MASK 0x8UL /**< Bit mask for RTCC_CC2 */
AnnaBridge 170:e95d10626187 401 #define _RTCC_IFC_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 402 #define RTCC_IFC_CC2_DEFAULT (_RTCC_IFC_CC2_DEFAULT << 3) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 403 #define RTCC_IFC_OSCFAIL (0x1UL << 4) /**< Clear OSCFAIL Interrupt Flag */
AnnaBridge 170:e95d10626187 404 #define _RTCC_IFC_OSCFAIL_SHIFT 4 /**< Shift value for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 405 #define _RTCC_IFC_OSCFAIL_MASK 0x10UL /**< Bit mask for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 406 #define _RTCC_IFC_OSCFAIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 407 #define RTCC_IFC_OSCFAIL_DEFAULT (_RTCC_IFC_OSCFAIL_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 408 #define RTCC_IFC_CNTTICK (0x1UL << 5) /**< Clear CNTTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 409 #define _RTCC_IFC_CNTTICK_SHIFT 5 /**< Shift value for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 410 #define _RTCC_IFC_CNTTICK_MASK 0x20UL /**< Bit mask for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 411 #define _RTCC_IFC_CNTTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 412 #define RTCC_IFC_CNTTICK_DEFAULT (_RTCC_IFC_CNTTICK_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 413 #define RTCC_IFC_MINTICK (0x1UL << 6) /**< Clear MINTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 414 #define _RTCC_IFC_MINTICK_SHIFT 6 /**< Shift value for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 415 #define _RTCC_IFC_MINTICK_MASK 0x40UL /**< Bit mask for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 416 #define _RTCC_IFC_MINTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 417 #define RTCC_IFC_MINTICK_DEFAULT (_RTCC_IFC_MINTICK_DEFAULT << 6) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 418 #define RTCC_IFC_HOURTICK (0x1UL << 7) /**< Clear HOURTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 419 #define _RTCC_IFC_HOURTICK_SHIFT 7 /**< Shift value for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 420 #define _RTCC_IFC_HOURTICK_MASK 0x80UL /**< Bit mask for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 421 #define _RTCC_IFC_HOURTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 422 #define RTCC_IFC_HOURTICK_DEFAULT (_RTCC_IFC_HOURTICK_DEFAULT << 7) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 423 #define RTCC_IFC_DAYTICK (0x1UL << 8) /**< Clear DAYTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 424 #define _RTCC_IFC_DAYTICK_SHIFT 8 /**< Shift value for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 425 #define _RTCC_IFC_DAYTICK_MASK 0x100UL /**< Bit mask for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 426 #define _RTCC_IFC_DAYTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 427 #define RTCC_IFC_DAYTICK_DEFAULT (_RTCC_IFC_DAYTICK_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 428 #define RTCC_IFC_DAYOWOF (0x1UL << 9) /**< Clear DAYOWOF Interrupt Flag */
AnnaBridge 170:e95d10626187 429 #define _RTCC_IFC_DAYOWOF_SHIFT 9 /**< Shift value for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 430 #define _RTCC_IFC_DAYOWOF_MASK 0x200UL /**< Bit mask for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 431 #define _RTCC_IFC_DAYOWOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 432 #define RTCC_IFC_DAYOWOF_DEFAULT (_RTCC_IFC_DAYOWOF_DEFAULT << 9) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 433 #define RTCC_IFC_MONTHTICK (0x1UL << 10) /**< Clear MONTHTICK Interrupt Flag */
AnnaBridge 170:e95d10626187 434 #define _RTCC_IFC_MONTHTICK_SHIFT 10 /**< Shift value for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 435 #define _RTCC_IFC_MONTHTICK_MASK 0x400UL /**< Bit mask for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 436 #define _RTCC_IFC_MONTHTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 437 #define RTCC_IFC_MONTHTICK_DEFAULT (_RTCC_IFC_MONTHTICK_DEFAULT << 10) /**< Shifted mode DEFAULT for RTCC_IFC */
AnnaBridge 170:e95d10626187 438
AnnaBridge 170:e95d10626187 439 /* Bit fields for RTCC IEN */
AnnaBridge 170:e95d10626187 440 #define _RTCC_IEN_RESETVALUE 0x00000000UL /**< Default value for RTCC_IEN */
AnnaBridge 170:e95d10626187 441 #define _RTCC_IEN_MASK 0x000007FFUL /**< Mask for RTCC_IEN */
AnnaBridge 170:e95d10626187 442 #define RTCC_IEN_OF (0x1UL << 0) /**< OF Interrupt Enable */
AnnaBridge 170:e95d10626187 443 #define _RTCC_IEN_OF_SHIFT 0 /**< Shift value for RTCC_OF */
AnnaBridge 170:e95d10626187 444 #define _RTCC_IEN_OF_MASK 0x1UL /**< Bit mask for RTCC_OF */
AnnaBridge 170:e95d10626187 445 #define _RTCC_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 446 #define RTCC_IEN_OF_DEFAULT (_RTCC_IEN_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 447 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt Enable */
AnnaBridge 170:e95d10626187 448 #define _RTCC_IEN_CC0_SHIFT 1 /**< Shift value for RTCC_CC0 */
AnnaBridge 170:e95d10626187 449 #define _RTCC_IEN_CC0_MASK 0x2UL /**< Bit mask for RTCC_CC0 */
AnnaBridge 170:e95d10626187 450 #define _RTCC_IEN_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 451 #define RTCC_IEN_CC0_DEFAULT (_RTCC_IEN_CC0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 452 #define RTCC_IEN_CC1 (0x1UL << 2) /**< CC1 Interrupt Enable */
AnnaBridge 170:e95d10626187 453 #define _RTCC_IEN_CC1_SHIFT 2 /**< Shift value for RTCC_CC1 */
AnnaBridge 170:e95d10626187 454 #define _RTCC_IEN_CC1_MASK 0x4UL /**< Bit mask for RTCC_CC1 */
AnnaBridge 170:e95d10626187 455 #define _RTCC_IEN_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 456 #define RTCC_IEN_CC1_DEFAULT (_RTCC_IEN_CC1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 457 #define RTCC_IEN_CC2 (0x1UL << 3) /**< CC2 Interrupt Enable */
AnnaBridge 170:e95d10626187 458 #define _RTCC_IEN_CC2_SHIFT 3 /**< Shift value for RTCC_CC2 */
AnnaBridge 170:e95d10626187 459 #define _RTCC_IEN_CC2_MASK 0x8UL /**< Bit mask for RTCC_CC2 */
AnnaBridge 170:e95d10626187 460 #define _RTCC_IEN_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 461 #define RTCC_IEN_CC2_DEFAULT (_RTCC_IEN_CC2_DEFAULT << 3) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 462 #define RTCC_IEN_OSCFAIL (0x1UL << 4) /**< OSCFAIL Interrupt Enable */
AnnaBridge 170:e95d10626187 463 #define _RTCC_IEN_OSCFAIL_SHIFT 4 /**< Shift value for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 464 #define _RTCC_IEN_OSCFAIL_MASK 0x10UL /**< Bit mask for RTCC_OSCFAIL */
AnnaBridge 170:e95d10626187 465 #define _RTCC_IEN_OSCFAIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 466 #define RTCC_IEN_OSCFAIL_DEFAULT (_RTCC_IEN_OSCFAIL_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 467 #define RTCC_IEN_CNTTICK (0x1UL << 5) /**< CNTTICK Interrupt Enable */
AnnaBridge 170:e95d10626187 468 #define _RTCC_IEN_CNTTICK_SHIFT 5 /**< Shift value for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 469 #define _RTCC_IEN_CNTTICK_MASK 0x20UL /**< Bit mask for RTCC_CNTTICK */
AnnaBridge 170:e95d10626187 470 #define _RTCC_IEN_CNTTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 471 #define RTCC_IEN_CNTTICK_DEFAULT (_RTCC_IEN_CNTTICK_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 472 #define RTCC_IEN_MINTICK (0x1UL << 6) /**< MINTICK Interrupt Enable */
AnnaBridge 170:e95d10626187 473 #define _RTCC_IEN_MINTICK_SHIFT 6 /**< Shift value for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 474 #define _RTCC_IEN_MINTICK_MASK 0x40UL /**< Bit mask for RTCC_MINTICK */
AnnaBridge 170:e95d10626187 475 #define _RTCC_IEN_MINTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 476 #define RTCC_IEN_MINTICK_DEFAULT (_RTCC_IEN_MINTICK_DEFAULT << 6) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 477 #define RTCC_IEN_HOURTICK (0x1UL << 7) /**< HOURTICK Interrupt Enable */
AnnaBridge 170:e95d10626187 478 #define _RTCC_IEN_HOURTICK_SHIFT 7 /**< Shift value for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 479 #define _RTCC_IEN_HOURTICK_MASK 0x80UL /**< Bit mask for RTCC_HOURTICK */
AnnaBridge 170:e95d10626187 480 #define _RTCC_IEN_HOURTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 481 #define RTCC_IEN_HOURTICK_DEFAULT (_RTCC_IEN_HOURTICK_DEFAULT << 7) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 482 #define RTCC_IEN_DAYTICK (0x1UL << 8) /**< DAYTICK Interrupt Enable */
AnnaBridge 170:e95d10626187 483 #define _RTCC_IEN_DAYTICK_SHIFT 8 /**< Shift value for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 484 #define _RTCC_IEN_DAYTICK_MASK 0x100UL /**< Bit mask for RTCC_DAYTICK */
AnnaBridge 170:e95d10626187 485 #define _RTCC_IEN_DAYTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 486 #define RTCC_IEN_DAYTICK_DEFAULT (_RTCC_IEN_DAYTICK_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 487 #define RTCC_IEN_DAYOWOF (0x1UL << 9) /**< DAYOWOF Interrupt Enable */
AnnaBridge 170:e95d10626187 488 #define _RTCC_IEN_DAYOWOF_SHIFT 9 /**< Shift value for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 489 #define _RTCC_IEN_DAYOWOF_MASK 0x200UL /**< Bit mask for RTCC_DAYOWOF */
AnnaBridge 170:e95d10626187 490 #define _RTCC_IEN_DAYOWOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 491 #define RTCC_IEN_DAYOWOF_DEFAULT (_RTCC_IEN_DAYOWOF_DEFAULT << 9) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 492 #define RTCC_IEN_MONTHTICK (0x1UL << 10) /**< MONTHTICK Interrupt Enable */
AnnaBridge 170:e95d10626187 493 #define _RTCC_IEN_MONTHTICK_SHIFT 10 /**< Shift value for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 494 #define _RTCC_IEN_MONTHTICK_MASK 0x400UL /**< Bit mask for RTCC_MONTHTICK */
AnnaBridge 170:e95d10626187 495 #define _RTCC_IEN_MONTHTICK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 496 #define RTCC_IEN_MONTHTICK_DEFAULT (_RTCC_IEN_MONTHTICK_DEFAULT << 10) /**< Shifted mode DEFAULT for RTCC_IEN */
AnnaBridge 170:e95d10626187 497
AnnaBridge 170:e95d10626187 498 /* Bit fields for RTCC STATUS */
AnnaBridge 170:e95d10626187 499 #define _RTCC_STATUS_RESETVALUE 0x00000000UL /**< Default value for RTCC_STATUS */
AnnaBridge 170:e95d10626187 500 #define _RTCC_STATUS_MASK 0x00000001UL /**< Mask for RTCC_STATUS */
AnnaBridge 170:e95d10626187 501 #define RTCC_STATUS_BUMODETS (0x1UL << 0) /**< Timestamp for backup mode entry stored. */
AnnaBridge 170:e95d10626187 502 #define _RTCC_STATUS_BUMODETS_SHIFT 0 /**< Shift value for RTCC_BUMODETS */
AnnaBridge 170:e95d10626187 503 #define _RTCC_STATUS_BUMODETS_MASK 0x1UL /**< Bit mask for RTCC_BUMODETS */
AnnaBridge 170:e95d10626187 504 #define _RTCC_STATUS_BUMODETS_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_STATUS */
AnnaBridge 170:e95d10626187 505 #define RTCC_STATUS_BUMODETS_DEFAULT (_RTCC_STATUS_BUMODETS_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_STATUS */
AnnaBridge 170:e95d10626187 506
AnnaBridge 170:e95d10626187 507 /* Bit fields for RTCC CMD */
AnnaBridge 170:e95d10626187 508 #define _RTCC_CMD_RESETVALUE 0x00000000UL /**< Default value for RTCC_CMD */
AnnaBridge 170:e95d10626187 509 #define _RTCC_CMD_MASK 0x00000001UL /**< Mask for RTCC_CMD */
AnnaBridge 170:e95d10626187 510 #define RTCC_CMD_CLRSTATUS (0x1UL << 0) /**< Clear RTCC_STATUS register. */
AnnaBridge 170:e95d10626187 511 #define _RTCC_CMD_CLRSTATUS_SHIFT 0 /**< Shift value for RTCC_CLRSTATUS */
AnnaBridge 170:e95d10626187 512 #define _RTCC_CMD_CLRSTATUS_MASK 0x1UL /**< Bit mask for RTCC_CLRSTATUS */
AnnaBridge 170:e95d10626187 513 #define _RTCC_CMD_CLRSTATUS_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CMD */
AnnaBridge 170:e95d10626187 514 #define RTCC_CMD_CLRSTATUS_DEFAULT (_RTCC_CMD_CLRSTATUS_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CMD */
AnnaBridge 170:e95d10626187 515
AnnaBridge 170:e95d10626187 516 /* Bit fields for RTCC SYNCBUSY */
AnnaBridge 170:e95d10626187 517 #define _RTCC_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for RTCC_SYNCBUSY */
AnnaBridge 170:e95d10626187 518 #define _RTCC_SYNCBUSY_MASK 0x00000020UL /**< Mask for RTCC_SYNCBUSY */
AnnaBridge 170:e95d10626187 519 #define RTCC_SYNCBUSY_CMD (0x1UL << 5) /**< CMD Register Busy */
AnnaBridge 170:e95d10626187 520 #define _RTCC_SYNCBUSY_CMD_SHIFT 5 /**< Shift value for RTCC_CMD */
AnnaBridge 170:e95d10626187 521 #define _RTCC_SYNCBUSY_CMD_MASK 0x20UL /**< Bit mask for RTCC_CMD */
AnnaBridge 170:e95d10626187 522 #define _RTCC_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_SYNCBUSY */
AnnaBridge 170:e95d10626187 523 #define RTCC_SYNCBUSY_CMD_DEFAULT (_RTCC_SYNCBUSY_CMD_DEFAULT << 5) /**< Shifted mode DEFAULT for RTCC_SYNCBUSY */
AnnaBridge 170:e95d10626187 524
AnnaBridge 170:e95d10626187 525 /* Bit fields for RTCC POWERDOWN */
AnnaBridge 170:e95d10626187 526 #define _RTCC_POWERDOWN_RESETVALUE 0x00000000UL /**< Default value for RTCC_POWERDOWN */
AnnaBridge 170:e95d10626187 527 #define _RTCC_POWERDOWN_MASK 0x00000001UL /**< Mask for RTCC_POWERDOWN */
AnnaBridge 170:e95d10626187 528 #define RTCC_POWERDOWN_RAM (0x1UL << 0) /**< Retention RAM power-down */
AnnaBridge 170:e95d10626187 529 #define _RTCC_POWERDOWN_RAM_SHIFT 0 /**< Shift value for RTCC_RAM */
AnnaBridge 170:e95d10626187 530 #define _RTCC_POWERDOWN_RAM_MASK 0x1UL /**< Bit mask for RTCC_RAM */
AnnaBridge 170:e95d10626187 531 #define _RTCC_POWERDOWN_RAM_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_POWERDOWN */
AnnaBridge 170:e95d10626187 532 #define RTCC_POWERDOWN_RAM_DEFAULT (_RTCC_POWERDOWN_RAM_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_POWERDOWN */
AnnaBridge 170:e95d10626187 533
AnnaBridge 170:e95d10626187 534 /* Bit fields for RTCC LOCK */
AnnaBridge 170:e95d10626187 535 #define _RTCC_LOCK_RESETVALUE 0x00000000UL /**< Default value for RTCC_LOCK */
AnnaBridge 170:e95d10626187 536 #define _RTCC_LOCK_MASK 0x0000FFFFUL /**< Mask for RTCC_LOCK */
AnnaBridge 170:e95d10626187 537 #define _RTCC_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for RTCC_LOCKKEY */
AnnaBridge 170:e95d10626187 538 #define _RTCC_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for RTCC_LOCKKEY */
AnnaBridge 170:e95d10626187 539 #define _RTCC_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_LOCK */
AnnaBridge 170:e95d10626187 540 #define _RTCC_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for RTCC_LOCK */
AnnaBridge 170:e95d10626187 541 #define _RTCC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for RTCC_LOCK */
AnnaBridge 170:e95d10626187 542 #define _RTCC_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for RTCC_LOCK */
AnnaBridge 170:e95d10626187 543 #define _RTCC_LOCK_LOCKKEY_UNLOCK 0x0000AEE8UL /**< Mode UNLOCK for RTCC_LOCK */
AnnaBridge 170:e95d10626187 544 #define RTCC_LOCK_LOCKKEY_DEFAULT (_RTCC_LOCK_LOCKKEY_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_LOCK */
AnnaBridge 170:e95d10626187 545 #define RTCC_LOCK_LOCKKEY_LOCK (_RTCC_LOCK_LOCKKEY_LOCK << 0) /**< Shifted mode LOCK for RTCC_LOCK */
AnnaBridge 170:e95d10626187 546 #define RTCC_LOCK_LOCKKEY_UNLOCKED (_RTCC_LOCK_LOCKKEY_UNLOCKED << 0) /**< Shifted mode UNLOCKED for RTCC_LOCK */
AnnaBridge 170:e95d10626187 547 #define RTCC_LOCK_LOCKKEY_LOCKED (_RTCC_LOCK_LOCKKEY_LOCKED << 0) /**< Shifted mode LOCKED for RTCC_LOCK */
AnnaBridge 170:e95d10626187 548 #define RTCC_LOCK_LOCKKEY_UNLOCK (_RTCC_LOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for RTCC_LOCK */
AnnaBridge 170:e95d10626187 549
AnnaBridge 170:e95d10626187 550 /* Bit fields for RTCC EM4WUEN */
AnnaBridge 170:e95d10626187 551 #define _RTCC_EM4WUEN_RESETVALUE 0x00000000UL /**< Default value for RTCC_EM4WUEN */
AnnaBridge 170:e95d10626187 552 #define _RTCC_EM4WUEN_MASK 0x00000001UL /**< Mask for RTCC_EM4WUEN */
AnnaBridge 170:e95d10626187 553 #define RTCC_EM4WUEN_EM4WU (0x1UL << 0) /**< EM4 Wake-up enable */
AnnaBridge 170:e95d10626187 554 #define _RTCC_EM4WUEN_EM4WU_SHIFT 0 /**< Shift value for RTCC_EM4WU */
AnnaBridge 170:e95d10626187 555 #define _RTCC_EM4WUEN_EM4WU_MASK 0x1UL /**< Bit mask for RTCC_EM4WU */
AnnaBridge 170:e95d10626187 556 #define _RTCC_EM4WUEN_EM4WU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_EM4WUEN */
AnnaBridge 170:e95d10626187 557 #define RTCC_EM4WUEN_EM4WU_DEFAULT (_RTCC_EM4WUEN_EM4WU_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_EM4WUEN */
AnnaBridge 170:e95d10626187 558
AnnaBridge 170:e95d10626187 559 /* Bit fields for RTCC CC_CTRL */
AnnaBridge 170:e95d10626187 560 #define _RTCC_CC_CTRL_RESETVALUE 0x00000000UL /**< Default value for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 561 #define _RTCC_CC_CTRL_MASK 0x0003FFFFUL /**< Mask for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 562 #define _RTCC_CC_CTRL_MODE_SHIFT 0 /**< Shift value for CC_MODE */
AnnaBridge 170:e95d10626187 563 #define _RTCC_CC_CTRL_MODE_MASK 0x3UL /**< Bit mask for CC_MODE */
AnnaBridge 170:e95d10626187 564 #define _RTCC_CC_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 565 #define _RTCC_CC_CTRL_MODE_OFF 0x00000000UL /**< Mode OFF for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 566 #define _RTCC_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL /**< Mode INPUTCAPTURE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 567 #define _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL /**< Mode OUTPUTCOMPARE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 568 #define RTCC_CC_CTRL_MODE_DEFAULT (_RTCC_CC_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 569 #define RTCC_CC_CTRL_MODE_OFF (_RTCC_CC_CTRL_MODE_OFF << 0) /**< Shifted mode OFF for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 570 #define RTCC_CC_CTRL_MODE_INPUTCAPTURE (_RTCC_CC_CTRL_MODE_INPUTCAPTURE << 0) /**< Shifted mode INPUTCAPTURE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 571 #define RTCC_CC_CTRL_MODE_OUTPUTCOMPARE (_RTCC_CC_CTRL_MODE_OUTPUTCOMPARE << 0) /**< Shifted mode OUTPUTCOMPARE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 572 #define _RTCC_CC_CTRL_CMOA_SHIFT 2 /**< Shift value for CC_CMOA */
AnnaBridge 170:e95d10626187 573 #define _RTCC_CC_CTRL_CMOA_MASK 0xCUL /**< Bit mask for CC_CMOA */
AnnaBridge 170:e95d10626187 574 #define _RTCC_CC_CTRL_CMOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 575 #define _RTCC_CC_CTRL_CMOA_PULSE 0x00000000UL /**< Mode PULSE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 576 #define _RTCC_CC_CTRL_CMOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 577 #define _RTCC_CC_CTRL_CMOA_CLEAR 0x00000002UL /**< Mode CLEAR for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 578 #define _RTCC_CC_CTRL_CMOA_SET 0x00000003UL /**< Mode SET for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 579 #define RTCC_CC_CTRL_CMOA_DEFAULT (_RTCC_CC_CTRL_CMOA_DEFAULT << 2) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 580 #define RTCC_CC_CTRL_CMOA_PULSE (_RTCC_CC_CTRL_CMOA_PULSE << 2) /**< Shifted mode PULSE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 581 #define RTCC_CC_CTRL_CMOA_TOGGLE (_RTCC_CC_CTRL_CMOA_TOGGLE << 2) /**< Shifted mode TOGGLE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 582 #define RTCC_CC_CTRL_CMOA_CLEAR (_RTCC_CC_CTRL_CMOA_CLEAR << 2) /**< Shifted mode CLEAR for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 583 #define RTCC_CC_CTRL_CMOA_SET (_RTCC_CC_CTRL_CMOA_SET << 2) /**< Shifted mode SET for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 584 #define _RTCC_CC_CTRL_ICEDGE_SHIFT 4 /**< Shift value for CC_ICEDGE */
AnnaBridge 170:e95d10626187 585 #define _RTCC_CC_CTRL_ICEDGE_MASK 0x30UL /**< Bit mask for CC_ICEDGE */
AnnaBridge 170:e95d10626187 586 #define _RTCC_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 587 #define _RTCC_CC_CTRL_ICEDGE_RISING 0x00000000UL /**< Mode RISING for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 588 #define _RTCC_CC_CTRL_ICEDGE_FALLING 0x00000001UL /**< Mode FALLING for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 589 #define _RTCC_CC_CTRL_ICEDGE_BOTH 0x00000002UL /**< Mode BOTH for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 590 #define _RTCC_CC_CTRL_ICEDGE_NONE 0x00000003UL /**< Mode NONE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 591 #define RTCC_CC_CTRL_ICEDGE_DEFAULT (_RTCC_CC_CTRL_ICEDGE_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 592 #define RTCC_CC_CTRL_ICEDGE_RISING (_RTCC_CC_CTRL_ICEDGE_RISING << 4) /**< Shifted mode RISING for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 593 #define RTCC_CC_CTRL_ICEDGE_FALLING (_RTCC_CC_CTRL_ICEDGE_FALLING << 4) /**< Shifted mode FALLING for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 594 #define RTCC_CC_CTRL_ICEDGE_BOTH (_RTCC_CC_CTRL_ICEDGE_BOTH << 4) /**< Shifted mode BOTH for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 595 #define RTCC_CC_CTRL_ICEDGE_NONE (_RTCC_CC_CTRL_ICEDGE_NONE << 4) /**< Shifted mode NONE for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 596 #define _RTCC_CC_CTRL_PRSSEL_SHIFT 6 /**< Shift value for CC_PRSSEL */
AnnaBridge 170:e95d10626187 597 #define _RTCC_CC_CTRL_PRSSEL_MASK 0x7C0UL /**< Bit mask for CC_PRSSEL */
AnnaBridge 170:e95d10626187 598 #define _RTCC_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 599 #define _RTCC_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 600 #define _RTCC_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 601 #define _RTCC_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 602 #define _RTCC_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 603 #define _RTCC_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 604 #define _RTCC_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 605 #define _RTCC_CC_CTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 606 #define _RTCC_CC_CTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 607 #define _RTCC_CC_CTRL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 608 #define _RTCC_CC_CTRL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 609 #define _RTCC_CC_CTRL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 610 #define _RTCC_CC_CTRL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 611 #define _RTCC_CC_CTRL_PRSSEL_PRSCH12 0x0000000CUL /**< Mode PRSCH12 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 612 #define _RTCC_CC_CTRL_PRSSEL_PRSCH13 0x0000000DUL /**< Mode PRSCH13 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 613 #define _RTCC_CC_CTRL_PRSSEL_PRSCH14 0x0000000EUL /**< Mode PRSCH14 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 614 #define _RTCC_CC_CTRL_PRSSEL_PRSCH15 0x0000000FUL /**< Mode PRSCH15 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 615 #define _RTCC_CC_CTRL_PRSSEL_PRSCH16 0x00000010UL /**< Mode PRSCH16 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 616 #define _RTCC_CC_CTRL_PRSSEL_PRSCH17 0x00000011UL /**< Mode PRSCH17 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 617 #define _RTCC_CC_CTRL_PRSSEL_PRSCH18 0x00000012UL /**< Mode PRSCH18 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 618 #define _RTCC_CC_CTRL_PRSSEL_PRSCH19 0x00000013UL /**< Mode PRSCH19 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 619 #define _RTCC_CC_CTRL_PRSSEL_PRSCH20 0x00000014UL /**< Mode PRSCH20 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 620 #define _RTCC_CC_CTRL_PRSSEL_PRSCH21 0x00000015UL /**< Mode PRSCH21 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 621 #define _RTCC_CC_CTRL_PRSSEL_PRSCH22 0x00000016UL /**< Mode PRSCH22 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 622 #define _RTCC_CC_CTRL_PRSSEL_PRSCH23 0x00000017UL /**< Mode PRSCH23 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 623 #define RTCC_CC_CTRL_PRSSEL_DEFAULT (_RTCC_CC_CTRL_PRSSEL_DEFAULT << 6) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 624 #define RTCC_CC_CTRL_PRSSEL_PRSCH0 (_RTCC_CC_CTRL_PRSSEL_PRSCH0 << 6) /**< Shifted mode PRSCH0 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 625 #define RTCC_CC_CTRL_PRSSEL_PRSCH1 (_RTCC_CC_CTRL_PRSSEL_PRSCH1 << 6) /**< Shifted mode PRSCH1 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 626 #define RTCC_CC_CTRL_PRSSEL_PRSCH2 (_RTCC_CC_CTRL_PRSSEL_PRSCH2 << 6) /**< Shifted mode PRSCH2 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 627 #define RTCC_CC_CTRL_PRSSEL_PRSCH3 (_RTCC_CC_CTRL_PRSSEL_PRSCH3 << 6) /**< Shifted mode PRSCH3 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 628 #define RTCC_CC_CTRL_PRSSEL_PRSCH4 (_RTCC_CC_CTRL_PRSSEL_PRSCH4 << 6) /**< Shifted mode PRSCH4 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 629 #define RTCC_CC_CTRL_PRSSEL_PRSCH5 (_RTCC_CC_CTRL_PRSSEL_PRSCH5 << 6) /**< Shifted mode PRSCH5 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 630 #define RTCC_CC_CTRL_PRSSEL_PRSCH6 (_RTCC_CC_CTRL_PRSSEL_PRSCH6 << 6) /**< Shifted mode PRSCH6 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 631 #define RTCC_CC_CTRL_PRSSEL_PRSCH7 (_RTCC_CC_CTRL_PRSSEL_PRSCH7 << 6) /**< Shifted mode PRSCH7 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 632 #define RTCC_CC_CTRL_PRSSEL_PRSCH8 (_RTCC_CC_CTRL_PRSSEL_PRSCH8 << 6) /**< Shifted mode PRSCH8 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 633 #define RTCC_CC_CTRL_PRSSEL_PRSCH9 (_RTCC_CC_CTRL_PRSSEL_PRSCH9 << 6) /**< Shifted mode PRSCH9 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 634 #define RTCC_CC_CTRL_PRSSEL_PRSCH10 (_RTCC_CC_CTRL_PRSSEL_PRSCH10 << 6) /**< Shifted mode PRSCH10 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 635 #define RTCC_CC_CTRL_PRSSEL_PRSCH11 (_RTCC_CC_CTRL_PRSSEL_PRSCH11 << 6) /**< Shifted mode PRSCH11 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 636 #define RTCC_CC_CTRL_PRSSEL_PRSCH12 (_RTCC_CC_CTRL_PRSSEL_PRSCH12 << 6) /**< Shifted mode PRSCH12 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 637 #define RTCC_CC_CTRL_PRSSEL_PRSCH13 (_RTCC_CC_CTRL_PRSSEL_PRSCH13 << 6) /**< Shifted mode PRSCH13 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 638 #define RTCC_CC_CTRL_PRSSEL_PRSCH14 (_RTCC_CC_CTRL_PRSSEL_PRSCH14 << 6) /**< Shifted mode PRSCH14 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 639 #define RTCC_CC_CTRL_PRSSEL_PRSCH15 (_RTCC_CC_CTRL_PRSSEL_PRSCH15 << 6) /**< Shifted mode PRSCH15 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 640 #define RTCC_CC_CTRL_PRSSEL_PRSCH16 (_RTCC_CC_CTRL_PRSSEL_PRSCH16 << 6) /**< Shifted mode PRSCH16 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 641 #define RTCC_CC_CTRL_PRSSEL_PRSCH17 (_RTCC_CC_CTRL_PRSSEL_PRSCH17 << 6) /**< Shifted mode PRSCH17 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 642 #define RTCC_CC_CTRL_PRSSEL_PRSCH18 (_RTCC_CC_CTRL_PRSSEL_PRSCH18 << 6) /**< Shifted mode PRSCH18 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 643 #define RTCC_CC_CTRL_PRSSEL_PRSCH19 (_RTCC_CC_CTRL_PRSSEL_PRSCH19 << 6) /**< Shifted mode PRSCH19 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 644 #define RTCC_CC_CTRL_PRSSEL_PRSCH20 (_RTCC_CC_CTRL_PRSSEL_PRSCH20 << 6) /**< Shifted mode PRSCH20 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 645 #define RTCC_CC_CTRL_PRSSEL_PRSCH21 (_RTCC_CC_CTRL_PRSSEL_PRSCH21 << 6) /**< Shifted mode PRSCH21 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 646 #define RTCC_CC_CTRL_PRSSEL_PRSCH22 (_RTCC_CC_CTRL_PRSSEL_PRSCH22 << 6) /**< Shifted mode PRSCH22 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 647 #define RTCC_CC_CTRL_PRSSEL_PRSCH23 (_RTCC_CC_CTRL_PRSSEL_PRSCH23 << 6) /**< Shifted mode PRSCH23 for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 648 #define RTCC_CC_CTRL_COMPBASE (0x1UL << 11) /**< Capture compare channel comparison base. */
AnnaBridge 170:e95d10626187 649 #define _RTCC_CC_CTRL_COMPBASE_SHIFT 11 /**< Shift value for CC_COMPBASE */
AnnaBridge 170:e95d10626187 650 #define _RTCC_CC_CTRL_COMPBASE_MASK 0x800UL /**< Bit mask for CC_COMPBASE */
AnnaBridge 170:e95d10626187 651 #define _RTCC_CC_CTRL_COMPBASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 652 #define _RTCC_CC_CTRL_COMPBASE_CNT 0x00000000UL /**< Mode CNT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 653 #define _RTCC_CC_CTRL_COMPBASE_PRECNT 0x00000001UL /**< Mode PRECNT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 654 #define RTCC_CC_CTRL_COMPBASE_DEFAULT (_RTCC_CC_CTRL_COMPBASE_DEFAULT << 11) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 655 #define RTCC_CC_CTRL_COMPBASE_CNT (_RTCC_CC_CTRL_COMPBASE_CNT << 11) /**< Shifted mode CNT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 656 #define RTCC_CC_CTRL_COMPBASE_PRECNT (_RTCC_CC_CTRL_COMPBASE_PRECNT << 11) /**< Shifted mode PRECNT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 657 #define _RTCC_CC_CTRL_COMPMASK_SHIFT 12 /**< Shift value for CC_COMPMASK */
AnnaBridge 170:e95d10626187 658 #define _RTCC_CC_CTRL_COMPMASK_MASK 0x1F000UL /**< Bit mask for CC_COMPMASK */
AnnaBridge 170:e95d10626187 659 #define _RTCC_CC_CTRL_COMPMASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 660 #define RTCC_CC_CTRL_COMPMASK_DEFAULT (_RTCC_CC_CTRL_COMPMASK_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 661 #define RTCC_CC_CTRL_DAYCC (0x1UL << 17) /**< Day Capture/Compare selection */
AnnaBridge 170:e95d10626187 662 #define _RTCC_CC_CTRL_DAYCC_SHIFT 17 /**< Shift value for CC_DAYCC */
AnnaBridge 170:e95d10626187 663 #define _RTCC_CC_CTRL_DAYCC_MASK 0x20000UL /**< Bit mask for CC_DAYCC */
AnnaBridge 170:e95d10626187 664 #define _RTCC_CC_CTRL_DAYCC_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 665 #define _RTCC_CC_CTRL_DAYCC_MONTH 0x00000000UL /**< Mode MONTH for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 666 #define _RTCC_CC_CTRL_DAYCC_WEEK 0x00000001UL /**< Mode WEEK for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 667 #define RTCC_CC_CTRL_DAYCC_DEFAULT (_RTCC_CC_CTRL_DAYCC_DEFAULT << 17) /**< Shifted mode DEFAULT for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 668 #define RTCC_CC_CTRL_DAYCC_MONTH (_RTCC_CC_CTRL_DAYCC_MONTH << 17) /**< Shifted mode MONTH for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 669 #define RTCC_CC_CTRL_DAYCC_WEEK (_RTCC_CC_CTRL_DAYCC_WEEK << 17) /**< Shifted mode WEEK for RTCC_CC_CTRL */
AnnaBridge 170:e95d10626187 670
AnnaBridge 170:e95d10626187 671 /* Bit fields for RTCC CC_CCV */
AnnaBridge 170:e95d10626187 672 #define _RTCC_CC_CCV_RESETVALUE 0x00000000UL /**< Default value for RTCC_CC_CCV */
AnnaBridge 170:e95d10626187 673 #define _RTCC_CC_CCV_MASK 0xFFFFFFFFUL /**< Mask for RTCC_CC_CCV */
AnnaBridge 170:e95d10626187 674 #define _RTCC_CC_CCV_CCV_SHIFT 0 /**< Shift value for CC_CCV */
AnnaBridge 170:e95d10626187 675 #define _RTCC_CC_CCV_CCV_MASK 0xFFFFFFFFUL /**< Bit mask for CC_CCV */
AnnaBridge 170:e95d10626187 676 #define _RTCC_CC_CCV_CCV_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_CCV */
AnnaBridge 170:e95d10626187 677 #define RTCC_CC_CCV_CCV_DEFAULT (_RTCC_CC_CCV_CCV_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CC_CCV */
AnnaBridge 170:e95d10626187 678
AnnaBridge 170:e95d10626187 679 /* Bit fields for RTCC CC_TIME */
AnnaBridge 170:e95d10626187 680 #define _RTCC_CC_TIME_RESETVALUE 0x00000000UL /**< Default value for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 681 #define _RTCC_CC_TIME_MASK 0x003F7F7FUL /**< Mask for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 682 #define _RTCC_CC_TIME_SECU_SHIFT 0 /**< Shift value for CC_SECU */
AnnaBridge 170:e95d10626187 683 #define _RTCC_CC_TIME_SECU_MASK 0xFUL /**< Bit mask for CC_SECU */
AnnaBridge 170:e95d10626187 684 #define _RTCC_CC_TIME_SECU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 685 #define RTCC_CC_TIME_SECU_DEFAULT (_RTCC_CC_TIME_SECU_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 686 #define _RTCC_CC_TIME_SECT_SHIFT 4 /**< Shift value for CC_SECT */
AnnaBridge 170:e95d10626187 687 #define _RTCC_CC_TIME_SECT_MASK 0x70UL /**< Bit mask for CC_SECT */
AnnaBridge 170:e95d10626187 688 #define _RTCC_CC_TIME_SECT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 689 #define RTCC_CC_TIME_SECT_DEFAULT (_RTCC_CC_TIME_SECT_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 690 #define _RTCC_CC_TIME_MINU_SHIFT 8 /**< Shift value for CC_MINU */
AnnaBridge 170:e95d10626187 691 #define _RTCC_CC_TIME_MINU_MASK 0xF00UL /**< Bit mask for CC_MINU */
AnnaBridge 170:e95d10626187 692 #define _RTCC_CC_TIME_MINU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 693 #define RTCC_CC_TIME_MINU_DEFAULT (_RTCC_CC_TIME_MINU_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 694 #define _RTCC_CC_TIME_MINT_SHIFT 12 /**< Shift value for CC_MINT */
AnnaBridge 170:e95d10626187 695 #define _RTCC_CC_TIME_MINT_MASK 0x7000UL /**< Bit mask for CC_MINT */
AnnaBridge 170:e95d10626187 696 #define _RTCC_CC_TIME_MINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 697 #define RTCC_CC_TIME_MINT_DEFAULT (_RTCC_CC_TIME_MINT_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 698 #define _RTCC_CC_TIME_HOURU_SHIFT 16 /**< Shift value for CC_HOURU */
AnnaBridge 170:e95d10626187 699 #define _RTCC_CC_TIME_HOURU_MASK 0xF0000UL /**< Bit mask for CC_HOURU */
AnnaBridge 170:e95d10626187 700 #define _RTCC_CC_TIME_HOURU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 701 #define RTCC_CC_TIME_HOURU_DEFAULT (_RTCC_CC_TIME_HOURU_DEFAULT << 16) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 702 #define _RTCC_CC_TIME_HOURT_SHIFT 20 /**< Shift value for CC_HOURT */
AnnaBridge 170:e95d10626187 703 #define _RTCC_CC_TIME_HOURT_MASK 0x300000UL /**< Bit mask for CC_HOURT */
AnnaBridge 170:e95d10626187 704 #define _RTCC_CC_TIME_HOURT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 705 #define RTCC_CC_TIME_HOURT_DEFAULT (_RTCC_CC_TIME_HOURT_DEFAULT << 20) /**< Shifted mode DEFAULT for RTCC_CC_TIME */
AnnaBridge 170:e95d10626187 706
AnnaBridge 170:e95d10626187 707 /* Bit fields for RTCC CC_DATE */
AnnaBridge 170:e95d10626187 708 #define _RTCC_CC_DATE_RESETVALUE 0x00000000UL /**< Default value for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 709 #define _RTCC_CC_DATE_MASK 0x00001F3FUL /**< Mask for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 710 #define _RTCC_CC_DATE_DAYU_SHIFT 0 /**< Shift value for CC_DAYU */
AnnaBridge 170:e95d10626187 711 #define _RTCC_CC_DATE_DAYU_MASK 0xFUL /**< Bit mask for CC_DAYU */
AnnaBridge 170:e95d10626187 712 #define _RTCC_CC_DATE_DAYU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 713 #define RTCC_CC_DATE_DAYU_DEFAULT (_RTCC_CC_DATE_DAYU_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 714 #define _RTCC_CC_DATE_DAYT_SHIFT 4 /**< Shift value for CC_DAYT */
AnnaBridge 170:e95d10626187 715 #define _RTCC_CC_DATE_DAYT_MASK 0x30UL /**< Bit mask for CC_DAYT */
AnnaBridge 170:e95d10626187 716 #define _RTCC_CC_DATE_DAYT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 717 #define RTCC_CC_DATE_DAYT_DEFAULT (_RTCC_CC_DATE_DAYT_DEFAULT << 4) /**< Shifted mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 718 #define _RTCC_CC_DATE_MONTHU_SHIFT 8 /**< Shift value for CC_MONTHU */
AnnaBridge 170:e95d10626187 719 #define _RTCC_CC_DATE_MONTHU_MASK 0xF00UL /**< Bit mask for CC_MONTHU */
AnnaBridge 170:e95d10626187 720 #define _RTCC_CC_DATE_MONTHU_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 721 #define RTCC_CC_DATE_MONTHU_DEFAULT (_RTCC_CC_DATE_MONTHU_DEFAULT << 8) /**< Shifted mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 722 #define RTCC_CC_DATE_MONTHT (0x1UL << 12) /**< Month, tens. */
AnnaBridge 170:e95d10626187 723 #define _RTCC_CC_DATE_MONTHT_SHIFT 12 /**< Shift value for CC_MONTHT */
AnnaBridge 170:e95d10626187 724 #define _RTCC_CC_DATE_MONTHT_MASK 0x1000UL /**< Bit mask for CC_MONTHT */
AnnaBridge 170:e95d10626187 725 #define _RTCC_CC_DATE_MONTHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 726 #define RTCC_CC_DATE_MONTHT_DEFAULT (_RTCC_CC_DATE_MONTHT_DEFAULT << 12) /**< Shifted mode DEFAULT for RTCC_CC_DATE */
AnnaBridge 170:e95d10626187 727
AnnaBridge 170:e95d10626187 728 /* Bit fields for RTCC RET_REG */
AnnaBridge 170:e95d10626187 729 #define _RTCC_RET_REG_RESETVALUE 0x00000000UL /**< Default value for RTCC_RET_REG */
AnnaBridge 170:e95d10626187 730 #define _RTCC_RET_REG_MASK 0xFFFFFFFFUL /**< Mask for RTCC_RET_REG */
AnnaBridge 170:e95d10626187 731 #define _RTCC_RET_REG_REG_SHIFT 0 /**< Shift value for RET_REG */
AnnaBridge 170:e95d10626187 732 #define _RTCC_RET_REG_REG_MASK 0xFFFFFFFFUL /**< Bit mask for RET_REG */
AnnaBridge 170:e95d10626187 733 #define _RTCC_RET_REG_REG_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTCC_RET_REG */
AnnaBridge 170:e95d10626187 734 #define RTCC_RET_REG_REG_DEFAULT (_RTCC_RET_REG_REG_DEFAULT << 0) /**< Shifted mode DEFAULT for RTCC_RET_REG */
AnnaBridge 170:e95d10626187 735
AnnaBridge 170:e95d10626187 736 /** @} */
AnnaBridge 170:e95d10626187 737 /** @} End of group EFM32GG11B_RTCC */
AnnaBridge 170:e95d10626187 738 /** @} End of group Parts */