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TARGET_EFM32GG11_STK3701/TOOLCHAIN_ARM_STD/efm32gg11b_csen.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 170:e95d10626187 1 /**************************************************************************//**
AnnaBridge 170:e95d10626187 2 * @file efm32gg11b_csen.h
AnnaBridge 170:e95d10626187 3 * @brief EFM32GG11B_CSEN register and bit field definitions
AnnaBridge 170:e95d10626187 4 * @version 5.3.2
AnnaBridge 170:e95d10626187 5 ******************************************************************************
AnnaBridge 170:e95d10626187 6 * # License
AnnaBridge 170:e95d10626187 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 170:e95d10626187 8 ******************************************************************************
AnnaBridge 170:e95d10626187 9 *
AnnaBridge 170:e95d10626187 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 170:e95d10626187 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 170:e95d10626187 12 * freely, subject to the following restrictions:
AnnaBridge 170:e95d10626187 13 *
AnnaBridge 170:e95d10626187 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 170:e95d10626187 15 * claim that you wrote the original software.@n
AnnaBridge 170:e95d10626187 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 170:e95d10626187 17 * misrepresented as being the original software.@n
AnnaBridge 170:e95d10626187 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 170:e95d10626187 19 *
AnnaBridge 170:e95d10626187 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 170:e95d10626187 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 170:e95d10626187 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 170:e95d10626187 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 170:e95d10626187 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 170:e95d10626187 25 * infringement of any proprietary rights of a third party.
AnnaBridge 170:e95d10626187 26 *
AnnaBridge 170:e95d10626187 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 170:e95d10626187 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 170:e95d10626187 29 * any third party, arising from your use of this Software.
AnnaBridge 170:e95d10626187 30 *
AnnaBridge 170:e95d10626187 31 *****************************************************************************/
AnnaBridge 170:e95d10626187 32
AnnaBridge 170:e95d10626187 33 #if defined(__ICCARM__)
AnnaBridge 170:e95d10626187 34 #pragma system_include /* Treat file as system include file. */
AnnaBridge 170:e95d10626187 35 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
AnnaBridge 170:e95d10626187 36 #pragma clang system_header /* Treat file as system include file. */
AnnaBridge 170:e95d10626187 37 #endif
AnnaBridge 170:e95d10626187 38
AnnaBridge 170:e95d10626187 39 /**************************************************************************//**
AnnaBridge 170:e95d10626187 40 * @addtogroup Parts
AnnaBridge 170:e95d10626187 41 * @{
AnnaBridge 170:e95d10626187 42 ******************************************************************************/
AnnaBridge 170:e95d10626187 43 /**************************************************************************//**
AnnaBridge 170:e95d10626187 44 * @defgroup EFM32GG11B_CSEN CSEN
AnnaBridge 170:e95d10626187 45 * @{
AnnaBridge 170:e95d10626187 46 * @brief EFM32GG11B_CSEN Register Declaration
AnnaBridge 170:e95d10626187 47 *****************************************************************************/
AnnaBridge 170:e95d10626187 48 /** CSEN Register Declaration */
AnnaBridge 170:e95d10626187 49 typedef struct {
AnnaBridge 170:e95d10626187 50 __IOM uint32_t CTRL; /**< Control */
AnnaBridge 170:e95d10626187 51 __IOM uint32_t TIMCTRL; /**< Timing Control */
AnnaBridge 170:e95d10626187 52 __IOM uint32_t CMD; /**< Command */
AnnaBridge 170:e95d10626187 53 __IM uint32_t STATUS; /**< Status */
AnnaBridge 170:e95d10626187 54 __IOM uint32_t PRSSEL; /**< PRS Select */
AnnaBridge 170:e95d10626187 55 __IOM uint32_t DATA; /**< Output Data */
AnnaBridge 170:e95d10626187 56 __IOM uint32_t SCANMASK0; /**< Scan Channel Mask 0 */
AnnaBridge 170:e95d10626187 57 __IOM uint32_t SCANINPUTSEL0; /**< Scan Input Selection 0 */
AnnaBridge 170:e95d10626187 58 __IOM uint32_t SCANMASK1; /**< Scan Channel Mask 1 */
AnnaBridge 170:e95d10626187 59 __IOM uint32_t SCANINPUTSEL1; /**< Scan Input Selection 1 */
AnnaBridge 170:e95d10626187 60 __IM uint32_t APORTREQ; /**< APORT Request Status */
AnnaBridge 170:e95d10626187 61 __IM uint32_t APORTCONFLICT; /**< APORT Request Conflict */
AnnaBridge 170:e95d10626187 62 __IOM uint32_t CMPTHR; /**< Comparator Threshold */
AnnaBridge 170:e95d10626187 63 __IOM uint32_t EMA; /**< Exponential Moving Average */
AnnaBridge 170:e95d10626187 64 __IOM uint32_t EMACTRL; /**< Exponential Moving Average Control */
AnnaBridge 170:e95d10626187 65 __IOM uint32_t SINGLECTRL; /**< Single Conversion Control */
AnnaBridge 170:e95d10626187 66 __IOM uint32_t DMBASELINE; /**< Delta Modulation Baseline */
AnnaBridge 170:e95d10626187 67 __IOM uint32_t DMCFG; /**< Delta Modulation Configuration */
AnnaBridge 170:e95d10626187 68 __IOM uint32_t ANACTRL; /**< Analog Control */
AnnaBridge 170:e95d10626187 69
AnnaBridge 170:e95d10626187 70 uint32_t RESERVED0[2]; /**< Reserved for future use **/
AnnaBridge 170:e95d10626187 71 __IM uint32_t IF; /**< Interrupt Flag */
AnnaBridge 170:e95d10626187 72 __IOM uint32_t IFS; /**< Interrupt Flag Set */
AnnaBridge 170:e95d10626187 73 __IOM uint32_t IFC; /**< Interrupt Flag Clear */
AnnaBridge 170:e95d10626187 74 __IOM uint32_t IEN; /**< Interrupt Enable */
AnnaBridge 170:e95d10626187 75 } CSEN_TypeDef; /** @} */
AnnaBridge 170:e95d10626187 76
AnnaBridge 170:e95d10626187 77 /**************************************************************************//**
AnnaBridge 170:e95d10626187 78 * @addtogroup EFM32GG11B_CSEN
AnnaBridge 170:e95d10626187 79 * @{
AnnaBridge 170:e95d10626187 80 * @defgroup EFM32GG11B_CSEN_BitFields CSEN Bit Fields
AnnaBridge 170:e95d10626187 81 * @{
AnnaBridge 170:e95d10626187 82 *****************************************************************************/
AnnaBridge 170:e95d10626187 83
AnnaBridge 170:e95d10626187 84 /* Bit fields for CSEN CTRL */
AnnaBridge 170:e95d10626187 85 #define _CSEN_CTRL_RESETVALUE 0x00030000UL /**< Default value for CSEN_CTRL */
AnnaBridge 170:e95d10626187 86 #define _CSEN_CTRL_MASK 0x1FFFF336UL /**< Mask for CSEN_CTRL */
AnnaBridge 170:e95d10626187 87 #define CSEN_CTRL_EN (0x1UL << 1) /**< CSEN Enable */
AnnaBridge 170:e95d10626187 88 #define _CSEN_CTRL_EN_SHIFT 1 /**< Shift value for CSEN_EN */
AnnaBridge 170:e95d10626187 89 #define _CSEN_CTRL_EN_MASK 0x2UL /**< Bit mask for CSEN_EN */
AnnaBridge 170:e95d10626187 90 #define _CSEN_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 91 #define _CSEN_CTRL_EN_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 92 #define _CSEN_CTRL_EN_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 93 #define CSEN_CTRL_EN_DEFAULT (_CSEN_CTRL_EN_DEFAULT << 1) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 94 #define CSEN_CTRL_EN_DISABLE (_CSEN_CTRL_EN_DISABLE << 1) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 95 #define CSEN_CTRL_EN_ENABLE (_CSEN_CTRL_EN_ENABLE << 1) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 96 #define CSEN_CTRL_CMPPOL (0x1UL << 2) /**< CSEN Digital Comparator Polarity Select */
AnnaBridge 170:e95d10626187 97 #define _CSEN_CTRL_CMPPOL_SHIFT 2 /**< Shift value for CSEN_CMPPOL */
AnnaBridge 170:e95d10626187 98 #define _CSEN_CTRL_CMPPOL_MASK 0x4UL /**< Bit mask for CSEN_CMPPOL */
AnnaBridge 170:e95d10626187 99 #define _CSEN_CTRL_CMPPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 100 #define _CSEN_CTRL_CMPPOL_GT 0x00000000UL /**< Mode GT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 101 #define _CSEN_CTRL_CMPPOL_LTE 0x00000001UL /**< Mode LTE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 102 #define CSEN_CTRL_CMPPOL_DEFAULT (_CSEN_CTRL_CMPPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 103 #define CSEN_CTRL_CMPPOL_GT (_CSEN_CTRL_CMPPOL_GT << 2) /**< Shifted mode GT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 104 #define CSEN_CTRL_CMPPOL_LTE (_CSEN_CTRL_CMPPOL_LTE << 2) /**< Shifted mode LTE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 105 #define _CSEN_CTRL_CM_SHIFT 4 /**< Shift value for CSEN_CM */
AnnaBridge 170:e95d10626187 106 #define _CSEN_CTRL_CM_MASK 0x30UL /**< Bit mask for CSEN_CM */
AnnaBridge 170:e95d10626187 107 #define _CSEN_CTRL_CM_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 108 #define _CSEN_CTRL_CM_SGL 0x00000000UL /**< Mode SGL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 109 #define _CSEN_CTRL_CM_SCAN 0x00000001UL /**< Mode SCAN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 110 #define _CSEN_CTRL_CM_CONTSGL 0x00000002UL /**< Mode CONTSGL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 111 #define _CSEN_CTRL_CM_CONTSCAN 0x00000003UL /**< Mode CONTSCAN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 112 #define CSEN_CTRL_CM_DEFAULT (_CSEN_CTRL_CM_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 113 #define CSEN_CTRL_CM_SGL (_CSEN_CTRL_CM_SGL << 4) /**< Shifted mode SGL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 114 #define CSEN_CTRL_CM_SCAN (_CSEN_CTRL_CM_SCAN << 4) /**< Shifted mode SCAN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 115 #define CSEN_CTRL_CM_CONTSGL (_CSEN_CTRL_CM_CONTSGL << 4) /**< Shifted mode CONTSGL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 116 #define CSEN_CTRL_CM_CONTSCAN (_CSEN_CTRL_CM_CONTSCAN << 4) /**< Shifted mode CONTSCAN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 117 #define _CSEN_CTRL_SARCR_SHIFT 8 /**< Shift value for CSEN_SARCR */
AnnaBridge 170:e95d10626187 118 #define _CSEN_CTRL_SARCR_MASK 0x300UL /**< Bit mask for CSEN_SARCR */
AnnaBridge 170:e95d10626187 119 #define _CSEN_CTRL_SARCR_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 120 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL /**< Mode CLK10 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 121 #define _CSEN_CTRL_SARCR_CLK12 0x00000001UL /**< Mode CLK12 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 122 #define _CSEN_CTRL_SARCR_CLK14 0x00000002UL /**< Mode CLK14 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 123 #define _CSEN_CTRL_SARCR_CLK16 0x00000003UL /**< Mode CLK16 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 124 #define CSEN_CTRL_SARCR_DEFAULT (_CSEN_CTRL_SARCR_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 125 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) /**< Shifted mode CLK10 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 126 #define CSEN_CTRL_SARCR_CLK12 (_CSEN_CTRL_SARCR_CLK12 << 8) /**< Shifted mode CLK12 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 127 #define CSEN_CTRL_SARCR_CLK14 (_CSEN_CTRL_SARCR_CLK14 << 8) /**< Shifted mode CLK14 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 128 #define CSEN_CTRL_SARCR_CLK16 (_CSEN_CTRL_SARCR_CLK16 << 8) /**< Shifted mode CLK16 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 129 #define _CSEN_CTRL_ACU_SHIFT 12 /**< Shift value for CSEN_ACU */
AnnaBridge 170:e95d10626187 130 #define _CSEN_CTRL_ACU_MASK 0x7000UL /**< Bit mask for CSEN_ACU */
AnnaBridge 170:e95d10626187 131 #define _CSEN_CTRL_ACU_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 132 #define _CSEN_CTRL_ACU_ACC1 0x00000000UL /**< Mode ACC1 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 133 #define _CSEN_CTRL_ACU_ACC2 0x00000001UL /**< Mode ACC2 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 134 #define _CSEN_CTRL_ACU_ACC4 0x00000002UL /**< Mode ACC4 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 135 #define _CSEN_CTRL_ACU_ACC8 0x00000003UL /**< Mode ACC8 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 136 #define _CSEN_CTRL_ACU_ACC16 0x00000004UL /**< Mode ACC16 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 137 #define _CSEN_CTRL_ACU_ACC32 0x00000005UL /**< Mode ACC32 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 138 #define _CSEN_CTRL_ACU_ACC64 0x00000006UL /**< Mode ACC64 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 139 #define CSEN_CTRL_ACU_DEFAULT (_CSEN_CTRL_ACU_DEFAULT << 12) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 140 #define CSEN_CTRL_ACU_ACC1 (_CSEN_CTRL_ACU_ACC1 << 12) /**< Shifted mode ACC1 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 141 #define CSEN_CTRL_ACU_ACC2 (_CSEN_CTRL_ACU_ACC2 << 12) /**< Shifted mode ACC2 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 142 #define CSEN_CTRL_ACU_ACC4 (_CSEN_CTRL_ACU_ACC4 << 12) /**< Shifted mode ACC4 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 143 #define CSEN_CTRL_ACU_ACC8 (_CSEN_CTRL_ACU_ACC8 << 12) /**< Shifted mode ACC8 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 144 #define CSEN_CTRL_ACU_ACC16 (_CSEN_CTRL_ACU_ACC16 << 12) /**< Shifted mode ACC16 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 145 #define CSEN_CTRL_ACU_ACC32 (_CSEN_CTRL_ACU_ACC32 << 12) /**< Shifted mode ACC32 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 146 #define CSEN_CTRL_ACU_ACC64 (_CSEN_CTRL_ACU_ACC64 << 12) /**< Shifted mode ACC64 for CSEN_CTRL */
AnnaBridge 170:e95d10626187 147 #define CSEN_CTRL_MCEN (0x1UL << 15) /**< CSEN Multiple Channel Enable. */
AnnaBridge 170:e95d10626187 148 #define _CSEN_CTRL_MCEN_SHIFT 15 /**< Shift value for CSEN_MCEN */
AnnaBridge 170:e95d10626187 149 #define _CSEN_CTRL_MCEN_MASK 0x8000UL /**< Bit mask for CSEN_MCEN */
AnnaBridge 170:e95d10626187 150 #define _CSEN_CTRL_MCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 151 #define _CSEN_CTRL_MCEN_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 152 #define _CSEN_CTRL_MCEN_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 153 #define CSEN_CTRL_MCEN_DEFAULT (_CSEN_CTRL_MCEN_DEFAULT << 15) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 154 #define CSEN_CTRL_MCEN_DISABLE (_CSEN_CTRL_MCEN_DISABLE << 15) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 155 #define CSEN_CTRL_MCEN_ENABLE (_CSEN_CTRL_MCEN_ENABLE << 15) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 156 #define _CSEN_CTRL_STM_SHIFT 16 /**< Shift value for CSEN_STM */
AnnaBridge 170:e95d10626187 157 #define _CSEN_CTRL_STM_MASK 0x30000UL /**< Bit mask for CSEN_STM */
AnnaBridge 170:e95d10626187 158 #define _CSEN_CTRL_STM_PRS 0x00000000UL /**< Mode PRS for CSEN_CTRL */
AnnaBridge 170:e95d10626187 159 #define _CSEN_CTRL_STM_TIMER 0x00000001UL /**< Mode TIMER for CSEN_CTRL */
AnnaBridge 170:e95d10626187 160 #define _CSEN_CTRL_STM_START 0x00000002UL /**< Mode START for CSEN_CTRL */
AnnaBridge 170:e95d10626187 161 #define _CSEN_CTRL_STM_DEFAULT 0x00000003UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 162 #define _CSEN_CTRL_STM_DEFAULT 0x00000003UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 163 #define CSEN_CTRL_STM_PRS (_CSEN_CTRL_STM_PRS << 16) /**< Shifted mode PRS for CSEN_CTRL */
AnnaBridge 170:e95d10626187 164 #define CSEN_CTRL_STM_TIMER (_CSEN_CTRL_STM_TIMER << 16) /**< Shifted mode TIMER for CSEN_CTRL */
AnnaBridge 170:e95d10626187 165 #define CSEN_CTRL_STM_START (_CSEN_CTRL_STM_START << 16) /**< Shifted mode START for CSEN_CTRL */
AnnaBridge 170:e95d10626187 166 #define CSEN_CTRL_STM_DEFAULT (_CSEN_CTRL_STM_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 167 #define CSEN_CTRL_STM_DEFAULT (_CSEN_CTRL_STM_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 168 #define CSEN_CTRL_CMPEN (0x1UL << 18) /**< CSEN Digital Comparator Enable */
AnnaBridge 170:e95d10626187 169 #define _CSEN_CTRL_CMPEN_SHIFT 18 /**< Shift value for CSEN_CMPEN */
AnnaBridge 170:e95d10626187 170 #define _CSEN_CTRL_CMPEN_MASK 0x40000UL /**< Bit mask for CSEN_CMPEN */
AnnaBridge 170:e95d10626187 171 #define _CSEN_CTRL_CMPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 172 #define _CSEN_CTRL_CMPEN_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 173 #define _CSEN_CTRL_CMPEN_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 174 #define CSEN_CTRL_CMPEN_DEFAULT (_CSEN_CTRL_CMPEN_DEFAULT << 18) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 175 #define CSEN_CTRL_CMPEN_DISABLE (_CSEN_CTRL_CMPEN_DISABLE << 18) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 176 #define CSEN_CTRL_CMPEN_ENABLE (_CSEN_CTRL_CMPEN_ENABLE << 18) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 177 #define CSEN_CTRL_DRSF (0x1UL << 19) /**< CSEN Disable Right-Shift */
AnnaBridge 170:e95d10626187 178 #define _CSEN_CTRL_DRSF_SHIFT 19 /**< Shift value for CSEN_DRSF */
AnnaBridge 170:e95d10626187 179 #define _CSEN_CTRL_DRSF_MASK 0x80000UL /**< Bit mask for CSEN_DRSF */
AnnaBridge 170:e95d10626187 180 #define _CSEN_CTRL_DRSF_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 181 #define _CSEN_CTRL_DRSF_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 182 #define _CSEN_CTRL_DRSF_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 183 #define CSEN_CTRL_DRSF_DEFAULT (_CSEN_CTRL_DRSF_DEFAULT << 19) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 184 #define CSEN_CTRL_DRSF_DISABLE (_CSEN_CTRL_DRSF_DISABLE << 19) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 185 #define CSEN_CTRL_DRSF_ENABLE (_CSEN_CTRL_DRSF_ENABLE << 19) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 186 #define CSEN_CTRL_DMAEN (0x1UL << 20) /**< CSEN DMA Enable Bit. */
AnnaBridge 170:e95d10626187 187 #define _CSEN_CTRL_DMAEN_SHIFT 20 /**< Shift value for CSEN_DMAEN */
AnnaBridge 170:e95d10626187 188 #define _CSEN_CTRL_DMAEN_MASK 0x100000UL /**< Bit mask for CSEN_DMAEN */
AnnaBridge 170:e95d10626187 189 #define _CSEN_CTRL_DMAEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 190 #define _CSEN_CTRL_DMAEN_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 191 #define _CSEN_CTRL_DMAEN_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 192 #define CSEN_CTRL_DMAEN_DEFAULT (_CSEN_CTRL_DMAEN_DEFAULT << 20) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 193 #define CSEN_CTRL_DMAEN_DISABLE (_CSEN_CTRL_DMAEN_DISABLE << 20) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 194 #define CSEN_CTRL_DMAEN_ENABLE (_CSEN_CTRL_DMAEN_ENABLE << 20) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 195 #define CSEN_CTRL_CONVSEL (0x1UL << 21) /**< CSEN Converter Select */
AnnaBridge 170:e95d10626187 196 #define _CSEN_CTRL_CONVSEL_SHIFT 21 /**< Shift value for CSEN_CONVSEL */
AnnaBridge 170:e95d10626187 197 #define _CSEN_CTRL_CONVSEL_MASK 0x200000UL /**< Bit mask for CSEN_CONVSEL */
AnnaBridge 170:e95d10626187 198 #define _CSEN_CTRL_CONVSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 199 #define _CSEN_CTRL_CONVSEL_SAR 0x00000000UL /**< Mode SAR for CSEN_CTRL */
AnnaBridge 170:e95d10626187 200 #define _CSEN_CTRL_CONVSEL_DM 0x00000001UL /**< Mode DM for CSEN_CTRL */
AnnaBridge 170:e95d10626187 201 #define CSEN_CTRL_CONVSEL_DEFAULT (_CSEN_CTRL_CONVSEL_DEFAULT << 21) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 202 #define CSEN_CTRL_CONVSEL_SAR (_CSEN_CTRL_CONVSEL_SAR << 21) /**< Shifted mode SAR for CSEN_CTRL */
AnnaBridge 170:e95d10626187 203 #define CSEN_CTRL_CONVSEL_DM (_CSEN_CTRL_CONVSEL_DM << 21) /**< Shifted mode DM for CSEN_CTRL */
AnnaBridge 170:e95d10626187 204 #define CSEN_CTRL_CHOPEN (0x1UL << 22) /**< CSEN Chop Enable */
AnnaBridge 170:e95d10626187 205 #define _CSEN_CTRL_CHOPEN_SHIFT 22 /**< Shift value for CSEN_CHOPEN */
AnnaBridge 170:e95d10626187 206 #define _CSEN_CTRL_CHOPEN_MASK 0x400000UL /**< Bit mask for CSEN_CHOPEN */
AnnaBridge 170:e95d10626187 207 #define _CSEN_CTRL_CHOPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 208 #define _CSEN_CTRL_CHOPEN_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 209 #define _CSEN_CTRL_CHOPEN_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 210 #define CSEN_CTRL_CHOPEN_DEFAULT (_CSEN_CTRL_CHOPEN_DEFAULT << 22) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 211 #define CSEN_CTRL_CHOPEN_DISABLE (_CSEN_CTRL_CHOPEN_DISABLE << 22) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 212 #define CSEN_CTRL_CHOPEN_ENABLE (_CSEN_CTRL_CHOPEN_ENABLE << 22) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 213 #define CSEN_CTRL_AUTOGND (0x1UL << 23) /**< CSEN Automatic Ground Enable */
AnnaBridge 170:e95d10626187 214 #define _CSEN_CTRL_AUTOGND_SHIFT 23 /**< Shift value for CSEN_AUTOGND */
AnnaBridge 170:e95d10626187 215 #define _CSEN_CTRL_AUTOGND_MASK 0x800000UL /**< Bit mask for CSEN_AUTOGND */
AnnaBridge 170:e95d10626187 216 #define _CSEN_CTRL_AUTOGND_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 217 #define _CSEN_CTRL_AUTOGND_DISABLE 0x00000000UL /**< Mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 218 #define _CSEN_CTRL_AUTOGND_ENABLE 0x00000001UL /**< Mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 219 #define CSEN_CTRL_AUTOGND_DEFAULT (_CSEN_CTRL_AUTOGND_DEFAULT << 23) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 220 #define CSEN_CTRL_AUTOGND_DISABLE (_CSEN_CTRL_AUTOGND_DISABLE << 23) /**< Shifted mode DISABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 221 #define CSEN_CTRL_AUTOGND_ENABLE (_CSEN_CTRL_AUTOGND_ENABLE << 23) /**< Shifted mode ENABLE for CSEN_CTRL */
AnnaBridge 170:e95d10626187 222 #define CSEN_CTRL_MXUC (0x1UL << 24) /**< CSEN Mux Disconnect. */
AnnaBridge 170:e95d10626187 223 #define _CSEN_CTRL_MXUC_SHIFT 24 /**< Shift value for CSEN_MXUC */
AnnaBridge 170:e95d10626187 224 #define _CSEN_CTRL_MXUC_MASK 0x1000000UL /**< Bit mask for CSEN_MXUC */
AnnaBridge 170:e95d10626187 225 #define _CSEN_CTRL_MXUC_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 226 #define _CSEN_CTRL_MXUC_CONN 0x00000000UL /**< Mode CONN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 227 #define _CSEN_CTRL_MXUC_UNC 0x00000001UL /**< Mode UNC for CSEN_CTRL */
AnnaBridge 170:e95d10626187 228 #define CSEN_CTRL_MXUC_DEFAULT (_CSEN_CTRL_MXUC_DEFAULT << 24) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 229 #define CSEN_CTRL_MXUC_CONN (_CSEN_CTRL_MXUC_CONN << 24) /**< Shifted mode CONN for CSEN_CTRL */
AnnaBridge 170:e95d10626187 230 #define CSEN_CTRL_MXUC_UNC (_CSEN_CTRL_MXUC_UNC << 24) /**< Shifted mode UNC for CSEN_CTRL */
AnnaBridge 170:e95d10626187 231 #define CSEN_CTRL_EMACMPEN (0x1UL << 25) /**< Greater and less than comparison using the exponential moving average (EMA) is enabled. */
AnnaBridge 170:e95d10626187 232 #define _CSEN_CTRL_EMACMPEN_SHIFT 25 /**< Shift value for CSEN_EMACMPEN */
AnnaBridge 170:e95d10626187 233 #define _CSEN_CTRL_EMACMPEN_MASK 0x2000000UL /**< Bit mask for CSEN_EMACMPEN */
AnnaBridge 170:e95d10626187 234 #define _CSEN_CTRL_EMACMPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 235 #define CSEN_CTRL_EMACMPEN_DEFAULT (_CSEN_CTRL_EMACMPEN_DEFAULT << 25) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 236 #define CSEN_CTRL_WARMUPMODE (0x1UL << 26) /**< Select Warmup mode for CSEN */
AnnaBridge 170:e95d10626187 237 #define _CSEN_CTRL_WARMUPMODE_SHIFT 26 /**< Shift value for CSEN_WARMUPMODE */
AnnaBridge 170:e95d10626187 238 #define _CSEN_CTRL_WARMUPMODE_MASK 0x4000000UL /**< Bit mask for CSEN_WARMUPMODE */
AnnaBridge 170:e95d10626187 239 #define _CSEN_CTRL_WARMUPMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 240 #define _CSEN_CTRL_WARMUPMODE_NORMAL 0x00000000UL /**< Mode NORMAL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 241 #define _CSEN_CTRL_WARMUPMODE_KEEPCSENWARM 0x00000001UL /**< Mode KEEPCSENWARM for CSEN_CTRL */
AnnaBridge 170:e95d10626187 242 #define CSEN_CTRL_WARMUPMODE_DEFAULT (_CSEN_CTRL_WARMUPMODE_DEFAULT << 26) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 243 #define CSEN_CTRL_WARMUPMODE_NORMAL (_CSEN_CTRL_WARMUPMODE_NORMAL << 26) /**< Shifted mode NORMAL for CSEN_CTRL */
AnnaBridge 170:e95d10626187 244 #define CSEN_CTRL_WARMUPMODE_KEEPCSENWARM (_CSEN_CTRL_WARMUPMODE_KEEPCSENWARM << 26) /**< Shifted mode KEEPCSENWARM for CSEN_CTRL */
AnnaBridge 170:e95d10626187 245 #define CSEN_CTRL_LOCALSENS (0x1UL << 27) /**< Local Sensing Enable */
AnnaBridge 170:e95d10626187 246 #define _CSEN_CTRL_LOCALSENS_SHIFT 27 /**< Shift value for CSEN_LOCALSENS */
AnnaBridge 170:e95d10626187 247 #define _CSEN_CTRL_LOCALSENS_MASK 0x8000000UL /**< Bit mask for CSEN_LOCALSENS */
AnnaBridge 170:e95d10626187 248 #define _CSEN_CTRL_LOCALSENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 249 #define CSEN_CTRL_LOCALSENS_DEFAULT (_CSEN_CTRL_LOCALSENS_DEFAULT << 27) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 250 #define CSEN_CTRL_CPACCURACY (0x1UL << 28) /**< Charge Pump Accuracy */
AnnaBridge 170:e95d10626187 251 #define _CSEN_CTRL_CPACCURACY_SHIFT 28 /**< Shift value for CSEN_CPACCURACY */
AnnaBridge 170:e95d10626187 252 #define _CSEN_CTRL_CPACCURACY_MASK 0x10000000UL /**< Bit mask for CSEN_CPACCURACY */
AnnaBridge 170:e95d10626187 253 #define _CSEN_CTRL_CPACCURACY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 254 #define _CSEN_CTRL_CPACCURACY_LO 0x00000000UL /**< Mode LO for CSEN_CTRL */
AnnaBridge 170:e95d10626187 255 #define _CSEN_CTRL_CPACCURACY_HI 0x00000001UL /**< Mode HI for CSEN_CTRL */
AnnaBridge 170:e95d10626187 256 #define CSEN_CTRL_CPACCURACY_DEFAULT (_CSEN_CTRL_CPACCURACY_DEFAULT << 28) /**< Shifted mode DEFAULT for CSEN_CTRL */
AnnaBridge 170:e95d10626187 257 #define CSEN_CTRL_CPACCURACY_LO (_CSEN_CTRL_CPACCURACY_LO << 28) /**< Shifted mode LO for CSEN_CTRL */
AnnaBridge 170:e95d10626187 258 #define CSEN_CTRL_CPACCURACY_HI (_CSEN_CTRL_CPACCURACY_HI << 28) /**< Shifted mode HI for CSEN_CTRL */
AnnaBridge 170:e95d10626187 259
AnnaBridge 170:e95d10626187 260 /* Bit fields for CSEN TIMCTRL */
AnnaBridge 170:e95d10626187 261 #define _CSEN_TIMCTRL_RESETVALUE 0x00000000UL /**< Default value for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 262 #define _CSEN_TIMCTRL_MASK 0x0003FF07UL /**< Mask for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 263 #define _CSEN_TIMCTRL_PCPRESC_SHIFT 0 /**< Shift value for CSEN_PCPRESC */
AnnaBridge 170:e95d10626187 264 #define _CSEN_TIMCTRL_PCPRESC_MASK 0x7UL /**< Bit mask for CSEN_PCPRESC */
AnnaBridge 170:e95d10626187 265 #define _CSEN_TIMCTRL_PCPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 266 #define _CSEN_TIMCTRL_PCPRESC_DIV1 0x00000000UL /**< Mode DIV1 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 267 #define _CSEN_TIMCTRL_PCPRESC_DIV2 0x00000001UL /**< Mode DIV2 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 268 #define _CSEN_TIMCTRL_PCPRESC_DIV4 0x00000002UL /**< Mode DIV4 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 269 #define _CSEN_TIMCTRL_PCPRESC_DIV8 0x00000003UL /**< Mode DIV8 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 270 #define _CSEN_TIMCTRL_PCPRESC_DIV16 0x00000004UL /**< Mode DIV16 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 271 #define _CSEN_TIMCTRL_PCPRESC_DIV32 0x00000005UL /**< Mode DIV32 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 272 #define _CSEN_TIMCTRL_PCPRESC_DIV64 0x00000006UL /**< Mode DIV64 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 273 #define _CSEN_TIMCTRL_PCPRESC_DIV128 0x00000007UL /**< Mode DIV128 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 274 #define CSEN_TIMCTRL_PCPRESC_DEFAULT (_CSEN_TIMCTRL_PCPRESC_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 275 #define CSEN_TIMCTRL_PCPRESC_DIV1 (_CSEN_TIMCTRL_PCPRESC_DIV1 << 0) /**< Shifted mode DIV1 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 276 #define CSEN_TIMCTRL_PCPRESC_DIV2 (_CSEN_TIMCTRL_PCPRESC_DIV2 << 0) /**< Shifted mode DIV2 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 277 #define CSEN_TIMCTRL_PCPRESC_DIV4 (_CSEN_TIMCTRL_PCPRESC_DIV4 << 0) /**< Shifted mode DIV4 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 278 #define CSEN_TIMCTRL_PCPRESC_DIV8 (_CSEN_TIMCTRL_PCPRESC_DIV8 << 0) /**< Shifted mode DIV8 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 279 #define CSEN_TIMCTRL_PCPRESC_DIV16 (_CSEN_TIMCTRL_PCPRESC_DIV16 << 0) /**< Shifted mode DIV16 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 280 #define CSEN_TIMCTRL_PCPRESC_DIV32 (_CSEN_TIMCTRL_PCPRESC_DIV32 << 0) /**< Shifted mode DIV32 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 281 #define CSEN_TIMCTRL_PCPRESC_DIV64 (_CSEN_TIMCTRL_PCPRESC_DIV64 << 0) /**< Shifted mode DIV64 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 282 #define CSEN_TIMCTRL_PCPRESC_DIV128 (_CSEN_TIMCTRL_PCPRESC_DIV128 << 0) /**< Shifted mode DIV128 for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 283 #define _CSEN_TIMCTRL_PCTOP_SHIFT 8 /**< Shift value for CSEN_PCTOP */
AnnaBridge 170:e95d10626187 284 #define _CSEN_TIMCTRL_PCTOP_MASK 0xFF00UL /**< Bit mask for CSEN_PCTOP */
AnnaBridge 170:e95d10626187 285 #define _CSEN_TIMCTRL_PCTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 286 #define CSEN_TIMCTRL_PCTOP_DEFAULT (_CSEN_TIMCTRL_PCTOP_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 287 #define _CSEN_TIMCTRL_WARMUPCNT_SHIFT 16 /**< Shift value for CSEN_WARMUPCNT */
AnnaBridge 170:e95d10626187 288 #define _CSEN_TIMCTRL_WARMUPCNT_MASK 0x30000UL /**< Bit mask for CSEN_WARMUPCNT */
AnnaBridge 170:e95d10626187 289 #define _CSEN_TIMCTRL_WARMUPCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 290 #define CSEN_TIMCTRL_WARMUPCNT_DEFAULT (_CSEN_TIMCTRL_WARMUPCNT_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_TIMCTRL */
AnnaBridge 170:e95d10626187 291
AnnaBridge 170:e95d10626187 292 /* Bit fields for CSEN CMD */
AnnaBridge 170:e95d10626187 293 #define _CSEN_CMD_RESETVALUE 0x00000000UL /**< Default value for CSEN_CMD */
AnnaBridge 170:e95d10626187 294 #define _CSEN_CMD_MASK 0x00000001UL /**< Mask for CSEN_CMD */
AnnaBridge 170:e95d10626187 295 #define CSEN_CMD_START (0x1UL << 0) /**< Start Software-Triggered Conversions */
AnnaBridge 170:e95d10626187 296 #define _CSEN_CMD_START_SHIFT 0 /**< Shift value for CSEN_START */
AnnaBridge 170:e95d10626187 297 #define _CSEN_CMD_START_MASK 0x1UL /**< Bit mask for CSEN_START */
AnnaBridge 170:e95d10626187 298 #define _CSEN_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CMD */
AnnaBridge 170:e95d10626187 299 #define CSEN_CMD_START_DEFAULT (_CSEN_CMD_START_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_CMD */
AnnaBridge 170:e95d10626187 300
AnnaBridge 170:e95d10626187 301 /* Bit fields for CSEN STATUS */
AnnaBridge 170:e95d10626187 302 #define _CSEN_STATUS_RESETVALUE 0x00000000UL /**< Default value for CSEN_STATUS */
AnnaBridge 170:e95d10626187 303 #define _CSEN_STATUS_MASK 0x00000001UL /**< Mask for CSEN_STATUS */
AnnaBridge 170:e95d10626187 304 #define CSEN_STATUS_CSENBUSY (0x1UL << 0) /**< Busy Flag */
AnnaBridge 170:e95d10626187 305 #define _CSEN_STATUS_CSENBUSY_SHIFT 0 /**< Shift value for CSEN_CSENBUSY */
AnnaBridge 170:e95d10626187 306 #define _CSEN_STATUS_CSENBUSY_MASK 0x1UL /**< Bit mask for CSEN_CSENBUSY */
AnnaBridge 170:e95d10626187 307 #define _CSEN_STATUS_CSENBUSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_STATUS */
AnnaBridge 170:e95d10626187 308 #define _CSEN_STATUS_CSENBUSY_IDLE 0x00000000UL /**< Mode IDLE for CSEN_STATUS */
AnnaBridge 170:e95d10626187 309 #define _CSEN_STATUS_CSENBUSY_BUSY 0x00000001UL /**< Mode BUSY for CSEN_STATUS */
AnnaBridge 170:e95d10626187 310 #define CSEN_STATUS_CSENBUSY_DEFAULT (_CSEN_STATUS_CSENBUSY_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_STATUS */
AnnaBridge 170:e95d10626187 311 #define CSEN_STATUS_CSENBUSY_IDLE (_CSEN_STATUS_CSENBUSY_IDLE << 0) /**< Shifted mode IDLE for CSEN_STATUS */
AnnaBridge 170:e95d10626187 312 #define CSEN_STATUS_CSENBUSY_BUSY (_CSEN_STATUS_CSENBUSY_BUSY << 0) /**< Shifted mode BUSY for CSEN_STATUS */
AnnaBridge 170:e95d10626187 313
AnnaBridge 170:e95d10626187 314 /* Bit fields for CSEN PRSSEL */
AnnaBridge 170:e95d10626187 315 #define _CSEN_PRSSEL_RESETVALUE 0x00000000UL /**< Default value for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 316 #define _CSEN_PRSSEL_MASK 0x0000001FUL /**< Mask for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 317 #define _CSEN_PRSSEL_PRSSEL_SHIFT 0 /**< Shift value for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 318 #define _CSEN_PRSSEL_PRSSEL_MASK 0x1FUL /**< Bit mask for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 319 #define _CSEN_PRSSEL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 320 #define _CSEN_PRSSEL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 321 #define _CSEN_PRSSEL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 322 #define _CSEN_PRSSEL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 323 #define _CSEN_PRSSEL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 324 #define _CSEN_PRSSEL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 325 #define _CSEN_PRSSEL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 326 #define _CSEN_PRSSEL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 327 #define _CSEN_PRSSEL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 328 #define _CSEN_PRSSEL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 329 #define _CSEN_PRSSEL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 330 #define _CSEN_PRSSEL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 331 #define _CSEN_PRSSEL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 332 #define _CSEN_PRSSEL_PRSSEL_PRSCH12 0x0000000CUL /**< Mode PRSCH12 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 333 #define _CSEN_PRSSEL_PRSSEL_PRSCH13 0x0000000DUL /**< Mode PRSCH13 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 334 #define _CSEN_PRSSEL_PRSSEL_PRSCH14 0x0000000EUL /**< Mode PRSCH14 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 335 #define _CSEN_PRSSEL_PRSSEL_PRSCH15 0x0000000FUL /**< Mode PRSCH15 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 336 #define _CSEN_PRSSEL_PRSSEL_PRSCH16 0x00000010UL /**< Mode PRSCH16 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 337 #define _CSEN_PRSSEL_PRSSEL_PRSCH17 0x00000011UL /**< Mode PRSCH17 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 338 #define _CSEN_PRSSEL_PRSSEL_PRSCH18 0x00000012UL /**< Mode PRSCH18 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 339 #define _CSEN_PRSSEL_PRSSEL_PRSCH19 0x00000013UL /**< Mode PRSCH19 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 340 #define _CSEN_PRSSEL_PRSSEL_PRSCH20 0x00000014UL /**< Mode PRSCH20 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 341 #define _CSEN_PRSSEL_PRSSEL_PRSCH21 0x00000015UL /**< Mode PRSCH21 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 342 #define _CSEN_PRSSEL_PRSSEL_PRSCH22 0x00000016UL /**< Mode PRSCH22 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 343 #define _CSEN_PRSSEL_PRSSEL_PRSCH23 0x00000017UL /**< Mode PRSCH23 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 344 #define CSEN_PRSSEL_PRSSEL_DEFAULT (_CSEN_PRSSEL_PRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 345 #define CSEN_PRSSEL_PRSSEL_PRSCH0 (_CSEN_PRSSEL_PRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 346 #define CSEN_PRSSEL_PRSSEL_PRSCH1 (_CSEN_PRSSEL_PRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 347 #define CSEN_PRSSEL_PRSSEL_PRSCH2 (_CSEN_PRSSEL_PRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 348 #define CSEN_PRSSEL_PRSSEL_PRSCH3 (_CSEN_PRSSEL_PRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 349 #define CSEN_PRSSEL_PRSSEL_PRSCH4 (_CSEN_PRSSEL_PRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 350 #define CSEN_PRSSEL_PRSSEL_PRSCH5 (_CSEN_PRSSEL_PRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 351 #define CSEN_PRSSEL_PRSSEL_PRSCH6 (_CSEN_PRSSEL_PRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 352 #define CSEN_PRSSEL_PRSSEL_PRSCH7 (_CSEN_PRSSEL_PRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 353 #define CSEN_PRSSEL_PRSSEL_PRSCH8 (_CSEN_PRSSEL_PRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 354 #define CSEN_PRSSEL_PRSSEL_PRSCH9 (_CSEN_PRSSEL_PRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 355 #define CSEN_PRSSEL_PRSSEL_PRSCH10 (_CSEN_PRSSEL_PRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 356 #define CSEN_PRSSEL_PRSSEL_PRSCH11 (_CSEN_PRSSEL_PRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 357 #define CSEN_PRSSEL_PRSSEL_PRSCH12 (_CSEN_PRSSEL_PRSSEL_PRSCH12 << 0) /**< Shifted mode PRSCH12 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 358 #define CSEN_PRSSEL_PRSSEL_PRSCH13 (_CSEN_PRSSEL_PRSSEL_PRSCH13 << 0) /**< Shifted mode PRSCH13 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 359 #define CSEN_PRSSEL_PRSSEL_PRSCH14 (_CSEN_PRSSEL_PRSSEL_PRSCH14 << 0) /**< Shifted mode PRSCH14 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 360 #define CSEN_PRSSEL_PRSSEL_PRSCH15 (_CSEN_PRSSEL_PRSSEL_PRSCH15 << 0) /**< Shifted mode PRSCH15 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 361 #define CSEN_PRSSEL_PRSSEL_PRSCH16 (_CSEN_PRSSEL_PRSSEL_PRSCH16 << 0) /**< Shifted mode PRSCH16 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 362 #define CSEN_PRSSEL_PRSSEL_PRSCH17 (_CSEN_PRSSEL_PRSSEL_PRSCH17 << 0) /**< Shifted mode PRSCH17 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 363 #define CSEN_PRSSEL_PRSSEL_PRSCH18 (_CSEN_PRSSEL_PRSSEL_PRSCH18 << 0) /**< Shifted mode PRSCH18 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 364 #define CSEN_PRSSEL_PRSSEL_PRSCH19 (_CSEN_PRSSEL_PRSSEL_PRSCH19 << 0) /**< Shifted mode PRSCH19 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 365 #define CSEN_PRSSEL_PRSSEL_PRSCH20 (_CSEN_PRSSEL_PRSSEL_PRSCH20 << 0) /**< Shifted mode PRSCH20 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 366 #define CSEN_PRSSEL_PRSSEL_PRSCH21 (_CSEN_PRSSEL_PRSSEL_PRSCH21 << 0) /**< Shifted mode PRSCH21 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 367 #define CSEN_PRSSEL_PRSSEL_PRSCH22 (_CSEN_PRSSEL_PRSSEL_PRSCH22 << 0) /**< Shifted mode PRSCH22 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 368 #define CSEN_PRSSEL_PRSSEL_PRSCH23 (_CSEN_PRSSEL_PRSSEL_PRSCH23 << 0) /**< Shifted mode PRSCH23 for CSEN_PRSSEL */
AnnaBridge 170:e95d10626187 369
AnnaBridge 170:e95d10626187 370 /* Bit fields for CSEN DATA */
AnnaBridge 170:e95d10626187 371 #define _CSEN_DATA_RESETVALUE 0x00000000UL /**< Default value for CSEN_DATA */
AnnaBridge 170:e95d10626187 372 #define _CSEN_DATA_MASK 0xFFFFFFFFUL /**< Mask for CSEN_DATA */
AnnaBridge 170:e95d10626187 373 #define _CSEN_DATA_DATA_SHIFT 0 /**< Shift value for CSEN_DATA */
AnnaBridge 170:e95d10626187 374 #define _CSEN_DATA_DATA_MASK 0xFFFFFFFFUL /**< Bit mask for CSEN_DATA */
AnnaBridge 170:e95d10626187 375 #define _CSEN_DATA_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DATA */
AnnaBridge 170:e95d10626187 376 #define CSEN_DATA_DATA_DEFAULT (_CSEN_DATA_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_DATA */
AnnaBridge 170:e95d10626187 377
AnnaBridge 170:e95d10626187 378 /* Bit fields for CSEN SCANMASK0 */
AnnaBridge 170:e95d10626187 379 #define _CSEN_SCANMASK0_RESETVALUE 0x00000000UL /**< Default value for CSEN_SCANMASK0 */
AnnaBridge 170:e95d10626187 380 #define _CSEN_SCANMASK0_MASK 0xFFFFFFFFUL /**< Mask for CSEN_SCANMASK0 */
AnnaBridge 170:e95d10626187 381 #define _CSEN_SCANMASK0_SCANINPUTEN_SHIFT 0 /**< Shift value for CSEN_SCANINPUTEN */
AnnaBridge 170:e95d10626187 382 #define _CSEN_SCANMASK0_SCANINPUTEN_MASK 0xFFFFFFFFUL /**< Bit mask for CSEN_SCANINPUTEN */
AnnaBridge 170:e95d10626187 383 #define _CSEN_SCANMASK0_SCANINPUTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANMASK0 */
AnnaBridge 170:e95d10626187 384 #define CSEN_SCANMASK0_SCANINPUTEN_DEFAULT (_CSEN_SCANMASK0_SCANINPUTEN_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_SCANMASK0 */
AnnaBridge 170:e95d10626187 385
AnnaBridge 170:e95d10626187 386 /* Bit fields for CSEN SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 387 #define _CSEN_SCANINPUTSEL0_RESETVALUE 0x00000000UL /**< Default value for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 388 #define _CSEN_SCANINPUTSEL0_MASK 0x0F0F0F0FUL /**< Mask for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 389 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_SHIFT 0 /**< Shift value for CSEN_INPUT0TO7SEL */
AnnaBridge 170:e95d10626187 390 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_MASK 0xFUL /**< Bit mask for CSEN_INPUT0TO7SEL */
AnnaBridge 170:e95d10626187 391 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 392 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 393 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 394 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 395 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 396 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 397 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 398 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 399 #define _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 400 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 401 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 << 0) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 402 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 << 0) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 403 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 << 0) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 404 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 << 0) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 405 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 << 0) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 406 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 << 0) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 407 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 << 0) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 408 #define CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 << 0) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 409 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_SHIFT 8 /**< Shift value for CSEN_INPUT8TO15SEL */
AnnaBridge 170:e95d10626187 410 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_MASK 0xF00UL /**< Bit mask for CSEN_INPUT8TO15SEL */
AnnaBridge 170:e95d10626187 411 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 412 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 413 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 414 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 415 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 416 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 417 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 418 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 419 #define _CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 420 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 421 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 << 8) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 422 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 << 8) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 423 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 << 8) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 424 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 << 8) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 425 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 << 8) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 426 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 << 8) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 427 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 << 8) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 428 #define CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 << 8) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 429 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_SHIFT 16 /**< Shift value for CSEN_INPUT16TO23SEL */
AnnaBridge 170:e95d10626187 430 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_MASK 0xF0000UL /**< Bit mask for CSEN_INPUT16TO23SEL */
AnnaBridge 170:e95d10626187 431 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 432 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 433 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 434 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 435 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 436 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 437 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 438 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 439 #define _CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 440 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 441 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 << 16) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 442 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 << 16) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 443 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 << 16) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 444 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 << 16) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 445 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 << 16) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 446 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 << 16) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 447 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 << 16) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 448 #define CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 << 16) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 449 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_SHIFT 24 /**< Shift value for CSEN_INPUT24TO31SEL */
AnnaBridge 170:e95d10626187 450 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_MASK 0xF000000UL /**< Bit mask for CSEN_INPUT24TO31SEL */
AnnaBridge 170:e95d10626187 451 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 452 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 453 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 454 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 455 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 456 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 457 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 458 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 459 #define _CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 460 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT << 24) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 461 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 << 24) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 462 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 << 24) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 463 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 << 24) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 464 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 << 24) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 465 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 << 24) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 466 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 << 24) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 467 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 << 24) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 468 #define CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 << 24) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL0 */
AnnaBridge 170:e95d10626187 469
AnnaBridge 170:e95d10626187 470 /* Bit fields for CSEN SCANMASK1 */
AnnaBridge 170:e95d10626187 471 #define _CSEN_SCANMASK1_RESETVALUE 0x00000000UL /**< Default value for CSEN_SCANMASK1 */
AnnaBridge 170:e95d10626187 472 #define _CSEN_SCANMASK1_MASK 0xFFFFFFFFUL /**< Mask for CSEN_SCANMASK1 */
AnnaBridge 170:e95d10626187 473 #define _CSEN_SCANMASK1_SCANINPUTEN_SHIFT 0 /**< Shift value for CSEN_SCANINPUTEN */
AnnaBridge 170:e95d10626187 474 #define _CSEN_SCANMASK1_SCANINPUTEN_MASK 0xFFFFFFFFUL /**< Bit mask for CSEN_SCANINPUTEN */
AnnaBridge 170:e95d10626187 475 #define _CSEN_SCANMASK1_SCANINPUTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANMASK1 */
AnnaBridge 170:e95d10626187 476 #define CSEN_SCANMASK1_SCANINPUTEN_DEFAULT (_CSEN_SCANMASK1_SCANINPUTEN_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_SCANMASK1 */
AnnaBridge 170:e95d10626187 477
AnnaBridge 170:e95d10626187 478 /* Bit fields for CSEN SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 479 #define _CSEN_SCANINPUTSEL1_RESETVALUE 0x00000000UL /**< Default value for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 480 #define _CSEN_SCANINPUTSEL1_MASK 0x0F0F0F0FUL /**< Mask for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 481 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_SHIFT 0 /**< Shift value for CSEN_INPUT32TO39SEL */
AnnaBridge 170:e95d10626187 482 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_MASK 0xFUL /**< Bit mask for CSEN_INPUT32TO39SEL */
AnnaBridge 170:e95d10626187 483 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 484 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 485 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 486 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 487 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 488 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 489 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 490 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 491 #define _CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 492 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 493 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 << 0) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 494 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 << 0) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 495 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 << 0) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 496 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 << 0) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 497 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 << 0) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 498 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 << 0) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 499 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 << 0) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 500 #define CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 << 0) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 501 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_SHIFT 8 /**< Shift value for CSEN_INPUT40TO47SEL */
AnnaBridge 170:e95d10626187 502 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_MASK 0xF00UL /**< Bit mask for CSEN_INPUT40TO47SEL */
AnnaBridge 170:e95d10626187 503 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 504 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 505 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 506 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 507 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 508 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 509 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 510 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 511 #define _CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 512 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 513 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 << 8) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 514 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 << 8) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 515 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 << 8) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 516 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 << 8) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 517 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 << 8) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 518 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 << 8) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 519 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 << 8) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 520 #define CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 << 8) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 521 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_SHIFT 16 /**< Shift value for CSEN_INPUT48TO55SEL */
AnnaBridge 170:e95d10626187 522 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_MASK 0xF0000UL /**< Bit mask for CSEN_INPUT48TO55SEL */
AnnaBridge 170:e95d10626187 523 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 524 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 525 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 526 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 527 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 528 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 529 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 530 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 531 #define _CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 532 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 533 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 << 16) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 534 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 << 16) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 535 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 << 16) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 536 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 << 16) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 537 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 << 16) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 538 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 << 16) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 539 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 << 16) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 540 #define CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 << 16) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 541 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_SHIFT 24 /**< Shift value for CSEN_INPUT56TO63SEL */
AnnaBridge 170:e95d10626187 542 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_MASK 0xF000000UL /**< Bit mask for CSEN_INPUT56TO63SEL */
AnnaBridge 170:e95d10626187 543 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 544 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 0x00000004UL /**< Mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 545 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 0x00000005UL /**< Mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 546 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 0x00000006UL /**< Mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 547 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 0x00000007UL /**< Mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 548 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 0x0000000CUL /**< Mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 549 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 0x0000000DUL /**< Mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 550 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 0x0000000EUL /**< Mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 551 #define _CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 0x0000000FUL /**< Mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 552 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT << 24) /**< Shifted mode DEFAULT for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 553 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 << 24) /**< Shifted mode APORT1CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 554 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 << 24) /**< Shifted mode APORT1CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 555 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 << 24) /**< Shifted mode APORT1CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 556 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 << 24) /**< Shifted mode APORT1CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 557 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 << 24) /**< Shifted mode APORT3CH0TO7 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 558 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 << 24) /**< Shifted mode APORT3CH8TO15 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 559 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 << 24) /**< Shifted mode APORT3CH16TO23 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 560 #define CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 << 24) /**< Shifted mode APORT3CH24TO31 for CSEN_SCANINPUTSEL1 */
AnnaBridge 170:e95d10626187 561
AnnaBridge 170:e95d10626187 562 /* Bit fields for CSEN APORTREQ */
AnnaBridge 170:e95d10626187 563 #define _CSEN_APORTREQ_RESETVALUE 0x00000000UL /**< Default value for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 564 #define _CSEN_APORTREQ_MASK 0x000003FCUL /**< Mask for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 565 #define CSEN_APORTREQ_APORT1XREQ (0x1UL << 2) /**< 1 if the bus connected to APORT2X is requested */
AnnaBridge 170:e95d10626187 566 #define _CSEN_APORTREQ_APORT1XREQ_SHIFT 2 /**< Shift value for CSEN_APORT1XREQ */
AnnaBridge 170:e95d10626187 567 #define _CSEN_APORTREQ_APORT1XREQ_MASK 0x4UL /**< Bit mask for CSEN_APORT1XREQ */
AnnaBridge 170:e95d10626187 568 #define _CSEN_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 569 #define CSEN_APORTREQ_APORT1XREQ_DEFAULT (_CSEN_APORTREQ_APORT1XREQ_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 570 #define CSEN_APORTREQ_APORT1YREQ (0x1UL << 3) /**< 1 if the bus connected to APORT1X is requested */
AnnaBridge 170:e95d10626187 571 #define _CSEN_APORTREQ_APORT1YREQ_SHIFT 3 /**< Shift value for CSEN_APORT1YREQ */
AnnaBridge 170:e95d10626187 572 #define _CSEN_APORTREQ_APORT1YREQ_MASK 0x8UL /**< Bit mask for CSEN_APORT1YREQ */
AnnaBridge 170:e95d10626187 573 #define _CSEN_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 574 #define CSEN_APORTREQ_APORT1YREQ_DEFAULT (_CSEN_APORTREQ_APORT1YREQ_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 575 #define CSEN_APORTREQ_APORT2XREQ (0x1UL << 4) /**< 1 if the bus connected to APORT2X is requested */
AnnaBridge 170:e95d10626187 576 #define _CSEN_APORTREQ_APORT2XREQ_SHIFT 4 /**< Shift value for CSEN_APORT2XREQ */
AnnaBridge 170:e95d10626187 577 #define _CSEN_APORTREQ_APORT2XREQ_MASK 0x10UL /**< Bit mask for CSEN_APORT2XREQ */
AnnaBridge 170:e95d10626187 578 #define _CSEN_APORTREQ_APORT2XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 579 #define CSEN_APORTREQ_APORT2XREQ_DEFAULT (_CSEN_APORTREQ_APORT2XREQ_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 580 #define CSEN_APORTREQ_APORT2YREQ (0x1UL << 5) /**< 1 if the bus connected to APORT2Y is requested */
AnnaBridge 170:e95d10626187 581 #define _CSEN_APORTREQ_APORT2YREQ_SHIFT 5 /**< Shift value for CSEN_APORT2YREQ */
AnnaBridge 170:e95d10626187 582 #define _CSEN_APORTREQ_APORT2YREQ_MASK 0x20UL /**< Bit mask for CSEN_APORT2YREQ */
AnnaBridge 170:e95d10626187 583 #define _CSEN_APORTREQ_APORT2YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 584 #define CSEN_APORTREQ_APORT2YREQ_DEFAULT (_CSEN_APORTREQ_APORT2YREQ_DEFAULT << 5) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 585 #define CSEN_APORTREQ_APORT3XREQ (0x1UL << 6) /**< 1 if the bus connected to APORT3X is requested */
AnnaBridge 170:e95d10626187 586 #define _CSEN_APORTREQ_APORT3XREQ_SHIFT 6 /**< Shift value for CSEN_APORT3XREQ */
AnnaBridge 170:e95d10626187 587 #define _CSEN_APORTREQ_APORT3XREQ_MASK 0x40UL /**< Bit mask for CSEN_APORT3XREQ */
AnnaBridge 170:e95d10626187 588 #define _CSEN_APORTREQ_APORT3XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 589 #define CSEN_APORTREQ_APORT3XREQ_DEFAULT (_CSEN_APORTREQ_APORT3XREQ_DEFAULT << 6) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 590 #define CSEN_APORTREQ_APORT3YREQ (0x1UL << 7) /**< 1 if the bus connected to APORT3Y is requested */
AnnaBridge 170:e95d10626187 591 #define _CSEN_APORTREQ_APORT3YREQ_SHIFT 7 /**< Shift value for CSEN_APORT3YREQ */
AnnaBridge 170:e95d10626187 592 #define _CSEN_APORTREQ_APORT3YREQ_MASK 0x80UL /**< Bit mask for CSEN_APORT3YREQ */
AnnaBridge 170:e95d10626187 593 #define _CSEN_APORTREQ_APORT3YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 594 #define CSEN_APORTREQ_APORT3YREQ_DEFAULT (_CSEN_APORTREQ_APORT3YREQ_DEFAULT << 7) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 595 #define CSEN_APORTREQ_APORT4XREQ (0x1UL << 8) /**< 1 if the bus connected to APORT4X is requested */
AnnaBridge 170:e95d10626187 596 #define _CSEN_APORTREQ_APORT4XREQ_SHIFT 8 /**< Shift value for CSEN_APORT4XREQ */
AnnaBridge 170:e95d10626187 597 #define _CSEN_APORTREQ_APORT4XREQ_MASK 0x100UL /**< Bit mask for CSEN_APORT4XREQ */
AnnaBridge 170:e95d10626187 598 #define _CSEN_APORTREQ_APORT4XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 599 #define CSEN_APORTREQ_APORT4XREQ_DEFAULT (_CSEN_APORTREQ_APORT4XREQ_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 600 #define CSEN_APORTREQ_APORT4YREQ (0x1UL << 9) /**< 1 if the bus connected to APORT4Y is requested */
AnnaBridge 170:e95d10626187 601 #define _CSEN_APORTREQ_APORT4YREQ_SHIFT 9 /**< Shift value for CSEN_APORT4YREQ */
AnnaBridge 170:e95d10626187 602 #define _CSEN_APORTREQ_APORT4YREQ_MASK 0x200UL /**< Bit mask for CSEN_APORT4YREQ */
AnnaBridge 170:e95d10626187 603 #define _CSEN_APORTREQ_APORT4YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 604 #define CSEN_APORTREQ_APORT4YREQ_DEFAULT (_CSEN_APORTREQ_APORT4YREQ_DEFAULT << 9) /**< Shifted mode DEFAULT for CSEN_APORTREQ */
AnnaBridge 170:e95d10626187 605
AnnaBridge 170:e95d10626187 606 /* Bit fields for CSEN APORTCONFLICT */
AnnaBridge 170:e95d10626187 607 #define _CSEN_APORTCONFLICT_RESETVALUE 0x00000000UL /**< Default value for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 608 #define _CSEN_APORTCONFLICT_MASK 0x000003FCUL /**< Mask for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 609 #define CSEN_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2) /**< 1 if the bus connected to APORT1X is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 610 #define _CSEN_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2 /**< Shift value for CSEN_APORT1XCONFLICT */
AnnaBridge 170:e95d10626187 611 #define _CSEN_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL /**< Bit mask for CSEN_APORT1XCONFLICT */
AnnaBridge 170:e95d10626187 612 #define _CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 613 #define CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 614 #define CSEN_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3) /**< 1 if the bus connected to APORT1Y is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 615 #define _CSEN_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3 /**< Shift value for CSEN_APORT1YCONFLICT */
AnnaBridge 170:e95d10626187 616 #define _CSEN_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL /**< Bit mask for CSEN_APORT1YCONFLICT */
AnnaBridge 170:e95d10626187 617 #define _CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 618 #define CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 619 #define CSEN_APORTCONFLICT_APORT2XCONFLICT (0x1UL << 4) /**< 1 if the bus connected to APORT2X is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 620 #define _CSEN_APORTCONFLICT_APORT2XCONFLICT_SHIFT 4 /**< Shift value for CSEN_APORT2XCONFLICT */
AnnaBridge 170:e95d10626187 621 #define _CSEN_APORTCONFLICT_APORT2XCONFLICT_MASK 0x10UL /**< Bit mask for CSEN_APORT2XCONFLICT */
AnnaBridge 170:e95d10626187 622 #define _CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 623 #define CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 624 #define CSEN_APORTCONFLICT_APORT2YCONFLICT (0x1UL << 5) /**< 1 if the bus connected to APORT2Y is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 625 #define _CSEN_APORTCONFLICT_APORT2YCONFLICT_SHIFT 5 /**< Shift value for CSEN_APORT2YCONFLICT */
AnnaBridge 170:e95d10626187 626 #define _CSEN_APORTCONFLICT_APORT2YCONFLICT_MASK 0x20UL /**< Bit mask for CSEN_APORT2YCONFLICT */
AnnaBridge 170:e95d10626187 627 #define _CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 628 #define CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT << 5) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 629 #define CSEN_APORTCONFLICT_APORT3XCONFLICT (0x1UL << 6) /**< 1 if the bus connected to APORT3X is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 630 #define _CSEN_APORTCONFLICT_APORT3XCONFLICT_SHIFT 6 /**< Shift value for CSEN_APORT3XCONFLICT */
AnnaBridge 170:e95d10626187 631 #define _CSEN_APORTCONFLICT_APORT3XCONFLICT_MASK 0x40UL /**< Bit mask for CSEN_APORT3XCONFLICT */
AnnaBridge 170:e95d10626187 632 #define _CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 633 #define CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT << 6) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 634 #define CSEN_APORTCONFLICT_APORT3YCONFLICT (0x1UL << 7) /**< 1 if the bus connected to APORT3Y is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 635 #define _CSEN_APORTCONFLICT_APORT3YCONFLICT_SHIFT 7 /**< Shift value for CSEN_APORT3YCONFLICT */
AnnaBridge 170:e95d10626187 636 #define _CSEN_APORTCONFLICT_APORT3YCONFLICT_MASK 0x80UL /**< Bit mask for CSEN_APORT3YCONFLICT */
AnnaBridge 170:e95d10626187 637 #define _CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 638 #define CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT << 7) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 639 #define CSEN_APORTCONFLICT_APORT4XCONFLICT (0x1UL << 8) /**< 1 if the bus connected to APORT4X is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 640 #define _CSEN_APORTCONFLICT_APORT4XCONFLICT_SHIFT 8 /**< Shift value for CSEN_APORT4XCONFLICT */
AnnaBridge 170:e95d10626187 641 #define _CSEN_APORTCONFLICT_APORT4XCONFLICT_MASK 0x100UL /**< Bit mask for CSEN_APORT4XCONFLICT */
AnnaBridge 170:e95d10626187 642 #define _CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 643 #define CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 644 #define CSEN_APORTCONFLICT_APORT4YCONFLICT (0x1UL << 9) /**< 1 if the bus connected to APORT4Y is in conflict with another peripheral */
AnnaBridge 170:e95d10626187 645 #define _CSEN_APORTCONFLICT_APORT4YCONFLICT_SHIFT 9 /**< Shift value for CSEN_APORT4YCONFLICT */
AnnaBridge 170:e95d10626187 646 #define _CSEN_APORTCONFLICT_APORT4YCONFLICT_MASK 0x200UL /**< Bit mask for CSEN_APORT4YCONFLICT */
AnnaBridge 170:e95d10626187 647 #define _CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 648 #define CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT << 9) /**< Shifted mode DEFAULT for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 649
AnnaBridge 170:e95d10626187 650 /* Bit fields for CSEN CMPTHR */
AnnaBridge 170:e95d10626187 651 #define _CSEN_CMPTHR_RESETVALUE 0x00000000UL /**< Default value for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 652 #define _CSEN_CMPTHR_MASK 0x0000FFFFUL /**< Mask for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 653 #define _CSEN_CMPTHR_CMPTHR_SHIFT 0 /**< Shift value for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 654 #define _CSEN_CMPTHR_CMPTHR_MASK 0xFFFFUL /**< Bit mask for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 655 #define _CSEN_CMPTHR_CMPTHR_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 656 #define CSEN_CMPTHR_CMPTHR_DEFAULT (_CSEN_CMPTHR_CMPTHR_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_CMPTHR */
AnnaBridge 170:e95d10626187 657
AnnaBridge 170:e95d10626187 658 /* Bit fields for CSEN EMA */
AnnaBridge 170:e95d10626187 659 #define _CSEN_EMA_RESETVALUE 0x00000000UL /**< Default value for CSEN_EMA */
AnnaBridge 170:e95d10626187 660 #define _CSEN_EMA_MASK 0x003FFFFFUL /**< Mask for CSEN_EMA */
AnnaBridge 170:e95d10626187 661 #define _CSEN_EMA_EMA_SHIFT 0 /**< Shift value for CSEN_EMA */
AnnaBridge 170:e95d10626187 662 #define _CSEN_EMA_EMA_MASK 0x3FFFFFUL /**< Bit mask for CSEN_EMA */
AnnaBridge 170:e95d10626187 663 #define _CSEN_EMA_EMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_EMA */
AnnaBridge 170:e95d10626187 664 #define CSEN_EMA_EMA_DEFAULT (_CSEN_EMA_EMA_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_EMA */
AnnaBridge 170:e95d10626187 665
AnnaBridge 170:e95d10626187 666 /* Bit fields for CSEN EMACTRL */
AnnaBridge 170:e95d10626187 667 #define _CSEN_EMACTRL_RESETVALUE 0x00000000UL /**< Default value for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 668 #define _CSEN_EMACTRL_MASK 0x00000007UL /**< Mask for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 669 #define _CSEN_EMACTRL_EMASAMPLE_SHIFT 0 /**< Shift value for CSEN_EMASAMPLE */
AnnaBridge 170:e95d10626187 670 #define _CSEN_EMACTRL_EMASAMPLE_MASK 0x7UL /**< Bit mask for CSEN_EMASAMPLE */
AnnaBridge 170:e95d10626187 671 #define _CSEN_EMACTRL_EMASAMPLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 672 #define _CSEN_EMACTRL_EMASAMPLE_W1 0x00000000UL /**< Mode W1 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 673 #define _CSEN_EMACTRL_EMASAMPLE_W2 0x00000001UL /**< Mode W2 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 674 #define _CSEN_EMACTRL_EMASAMPLE_W4 0x00000002UL /**< Mode W4 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 675 #define _CSEN_EMACTRL_EMASAMPLE_W8 0x00000003UL /**< Mode W8 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 676 #define _CSEN_EMACTRL_EMASAMPLE_W16 0x00000004UL /**< Mode W16 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 677 #define _CSEN_EMACTRL_EMASAMPLE_W32 0x00000005UL /**< Mode W32 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 678 #define _CSEN_EMACTRL_EMASAMPLE_W64 0x00000006UL /**< Mode W64 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 679 #define CSEN_EMACTRL_EMASAMPLE_DEFAULT (_CSEN_EMACTRL_EMASAMPLE_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 680 #define CSEN_EMACTRL_EMASAMPLE_W1 (_CSEN_EMACTRL_EMASAMPLE_W1 << 0) /**< Shifted mode W1 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 681 #define CSEN_EMACTRL_EMASAMPLE_W2 (_CSEN_EMACTRL_EMASAMPLE_W2 << 0) /**< Shifted mode W2 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 682 #define CSEN_EMACTRL_EMASAMPLE_W4 (_CSEN_EMACTRL_EMASAMPLE_W4 << 0) /**< Shifted mode W4 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 683 #define CSEN_EMACTRL_EMASAMPLE_W8 (_CSEN_EMACTRL_EMASAMPLE_W8 << 0) /**< Shifted mode W8 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 684 #define CSEN_EMACTRL_EMASAMPLE_W16 (_CSEN_EMACTRL_EMASAMPLE_W16 << 0) /**< Shifted mode W16 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 685 #define CSEN_EMACTRL_EMASAMPLE_W32 (_CSEN_EMACTRL_EMASAMPLE_W32 << 0) /**< Shifted mode W32 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 686 #define CSEN_EMACTRL_EMASAMPLE_W64 (_CSEN_EMACTRL_EMASAMPLE_W64 << 0) /**< Shifted mode W64 for CSEN_EMACTRL */
AnnaBridge 170:e95d10626187 687
AnnaBridge 170:e95d10626187 688 /* Bit fields for CSEN SINGLECTRL */
AnnaBridge 170:e95d10626187 689 #define _CSEN_SINGLECTRL_RESETVALUE 0x00000000UL /**< Default value for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 690 #define _CSEN_SINGLECTRL_MASK 0x000007F0UL /**< Mask for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 691 #define _CSEN_SINGLECTRL_SINGLESEL_SHIFT 4 /**< Shift value for CSEN_SINGLESEL */
AnnaBridge 170:e95d10626187 692 #define _CSEN_SINGLECTRL_SINGLESEL_MASK 0x7F0UL /**< Bit mask for CSEN_SINGLESEL */
AnnaBridge 170:e95d10626187 693 #define _CSEN_SINGLECTRL_SINGLESEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 694 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 0x00000020UL /**< Mode APORT1XCH0 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 695 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 0x00000021UL /**< Mode APORT1YCH1 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 696 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 0x00000022UL /**< Mode APORT1XCH2 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 697 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 0x00000023UL /**< Mode APORT1YCH3 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 698 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 0x00000024UL /**< Mode APORT1XCH4 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 699 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 0x00000025UL /**< Mode APORT1YCH5 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 700 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 0x00000026UL /**< Mode APORT1XCH6 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 701 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 0x00000027UL /**< Mode APORT1YCH7 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 702 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 0x00000028UL /**< Mode APORT1XCH8 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 703 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 0x00000029UL /**< Mode APORT1YCH9 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 704 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 0x0000002AUL /**< Mode APORT1XCH10 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 705 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 0x0000002BUL /**< Mode APORT1YCH11 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 706 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 0x0000002CUL /**< Mode APORT1XCH12 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 707 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 0x0000002DUL /**< Mode APORT1YCH13 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 708 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 0x0000002EUL /**< Mode APORT1XCH14 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 709 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 0x0000002FUL /**< Mode APORT1YCH15 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 710 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 0x00000030UL /**< Mode APORT1XCH16 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 711 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 0x00000031UL /**< Mode APORT1YCH17 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 712 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 0x00000032UL /**< Mode APORT1XCH18 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 713 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 0x00000033UL /**< Mode APORT1YCH19 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 714 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 0x00000034UL /**< Mode APORT1XCH20 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 715 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 0x00000035UL /**< Mode APORT1YCH21 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 716 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 0x00000036UL /**< Mode APORT1XCH22 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 717 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 0x00000037UL /**< Mode APORT1YCH23 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 718 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 0x00000038UL /**< Mode APORT1XCH24 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 719 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 0x00000039UL /**< Mode APORT1YCH25 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 720 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 0x0000003AUL /**< Mode APORT1XCH26 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 721 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 0x0000003BUL /**< Mode APORT1YCH27 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 722 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 0x0000003CUL /**< Mode APORT1XCH28 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 723 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 0x0000003DUL /**< Mode APORT1YCH29 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 724 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 0x0000003EUL /**< Mode APORT1XCH30 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 725 #define _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 0x0000003FUL /**< Mode APORT1YCH31 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 726 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 0x00000060UL /**< Mode APORT3XCH0 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 727 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 0x00000061UL /**< Mode APORT3YCH1 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 728 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 0x00000062UL /**< Mode APORT3XCH2 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 729 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 0x00000063UL /**< Mode APORT3YCH3 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 730 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 0x00000064UL /**< Mode APORT3XCH4 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 731 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 0x00000065UL /**< Mode APORT3YCH5 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 732 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 0x00000066UL /**< Mode APORT3XCH6 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 733 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 0x00000067UL /**< Mode APORT3YCH7 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 734 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 0x00000068UL /**< Mode APORT3XCH8 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 735 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 0x00000069UL /**< Mode APORT3YCH9 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 736 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 0x0000006AUL /**< Mode APORT3XCH10 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 737 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 0x0000006BUL /**< Mode APORT3YCH11 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 738 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 0x0000006CUL /**< Mode APORT3XCH12 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 739 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 0x0000006DUL /**< Mode APORT3YCH13 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 740 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 0x0000006EUL /**< Mode APORT3XCH14 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 741 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 0x0000006FUL /**< Mode APORT3YCH15 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 742 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 0x00000070UL /**< Mode APORT3XCH16 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 743 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 0x00000071UL /**< Mode APORT3YCH17 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 744 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 0x00000072UL /**< Mode APORT3XCH18 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 745 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 0x00000073UL /**< Mode APORT3YCH19 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 746 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 0x00000074UL /**< Mode APORT3XCH20 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 747 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 0x00000075UL /**< Mode APORT3YCH21 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 748 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 0x00000076UL /**< Mode APORT3XCH22 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 749 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 0x00000077UL /**< Mode APORT3YCH23 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 750 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 0x00000078UL /**< Mode APORT3XCH24 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 751 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 0x00000079UL /**< Mode APORT3YCH25 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 752 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 0x0000007AUL /**< Mode APORT3XCH26 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 753 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 0x0000007BUL /**< Mode APORT3YCH27 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 754 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 0x0000007CUL /**< Mode APORT3XCH28 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 755 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 0x0000007DUL /**< Mode APORT3YCH29 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 756 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 0x0000007EUL /**< Mode APORT3XCH30 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 757 #define _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 0x0000007FUL /**< Mode APORT3YCH31 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 758 #define CSEN_SINGLECTRL_SINGLESEL_DEFAULT (_CSEN_SINGLECTRL_SINGLESEL_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 759 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 << 4) /**< Shifted mode APORT1XCH0 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 760 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 << 4) /**< Shifted mode APORT1YCH1 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 761 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 << 4) /**< Shifted mode APORT1XCH2 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 762 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 << 4) /**< Shifted mode APORT1YCH3 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 763 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 << 4) /**< Shifted mode APORT1XCH4 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 764 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 << 4) /**< Shifted mode APORT1YCH5 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 765 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 << 4) /**< Shifted mode APORT1XCH6 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 766 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 << 4) /**< Shifted mode APORT1YCH7 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 767 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 << 4) /**< Shifted mode APORT1XCH8 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 768 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 << 4) /**< Shifted mode APORT1YCH9 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 769 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 << 4) /**< Shifted mode APORT1XCH10 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 770 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 << 4) /**< Shifted mode APORT1YCH11 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 771 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 << 4) /**< Shifted mode APORT1XCH12 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 772 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 << 4) /**< Shifted mode APORT1YCH13 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 773 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 << 4) /**< Shifted mode APORT1XCH14 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 774 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 << 4) /**< Shifted mode APORT1YCH15 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 775 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 << 4) /**< Shifted mode APORT1XCH16 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 776 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 << 4) /**< Shifted mode APORT1YCH17 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 777 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 << 4) /**< Shifted mode APORT1XCH18 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 778 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 << 4) /**< Shifted mode APORT1YCH19 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 779 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 << 4) /**< Shifted mode APORT1XCH20 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 780 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 << 4) /**< Shifted mode APORT1YCH21 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 781 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 << 4) /**< Shifted mode APORT1XCH22 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 782 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 << 4) /**< Shifted mode APORT1YCH23 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 783 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 << 4) /**< Shifted mode APORT1XCH24 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 784 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 << 4) /**< Shifted mode APORT1YCH25 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 785 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 << 4) /**< Shifted mode APORT1XCH26 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 786 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 << 4) /**< Shifted mode APORT1YCH27 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 787 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 << 4) /**< Shifted mode APORT1XCH28 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 788 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 << 4) /**< Shifted mode APORT1YCH29 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 789 #define CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 << 4) /**< Shifted mode APORT1XCH30 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 790 #define CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 << 4) /**< Shifted mode APORT1YCH31 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 791 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 << 4) /**< Shifted mode APORT3XCH0 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 792 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 << 4) /**< Shifted mode APORT3YCH1 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 793 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 << 4) /**< Shifted mode APORT3XCH2 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 794 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 << 4) /**< Shifted mode APORT3YCH3 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 795 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 << 4) /**< Shifted mode APORT3XCH4 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 796 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 << 4) /**< Shifted mode APORT3YCH5 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 797 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 << 4) /**< Shifted mode APORT3XCH6 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 798 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 << 4) /**< Shifted mode APORT3YCH7 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 799 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 << 4) /**< Shifted mode APORT3XCH8 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 800 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 << 4) /**< Shifted mode APORT3YCH9 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 801 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 << 4) /**< Shifted mode APORT3XCH10 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 802 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 << 4) /**< Shifted mode APORT3YCH11 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 803 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 << 4) /**< Shifted mode APORT3XCH12 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 804 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 << 4) /**< Shifted mode APORT3YCH13 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 805 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 << 4) /**< Shifted mode APORT3XCH14 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 806 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 << 4) /**< Shifted mode APORT3YCH15 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 807 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 << 4) /**< Shifted mode APORT3XCH16 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 808 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 << 4) /**< Shifted mode APORT3YCH17 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 809 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 << 4) /**< Shifted mode APORT3XCH18 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 810 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 << 4) /**< Shifted mode APORT3YCH19 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 811 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 << 4) /**< Shifted mode APORT3XCH20 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 812 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 << 4) /**< Shifted mode APORT3YCH21 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 813 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 << 4) /**< Shifted mode APORT3XCH22 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 814 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 << 4) /**< Shifted mode APORT3YCH23 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 815 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 << 4) /**< Shifted mode APORT3XCH24 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 816 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 << 4) /**< Shifted mode APORT3YCH25 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 817 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 << 4) /**< Shifted mode APORT3XCH26 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 818 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 << 4) /**< Shifted mode APORT3YCH27 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 819 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 << 4) /**< Shifted mode APORT3XCH28 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 820 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 << 4) /**< Shifted mode APORT3YCH29 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 821 #define CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 << 4) /**< Shifted mode APORT3XCH30 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 822 #define CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 << 4) /**< Shifted mode APORT3YCH31 for CSEN_SINGLECTRL */
AnnaBridge 170:e95d10626187 823
AnnaBridge 170:e95d10626187 824 /* Bit fields for CSEN DMBASELINE */
AnnaBridge 170:e95d10626187 825 #define _CSEN_DMBASELINE_RESETVALUE 0x00000000UL /**< Default value for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 826 #define _CSEN_DMBASELINE_MASK 0xFFFFFFFFUL /**< Mask for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 827 #define _CSEN_DMBASELINE_BASELINEUP_SHIFT 0 /**< Shift value for CSEN_BASELINEUP */
AnnaBridge 170:e95d10626187 828 #define _CSEN_DMBASELINE_BASELINEUP_MASK 0xFFFFUL /**< Bit mask for CSEN_BASELINEUP */
AnnaBridge 170:e95d10626187 829 #define _CSEN_DMBASELINE_BASELINEUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 830 #define CSEN_DMBASELINE_BASELINEUP_DEFAULT (_CSEN_DMBASELINE_BASELINEUP_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 831 #define _CSEN_DMBASELINE_BASELINEDN_SHIFT 16 /**< Shift value for CSEN_BASELINEDN */
AnnaBridge 170:e95d10626187 832 #define _CSEN_DMBASELINE_BASELINEDN_MASK 0xFFFF0000UL /**< Bit mask for CSEN_BASELINEDN */
AnnaBridge 170:e95d10626187 833 #define _CSEN_DMBASELINE_BASELINEDN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 834 #define CSEN_DMBASELINE_BASELINEDN_DEFAULT (_CSEN_DMBASELINE_BASELINEDN_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_DMBASELINE */
AnnaBridge 170:e95d10626187 835
AnnaBridge 170:e95d10626187 836 /* Bit fields for CSEN DMCFG */
AnnaBridge 170:e95d10626187 837 #define _CSEN_DMCFG_RESETVALUE 0x00000000UL /**< Default value for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 838 #define _CSEN_DMCFG_MASK 0x103F0FFFUL /**< Mask for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 839 #define _CSEN_DMCFG_DMG_SHIFT 0 /**< Shift value for CSEN_DMG */
AnnaBridge 170:e95d10626187 840 #define _CSEN_DMCFG_DMG_MASK 0xFFUL /**< Bit mask for CSEN_DMG */
AnnaBridge 170:e95d10626187 841 #define _CSEN_DMCFG_DMG_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 842 #define CSEN_DMCFG_DMG_DEFAULT (_CSEN_DMCFG_DMG_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 843 #define _CSEN_DMCFG_DMR_SHIFT 8 /**< Shift value for CSEN_DMR */
AnnaBridge 170:e95d10626187 844 #define _CSEN_DMCFG_DMR_MASK 0xF00UL /**< Bit mask for CSEN_DMR */
AnnaBridge 170:e95d10626187 845 #define _CSEN_DMCFG_DMR_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 846 #define CSEN_DMCFG_DMR_DEFAULT (_CSEN_DMCFG_DMR_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 847 #define _CSEN_DMCFG_DMCR_SHIFT 16 /**< Shift value for CSEN_DMCR */
AnnaBridge 170:e95d10626187 848 #define _CSEN_DMCFG_DMCR_MASK 0xF0000UL /**< Bit mask for CSEN_DMCR */
AnnaBridge 170:e95d10626187 849 #define _CSEN_DMCFG_DMCR_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 850 #define CSEN_DMCFG_DMCR_DEFAULT (_CSEN_DMCFG_DMCR_DEFAULT << 16) /**< Shifted mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 851 #define _CSEN_DMCFG_CRMODE_SHIFT 20 /**< Shift value for CSEN_CRMODE */
AnnaBridge 170:e95d10626187 852 #define _CSEN_DMCFG_CRMODE_MASK 0x300000UL /**< Bit mask for CSEN_CRMODE */
AnnaBridge 170:e95d10626187 853 #define _CSEN_DMCFG_CRMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 854 #define _CSEN_DMCFG_CRMODE_DM10 0x00000000UL /**< Mode DM10 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 855 #define _CSEN_DMCFG_CRMODE_DM12 0x00000001UL /**< Mode DM12 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 856 #define _CSEN_DMCFG_CRMODE_DM14 0x00000002UL /**< Mode DM14 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 857 #define _CSEN_DMCFG_CRMODE_DM16 0x00000003UL /**< Mode DM16 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 858 #define CSEN_DMCFG_CRMODE_DEFAULT (_CSEN_DMCFG_CRMODE_DEFAULT << 20) /**< Shifted mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 859 #define CSEN_DMCFG_CRMODE_DM10 (_CSEN_DMCFG_CRMODE_DM10 << 20) /**< Shifted mode DM10 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 860 #define CSEN_DMCFG_CRMODE_DM12 (_CSEN_DMCFG_CRMODE_DM12 << 20) /**< Shifted mode DM12 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 861 #define CSEN_DMCFG_CRMODE_DM14 (_CSEN_DMCFG_CRMODE_DM14 << 20) /**< Shifted mode DM14 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 862 #define CSEN_DMCFG_CRMODE_DM16 (_CSEN_DMCFG_CRMODE_DM16 << 20) /**< Shifted mode DM16 for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 863 #define CSEN_DMCFG_DMGRDIS (0x1UL << 28) /**< Delta Modulation Gain Step Reduction Disable */
AnnaBridge 170:e95d10626187 864 #define _CSEN_DMCFG_DMGRDIS_SHIFT 28 /**< Shift value for CSEN_DMGRDIS */
AnnaBridge 170:e95d10626187 865 #define _CSEN_DMCFG_DMGRDIS_MASK 0x10000000UL /**< Bit mask for CSEN_DMGRDIS */
AnnaBridge 170:e95d10626187 866 #define _CSEN_DMCFG_DMGRDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 867 #define CSEN_DMCFG_DMGRDIS_DEFAULT (_CSEN_DMCFG_DMGRDIS_DEFAULT << 28) /**< Shifted mode DEFAULT for CSEN_DMCFG */
AnnaBridge 170:e95d10626187 868
AnnaBridge 170:e95d10626187 869 /* Bit fields for CSEN ANACTRL */
AnnaBridge 170:e95d10626187 870 #define _CSEN_ANACTRL_RESETVALUE 0x00000070UL /**< Default value for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 871 #define _CSEN_ANACTRL_MASK 0x00700770UL /**< Mask for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 872 #define _CSEN_ANACTRL_IREFPROG_SHIFT 4 /**< Shift value for CSEN_IREFPROG */
AnnaBridge 170:e95d10626187 873 #define _CSEN_ANACTRL_IREFPROG_MASK 0x70UL /**< Bit mask for CSEN_IREFPROG */
AnnaBridge 170:e95d10626187 874 #define _CSEN_ANACTRL_IREFPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 875 #define CSEN_ANACTRL_IREFPROG_DEFAULT (_CSEN_ANACTRL_IREFPROG_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 876 #define _CSEN_ANACTRL_IDACIREFS_SHIFT 8 /**< Shift value for CSEN_IDACIREFS */
AnnaBridge 170:e95d10626187 877 #define _CSEN_ANACTRL_IDACIREFS_MASK 0x700UL /**< Bit mask for CSEN_IDACIREFS */
AnnaBridge 170:e95d10626187 878 #define _CSEN_ANACTRL_IDACIREFS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 879 #define CSEN_ANACTRL_IDACIREFS_DEFAULT (_CSEN_ANACTRL_IDACIREFS_DEFAULT << 8) /**< Shifted mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 880 #define _CSEN_ANACTRL_TRSTPROG_SHIFT 20 /**< Shift value for CSEN_TRSTPROG */
AnnaBridge 170:e95d10626187 881 #define _CSEN_ANACTRL_TRSTPROG_MASK 0x700000UL /**< Bit mask for CSEN_TRSTPROG */
AnnaBridge 170:e95d10626187 882 #define _CSEN_ANACTRL_TRSTPROG_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 883 #define CSEN_ANACTRL_TRSTPROG_DEFAULT (_CSEN_ANACTRL_TRSTPROG_DEFAULT << 20) /**< Shifted mode DEFAULT for CSEN_ANACTRL */
AnnaBridge 170:e95d10626187 884
AnnaBridge 170:e95d10626187 885 /* Bit fields for CSEN IF */
AnnaBridge 170:e95d10626187 886 #define _CSEN_IF_RESETVALUE 0x00000000UL /**< Default value for CSEN_IF */
AnnaBridge 170:e95d10626187 887 #define _CSEN_IF_MASK 0x0000001FUL /**< Mask for CSEN_IF */
AnnaBridge 170:e95d10626187 888 #define CSEN_IF_CMP (0x1UL << 0) /**< Digital Comparator Interrupt Flag */
AnnaBridge 170:e95d10626187 889 #define _CSEN_IF_CMP_SHIFT 0 /**< Shift value for CSEN_CMP */
AnnaBridge 170:e95d10626187 890 #define _CSEN_IF_CMP_MASK 0x1UL /**< Bit mask for CSEN_CMP */
AnnaBridge 170:e95d10626187 891 #define _CSEN_IF_CMP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 892 #define CSEN_IF_CMP_DEFAULT (_CSEN_IF_CMP_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 893 #define CSEN_IF_CONV (0x1UL << 1) /**< Conversion Done Interrupt Flag */
AnnaBridge 170:e95d10626187 894 #define _CSEN_IF_CONV_SHIFT 1 /**< Shift value for CSEN_CONV */
AnnaBridge 170:e95d10626187 895 #define _CSEN_IF_CONV_MASK 0x2UL /**< Bit mask for CSEN_CONV */
AnnaBridge 170:e95d10626187 896 #define _CSEN_IF_CONV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 897 #define CSEN_IF_CONV_DEFAULT (_CSEN_IF_CONV_DEFAULT << 1) /**< Shifted mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 898 #define CSEN_IF_EOS (0x1UL << 2) /**< End of Scan Interrupt Flag. */
AnnaBridge 170:e95d10626187 899 #define _CSEN_IF_EOS_SHIFT 2 /**< Shift value for CSEN_EOS */
AnnaBridge 170:e95d10626187 900 #define _CSEN_IF_EOS_MASK 0x4UL /**< Bit mask for CSEN_EOS */
AnnaBridge 170:e95d10626187 901 #define _CSEN_IF_EOS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 902 #define CSEN_IF_EOS_DEFAULT (_CSEN_IF_EOS_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 903 #define CSEN_IF_DMAOF (0x1UL << 3) /**< DMA Overflow Interrupt Flag. */
AnnaBridge 170:e95d10626187 904 #define _CSEN_IF_DMAOF_SHIFT 3 /**< Shift value for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 905 #define _CSEN_IF_DMAOF_MASK 0x8UL /**< Bit mask for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 906 #define _CSEN_IF_DMAOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 907 #define CSEN_IF_DMAOF_DEFAULT (_CSEN_IF_DMAOF_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 908 #define CSEN_IF_APORTCONFLICT (0x1UL << 4) /**< APORT Conflict Interrupt Flag */
AnnaBridge 170:e95d10626187 909 #define _CSEN_IF_APORTCONFLICT_SHIFT 4 /**< Shift value for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 910 #define _CSEN_IF_APORTCONFLICT_MASK 0x10UL /**< Bit mask for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 911 #define _CSEN_IF_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 912 #define CSEN_IF_APORTCONFLICT_DEFAULT (_CSEN_IF_APORTCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_IF */
AnnaBridge 170:e95d10626187 913
AnnaBridge 170:e95d10626187 914 /* Bit fields for CSEN IFS */
AnnaBridge 170:e95d10626187 915 #define _CSEN_IFS_RESETVALUE 0x00000000UL /**< Default value for CSEN_IFS */
AnnaBridge 170:e95d10626187 916 #define _CSEN_IFS_MASK 0x0000001FUL /**< Mask for CSEN_IFS */
AnnaBridge 170:e95d10626187 917 #define CSEN_IFS_CMP (0x1UL << 0) /**< Set CMP Interrupt Flag */
AnnaBridge 170:e95d10626187 918 #define _CSEN_IFS_CMP_SHIFT 0 /**< Shift value for CSEN_CMP */
AnnaBridge 170:e95d10626187 919 #define _CSEN_IFS_CMP_MASK 0x1UL /**< Bit mask for CSEN_CMP */
AnnaBridge 170:e95d10626187 920 #define _CSEN_IFS_CMP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 921 #define CSEN_IFS_CMP_DEFAULT (_CSEN_IFS_CMP_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 922 #define CSEN_IFS_CONV (0x1UL << 1) /**< Set CONV Interrupt Flag */
AnnaBridge 170:e95d10626187 923 #define _CSEN_IFS_CONV_SHIFT 1 /**< Shift value for CSEN_CONV */
AnnaBridge 170:e95d10626187 924 #define _CSEN_IFS_CONV_MASK 0x2UL /**< Bit mask for CSEN_CONV */
AnnaBridge 170:e95d10626187 925 #define _CSEN_IFS_CONV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 926 #define CSEN_IFS_CONV_DEFAULT (_CSEN_IFS_CONV_DEFAULT << 1) /**< Shifted mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 927 #define CSEN_IFS_EOS (0x1UL << 2) /**< Set EOS Interrupt Flag */
AnnaBridge 170:e95d10626187 928 #define _CSEN_IFS_EOS_SHIFT 2 /**< Shift value for CSEN_EOS */
AnnaBridge 170:e95d10626187 929 #define _CSEN_IFS_EOS_MASK 0x4UL /**< Bit mask for CSEN_EOS */
AnnaBridge 170:e95d10626187 930 #define _CSEN_IFS_EOS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 931 #define CSEN_IFS_EOS_DEFAULT (_CSEN_IFS_EOS_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 932 #define CSEN_IFS_DMAOF (0x1UL << 3) /**< Set DMAOF Interrupt Flag */
AnnaBridge 170:e95d10626187 933 #define _CSEN_IFS_DMAOF_SHIFT 3 /**< Shift value for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 934 #define _CSEN_IFS_DMAOF_MASK 0x8UL /**< Bit mask for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 935 #define _CSEN_IFS_DMAOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 936 #define CSEN_IFS_DMAOF_DEFAULT (_CSEN_IFS_DMAOF_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 937 #define CSEN_IFS_APORTCONFLICT (0x1UL << 4) /**< Set APORTCONFLICT Interrupt Flag */
AnnaBridge 170:e95d10626187 938 #define _CSEN_IFS_APORTCONFLICT_SHIFT 4 /**< Shift value for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 939 #define _CSEN_IFS_APORTCONFLICT_MASK 0x10UL /**< Bit mask for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 940 #define _CSEN_IFS_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 941 #define CSEN_IFS_APORTCONFLICT_DEFAULT (_CSEN_IFS_APORTCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_IFS */
AnnaBridge 170:e95d10626187 942
AnnaBridge 170:e95d10626187 943 /* Bit fields for CSEN IFC */
AnnaBridge 170:e95d10626187 944 #define _CSEN_IFC_RESETVALUE 0x00000000UL /**< Default value for CSEN_IFC */
AnnaBridge 170:e95d10626187 945 #define _CSEN_IFC_MASK 0x0000001FUL /**< Mask for CSEN_IFC */
AnnaBridge 170:e95d10626187 946 #define CSEN_IFC_CMP (0x1UL << 0) /**< Clear CMP Interrupt Flag */
AnnaBridge 170:e95d10626187 947 #define _CSEN_IFC_CMP_SHIFT 0 /**< Shift value for CSEN_CMP */
AnnaBridge 170:e95d10626187 948 #define _CSEN_IFC_CMP_MASK 0x1UL /**< Bit mask for CSEN_CMP */
AnnaBridge 170:e95d10626187 949 #define _CSEN_IFC_CMP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 950 #define CSEN_IFC_CMP_DEFAULT (_CSEN_IFC_CMP_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 951 #define CSEN_IFC_CONV (0x1UL << 1) /**< Clear CONV Interrupt Flag */
AnnaBridge 170:e95d10626187 952 #define _CSEN_IFC_CONV_SHIFT 1 /**< Shift value for CSEN_CONV */
AnnaBridge 170:e95d10626187 953 #define _CSEN_IFC_CONV_MASK 0x2UL /**< Bit mask for CSEN_CONV */
AnnaBridge 170:e95d10626187 954 #define _CSEN_IFC_CONV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 955 #define CSEN_IFC_CONV_DEFAULT (_CSEN_IFC_CONV_DEFAULT << 1) /**< Shifted mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 956 #define CSEN_IFC_EOS (0x1UL << 2) /**< Clear EOS Interrupt Flag */
AnnaBridge 170:e95d10626187 957 #define _CSEN_IFC_EOS_SHIFT 2 /**< Shift value for CSEN_EOS */
AnnaBridge 170:e95d10626187 958 #define _CSEN_IFC_EOS_MASK 0x4UL /**< Bit mask for CSEN_EOS */
AnnaBridge 170:e95d10626187 959 #define _CSEN_IFC_EOS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 960 #define CSEN_IFC_EOS_DEFAULT (_CSEN_IFC_EOS_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 961 #define CSEN_IFC_DMAOF (0x1UL << 3) /**< Clear DMAOF Interrupt Flag */
AnnaBridge 170:e95d10626187 962 #define _CSEN_IFC_DMAOF_SHIFT 3 /**< Shift value for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 963 #define _CSEN_IFC_DMAOF_MASK 0x8UL /**< Bit mask for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 964 #define _CSEN_IFC_DMAOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 965 #define CSEN_IFC_DMAOF_DEFAULT (_CSEN_IFC_DMAOF_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 966 #define CSEN_IFC_APORTCONFLICT (0x1UL << 4) /**< Clear APORTCONFLICT Interrupt Flag */
AnnaBridge 170:e95d10626187 967 #define _CSEN_IFC_APORTCONFLICT_SHIFT 4 /**< Shift value for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 968 #define _CSEN_IFC_APORTCONFLICT_MASK 0x10UL /**< Bit mask for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 969 #define _CSEN_IFC_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 970 #define CSEN_IFC_APORTCONFLICT_DEFAULT (_CSEN_IFC_APORTCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_IFC */
AnnaBridge 170:e95d10626187 971
AnnaBridge 170:e95d10626187 972 /* Bit fields for CSEN IEN */
AnnaBridge 170:e95d10626187 973 #define _CSEN_IEN_RESETVALUE 0x00000000UL /**< Default value for CSEN_IEN */
AnnaBridge 170:e95d10626187 974 #define _CSEN_IEN_MASK 0x0000001FUL /**< Mask for CSEN_IEN */
AnnaBridge 170:e95d10626187 975 #define CSEN_IEN_CMP (0x1UL << 0) /**< CMP Interrupt Enable */
AnnaBridge 170:e95d10626187 976 #define _CSEN_IEN_CMP_SHIFT 0 /**< Shift value for CSEN_CMP */
AnnaBridge 170:e95d10626187 977 #define _CSEN_IEN_CMP_MASK 0x1UL /**< Bit mask for CSEN_CMP */
AnnaBridge 170:e95d10626187 978 #define _CSEN_IEN_CMP_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 979 #define CSEN_IEN_CMP_DEFAULT (_CSEN_IEN_CMP_DEFAULT << 0) /**< Shifted mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 980 #define CSEN_IEN_CONV (0x1UL << 1) /**< CONV Interrupt Enable */
AnnaBridge 170:e95d10626187 981 #define _CSEN_IEN_CONV_SHIFT 1 /**< Shift value for CSEN_CONV */
AnnaBridge 170:e95d10626187 982 #define _CSEN_IEN_CONV_MASK 0x2UL /**< Bit mask for CSEN_CONV */
AnnaBridge 170:e95d10626187 983 #define _CSEN_IEN_CONV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 984 #define CSEN_IEN_CONV_DEFAULT (_CSEN_IEN_CONV_DEFAULT << 1) /**< Shifted mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 985 #define CSEN_IEN_EOS (0x1UL << 2) /**< EOS Interrupt Enable */
AnnaBridge 170:e95d10626187 986 #define _CSEN_IEN_EOS_SHIFT 2 /**< Shift value for CSEN_EOS */
AnnaBridge 170:e95d10626187 987 #define _CSEN_IEN_EOS_MASK 0x4UL /**< Bit mask for CSEN_EOS */
AnnaBridge 170:e95d10626187 988 #define _CSEN_IEN_EOS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 989 #define CSEN_IEN_EOS_DEFAULT (_CSEN_IEN_EOS_DEFAULT << 2) /**< Shifted mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 990 #define CSEN_IEN_DMAOF (0x1UL << 3) /**< DMAOF Interrupt Enable */
AnnaBridge 170:e95d10626187 991 #define _CSEN_IEN_DMAOF_SHIFT 3 /**< Shift value for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 992 #define _CSEN_IEN_DMAOF_MASK 0x8UL /**< Bit mask for CSEN_DMAOF */
AnnaBridge 170:e95d10626187 993 #define _CSEN_IEN_DMAOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 994 #define CSEN_IEN_DMAOF_DEFAULT (_CSEN_IEN_DMAOF_DEFAULT << 3) /**< Shifted mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 995 #define CSEN_IEN_APORTCONFLICT (0x1UL << 4) /**< APORTCONFLICT Interrupt Enable */
AnnaBridge 170:e95d10626187 996 #define _CSEN_IEN_APORTCONFLICT_SHIFT 4 /**< Shift value for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 997 #define _CSEN_IEN_APORTCONFLICT_MASK 0x10UL /**< Bit mask for CSEN_APORTCONFLICT */
AnnaBridge 170:e95d10626187 998 #define _CSEN_IEN_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 999 #define CSEN_IEN_APORTCONFLICT_DEFAULT (_CSEN_IEN_APORTCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for CSEN_IEN */
AnnaBridge 170:e95d10626187 1000
AnnaBridge 170:e95d10626187 1001 /** @} */
AnnaBridge 170:e95d10626187 1002 /** @} End of group EFM32GG11B_CSEN */
AnnaBridge 170:e95d10626187 1003 /** @} End of group Parts */