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TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/stm32f7xx_hal_gpio_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400
Parent:: 171:3a7713b1edbc

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	171:3a7713b1edbc	1	/**
AnnaBridge	171:3a7713b1edbc	2	******************************************************************************
AnnaBridge	171:3a7713b1edbc	3	* @file stm32f7xx_hal_gpio_ex.h
AnnaBridge	171:3a7713b1edbc	4	* @author MCD Application Team
AnnaBridge	171:3a7713b1edbc	5	* @brief Header file of GPIO HAL Extension module.
AnnaBridge	171:3a7713b1edbc	6	******************************************************************************
AnnaBridge	171:3a7713b1edbc	7	* @attention
AnnaBridge	171:3a7713b1edbc	8	*
AnnaBridge	171:3a7713b1edbc	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	171:3a7713b1edbc	10	*
AnnaBridge	171:3a7713b1edbc	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	171:3a7713b1edbc	12	* are permitted provided that the following conditions are met:
AnnaBridge	171:3a7713b1edbc	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	171:3a7713b1edbc	14	* this list of conditions and the following disclaimer.
AnnaBridge	171:3a7713b1edbc	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	171:3a7713b1edbc	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	171:3a7713b1edbc	17	* and/or other materials provided with the distribution.
AnnaBridge	171:3a7713b1edbc	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	171:3a7713b1edbc	19	* may be used to endorse or promote products derived from this software
AnnaBridge	171:3a7713b1edbc	20	* without specific prior written permission.
AnnaBridge	171:3a7713b1edbc	21	*
AnnaBridge	171:3a7713b1edbc	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	171:3a7713b1edbc	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	171:3a7713b1edbc	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	171:3a7713b1edbc	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	171:3a7713b1edbc	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	171:3a7713b1edbc	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	171:3a7713b1edbc	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	171:3a7713b1edbc	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	171:3a7713b1edbc	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	171:3a7713b1edbc	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	171:3a7713b1edbc	32	*
AnnaBridge	171:3a7713b1edbc	33	******************************************************************************
AnnaBridge	171:3a7713b1edbc	34	*/
AnnaBridge	171:3a7713b1edbc	35
AnnaBridge	171:3a7713b1edbc	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	171:3a7713b1edbc	37	#ifndef __STM32F7xx_HAL_GPIO_EX_H
AnnaBridge	171:3a7713b1edbc	38	#define __STM32F7xx_HAL_GPIO_EX_H
AnnaBridge	171:3a7713b1edbc	39
AnnaBridge	171:3a7713b1edbc	40	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	41	extern "C" {
AnnaBridge	171:3a7713b1edbc	42	#endif
AnnaBridge	171:3a7713b1edbc	43
AnnaBridge	171:3a7713b1edbc	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	45	#include "stm32f7xx_hal_def.h"
AnnaBridge	171:3a7713b1edbc	46
AnnaBridge	171:3a7713b1edbc	47	/** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge	171:3a7713b1edbc	48	* @{
AnnaBridge	171:3a7713b1edbc	49	*/
AnnaBridge	171:3a7713b1edbc	50
AnnaBridge	171:3a7713b1edbc	51	/** @defgroup GPIOEx GPIOEx
AnnaBridge	171:3a7713b1edbc	52	* @{
AnnaBridge	171:3a7713b1edbc	53	*/
AnnaBridge	171:3a7713b1edbc	54
AnnaBridge	171:3a7713b1edbc	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	56
AnnaBridge	171:3a7713b1edbc	57	/* Exported constants --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	58	/** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
AnnaBridge	171:3a7713b1edbc	59	* @{
AnnaBridge	171:3a7713b1edbc	60	*/
AnnaBridge	171:3a7713b1edbc	61
AnnaBridge	171:3a7713b1edbc	62	/** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
AnnaBridge	171:3a7713b1edbc	63	* @{
AnnaBridge	171:3a7713b1edbc	64	*/
AnnaBridge	171:3a7713b1edbc	65	/--------------- STM32F74xxx/STM32F75xxx/STM32F76xxx/STM32F77xxx -------------/
AnnaBridge	171:3a7713b1edbc	66	#if defined (STM32F745xx) \|\| defined (STM32F746xx) \|\| defined (STM32F756xx) \|\| defined (STM32F765xx) \|\| defined (STM32F767xx) \|\|\
AnnaBridge	171:3a7713b1edbc	67	defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
AnnaBridge	171:3a7713b1edbc	68	/**
AnnaBridge	171:3a7713b1edbc	69	* @brief AF 0 selection
AnnaBridge	171:3a7713b1edbc	70	*/
AnnaBridge	171:3a7713b1edbc	71	#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00U) /* RTC_50Hz Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	72	#define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO (MCO1 and MCO2) Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	73	#define GPIO_AF0_SWJ ((uint8_t)0x00U) /* SWJ (SWD and JTAG) Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	74	#define GPIO_AF0_TRACE ((uint8_t)0x00U) /* TRACE Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	75
AnnaBridge	171:3a7713b1edbc	76	/**
AnnaBridge	171:3a7713b1edbc	77	* @brief AF 1 selection
AnnaBridge	171:3a7713b1edbc	78	*/
AnnaBridge	171:3a7713b1edbc	79	#define GPIO_AF1_TIM1 ((uint8_t)0x01U) /* TIM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	80	#define GPIO_AF1_TIM2 ((uint8_t)0x01U) /* TIM2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	81	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	82	#define GPIO_AF1_UART5 ((uint8_t)0x01U) /* UART5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	83	#define GPIO_AF1_I2C4 ((uint8_t)0x01U) /* I2C4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	84	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	85
AnnaBridge	171:3a7713b1edbc	86	/**
AnnaBridge	171:3a7713b1edbc	87	* @brief AF 2 selection
AnnaBridge	171:3a7713b1edbc	88	*/
AnnaBridge	171:3a7713b1edbc	89	#define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	90	#define GPIO_AF2_TIM4 ((uint8_t)0x02U) /* TIM4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	91	#define GPIO_AF2_TIM5 ((uint8_t)0x02U) /* TIM5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	92
AnnaBridge	171:3a7713b1edbc	93	/**
AnnaBridge	171:3a7713b1edbc	94	* @brief AF 3 selection
AnnaBridge	171:3a7713b1edbc	95	*/
AnnaBridge	171:3a7713b1edbc	96	#define GPIO_AF3_TIM8 ((uint8_t)0x03U) /* TIM8 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	97	#define GPIO_AF3_TIM9 ((uint8_t)0x03U) /* TIM9 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	98	#define GPIO_AF3_TIM10 ((uint8_t)0x03U) /* TIM10 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	99	#define GPIO_AF3_TIM11 ((uint8_t)0x03U) /* TIM11 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	100	#define GPIO_AF3_LPTIM1 ((uint8_t)0x03U) /* LPTIM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	101	#define GPIO_AF3_CEC ((uint8_t)0x03U) /* CEC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	102	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	103	#define GPIO_AF3_DFSDM1 ((uint8_t)0x03U) /* DFSDM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	104	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	105	/**
AnnaBridge	171:3a7713b1edbc	106	* @brief AF 4 selection
AnnaBridge	171:3a7713b1edbc	107	*/
AnnaBridge	171:3a7713b1edbc	108	#define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	109	#define GPIO_AF4_I2C2 ((uint8_t)0x04U) /* I2C2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	110	#define GPIO_AF4_I2C3 ((uint8_t)0x04U) /* I2C3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	111	#define GPIO_AF4_I2C4 ((uint8_t)0x04U) /* I2C4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	112	#define GPIO_AF4_CEC ((uint8_t)0x04U) /* CEC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	113	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	114	#define GPIO_AF4_USART1 ((uint8_t)0x04) /* USART1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	115	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	116
AnnaBridge	171:3a7713b1edbc	117	/**
AnnaBridge	171:3a7713b1edbc	118	* @brief AF 5 selection
AnnaBridge	171:3a7713b1edbc	119	*/
AnnaBridge	171:3a7713b1edbc	120	#define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	121	#define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2/I2S2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	122	#define GPIO_AF5_SPI3 ((uint8_t)0x05U) /* SPI3/I2S3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	123	#define GPIO_AF5_SPI4 ((uint8_t)0x05U) /* SPI4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	124	#define GPIO_AF5_SPI5 ((uint8_t)0x05U) /* SPI5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	125	#define GPIO_AF5_SPI6 ((uint8_t)0x05U) /* SPI6 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	126
AnnaBridge	171:3a7713b1edbc	127	/**
AnnaBridge	171:3a7713b1edbc	128	* @brief AF 6 selection
AnnaBridge	171:3a7713b1edbc	129	*/
AnnaBridge	171:3a7713b1edbc	130	#define GPIO_AF6_SPI3 ((uint8_t)0x06U) /* SPI3/I2S3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	131	#define GPIO_AF6_SAI1 ((uint8_t)0x06U) /* SAI1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	132	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	133	#define GPIO_AF6_UART4 ((uint8_t)0x06U) /* UART4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	134	#define GPIO_AF6_DFSDM1 ((uint8_t)0x06U) /* DFSDM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	135	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	136
AnnaBridge	171:3a7713b1edbc	137	/**
AnnaBridge	171:3a7713b1edbc	138	* @brief AF 7 selection
AnnaBridge	171:3a7713b1edbc	139	*/
AnnaBridge	171:3a7713b1edbc	140	#define GPIO_AF7_USART1 ((uint8_t)0x07U) /* USART1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	141	#define GPIO_AF7_USART2 ((uint8_t)0x07U) /* USART2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	142	#define GPIO_AF7_USART3 ((uint8_t)0x07U) /* USART3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	143	#define GPIO_AF7_UART5 ((uint8_t)0x07U) /* UART5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	144	#define GPIO_AF7_SPDIFRX ((uint8_t)0x07U) /* SPDIF-RX Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	145	#define GPIO_AF7_SPI2 ((uint8_t)0x07U) /* SPI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	146	#define GPIO_AF7_SPI3 ((uint8_t)0x07U) /* SPI3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	147	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	148	#define GPIO_AF7_SPI6 ((uint8_t)0x07U) /* SPI6 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	149	#define GPIO_AF7_DFSDM1 ((uint8_t)0x07U) /* DFSDM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	150	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	151
AnnaBridge	171:3a7713b1edbc	152	/**
AnnaBridge	171:3a7713b1edbc	153	* @brief AF 8 selection
AnnaBridge	171:3a7713b1edbc	154	*/
AnnaBridge	171:3a7713b1edbc	155	#define GPIO_AF8_UART4 ((uint8_t)0x08U) /* UART4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	156	#define GPIO_AF8_UART5 ((uint8_t)0x08U) /* UART5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	157	#define GPIO_AF8_USART6 ((uint8_t)0x08U) /* USART6 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	158	#define GPIO_AF8_UART7 ((uint8_t)0x08U) /* UART7 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	159	#define GPIO_AF8_UART8 ((uint8_t)0x08U) /* UART8 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	160	#define GPIO_AF8_SPDIFRX ((uint8_t)0x08U) /* SPIDIF-RX Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	161	#define GPIO_AF8_SAI2 ((uint8_t)0x08U) /* SAI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	162	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	163	#define GPIO_AF8_SPI6 ((uint8_t)0x08U) /* SPI6 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	164	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	165
AnnaBridge	171:3a7713b1edbc	166
AnnaBridge	171:3a7713b1edbc	167	/**
AnnaBridge	171:3a7713b1edbc	168	* @brief AF 9 selection
AnnaBridge	171:3a7713b1edbc	169	*/
AnnaBridge	171:3a7713b1edbc	170	#define GPIO_AF9_CAN1 ((uint8_t)0x09U) /* CAN1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	171	#define GPIO_AF9_CAN2 ((uint8_t)0x09U) /* CAN2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	172	#define GPIO_AF9_TIM12 ((uint8_t)0x09U) /* TIM12 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	173	#define GPIO_AF9_TIM13 ((uint8_t)0x09U) /* TIM13 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	174	#define GPIO_AF9_TIM14 ((uint8_t)0x09U) /* TIM14 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	175	#define GPIO_AF9_QUADSPI ((uint8_t)0x09U) /* QUADSPI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	176	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	177	#define GPIO_AF9_LTDC ((uint8_t)0x09U) /* LCD-TFT Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	178	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	179	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F765xx) \|\| defined(STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	180	#define GPIO_AF9_FMC ((uint8_t)0x09U) /* FMC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	181	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	182	/**
AnnaBridge	171:3a7713b1edbc	183	* @brief AF 10 selection
AnnaBridge	171:3a7713b1edbc	184	*/
AnnaBridge	171:3a7713b1edbc	185	#define GPIO_AF10_OTG_FS ((uint8_t)0xAU) /* OTG_FS Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	186	#define GPIO_AF10_OTG_HS ((uint8_t)0xAU) /* OTG_HS Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	187	#define GPIO_AF10_QUADSPI ((uint8_t)0xAU) /* QUADSPI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	188	#define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	189	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	190	#define GPIO_AF10_DFSDM1 ((uint8_t)0x0AU) /* DFSDM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	191	#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	192	#define GPIO_AF10_LTDC ((uint8_t)0x0AU) /* LCD-TFT Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	193	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	194
AnnaBridge	171:3a7713b1edbc	195	/**
AnnaBridge	171:3a7713b1edbc	196	* @brief AF 11 selection
AnnaBridge	171:3a7713b1edbc	197	*/
AnnaBridge	171:3a7713b1edbc	198	#define GPIO_AF11_ETH ((uint8_t)0x0BU) /* ETHERNET Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	199	#if defined(STM32F765xx) \|\| defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
AnnaBridge	171:3a7713b1edbc	200	#define GPIO_AF11_CAN3 ((uint8_t)0x0BU) /* CAN3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	201	#define GPIO_AF11_SDMMC2 ((uint8_t)0x0BU) /* SDMMC2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	202	#define GPIO_AF11_I2C4 ((uint8_t)0x0BU) /* I2C4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	203	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	204
AnnaBridge	171:3a7713b1edbc	205	/**
AnnaBridge	171:3a7713b1edbc	206	* @brief AF 12 selection
AnnaBridge	171:3a7713b1edbc	207	*/
AnnaBridge	171:3a7713b1edbc	208	#define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	209	#define GPIO_AF12_OTG_HS_FS ((uint8_t)0xCU) /* OTG HS configured in FS, Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	210	#define GPIO_AF12_SDMMC1 ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	211	#if defined(STM32F765xx) \|\| defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
AnnaBridge	171:3a7713b1edbc	212	#define GPIO_AF12_MDIOS ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	213	#define GPIO_AF12_UART7 ((uint8_t)0xCU) /* UART7 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	214	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	215
AnnaBridge	171:3a7713b1edbc	216	/**
AnnaBridge	171:3a7713b1edbc	217	* @brief AF 13 selection
AnnaBridge	171:3a7713b1edbc	218	*/
AnnaBridge	171:3a7713b1edbc	219	#define GPIO_AF13_DCMI ((uint8_t)0x0DU) /* DCMI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	220	#if defined (STM32F769xx) \|\| defined (STM32F779xx)
AnnaBridge	171:3a7713b1edbc	221	#define GPIO_AF13_DSI ((uint8_t)0x0DU) /* DSI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	222	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	223	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	224	#define GPIO_AF13_LTDC ((uint8_t)0x0DU) /* LTDC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	225
AnnaBridge	171:3a7713b1edbc	226	/**
AnnaBridge	171:3a7713b1edbc	227	* @brief AF 14 selection
AnnaBridge	171:3a7713b1edbc	228	*/
AnnaBridge	171:3a7713b1edbc	229	#define GPIO_AF14_LTDC ((uint8_t)0x0EU) /* LCD-TFT Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	230	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	231	/**
AnnaBridge	171:3a7713b1edbc	232	* @brief AF 15 selection
AnnaBridge	171:3a7713b1edbc	233	*/
AnnaBridge	171:3a7713b1edbc	234	#define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	235	#endif /* STM32F745xx \|\| STM32F746xx \|\| STM32F756xx \|\| STM32F765xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	236	/----------------------------------------------------------------------------/
AnnaBridge	171:3a7713b1edbc	237
AnnaBridge	171:3a7713b1edbc	238	/---------------------------- STM32F72xxx/STM32F73xxx -----------------------/
AnnaBridge	171:3a7713b1edbc	239	#if defined(STM32F722xx) \|\| defined(STM32F723xx) \|\| defined(STM32F732xx) \|\| defined(STM32F733xx)
AnnaBridge	171:3a7713b1edbc	240	/**
AnnaBridge	171:3a7713b1edbc	241	* @brief AF 0 selection
AnnaBridge	171:3a7713b1edbc	242	*/
AnnaBridge	171:3a7713b1edbc	243	#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00U) /* RTC_50Hz Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	244	#define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO (MCO1 and MCO2) Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	245	#define GPIO_AF0_SWJ ((uint8_t)0x00U) /* SWJ (SWD and JTAG) Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	246	#define GPIO_AF0_TRACE ((uint8_t)0x00U) /* TRACE Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	247
AnnaBridge	171:3a7713b1edbc	248	/**
AnnaBridge	171:3a7713b1edbc	249	* @brief AF 1 selection
AnnaBridge	171:3a7713b1edbc	250	*/
AnnaBridge	171:3a7713b1edbc	251	#define GPIO_AF1_TIM1 ((uint8_t)0x01U) /* TIM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	252	#define GPIO_AF1_TIM2 ((uint8_t)0x01U) /* TIM2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	253
AnnaBridge	171:3a7713b1edbc	254	/**
AnnaBridge	171:3a7713b1edbc	255	* @brief AF 2 selection
AnnaBridge	171:3a7713b1edbc	256	*/
AnnaBridge	171:3a7713b1edbc	257	#define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	258	#define GPIO_AF2_TIM4 ((uint8_t)0x02U) /* TIM4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	259	#define GPIO_AF2_TIM5 ((uint8_t)0x02U) /* TIM5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	260
AnnaBridge	171:3a7713b1edbc	261	/**
AnnaBridge	171:3a7713b1edbc	262	* @brief AF 3 selection
AnnaBridge	171:3a7713b1edbc	263	*/
AnnaBridge	171:3a7713b1edbc	264	#define GPIO_AF3_TIM8 ((uint8_t)0x03U) /* TIM8 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	265	#define GPIO_AF3_TIM9 ((uint8_t)0x03U) /* TIM9 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	266	#define GPIO_AF3_TIM10 ((uint8_t)0x03U) /* TIM10 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	267	#define GPIO_AF3_TIM11 ((uint8_t)0x03U) /* TIM11 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	268	#define GPIO_AF3_LPTIM1 ((uint8_t)0x03U) /* LPTIM1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	269
AnnaBridge	171:3a7713b1edbc	270	/**
AnnaBridge	171:3a7713b1edbc	271	* @brief AF 4 selection
AnnaBridge	171:3a7713b1edbc	272	*/
AnnaBridge	171:3a7713b1edbc	273	#define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	274	#define GPIO_AF4_I2C2 ((uint8_t)0x04U) /* I2C2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	275	#define GPIO_AF4_I2C3 ((uint8_t)0x04U) /* I2C3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	276
AnnaBridge	171:3a7713b1edbc	277	/**
AnnaBridge	171:3a7713b1edbc	278	* @brief AF 5 selection
AnnaBridge	171:3a7713b1edbc	279	*/
AnnaBridge	171:3a7713b1edbc	280	#define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	281	#define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2/I2S2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	282	#define GPIO_AF5_SPI3 ((uint8_t)0x05U) /* SPI3/I2S3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	283	#define GPIO_AF5_SPI4 ((uint8_t)0x05U) /* SPI4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	284	#define GPIO_AF5_SPI5 ((uint8_t)0x05U) /* SPI5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	285
AnnaBridge	171:3a7713b1edbc	286	/**
AnnaBridge	171:3a7713b1edbc	287	* @brief AF 6 selection
AnnaBridge	171:3a7713b1edbc	288	*/
AnnaBridge	171:3a7713b1edbc	289	#define GPIO_AF6_SPI3 ((uint8_t)0x06U) /* SPI3/I2S3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	290	#define GPIO_AF6_SAI1 ((uint8_t)0x06U) /* SAI1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	291
AnnaBridge	171:3a7713b1edbc	292	/**
AnnaBridge	171:3a7713b1edbc	293	* @brief AF 7 selection
AnnaBridge	171:3a7713b1edbc	294	*/
AnnaBridge	171:3a7713b1edbc	295	#define GPIO_AF7_USART1 ((uint8_t)0x07U) /* USART1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	296	#define GPIO_AF7_USART2 ((uint8_t)0x07U) /* USART2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	297	#define GPIO_AF7_USART3 ((uint8_t)0x07U) /* USART3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	298	#define GPIO_AF7_UART5 ((uint8_t)0x07U) /* UART5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	299	#define GPIO_AF7_SPI2 ((uint8_t)0x07U) /* SPI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	300	#define GPIO_AF7_SPI3 ((uint8_t)0x07U) /* SPI3 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	301
AnnaBridge	171:3a7713b1edbc	302	/**
AnnaBridge	171:3a7713b1edbc	303	* @brief AF 8 selection
AnnaBridge	171:3a7713b1edbc	304	*/
AnnaBridge	171:3a7713b1edbc	305	#define GPIO_AF8_UART4 ((uint8_t)0x08U) /* UART4 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	306	#define GPIO_AF8_UART5 ((uint8_t)0x08U) /* UART5 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	307	#define GPIO_AF8_USART6 ((uint8_t)0x08U) /* USART6 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	308	#define GPIO_AF8_UART7 ((uint8_t)0x08U) /* UART7 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	309	#define GPIO_AF8_UART8 ((uint8_t)0x08U) /* UART8 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	310	#define GPIO_AF8_SAI2 ((uint8_t)0x08U) /* SAI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	311
AnnaBridge	171:3a7713b1edbc	312	/**
AnnaBridge	171:3a7713b1edbc	313	* @brief AF 9 selection
AnnaBridge	171:3a7713b1edbc	314	*/
AnnaBridge	171:3a7713b1edbc	315	#define GPIO_AF9_CAN1 ((uint8_t)0x09U) /* CAN1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	316	#define GPIO_AF9_TIM12 ((uint8_t)0x09U) /* TIM12 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	317	#define GPIO_AF9_TIM13 ((uint8_t)0x09U) /* TIM13 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	318	#define GPIO_AF9_TIM14 ((uint8_t)0x09U) /* TIM14 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	319	#define GPIO_AF9_QUADSPI ((uint8_t)0x09U) /* QUADSPI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	320
AnnaBridge	171:3a7713b1edbc	321	/**
AnnaBridge	171:3a7713b1edbc	322	* @brief AF 10 selection
AnnaBridge	171:3a7713b1edbc	323	*/
AnnaBridge	171:3a7713b1edbc	324	#define GPIO_AF10_OTG_FS ((uint8_t)0xAU) /* OTG_FS Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	325	#define GPIO_AF10_OTG_HS ((uint8_t)0xAU) /* OTG_HS Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	326	#define GPIO_AF10_QUADSPI ((uint8_t)0xAU) /* QUADSPI Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	327	#define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	328	#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	329
AnnaBridge	171:3a7713b1edbc	330	/**
AnnaBridge	171:3a7713b1edbc	331	* @brief AF 11 selection
AnnaBridge	171:3a7713b1edbc	332	*/
AnnaBridge	171:3a7713b1edbc	333	#define GPIO_AF11_SDMMC2 ((uint8_t)0x0BU) /* SDMMC2 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	334
AnnaBridge	171:3a7713b1edbc	335	/**
AnnaBridge	171:3a7713b1edbc	336	* @brief AF 12 selection
AnnaBridge	171:3a7713b1edbc	337	*/
AnnaBridge	171:3a7713b1edbc	338	#define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	339	#define GPIO_AF12_OTG_HS_FS ((uint8_t)0xCU) /* OTG HS configured in FS, Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	340	#define GPIO_AF12_SDMMC1 ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	341
AnnaBridge	171:3a7713b1edbc	342	/**
AnnaBridge	171:3a7713b1edbc	343	* @brief AF 13 selection
AnnaBridge	171:3a7713b1edbc	344	*/
AnnaBridge	171:3a7713b1edbc	345	#define GPIO_AF13_RNG ((uint8_t)0x0DU) /* RNG Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	346
AnnaBridge	171:3a7713b1edbc	347	/**
AnnaBridge	171:3a7713b1edbc	348	* @brief AF 15 selection
AnnaBridge	171:3a7713b1edbc	349	*/
AnnaBridge	171:3a7713b1edbc	350	#define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
AnnaBridge	171:3a7713b1edbc	351	#endif /* STM32F722xx \|\| STM32F723xx \|\| STM32F732xx \|\| STM32F733xx */
AnnaBridge	171:3a7713b1edbc	352	/----------------------------------------------------------------------------/
AnnaBridge	171:3a7713b1edbc	353
AnnaBridge	171:3a7713b1edbc	354	/**
AnnaBridge	171:3a7713b1edbc	355	* @}
AnnaBridge	171:3a7713b1edbc	356	*/
AnnaBridge	171:3a7713b1edbc	357
AnnaBridge	171:3a7713b1edbc	358	/**
AnnaBridge	171:3a7713b1edbc	359	* @}
AnnaBridge	171:3a7713b1edbc	360	*/
AnnaBridge	171:3a7713b1edbc	361
AnnaBridge	171:3a7713b1edbc	362	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	363	/** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
AnnaBridge	171:3a7713b1edbc	364	* @{
AnnaBridge	171:3a7713b1edbc	365	*/
AnnaBridge	171:3a7713b1edbc	366	/**
AnnaBridge	171:3a7713b1edbc	367	* @}
AnnaBridge	171:3a7713b1edbc	368	*/
AnnaBridge	171:3a7713b1edbc	369
AnnaBridge	171:3a7713b1edbc	370	/* Exported functions --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	371	/** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
AnnaBridge	171:3a7713b1edbc	372	* @{
AnnaBridge	171:3a7713b1edbc	373	*/
AnnaBridge	171:3a7713b1edbc	374	/**
AnnaBridge	171:3a7713b1edbc	375	* @}
AnnaBridge	171:3a7713b1edbc	376	*/
AnnaBridge	171:3a7713b1edbc	377	/* Private types -------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	378	/* Private variables ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	379	/* Private constants ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	380	/** @defgroup GPIOEx_Private_Constants GPIO Private Constants
AnnaBridge	171:3a7713b1edbc	381	* @{
AnnaBridge	171:3a7713b1edbc	382	*/
AnnaBridge	171:3a7713b1edbc	383
AnnaBridge	171:3a7713b1edbc	384	/**
AnnaBridge	171:3a7713b1edbc	385	* @brief GPIO pin available on the platform
AnnaBridge	171:3a7713b1edbc	386	*/
AnnaBridge	171:3a7713b1edbc	387	/* Defines the available pins per GPIOs */
AnnaBridge	171:3a7713b1edbc	388	#define GPIOA_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	389	#define GPIOB_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	390	#define GPIOC_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	391	#define GPIOD_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	392	#define GPIOE_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	393	#define GPIOF_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	394	#define GPIOG_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	395	#define GPIOI_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	396	#define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	397	#define GPIOH_PIN_AVAILABLE GPIO_PIN_All
AnnaBridge	171:3a7713b1edbc	398	#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 \| GPIO_PIN_1 \| GPIO_PIN_2 \| GPIO_PIN_3 \| GPIO_PIN_4 \| \
AnnaBridge	171:3a7713b1edbc	399	GPIO_PIN_5 \| GPIO_PIN_6 \| GPIO_PIN_7)
AnnaBridge	171:3a7713b1edbc	400
AnnaBridge	171:3a7713b1edbc	401	/**
AnnaBridge	171:3a7713b1edbc	402	* @}
AnnaBridge	171:3a7713b1edbc	403	*/
AnnaBridge	171:3a7713b1edbc	404
AnnaBridge	171:3a7713b1edbc	405	/* Private macros ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	406	/** @defgroup GPIOEx_Private_Macros GPIO Private Macros
AnnaBridge	171:3a7713b1edbc	407	* @{
AnnaBridge	171:3a7713b1edbc	408	*/
AnnaBridge	171:3a7713b1edbc	409	/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
AnnaBridge	171:3a7713b1edbc	410	* @{
AnnaBridge	171:3a7713b1edbc	411	*/
AnnaBridge	171:3a7713b1edbc	412	#if defined (STM32F745xx) \|\| defined (STM32F746xx) \|\| defined (STM32F756xx) \|\| defined (STM32F765xx) \|\|\
AnnaBridge	171:3a7713b1edbc	413	defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
AnnaBridge	171:3a7713b1edbc	414	#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
AnnaBridge	171:3a7713b1edbc	415	((__GPIOx__) == (GPIOB))? 1U :\
AnnaBridge	171:3a7713b1edbc	416	((__GPIOx__) == (GPIOC))? 2U :\
AnnaBridge	171:3a7713b1edbc	417	((__GPIOx__) == (GPIOD))? 3U :\
AnnaBridge	171:3a7713b1edbc	418	((__GPIOx__) == (GPIOE))? 4U :\
AnnaBridge	171:3a7713b1edbc	419	((__GPIOx__) == (GPIOF))? 5U :\
AnnaBridge	171:3a7713b1edbc	420	((__GPIOx__) == (GPIOG))? 6U :\
AnnaBridge	171:3a7713b1edbc	421	((__GPIOx__) == (GPIOH))? 7U :\
AnnaBridge	171:3a7713b1edbc	422	((__GPIOx__) == (GPIOI))? 8U :\
AnnaBridge	171:3a7713b1edbc	423	((__GPIOx__) == (GPIOJ))? 9U : 10U)
AnnaBridge	171:3a7713b1edbc	424	#endif /* STM32F745xx \|\| STM32F746xx \|\| STM32F756xx \|\| STM32F765xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
AnnaBridge	171:3a7713b1edbc	425
AnnaBridge	171:3a7713b1edbc	426	#if defined (STM32F722xx) \|\| defined (STM32F723xx) \|\| defined (STM32F732xx) \|\| defined (STM32F733xx)
AnnaBridge	171:3a7713b1edbc	427	#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
AnnaBridge	171:3a7713b1edbc	428	((__GPIOx__) == (GPIOB))? 1U :\
AnnaBridge	171:3a7713b1edbc	429	((__GPIOx__) == (GPIOC))? 2U :\
AnnaBridge	171:3a7713b1edbc	430	((__GPIOx__) == (GPIOD))? 3U :\
AnnaBridge	171:3a7713b1edbc	431	((__GPIOx__) == (GPIOE))? 4U :\
AnnaBridge	171:3a7713b1edbc	432	((__GPIOx__) == (GPIOF))? 5U :\
AnnaBridge	171:3a7713b1edbc	433	((__GPIOx__) == (GPIOG))? 6U :\
AnnaBridge	171:3a7713b1edbc	434	((__GPIOx__) == (GPIOH))? 7U : 8U)
AnnaBridge	171:3a7713b1edbc	435	#endif /* STM32F722xx \|\| STM32F723xx \|\| STM32F732xx \|\| STM32F733xx */
AnnaBridge	171:3a7713b1edbc	436	/**
AnnaBridge	171:3a7713b1edbc	437	* @}
AnnaBridge	171:3a7713b1edbc	438	*/
AnnaBridge	171:3a7713b1edbc	439
AnnaBridge	171:3a7713b1edbc	440	#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
AnnaBridge	171:3a7713b1edbc	441	((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	442	(((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	443	(((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	444	(((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	445	(((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	446	(((__INSTANCE__) == GPIOF) && (((__PIN__) & (GPIOF_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOF_PIN_AVAILABLE)) == (GPIOF_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	447	(((__INSTANCE__) == GPIOG) && (((__PIN__) & (GPIOG_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOG_PIN_AVAILABLE)) == (GPIOG_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	448	(((__INSTANCE__) == GPIOI) && (((__PIN__) & (GPIOI_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOI_PIN_AVAILABLE)) == (GPIOI_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	449	(((__INSTANCE__) == GPIOJ) && (((__PIN__) & (GPIOJ_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOJ_PIN_AVAILABLE)) == (GPIOJ_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	450	(((__INSTANCE__) == GPIOK) && (((__PIN__) & (GPIOK_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOK_PIN_AVAILABLE)) == (GPIOK_PIN_AVAILABLE))) \|\| \
AnnaBridge	171:3a7713b1edbc	451	(((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
AnnaBridge	171:3a7713b1edbc	452	/** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
AnnaBridge	171:3a7713b1edbc	453	* @{
AnnaBridge	171:3a7713b1edbc	454	*/
AnnaBridge	171:3a7713b1edbc	455	#if defined(STM32F756xx) \|\| defined(STM32F746xx)
AnnaBridge	171:3a7713b1edbc	456	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	457	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	458	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	459	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	460	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	461	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	462	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	463	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
AnnaBridge	171:3a7713b1edbc	464	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	465	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
AnnaBridge	171:3a7713b1edbc	466	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	467	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
AnnaBridge	171:3a7713b1edbc	468	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
AnnaBridge	171:3a7713b1edbc	469	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	470	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	471	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	472	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	473	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
AnnaBridge	171:3a7713b1edbc	474	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	475	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	476	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	477	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
AnnaBridge	171:3a7713b1edbc	478	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	479	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	480	((AF) == GPIO_AF9_LTDC) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	481	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
AnnaBridge	171:3a7713b1edbc	482	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
AnnaBridge	171:3a7713b1edbc	483	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
AnnaBridge	171:3a7713b1edbc	484	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT) \|\| \
AnnaBridge	171:3a7713b1edbc	485	((AF) == GPIO_AF13_DCMI) \|\| ((AF) == GPIO_AF14_LTDC))
AnnaBridge	171:3a7713b1edbc	486	#elif defined(STM32F745xx)
AnnaBridge	171:3a7713b1edbc	487	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	488	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	489	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	490	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	491	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	492	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	493	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	494	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
AnnaBridge	171:3a7713b1edbc	495	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	496	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
AnnaBridge	171:3a7713b1edbc	497	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	498	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
AnnaBridge	171:3a7713b1edbc	499	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
AnnaBridge	171:3a7713b1edbc	500	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	501	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	502	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	503	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	504	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
AnnaBridge	171:3a7713b1edbc	505	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	506	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	507	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	508	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
AnnaBridge	171:3a7713b1edbc	509	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	510	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	511	((AF) == GPIO_AF13_DCMI) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	512	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
AnnaBridge	171:3a7713b1edbc	513	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
AnnaBridge	171:3a7713b1edbc	514	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
AnnaBridge	171:3a7713b1edbc	515	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT))
AnnaBridge	171:3a7713b1edbc	516	#elif defined(STM32F767xx) \|\| defined(STM32F777xx)
AnnaBridge	171:3a7713b1edbc	517	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	518	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	519	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	520	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	521	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	522	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	523	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	524	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
AnnaBridge	171:3a7713b1edbc	525	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	526	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
AnnaBridge	171:3a7713b1edbc	527	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	528	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
AnnaBridge	171:3a7713b1edbc	529	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
AnnaBridge	171:3a7713b1edbc	530	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	531	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	532	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	533	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	534	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
AnnaBridge	171:3a7713b1edbc	535	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	536	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	537	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	538	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
AnnaBridge	171:3a7713b1edbc	539	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	540	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	541	((AF) == GPIO_AF10_OTG_FS) \|\| ((AF) == GPIO_AF9_LTDC) \|\| \
AnnaBridge	171:3a7713b1edbc	542	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
AnnaBridge	171:3a7713b1edbc	543	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
AnnaBridge	171:3a7713b1edbc	544	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
AnnaBridge	171:3a7713b1edbc	545	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	546	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
AnnaBridge	171:3a7713b1edbc	547	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
AnnaBridge	171:3a7713b1edbc	548	((AF) == GPIO_AF14_LTDC))
AnnaBridge	171:3a7713b1edbc	549	#elif defined(STM32F769xx) \|\| defined(STM32F779xx)
AnnaBridge	171:3a7713b1edbc	550	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	551	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	552	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	553	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	554	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	555	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	556	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	557	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
AnnaBridge	171:3a7713b1edbc	558	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	559	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
AnnaBridge	171:3a7713b1edbc	560	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	561	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
AnnaBridge	171:3a7713b1edbc	562	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
AnnaBridge	171:3a7713b1edbc	563	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	564	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	565	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	566	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	567	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
AnnaBridge	171:3a7713b1edbc	568	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	569	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	570	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	571	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
AnnaBridge	171:3a7713b1edbc	572	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	573	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	574	((AF) == GPIO_AF9_LTDC) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	575	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
AnnaBridge	171:3a7713b1edbc	576	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
AnnaBridge	171:3a7713b1edbc	577	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
AnnaBridge	171:3a7713b1edbc	578	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	579	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
AnnaBridge	171:3a7713b1edbc	580	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
AnnaBridge	171:3a7713b1edbc	581	((AF) == GPIO_AF14_LTDC) \|\| ((AF) == GPIO_AF13_DSI))
AnnaBridge	171:3a7713b1edbc	582	#elif defined(STM32F765xx)
AnnaBridge	171:3a7713b1edbc	583	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	584	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	585	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	586	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	587	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	588	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	589	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	590	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
AnnaBridge	171:3a7713b1edbc	591	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	592	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
AnnaBridge	171:3a7713b1edbc	593	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	594	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
AnnaBridge	171:3a7713b1edbc	595	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
AnnaBridge	171:3a7713b1edbc	596	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	597	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	598	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	599	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	600	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
AnnaBridge	171:3a7713b1edbc	601	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	602	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	603	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	604	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
AnnaBridge	171:3a7713b1edbc	605	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	606	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	607	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
AnnaBridge	171:3a7713b1edbc	608	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
AnnaBridge	171:3a7713b1edbc	609	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
AnnaBridge	171:3a7713b1edbc	610	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
AnnaBridge	171:3a7713b1edbc	611	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
AnnaBridge	171:3a7713b1edbc	612	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
AnnaBridge	171:3a7713b1edbc	613	((AF) == GPIO_AF10_OTG_FS))
AnnaBridge	171:3a7713b1edbc	614	#elif defined (STM32F722xx) \|\| defined (STM32F723xx) \|\| defined (STM32F732xx) \|\| defined (STM32F733xx)
AnnaBridge	171:3a7713b1edbc	615	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	616	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
AnnaBridge	171:3a7713b1edbc	617	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
AnnaBridge	171:3a7713b1edbc	618	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
AnnaBridge	171:3a7713b1edbc	619	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
AnnaBridge	171:3a7713b1edbc	620	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
AnnaBridge	171:3a7713b1edbc	621	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
AnnaBridge	171:3a7713b1edbc	622	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
AnnaBridge	171:3a7713b1edbc	623	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF5_SPI1) \|\| \
AnnaBridge	171:3a7713b1edbc	624	((AF) == GPIO_AF5_SPI2) \|\| ((AF) == GPIO_AF5_SPI3) \|\| \
AnnaBridge	171:3a7713b1edbc	625	((AF) == GPIO_AF5_SPI4) \|\| ((AF) == GPIO_AF5_SPI5) \|\| \
AnnaBridge	171:3a7713b1edbc	626	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
AnnaBridge	171:3a7713b1edbc	627	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
AnnaBridge	171:3a7713b1edbc	628	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
AnnaBridge	171:3a7713b1edbc	629	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	630	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
AnnaBridge	171:3a7713b1edbc	631	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
AnnaBridge	171:3a7713b1edbc	632	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
AnnaBridge	171:3a7713b1edbc	633	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
AnnaBridge	171:3a7713b1edbc	634	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM14) \|\| \
AnnaBridge	171:3a7713b1edbc	635	((AF) == GPIO_AF9_QUADSPI) \|\| ((AF) == GPIO_AF10_OTG_HS) \|\| \
AnnaBridge	171:3a7713b1edbc	636	((AF) == GPIO_AF10_SAI2) \|\| ((AF) == GPIO_AF10_QUADSPI) \|\| \
AnnaBridge	171:3a7713b1edbc	637	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
AnnaBridge	171:3a7713b1edbc	638	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
AnnaBridge	171:3a7713b1edbc	639	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT) \|\| \
AnnaBridge	171:3a7713b1edbc	640	((AF) == GPIO_AF10_OTG_FS))
AnnaBridge	171:3a7713b1edbc	641	#endif /* STM32F756xx \|\| STM32F746xx */
AnnaBridge	171:3a7713b1edbc	642	/**
AnnaBridge	171:3a7713b1edbc	643	* @}
AnnaBridge	171:3a7713b1edbc	644	*/
AnnaBridge	171:3a7713b1edbc	645
AnnaBridge	171:3a7713b1edbc	646	/**
AnnaBridge	171:3a7713b1edbc	647	* @}
AnnaBridge	171:3a7713b1edbc	648	*/
AnnaBridge	171:3a7713b1edbc	649
AnnaBridge	171:3a7713b1edbc	650	/* Private functions ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	651	/** @defgroup GPIOEx_Private_Functions GPIO Private Functions
AnnaBridge	171:3a7713b1edbc	652	* @{
AnnaBridge	171:3a7713b1edbc	653	*/
AnnaBridge	171:3a7713b1edbc	654
AnnaBridge	171:3a7713b1edbc	655	/**
AnnaBridge	171:3a7713b1edbc	656	* @}
AnnaBridge	171:3a7713b1edbc	657	*/
AnnaBridge	171:3a7713b1edbc	658
AnnaBridge	171:3a7713b1edbc	659	/**
AnnaBridge	171:3a7713b1edbc	660	* @}
AnnaBridge	171:3a7713b1edbc	661	*/
AnnaBridge	171:3a7713b1edbc	662
AnnaBridge	171:3a7713b1edbc	663	/**
AnnaBridge	171:3a7713b1edbc	664	* @}
AnnaBridge	171:3a7713b1edbc	665	*/
AnnaBridge	171:3a7713b1edbc	666
AnnaBridge	171:3a7713b1edbc	667	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	668	}
AnnaBridge	171:3a7713b1edbc	669	#endif
AnnaBridge	171:3a7713b1edbc	670
AnnaBridge	171:3a7713b1edbc	671	#endif /* __STM32F7xx_HAL_GPIO_EX_H */
AnnaBridge	171:3a7713b1edbc	672
AnnaBridge	171:3a7713b1edbc	673	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/