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TARGET_DISCO_F746NG/TOOLCHAIN_IAR/stm32f7xx_hal_spdifrx.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f7xx_hal_spdifrx.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of SPDIFRX HAL module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F7xx_HAL_SPDIFRX_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F7xx_HAL_SPDIFRX_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f7xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | #if defined (SPDIFRX) |
| AnnaBridge | 171:3a7713b1edbc | 48 | |
| AnnaBridge | 171:3a7713b1edbc | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 50 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 51 | */ |
| AnnaBridge | 171:3a7713b1edbc | 52 | |
| AnnaBridge | 171:3a7713b1edbc | 53 | /** @addtogroup SPDIFRX |
| AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 55 | */ |
| AnnaBridge | 171:3a7713b1edbc | 56 | |
| AnnaBridge | 171:3a7713b1edbc | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 58 | /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 59 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 60 | */ |
| AnnaBridge | 171:3a7713b1edbc | 61 | |
| AnnaBridge | 171:3a7713b1edbc | 62 | /** |
| AnnaBridge | 171:3a7713b1edbc | 63 | * @brief SPDIFRX Init structure definition |
| AnnaBridge | 171:3a7713b1edbc | 64 | */ |
| AnnaBridge | 171:3a7713b1edbc | 65 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 66 | { |
| AnnaBridge | 171:3a7713b1edbc | 67 | uint32_t InputSelection; /*!< Specifies the SPDIF input selection. |
| AnnaBridge | 171:3a7713b1edbc | 68 | This parameter can be a value of @ref SPDIFRX_Input_Selection */ |
| AnnaBridge | 171:3a7713b1edbc | 69 | |
| AnnaBridge | 171:3a7713b1edbc | 70 | uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. |
| AnnaBridge | 171:3a7713b1edbc | 71 | This parameter can be a value of @ref SPDIFRX_Max_Retries */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | |
| AnnaBridge | 171:3a7713b1edbc | 73 | uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. |
| AnnaBridge | 171:3a7713b1edbc | 74 | This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ |
| AnnaBridge | 171:3a7713b1edbc | 75 | |
| AnnaBridge | 171:3a7713b1edbc | 76 | uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. |
| AnnaBridge | 171:3a7713b1edbc | 77 | This parameter can be a value of @ref SPDIFRX_Channel_Selection */ |
| AnnaBridge | 171:3a7713b1edbc | 78 | |
| AnnaBridge | 171:3a7713b1edbc | 79 | uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). |
| AnnaBridge | 171:3a7713b1edbc | 80 | This parameter can be a value of @ref SPDIFRX_Data_Format */ |
| AnnaBridge | 171:3a7713b1edbc | 81 | |
| AnnaBridge | 171:3a7713b1edbc | 82 | uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. |
| AnnaBridge | 171:3a7713b1edbc | 83 | This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 84 | |
| AnnaBridge | 171:3a7713b1edbc | 85 | uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref SPDIFRX_PT_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 87 | |
| AnnaBridge | 171:3a7713b1edbc | 88 | uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 89 | This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 90 | |
| AnnaBridge | 171:3a7713b1edbc | 91 | uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 92 | This parameter can be a value of @ref SPDIFRX_V_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 93 | |
| AnnaBridge | 171:3a7713b1edbc | 94 | uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 95 | This parameter can be a value of @ref SPDIFRX_PE_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 96 | |
| AnnaBridge | 171:3a7713b1edbc | 97 | }SPDIFRX_InitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 98 | |
| AnnaBridge | 171:3a7713b1edbc | 99 | /** |
| AnnaBridge | 171:3a7713b1edbc | 100 | * @brief SPDIFRX SetDataFormat structure definition |
| AnnaBridge | 171:3a7713b1edbc | 101 | */ |
| AnnaBridge | 171:3a7713b1edbc | 102 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 103 | { |
| AnnaBridge | 171:3a7713b1edbc | 104 | uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). |
| AnnaBridge | 171:3a7713b1edbc | 105 | This parameter can be a value of @ref SPDIFRX_Data_Format */ |
| AnnaBridge | 171:3a7713b1edbc | 106 | |
| AnnaBridge | 171:3a7713b1edbc | 107 | uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. |
| AnnaBridge | 171:3a7713b1edbc | 108 | This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 109 | |
| AnnaBridge | 171:3a7713b1edbc | 110 | uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 111 | This parameter can be a value of @ref SPDIFRX_PT_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 112 | |
| AnnaBridge | 171:3a7713b1edbc | 113 | uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 114 | This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 115 | |
| AnnaBridge | 171:3a7713b1edbc | 116 | uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 117 | This parameter can be a value of @ref SPDIFRX_V_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 118 | |
| AnnaBridge | 171:3a7713b1edbc | 119 | uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. |
| AnnaBridge | 171:3a7713b1edbc | 120 | This parameter can be a value of @ref SPDIFRX_PE_Mask */ |
| AnnaBridge | 171:3a7713b1edbc | 121 | |
| AnnaBridge | 171:3a7713b1edbc | 122 | }SPDIFRX_SetDataFormatTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 123 | |
| AnnaBridge | 171:3a7713b1edbc | 124 | /** |
| AnnaBridge | 171:3a7713b1edbc | 125 | * @brief HAL State structures definition |
| AnnaBridge | 171:3a7713b1edbc | 126 | */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 128 | { |
| AnnaBridge | 171:3a7713b1edbc | 129 | HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ |
| AnnaBridge | 171:3a7713b1edbc | 131 | HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 132 | HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 133 | HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 134 | HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ |
| AnnaBridge | 171:3a7713b1edbc | 135 | }HAL_SPDIFRX_StateTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 136 | |
| AnnaBridge | 171:3a7713b1edbc | 137 | /** |
| AnnaBridge | 171:3a7713b1edbc | 138 | * @brief SPDIFRX handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 139 | */ |
| AnnaBridge | 171:3a7713b1edbc | 140 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 141 | { |
| AnnaBridge | 171:3a7713b1edbc | 142 | SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ |
| AnnaBridge | 171:3a7713b1edbc | 143 | |
| AnnaBridge | 171:3a7713b1edbc | 144 | SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | |
| AnnaBridge | 171:3a7713b1edbc | 146 | uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 147 | |
| AnnaBridge | 171:3a7713b1edbc | 148 | uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 149 | |
| AnnaBridge | 171:3a7713b1edbc | 150 | __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | |
| AnnaBridge | 171:3a7713b1edbc | 152 | __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter |
| AnnaBridge | 171:3a7713b1edbc | 153 | (This field is initialized at the |
| AnnaBridge | 171:3a7713b1edbc | 154 | same value as transfer size at the |
| AnnaBridge | 171:3a7713b1edbc | 155 | beginning of the transfer and |
| AnnaBridge | 171:3a7713b1edbc | 156 | decremented when a sample is received. |
| AnnaBridge | 171:3a7713b1edbc | 157 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
| AnnaBridge | 171:3a7713b1edbc | 158 | |
| AnnaBridge | 171:3a7713b1edbc | 159 | __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 160 | |
| AnnaBridge | 171:3a7713b1edbc | 161 | __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter |
| AnnaBridge | 171:3a7713b1edbc | 162 | (This field is initialized at the |
| AnnaBridge | 171:3a7713b1edbc | 163 | same value as transfer size at the |
| AnnaBridge | 171:3a7713b1edbc | 164 | beginning of the transfer and |
| AnnaBridge | 171:3a7713b1edbc | 165 | decremented when a sample is received. |
| AnnaBridge | 171:3a7713b1edbc | 166 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
| AnnaBridge | 171:3a7713b1edbc | 167 | |
| AnnaBridge | 171:3a7713b1edbc | 168 | DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | |
| AnnaBridge | 171:3a7713b1edbc | 170 | DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 171 | |
| AnnaBridge | 171:3a7713b1edbc | 172 | __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | |
| AnnaBridge | 171:3a7713b1edbc | 174 | __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ |
| AnnaBridge | 171:3a7713b1edbc | 175 | |
| AnnaBridge | 171:3a7713b1edbc | 176 | __IO uint32_t ErrorCode; /* SPDIFRX Error code */ |
| AnnaBridge | 171:3a7713b1edbc | 177 | |
| AnnaBridge | 171:3a7713b1edbc | 178 | }SPDIFRX_HandleTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 179 | /** |
| AnnaBridge | 171:3a7713b1edbc | 180 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 181 | */ |
| AnnaBridge | 171:3a7713b1edbc | 182 | |
| AnnaBridge | 171:3a7713b1edbc | 183 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 184 | /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 185 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 186 | */ |
| AnnaBridge | 171:3a7713b1edbc | 187 | /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code |
| AnnaBridge | 171:3a7713b1edbc | 188 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 189 | */ |
| AnnaBridge | 171:3a7713b1edbc | 190 | #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
| AnnaBridge | 171:3a7713b1edbc | 191 | #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ |
| AnnaBridge | 171:3a7713b1edbc | 192 | #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ |
| AnnaBridge | 171:3a7713b1edbc | 193 | #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ |
| AnnaBridge | 171:3a7713b1edbc | 194 | #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ |
| AnnaBridge | 171:3a7713b1edbc | 195 | #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ |
| AnnaBridge | 171:3a7713b1edbc | 196 | /** |
| AnnaBridge | 171:3a7713b1edbc | 197 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 198 | */ |
| AnnaBridge | 171:3a7713b1edbc | 199 | |
| AnnaBridge | 171:3a7713b1edbc | 200 | /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection |
| AnnaBridge | 171:3a7713b1edbc | 201 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 202 | */ |
| AnnaBridge | 171:3a7713b1edbc | 203 | #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 204 | #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) |
| AnnaBridge | 171:3a7713b1edbc | 205 | #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) |
| AnnaBridge | 171:3a7713b1edbc | 206 | #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) |
| AnnaBridge | 171:3a7713b1edbc | 207 | /** |
| AnnaBridge | 171:3a7713b1edbc | 208 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 209 | */ |
| AnnaBridge | 171:3a7713b1edbc | 210 | |
| AnnaBridge | 171:3a7713b1edbc | 211 | /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries |
| AnnaBridge | 171:3a7713b1edbc | 212 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 213 | */ |
| AnnaBridge | 171:3a7713b1edbc | 214 | #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 215 | #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) |
| AnnaBridge | 171:3a7713b1edbc | 216 | #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) |
| AnnaBridge | 171:3a7713b1edbc | 217 | #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) |
| AnnaBridge | 171:3a7713b1edbc | 218 | /** |
| AnnaBridge | 171:3a7713b1edbc | 219 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 220 | */ |
| AnnaBridge | 171:3a7713b1edbc | 221 | |
| AnnaBridge | 171:3a7713b1edbc | 222 | /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity |
| AnnaBridge | 171:3a7713b1edbc | 223 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 224 | */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 226 | #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) |
| AnnaBridge | 171:3a7713b1edbc | 227 | /** |
| AnnaBridge | 171:3a7713b1edbc | 228 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 229 | */ |
| AnnaBridge | 171:3a7713b1edbc | 230 | |
| AnnaBridge | 171:3a7713b1edbc | 231 | /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask |
| AnnaBridge | 171:3a7713b1edbc | 232 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 233 | */ |
| AnnaBridge | 171:3a7713b1edbc | 234 | #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 235 | #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) |
| AnnaBridge | 171:3a7713b1edbc | 236 | /** |
| AnnaBridge | 171:3a7713b1edbc | 237 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 238 | */ |
| AnnaBridge | 171:3a7713b1edbc | 239 | |
| AnnaBridge | 171:3a7713b1edbc | 240 | /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask |
| AnnaBridge | 171:3a7713b1edbc | 241 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 242 | */ |
| AnnaBridge | 171:3a7713b1edbc | 243 | #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */ |
| AnnaBridge | 171:3a7713b1edbc | 244 | #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ |
| AnnaBridge | 171:3a7713b1edbc | 245 | /** |
| AnnaBridge | 171:3a7713b1edbc | 246 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 247 | */ |
| AnnaBridge | 171:3a7713b1edbc | 248 | |
| AnnaBridge | 171:3a7713b1edbc | 249 | /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask |
| AnnaBridge | 171:3a7713b1edbc | 250 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 251 | */ |
| AnnaBridge | 171:3a7713b1edbc | 252 | #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 253 | #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) |
| AnnaBridge | 171:3a7713b1edbc | 254 | /** |
| AnnaBridge | 171:3a7713b1edbc | 255 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 256 | */ |
| AnnaBridge | 171:3a7713b1edbc | 257 | |
| AnnaBridge | 171:3a7713b1edbc | 258 | /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask |
| AnnaBridge | 171:3a7713b1edbc | 259 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 260 | */ |
| AnnaBridge | 171:3a7713b1edbc | 261 | #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 262 | #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) |
| AnnaBridge | 171:3a7713b1edbc | 263 | /** |
| AnnaBridge | 171:3a7713b1edbc | 264 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 265 | */ |
| AnnaBridge | 171:3a7713b1edbc | 266 | |
| AnnaBridge | 171:3a7713b1edbc | 267 | /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection |
| AnnaBridge | 171:3a7713b1edbc | 268 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 269 | */ |
| AnnaBridge | 171:3a7713b1edbc | 270 | #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 271 | #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) |
| AnnaBridge | 171:3a7713b1edbc | 272 | /** |
| AnnaBridge | 171:3a7713b1edbc | 273 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 274 | */ |
| AnnaBridge | 171:3a7713b1edbc | 275 | |
| AnnaBridge | 171:3a7713b1edbc | 276 | /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format |
| AnnaBridge | 171:3a7713b1edbc | 277 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 278 | */ |
| AnnaBridge | 171:3a7713b1edbc | 279 | #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 280 | #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) |
| AnnaBridge | 171:3a7713b1edbc | 281 | #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) |
| AnnaBridge | 171:3a7713b1edbc | 282 | /** |
| AnnaBridge | 171:3a7713b1edbc | 283 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 284 | */ |
| AnnaBridge | 171:3a7713b1edbc | 285 | |
| AnnaBridge | 171:3a7713b1edbc | 286 | /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode |
| AnnaBridge | 171:3a7713b1edbc | 287 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 288 | */ |
| AnnaBridge | 171:3a7713b1edbc | 289 | #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 290 | #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) |
| AnnaBridge | 171:3a7713b1edbc | 291 | /** |
| AnnaBridge | 171:3a7713b1edbc | 292 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 293 | */ |
| AnnaBridge | 171:3a7713b1edbc | 294 | |
| AnnaBridge | 171:3a7713b1edbc | 295 | /** @defgroup SPDIFRX_State SPDIFRX State |
| AnnaBridge | 171:3a7713b1edbc | 296 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 297 | */ |
| AnnaBridge | 171:3a7713b1edbc | 298 | |
| AnnaBridge | 171:3a7713b1edbc | 299 | #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) |
| AnnaBridge | 171:3a7713b1edbc | 300 | #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) |
| AnnaBridge | 171:3a7713b1edbc | 301 | #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) |
| AnnaBridge | 171:3a7713b1edbc | 302 | /** |
| AnnaBridge | 171:3a7713b1edbc | 303 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 304 | */ |
| AnnaBridge | 171:3a7713b1edbc | 305 | |
| AnnaBridge | 171:3a7713b1edbc | 306 | /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition |
| AnnaBridge | 171:3a7713b1edbc | 307 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 308 | */ |
| AnnaBridge | 171:3a7713b1edbc | 309 | #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) |
| AnnaBridge | 171:3a7713b1edbc | 310 | #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) |
| AnnaBridge | 171:3a7713b1edbc | 311 | #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) |
| AnnaBridge | 171:3a7713b1edbc | 312 | #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) |
| AnnaBridge | 171:3a7713b1edbc | 313 | #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) |
| AnnaBridge | 171:3a7713b1edbc | 314 | #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) |
| AnnaBridge | 171:3a7713b1edbc | 315 | #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) |
| AnnaBridge | 171:3a7713b1edbc | 316 | /** |
| AnnaBridge | 171:3a7713b1edbc | 317 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 318 | */ |
| AnnaBridge | 171:3a7713b1edbc | 319 | |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 322 | */ |
| AnnaBridge | 171:3a7713b1edbc | 323 | #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) |
| AnnaBridge | 171:3a7713b1edbc | 324 | #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) |
| AnnaBridge | 171:3a7713b1edbc | 325 | #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) |
| AnnaBridge | 171:3a7713b1edbc | 326 | #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) |
| AnnaBridge | 171:3a7713b1edbc | 327 | #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) |
| AnnaBridge | 171:3a7713b1edbc | 328 | #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) |
| AnnaBridge | 171:3a7713b1edbc | 329 | #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) |
| AnnaBridge | 171:3a7713b1edbc | 330 | #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) |
| AnnaBridge | 171:3a7713b1edbc | 331 | #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) |
| AnnaBridge | 171:3a7713b1edbc | 332 | /** |
| AnnaBridge | 171:3a7713b1edbc | 333 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 334 | */ |
| AnnaBridge | 171:3a7713b1edbc | 335 | |
| AnnaBridge | 171:3a7713b1edbc | 336 | /** |
| AnnaBridge | 171:3a7713b1edbc | 337 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 338 | */ |
| AnnaBridge | 171:3a7713b1edbc | 339 | |
| AnnaBridge | 171:3a7713b1edbc | 340 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 341 | /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 342 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 343 | */ |
| AnnaBridge | 171:3a7713b1edbc | 344 | |
| AnnaBridge | 171:3a7713b1edbc | 345 | /** @brief Reset SPDIFRX handle state |
| AnnaBridge | 171:3a7713b1edbc | 346 | * @param __HANDLE__ SPDIFRX handle. |
| AnnaBridge | 171:3a7713b1edbc | 347 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 348 | */ |
| AnnaBridge | 171:3a7713b1edbc | 349 | #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN) |
| AnnaBridge | 171:3a7713b1edbc | 350 | |
| AnnaBridge | 171:3a7713b1edbc | 351 | /** @brief Disable the specified SPDIFRX peripheral (IDLE State). |
| AnnaBridge | 171:3a7713b1edbc | 352 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 353 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 354 | */ |
| AnnaBridge | 171:3a7713b1edbc | 355 | #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) |
| AnnaBridge | 171:3a7713b1edbc | 356 | |
| AnnaBridge | 171:3a7713b1edbc | 357 | /** @brief Enable the specified SPDIFRX peripheral (SYNC State). |
| AnnaBridge | 171:3a7713b1edbc | 358 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 359 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 360 | */ |
| AnnaBridge | 171:3a7713b1edbc | 361 | #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) |
| AnnaBridge | 171:3a7713b1edbc | 362 | |
| AnnaBridge | 171:3a7713b1edbc | 363 | |
| AnnaBridge | 171:3a7713b1edbc | 364 | /** @brief Enable the specified SPDIFRX peripheral (RCV State). |
| AnnaBridge | 171:3a7713b1edbc | 365 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 366 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 367 | */ |
| AnnaBridge | 171:3a7713b1edbc | 368 | #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) |
| AnnaBridge | 171:3a7713b1edbc | 369 | |
| AnnaBridge | 171:3a7713b1edbc | 370 | |
| AnnaBridge | 171:3a7713b1edbc | 371 | /** @brief Enable or disable the specified SPDIFRX interrupts. |
| AnnaBridge | 171:3a7713b1edbc | 372 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 373 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
| AnnaBridge | 171:3a7713b1edbc | 374 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 375 | * @arg SPDIFRX_IT_RXNE |
| AnnaBridge | 171:3a7713b1edbc | 376 | * @arg SPDIFRX_IT_CSRNE |
| AnnaBridge | 171:3a7713b1edbc | 377 | * @arg SPDIFRX_IT_PERRIE |
| AnnaBridge | 171:3a7713b1edbc | 378 | * @arg SPDIFRX_IT_OVRIE |
| AnnaBridge | 171:3a7713b1edbc | 379 | * @arg SPDIFRX_IT_SBLKIE |
| AnnaBridge | 171:3a7713b1edbc | 380 | * @arg SPDIFRX_IT_SYNCDIE |
| AnnaBridge | 171:3a7713b1edbc | 381 | * @arg SPDIFRX_IT_IFEIE |
| AnnaBridge | 171:3a7713b1edbc | 382 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 383 | */ |
| AnnaBridge | 171:3a7713b1edbc | 384 | #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) |
| AnnaBridge | 171:3a7713b1edbc | 385 | #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__))) |
| AnnaBridge | 171:3a7713b1edbc | 386 | |
| AnnaBridge | 171:3a7713b1edbc | 387 | /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. |
| AnnaBridge | 171:3a7713b1edbc | 388 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 389 | * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. |
| AnnaBridge | 171:3a7713b1edbc | 390 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 391 | * @arg SPDIFRX_IT_RXNE |
| AnnaBridge | 171:3a7713b1edbc | 392 | * @arg SPDIFRX_IT_CSRNE |
| AnnaBridge | 171:3a7713b1edbc | 393 | * @arg SPDIFRX_IT_PERRIE |
| AnnaBridge | 171:3a7713b1edbc | 394 | * @arg SPDIFRX_IT_OVRIE |
| AnnaBridge | 171:3a7713b1edbc | 395 | * @arg SPDIFRX_IT_SBLKIE |
| AnnaBridge | 171:3a7713b1edbc | 396 | * @arg SPDIFRX_IT_SYNCDIE |
| AnnaBridge | 171:3a7713b1edbc | 397 | * @arg SPDIFRX_IT_IFEIE |
| AnnaBridge | 171:3a7713b1edbc | 398 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 399 | */ |
| AnnaBridge | 171:3a7713b1edbc | 400 | #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 171:3a7713b1edbc | 401 | |
| AnnaBridge | 171:3a7713b1edbc | 402 | /** @brief Checks whether the specified SPDIFRX flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 403 | * @param __HANDLE__ specifies the SPDIFRX Handle. |
| AnnaBridge | 171:3a7713b1edbc | 404 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 405 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 406 | * @arg SPDIFRX_FLAG_RXNE |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @arg SPDIFRX_FLAG_CSRNE |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @arg SPDIFRX_FLAG_PERR |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @arg SPDIFRX_FLAG_OVR |
| AnnaBridge | 171:3a7713b1edbc | 410 | * @arg SPDIFRX_FLAG_SBD |
| AnnaBridge | 171:3a7713b1edbc | 411 | * @arg SPDIFRX_FLAG_SYNCD |
| AnnaBridge | 171:3a7713b1edbc | 412 | * @arg SPDIFRX_FLAG_FERR |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @arg SPDIFRX_FLAG_SERR |
| AnnaBridge | 171:3a7713b1edbc | 414 | * @arg SPDIFRX_FLAG_TERR |
| AnnaBridge | 171:3a7713b1edbc | 415 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 416 | */ |
| AnnaBridge | 171:3a7713b1edbc | 417 | #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 418 | |
| AnnaBridge | 171:3a7713b1edbc | 419 | /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. |
| AnnaBridge | 171:3a7713b1edbc | 420 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 421 | * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set |
| AnnaBridge | 171:3a7713b1edbc | 422 | * to clear the corresponding interrupt |
| AnnaBridge | 171:3a7713b1edbc | 423 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 424 | * @arg SPDIFRX_FLAG_PERR |
| AnnaBridge | 171:3a7713b1edbc | 425 | * @arg SPDIFRX_FLAG_OVR |
| AnnaBridge | 171:3a7713b1edbc | 426 | * @arg SPDIFRX_SR_SBD |
| AnnaBridge | 171:3a7713b1edbc | 427 | * @arg SPDIFRX_SR_SYNCD |
| AnnaBridge | 171:3a7713b1edbc | 428 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 429 | */ |
| AnnaBridge | 171:3a7713b1edbc | 430 | #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) |
| AnnaBridge | 171:3a7713b1edbc | 431 | |
| AnnaBridge | 171:3a7713b1edbc | 432 | /** |
| AnnaBridge | 171:3a7713b1edbc | 433 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 434 | */ |
| AnnaBridge | 171:3a7713b1edbc | 435 | |
| AnnaBridge | 171:3a7713b1edbc | 436 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 437 | /** @addtogroup SPDIFRX_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 438 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 439 | */ |
| AnnaBridge | 171:3a7713b1edbc | 440 | |
| AnnaBridge | 171:3a7713b1edbc | 441 | /** @addtogroup SPDIFRX_Exported_Functions_Group1 |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 443 | */ |
| AnnaBridge | 171:3a7713b1edbc | 444 | /* Initialization/de-initialization functions **********************************/ |
| AnnaBridge | 171:3a7713b1edbc | 445 | HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 446 | HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 447 | void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 448 | void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 449 | HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); |
| AnnaBridge | 171:3a7713b1edbc | 450 | /** |
| AnnaBridge | 171:3a7713b1edbc | 451 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 452 | */ |
| AnnaBridge | 171:3a7713b1edbc | 453 | |
| AnnaBridge | 171:3a7713b1edbc | 454 | /** @addtogroup SPDIFRX_Exported_Functions_Group2 |
| AnnaBridge | 171:3a7713b1edbc | 455 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 456 | */ |
| AnnaBridge | 171:3a7713b1edbc | 457 | /* I/O operation functions ***************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 458 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 459 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 460 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 461 | |
| AnnaBridge | 171:3a7713b1edbc | 462 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 463 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 464 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 465 | void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 466 | |
| AnnaBridge | 171:3a7713b1edbc | 467 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 171:3a7713b1edbc | 468 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 469 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 470 | |
| AnnaBridge | 171:3a7713b1edbc | 471 | HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 472 | |
| AnnaBridge | 171:3a7713b1edbc | 473 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| AnnaBridge | 171:3a7713b1edbc | 474 | void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 475 | void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 476 | void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 477 | void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 478 | void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 479 | /** |
| AnnaBridge | 171:3a7713b1edbc | 480 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 481 | */ |
| AnnaBridge | 171:3a7713b1edbc | 482 | |
| AnnaBridge | 171:3a7713b1edbc | 483 | /** @addtogroup SPDIFRX_Exported_Functions_Group3 |
| AnnaBridge | 171:3a7713b1edbc | 484 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 485 | */ |
| AnnaBridge | 171:3a7713b1edbc | 486 | /* Peripheral Control and State functions ************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 487 | HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 488 | uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif); |
| AnnaBridge | 171:3a7713b1edbc | 489 | /** |
| AnnaBridge | 171:3a7713b1edbc | 490 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 491 | */ |
| AnnaBridge | 171:3a7713b1edbc | 492 | |
| AnnaBridge | 171:3a7713b1edbc | 493 | /** |
| AnnaBridge | 171:3a7713b1edbc | 494 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 495 | */ |
| AnnaBridge | 171:3a7713b1edbc | 496 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 497 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 498 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 499 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 500 | /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros |
| AnnaBridge | 171:3a7713b1edbc | 501 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 502 | */ |
| AnnaBridge | 171:3a7713b1edbc | 503 | #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 504 | ((INPUT) == SPDIFRX_INPUT_IN2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 505 | ((INPUT) == SPDIFRX_INPUT_IN3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 506 | ((INPUT) == SPDIFRX_INPUT_IN0)) |
| AnnaBridge | 171:3a7713b1edbc | 507 | #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 508 | ((RET) == SPDIFRX_MAXRETRIES_3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 509 | ((RET) == SPDIFRX_MAXRETRIES_15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 510 | ((RET) == SPDIFRX_MAXRETRIES_63)) |
| AnnaBridge | 171:3a7713b1edbc | 511 | #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ |
| AnnaBridge | 171:3a7713b1edbc | 512 | ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) |
| AnnaBridge | 171:3a7713b1edbc | 513 | #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ |
| AnnaBridge | 171:3a7713b1edbc | 514 | ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) |
| AnnaBridge | 171:3a7713b1edbc | 515 | #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ |
| AnnaBridge | 171:3a7713b1edbc | 516 | ((VAL) == SPDIFRX_VALIDITYMASK_ON)) |
| AnnaBridge | 171:3a7713b1edbc | 517 | #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ |
| AnnaBridge | 171:3a7713b1edbc | 518 | ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) |
| AnnaBridge | 171:3a7713b1edbc | 519 | #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ |
| AnnaBridge | 171:3a7713b1edbc | 520 | ((CHANNEL) == SPDIFRX_CHANNEL_B)) |
| AnnaBridge | 171:3a7713b1edbc | 521 | #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ |
| AnnaBridge | 171:3a7713b1edbc | 522 | ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ |
| AnnaBridge | 171:3a7713b1edbc | 523 | ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) |
| AnnaBridge | 171:3a7713b1edbc | 524 | #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 525 | ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 526 | |
| AnnaBridge | 171:3a7713b1edbc | 527 | #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ |
| AnnaBridge | 171:3a7713b1edbc | 528 | ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) |
| AnnaBridge | 171:3a7713b1edbc | 529 | /** |
| AnnaBridge | 171:3a7713b1edbc | 530 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 531 | */ |
| AnnaBridge | 171:3a7713b1edbc | 532 | |
| AnnaBridge | 171:3a7713b1edbc | 533 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 534 | /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions |
| AnnaBridge | 171:3a7713b1edbc | 535 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 536 | */ |
| AnnaBridge | 171:3a7713b1edbc | 537 | /** |
| AnnaBridge | 171:3a7713b1edbc | 538 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 539 | */ |
| AnnaBridge | 171:3a7713b1edbc | 540 | |
| AnnaBridge | 171:3a7713b1edbc | 541 | /** |
| AnnaBridge | 171:3a7713b1edbc | 542 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 543 | */ |
| AnnaBridge | 171:3a7713b1edbc | 544 | |
| AnnaBridge | 171:3a7713b1edbc | 545 | /** |
| AnnaBridge | 171:3a7713b1edbc | 546 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 547 | */ |
| AnnaBridge | 171:3a7713b1edbc | 548 | |
| AnnaBridge | 171:3a7713b1edbc | 549 | #endif /* SPDIFRX */ |
| AnnaBridge | 171:3a7713b1edbc | 550 | |
| AnnaBridge | 171:3a7713b1edbc | 551 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 552 | } |
| AnnaBridge | 171:3a7713b1edbc | 553 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 554 | |
| AnnaBridge | 171:3a7713b1edbc | 555 | |
| AnnaBridge | 171:3a7713b1edbc | 556 | #endif /* __STM32F7xx_HAL_SPDIFRX_H */ |
| AnnaBridge | 171:3a7713b1edbc | 557 | |
| AnnaBridge | 171:3a7713b1edbc | 558 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
