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TARGET_DISCO_F746NG/TOOLCHAIN_IAR/stm32f7xx_hal_lptim.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f7xx_hal_lptim.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of LPTIM HAL module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F7xx_HAL_LPTIM_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F7xx_HAL_LPTIM_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f7xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F7xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @defgroup LPTIM LPTIM |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @brief LPTIM HAL module driver |
| AnnaBridge | 171:3a7713b1edbc | 53 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 54 | */ |
| AnnaBridge | 171:3a7713b1edbc | 55 | |
| AnnaBridge | 171:3a7713b1edbc | 56 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 57 | /** @defgroup LPTIM_Exported_Types LPTIM Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 58 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 59 | */ |
| AnnaBridge | 171:3a7713b1edbc | 60 | |
| AnnaBridge | 171:3a7713b1edbc | 61 | /** @defgroup LPTIM_WAKEUPTIMER_EXTILINE LPTIM WAKEUP Timer EXTI Line |
| AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 63 | */ |
| AnnaBridge | 171:3a7713b1edbc | 64 | #define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_MR23) /*!< External interrupt line 23 Connected to the LPTIM EXTI Line */ |
| AnnaBridge | 171:3a7713b1edbc | 65 | /** |
| AnnaBridge | 171:3a7713b1edbc | 66 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 67 | */ |
| AnnaBridge | 171:3a7713b1edbc | 68 | |
| AnnaBridge | 171:3a7713b1edbc | 69 | /** |
| AnnaBridge | 171:3a7713b1edbc | 70 | * @brief LPTIM Clock configuration definition |
| AnnaBridge | 171:3a7713b1edbc | 71 | */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 73 | { |
| AnnaBridge | 171:3a7713b1edbc | 74 | uint32_t Source; /*!< Selects the clock source. |
| AnnaBridge | 171:3a7713b1edbc | 75 | This parameter can be a value of @ref LPTIM_Clock_Source */ |
| AnnaBridge | 171:3a7713b1edbc | 76 | |
| AnnaBridge | 171:3a7713b1edbc | 77 | uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. |
| AnnaBridge | 171:3a7713b1edbc | 78 | This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
| AnnaBridge | 171:3a7713b1edbc | 79 | |
| AnnaBridge | 171:3a7713b1edbc | 80 | }LPTIM_ClockConfigTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 81 | |
| AnnaBridge | 171:3a7713b1edbc | 82 | /** |
| AnnaBridge | 171:3a7713b1edbc | 83 | * @brief LPTIM Clock configuration definition |
| AnnaBridge | 171:3a7713b1edbc | 84 | */ |
| AnnaBridge | 171:3a7713b1edbc | 85 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 86 | { |
| AnnaBridge | 171:3a7713b1edbc | 87 | uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit |
| AnnaBridge | 171:3a7713b1edbc | 88 | if the ULPTIM input is selected. |
| AnnaBridge | 171:3a7713b1edbc | 89 | Note: This parameter is used only when Ultra low power clock source is used. |
| AnnaBridge | 171:3a7713b1edbc | 90 | Note: If the polarity is configured on 'both edges', an auxiliary clock |
| AnnaBridge | 171:3a7713b1edbc | 91 | (one of the Low power oscillator) must be active. |
| AnnaBridge | 171:3a7713b1edbc | 92 | This parameter can be a value of @ref LPTIM_Clock_Polarity */ |
| AnnaBridge | 171:3a7713b1edbc | 93 | |
| AnnaBridge | 171:3a7713b1edbc | 94 | uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. |
| AnnaBridge | 171:3a7713b1edbc | 95 | Note: This parameter is used only when Ultra low power clock source is used. |
| AnnaBridge | 171:3a7713b1edbc | 96 | This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ |
| AnnaBridge | 171:3a7713b1edbc | 97 | |
| AnnaBridge | 171:3a7713b1edbc | 98 | }LPTIM_ULPClockConfigTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 99 | |
| AnnaBridge | 171:3a7713b1edbc | 100 | /** |
| AnnaBridge | 171:3a7713b1edbc | 101 | * @brief LPTIM Trigger configuration definition |
| AnnaBridge | 171:3a7713b1edbc | 102 | */ |
| AnnaBridge | 171:3a7713b1edbc | 103 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 104 | { |
| AnnaBridge | 171:3a7713b1edbc | 105 | uint32_t Source; /*!< Selects the Trigger source. |
| AnnaBridge | 171:3a7713b1edbc | 106 | This parameter can be a value of @ref LPTIM_Trigger_Source */ |
| AnnaBridge | 171:3a7713b1edbc | 107 | |
| AnnaBridge | 171:3a7713b1edbc | 108 | uint32_t ActiveEdge; /*!< Selects the Trigger active edge. |
| AnnaBridge | 171:3a7713b1edbc | 109 | Note: This parameter is used only when an external trigger is used. |
| AnnaBridge | 171:3a7713b1edbc | 110 | This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
| AnnaBridge | 171:3a7713b1edbc | 111 | |
| AnnaBridge | 171:3a7713b1edbc | 112 | uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. |
| AnnaBridge | 171:3a7713b1edbc | 113 | Note: This parameter is used only when an external trigger is used. |
| AnnaBridge | 171:3a7713b1edbc | 114 | This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ |
| AnnaBridge | 171:3a7713b1edbc | 115 | }LPTIM_TriggerConfigTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 116 | |
| AnnaBridge | 171:3a7713b1edbc | 117 | /** |
| AnnaBridge | 171:3a7713b1edbc | 118 | * @brief LPTIM Initialization Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 119 | */ |
| AnnaBridge | 171:3a7713b1edbc | 120 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 121 | { |
| AnnaBridge | 171:3a7713b1edbc | 122 | LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 123 | |
| AnnaBridge | 171:3a7713b1edbc | 124 | LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 125 | |
| AnnaBridge | 171:3a7713b1edbc | 126 | LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | |
| AnnaBridge | 171:3a7713b1edbc | 128 | uint32_t OutputPolarity; /*!< Specifies the Output polarity. |
| AnnaBridge | 171:3a7713b1edbc | 129 | This parameter can be a value of @ref LPTIM_Output_Polarity */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | |
| AnnaBridge | 171:3a7713b1edbc | 131 | uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare |
| AnnaBridge | 171:3a7713b1edbc | 132 | values is done immediately or after the end of current period. |
| AnnaBridge | 171:3a7713b1edbc | 133 | This parameter can be a value of @ref LPTIM_Updating_Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 134 | |
| AnnaBridge | 171:3a7713b1edbc | 135 | uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event |
| AnnaBridge | 171:3a7713b1edbc | 136 | or each external event. |
| AnnaBridge | 171:3a7713b1edbc | 137 | This parameter can be a value of @ref LPTIM_Counter_Source */ |
| AnnaBridge | 171:3a7713b1edbc | 138 | |
| AnnaBridge | 171:3a7713b1edbc | 139 | }LPTIM_InitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 140 | |
| AnnaBridge | 171:3a7713b1edbc | 141 | /** |
| AnnaBridge | 171:3a7713b1edbc | 142 | * @brief HAL LPTIM State structure definition |
| AnnaBridge | 171:3a7713b1edbc | 143 | */ |
| AnnaBridge | 171:3a7713b1edbc | 144 | typedef enum __HAL_LPTIM_StateTypeDef |
| AnnaBridge | 171:3a7713b1edbc | 145 | { |
| AnnaBridge | 171:3a7713b1edbc | 146 | HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ |
| AnnaBridge | 171:3a7713b1edbc | 147 | HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 171:3a7713b1edbc | 148 | HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 149 | HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
| AnnaBridge | 171:3a7713b1edbc | 150 | HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | }HAL_LPTIM_StateTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 152 | |
| AnnaBridge | 171:3a7713b1edbc | 153 | /** |
| AnnaBridge | 171:3a7713b1edbc | 154 | * @brief LPTIM handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 155 | */ |
| AnnaBridge | 171:3a7713b1edbc | 156 | typedef struct __LPTIM_HandleTypeDef |
| AnnaBridge | 171:3a7713b1edbc | 157 | { |
| AnnaBridge | 171:3a7713b1edbc | 158 | LPTIM_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 171:3a7713b1edbc | 159 | LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 160 | HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ |
| AnnaBridge | 171:3a7713b1edbc | 161 | HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
| AnnaBridge | 171:3a7713b1edbc | 162 | __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | |
| AnnaBridge | 171:3a7713b1edbc | 164 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 171:3a7713b1edbc | 165 | void (* MspInitCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Msp Init Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 166 | void (* MspDeInitCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Msp DeInit Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 167 | |
| AnnaBridge | 171:3a7713b1edbc | 168 | void (* CompareMatchCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Compare Match Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | void (* AutoReloadMatchCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Auto Reload Match Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 170 | void (* TriggerCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Trigger Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 171 | void (* CompareWriteCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Compare Write Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 172 | void (* AutoReloadWriteCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Auto Reload Write Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | void (* DirectionUpCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Direction Up Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 174 | void (* DirectionDownCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Direction Down Callback */ |
| AnnaBridge | 171:3a7713b1edbc | 175 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ |
| AnnaBridge | 171:3a7713b1edbc | 176 | |
| AnnaBridge | 171:3a7713b1edbc | 177 | }LPTIM_HandleTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 178 | |
| AnnaBridge | 171:3a7713b1edbc | 179 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 171:3a7713b1edbc | 180 | /** |
| AnnaBridge | 171:3a7713b1edbc | 181 | * @brief HAL LPTIM Callback ID enumeration definition |
| AnnaBridge | 171:3a7713b1edbc | 182 | */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 184 | { |
| AnnaBridge | 171:3a7713b1edbc | 185 | HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM MspInit Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 186 | HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM MspDeInit Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 187 | |
| AnnaBridge | 171:3a7713b1edbc | 188 | HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< LPTIM Compare Match Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 189 | HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID = 0x03U, /*!< LPTIM Auto Reload Match Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 190 | HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< LPTIM Trigger Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 191 | HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< LPTIM Compare Write Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 192 | HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID = 0x06U, /*!< LPTIM Auto Reload Write Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 193 | HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< LPTIM Direction Up Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 194 | HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< LPTIM Direction Down Callback ID */ |
| AnnaBridge | 171:3a7713b1edbc | 195 | }HAL_LPTIM_CallbackIDTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 196 | |
| AnnaBridge | 171:3a7713b1edbc | 197 | /** |
| AnnaBridge | 171:3a7713b1edbc | 198 | * @brief HAL LPTIM Callback pointer definition |
| AnnaBridge | 171:3a7713b1edbc | 199 | */ |
| AnnaBridge | 171:3a7713b1edbc | 200 | typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef * hlptim); /*!< pointer to the LPTIM callback function */ |
| AnnaBridge | 171:3a7713b1edbc | 201 | |
| AnnaBridge | 171:3a7713b1edbc | 202 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ |
| AnnaBridge | 171:3a7713b1edbc | 203 | |
| AnnaBridge | 171:3a7713b1edbc | 204 | /** |
| AnnaBridge | 171:3a7713b1edbc | 205 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 206 | */ |
| AnnaBridge | 171:3a7713b1edbc | 207 | |
| AnnaBridge | 171:3a7713b1edbc | 208 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 209 | /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 210 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 211 | */ |
| AnnaBridge | 171:3a7713b1edbc | 212 | |
| AnnaBridge | 171:3a7713b1edbc | 213 | /** @defgroup LPTIM_Clock_Source LPTIM Clock Source |
| AnnaBridge | 171:3a7713b1edbc | 214 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 215 | */ |
| AnnaBridge | 171:3a7713b1edbc | 216 | #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U) |
| AnnaBridge | 171:3a7713b1edbc | 217 | #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
| AnnaBridge | 171:3a7713b1edbc | 218 | /** |
| AnnaBridge | 171:3a7713b1edbc | 219 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 220 | */ |
| AnnaBridge | 171:3a7713b1edbc | 221 | |
| AnnaBridge | 171:3a7713b1edbc | 222 | /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler |
| AnnaBridge | 171:3a7713b1edbc | 223 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 224 | */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U) |
| AnnaBridge | 171:3a7713b1edbc | 226 | #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
| AnnaBridge | 171:3a7713b1edbc | 227 | #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
| AnnaBridge | 171:3a7713b1edbc | 228 | #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
| AnnaBridge | 171:3a7713b1edbc | 229 | #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
| AnnaBridge | 171:3a7713b1edbc | 230 | #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
| AnnaBridge | 171:3a7713b1edbc | 231 | #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
| AnnaBridge | 171:3a7713b1edbc | 232 | #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
| AnnaBridge | 171:3a7713b1edbc | 233 | /** |
| AnnaBridge | 171:3a7713b1edbc | 234 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 235 | */ |
| AnnaBridge | 171:3a7713b1edbc | 236 | |
| AnnaBridge | 171:3a7713b1edbc | 237 | /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity |
| AnnaBridge | 171:3a7713b1edbc | 238 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 239 | */ |
| AnnaBridge | 171:3a7713b1edbc | 240 | |
| AnnaBridge | 171:3a7713b1edbc | 241 | #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 242 | #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
| AnnaBridge | 171:3a7713b1edbc | 243 | /** |
| AnnaBridge | 171:3a7713b1edbc | 244 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 245 | */ |
| AnnaBridge | 171:3a7713b1edbc | 246 | |
| AnnaBridge | 171:3a7713b1edbc | 247 | /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time |
| AnnaBridge | 171:3a7713b1edbc | 248 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 249 | */ |
| AnnaBridge | 171:3a7713b1edbc | 250 | #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 251 | #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 |
| AnnaBridge | 171:3a7713b1edbc | 252 | #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 |
| AnnaBridge | 171:3a7713b1edbc | 253 | #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT |
| AnnaBridge | 171:3a7713b1edbc | 254 | /** |
| AnnaBridge | 171:3a7713b1edbc | 255 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 256 | */ |
| AnnaBridge | 171:3a7713b1edbc | 257 | |
| AnnaBridge | 171:3a7713b1edbc | 258 | /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity |
| AnnaBridge | 171:3a7713b1edbc | 259 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 260 | */ |
| AnnaBridge | 171:3a7713b1edbc | 261 | |
| AnnaBridge | 171:3a7713b1edbc | 262 | #define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 263 | #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 |
| AnnaBridge | 171:3a7713b1edbc | 264 | #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 |
| AnnaBridge | 171:3a7713b1edbc | 265 | /** |
| AnnaBridge | 171:3a7713b1edbc | 266 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 267 | */ |
| AnnaBridge | 171:3a7713b1edbc | 268 | |
| AnnaBridge | 171:3a7713b1edbc | 269 | /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source |
| AnnaBridge | 171:3a7713b1edbc | 270 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 271 | */ |
| AnnaBridge | 171:3a7713b1edbc | 272 | #define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFFU) |
| AnnaBridge | 171:3a7713b1edbc | 273 | #define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 274 | #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0) |
| AnnaBridge | 171:3a7713b1edbc | 275 | #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 |
| AnnaBridge | 171:3a7713b1edbc | 276 | #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) |
| AnnaBridge | 171:3a7713b1edbc | 277 | #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 |
| AnnaBridge | 171:3a7713b1edbc | 278 | #define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) |
| AnnaBridge | 171:3a7713b1edbc | 279 | /** |
| AnnaBridge | 171:3a7713b1edbc | 280 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 281 | */ |
| AnnaBridge | 171:3a7713b1edbc | 282 | |
| AnnaBridge | 171:3a7713b1edbc | 283 | /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity |
| AnnaBridge | 171:3a7713b1edbc | 284 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 285 | */ |
| AnnaBridge | 171:3a7713b1edbc | 286 | #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
| AnnaBridge | 171:3a7713b1edbc | 287 | #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
| AnnaBridge | 171:3a7713b1edbc | 288 | #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
| AnnaBridge | 171:3a7713b1edbc | 289 | /** |
| AnnaBridge | 171:3a7713b1edbc | 290 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 291 | */ |
| AnnaBridge | 171:3a7713b1edbc | 292 | |
| AnnaBridge | 171:3a7713b1edbc | 293 | /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time |
| AnnaBridge | 171:3a7713b1edbc | 294 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 295 | */ |
| AnnaBridge | 171:3a7713b1edbc | 296 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 297 | #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 |
| AnnaBridge | 171:3a7713b1edbc | 298 | #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 |
| AnnaBridge | 171:3a7713b1edbc | 299 | #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT |
| AnnaBridge | 171:3a7713b1edbc | 300 | /** |
| AnnaBridge | 171:3a7713b1edbc | 301 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 302 | */ |
| AnnaBridge | 171:3a7713b1edbc | 303 | |
| AnnaBridge | 171:3a7713b1edbc | 304 | /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode |
| AnnaBridge | 171:3a7713b1edbc | 305 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 306 | */ |
| AnnaBridge | 171:3a7713b1edbc | 307 | |
| AnnaBridge | 171:3a7713b1edbc | 308 | #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 309 | #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
| AnnaBridge | 171:3a7713b1edbc | 310 | /** |
| AnnaBridge | 171:3a7713b1edbc | 311 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 312 | */ |
| AnnaBridge | 171:3a7713b1edbc | 313 | |
| AnnaBridge | 171:3a7713b1edbc | 314 | /** @defgroup LPTIM_Counter_Source LPTIM Counter Source |
| AnnaBridge | 171:3a7713b1edbc | 315 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 316 | */ |
| AnnaBridge | 171:3a7713b1edbc | 317 | |
| AnnaBridge | 171:3a7713b1edbc | 318 | #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 319 | #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 322 | */ |
| AnnaBridge | 171:3a7713b1edbc | 323 | |
| AnnaBridge | 171:3a7713b1edbc | 324 | /** @defgroup LPTIM_Flag_Definition LPTIM Flag Definition |
| AnnaBridge | 171:3a7713b1edbc | 325 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 326 | */ |
| AnnaBridge | 171:3a7713b1edbc | 327 | |
| AnnaBridge | 171:3a7713b1edbc | 328 | #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
| AnnaBridge | 171:3a7713b1edbc | 329 | #define LPTIM_FLAG_UP LPTIM_ISR_UP |
| AnnaBridge | 171:3a7713b1edbc | 330 | #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
| AnnaBridge | 171:3a7713b1edbc | 331 | #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
| AnnaBridge | 171:3a7713b1edbc | 332 | #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
| AnnaBridge | 171:3a7713b1edbc | 333 | #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
| AnnaBridge | 171:3a7713b1edbc | 334 | #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
| AnnaBridge | 171:3a7713b1edbc | 335 | /** |
| AnnaBridge | 171:3a7713b1edbc | 336 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 337 | */ |
| AnnaBridge | 171:3a7713b1edbc | 338 | |
| AnnaBridge | 171:3a7713b1edbc | 339 | /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition |
| AnnaBridge | 171:3a7713b1edbc | 340 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 341 | */ |
| AnnaBridge | 171:3a7713b1edbc | 342 | |
| AnnaBridge | 171:3a7713b1edbc | 343 | #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
| AnnaBridge | 171:3a7713b1edbc | 344 | #define LPTIM_IT_UP LPTIM_IER_UPIE |
| AnnaBridge | 171:3a7713b1edbc | 345 | #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
| AnnaBridge | 171:3a7713b1edbc | 346 | #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
| AnnaBridge | 171:3a7713b1edbc | 347 | #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
| AnnaBridge | 171:3a7713b1edbc | 348 | #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
| AnnaBridge | 171:3a7713b1edbc | 349 | #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
| AnnaBridge | 171:3a7713b1edbc | 350 | /** |
| AnnaBridge | 171:3a7713b1edbc | 351 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 352 | */ |
| AnnaBridge | 171:3a7713b1edbc | 353 | |
| AnnaBridge | 171:3a7713b1edbc | 354 | /** |
| AnnaBridge | 171:3a7713b1edbc | 355 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 356 | */ |
| AnnaBridge | 171:3a7713b1edbc | 357 | |
| AnnaBridge | 171:3a7713b1edbc | 358 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 359 | /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 360 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 361 | */ |
| AnnaBridge | 171:3a7713b1edbc | 362 | |
| AnnaBridge | 171:3a7713b1edbc | 363 | /** @brief Reset LPTIM handle state |
| AnnaBridge | 171:3a7713b1edbc | 364 | * @param __HANDLE__ LPTIM handle |
| AnnaBridge | 171:3a7713b1edbc | 365 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 366 | */ |
| AnnaBridge | 171:3a7713b1edbc | 367 | #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
| AnnaBridge | 171:3a7713b1edbc | 368 | |
| AnnaBridge | 171:3a7713b1edbc | 369 | /** |
| AnnaBridge | 171:3a7713b1edbc | 370 | * @brief Enable/Disable the LPTIM peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 371 | * @param __HANDLE__ LPTIM handle |
| AnnaBridge | 171:3a7713b1edbc | 372 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 373 | */ |
| AnnaBridge | 171:3a7713b1edbc | 374 | #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 375 | #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 376 | |
| AnnaBridge | 171:3a7713b1edbc | 377 | /** |
| AnnaBridge | 171:3a7713b1edbc | 378 | * @brief Starts the LPTIM peripheral in Continuous or in single mode. |
| AnnaBridge | 171:3a7713b1edbc | 379 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 171:3a7713b1edbc | 380 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 381 | */ |
| AnnaBridge | 171:3a7713b1edbc | 382 | #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
| AnnaBridge | 171:3a7713b1edbc | 383 | #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
| AnnaBridge | 171:3a7713b1edbc | 384 | |
| AnnaBridge | 171:3a7713b1edbc | 385 | |
| AnnaBridge | 171:3a7713b1edbc | 386 | /** |
| AnnaBridge | 171:3a7713b1edbc | 387 | * @brief Writes the passed parameter in the Autoreload register. |
| AnnaBridge | 171:3a7713b1edbc | 388 | * @param __HANDLE__ LPTIM handle |
| AnnaBridge | 171:3a7713b1edbc | 389 | * @param __VALUE__ Autoreload value |
| AnnaBridge | 171:3a7713b1edbc | 390 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 391 | */ |
| AnnaBridge | 171:3a7713b1edbc | 392 | #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
| AnnaBridge | 171:3a7713b1edbc | 393 | |
| AnnaBridge | 171:3a7713b1edbc | 394 | /** |
| AnnaBridge | 171:3a7713b1edbc | 395 | * @brief Writes the passed parameter in the Compare register. |
| AnnaBridge | 171:3a7713b1edbc | 396 | * @param __HANDLE__ LPTIM handle |
| AnnaBridge | 171:3a7713b1edbc | 397 | * @param __VALUE__ Compare value |
| AnnaBridge | 171:3a7713b1edbc | 398 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 399 | */ |
| AnnaBridge | 171:3a7713b1edbc | 400 | #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
| AnnaBridge | 171:3a7713b1edbc | 401 | |
| AnnaBridge | 171:3a7713b1edbc | 402 | /** |
| AnnaBridge | 171:3a7713b1edbc | 403 | * @brief Checks whether the specified LPTIM flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 404 | * @param __HANDLE__ LPTIM handle |
| AnnaBridge | 171:3a7713b1edbc | 405 | * @param __FLAG__ LPTIM flag to check |
| AnnaBridge | 171:3a7713b1edbc | 406 | * This parameter can be a value of: |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| AnnaBridge | 171:3a7713b1edbc | 410 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| AnnaBridge | 171:3a7713b1edbc | 411 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| AnnaBridge | 171:3a7713b1edbc | 412 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| AnnaBridge | 171:3a7713b1edbc | 414 | * @retval The state of the specified flag (SET or RESET). |
| AnnaBridge | 171:3a7713b1edbc | 415 | */ |
| AnnaBridge | 171:3a7713b1edbc | 416 | #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 417 | |
| AnnaBridge | 171:3a7713b1edbc | 418 | /** |
| AnnaBridge | 171:3a7713b1edbc | 419 | * @brief Clears the specified LPTIM flag. |
| AnnaBridge | 171:3a7713b1edbc | 420 | * @param __HANDLE__ LPTIM handle. |
| AnnaBridge | 171:3a7713b1edbc | 421 | * @param __FLAG__ LPTIM flag to clear. |
| AnnaBridge | 171:3a7713b1edbc | 422 | * This parameter can be a value of: |
| AnnaBridge | 171:3a7713b1edbc | 423 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| AnnaBridge | 171:3a7713b1edbc | 424 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| AnnaBridge | 171:3a7713b1edbc | 425 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| AnnaBridge | 171:3a7713b1edbc | 426 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| AnnaBridge | 171:3a7713b1edbc | 427 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| AnnaBridge | 171:3a7713b1edbc | 428 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| AnnaBridge | 171:3a7713b1edbc | 429 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| AnnaBridge | 171:3a7713b1edbc | 430 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 431 | */ |
| AnnaBridge | 171:3a7713b1edbc | 432 | #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 433 | |
| AnnaBridge | 171:3a7713b1edbc | 434 | /** |
| AnnaBridge | 171:3a7713b1edbc | 435 | * @brief Enable the specified LPTIM interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 436 | * @param __HANDLE__ LPTIM handle. |
| AnnaBridge | 171:3a7713b1edbc | 437 | * @param __INTERRUPT__ LPTIM interrupt to set. |
| AnnaBridge | 171:3a7713b1edbc | 438 | * This parameter can be a value of: |
| AnnaBridge | 171:3a7713b1edbc | 439 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 440 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 441 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 443 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 444 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 445 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 446 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 447 | */ |
| AnnaBridge | 171:3a7713b1edbc | 448 | #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
| AnnaBridge | 171:3a7713b1edbc | 449 | |
| AnnaBridge | 171:3a7713b1edbc | 450 | /** |
| AnnaBridge | 171:3a7713b1edbc | 451 | * @brief Disable the specified LPTIM interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 452 | * @param __HANDLE__ LPTIM handle. |
| AnnaBridge | 171:3a7713b1edbc | 453 | * @param __INTERRUPT__ LPTIM interrupt to set. |
| AnnaBridge | 171:3a7713b1edbc | 454 | * This parameter can be a value of: |
| AnnaBridge | 171:3a7713b1edbc | 455 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 456 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 457 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 458 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 459 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 460 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 461 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 462 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 463 | */ |
| AnnaBridge | 171:3a7713b1edbc | 464 | #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
| AnnaBridge | 171:3a7713b1edbc | 465 | |
| AnnaBridge | 171:3a7713b1edbc | 466 | /** |
| AnnaBridge | 171:3a7713b1edbc | 467 | * @brief Checks whether the specified LPTIM interrupt is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 468 | * @param __HANDLE__ LPTIM handle. |
| AnnaBridge | 171:3a7713b1edbc | 469 | * @param __INTERRUPT__ LPTIM interrupt to check. |
| AnnaBridge | 171:3a7713b1edbc | 470 | * This parameter can be a value of: |
| AnnaBridge | 171:3a7713b1edbc | 471 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 472 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 473 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 474 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 475 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 476 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 477 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 478 | * @retval Interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 479 | */ |
| AnnaBridge | 171:3a7713b1edbc | 480 | |
| AnnaBridge | 171:3a7713b1edbc | 481 | #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 171:3a7713b1edbc | 482 | |
| AnnaBridge | 171:3a7713b1edbc | 483 | /** |
| AnnaBridge | 171:3a7713b1edbc | 484 | * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 485 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 486 | */ |
| AnnaBridge | 171:3a7713b1edbc | 487 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 488 | |
| AnnaBridge | 171:3a7713b1edbc | 489 | /** |
| AnnaBridge | 171:3a7713b1edbc | 490 | * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 491 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 492 | */ |
| AnnaBridge | 171:3a7713b1edbc | 493 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| AnnaBridge | 171:3a7713b1edbc | 494 | |
| AnnaBridge | 171:3a7713b1edbc | 495 | /** |
| AnnaBridge | 171:3a7713b1edbc | 496 | * @brief Enable event on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 497 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 498 | */ |
| AnnaBridge | 171:3a7713b1edbc | 499 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 500 | |
| AnnaBridge | 171:3a7713b1edbc | 501 | /** |
| AnnaBridge | 171:3a7713b1edbc | 502 | * @brief Disable event on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 503 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 504 | */ |
| AnnaBridge | 171:3a7713b1edbc | 505 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| AnnaBridge | 171:3a7713b1edbc | 506 | |
| AnnaBridge | 171:3a7713b1edbc | 507 | /** |
| AnnaBridge | 171:3a7713b1edbc | 508 | * @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 509 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 510 | */ |
| AnnaBridge | 171:3a7713b1edbc | 511 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 512 | |
| AnnaBridge | 171:3a7713b1edbc | 513 | /** |
| AnnaBridge | 171:3a7713b1edbc | 514 | * @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 515 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 516 | */ |
| AnnaBridge | 171:3a7713b1edbc | 517 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| AnnaBridge | 171:3a7713b1edbc | 518 | |
| AnnaBridge | 171:3a7713b1edbc | 519 | /** |
| AnnaBridge | 171:3a7713b1edbc | 520 | * @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 521 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 522 | */ |
| AnnaBridge | 171:3a7713b1edbc | 523 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 524 | |
| AnnaBridge | 171:3a7713b1edbc | 525 | /** |
| AnnaBridge | 171:3a7713b1edbc | 526 | * @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 527 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 528 | */ |
| AnnaBridge | 171:3a7713b1edbc | 529 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| AnnaBridge | 171:3a7713b1edbc | 530 | |
| AnnaBridge | 171:3a7713b1edbc | 531 | /** |
| AnnaBridge | 171:3a7713b1edbc | 532 | * @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 533 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 534 | */ |
| AnnaBridge | 171:3a7713b1edbc | 535 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\ |
| AnnaBridge | 171:3a7713b1edbc | 536 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\ |
| AnnaBridge | 171:3a7713b1edbc | 537 | }while(0) |
| AnnaBridge | 171:3a7713b1edbc | 538 | |
| AnnaBridge | 171:3a7713b1edbc | 539 | /** |
| AnnaBridge | 171:3a7713b1edbc | 540 | * @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 541 | * This parameter can be: |
| AnnaBridge | 171:3a7713b1edbc | 542 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 543 | */ |
| AnnaBridge | 171:3a7713b1edbc | 544 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\ |
| AnnaBridge | 171:3a7713b1edbc | 545 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\ |
| AnnaBridge | 171:3a7713b1edbc | 546 | }while(0) |
| AnnaBridge | 171:3a7713b1edbc | 547 | |
| AnnaBridge | 171:3a7713b1edbc | 548 | /** |
| AnnaBridge | 171:3a7713b1edbc | 549 | * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 550 | * @retval Line Status. |
| AnnaBridge | 171:3a7713b1edbc | 551 | */ |
| AnnaBridge | 171:3a7713b1edbc | 552 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 553 | |
| AnnaBridge | 171:3a7713b1edbc | 554 | /** |
| AnnaBridge | 171:3a7713b1edbc | 555 | * @brief Clear the LPTIM Wake-up Timer associated Exti line flag. |
| AnnaBridge | 171:3a7713b1edbc | 556 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 557 | */ |
| AnnaBridge | 171:3a7713b1edbc | 558 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 559 | |
| AnnaBridge | 171:3a7713b1edbc | 560 | /** |
| AnnaBridge | 171:3a7713b1edbc | 561 | * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line. |
| AnnaBridge | 171:3a7713b1edbc | 562 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 563 | */ |
| AnnaBridge | 171:3a7713b1edbc | 564 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| AnnaBridge | 171:3a7713b1edbc | 565 | |
| AnnaBridge | 171:3a7713b1edbc | 566 | /** |
| AnnaBridge | 171:3a7713b1edbc | 567 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 568 | */ |
| AnnaBridge | 171:3a7713b1edbc | 569 | |
| AnnaBridge | 171:3a7713b1edbc | 570 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 571 | /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions |
| AnnaBridge | 171:3a7713b1edbc | 572 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 573 | */ |
| AnnaBridge | 171:3a7713b1edbc | 574 | |
| AnnaBridge | 171:3a7713b1edbc | 575 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 171:3a7713b1edbc | 576 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 577 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 578 | |
| AnnaBridge | 171:3a7713b1edbc | 579 | /* MSP functions *************************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 580 | void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 581 | void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 582 | |
| AnnaBridge | 171:3a7713b1edbc | 583 | /* Start/Stop operation functions *********************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 584 | /* ################################# PWM Mode ################################*/ |
| AnnaBridge | 171:3a7713b1edbc | 585 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 586 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 587 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 588 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 589 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 590 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 591 | |
| AnnaBridge | 171:3a7713b1edbc | 592 | /* ############################# One Pulse Mode ##############################*/ |
| AnnaBridge | 171:3a7713b1edbc | 593 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 594 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 595 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 596 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 597 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 598 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 599 | |
| AnnaBridge | 171:3a7713b1edbc | 600 | /* ############################## Set once Mode ##############################*/ |
| AnnaBridge | 171:3a7713b1edbc | 601 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 602 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 603 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 604 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 605 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 171:3a7713b1edbc | 606 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 607 | |
| AnnaBridge | 171:3a7713b1edbc | 608 | /* ############################### Encoder Mode ##############################*/ |
| AnnaBridge | 171:3a7713b1edbc | 609 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 610 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 171:3a7713b1edbc | 611 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 612 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 613 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 171:3a7713b1edbc | 614 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 615 | |
| AnnaBridge | 171:3a7713b1edbc | 616 | /* ############################# Time out Mode ##############################*/ |
| AnnaBridge | 171:3a7713b1edbc | 617 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 618 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 619 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 620 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 621 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 622 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 623 | |
| AnnaBridge | 171:3a7713b1edbc | 624 | /* ############################## Counter Mode ###############################*/ |
| AnnaBridge | 171:3a7713b1edbc | 625 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 626 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 171:3a7713b1edbc | 627 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 628 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 629 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 171:3a7713b1edbc | 630 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 631 | |
| AnnaBridge | 171:3a7713b1edbc | 632 | /* Reading operation functions ************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 633 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 634 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 635 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 636 | |
| AnnaBridge | 171:3a7713b1edbc | 637 | /* LPTIM IRQ functions *******************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 638 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 639 | |
| AnnaBridge | 171:3a7713b1edbc | 640 | /* CallBack functions ********************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 641 | void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 642 | void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 643 | void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 644 | void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 645 | void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 646 | void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 647 | void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 648 | |
| AnnaBridge | 171:3a7713b1edbc | 649 | /* Callbacks Register/UnRegister functions ***********************************/ |
| AnnaBridge | 171:3a7713b1edbc | 650 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 171:3a7713b1edbc | 651 | HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback); |
| AnnaBridge | 171:3a7713b1edbc | 652 | HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID); |
| AnnaBridge | 171:3a7713b1edbc | 653 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ |
| AnnaBridge | 171:3a7713b1edbc | 654 | |
| AnnaBridge | 171:3a7713b1edbc | 655 | /* Peripheral State functions ************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 656 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 171:3a7713b1edbc | 657 | |
| AnnaBridge | 171:3a7713b1edbc | 658 | /** |
| AnnaBridge | 171:3a7713b1edbc | 659 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 660 | */ |
| AnnaBridge | 171:3a7713b1edbc | 661 | |
| AnnaBridge | 171:3a7713b1edbc | 662 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 663 | /** @defgroup LPTIM_Private_Types LPTIM Private Types |
| AnnaBridge | 171:3a7713b1edbc | 664 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 665 | */ |
| AnnaBridge | 171:3a7713b1edbc | 666 | |
| AnnaBridge | 171:3a7713b1edbc | 667 | /** |
| AnnaBridge | 171:3a7713b1edbc | 668 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 669 | */ |
| AnnaBridge | 171:3a7713b1edbc | 670 | |
| AnnaBridge | 171:3a7713b1edbc | 671 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 672 | /** @defgroup LPTIM_Private_Variables LPTIM Private Variables |
| AnnaBridge | 171:3a7713b1edbc | 673 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 674 | */ |
| AnnaBridge | 171:3a7713b1edbc | 675 | |
| AnnaBridge | 171:3a7713b1edbc | 676 | /** |
| AnnaBridge | 171:3a7713b1edbc | 677 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 678 | */ |
| AnnaBridge | 171:3a7713b1edbc | 679 | |
| AnnaBridge | 171:3a7713b1edbc | 680 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 681 | /** @defgroup LPTIM_Private_Constants LPTIM Private Constants |
| AnnaBridge | 171:3a7713b1edbc | 682 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 683 | */ |
| AnnaBridge | 171:3a7713b1edbc | 684 | |
| AnnaBridge | 171:3a7713b1edbc | 685 | /** |
| AnnaBridge | 171:3a7713b1edbc | 686 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 687 | */ |
| AnnaBridge | 171:3a7713b1edbc | 688 | |
| AnnaBridge | 171:3a7713b1edbc | 689 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 690 | /** @defgroup LPTIM_Private_Macros LPTIM Private Macros |
| AnnaBridge | 171:3a7713b1edbc | 691 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 692 | */ |
| AnnaBridge | 171:3a7713b1edbc | 693 | |
| AnnaBridge | 171:3a7713b1edbc | 694 | #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
| AnnaBridge | 171:3a7713b1edbc | 695 | ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
| AnnaBridge | 171:3a7713b1edbc | 696 | |
| AnnaBridge | 171:3a7713b1edbc | 697 | #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 698 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 699 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 700 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 701 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 702 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 703 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 704 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) |
| AnnaBridge | 171:3a7713b1edbc | 705 | #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) |
| AnnaBridge | 171:3a7713b1edbc | 706 | |
| AnnaBridge | 171:3a7713b1edbc | 707 | #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 708 | ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) |
| AnnaBridge | 171:3a7713b1edbc | 709 | |
| AnnaBridge | 171:3a7713b1edbc | 710 | #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ |
| AnnaBridge | 171:3a7713b1edbc | 711 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ |
| AnnaBridge | 171:3a7713b1edbc | 712 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ |
| AnnaBridge | 171:3a7713b1edbc | 713 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) |
| AnnaBridge | 171:3a7713b1edbc | 714 | |
| AnnaBridge | 171:3a7713b1edbc | 715 | #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ |
| AnnaBridge | 171:3a7713b1edbc | 716 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ |
| AnnaBridge | 171:3a7713b1edbc | 717 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) |
| AnnaBridge | 171:3a7713b1edbc | 718 | |
| AnnaBridge | 171:3a7713b1edbc | 719 | #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 720 | ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 721 | ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 722 | ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 723 | ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 724 | ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 725 | ((__TRIG__) == LPTIM_TRIGSOURCE_5)) |
| AnnaBridge | 171:3a7713b1edbc | 726 | |
| AnnaBridge | 171:3a7713b1edbc | 727 | #define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 728 | ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 729 | ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
| AnnaBridge | 171:3a7713b1edbc | 730 | |
| AnnaBridge | 171:3a7713b1edbc | 731 | #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ |
| AnnaBridge | 171:3a7713b1edbc | 732 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 733 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 734 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) |
| AnnaBridge | 171:3a7713b1edbc | 735 | |
| AnnaBridge | 171:3a7713b1edbc | 736 | #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 737 | ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) |
| AnnaBridge | 171:3a7713b1edbc | 738 | |
| AnnaBridge | 171:3a7713b1edbc | 739 | #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
| AnnaBridge | 171:3a7713b1edbc | 740 | ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
| AnnaBridge | 171:3a7713b1edbc | 741 | |
| AnnaBridge | 171:3a7713b1edbc | 742 | #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU) |
| AnnaBridge | 171:3a7713b1edbc | 743 | |
| AnnaBridge | 171:3a7713b1edbc | 744 | #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU) |
| AnnaBridge | 171:3a7713b1edbc | 745 | |
| AnnaBridge | 171:3a7713b1edbc | 746 | #define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFFU) |
| AnnaBridge | 171:3a7713b1edbc | 747 | |
| AnnaBridge | 171:3a7713b1edbc | 748 | #define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFFU) |
| AnnaBridge | 171:3a7713b1edbc | 749 | |
| AnnaBridge | 171:3a7713b1edbc | 750 | /** |
| AnnaBridge | 171:3a7713b1edbc | 751 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 752 | */ |
| AnnaBridge | 171:3a7713b1edbc | 753 | |
| AnnaBridge | 171:3a7713b1edbc | 754 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 755 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions |
| AnnaBridge | 171:3a7713b1edbc | 756 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 757 | */ |
| AnnaBridge | 171:3a7713b1edbc | 758 | |
| AnnaBridge | 171:3a7713b1edbc | 759 | /** |
| AnnaBridge | 171:3a7713b1edbc | 760 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 761 | */ |
| AnnaBridge | 171:3a7713b1edbc | 762 | |
| AnnaBridge | 171:3a7713b1edbc | 763 | /** |
| AnnaBridge | 171:3a7713b1edbc | 764 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 765 | */ |
| AnnaBridge | 171:3a7713b1edbc | 766 | |
| AnnaBridge | 171:3a7713b1edbc | 767 | /** |
| AnnaBridge | 171:3a7713b1edbc | 768 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 769 | */ |
| AnnaBridge | 171:3a7713b1edbc | 770 | |
| AnnaBridge | 171:3a7713b1edbc | 771 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 772 | } |
| AnnaBridge | 171:3a7713b1edbc | 773 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 774 | |
| AnnaBridge | 171:3a7713b1edbc | 775 | #endif /* __STM32F7xx_HAL_LPTIM_H */ |
| AnnaBridge | 171:3a7713b1edbc | 776 | |
| AnnaBridge | 171:3a7713b1edbc | 777 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
