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TARGET_DISCO_F746NG/TOOLCHAIN_ARM_MICRO/stm32f7xx_hal_mmc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f7xx_hal_mmc.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of MMC HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F7xx_HAL_MMC_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F7xx_HAL_MMC_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f7xx_ll_sdmmc.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /** @addtogroup MMC
AnnaBridge 171:3a7713b1edbc 52 * @{
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 56 /** @defgroup MMC_Exported_Types MMC Exported Types
AnnaBridge 171:3a7713b1edbc 57 * @{
AnnaBridge 171:3a7713b1edbc 58 */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
AnnaBridge 171:3a7713b1edbc 61 * @{
AnnaBridge 171:3a7713b1edbc 62 */
AnnaBridge 171:3a7713b1edbc 63 typedef enum
AnnaBridge 171:3a7713b1edbc 64 {
AnnaBridge 171:3a7713b1edbc 65 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
AnnaBridge 171:3a7713b1edbc 66 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 67 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
AnnaBridge 171:3a7713b1edbc 68 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
AnnaBridge 171:3a7713b1edbc 69 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
AnnaBridge 171:3a7713b1edbc 70 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
AnnaBridge 171:3a7713b1edbc 71 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */
AnnaBridge 171:3a7713b1edbc 72 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
AnnaBridge 171:3a7713b1edbc 73 }HAL_MMC_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 74 /**
AnnaBridge 171:3a7713b1edbc 75 * @}
AnnaBridge 171:3a7713b1edbc 76 */
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
AnnaBridge 171:3a7713b1edbc 79 * @{
AnnaBridge 171:3a7713b1edbc 80 */
AnnaBridge 171:3a7713b1edbc 81 typedef enum
AnnaBridge 171:3a7713b1edbc 82 {
AnnaBridge 171:3a7713b1edbc 83 HAL_MMC_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
AnnaBridge 171:3a7713b1edbc 84 HAL_MMC_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
AnnaBridge 171:3a7713b1edbc 85 HAL_MMC_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
AnnaBridge 171:3a7713b1edbc 86 HAL_MMC_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
AnnaBridge 171:3a7713b1edbc 87 HAL_MMC_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
AnnaBridge 171:3a7713b1edbc 88 HAL_MMC_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
AnnaBridge 171:3a7713b1edbc 89 HAL_MMC_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
AnnaBridge 171:3a7713b1edbc 90 HAL_MMC_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
AnnaBridge 171:3a7713b1edbc 91 HAL_MMC_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card response Error */
AnnaBridge 171:3a7713b1edbc 92 }HAL_MMC_CardStateTypeDef;
AnnaBridge 171:3a7713b1edbc 93 /**
AnnaBridge 171:3a7713b1edbc 94 * @}
AnnaBridge 171:3a7713b1edbc 95 */
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
AnnaBridge 171:3a7713b1edbc 98 * @{
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 #define MMC_InitTypeDef SDMMC_InitTypeDef
AnnaBridge 171:3a7713b1edbc 101 #define MMC_TypeDef SDMMC_TypeDef
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 /**
AnnaBridge 171:3a7713b1edbc 104 * @brief MMC Card Information Structure definition
AnnaBridge 171:3a7713b1edbc 105 */
AnnaBridge 171:3a7713b1edbc 106 typedef struct
AnnaBridge 171:3a7713b1edbc 107 {
AnnaBridge 171:3a7713b1edbc 108 uint32_t CardType; /*!< Specifies the card Type */
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110 uint32_t Class; /*!< Specifies the class of the card class */
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 uint32_t BlockSize; /*!< Specifies one block size in bytes */
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 }HAL_MMC_CardInfoTypeDef;
AnnaBridge 171:3a7713b1edbc 123
AnnaBridge 171:3a7713b1edbc 124 /**
AnnaBridge 171:3a7713b1edbc 125 * @brief MMC handle Structure definition
AnnaBridge 171:3a7713b1edbc 126 */
AnnaBridge 171:3a7713b1edbc 127 typedef struct
AnnaBridge 171:3a7713b1edbc 128 {
AnnaBridge 171:3a7713b1edbc 129 MMC_TypeDef *Instance; /*!< MMC registers base address */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 MMC_InitTypeDef Init; /*!< MMC required parameters */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 HAL_LockTypeDef Lock; /*!< MMC locking object */
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 uint32_t TxXferSize; /*!< MMC Tx Transfer size */
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 uint32_t RxXferSize; /*!< MMC Rx Transfer size */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 __IO uint32_t Context; /*!< MMC transfer context */
AnnaBridge 171:3a7713b1edbc 144
AnnaBridge 171:3a7713b1edbc 145 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
AnnaBridge 171:3a7713b1edbc 146
AnnaBridge 171:3a7713b1edbc 147 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 uint32_t CSD[4]; /*!< MMC card specific data table */
AnnaBridge 171:3a7713b1edbc 156
AnnaBridge 171:3a7713b1edbc 157 uint32_t CID[4]; /*!< MMC card identification number table */
AnnaBridge 171:3a7713b1edbc 158
AnnaBridge 171:3a7713b1edbc 159 }MMC_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /**
AnnaBridge 171:3a7713b1edbc 162 * @}
AnnaBridge 171:3a7713b1edbc 163 */
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
AnnaBridge 171:3a7713b1edbc 166 * @{
AnnaBridge 171:3a7713b1edbc 167 */
AnnaBridge 171:3a7713b1edbc 168 typedef struct
AnnaBridge 171:3a7713b1edbc 169 {
AnnaBridge 171:3a7713b1edbc 170 __IO uint8_t CSDStruct; /*!< CSD structure */
AnnaBridge 171:3a7713b1edbc 171 __IO uint8_t SysSpecVersion; /*!< System specification version */
AnnaBridge 171:3a7713b1edbc 172 __IO uint8_t Reserved1; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 173 __IO uint8_t TAAC; /*!< Data read access time 1 */
AnnaBridge 171:3a7713b1edbc 174 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
AnnaBridge 171:3a7713b1edbc 175 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
AnnaBridge 171:3a7713b1edbc 176 __IO uint16_t CardComdClasses; /*!< Card command classes */
AnnaBridge 171:3a7713b1edbc 177 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
AnnaBridge 171:3a7713b1edbc 178 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
AnnaBridge 171:3a7713b1edbc 179 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
AnnaBridge 171:3a7713b1edbc 180 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
AnnaBridge 171:3a7713b1edbc 181 __IO uint8_t DSRImpl; /*!< DSR implemented */
AnnaBridge 171:3a7713b1edbc 182 __IO uint8_t Reserved2; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 183 __IO uint32_t DeviceSize; /*!< Device Size */
AnnaBridge 171:3a7713b1edbc 184 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
AnnaBridge 171:3a7713b1edbc 185 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
AnnaBridge 171:3a7713b1edbc 186 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
AnnaBridge 171:3a7713b1edbc 187 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
AnnaBridge 171:3a7713b1edbc 188 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
AnnaBridge 171:3a7713b1edbc 189 __IO uint8_t EraseGrSize; /*!< Erase group size */
AnnaBridge 171:3a7713b1edbc 190 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
AnnaBridge 171:3a7713b1edbc 191 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
AnnaBridge 171:3a7713b1edbc 192 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
AnnaBridge 171:3a7713b1edbc 193 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
AnnaBridge 171:3a7713b1edbc 194 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
AnnaBridge 171:3a7713b1edbc 195 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
AnnaBridge 171:3a7713b1edbc 196 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
AnnaBridge 171:3a7713b1edbc 197 __IO uint8_t Reserved3; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 198 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
AnnaBridge 171:3a7713b1edbc 199 __IO uint8_t FileFormatGrouop; /*!< File format group */
AnnaBridge 171:3a7713b1edbc 200 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
AnnaBridge 171:3a7713b1edbc 201 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
AnnaBridge 171:3a7713b1edbc 202 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
AnnaBridge 171:3a7713b1edbc 203 __IO uint8_t FileFormat; /*!< File format */
AnnaBridge 171:3a7713b1edbc 204 __IO uint8_t ECC; /*!< ECC code */
AnnaBridge 171:3a7713b1edbc 205 __IO uint8_t CSD_CRC; /*!< CSD CRC */
AnnaBridge 171:3a7713b1edbc 206 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 }HAL_MMC_CardCSDTypeDef;
AnnaBridge 171:3a7713b1edbc 209 /**
AnnaBridge 171:3a7713b1edbc 210 * @}
AnnaBridge 171:3a7713b1edbc 211 */
AnnaBridge 171:3a7713b1edbc 212
AnnaBridge 171:3a7713b1edbc 213 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
AnnaBridge 171:3a7713b1edbc 214 * @{
AnnaBridge 171:3a7713b1edbc 215 */
AnnaBridge 171:3a7713b1edbc 216 typedef struct
AnnaBridge 171:3a7713b1edbc 217 {
AnnaBridge 171:3a7713b1edbc 218 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
AnnaBridge 171:3a7713b1edbc 219 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
AnnaBridge 171:3a7713b1edbc 220 __IO uint32_t ProdName1; /*!< Product Name part1 */
AnnaBridge 171:3a7713b1edbc 221 __IO uint8_t ProdName2; /*!< Product Name part2 */
AnnaBridge 171:3a7713b1edbc 222 __IO uint8_t ProdRev; /*!< Product Revision */
AnnaBridge 171:3a7713b1edbc 223 __IO uint32_t ProdSN; /*!< Product Serial Number */
AnnaBridge 171:3a7713b1edbc 224 __IO uint8_t Reserved1; /*!< Reserved1 */
AnnaBridge 171:3a7713b1edbc 225 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
AnnaBridge 171:3a7713b1edbc 226 __IO uint8_t CID_CRC; /*!< CID CRC */
AnnaBridge 171:3a7713b1edbc 227 __IO uint8_t Reserved2; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 228
AnnaBridge 171:3a7713b1edbc 229 }HAL_MMC_CardCIDTypeDef;
AnnaBridge 171:3a7713b1edbc 230 /**
AnnaBridge 171:3a7713b1edbc 231 * @}
AnnaBridge 171:3a7713b1edbc 232 */
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 /**
AnnaBridge 171:3a7713b1edbc 235 * @}
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237
AnnaBridge 171:3a7713b1edbc 238 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 239 /** @defgroup MMC_Exported_Constants Exported Constants
AnnaBridge 171:3a7713b1edbc 240 * @{
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
AnnaBridge 171:3a7713b1edbc 244 #define CAPACITY ((uint32_t)0x80000000U) /*!< 2 G bytes constant */
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
AnnaBridge 171:3a7713b1edbc 247 * @{
AnnaBridge 171:3a7713b1edbc 248 */
AnnaBridge 171:3a7713b1edbc 249 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
AnnaBridge 171:3a7713b1edbc 250 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
AnnaBridge 171:3a7713b1edbc 251 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
AnnaBridge 171:3a7713b1edbc 252 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
AnnaBridge 171:3a7713b1edbc 253 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
AnnaBridge 171:3a7713b1edbc 254 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
AnnaBridge 171:3a7713b1edbc 255 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
AnnaBridge 171:3a7713b1edbc 256 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
AnnaBridge 171:3a7713b1edbc 257 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
AnnaBridge 171:3a7713b1edbc 258 number of transferred bytes does not match the block length */
AnnaBridge 171:3a7713b1edbc 259 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
AnnaBridge 171:3a7713b1edbc 260 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
AnnaBridge 171:3a7713b1edbc 261 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
AnnaBridge 171:3a7713b1edbc 262 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
AnnaBridge 171:3a7713b1edbc 263 command or if there was an attempt to access a locked card */
AnnaBridge 171:3a7713b1edbc 264 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
AnnaBridge 171:3a7713b1edbc 265 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
AnnaBridge 171:3a7713b1edbc 266 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 171:3a7713b1edbc 267 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
AnnaBridge 171:3a7713b1edbc 268 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
AnnaBridge 171:3a7713b1edbc 269 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
AnnaBridge 171:3a7713b1edbc 270 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
AnnaBridge 171:3a7713b1edbc 271 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
AnnaBridge 171:3a7713b1edbc 272 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
AnnaBridge 171:3a7713b1edbc 273 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
AnnaBridge 171:3a7713b1edbc 274 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
AnnaBridge 171:3a7713b1edbc 275 of erase sequence command was received */
AnnaBridge 171:3a7713b1edbc 276 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
AnnaBridge 171:3a7713b1edbc 277 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
AnnaBridge 171:3a7713b1edbc 278 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
AnnaBridge 171:3a7713b1edbc 279 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
AnnaBridge 171:3a7713b1edbc 280 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
AnnaBridge 171:3a7713b1edbc 281 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
AnnaBridge 171:3a7713b1edbc 282 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
AnnaBridge 171:3a7713b1edbc 283 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
AnnaBridge 171:3a7713b1edbc 284 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
AnnaBridge 171:3a7713b1edbc 285
AnnaBridge 171:3a7713b1edbc 286 /**
AnnaBridge 171:3a7713b1edbc 287 * @}
AnnaBridge 171:3a7713b1edbc 288 */
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
AnnaBridge 171:3a7713b1edbc 291 * @{
AnnaBridge 171:3a7713b1edbc 292 */
AnnaBridge 171:3a7713b1edbc 293 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
AnnaBridge 171:3a7713b1edbc 294 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
AnnaBridge 171:3a7713b1edbc 295 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 296 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
AnnaBridge 171:3a7713b1edbc 297 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 298 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
AnnaBridge 171:3a7713b1edbc 299 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
AnnaBridge 171:3a7713b1edbc 300
AnnaBridge 171:3a7713b1edbc 301 /**
AnnaBridge 171:3a7713b1edbc 302 * @}
AnnaBridge 171:3a7713b1edbc 303 */
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
AnnaBridge 171:3a7713b1edbc 306 * @{
AnnaBridge 171:3a7713b1edbc 307 */
AnnaBridge 171:3a7713b1edbc 308 /**
AnnaBridge 171:3a7713b1edbc 309 * @brief
AnnaBridge 171:3a7713b1edbc 310 */
AnnaBridge 171:3a7713b1edbc 311 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */
AnnaBridge 171:3a7713b1edbc 312 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */
AnnaBridge 171:3a7713b1edbc 313 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */
AnnaBridge 171:3a7713b1edbc 314 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */
AnnaBridge 171:3a7713b1edbc 315 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
AnnaBridge 171:3a7713b1edbc 316 /**
AnnaBridge 171:3a7713b1edbc 317 * @}
AnnaBridge 171:3a7713b1edbc 318 */
AnnaBridge 171:3a7713b1edbc 319
AnnaBridge 171:3a7713b1edbc 320 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
AnnaBridge 171:3a7713b1edbc 321 * @{
AnnaBridge 171:3a7713b1edbc 322 */
AnnaBridge 171:3a7713b1edbc 323 #define MMC_HIGH_VOLTAGE_CARD ((uint32_t)0x00000000U)
AnnaBridge 171:3a7713b1edbc 324 #define MMC_DUAL_VOLTAGE_CARD ((uint32_t)0x00000001U)
AnnaBridge 171:3a7713b1edbc 325 /**
AnnaBridge 171:3a7713b1edbc 326 * @}
AnnaBridge 171:3a7713b1edbc 327 */
AnnaBridge 171:3a7713b1edbc 328
AnnaBridge 171:3a7713b1edbc 329 /**
AnnaBridge 171:3a7713b1edbc 330 * @}
AnnaBridge 171:3a7713b1edbc 331 */
AnnaBridge 171:3a7713b1edbc 332
AnnaBridge 171:3a7713b1edbc 333 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 334 /** @defgroup MMC_Exported_macros MMC Exported Macros
AnnaBridge 171:3a7713b1edbc 335 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 171:3a7713b1edbc 336 * @{
AnnaBridge 171:3a7713b1edbc 337 */
AnnaBridge 171:3a7713b1edbc 338
AnnaBridge 171:3a7713b1edbc 339 /**
AnnaBridge 171:3a7713b1edbc 340 * @brief Enable the MMC device.
AnnaBridge 171:3a7713b1edbc 341 * @retval None
AnnaBridge 171:3a7713b1edbc 342 */
AnnaBridge 171:3a7713b1edbc 343 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 344
AnnaBridge 171:3a7713b1edbc 345 /**
AnnaBridge 171:3a7713b1edbc 346 * @brief Disable the MMC device.
AnnaBridge 171:3a7713b1edbc 347 * @retval None
AnnaBridge 171:3a7713b1edbc 348 */
AnnaBridge 171:3a7713b1edbc 349 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 350
AnnaBridge 171:3a7713b1edbc 351 /**
AnnaBridge 171:3a7713b1edbc 352 * @brief Enable the SDMMC DMA transfer.
AnnaBridge 171:3a7713b1edbc 353 * @retval None
AnnaBridge 171:3a7713b1edbc 354 */
AnnaBridge 171:3a7713b1edbc 355 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 356
AnnaBridge 171:3a7713b1edbc 357 /**
AnnaBridge 171:3a7713b1edbc 358 * @brief Disable the SDMMC DMA transfer.
AnnaBridge 171:3a7713b1edbc 359 * @retval None
AnnaBridge 171:3a7713b1edbc 360 */
AnnaBridge 171:3a7713b1edbc 361 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 362
AnnaBridge 171:3a7713b1edbc 363 /**
AnnaBridge 171:3a7713b1edbc 364 * @brief Enable the MMC device interrupt.
AnnaBridge 171:3a7713b1edbc 365 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 366 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
AnnaBridge 171:3a7713b1edbc 367 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 368 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 369 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 370 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 371 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 372 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 373 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 374 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 375 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 376 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 377 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 378 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 379 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 380 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 381 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 382 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 383 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 384 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 385 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 386 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 387 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 388 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 389 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 390 * @retval None
AnnaBridge 171:3a7713b1edbc 391 */
AnnaBridge 171:3a7713b1edbc 392 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 393
AnnaBridge 171:3a7713b1edbc 394 /**
AnnaBridge 171:3a7713b1edbc 395 * @brief Disable the MMC device interrupt.
AnnaBridge 171:3a7713b1edbc 396 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 397 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
AnnaBridge 171:3a7713b1edbc 398 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 399 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 400 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 401 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 402 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 403 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 404 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 405 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 406 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 407 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 408 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 409 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 410 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 411 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 412 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 413 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 414 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 415 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 416 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 417 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 418 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 419 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 420 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 421 * @retval None
AnnaBridge 171:3a7713b1edbc 422 */
AnnaBridge 171:3a7713b1edbc 423 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 424
AnnaBridge 171:3a7713b1edbc 425 /**
AnnaBridge 171:3a7713b1edbc 426 * @brief Check whether the specified MMC flag is set or not.
AnnaBridge 171:3a7713b1edbc 427 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 428 * @param __FLAG__ specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 429 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 430 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 431 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 432 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 433 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 434 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 435 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 436 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 437 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 438 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 439 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 440 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress
AnnaBridge 171:3a7713b1edbc 441 * @arg SDMMC_FLAG_TXACT: Data transmit in progress
AnnaBridge 171:3a7713b1edbc 442 * @arg SDMMC_FLAG_RXACT: Data receive in progress
AnnaBridge 171:3a7713b1edbc 443 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
AnnaBridge 171:3a7713b1edbc 444 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
AnnaBridge 171:3a7713b1edbc 445 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
AnnaBridge 171:3a7713b1edbc 446 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
AnnaBridge 171:3a7713b1edbc 447 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
AnnaBridge 171:3a7713b1edbc 448 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
AnnaBridge 171:3a7713b1edbc 449 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO
AnnaBridge 171:3a7713b1edbc 450 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO
AnnaBridge 171:3a7713b1edbc 451 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 452 * @retval The new state of MMC FLAG (SET or RESET).
AnnaBridge 171:3a7713b1edbc 453 */
AnnaBridge 171:3a7713b1edbc 454 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 455
AnnaBridge 171:3a7713b1edbc 456 /**
AnnaBridge 171:3a7713b1edbc 457 * @brief Clear the MMC's pending flags.
AnnaBridge 171:3a7713b1edbc 458 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 459 * @param __FLAG__ specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 460 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 461 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 462 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 463 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 464 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 465 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 466 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 467 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 468 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 469 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 470 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 471 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 472 * @retval None
AnnaBridge 171:3a7713b1edbc 473 */
AnnaBridge 171:3a7713b1edbc 474 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 475
AnnaBridge 171:3a7713b1edbc 476 /**
AnnaBridge 171:3a7713b1edbc 477 * @brief Check whether the specified MMC interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 478 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 479 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
AnnaBridge 171:3a7713b1edbc 480 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 481 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 482 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 483 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 484 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 485 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 486 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 487 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 488 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 489 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 490 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 491 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 492 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 493 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 494 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 495 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 496 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 497 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 498 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 499 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 500 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 501 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 502 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 503 * @retval The new state of SD IT (SET or RESET).
AnnaBridge 171:3a7713b1edbc 504 */
AnnaBridge 171:3a7713b1edbc 505 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 506
AnnaBridge 171:3a7713b1edbc 507 /**
AnnaBridge 171:3a7713b1edbc 508 * @brief Clear the MMC's interrupt pending bits.
AnnaBridge 171:3a7713b1edbc 509 * @param __HANDLE__ MMC Handle
AnnaBridge 171:3a7713b1edbc 510 * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
AnnaBridge 171:3a7713b1edbc 511 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 512 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 513 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 514 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 515 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 516 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 517 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 518 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 519 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 520 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 521 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 522 * @retval None
AnnaBridge 171:3a7713b1edbc 523 */
AnnaBridge 171:3a7713b1edbc 524 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 525
AnnaBridge 171:3a7713b1edbc 526 /**
AnnaBridge 171:3a7713b1edbc 527 * @}
AnnaBridge 171:3a7713b1edbc 528 */
AnnaBridge 171:3a7713b1edbc 529
AnnaBridge 171:3a7713b1edbc 530 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 531 /** @defgroup MMC_Exported_Functions MMC Exported Functions
AnnaBridge 171:3a7713b1edbc 532 * @{
AnnaBridge 171:3a7713b1edbc 533 */
AnnaBridge 171:3a7713b1edbc 534
AnnaBridge 171:3a7713b1edbc 535 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 536 * @{
AnnaBridge 171:3a7713b1edbc 537 */
AnnaBridge 171:3a7713b1edbc 538 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 539 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 540 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 541 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 542 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 543 /**
AnnaBridge 171:3a7713b1edbc 544 * @}
AnnaBridge 171:3a7713b1edbc 545 */
AnnaBridge 171:3a7713b1edbc 546
AnnaBridge 171:3a7713b1edbc 547 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
AnnaBridge 171:3a7713b1edbc 548 * @{
AnnaBridge 171:3a7713b1edbc 549 */
AnnaBridge 171:3a7713b1edbc 550 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 551 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 552 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 553 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
AnnaBridge 171:3a7713b1edbc 554 /* Non-Blocking mode: IT */
AnnaBridge 171:3a7713b1edbc 555 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 556 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 557 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 558 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 559 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 560
AnnaBridge 171:3a7713b1edbc 561 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 562
AnnaBridge 171:3a7713b1edbc 563 /* Callback in non blocking modes (DMA) */
AnnaBridge 171:3a7713b1edbc 564 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 565 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 566 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 567 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 568 /**
AnnaBridge 171:3a7713b1edbc 569 * @}
AnnaBridge 171:3a7713b1edbc 570 */
AnnaBridge 171:3a7713b1edbc 571
AnnaBridge 171:3a7713b1edbc 572 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 573 * @{
AnnaBridge 171:3a7713b1edbc 574 */
AnnaBridge 171:3a7713b1edbc 575 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
AnnaBridge 171:3a7713b1edbc 576 /**
AnnaBridge 171:3a7713b1edbc 577 * @}
AnnaBridge 171:3a7713b1edbc 578 */
AnnaBridge 171:3a7713b1edbc 579
AnnaBridge 171:3a7713b1edbc 580 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
AnnaBridge 171:3a7713b1edbc 581 * @{
AnnaBridge 171:3a7713b1edbc 582 */
AnnaBridge 171:3a7713b1edbc 583 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 584 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
AnnaBridge 171:3a7713b1edbc 585 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
AnnaBridge 171:3a7713b1edbc 586 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
AnnaBridge 171:3a7713b1edbc 587 /**
AnnaBridge 171:3a7713b1edbc 588 * @}
AnnaBridge 171:3a7713b1edbc 589 */
AnnaBridge 171:3a7713b1edbc 590
AnnaBridge 171:3a7713b1edbc 591 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
AnnaBridge 171:3a7713b1edbc 592 * @{
AnnaBridge 171:3a7713b1edbc 593 */
AnnaBridge 171:3a7713b1edbc 594 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 595 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 596 /**
AnnaBridge 171:3a7713b1edbc 597 * @}
AnnaBridge 171:3a7713b1edbc 598 */
AnnaBridge 171:3a7713b1edbc 599
AnnaBridge 171:3a7713b1edbc 600 /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
AnnaBridge 171:3a7713b1edbc 601 * @{
AnnaBridge 171:3a7713b1edbc 602 */
AnnaBridge 171:3a7713b1edbc 603 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 604 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
AnnaBridge 171:3a7713b1edbc 605 /**
AnnaBridge 171:3a7713b1edbc 606 * @}
AnnaBridge 171:3a7713b1edbc 607 */
AnnaBridge 171:3a7713b1edbc 608
AnnaBridge 171:3a7713b1edbc 609 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 610 /** @defgroup MMC_Private_Types MMC Private Types
AnnaBridge 171:3a7713b1edbc 611 * @{
AnnaBridge 171:3a7713b1edbc 612 */
AnnaBridge 171:3a7713b1edbc 613
AnnaBridge 171:3a7713b1edbc 614 /**
AnnaBridge 171:3a7713b1edbc 615 * @}
AnnaBridge 171:3a7713b1edbc 616 */
AnnaBridge 171:3a7713b1edbc 617
AnnaBridge 171:3a7713b1edbc 618 /* Private defines -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 619 /** @defgroup MMC_Private_Defines MMC Private Defines
AnnaBridge 171:3a7713b1edbc 620 * @{
AnnaBridge 171:3a7713b1edbc 621 */
AnnaBridge 171:3a7713b1edbc 622
AnnaBridge 171:3a7713b1edbc 623 /**
AnnaBridge 171:3a7713b1edbc 624 * @}
AnnaBridge 171:3a7713b1edbc 625 */
AnnaBridge 171:3a7713b1edbc 626
AnnaBridge 171:3a7713b1edbc 627 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 628 /** @defgroup MMC_Private_Variables MMC Private Variables
AnnaBridge 171:3a7713b1edbc 629 * @{
AnnaBridge 171:3a7713b1edbc 630 */
AnnaBridge 171:3a7713b1edbc 631
AnnaBridge 171:3a7713b1edbc 632 /**
AnnaBridge 171:3a7713b1edbc 633 * @}
AnnaBridge 171:3a7713b1edbc 634 */
AnnaBridge 171:3a7713b1edbc 635
AnnaBridge 171:3a7713b1edbc 636 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 637 /** @defgroup MMC_Private_Constants MMC Private Constants
AnnaBridge 171:3a7713b1edbc 638 * @{
AnnaBridge 171:3a7713b1edbc 639 */
AnnaBridge 171:3a7713b1edbc 640
AnnaBridge 171:3a7713b1edbc 641 /**
AnnaBridge 171:3a7713b1edbc 642 * @}
AnnaBridge 171:3a7713b1edbc 643 */
AnnaBridge 171:3a7713b1edbc 644
AnnaBridge 171:3a7713b1edbc 645 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 646 /** @defgroup MMC_Private_Macros MMC Private Macros
AnnaBridge 171:3a7713b1edbc 647 * @{
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649
AnnaBridge 171:3a7713b1edbc 650 /**
AnnaBridge 171:3a7713b1edbc 651 * @}
AnnaBridge 171:3a7713b1edbc 652 */
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 /* Private functions prototypes ----------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 655 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
AnnaBridge 171:3a7713b1edbc 656 * @{
AnnaBridge 171:3a7713b1edbc 657 */
AnnaBridge 171:3a7713b1edbc 658
AnnaBridge 171:3a7713b1edbc 659 /**
AnnaBridge 171:3a7713b1edbc 660 * @}
AnnaBridge 171:3a7713b1edbc 661 */
AnnaBridge 171:3a7713b1edbc 662
AnnaBridge 171:3a7713b1edbc 663 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 664 /** @defgroup MMC_Private_Functions MMC Private Functions
AnnaBridge 171:3a7713b1edbc 665 * @{
AnnaBridge 171:3a7713b1edbc 666 */
AnnaBridge 171:3a7713b1edbc 667
AnnaBridge 171:3a7713b1edbc 668 /**
AnnaBridge 171:3a7713b1edbc 669 * @}
AnnaBridge 171:3a7713b1edbc 670 */
AnnaBridge 171:3a7713b1edbc 671
AnnaBridge 171:3a7713b1edbc 672
AnnaBridge 171:3a7713b1edbc 673 /**
AnnaBridge 171:3a7713b1edbc 674 * @}
AnnaBridge 171:3a7713b1edbc 675 */
AnnaBridge 171:3a7713b1edbc 676
AnnaBridge 171:3a7713b1edbc 677 /**
AnnaBridge 171:3a7713b1edbc 678 * @}
AnnaBridge 171:3a7713b1edbc 679 */
AnnaBridge 171:3a7713b1edbc 680
AnnaBridge 171:3a7713b1edbc 681 /**
AnnaBridge 171:3a7713b1edbc 682 * @}
AnnaBridge 171:3a7713b1edbc 683 */
AnnaBridge 171:3a7713b1edbc 684
AnnaBridge 171:3a7713b1edbc 685
AnnaBridge 171:3a7713b1edbc 686 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 687 }
AnnaBridge 171:3a7713b1edbc 688 #endif
AnnaBridge 171:3a7713b1edbc 689
AnnaBridge 171:3a7713b1edbc 690
AnnaBridge 171:3a7713b1edbc 691 #endif /* __STM32F7xx_HAL_MMC_H */
AnnaBridge 171:3a7713b1edbc 692
AnnaBridge 171:3a7713b1edbc 693 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/