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TARGET_DISCO_F746NG/TOOLCHAIN_ARM_MICRO/stm32f7xx_hal.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f7xx_hal.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief This file contains all the functions prototypes for the HAL
AnnaBridge 171:3a7713b1edbc 6 * module driver.
AnnaBridge 171:3a7713b1edbc 7 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 8 * @attention
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 13 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 15 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 18 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 20 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 21 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 22 *
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 *
AnnaBridge 171:3a7713b1edbc 34 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 35 */
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 38 #ifndef __STM32F7xx_HAL_H
AnnaBridge 171:3a7713b1edbc 39 #define __STM32F7xx_HAL_H
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 42 extern "C" {
AnnaBridge 171:3a7713b1edbc 43 #endif
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 46 #include "stm32f7xx_hal_conf.h"
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 /** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 49 * @{
AnnaBridge 171:3a7713b1edbc 50 */
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /** @addtogroup HAL
AnnaBridge 171:3a7713b1edbc 53 * @{
AnnaBridge 171:3a7713b1edbc 54 */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 57 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /** @defgroup HAL_Exported_Constants HAL Exported Constants
AnnaBridge 171:3a7713b1edbc 60 * @{
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup HAL_TICK_FREQ Tick Frequency
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 typedef enum
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68 HAL_TICK_FREQ_10HZ = 100U,
AnnaBridge 171:3a7713b1edbc 69 HAL_TICK_FREQ_100HZ = 10U,
AnnaBridge 171:3a7713b1edbc 70 HAL_TICK_FREQ_1KHZ = 1U,
AnnaBridge 171:3a7713b1edbc 71 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
AnnaBridge 171:3a7713b1edbc 72 } HAL_TickFreqTypeDef;
AnnaBridge 171:3a7713b1edbc 73 /**
AnnaBridge 171:3a7713b1edbc 74 * @}
AnnaBridge 171:3a7713b1edbc 75 */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /** @defgroup SYSCFG_BootMode Boot Mode
AnnaBridge 171:3a7713b1edbc 78 * @{
AnnaBridge 171:3a7713b1edbc 79 */
AnnaBridge 171:3a7713b1edbc 80 #define SYSCFG_MEM_BOOT_ADD0 ((uint32_t)0x00000000U)
AnnaBridge 171:3a7713b1edbc 81 #define SYSCFG_MEM_BOOT_ADD1 SYSCFG_MEMRMP_MEM_BOOT
AnnaBridge 171:3a7713b1edbc 82 /**
AnnaBridge 171:3a7713b1edbc 83 * @}
AnnaBridge 171:3a7713b1edbc 84 */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 /**
AnnaBridge 171:3a7713b1edbc 87 * @}
AnnaBridge 171:3a7713b1edbc 88 */
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 91 /** @defgroup HAL_Exported_Macros HAL Exported Macros
AnnaBridge 171:3a7713b1edbc 92 * @{
AnnaBridge 171:3a7713b1edbc 93 */
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /** @brief Freeze/Unfreeze Peripherals in Debug mode
AnnaBridge 171:3a7713b1edbc 96 */
AnnaBridge 171:3a7713b1edbc 97 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
AnnaBridge 171:3a7713b1edbc 98 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
AnnaBridge 171:3a7713b1edbc 99 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
AnnaBridge 171:3a7713b1edbc 100 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
AnnaBridge 171:3a7713b1edbc 101 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
AnnaBridge 171:3a7713b1edbc 102 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
AnnaBridge 171:3a7713b1edbc 103 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
AnnaBridge 171:3a7713b1edbc 104 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
AnnaBridge 171:3a7713b1edbc 105 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
AnnaBridge 171:3a7713b1edbc 106 #define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
AnnaBridge 171:3a7713b1edbc 107 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
AnnaBridge 171:3a7713b1edbc 108 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
AnnaBridge 171:3a7713b1edbc 109 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
AnnaBridge 171:3a7713b1edbc 110 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 111 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 112 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 113 #define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 114 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
AnnaBridge 171:3a7713b1edbc 115 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
AnnaBridge 171:3a7713b1edbc 116 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
AnnaBridge 171:3a7713b1edbc 117 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
AnnaBridge 171:3a7713b1edbc 118 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
AnnaBridge 171:3a7713b1edbc 119 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
AnnaBridge 171:3a7713b1edbc 120 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
AnnaBridge 171:3a7713b1edbc 123 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
AnnaBridge 171:3a7713b1edbc 124 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
AnnaBridge 171:3a7713b1edbc 125 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
AnnaBridge 171:3a7713b1edbc 126 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
AnnaBridge 171:3a7713b1edbc 127 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
AnnaBridge 171:3a7713b1edbc 128 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
AnnaBridge 171:3a7713b1edbc 129 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
AnnaBridge 171:3a7713b1edbc 130 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
AnnaBridge 171:3a7713b1edbc 131 #define __HAL_DBGMCU_UNFREEZE_LPTIM1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
AnnaBridge 171:3a7713b1edbc 132 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
AnnaBridge 171:3a7713b1edbc 133 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
AnnaBridge 171:3a7713b1edbc 134 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
AnnaBridge 171:3a7713b1edbc 135 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 136 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 137 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 138 #define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
AnnaBridge 171:3a7713b1edbc 139 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
AnnaBridge 171:3a7713b1edbc 140 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
AnnaBridge 171:3a7713b1edbc 141 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
AnnaBridge 171:3a7713b1edbc 142 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
AnnaBridge 171:3a7713b1edbc 143 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
AnnaBridge 171:3a7713b1edbc 144 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
AnnaBridge 171:3a7713b1edbc 145 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
AnnaBridge 171:3a7713b1edbc 146
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 /** @brief FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000
AnnaBridge 171:3a7713b1edbc 149 */
AnnaBridge 171:3a7713b1edbc 150 #define __HAL_SYSCFG_REMAPMEMORY_FMC() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC))
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /** @brief FMC/SDRAM mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000
AnnaBridge 171:3a7713b1edbc 154 */
AnnaBridge 171:3a7713b1edbc 155 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\
AnnaBridge 171:3a7713b1edbc 156 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\
AnnaBridge 171:3a7713b1edbc 157 }while(0);
AnnaBridge 171:3a7713b1edbc 158 /**
AnnaBridge 171:3a7713b1edbc 159 * @brief Return the memory boot mapping as configured by user.
AnnaBridge 171:3a7713b1edbc 160 * @retval The boot mode as configured by user. The returned value can be one
AnnaBridge 171:3a7713b1edbc 161 * of the following values:
AnnaBridge 171:3a7713b1edbc 162 * @arg @ref SYSCFG_MEM_BOOT_ADD0
AnnaBridge 171:3a7713b1edbc 163 * @arg @ref SYSCFG_MEM_BOOT_ADD1
AnnaBridge 171:3a7713b1edbc 164 */
AnnaBridge 171:3a7713b1edbc 165 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT)
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
AnnaBridge 171:3a7713b1edbc 168 /** @brief SYSCFG Break Cortex-M7 Lockup lock.
AnnaBridge 171:3a7713b1edbc 169 * Enable and lock the connection of Cortex-M7 LOCKUP (Hardfault) output to TIM1/8 Break input.
AnnaBridge 171:3a7713b1edbc 170 * @note The selected configuration is locked and can be unlocked only by system reset.
AnnaBridge 171:3a7713b1edbc 171 */
AnnaBridge 171:3a7713b1edbc 172 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_CLL)
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /** @brief SYSCFG Break PVD lock.
AnnaBridge 171:3a7713b1edbc 175 * Enable and lock the PVD connection to Timer1/8 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.
AnnaBridge 171:3a7713b1edbc 176 * @note The selected configuration is locked and can be unlocked only by system reset.
AnnaBridge 171:3a7713b1edbc 177 */
AnnaBridge 171:3a7713b1edbc 178 #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_PVDL)
AnnaBridge 171:3a7713b1edbc 179 #endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
AnnaBridge 171:3a7713b1edbc 180
AnnaBridge 171:3a7713b1edbc 181 /**
AnnaBridge 171:3a7713b1edbc 182 * @}
AnnaBridge 171:3a7713b1edbc 183 */
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 /** @defgroup HAL_Private_Macros HAL Private Macros
AnnaBridge 171:3a7713b1edbc 186 * @{
AnnaBridge 171:3a7713b1edbc 187 */
AnnaBridge 171:3a7713b1edbc 188 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
AnnaBridge 171:3a7713b1edbc 189 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
AnnaBridge 171:3a7713b1edbc 190 ((FREQ) == HAL_TICK_FREQ_1KHZ))
AnnaBridge 171:3a7713b1edbc 191 /**
AnnaBridge 171:3a7713b1edbc 192 * @}
AnnaBridge 171:3a7713b1edbc 193 */
AnnaBridge 171:3a7713b1edbc 194 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 195 /** @addtogroup HAL_Exported_Functions
AnnaBridge 171:3a7713b1edbc 196 * @{
AnnaBridge 171:3a7713b1edbc 197 */
AnnaBridge 171:3a7713b1edbc 198 /** @addtogroup HAL_Exported_Functions_Group1
AnnaBridge 171:3a7713b1edbc 199 * @{
AnnaBridge 171:3a7713b1edbc 200 */
AnnaBridge 171:3a7713b1edbc 201 /* Initialization and Configuration functions ******************************/
AnnaBridge 171:3a7713b1edbc 202 HAL_StatusTypeDef HAL_Init(void);
AnnaBridge 171:3a7713b1edbc 203 HAL_StatusTypeDef HAL_DeInit(void);
AnnaBridge 171:3a7713b1edbc 204 void HAL_MspInit(void);
AnnaBridge 171:3a7713b1edbc 205 void HAL_MspDeInit(void);
AnnaBridge 171:3a7713b1edbc 206 HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
AnnaBridge 171:3a7713b1edbc 207 /**
AnnaBridge 171:3a7713b1edbc 208 * @}
AnnaBridge 171:3a7713b1edbc 209 */
AnnaBridge 171:3a7713b1edbc 210
AnnaBridge 171:3a7713b1edbc 211 /** @addtogroup HAL_Exported_Functions_Group2
AnnaBridge 171:3a7713b1edbc 212 * @{
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214 /* Peripheral Control functions ************************************************/
AnnaBridge 171:3a7713b1edbc 215 void HAL_IncTick(void);
AnnaBridge 171:3a7713b1edbc 216 void HAL_Delay(uint32_t Delay);
AnnaBridge 171:3a7713b1edbc 217 uint32_t HAL_GetTick(void);
AnnaBridge 171:3a7713b1edbc 218 uint32_t HAL_GetTickPrio(void);
AnnaBridge 171:3a7713b1edbc 219 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
AnnaBridge 171:3a7713b1edbc 220 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
AnnaBridge 171:3a7713b1edbc 221 void HAL_SuspendTick(void);
AnnaBridge 171:3a7713b1edbc 222 void HAL_ResumeTick(void);
AnnaBridge 171:3a7713b1edbc 223 uint32_t HAL_GetHalVersion(void);
AnnaBridge 171:3a7713b1edbc 224 uint32_t HAL_GetREVID(void);
AnnaBridge 171:3a7713b1edbc 225 uint32_t HAL_GetDEVID(void);
AnnaBridge 171:3a7713b1edbc 226 uint32_t HAL_GetUIDw0(void);
AnnaBridge 171:3a7713b1edbc 227 uint32_t HAL_GetUIDw1(void);
AnnaBridge 171:3a7713b1edbc 228 uint32_t HAL_GetUIDw2(void);
AnnaBridge 171:3a7713b1edbc 229 void HAL_DBGMCU_EnableDBGSleepMode(void);
AnnaBridge 171:3a7713b1edbc 230 void HAL_DBGMCU_DisableDBGSleepMode(void);
AnnaBridge 171:3a7713b1edbc 231 void HAL_DBGMCU_EnableDBGStopMode(void);
AnnaBridge 171:3a7713b1edbc 232 void HAL_DBGMCU_DisableDBGStopMode(void);
AnnaBridge 171:3a7713b1edbc 233 void HAL_DBGMCU_EnableDBGStandbyMode(void);
AnnaBridge 171:3a7713b1edbc 234 void HAL_DBGMCU_DisableDBGStandbyMode(void);
AnnaBridge 171:3a7713b1edbc 235 void HAL_EnableCompensationCell(void);
AnnaBridge 171:3a7713b1edbc 236 void HAL_DisableCompensationCell(void);
AnnaBridge 171:3a7713b1edbc 237 void HAL_EnableFMCMemorySwapping(void);
AnnaBridge 171:3a7713b1edbc 238 void HAL_DisableFMCMemorySwapping(void);
AnnaBridge 171:3a7713b1edbc 239 #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
AnnaBridge 171:3a7713b1edbc 240 void HAL_EnableMemorySwappingBank(void);
AnnaBridge 171:3a7713b1edbc 241 void HAL_DisableMemorySwappingBank(void);
AnnaBridge 171:3a7713b1edbc 242 #endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
AnnaBridge 171:3a7713b1edbc 243 /**
AnnaBridge 171:3a7713b1edbc 244 * @}
AnnaBridge 171:3a7713b1edbc 245 */
AnnaBridge 171:3a7713b1edbc 246
AnnaBridge 171:3a7713b1edbc 247 /**
AnnaBridge 171:3a7713b1edbc 248 * @}
AnnaBridge 171:3a7713b1edbc 249 */
AnnaBridge 171:3a7713b1edbc 250 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 251 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 252 /** @defgroup HAL_Private_Variables HAL Private Variables
AnnaBridge 171:3a7713b1edbc 253 * @{
AnnaBridge 171:3a7713b1edbc 254 */
AnnaBridge 171:3a7713b1edbc 255 /**
AnnaBridge 171:3a7713b1edbc 256 * @}
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 259 /** @defgroup HAL_Private_Constants HAL Private Constants
AnnaBridge 171:3a7713b1edbc 260 * @{
AnnaBridge 171:3a7713b1edbc 261 */
AnnaBridge 171:3a7713b1edbc 262 /**
AnnaBridge 171:3a7713b1edbc 263 * @}
AnnaBridge 171:3a7713b1edbc 264 */
AnnaBridge 171:3a7713b1edbc 265 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 266 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 267 /**
AnnaBridge 171:3a7713b1edbc 268 * @}
AnnaBridge 171:3a7713b1edbc 269 */
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 /**
AnnaBridge 171:3a7713b1edbc 272 * @}
AnnaBridge 171:3a7713b1edbc 273 */
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 276 }
AnnaBridge 171:3a7713b1edbc 277 #endif
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 #endif /* __STM32F7xx_HAL_H */
AnnaBridge 171:3a7713b1edbc 280
AnnaBridge 171:3a7713b1edbc 281 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/