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TARGET_ARM_BEETLE_SOC/TOOLCHAIN_ARM_STD/i2c_def.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015 ARM Limited
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 171:3a7713b1edbc 5 * you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 6 * You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 13 * See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 14 * limitations under the License.
AnnaBridge 171:3a7713b1edbc 15 */
AnnaBridge 171:3a7713b1edbc 16 /*
AnnaBridge 171:3a7713b1edbc 17 * I2C interface Support
AnnaBridge 171:3a7713b1edbc 18 * =====================
AnnaBridge 171:3a7713b1edbc 19 */
AnnaBridge 171:3a7713b1edbc 20
AnnaBridge 171:3a7713b1edbc 21 #ifndef MBED_I2C_DEF_H
AnnaBridge 171:3a7713b1edbc 22 #define MBED_I2C_DEF_H
AnnaBridge 171:3a7713b1edbc 23
AnnaBridge 171:3a7713b1edbc 24 #include <stdint.h> /* standard types definitions */
AnnaBridge 171:3a7713b1edbc 25
AnnaBridge 171:3a7713b1edbc 26 typedef struct beetle_i2c
AnnaBridge 171:3a7713b1edbc 27 {
AnnaBridge 171:3a7713b1edbc 28 __IO uint32_t CONTROL; /* RW Control register */
AnnaBridge 171:3a7713b1edbc 29 __I uint32_t STATUS; /* RO Status register */
AnnaBridge 171:3a7713b1edbc 30 __IO uint32_t ADDRESS; /* RW I2C address register */
AnnaBridge 171:3a7713b1edbc 31 __IO uint32_t DATA; /* RW I2C data register */
AnnaBridge 171:3a7713b1edbc 32 __IO uint32_t IRQ_STATUS; /* RO Interrupt status register ( read only but write to clear bits) */
AnnaBridge 171:3a7713b1edbc 33 __IO uint32_t TRANSFER_SIZE; /* RW Transfer size register */
AnnaBridge 171:3a7713b1edbc 34 __IO uint32_t SLAVE_MONITOR; /* RW Slave monitor pause register */
AnnaBridge 171:3a7713b1edbc 35 __IO uint32_t TIMEOUT; /* RW Time out register */
AnnaBridge 171:3a7713b1edbc 36 __I uint32_t IRQ_MASK; /* RO Interrupt mask register */
AnnaBridge 171:3a7713b1edbc 37 __O uint32_t IRQ_ENABLE; /* WO Interrupt enable register */
AnnaBridge 171:3a7713b1edbc 38 __O uint32_t IRQ_DISABLE; /* WO Interrupt disable register */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 }I2C_TypeDef;
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #define I2C0_BASE (0x40007000ul) /* Shield Header I2C Base Address */
AnnaBridge 171:3a7713b1edbc 43 #define I2C1_BASE (0x4000E000ul) /* Onboard I2C Base Address */
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 #define SHIELD_I2C ((I2C_TypeDef *) I2C0_BASE )
AnnaBridge 171:3a7713b1edbc 46 #define BOARD_I2C ((I2C_TypeDef *) I2C1_BASE )
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 /* Control Register Masks */
AnnaBridge 171:3a7713b1edbc 49 #define I2C_CTRL_RW 0x0001 /* Transfer direction */
AnnaBridge 171:3a7713b1edbc 50 #define I2C_CTRL_MS 0x0002 /* Mode (master / slave) */
AnnaBridge 171:3a7713b1edbc 51 #define I2C_CTRL_NEA 0x0004 /* Addressing mode */
AnnaBridge 171:3a7713b1edbc 52 #define I2C_CTRL_ACKEN 0x0008 /* ACK enable */
AnnaBridge 171:3a7713b1edbc 53 #define I2C_CTRL_HOLD 0x0010 /* Clock hold enable */
AnnaBridge 171:3a7713b1edbc 54 #define I2C_SLVMON 0x0020 /* Slave monitor mode */
AnnaBridge 171:3a7713b1edbc 55 #define I2C_CTRL_CLR_FIFO 0x0040 /* Force clear of FIFO */
AnnaBridge 171:3a7713b1edbc 56 #define I2C_CTRL_DIVISOR_B 0x3F00 /* Stage B clock divider */
AnnaBridge 171:3a7713b1edbc 57 #define I2C_CTRL_DIVISOR_A 0xA000 /* Stage A clock divider */
AnnaBridge 171:3a7713b1edbc 58 #define I2C_CTRL_DIVISORS 0xFF00 /* Combined A and B fields */
AnnaBridge 171:3a7713b1edbc 59 #define I2C_CTRL_DIVISOR_OFFSET 8 /* Offset of the clock divisor in
AnnaBridge 171:3a7713b1edbc 60 * the CONTROL register
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62 #define I2C_CTRL_DIVISOR_A_BIT_MASK 0x03
AnnaBridge 171:3a7713b1edbc 63 /*
AnnaBridge 171:3a7713b1edbc 64 * First part of the clock
AnnaBridge 171:3a7713b1edbc 65 * divisor in the CONTROL register
AnnaBridge 171:3a7713b1edbc 66 */
AnnaBridge 171:3a7713b1edbc 67 #define I2C_CTRL_DIVISOR_B_BIT_MASK 0x3F
AnnaBridge 171:3a7713b1edbc 68 /*
AnnaBridge 171:3a7713b1edbc 69 * Second part of the clock
AnnaBridge 171:3a7713b1edbc 70 * divisor in the CONTROL register
AnnaBridge 171:3a7713b1edbc 71 */
AnnaBridge 171:3a7713b1edbc 72
AnnaBridge 171:3a7713b1edbc 73 /* Status Register Masks */
AnnaBridge 171:3a7713b1edbc 74 #define I2C_STATUS_RXRW 0x0008 /* Mode of transmission from master */
AnnaBridge 171:3a7713b1edbc 75 #define I2C_STATUS_RXDV 0x0020 /* Valid data waiting to be read */
AnnaBridge 171:3a7713b1edbc 76 #define I2C_STATUS_TXDV 0x0040 /* Still a data byte to be sent */
AnnaBridge 171:3a7713b1edbc 77 #define I2C_STATUS_RXOVF 0x0080 /* Receiver overflow */
AnnaBridge 171:3a7713b1edbc 78 #define I2C_STATUS_BA 0x0100 /* Bus active */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /* Address Register Masks */
AnnaBridge 171:3a7713b1edbc 81 #define I2C_ADDRESS_7BIT 0x007F
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /* Interrupt Status / Enable / Disable Register Masks */
AnnaBridge 171:3a7713b1edbc 84 #define I2C_IRQ_COMP 0x0001 /* Transfer complete */
AnnaBridge 171:3a7713b1edbc 85 #define I2C_IRQ_DATA 0x0002 /* More data */
AnnaBridge 171:3a7713b1edbc 86 #define I2C_IRQ_NACK 0x0004 /* Transfer not acknowledged */
AnnaBridge 171:3a7713b1edbc 87 #define I2C_IRQ_TO 0x0008 /* Transfer timed out */
AnnaBridge 171:3a7713b1edbc 88 #define I2C_IRQ_SLV_RDY 0x0010 /* Monitored slave ready */
AnnaBridge 171:3a7713b1edbc 89 #define I2C_IRQ_RX_OVF 0x0020 /* Receive overflow */
AnnaBridge 171:3a7713b1edbc 90 #define I2C_IRQ_TX_OVF 0x0040 /* Transmit overflow */
AnnaBridge 171:3a7713b1edbc 91 #define I2C_IRQ_RX_UNF 0x0080 /* Receive underflow */
AnnaBridge 171:3a7713b1edbc 92 #define I2C_IRQ_ARB_LOST 0x0200 /* Arbitration lost */
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 /* Transfer Size Register Masks */
AnnaBridge 171:3a7713b1edbc 95 #define I2C_TRANSFER_SIZE 0xFF
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /* Error codes */
AnnaBridge 171:3a7713b1edbc 98 #define E_SUCCESS 0x0
AnnaBridge 171:3a7713b1edbc 99 #define E_INCOMPLETE_DATA 0x1
AnnaBridge 171:3a7713b1edbc 100
AnnaBridge 171:3a7713b1edbc 101 #endif