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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_i2c.h@145:64910690c574, 2017-06-21 (annotated)

Committer:: AnnaBridge
Date:: Wed Jun 21 17:31:38 2017 +0100
Revision:: 145:64910690c574
Parent:: 128:9bcdf88f62b0

Release 145 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	122:f9eeca106725	1	/**
Kojto	122:f9eeca106725	2	******************************************************************************
Kojto	122:f9eeca106725	3	* @file stm32l4xx_ll_i2c.h
Kojto	122:f9eeca106725	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @version V1.7.1
AnnaBridge	145:64910690c574	6	* @date 21-April-2017
Kojto	122:f9eeca106725	7	* @brief Header file of I2C LL module.
Kojto	122:f9eeca106725	8	******************************************************************************
Kojto	122:f9eeca106725	9	* @attention
Kojto	122:f9eeca106725	10	*
AnnaBridge	145:64910690c574	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Kojto	122:f9eeca106725	12	*
Kojto	122:f9eeca106725	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	122:f9eeca106725	14	* are permitted provided that the following conditions are met:
Kojto	122:f9eeca106725	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	122:f9eeca106725	16	* this list of conditions and the following disclaimer.
Kojto	122:f9eeca106725	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	122:f9eeca106725	18	* this list of conditions and the following disclaimer in the documentation
Kojto	122:f9eeca106725	19	* and/or other materials provided with the distribution.
Kojto	122:f9eeca106725	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	122:f9eeca106725	21	* may be used to endorse or promote products derived from this software
Kojto	122:f9eeca106725	22	* without specific prior written permission.
Kojto	122:f9eeca106725	23	*
Kojto	122:f9eeca106725	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	122:f9eeca106725	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	122:f9eeca106725	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	122:f9eeca106725	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	122:f9eeca106725	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	122:f9eeca106725	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	122:f9eeca106725	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	122:f9eeca106725	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	122:f9eeca106725	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	122:f9eeca106725	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	122:f9eeca106725	34	*
Kojto	122:f9eeca106725	35	******************************************************************************
Kojto	122:f9eeca106725	36	*/
Kojto	122:f9eeca106725	37
Kojto	122:f9eeca106725	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	122:f9eeca106725	39	#ifndef __STM32L4xx_LL_I2C_H
Kojto	122:f9eeca106725	40	#define __STM32L4xx_LL_I2C_H
Kojto	122:f9eeca106725	41
Kojto	122:f9eeca106725	42	#ifdef __cplusplus
Kojto	122:f9eeca106725	43	extern "C" {
Kojto	122:f9eeca106725	44	#endif
Kojto	122:f9eeca106725	45
Kojto	122:f9eeca106725	46	/* Includes ------------------------------------------------------------------*/
Kojto	122:f9eeca106725	47	#include "stm32l4xx.h"
Kojto	122:f9eeca106725	48
Kojto	122:f9eeca106725	49	/** @addtogroup STM32L4xx_LL_Driver
Kojto	122:f9eeca106725	50	* @{
Kojto	122:f9eeca106725	51	*/
Kojto	122:f9eeca106725	52
AnnaBridge	145:64910690c574	53	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3) \|\| defined (I2C4)
Kojto	122:f9eeca106725	54
Kojto	122:f9eeca106725	55	/** @defgroup I2C_LL I2C
Kojto	122:f9eeca106725	56	* @{
Kojto	122:f9eeca106725	57	*/
Kojto	122:f9eeca106725	58
Kojto	122:f9eeca106725	59	/* Private types -------------------------------------------------------------*/
Kojto	122:f9eeca106725	60	/* Private variables ---------------------------------------------------------*/
Kojto	122:f9eeca106725	61
Kojto	122:f9eeca106725	62	/* Private constants ---------------------------------------------------------*/
Kojto	122:f9eeca106725	63	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
Kojto	122:f9eeca106725	64	* @{
Kojto	122:f9eeca106725	65	*/
Kojto	122:f9eeca106725	66	/**
Kojto	122:f9eeca106725	67	* @}
Kojto	122:f9eeca106725	68	*/
Kojto	122:f9eeca106725	69
Kojto	122:f9eeca106725	70	/* Private macros ------------------------------------------------------------*/
Kojto	122:f9eeca106725	71	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	72	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
Kojto	122:f9eeca106725	73	* @{
Kojto	122:f9eeca106725	74	*/
Kojto	122:f9eeca106725	75	/**
Kojto	122:f9eeca106725	76	* @}
Kojto	122:f9eeca106725	77	*/
Kojto	122:f9eeca106725	78	#endif /USE_FULL_LL_DRIVER/
Kojto	122:f9eeca106725	79
Kojto	122:f9eeca106725	80	/* Exported types ------------------------------------------------------------*/
Kojto	122:f9eeca106725	81	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	82	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
Kojto	122:f9eeca106725	83	* @{
Kojto	122:f9eeca106725	84	*/
Kojto	122:f9eeca106725	85	typedef struct
Kojto	122:f9eeca106725	86	{
Kojto	122:f9eeca106725	87	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
Kojto	122:f9eeca106725	88	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
Kojto	122:f9eeca106725	89
Kojto	122:f9eeca106725	90	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
Kojto	122:f9eeca106725	91
Kojto	122:f9eeca106725	92	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
Kojto	122:f9eeca106725	93	This parameter must be set by referring to the STM32CubeMX Tool and
Kojto	122:f9eeca106725	94	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
Kojto	122:f9eeca106725	95
Kojto	122:f9eeca106725	96	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
Kojto	122:f9eeca106725	97
Kojto	122:f9eeca106725	98	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
Kojto	122:f9eeca106725	99	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
Kojto	122:f9eeca106725	100
Kojto	122:f9eeca106725	101	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
Kojto	122:f9eeca106725	102
Kojto	122:f9eeca106725	103	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
Kojto	122:f9eeca106725	104	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
Kojto	122:f9eeca106725	105
Kojto	122:f9eeca106725	106	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
Kojto	122:f9eeca106725	107
Kojto	122:f9eeca106725	108	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
Kojto	122:f9eeca106725	109	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
Kojto	122:f9eeca106725	110
Kojto	122:f9eeca106725	111	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
Kojto	122:f9eeca106725	112
Kojto	122:f9eeca106725	113	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
Kojto	122:f9eeca106725	114	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
Kojto	122:f9eeca106725	115
Kojto	122:f9eeca106725	116	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
Kojto	122:f9eeca106725	117
Kojto	122:f9eeca106725	118	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
Kojto	122:f9eeca106725	119	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
Kojto	122:f9eeca106725	120
Kojto	122:f9eeca106725	121	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
Kojto	122:f9eeca106725	122	} LL_I2C_InitTypeDef;
Kojto	122:f9eeca106725	123	/**
Kojto	122:f9eeca106725	124	* @}
Kojto	122:f9eeca106725	125	*/
Kojto	122:f9eeca106725	126	#endif /USE_FULL_LL_DRIVER/
Kojto	122:f9eeca106725	127
Kojto	122:f9eeca106725	128	/* Exported constants --------------------------------------------------------*/
Kojto	122:f9eeca106725	129	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
Kojto	122:f9eeca106725	130	* @{
Kojto	122:f9eeca106725	131	*/
Kojto	122:f9eeca106725	132
Kojto	122:f9eeca106725	133	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto	122:f9eeca106725	134	* @brief Flags defines which can be used with LL_I2C_WriteReg function
Kojto	122:f9eeca106725	135	* @{
Kojto	122:f9eeca106725	136	*/
Kojto	122:f9eeca106725	137	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
Kojto	122:f9eeca106725	138	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
Kojto	122:f9eeca106725	139	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
Kojto	122:f9eeca106725	140	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
Kojto	122:f9eeca106725	141	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
Kojto	122:f9eeca106725	142	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
Kojto	122:f9eeca106725	143	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
Kojto	122:f9eeca106725	144	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
Kojto	122:f9eeca106725	145	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
Kojto	122:f9eeca106725	146	/**
Kojto	122:f9eeca106725	147	* @}
Kojto	122:f9eeca106725	148	*/
Kojto	122:f9eeca106725	149
Kojto	122:f9eeca106725	150	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
Kojto	122:f9eeca106725	151	* @brief Flags defines which can be used with LL_I2C_ReadReg function
Kojto	122:f9eeca106725	152	* @{
Kojto	122:f9eeca106725	153	*/
Kojto	122:f9eeca106725	154	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
Kojto	122:f9eeca106725	155	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
Kojto	122:f9eeca106725	156	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
Kojto	122:f9eeca106725	157	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
Kojto	122:f9eeca106725	158	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
Kojto	122:f9eeca106725	159	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
Kojto	122:f9eeca106725	160	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
Kojto	122:f9eeca106725	161	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
Kojto	122:f9eeca106725	162	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
Kojto	122:f9eeca106725	163	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
Kojto	122:f9eeca106725	164	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
Kojto	122:f9eeca106725	165	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
Kojto	122:f9eeca106725	166	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
Kojto	122:f9eeca106725	167	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
Kojto	122:f9eeca106725	168	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
Kojto	122:f9eeca106725	169	/**
Kojto	122:f9eeca106725	170	* @}
Kojto	122:f9eeca106725	171	*/
Kojto	122:f9eeca106725	172
Kojto	122:f9eeca106725	173	/** @defgroup I2C_LL_EC_IT IT Defines
Kojto	122:f9eeca106725	174	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
Kojto	122:f9eeca106725	175	* @{
Kojto	122:f9eeca106725	176	*/
Kojto	122:f9eeca106725	177	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
Kojto	122:f9eeca106725	178	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
Kojto	122:f9eeca106725	179	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
Kojto	122:f9eeca106725	180	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
Kojto	122:f9eeca106725	181	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
Kojto	122:f9eeca106725	182	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
Kojto	122:f9eeca106725	183	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
Kojto	122:f9eeca106725	184	/**
Kojto	122:f9eeca106725	185	* @}
Kojto	122:f9eeca106725	186	*/
Kojto	122:f9eeca106725	187
Kojto	122:f9eeca106725	188	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
Kojto	122:f9eeca106725	189	* @{
Kojto	122:f9eeca106725	190	*/
AnnaBridge	145:64910690c574	191	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
Kojto	122:f9eeca106725	192	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	145:64910690c574	193	#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /!< SMBus Device default mode (Default address not acknowledge) /
Kojto	122:f9eeca106725	194	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
Kojto	122:f9eeca106725	195	/**
Kojto	122:f9eeca106725	196	* @}
Kojto	122:f9eeca106725	197	*/
Kojto	122:f9eeca106725	198
Kojto	122:f9eeca106725	199	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
Kojto	122:f9eeca106725	200	* @{
Kojto	122:f9eeca106725	201	*/
AnnaBridge	145:64910690c574	202	#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /!< Analog filter is enabled. /
Kojto	122:f9eeca106725	203	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
Kojto	122:f9eeca106725	204	/**
Kojto	122:f9eeca106725	205	* @}
Kojto	122:f9eeca106725	206	*/
Kojto	122:f9eeca106725	207
Kojto	122:f9eeca106725	208	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
Kojto	122:f9eeca106725	209	* @{
Kojto	122:f9eeca106725	210	*/
AnnaBridge	145:64910690c574	211	#define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /!< Master operates in 7-bit addressing mode. /
Kojto	122:f9eeca106725	212	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
Kojto	122:f9eeca106725	213	/**
Kojto	122:f9eeca106725	214	* @}
Kojto	122:f9eeca106725	215	*/
Kojto	122:f9eeca106725	216
Kojto	122:f9eeca106725	217	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
Kojto	122:f9eeca106725	218	* @{
Kojto	122:f9eeca106725	219	*/
AnnaBridge	145:64910690c574	220	#define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /!< Own address 1 is a 7-bit address. /
Kojto	122:f9eeca106725	221	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
Kojto	122:f9eeca106725	222	/**
Kojto	122:f9eeca106725	223	* @}
Kojto	122:f9eeca106725	224	*/
Kojto	122:f9eeca106725	225
Kojto	122:f9eeca106725	226	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
Kojto	122:f9eeca106725	227	* @{
Kojto	122:f9eeca106725	228	*/
Kojto	122:f9eeca106725	229	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
Kojto	122:f9eeca106725	230	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
Kojto	122:f9eeca106725	231	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
Kojto	122:f9eeca106725	232	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
Kojto	122:f9eeca106725	233	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
Kojto	122:f9eeca106725	234	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
Kojto	122:f9eeca106725	235	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
Kojto	122:f9eeca106725	236	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
Kojto	122:f9eeca106725	237	/**
Kojto	122:f9eeca106725	238	* @}
Kojto	122:f9eeca106725	239	*/
Kojto	122:f9eeca106725	240
Kojto	122:f9eeca106725	241	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
Kojto	122:f9eeca106725	242	* @{
Kojto	122:f9eeca106725	243	*/
AnnaBridge	145:64910690c574	244	#define LL_I2C_ACK 0x00000000U /!< ACK is sent after current received byte. /
Kojto	122:f9eeca106725	245	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
Kojto	122:f9eeca106725	246	/**
Kojto	122:f9eeca106725	247	* @}
Kojto	122:f9eeca106725	248	*/
Kojto	122:f9eeca106725	249
Kojto	122:f9eeca106725	250	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
Kojto	122:f9eeca106725	251	* @{
Kojto	122:f9eeca106725	252	*/
AnnaBridge	145:64910690c574	253	#define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /!< Slave Address in 7-bit. /
Kojto	122:f9eeca106725	254	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
Kojto	122:f9eeca106725	255	/**
Kojto	122:f9eeca106725	256	* @}
Kojto	122:f9eeca106725	257	*/
Kojto	122:f9eeca106725	258
Kojto	122:f9eeca106725	259	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
Kojto	122:f9eeca106725	260	* @{
Kojto	122:f9eeca106725	261	*/
AnnaBridge	145:64910690c574	262	#define LL_I2C_REQUEST_WRITE 0x00000000U /!< Master request a write transfer. /
Kojto	122:f9eeca106725	263	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
Kojto	122:f9eeca106725	264	/**
Kojto	122:f9eeca106725	265	* @}
Kojto	122:f9eeca106725	266	*/
Kojto	122:f9eeca106725	267
Kojto	122:f9eeca106725	268	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
Kojto	122:f9eeca106725	269	* @{
Kojto	122:f9eeca106725	270	*/
Kojto	122:f9eeca106725	271	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
Kojto	122:f9eeca106725	272	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	145:64910690c574	273	#define LL_I2C_MODE_SOFTEND 0x00000000U /!< Enable I2C Software end mode with no HW PEC comparison. /
Kojto	122:f9eeca106725	274	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
Kojto	122:f9eeca106725	275	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
Kojto	122:f9eeca106725	276	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
Kojto	122:f9eeca106725	277	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
Kojto	122:f9eeca106725	278	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
Kojto	122:f9eeca106725	279	/**
Kojto	122:f9eeca106725	280	* @}
Kojto	122:f9eeca106725	281	*/
Kojto	122:f9eeca106725	282
Kojto	122:f9eeca106725	283	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
Kojto	122:f9eeca106725	284	* @{
Kojto	122:f9eeca106725	285	*/
AnnaBridge	145:64910690c574	286	#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /!< Don't Generate Stop and Start condition. /
Kojto	122:f9eeca106725	287	#define LL_I2C_GENERATE_STOP I2C_CR2_STOP /!< Generate Stop condition (Size should be set to 0). /
Kojto	122:f9eeca106725	288	#define LL_I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
Kojto	122:f9eeca106725	289	#define LL_I2C_GENERATE_START_WRITE I2C_CR2_START /!< Generate Start for write request. /
Kojto	122:f9eeca106725	290	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
Kojto	122:f9eeca106725	291	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE I2C_CR2_START /!< Generate Restart for write request, slave 7Bit address. /
Kojto	122:f9eeca106725	292	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
Kojto	122:f9eeca106725	293	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE I2C_CR2_START /!< Generate Restart for write request, slave 10Bit address./
Kojto	122:f9eeca106725	294	/**
Kojto	122:f9eeca106725	295	* @}
Kojto	122:f9eeca106725	296	*/
Kojto	122:f9eeca106725	297
Kojto	122:f9eeca106725	298	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
Kojto	122:f9eeca106725	299	* @{
Kojto	122:f9eeca106725	300	*/
AnnaBridge	145:64910690c574	301	#define LL_I2C_DIRECTION_WRITE 0x00000000U /!< Write transfer request by master, slave enters receiver mode. /
Kojto	122:f9eeca106725	302	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
Kojto	122:f9eeca106725	303	/**
Kojto	122:f9eeca106725	304	* @}
Kojto	122:f9eeca106725	305	*/
Kojto	122:f9eeca106725	306
Kojto	122:f9eeca106725	307	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
Kojto	122:f9eeca106725	308	* @{
Kojto	122:f9eeca106725	309	*/
AnnaBridge	145:64910690c574	310	#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	145:64910690c574	311	#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
Kojto	122:f9eeca106725	312	/**
Kojto	122:f9eeca106725	313	* @}
Kojto	122:f9eeca106725	314	*/
Kojto	122:f9eeca106725	315
Kojto	122:f9eeca106725	316	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
Kojto	122:f9eeca106725	317	* @{
Kojto	122:f9eeca106725	318	*/
AnnaBridge	145:64910690c574	319	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /!< TimeoutA is used to detect SCL low level timeout. /
Kojto	122:f9eeca106725	320	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
Kojto	122:f9eeca106725	321	/**
Kojto	122:f9eeca106725	322	* @}
Kojto	122:f9eeca106725	323	*/
Kojto	122:f9eeca106725	324
Kojto	122:f9eeca106725	325	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
Kojto	122:f9eeca106725	326	* @{
Kojto	122:f9eeca106725	327	*/
Kojto	122:f9eeca106725	328	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
Kojto	122:f9eeca106725	329	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
Kojto	122:f9eeca106725	330	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
Kojto	122:f9eeca106725	331	/**
Kojto	122:f9eeca106725	332	* @}
Kojto	122:f9eeca106725	333	*/
Kojto	122:f9eeca106725	334
Kojto	122:f9eeca106725	335	/**
Kojto	122:f9eeca106725	336	* @}
Kojto	122:f9eeca106725	337	*/
Kojto	122:f9eeca106725	338
Kojto	122:f9eeca106725	339	/* Exported macro ------------------------------------------------------------*/
Kojto	122:f9eeca106725	340	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
Kojto	122:f9eeca106725	341	* @{
Kojto	122:f9eeca106725	342	*/
Kojto	122:f9eeca106725	343
Kojto	122:f9eeca106725	344	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto	122:f9eeca106725	345	* @{
Kojto	122:f9eeca106725	346	*/
Kojto	122:f9eeca106725	347
Kojto	122:f9eeca106725	348	/**
Kojto	122:f9eeca106725	349	* @brief Write a value in I2C register
Kojto	122:f9eeca106725	350	* @param __INSTANCE__ I2C Instance
Kojto	122:f9eeca106725	351	* @param __REG__ Register to be written
Kojto	122:f9eeca106725	352	* @param __VALUE__ Value to be written in the register
Kojto	122:f9eeca106725	353	* @retval None
Kojto	122:f9eeca106725	354	*/
Kojto	122:f9eeca106725	355	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	122:f9eeca106725	356
Kojto	122:f9eeca106725	357	/**
Kojto	122:f9eeca106725	358	* @brief Read a value in I2C register
Kojto	122:f9eeca106725	359	* @param __INSTANCE__ I2C Instance
Kojto	122:f9eeca106725	360	* @param __REG__ Register to be read
Kojto	122:f9eeca106725	361	* @retval Register value
Kojto	122:f9eeca106725	362	*/
Kojto	122:f9eeca106725	363	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	122:f9eeca106725	364	/**
Kojto	122:f9eeca106725	365	* @}
Kojto	122:f9eeca106725	366	*/
Kojto	122:f9eeca106725	367
Kojto	122:f9eeca106725	368	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
Kojto	122:f9eeca106725	369	* @{
Kojto	122:f9eeca106725	370	*/
Kojto	122:f9eeca106725	371	/**
Kojto	122:f9eeca106725	372	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	145:64910690c574	373	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	145:64910690c574	374	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	145:64910690c574	375	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	145:64910690c574	376	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	145:64910690c574	377	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	145:64910690c574	378	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
Kojto	122:f9eeca106725	379	*/
Kojto	122:f9eeca106725	380	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	145:64910690c574	381	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	145:64910690c574	382	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	145:64910690c574	383	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	145:64910690c574	384	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	145:64910690c574	385	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
Kojto	122:f9eeca106725	386	/**
Kojto	122:f9eeca106725	387	* @}
Kojto	122:f9eeca106725	388	*/
Kojto	122:f9eeca106725	389
Kojto	122:f9eeca106725	390	/**
Kojto	122:f9eeca106725	391	* @}
Kojto	122:f9eeca106725	392	*/
Kojto	122:f9eeca106725	393
Kojto	122:f9eeca106725	394	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	395	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
Kojto	122:f9eeca106725	396	* @{
Kojto	122:f9eeca106725	397	*/
Kojto	122:f9eeca106725	398
Kojto	122:f9eeca106725	399	/** @defgroup I2C_LL_EF_Configuration Configuration
Kojto	122:f9eeca106725	400	* @{
Kojto	122:f9eeca106725	401	*/
Kojto	122:f9eeca106725	402
Kojto	122:f9eeca106725	403	/**
Kojto	122:f9eeca106725	404	* @brief Enable I2C peripheral (PE = 1).
Kojto	122:f9eeca106725	405	* @rmtoll CR1 PE LL_I2C_Enable
Kojto	122:f9eeca106725	406	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	407	* @retval None
Kojto	122:f9eeca106725	408	*/
Kojto	122:f9eeca106725	409	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	410	{
Kojto	122:f9eeca106725	411	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
Kojto	122:f9eeca106725	412	}
Kojto	122:f9eeca106725	413
Kojto	122:f9eeca106725	414	/**
Kojto	122:f9eeca106725	415	* @brief Disable I2C peripheral (PE = 0).
Kojto	122:f9eeca106725	416	* @note When PE = 0, the I2C SCL and SDA lines are released.
Kojto	122:f9eeca106725	417	* Internal state machines and status bits are put back to their reset value.
Kojto	122:f9eeca106725	418	* When cleared, PE must be kept low for at least 3 APB clock cycles.
Kojto	122:f9eeca106725	419	* @rmtoll CR1 PE LL_I2C_Disable
Kojto	122:f9eeca106725	420	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	421	* @retval None
Kojto	122:f9eeca106725	422	*/
Kojto	122:f9eeca106725	423	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	424	{
Kojto	122:f9eeca106725	425	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
Kojto	122:f9eeca106725	426	}
Kojto	122:f9eeca106725	427
Kojto	122:f9eeca106725	428	/**
Kojto	122:f9eeca106725	429	* @brief Check if the I2C peripheral is enabled or disabled.
Kojto	122:f9eeca106725	430	* @rmtoll CR1 PE LL_I2C_IsEnabled
Kojto	122:f9eeca106725	431	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	432	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	433	*/
Kojto	122:f9eeca106725	434	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	435	{
Kojto	122:f9eeca106725	436	return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
Kojto	122:f9eeca106725	437	}
Kojto	122:f9eeca106725	438
Kojto	122:f9eeca106725	439	/**
Kojto	122:f9eeca106725	440	* @brief Configure Noise Filters (Analog and Digital).
Kojto	122:f9eeca106725	441	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
Kojto	122:f9eeca106725	442	* The filters can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	443	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
Kojto	122:f9eeca106725	444	* CR1 DNF LL_I2C_ConfigFilters
Kojto	122:f9eeca106725	445	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	446	* @param AnalogFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	447	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
Kojto	122:f9eeca106725	448	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	145:64910690c574	449	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
Kojto	122:f9eeca106725	450	* This parameter is used to configure the digital noise filter on SDA and SCL input.
Kojto	122:f9eeca106725	451	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
Kojto	122:f9eeca106725	452	* @retval None
Kojto	122:f9eeca106725	453	*/
Kojto	122:f9eeca106725	454	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
Kojto	122:f9eeca106725	455	{
AnnaBridge	145:64910690c574	456	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
Kojto	122:f9eeca106725	457	}
Kojto	122:f9eeca106725	458
Kojto	122:f9eeca106725	459	/**
Kojto	122:f9eeca106725	460	* @brief Configure Digital Noise Filter.
Kojto	122:f9eeca106725	461	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
Kojto	122:f9eeca106725	462	* This filter can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	463	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
Kojto	122:f9eeca106725	464	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	465	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
Kojto	122:f9eeca106725	466	* This parameter is used to configure the digital noise filter on SDA and SCL input.
Kojto	122:f9eeca106725	467	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
Kojto	122:f9eeca106725	468	* @retval None
Kojto	122:f9eeca106725	469	*/
Kojto	122:f9eeca106725	470	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
Kojto	122:f9eeca106725	471	{
AnnaBridge	145:64910690c574	472	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
Kojto	122:f9eeca106725	473	}
Kojto	122:f9eeca106725	474
Kojto	122:f9eeca106725	475	/**
Kojto	122:f9eeca106725	476	* @brief Get the current Digital Noise Filter configuration.
Kojto	122:f9eeca106725	477	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
Kojto	122:f9eeca106725	478	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	479	* @retval Value between Min_Data=0x0 and Max_Data=0xF
Kojto	122:f9eeca106725	480	*/
Kojto	122:f9eeca106725	481	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	482	{
AnnaBridge	145:64910690c574	483	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
Kojto	122:f9eeca106725	484	}
Kojto	122:f9eeca106725	485
Kojto	122:f9eeca106725	486	/**
Kojto	122:f9eeca106725	487	* @brief Enable Analog Noise Filter.
Kojto	122:f9eeca106725	488	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	489	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
Kojto	122:f9eeca106725	490	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	491	* @retval None
Kojto	122:f9eeca106725	492	*/
Kojto	122:f9eeca106725	493	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	494	{
Kojto	122:f9eeca106725	495	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
Kojto	122:f9eeca106725	496	}
Kojto	122:f9eeca106725	497
Kojto	122:f9eeca106725	498	/**
Kojto	122:f9eeca106725	499	* @brief Disable Analog Noise Filter.
Kojto	122:f9eeca106725	500	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	501	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
Kojto	122:f9eeca106725	502	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	503	* @retval None
Kojto	122:f9eeca106725	504	*/
Kojto	122:f9eeca106725	505	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	506	{
Kojto	122:f9eeca106725	507	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
Kojto	122:f9eeca106725	508	}
Kojto	122:f9eeca106725	509
Kojto	122:f9eeca106725	510	/**
Kojto	122:f9eeca106725	511	* @brief Check if Analog Noise Filter is enabled or disabled.
Kojto	122:f9eeca106725	512	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
Kojto	122:f9eeca106725	513	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	514	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	515	*/
Kojto	122:f9eeca106725	516	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	517	{
Kojto	122:f9eeca106725	518	return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
Kojto	122:f9eeca106725	519	}
Kojto	122:f9eeca106725	520
Kojto	122:f9eeca106725	521	/**
Kojto	122:f9eeca106725	522	* @brief Enable DMA transmission requests.
Kojto	122:f9eeca106725	523	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
Kojto	122:f9eeca106725	524	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	525	* @retval None
Kojto	122:f9eeca106725	526	*/
Kojto	122:f9eeca106725	527	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	528	{
Kojto	122:f9eeca106725	529	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
Kojto	122:f9eeca106725	530	}
Kojto	122:f9eeca106725	531
Kojto	122:f9eeca106725	532	/**
Kojto	122:f9eeca106725	533	* @brief Disable DMA transmission requests.
Kojto	122:f9eeca106725	534	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
Kojto	122:f9eeca106725	535	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	536	* @retval None
Kojto	122:f9eeca106725	537	*/
Kojto	122:f9eeca106725	538	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	539	{
Kojto	122:f9eeca106725	540	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
Kojto	122:f9eeca106725	541	}
Kojto	122:f9eeca106725	542
Kojto	122:f9eeca106725	543	/**
Kojto	122:f9eeca106725	544	* @brief Check if DMA transmission requests are enabled or disabled.
Kojto	122:f9eeca106725	545	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
Kojto	122:f9eeca106725	546	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	547	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	548	*/
Kojto	122:f9eeca106725	549	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	550	{
Kojto	122:f9eeca106725	551	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
Kojto	122:f9eeca106725	552	}
Kojto	122:f9eeca106725	553
Kojto	122:f9eeca106725	554	/**
Kojto	122:f9eeca106725	555	* @brief Enable DMA reception requests.
Kojto	122:f9eeca106725	556	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
Kojto	122:f9eeca106725	557	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	558	* @retval None
Kojto	122:f9eeca106725	559	*/
Kojto	122:f9eeca106725	560	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	561	{
Kojto	122:f9eeca106725	562	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
Kojto	122:f9eeca106725	563	}
Kojto	122:f9eeca106725	564
Kojto	122:f9eeca106725	565	/**
Kojto	122:f9eeca106725	566	* @brief Disable DMA reception requests.
Kojto	122:f9eeca106725	567	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
Kojto	122:f9eeca106725	568	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	569	* @retval None
Kojto	122:f9eeca106725	570	*/
Kojto	122:f9eeca106725	571	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	572	{
Kojto	122:f9eeca106725	573	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
Kojto	122:f9eeca106725	574	}
Kojto	122:f9eeca106725	575
Kojto	122:f9eeca106725	576	/**
Kojto	122:f9eeca106725	577	* @brief Check if DMA reception requests are enabled or disabled.
Kojto	122:f9eeca106725	578	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
Kojto	122:f9eeca106725	579	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	580	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	581	*/
Kojto	122:f9eeca106725	582	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	583	{
Kojto	122:f9eeca106725	584	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
Kojto	122:f9eeca106725	585	}
Kojto	122:f9eeca106725	586
Kojto	122:f9eeca106725	587	/**
Kojto	122:f9eeca106725	588	* @brief Get the data register address used for DMA transfer
Kojto	122:f9eeca106725	589	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
Kojto	122:f9eeca106725	590	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
Kojto	122:f9eeca106725	591	* @param I2Cx I2C Instance
Kojto	122:f9eeca106725	592	* @param Direction This parameter can be one of the following values:
Kojto	122:f9eeca106725	593	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
Kojto	122:f9eeca106725	594	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
Kojto	122:f9eeca106725	595	* @retval Address of data register
Kojto	122:f9eeca106725	596	*/
Kojto	122:f9eeca106725	597	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
Kojto	122:f9eeca106725	598	{
Kojto	122:f9eeca106725	599	register uint32_t data_reg_addr = 0U;
Kojto	122:f9eeca106725	600
Kojto	122:f9eeca106725	601	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
Kojto	122:f9eeca106725	602	{
Kojto	122:f9eeca106725	603	/* return address of TXDR register */
Kojto	122:f9eeca106725	604	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
Kojto	122:f9eeca106725	605	}
Kojto	122:f9eeca106725	606	else
Kojto	122:f9eeca106725	607	{
Kojto	122:f9eeca106725	608	/* return address of RXDR register */
Kojto	122:f9eeca106725	609	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
Kojto	122:f9eeca106725	610	}
Kojto	122:f9eeca106725	611
Kojto	122:f9eeca106725	612	return data_reg_addr;
Kojto	122:f9eeca106725	613	}
Kojto	122:f9eeca106725	614
Kojto	122:f9eeca106725	615	/**
Kojto	122:f9eeca106725	616	* @brief Enable Clock stretching.
Kojto	122:f9eeca106725	617	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	618	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
Kojto	122:f9eeca106725	619	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	620	* @retval None
Kojto	122:f9eeca106725	621	*/
Kojto	122:f9eeca106725	622	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	623	{
Kojto	122:f9eeca106725	624	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
Kojto	122:f9eeca106725	625	}
Kojto	122:f9eeca106725	626
Kojto	122:f9eeca106725	627	/**
Kojto	122:f9eeca106725	628	* @brief Disable Clock stretching.
Kojto	122:f9eeca106725	629	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	630	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
Kojto	122:f9eeca106725	631	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	632	* @retval None
Kojto	122:f9eeca106725	633	*/
Kojto	122:f9eeca106725	634	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	635	{
Kojto	122:f9eeca106725	636	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
Kojto	122:f9eeca106725	637	}
Kojto	122:f9eeca106725	638
Kojto	122:f9eeca106725	639	/**
Kojto	122:f9eeca106725	640	* @brief Check if Clock stretching is enabled or disabled.
Kojto	122:f9eeca106725	641	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
Kojto	122:f9eeca106725	642	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	643	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	644	*/
Kojto	122:f9eeca106725	645	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	646	{
Kojto	122:f9eeca106725	647	return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
Kojto	122:f9eeca106725	648	}
Kojto	122:f9eeca106725	649
Kojto	122:f9eeca106725	650	/**
Kojto	122:f9eeca106725	651	* @brief Enable hardware byte control in slave mode.
Kojto	122:f9eeca106725	652	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
Kojto	122:f9eeca106725	653	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	654	* @retval None
Kojto	122:f9eeca106725	655	*/
Kojto	122:f9eeca106725	656	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	657	{
Kojto	122:f9eeca106725	658	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
Kojto	122:f9eeca106725	659	}
Kojto	122:f9eeca106725	660
Kojto	122:f9eeca106725	661	/**
Kojto	122:f9eeca106725	662	* @brief Disable hardware byte control in slave mode.
Kojto	122:f9eeca106725	663	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
Kojto	122:f9eeca106725	664	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	665	* @retval None
Kojto	122:f9eeca106725	666	*/
Kojto	122:f9eeca106725	667	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	668	{
Kojto	122:f9eeca106725	669	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
Kojto	122:f9eeca106725	670	}
Kojto	122:f9eeca106725	671
Kojto	122:f9eeca106725	672	/**
Kojto	122:f9eeca106725	673	* @brief Check if hardware byte control in slave mode is enabled or disabled.
Kojto	122:f9eeca106725	674	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
Kojto	122:f9eeca106725	675	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	676	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	677	*/
Kojto	122:f9eeca106725	678	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	679	{
Kojto	122:f9eeca106725	680	return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
Kojto	122:f9eeca106725	681	}
Kojto	122:f9eeca106725	682
Kojto	122:f9eeca106725	683	/**
Kojto	122:f9eeca106725	684	* @brief Enable Wakeup from STOP.
Kojto	122:f9eeca106725	685	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	686	* WakeUpFromStop feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	687	* @note This bit can only be programmed when Digital Filter is disabled.
Kojto	122:f9eeca106725	688	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
Kojto	122:f9eeca106725	689	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	690	* @retval None
Kojto	122:f9eeca106725	691	*/
Kojto	122:f9eeca106725	692	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	693	{
Kojto	122:f9eeca106725	694	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
Kojto	122:f9eeca106725	695	}
Kojto	122:f9eeca106725	696
Kojto	122:f9eeca106725	697	/**
Kojto	122:f9eeca106725	698	* @brief Disable Wakeup from STOP.
Kojto	122:f9eeca106725	699	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	700	* WakeUpFromStop feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	701	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
Kojto	122:f9eeca106725	702	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	703	* @retval None
Kojto	122:f9eeca106725	704	*/
Kojto	122:f9eeca106725	705	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	706	{
Kojto	122:f9eeca106725	707	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
Kojto	122:f9eeca106725	708	}
Kojto	122:f9eeca106725	709
Kojto	122:f9eeca106725	710	/**
Kojto	122:f9eeca106725	711	* @brief Check if Wakeup from STOP is enabled or disabled.
Kojto	122:f9eeca106725	712	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	713	* WakeUpFromStop feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	714	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
Kojto	122:f9eeca106725	715	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	716	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	717	*/
Kojto	122:f9eeca106725	718	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	719	{
Kojto	122:f9eeca106725	720	return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
Kojto	122:f9eeca106725	721	}
Kojto	122:f9eeca106725	722
Kojto	122:f9eeca106725	723	/**
Kojto	122:f9eeca106725	724	* @brief Enable General Call.
Kojto	122:f9eeca106725	725	* @note When enabled the Address 0x00 is ACKed.
Kojto	122:f9eeca106725	726	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
Kojto	122:f9eeca106725	727	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	728	* @retval None
Kojto	122:f9eeca106725	729	*/
Kojto	122:f9eeca106725	730	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	731	{
Kojto	122:f9eeca106725	732	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
Kojto	122:f9eeca106725	733	}
Kojto	122:f9eeca106725	734
Kojto	122:f9eeca106725	735	/**
Kojto	122:f9eeca106725	736	* @brief Disable General Call.
Kojto	122:f9eeca106725	737	* @note When disabled the Address 0x00 is NACKed.
Kojto	122:f9eeca106725	738	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
Kojto	122:f9eeca106725	739	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	740	* @retval None
Kojto	122:f9eeca106725	741	*/
Kojto	122:f9eeca106725	742	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	743	{
Kojto	122:f9eeca106725	744	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
Kojto	122:f9eeca106725	745	}
Kojto	122:f9eeca106725	746
Kojto	122:f9eeca106725	747	/**
Kojto	122:f9eeca106725	748	* @brief Check if General Call is enabled or disabled.
Kojto	122:f9eeca106725	749	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
Kojto	122:f9eeca106725	750	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	751	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	752	*/
Kojto	122:f9eeca106725	753	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	754	{
Kojto	122:f9eeca106725	755	return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
Kojto	122:f9eeca106725	756	}
Kojto	122:f9eeca106725	757
Kojto	122:f9eeca106725	758	/**
Kojto	122:f9eeca106725	759	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
Kojto	122:f9eeca106725	760	* @note Changing this bit is not allowed, when the START bit is set.
Kojto	122:f9eeca106725	761	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
Kojto	122:f9eeca106725	762	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	763	* @param AddressingMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	764	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
Kojto	122:f9eeca106725	765	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
Kojto	122:f9eeca106725	766	* @retval None
Kojto	122:f9eeca106725	767	*/
Kojto	122:f9eeca106725	768	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
Kojto	122:f9eeca106725	769	{
Kojto	122:f9eeca106725	770	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
Kojto	122:f9eeca106725	771	}
Kojto	122:f9eeca106725	772
Kojto	122:f9eeca106725	773	/**
Kojto	122:f9eeca106725	774	* @brief Get the Master addressing mode.
Kojto	122:f9eeca106725	775	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
Kojto	122:f9eeca106725	776	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	777	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	778	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
Kojto	122:f9eeca106725	779	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
Kojto	122:f9eeca106725	780	*/
Kojto	122:f9eeca106725	781	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	782	{
Kojto	122:f9eeca106725	783	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
Kojto	122:f9eeca106725	784	}
Kojto	122:f9eeca106725	785
Kojto	122:f9eeca106725	786	/**
Kojto	122:f9eeca106725	787	* @brief Set the Own Address1.
Kojto	122:f9eeca106725	788	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
Kojto	122:f9eeca106725	789	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
Kojto	122:f9eeca106725	790	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	791	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
Kojto	122:f9eeca106725	792	* @param OwnAddrSize This parameter can be one of the following values:
Kojto	122:f9eeca106725	793	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
Kojto	122:f9eeca106725	794	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
Kojto	122:f9eeca106725	795	* @retval None
Kojto	122:f9eeca106725	796	*/
Kojto	122:f9eeca106725	797	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
Kojto	122:f9eeca106725	798	{
Kojto	122:f9eeca106725	799	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
Kojto	122:f9eeca106725	800	}
Kojto	122:f9eeca106725	801
Kojto	122:f9eeca106725	802	/**
Kojto	122:f9eeca106725	803	* @brief Enable acknowledge on Own Address1 match address.
Kojto	122:f9eeca106725	804	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
Kojto	122:f9eeca106725	805	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	806	* @retval None
Kojto	122:f9eeca106725	807	*/
Kojto	122:f9eeca106725	808	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	809	{
Kojto	122:f9eeca106725	810	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
Kojto	122:f9eeca106725	811	}
Kojto	122:f9eeca106725	812
Kojto	122:f9eeca106725	813	/**
Kojto	122:f9eeca106725	814	* @brief Disable acknowledge on Own Address1 match address.
Kojto	122:f9eeca106725	815	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
Kojto	122:f9eeca106725	816	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	817	* @retval None
Kojto	122:f9eeca106725	818	*/
Kojto	122:f9eeca106725	819	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	820	{
Kojto	122:f9eeca106725	821	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
Kojto	122:f9eeca106725	822	}
Kojto	122:f9eeca106725	823
Kojto	122:f9eeca106725	824	/**
Kojto	122:f9eeca106725	825	* @brief Check if Own Address1 acknowledge is enabled or disabled.
Kojto	122:f9eeca106725	826	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
Kojto	122:f9eeca106725	827	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	828	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	829	*/
Kojto	122:f9eeca106725	830	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	831	{
Kojto	122:f9eeca106725	832	return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
Kojto	122:f9eeca106725	833	}
Kojto	122:f9eeca106725	834
Kojto	122:f9eeca106725	835	/**
Kojto	122:f9eeca106725	836	* @brief Set the 7bits Own Address2.
Kojto	122:f9eeca106725	837	* @note This action has no effect if own address2 is enabled.
Kojto	122:f9eeca106725	838	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
Kojto	122:f9eeca106725	839	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
Kojto	122:f9eeca106725	840	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	841	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
Kojto	122:f9eeca106725	842	* @param OwnAddrMask This parameter can be one of the following values:
Kojto	122:f9eeca106725	843	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
Kojto	122:f9eeca106725	844	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
Kojto	122:f9eeca106725	845	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
Kojto	122:f9eeca106725	846	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
Kojto	122:f9eeca106725	847	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
Kojto	122:f9eeca106725	848	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
Kojto	122:f9eeca106725	849	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
Kojto	122:f9eeca106725	850	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
Kojto	122:f9eeca106725	851	* @retval None
Kojto	122:f9eeca106725	852	*/
Kojto	122:f9eeca106725	853	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
Kojto	122:f9eeca106725	854	{
Kojto	122:f9eeca106725	855	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
Kojto	122:f9eeca106725	856	}
Kojto	122:f9eeca106725	857
Kojto	122:f9eeca106725	858	/**
Kojto	122:f9eeca106725	859	* @brief Enable acknowledge on Own Address2 match address.
Kojto	122:f9eeca106725	860	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
Kojto	122:f9eeca106725	861	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	862	* @retval None
Kojto	122:f9eeca106725	863	*/
Kojto	122:f9eeca106725	864	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	865	{
Kojto	122:f9eeca106725	866	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
Kojto	122:f9eeca106725	867	}
Kojto	122:f9eeca106725	868
Kojto	122:f9eeca106725	869	/**
Kojto	122:f9eeca106725	870	* @brief Disable acknowledge on Own Address2 match address.
Kojto	122:f9eeca106725	871	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
Kojto	122:f9eeca106725	872	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	873	* @retval None
Kojto	122:f9eeca106725	874	*/
Kojto	122:f9eeca106725	875	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	876	{
Kojto	122:f9eeca106725	877	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
Kojto	122:f9eeca106725	878	}
Kojto	122:f9eeca106725	879
Kojto	122:f9eeca106725	880	/**
Kojto	122:f9eeca106725	881	* @brief Check if Own Address1 acknowledge is enabled or disabled.
Kojto	122:f9eeca106725	882	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
Kojto	122:f9eeca106725	883	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	884	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	885	*/
Kojto	122:f9eeca106725	886	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	887	{
Kojto	122:f9eeca106725	888	return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
Kojto	122:f9eeca106725	889	}
Kojto	122:f9eeca106725	890
Kojto	122:f9eeca106725	891	/**
Kojto	122:f9eeca106725	892	* @brief Configure the SDA setup, hold time and the SCL high, low period.
Kojto	122:f9eeca106725	893	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
Kojto	122:f9eeca106725	894	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
Kojto	122:f9eeca106725	895	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	896	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
Kojto	122:f9eeca106725	897	* @note This parameter is computed with the STM32CubeMX Tool.
Kojto	122:f9eeca106725	898	* @retval None
Kojto	122:f9eeca106725	899	*/
Kojto	122:f9eeca106725	900	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
Kojto	122:f9eeca106725	901	{
Kojto	122:f9eeca106725	902	WRITE_REG(I2Cx->TIMINGR, Timing);
Kojto	122:f9eeca106725	903	}
Kojto	122:f9eeca106725	904
Kojto	122:f9eeca106725	905	/**
Kojto	122:f9eeca106725	906	* @brief Get the Timing Prescaler setting.
Kojto	122:f9eeca106725	907	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
Kojto	122:f9eeca106725	908	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	909	* @retval Value between Min_Data=0x0 and Max_Data=0xF
Kojto	122:f9eeca106725	910	*/
Kojto	122:f9eeca106725	911	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	912	{
AnnaBridge	145:64910690c574	913	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
Kojto	122:f9eeca106725	914	}
Kojto	122:f9eeca106725	915
Kojto	122:f9eeca106725	916	/**
Kojto	122:f9eeca106725	917	* @brief Get the SCL low period setting.
Kojto	122:f9eeca106725	918	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
Kojto	122:f9eeca106725	919	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	920	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
Kojto	122:f9eeca106725	921	*/
Kojto	122:f9eeca106725	922	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	923	{
AnnaBridge	145:64910690c574	924	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
Kojto	122:f9eeca106725	925	}
Kojto	122:f9eeca106725	926
Kojto	122:f9eeca106725	927	/**
Kojto	122:f9eeca106725	928	* @brief Get the SCL high period setting.
Kojto	122:f9eeca106725	929	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
Kojto	122:f9eeca106725	930	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	931	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
Kojto	122:f9eeca106725	932	*/
Kojto	122:f9eeca106725	933	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	934	{
AnnaBridge	145:64910690c574	935	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
Kojto	122:f9eeca106725	936	}
Kojto	122:f9eeca106725	937
Kojto	122:f9eeca106725	938	/**
Kojto	122:f9eeca106725	939	* @brief Get the SDA hold time.
Kojto	122:f9eeca106725	940	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
Kojto	122:f9eeca106725	941	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	942	* @retval Value between Min_Data=0x0 and Max_Data=0xF
Kojto	122:f9eeca106725	943	*/
Kojto	122:f9eeca106725	944	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	945	{
AnnaBridge	145:64910690c574	946	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
Kojto	122:f9eeca106725	947	}
Kojto	122:f9eeca106725	948
Kojto	122:f9eeca106725	949	/**
Kojto	122:f9eeca106725	950	* @brief Get the SDA setup time.
Kojto	122:f9eeca106725	951	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
Kojto	122:f9eeca106725	952	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	953	* @retval Value between Min_Data=0x0 and Max_Data=0xF
Kojto	122:f9eeca106725	954	*/
Kojto	122:f9eeca106725	955	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	956	{
AnnaBridge	145:64910690c574	957	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
Kojto	122:f9eeca106725	958	}
Kojto	122:f9eeca106725	959
Kojto	122:f9eeca106725	960	/**
Kojto	122:f9eeca106725	961	* @brief Configure peripheral mode.
Kojto	122:f9eeca106725	962	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	963	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	964	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
Kojto	122:f9eeca106725	965	* CR1 SMBDEN LL_I2C_SetMode
Kojto	122:f9eeca106725	966	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	967	* @param PeripheralMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	968	* @arg @ref LL_I2C_MODE_I2C
Kojto	122:f9eeca106725	969	* @arg @ref LL_I2C_MODE_SMBUS_HOST
Kojto	122:f9eeca106725	970	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
Kojto	122:f9eeca106725	971	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
Kojto	122:f9eeca106725	972	* @retval None
Kojto	122:f9eeca106725	973	*/
Kojto	122:f9eeca106725	974	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
Kojto	122:f9eeca106725	975	{
Kojto	122:f9eeca106725	976	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
Kojto	122:f9eeca106725	977	}
Kojto	122:f9eeca106725	978
Kojto	122:f9eeca106725	979	/**
Kojto	122:f9eeca106725	980	* @brief Get peripheral mode.
Kojto	122:f9eeca106725	981	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	982	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	983	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
Kojto	122:f9eeca106725	984	* CR1 SMBDEN LL_I2C_GetMode
Kojto	122:f9eeca106725	985	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	986	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	987	* @arg @ref LL_I2C_MODE_I2C
Kojto	122:f9eeca106725	988	* @arg @ref LL_I2C_MODE_SMBUS_HOST
Kojto	122:f9eeca106725	989	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
Kojto	122:f9eeca106725	990	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
Kojto	122:f9eeca106725	991	*/
Kojto	122:f9eeca106725	992	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	993	{
Kojto	122:f9eeca106725	994	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
Kojto	122:f9eeca106725	995	}
Kojto	122:f9eeca106725	996
Kojto	122:f9eeca106725	997	/**
Kojto	122:f9eeca106725	998	* @brief Enable SMBus alert (Host or Device mode)
Kojto	122:f9eeca106725	999	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1000	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1001	* @note SMBus Device mode:
Kojto	122:f9eeca106725	1002	* - SMBus Alert pin is drived low and
Kojto	122:f9eeca106725	1003	* Alert Response Address Header acknowledge is enabled.
Kojto	122:f9eeca106725	1004	* SMBus Host mode:
Kojto	122:f9eeca106725	1005	* - SMBus Alert pin management is supported.
Kojto	122:f9eeca106725	1006	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
Kojto	122:f9eeca106725	1007	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1008	* @retval None
Kojto	122:f9eeca106725	1009	*/
Kojto	122:f9eeca106725	1010	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1011	{
Kojto	122:f9eeca106725	1012	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
Kojto	122:f9eeca106725	1013	}
Kojto	122:f9eeca106725	1014
Kojto	122:f9eeca106725	1015	/**
Kojto	122:f9eeca106725	1016	* @brief Disable SMBus alert (Host or Device mode)
Kojto	122:f9eeca106725	1017	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1018	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1019	* @note SMBus Device mode:
Kojto	122:f9eeca106725	1020	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
Kojto	122:f9eeca106725	1021	* Alert Response Address Header acknowledge is disabled.
Kojto	122:f9eeca106725	1022	* SMBus Host mode:
Kojto	122:f9eeca106725	1023	* - SMBus Alert pin management is not supported.
Kojto	122:f9eeca106725	1024	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
Kojto	122:f9eeca106725	1025	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1026	* @retval None
Kojto	122:f9eeca106725	1027	*/
Kojto	122:f9eeca106725	1028	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1029	{
Kojto	122:f9eeca106725	1030	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
Kojto	122:f9eeca106725	1031	}
Kojto	122:f9eeca106725	1032
Kojto	122:f9eeca106725	1033	/**
Kojto	122:f9eeca106725	1034	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
Kojto	122:f9eeca106725	1035	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1036	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1037	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
Kojto	122:f9eeca106725	1038	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1039	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1040	*/
Kojto	122:f9eeca106725	1041	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1042	{
Kojto	122:f9eeca106725	1043	return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
Kojto	122:f9eeca106725	1044	}
Kojto	122:f9eeca106725	1045
Kojto	122:f9eeca106725	1046	/**
Kojto	122:f9eeca106725	1047	* @brief Enable SMBus Packet Error Calculation (PEC).
Kojto	122:f9eeca106725	1048	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1049	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1050	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
Kojto	122:f9eeca106725	1051	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1052	* @retval None
Kojto	122:f9eeca106725	1053	*/
Kojto	122:f9eeca106725	1054	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1055	{
Kojto	122:f9eeca106725	1056	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
Kojto	122:f9eeca106725	1057	}
Kojto	122:f9eeca106725	1058
Kojto	122:f9eeca106725	1059	/**
Kojto	122:f9eeca106725	1060	* @brief Disable SMBus Packet Error Calculation (PEC).
Kojto	122:f9eeca106725	1061	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1062	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1063	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
Kojto	122:f9eeca106725	1064	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1065	* @retval None
Kojto	122:f9eeca106725	1066	*/
Kojto	122:f9eeca106725	1067	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1068	{
Kojto	122:f9eeca106725	1069	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
Kojto	122:f9eeca106725	1070	}
Kojto	122:f9eeca106725	1071
Kojto	122:f9eeca106725	1072	/**
Kojto	122:f9eeca106725	1073	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
Kojto	122:f9eeca106725	1074	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1075	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1076	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
Kojto	122:f9eeca106725	1077	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1078	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1079	*/
Kojto	122:f9eeca106725	1080	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1081	{
Kojto	122:f9eeca106725	1082	return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
Kojto	122:f9eeca106725	1083	}
Kojto	122:f9eeca106725	1084
Kojto	122:f9eeca106725	1085	/**
Kojto	122:f9eeca106725	1086	* @brief Configure the SMBus Clock Timeout.
Kojto	122:f9eeca106725	1087	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1088	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1089	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
Kojto	122:f9eeca106725	1090	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
Kojto	122:f9eeca106725	1091	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
Kojto	122:f9eeca106725	1092	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
Kojto	122:f9eeca106725	1093	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1094	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
Kojto	122:f9eeca106725	1095	* @param TimeoutAMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1096	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
Kojto	122:f9eeca106725	1097	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
Kojto	122:f9eeca106725	1098	* @param TimeoutB
Kojto	122:f9eeca106725	1099	* @retval None
Kojto	122:f9eeca106725	1100	*/
Kojto	122:f9eeca106725	1101	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
Kojto	122:f9eeca106725	1102	uint32_t TimeoutB)
Kojto	122:f9eeca106725	1103	{
Kojto	122:f9eeca106725	1104	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	145:64910690c574	1105	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
Kojto	122:f9eeca106725	1106	}
Kojto	122:f9eeca106725	1107
Kojto	122:f9eeca106725	1108	/**
Kojto	122:f9eeca106725	1109	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
Kojto	122:f9eeca106725	1110	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1111	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1112	* @note These bits can only be programmed when TimeoutA is disabled.
Kojto	122:f9eeca106725	1113	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
Kojto	122:f9eeca106725	1114	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1115	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
Kojto	122:f9eeca106725	1116	* @retval None
Kojto	122:f9eeca106725	1117	*/
Kojto	122:f9eeca106725	1118	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
Kojto	122:f9eeca106725	1119	{
Kojto	122:f9eeca106725	1120	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
Kojto	122:f9eeca106725	1121	}
Kojto	122:f9eeca106725	1122
Kojto	122:f9eeca106725	1123	/**
Kojto	122:f9eeca106725	1124	* @brief Get the SMBus Clock TimeoutA setting.
Kojto	122:f9eeca106725	1125	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1126	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1127	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
Kojto	122:f9eeca106725	1128	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1129	* @retval Value between Min_Data=0 and Max_Data=0xFFF
Kojto	122:f9eeca106725	1130	*/
Kojto	122:f9eeca106725	1131	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1132	{
Kojto	122:f9eeca106725	1133	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
Kojto	122:f9eeca106725	1134	}
Kojto	122:f9eeca106725	1135
Kojto	122:f9eeca106725	1136	/**
Kojto	122:f9eeca106725	1137	* @brief Set the SMBus Clock TimeoutA mode.
Kojto	122:f9eeca106725	1138	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1139	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1140	* @note This bit can only be programmed when TimeoutA is disabled.
Kojto	122:f9eeca106725	1141	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
Kojto	122:f9eeca106725	1142	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1143	* @param TimeoutAMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1144	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
Kojto	122:f9eeca106725	1145	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
Kojto	122:f9eeca106725	1146	* @retval None
Kojto	122:f9eeca106725	1147	*/
Kojto	122:f9eeca106725	1148	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
Kojto	122:f9eeca106725	1149	{
Kojto	122:f9eeca106725	1150	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
Kojto	122:f9eeca106725	1151	}
Kojto	122:f9eeca106725	1152
Kojto	122:f9eeca106725	1153	/**
Kojto	122:f9eeca106725	1154	* @brief Get the SMBus Clock TimeoutA mode.
Kojto	122:f9eeca106725	1155	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1156	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1157	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
Kojto	122:f9eeca106725	1158	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1159	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1160	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
Kojto	122:f9eeca106725	1161	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
Kojto	122:f9eeca106725	1162	*/
Kojto	122:f9eeca106725	1163	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1164	{
Kojto	122:f9eeca106725	1165	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
Kojto	122:f9eeca106725	1166	}
Kojto	122:f9eeca106725	1167
Kojto	122:f9eeca106725	1168	/**
Kojto	122:f9eeca106725	1169	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
Kojto	122:f9eeca106725	1170	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1171	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1172	* @note These bits can only be programmed when TimeoutB is disabled.
Kojto	122:f9eeca106725	1173	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
Kojto	122:f9eeca106725	1174	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1175	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
Kojto	122:f9eeca106725	1176	* @retval None
Kojto	122:f9eeca106725	1177	*/
Kojto	122:f9eeca106725	1178	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
Kojto	122:f9eeca106725	1179	{
AnnaBridge	145:64910690c574	1180	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
Kojto	122:f9eeca106725	1181	}
Kojto	122:f9eeca106725	1182
Kojto	122:f9eeca106725	1183	/**
Kojto	122:f9eeca106725	1184	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
Kojto	122:f9eeca106725	1185	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1186	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1187	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
Kojto	122:f9eeca106725	1188	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1189	* @retval Value between Min_Data=0 and Max_Data=0xFFF
Kojto	122:f9eeca106725	1190	*/
Kojto	122:f9eeca106725	1191	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1192	{
AnnaBridge	145:64910690c574	1193	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
Kojto	122:f9eeca106725	1194	}
Kojto	122:f9eeca106725	1195
Kojto	122:f9eeca106725	1196	/**
Kojto	122:f9eeca106725	1197	* @brief Enable the SMBus Clock Timeout.
Kojto	122:f9eeca106725	1198	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1199	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1200	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
Kojto	122:f9eeca106725	1201	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
Kojto	122:f9eeca106725	1202	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1203	* @param ClockTimeout This parameter can be one of the following values:
Kojto	122:f9eeca106725	1204	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
Kojto	122:f9eeca106725	1205	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
Kojto	122:f9eeca106725	1206	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
Kojto	122:f9eeca106725	1207	* @retval None
Kojto	122:f9eeca106725	1208	*/
Kojto	122:f9eeca106725	1209	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
Kojto	122:f9eeca106725	1210	{
Kojto	122:f9eeca106725	1211	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
Kojto	122:f9eeca106725	1212	}
Kojto	122:f9eeca106725	1213
Kojto	122:f9eeca106725	1214	/**
Kojto	122:f9eeca106725	1215	* @brief Disable the SMBus Clock Timeout.
Kojto	122:f9eeca106725	1216	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1217	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1218	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
Kojto	122:f9eeca106725	1219	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
Kojto	122:f9eeca106725	1220	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1221	* @param ClockTimeout This parameter can be one of the following values:
Kojto	122:f9eeca106725	1222	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
Kojto	122:f9eeca106725	1223	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
Kojto	122:f9eeca106725	1224	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
Kojto	122:f9eeca106725	1225	* @retval None
Kojto	122:f9eeca106725	1226	*/
Kojto	122:f9eeca106725	1227	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
Kojto	122:f9eeca106725	1228	{
Kojto	122:f9eeca106725	1229	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
Kojto	122:f9eeca106725	1230	}
Kojto	122:f9eeca106725	1231
Kojto	122:f9eeca106725	1232	/**
Kojto	122:f9eeca106725	1233	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
Kojto	122:f9eeca106725	1234	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1235	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1236	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
Kojto	122:f9eeca106725	1237	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
Kojto	122:f9eeca106725	1238	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1239	* @param ClockTimeout This parameter can be one of the following values:
Kojto	122:f9eeca106725	1240	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
Kojto	122:f9eeca106725	1241	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
Kojto	122:f9eeca106725	1242	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
Kojto	122:f9eeca106725	1243	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1244	*/
Kojto	122:f9eeca106725	1245	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
Kojto	122:f9eeca106725	1246	{
Kojto	122:f9eeca106725	1247	return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
Kojto	122:f9eeca106725	1248	}
Kojto	122:f9eeca106725	1249
Kojto	122:f9eeca106725	1250	/**
Kojto	122:f9eeca106725	1251	* @}
Kojto	122:f9eeca106725	1252	*/
Kojto	122:f9eeca106725	1253
Kojto	122:f9eeca106725	1254	/** @defgroup I2C_LL_EF_IT_Management IT_Management
Kojto	122:f9eeca106725	1255	* @{
Kojto	122:f9eeca106725	1256	*/
Kojto	122:f9eeca106725	1257
Kojto	122:f9eeca106725	1258	/**
Kojto	122:f9eeca106725	1259	* @brief Enable TXIS interrupt.
Kojto	122:f9eeca106725	1260	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
Kojto	122:f9eeca106725	1261	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1262	* @retval None
Kojto	122:f9eeca106725	1263	*/
Kojto	122:f9eeca106725	1264	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1265	{
Kojto	122:f9eeca106725	1266	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
Kojto	122:f9eeca106725	1267	}
Kojto	122:f9eeca106725	1268
Kojto	122:f9eeca106725	1269	/**
Kojto	122:f9eeca106725	1270	* @brief Disable TXIS interrupt.
Kojto	122:f9eeca106725	1271	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
Kojto	122:f9eeca106725	1272	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1273	* @retval None
Kojto	122:f9eeca106725	1274	*/
Kojto	122:f9eeca106725	1275	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1276	{
Kojto	122:f9eeca106725	1277	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
Kojto	122:f9eeca106725	1278	}
Kojto	122:f9eeca106725	1279
Kojto	122:f9eeca106725	1280	/**
Kojto	122:f9eeca106725	1281	* @brief Check if the TXIS Interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1282	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
Kojto	122:f9eeca106725	1283	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1284	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1285	*/
Kojto	122:f9eeca106725	1286	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1287	{
Kojto	122:f9eeca106725	1288	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
Kojto	122:f9eeca106725	1289	}
Kojto	122:f9eeca106725	1290
Kojto	122:f9eeca106725	1291	/**
Kojto	122:f9eeca106725	1292	* @brief Enable RXNE interrupt.
Kojto	122:f9eeca106725	1293	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
Kojto	122:f9eeca106725	1294	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1295	* @retval None
Kojto	122:f9eeca106725	1296	*/
Kojto	122:f9eeca106725	1297	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1298	{
Kojto	122:f9eeca106725	1299	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
Kojto	122:f9eeca106725	1300	}
Kojto	122:f9eeca106725	1301
Kojto	122:f9eeca106725	1302	/**
Kojto	122:f9eeca106725	1303	* @brief Disable RXNE interrupt.
Kojto	122:f9eeca106725	1304	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
Kojto	122:f9eeca106725	1305	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1306	* @retval None
Kojto	122:f9eeca106725	1307	*/
Kojto	122:f9eeca106725	1308	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1309	{
Kojto	122:f9eeca106725	1310	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
Kojto	122:f9eeca106725	1311	}
Kojto	122:f9eeca106725	1312
Kojto	122:f9eeca106725	1313	/**
Kojto	122:f9eeca106725	1314	* @brief Check if the RXNE Interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1315	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
Kojto	122:f9eeca106725	1316	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1317	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1318	*/
Kojto	122:f9eeca106725	1319	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1320	{
Kojto	122:f9eeca106725	1321	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
Kojto	122:f9eeca106725	1322	}
Kojto	122:f9eeca106725	1323
Kojto	122:f9eeca106725	1324	/**
Kojto	122:f9eeca106725	1325	* @brief Enable Address match interrupt (slave mode only).
Kojto	122:f9eeca106725	1326	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
Kojto	122:f9eeca106725	1327	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1328	* @retval None
Kojto	122:f9eeca106725	1329	*/
Kojto	122:f9eeca106725	1330	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1331	{
Kojto	122:f9eeca106725	1332	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
Kojto	122:f9eeca106725	1333	}
Kojto	122:f9eeca106725	1334
Kojto	122:f9eeca106725	1335	/**
Kojto	122:f9eeca106725	1336	* @brief Disable Address match interrupt (slave mode only).
Kojto	122:f9eeca106725	1337	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
Kojto	122:f9eeca106725	1338	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1339	* @retval None
Kojto	122:f9eeca106725	1340	*/
Kojto	122:f9eeca106725	1341	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1342	{
Kojto	122:f9eeca106725	1343	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
Kojto	122:f9eeca106725	1344	}
Kojto	122:f9eeca106725	1345
Kojto	122:f9eeca106725	1346	/**
Kojto	122:f9eeca106725	1347	* @brief Check if Address match interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1348	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
Kojto	122:f9eeca106725	1349	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1350	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1351	*/
Kojto	122:f9eeca106725	1352	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1353	{
Kojto	122:f9eeca106725	1354	return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
Kojto	122:f9eeca106725	1355	}
Kojto	122:f9eeca106725	1356
Kojto	122:f9eeca106725	1357	/**
Kojto	122:f9eeca106725	1358	* @brief Enable Not acknowledge received interrupt.
Kojto	122:f9eeca106725	1359	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
Kojto	122:f9eeca106725	1360	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1361	* @retval None
Kojto	122:f9eeca106725	1362	*/
Kojto	122:f9eeca106725	1363	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1364	{
Kojto	122:f9eeca106725	1365	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
Kojto	122:f9eeca106725	1366	}
Kojto	122:f9eeca106725	1367
Kojto	122:f9eeca106725	1368	/**
Kojto	122:f9eeca106725	1369	* @brief Disable Not acknowledge received interrupt.
Kojto	122:f9eeca106725	1370	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
Kojto	122:f9eeca106725	1371	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1372	* @retval None
Kojto	122:f9eeca106725	1373	*/
Kojto	122:f9eeca106725	1374	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1375	{
Kojto	122:f9eeca106725	1376	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
Kojto	122:f9eeca106725	1377	}
Kojto	122:f9eeca106725	1378
Kojto	122:f9eeca106725	1379	/**
Kojto	122:f9eeca106725	1380	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1381	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
Kojto	122:f9eeca106725	1382	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1383	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1384	*/
Kojto	122:f9eeca106725	1385	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1386	{
Kojto	122:f9eeca106725	1387	return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
Kojto	122:f9eeca106725	1388	}
Kojto	122:f9eeca106725	1389
Kojto	122:f9eeca106725	1390	/**
Kojto	122:f9eeca106725	1391	* @brief Enable STOP detection interrupt.
Kojto	122:f9eeca106725	1392	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
Kojto	122:f9eeca106725	1393	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1394	* @retval None
Kojto	122:f9eeca106725	1395	*/
Kojto	122:f9eeca106725	1396	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1397	{
Kojto	122:f9eeca106725	1398	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
Kojto	122:f9eeca106725	1399	}
Kojto	122:f9eeca106725	1400
Kojto	122:f9eeca106725	1401	/**
Kojto	122:f9eeca106725	1402	* @brief Disable STOP detection interrupt.
Kojto	122:f9eeca106725	1403	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
Kojto	122:f9eeca106725	1404	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1405	* @retval None
Kojto	122:f9eeca106725	1406	*/
Kojto	122:f9eeca106725	1407	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1408	{
Kojto	122:f9eeca106725	1409	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
Kojto	122:f9eeca106725	1410	}
Kojto	122:f9eeca106725	1411
Kojto	122:f9eeca106725	1412	/**
Kojto	122:f9eeca106725	1413	* @brief Check if STOP detection interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1414	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
Kojto	122:f9eeca106725	1415	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1416	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1417	*/
Kojto	122:f9eeca106725	1418	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1419	{
Kojto	122:f9eeca106725	1420	return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
Kojto	122:f9eeca106725	1421	}
Kojto	122:f9eeca106725	1422
Kojto	122:f9eeca106725	1423	/**
Kojto	122:f9eeca106725	1424	* @brief Enable Transfer Complete interrupt.
Kojto	122:f9eeca106725	1425	* @note Any of these events will generate interrupt :
Kojto	122:f9eeca106725	1426	* Transfer Complete (TC)
Kojto	122:f9eeca106725	1427	* Transfer Complete Reload (TCR)
Kojto	122:f9eeca106725	1428	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
Kojto	122:f9eeca106725	1429	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1430	* @retval None
Kojto	122:f9eeca106725	1431	*/
Kojto	122:f9eeca106725	1432	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1433	{
Kojto	122:f9eeca106725	1434	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
Kojto	122:f9eeca106725	1435	}
Kojto	122:f9eeca106725	1436
Kojto	122:f9eeca106725	1437	/**
Kojto	122:f9eeca106725	1438	* @brief Disable Transfer Complete interrupt.
Kojto	122:f9eeca106725	1439	* @note Any of these events will generate interrupt :
Kojto	122:f9eeca106725	1440	* Transfer Complete (TC)
Kojto	122:f9eeca106725	1441	* Transfer Complete Reload (TCR)
Kojto	122:f9eeca106725	1442	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
Kojto	122:f9eeca106725	1443	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1444	* @retval None
Kojto	122:f9eeca106725	1445	*/
Kojto	122:f9eeca106725	1446	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1447	{
Kojto	122:f9eeca106725	1448	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
Kojto	122:f9eeca106725	1449	}
Kojto	122:f9eeca106725	1450
Kojto	122:f9eeca106725	1451	/**
Kojto	122:f9eeca106725	1452	* @brief Check if Transfer Complete interrupt is enabled or disabled.
Kojto	122:f9eeca106725	1453	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
Kojto	122:f9eeca106725	1454	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1455	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1456	*/
Kojto	122:f9eeca106725	1457	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1458	{
Kojto	122:f9eeca106725	1459	return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
Kojto	122:f9eeca106725	1460	}
Kojto	122:f9eeca106725	1461
Kojto	122:f9eeca106725	1462	/**
Kojto	122:f9eeca106725	1463	* @brief Enable Error interrupts.
AnnaBridge	145:64910690c574	1464	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1465	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1466	* @note Any of these errors will generate interrupt :
Kojto	122:f9eeca106725	1467	* Arbitration Loss (ARLO)
Kojto	122:f9eeca106725	1468	* Bus Error detection (BERR)
Kojto	122:f9eeca106725	1469	* Overrun/Underrun (OVR)
Kojto	122:f9eeca106725	1470	* SMBus Timeout detection (TIMEOUT)
Kojto	122:f9eeca106725	1471	* SMBus PEC error detection (PECERR)
Kojto	122:f9eeca106725	1472	* SMBus Alert pin event detection (ALERT)
Kojto	122:f9eeca106725	1473	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
Kojto	122:f9eeca106725	1474	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1475	* @retval None
Kojto	122:f9eeca106725	1476	*/
Kojto	122:f9eeca106725	1477	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1478	{
Kojto	122:f9eeca106725	1479	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
Kojto	122:f9eeca106725	1480	}
Kojto	122:f9eeca106725	1481
Kojto	122:f9eeca106725	1482	/**
Kojto	122:f9eeca106725	1483	* @brief Disable Error interrupts.
AnnaBridge	145:64910690c574	1484	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1485	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1486	* @note Any of these errors will generate interrupt :
Kojto	122:f9eeca106725	1487	* Arbitration Loss (ARLO)
Kojto	122:f9eeca106725	1488	* Bus Error detection (BERR)
Kojto	122:f9eeca106725	1489	* Overrun/Underrun (OVR)
Kojto	122:f9eeca106725	1490	* SMBus Timeout detection (TIMEOUT)
Kojto	122:f9eeca106725	1491	* SMBus PEC error detection (PECERR)
Kojto	122:f9eeca106725	1492	* SMBus Alert pin event detection (ALERT)
Kojto	122:f9eeca106725	1493	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
Kojto	122:f9eeca106725	1494	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1495	* @retval None
Kojto	122:f9eeca106725	1496	*/
Kojto	122:f9eeca106725	1497	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1498	{
Kojto	122:f9eeca106725	1499	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
Kojto	122:f9eeca106725	1500	}
Kojto	122:f9eeca106725	1501
Kojto	122:f9eeca106725	1502	/**
AnnaBridge	145:64910690c574	1503	* @brief Check if Error interrupts are enabled or disabled.
Kojto	122:f9eeca106725	1504	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
Kojto	122:f9eeca106725	1505	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1506	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1507	*/
Kojto	122:f9eeca106725	1508	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1509	{
Kojto	122:f9eeca106725	1510	return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
Kojto	122:f9eeca106725	1511	}
Kojto	122:f9eeca106725	1512
Kojto	122:f9eeca106725	1513	/**
Kojto	122:f9eeca106725	1514	* @}
Kojto	122:f9eeca106725	1515	*/
Kojto	122:f9eeca106725	1516
Kojto	122:f9eeca106725	1517	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
Kojto	122:f9eeca106725	1518	* @{
Kojto	122:f9eeca106725	1519	*/
Kojto	122:f9eeca106725	1520
Kojto	122:f9eeca106725	1521	/**
Kojto	122:f9eeca106725	1522	* @brief Indicate the status of Transmit data register empty flag.
Kojto	122:f9eeca106725	1523	* @note RESET: When next data is written in Transmit data register.
Kojto	122:f9eeca106725	1524	* SET: When Transmit data register is empty.
Kojto	122:f9eeca106725	1525	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
Kojto	122:f9eeca106725	1526	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1527	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1528	*/
Kojto	122:f9eeca106725	1529	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1530	{
Kojto	122:f9eeca106725	1531	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
Kojto	122:f9eeca106725	1532	}
Kojto	122:f9eeca106725	1533
Kojto	122:f9eeca106725	1534	/**
Kojto	122:f9eeca106725	1535	* @brief Indicate the status of Transmit interrupt flag.
Kojto	122:f9eeca106725	1536	* @note RESET: When next data is written in Transmit data register.
Kojto	122:f9eeca106725	1537	* SET: When Transmit data register is empty.
Kojto	122:f9eeca106725	1538	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
Kojto	122:f9eeca106725	1539	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1540	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1541	*/
Kojto	122:f9eeca106725	1542	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1543	{
Kojto	122:f9eeca106725	1544	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
Kojto	122:f9eeca106725	1545	}
Kojto	122:f9eeca106725	1546
Kojto	122:f9eeca106725	1547	/**
Kojto	122:f9eeca106725	1548	* @brief Indicate the status of Receive data register not empty flag.
Kojto	122:f9eeca106725	1549	* @note RESET: When Receive data register is read.
Kojto	122:f9eeca106725	1550	* SET: When the received data is copied in Receive data register.
Kojto	122:f9eeca106725	1551	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
Kojto	122:f9eeca106725	1552	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1553	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1554	*/
Kojto	122:f9eeca106725	1555	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1556	{
Kojto	122:f9eeca106725	1557	return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
Kojto	122:f9eeca106725	1558	}
Kojto	122:f9eeca106725	1559
Kojto	122:f9eeca106725	1560	/**
Kojto	122:f9eeca106725	1561	* @brief Indicate the status of Address matched flag (slave mode).
Kojto	122:f9eeca106725	1562	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1563	* SET: When the received slave address matched with one of the enabled slave address.
Kojto	122:f9eeca106725	1564	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
Kojto	122:f9eeca106725	1565	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1566	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1567	*/
Kojto	122:f9eeca106725	1568	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1569	{
Kojto	122:f9eeca106725	1570	return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
Kojto	122:f9eeca106725	1571	}
Kojto	122:f9eeca106725	1572
Kojto	122:f9eeca106725	1573	/**
Kojto	122:f9eeca106725	1574	* @brief Indicate the status of Not Acknowledge received flag.
Kojto	122:f9eeca106725	1575	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1576	* SET: When a NACK is received after a byte transmission.
Kojto	122:f9eeca106725	1577	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
Kojto	122:f9eeca106725	1578	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1579	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1580	*/
Kojto	122:f9eeca106725	1581	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1582	{
Kojto	122:f9eeca106725	1583	return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
Kojto	122:f9eeca106725	1584	}
Kojto	122:f9eeca106725	1585
Kojto	122:f9eeca106725	1586	/**
Kojto	122:f9eeca106725	1587	* @brief Indicate the status of Stop detection flag.
Kojto	122:f9eeca106725	1588	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1589	* SET: When a Stop condition is detected.
Kojto	122:f9eeca106725	1590	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
Kojto	122:f9eeca106725	1591	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1592	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1593	*/
Kojto	122:f9eeca106725	1594	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1595	{
Kojto	122:f9eeca106725	1596	return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
Kojto	122:f9eeca106725	1597	}
Kojto	122:f9eeca106725	1598
Kojto	122:f9eeca106725	1599	/**
Kojto	122:f9eeca106725	1600	* @brief Indicate the status of Transfer complete flag (master mode).
Kojto	122:f9eeca106725	1601	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1602	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
Kojto	122:f9eeca106725	1603	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
Kojto	122:f9eeca106725	1604	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1605	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1606	*/
Kojto	122:f9eeca106725	1607	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1608	{
Kojto	122:f9eeca106725	1609	return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
Kojto	122:f9eeca106725	1610	}
Kojto	122:f9eeca106725	1611
Kojto	122:f9eeca106725	1612	/**
Kojto	122:f9eeca106725	1613	* @brief Indicate the status of Transfer complete flag (master mode).
Kojto	122:f9eeca106725	1614	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1615	* SET: When RELOAD=1 and NBYTES date have been transferred.
Kojto	122:f9eeca106725	1616	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
Kojto	122:f9eeca106725	1617	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1618	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1619	*/
Kojto	122:f9eeca106725	1620	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1621	{
Kojto	122:f9eeca106725	1622	return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
Kojto	122:f9eeca106725	1623	}
Kojto	122:f9eeca106725	1624
Kojto	122:f9eeca106725	1625	/**
Kojto	122:f9eeca106725	1626	* @brief Indicate the status of Bus error flag.
Kojto	122:f9eeca106725	1627	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1628	* SET: When a misplaced Start or Stop condition is detected.
Kojto	122:f9eeca106725	1629	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
Kojto	122:f9eeca106725	1630	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1631	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1632	*/
Kojto	122:f9eeca106725	1633	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1634	{
Kojto	122:f9eeca106725	1635	return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
Kojto	122:f9eeca106725	1636	}
Kojto	122:f9eeca106725	1637
Kojto	122:f9eeca106725	1638	/**
Kojto	122:f9eeca106725	1639	* @brief Indicate the status of Arbitration lost flag.
Kojto	122:f9eeca106725	1640	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1641	* SET: When arbitration lost.
Kojto	122:f9eeca106725	1642	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
Kojto	122:f9eeca106725	1643	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1644	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1645	*/
Kojto	122:f9eeca106725	1646	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1647	{
Kojto	122:f9eeca106725	1648	return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
Kojto	122:f9eeca106725	1649	}
Kojto	122:f9eeca106725	1650
Kojto	122:f9eeca106725	1651	/**
Kojto	122:f9eeca106725	1652	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
Kojto	122:f9eeca106725	1653	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1654	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
Kojto	122:f9eeca106725	1655	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
Kojto	122:f9eeca106725	1656	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1657	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1658	*/
Kojto	122:f9eeca106725	1659	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1660	{
Kojto	122:f9eeca106725	1661	return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
Kojto	122:f9eeca106725	1662	}
Kojto	122:f9eeca106725	1663
Kojto	122:f9eeca106725	1664	/**
AnnaBridge	145:64910690c574	1665	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	145:64910690c574	1666	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1667	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1668	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1669	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	145:64910690c574	1670	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	145:64910690c574	1671	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1672	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1673	*/
AnnaBridge	145:64910690c574	1674	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1675	{
AnnaBridge	145:64910690c574	1676	return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge	145:64910690c574	1677	}
AnnaBridge	145:64910690c574	1678
AnnaBridge	145:64910690c574	1679	/**
AnnaBridge	145:64910690c574	1680	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	145:64910690c574	1681	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1682	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1683	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1684	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	145:64910690c574	1685	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	145:64910690c574	1686	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1687	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1688	*/
AnnaBridge	145:64910690c574	1689	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1690	{
AnnaBridge	145:64910690c574	1691	return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge	145:64910690c574	1692	}
AnnaBridge	145:64910690c574	1693
AnnaBridge	145:64910690c574	1694	/**
AnnaBridge	145:64910690c574	1695	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	145:64910690c574	1696	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1697	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1698	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1699	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	145:64910690c574	1700	* a falling edge event occurs on SMBA pin.
AnnaBridge	145:64910690c574	1701	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	145:64910690c574	1702	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1703	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1704	*/
AnnaBridge	145:64910690c574	1705	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1706	{
AnnaBridge	145:64910690c574	1707	return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge	145:64910690c574	1708	}
AnnaBridge	145:64910690c574	1709
AnnaBridge	145:64910690c574	1710	/**
Kojto	122:f9eeca106725	1711	* @brief Indicate the status of Bus Busy flag.
Kojto	122:f9eeca106725	1712	* @note RESET: Clear default value.
Kojto	122:f9eeca106725	1713	* SET: When a Start condition is detected.
Kojto	122:f9eeca106725	1714	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
Kojto	122:f9eeca106725	1715	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1716	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1717	*/
Kojto	122:f9eeca106725	1718	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1719	{
Kojto	122:f9eeca106725	1720	return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
Kojto	122:f9eeca106725	1721	}
Kojto	122:f9eeca106725	1722
Kojto	122:f9eeca106725	1723	/**
Kojto	122:f9eeca106725	1724	* @brief Clear Address Matched flag.
Kojto	122:f9eeca106725	1725	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
Kojto	122:f9eeca106725	1726	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1727	* @retval None
Kojto	122:f9eeca106725	1728	*/
Kojto	122:f9eeca106725	1729	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1730	{
Kojto	122:f9eeca106725	1731	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
Kojto	122:f9eeca106725	1732	}
Kojto	122:f9eeca106725	1733
Kojto	122:f9eeca106725	1734	/**
Kojto	122:f9eeca106725	1735	* @brief Clear Not Acknowledge flag.
Kojto	122:f9eeca106725	1736	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
Kojto	122:f9eeca106725	1737	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1738	* @retval None
Kojto	122:f9eeca106725	1739	*/
Kojto	122:f9eeca106725	1740	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1741	{
Kojto	122:f9eeca106725	1742	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
Kojto	122:f9eeca106725	1743	}
Kojto	122:f9eeca106725	1744
Kojto	122:f9eeca106725	1745	/**
Kojto	122:f9eeca106725	1746	* @brief Clear Stop detection flag.
Kojto	122:f9eeca106725	1747	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
Kojto	122:f9eeca106725	1748	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1749	* @retval None
Kojto	122:f9eeca106725	1750	*/
Kojto	122:f9eeca106725	1751	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1752	{
Kojto	122:f9eeca106725	1753	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
Kojto	122:f9eeca106725	1754	}
Kojto	122:f9eeca106725	1755
Kojto	122:f9eeca106725	1756	/**
Kojto	122:f9eeca106725	1757	* @brief Clear Transmit data register empty flag (TXE).
Kojto	122:f9eeca106725	1758	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
Kojto	122:f9eeca106725	1759	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
Kojto	122:f9eeca106725	1760	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1761	* @retval None
Kojto	122:f9eeca106725	1762	*/
Kojto	122:f9eeca106725	1763	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1764	{
Kojto	122:f9eeca106725	1765	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
Kojto	122:f9eeca106725	1766	}
Kojto	122:f9eeca106725	1767
Kojto	122:f9eeca106725	1768	/**
Kojto	122:f9eeca106725	1769	* @brief Clear Bus error flag.
Kojto	122:f9eeca106725	1770	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
Kojto	122:f9eeca106725	1771	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1772	* @retval None
Kojto	122:f9eeca106725	1773	*/
Kojto	122:f9eeca106725	1774	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1775	{
Kojto	122:f9eeca106725	1776	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
Kojto	122:f9eeca106725	1777	}
Kojto	122:f9eeca106725	1778
Kojto	122:f9eeca106725	1779	/**
Kojto	122:f9eeca106725	1780	* @brief Clear Arbitration lost flag.
Kojto	122:f9eeca106725	1781	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
Kojto	122:f9eeca106725	1782	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1783	* @retval None
Kojto	122:f9eeca106725	1784	*/
Kojto	122:f9eeca106725	1785	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1786	{
Kojto	122:f9eeca106725	1787	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
Kojto	122:f9eeca106725	1788	}
Kojto	122:f9eeca106725	1789
Kojto	122:f9eeca106725	1790	/**
Kojto	122:f9eeca106725	1791	* @brief Clear Overrun/Underrun flag.
Kojto	122:f9eeca106725	1792	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
Kojto	122:f9eeca106725	1793	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1794	* @retval None
Kojto	122:f9eeca106725	1795	*/
Kojto	122:f9eeca106725	1796	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1797	{
Kojto	122:f9eeca106725	1798	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
Kojto	122:f9eeca106725	1799	}
Kojto	122:f9eeca106725	1800
Kojto	122:f9eeca106725	1801	/**
Kojto	122:f9eeca106725	1802	* @brief Clear SMBus PEC error flag.
Kojto	122:f9eeca106725	1803	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1804	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1805	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
Kojto	122:f9eeca106725	1806	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1807	* @retval None
Kojto	122:f9eeca106725	1808	*/
Kojto	122:f9eeca106725	1809	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1810	{
Kojto	122:f9eeca106725	1811	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
Kojto	122:f9eeca106725	1812	}
Kojto	122:f9eeca106725	1813
Kojto	122:f9eeca106725	1814	/**
Kojto	122:f9eeca106725	1815	* @brief Clear SMBus Timeout detection flag.
Kojto	122:f9eeca106725	1816	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1817	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1818	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
Kojto	122:f9eeca106725	1819	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1820	* @retval None
Kojto	122:f9eeca106725	1821	*/
Kojto	122:f9eeca106725	1822	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1823	{
Kojto	122:f9eeca106725	1824	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
Kojto	122:f9eeca106725	1825	}
Kojto	122:f9eeca106725	1826
Kojto	122:f9eeca106725	1827	/**
Kojto	122:f9eeca106725	1828	* @brief Clear SMBus Alert flag.
Kojto	122:f9eeca106725	1829	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	1830	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	1831	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
Kojto	122:f9eeca106725	1832	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1833	* @retval None
Kojto	122:f9eeca106725	1834	*/
Kojto	122:f9eeca106725	1835	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1836	{
Kojto	122:f9eeca106725	1837	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
Kojto	122:f9eeca106725	1838	}
Kojto	122:f9eeca106725	1839
Kojto	122:f9eeca106725	1840	/**
Kojto	122:f9eeca106725	1841	* @}
Kojto	122:f9eeca106725	1842	*/
Kojto	122:f9eeca106725	1843
Kojto	122:f9eeca106725	1844	/** @defgroup I2C_LL_EF_Data_Management Data_Management
Kojto	122:f9eeca106725	1845	* @{
Kojto	122:f9eeca106725	1846	*/
Kojto	122:f9eeca106725	1847
Kojto	122:f9eeca106725	1848	/**
Kojto	122:f9eeca106725	1849	* @brief Enable automatic STOP condition generation (master mode).
Kojto	122:f9eeca106725	1850	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
Kojto	122:f9eeca106725	1851	* This bit has no effect in slave mode or when RELOAD bit is set.
Kojto	122:f9eeca106725	1852	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
Kojto	122:f9eeca106725	1853	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1854	* @retval None
Kojto	122:f9eeca106725	1855	*/
Kojto	122:f9eeca106725	1856	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1857	{
Kojto	122:f9eeca106725	1858	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
Kojto	122:f9eeca106725	1859	}
Kojto	122:f9eeca106725	1860
Kojto	122:f9eeca106725	1861	/**
Kojto	122:f9eeca106725	1862	* @brief Disable automatic STOP condition generation (master mode).
Kojto	122:f9eeca106725	1863	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
Kojto	122:f9eeca106725	1864	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
Kojto	122:f9eeca106725	1865	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1866	* @retval None
Kojto	122:f9eeca106725	1867	*/
Kojto	122:f9eeca106725	1868	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1869	{
Kojto	122:f9eeca106725	1870	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
Kojto	122:f9eeca106725	1871	}
Kojto	122:f9eeca106725	1872
Kojto	122:f9eeca106725	1873	/**
Kojto	122:f9eeca106725	1874	* @brief Check if automatic STOP condition is enabled or disabled.
Kojto	122:f9eeca106725	1875	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
Kojto	122:f9eeca106725	1876	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1877	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1878	*/
Kojto	122:f9eeca106725	1879	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1880	{
Kojto	122:f9eeca106725	1881	return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
Kojto	122:f9eeca106725	1882	}
Kojto	122:f9eeca106725	1883
Kojto	122:f9eeca106725	1884	/**
Kojto	122:f9eeca106725	1885	* @brief Enable reload mode (master mode).
Kojto	122:f9eeca106725	1886	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
Kojto	122:f9eeca106725	1887	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
Kojto	122:f9eeca106725	1888	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1889	* @retval None
Kojto	122:f9eeca106725	1890	*/
Kojto	122:f9eeca106725	1891	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1892	{
Kojto	122:f9eeca106725	1893	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
Kojto	122:f9eeca106725	1894	}
Kojto	122:f9eeca106725	1895
Kojto	122:f9eeca106725	1896	/**
Kojto	122:f9eeca106725	1897	* @brief Disable reload mode (master mode).
Kojto	122:f9eeca106725	1898	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
Kojto	122:f9eeca106725	1899	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
Kojto	122:f9eeca106725	1900	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1901	* @retval None
Kojto	122:f9eeca106725	1902	*/
Kojto	122:f9eeca106725	1903	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1904	{
Kojto	122:f9eeca106725	1905	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
Kojto	122:f9eeca106725	1906	}
Kojto	122:f9eeca106725	1907
Kojto	122:f9eeca106725	1908	/**
Kojto	122:f9eeca106725	1909	* @brief Check if reload mode is enabled or disabled.
Kojto	122:f9eeca106725	1910	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
Kojto	122:f9eeca106725	1911	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1912	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1913	*/
Kojto	122:f9eeca106725	1914	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1915	{
Kojto	122:f9eeca106725	1916	return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
Kojto	122:f9eeca106725	1917	}
Kojto	122:f9eeca106725	1918
Kojto	122:f9eeca106725	1919	/**
Kojto	122:f9eeca106725	1920	* @brief Configure the number of bytes for transfer.
Kojto	122:f9eeca106725	1921	* @note Changing these bits when START bit is set is not allowed.
Kojto	122:f9eeca106725	1922	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
Kojto	122:f9eeca106725	1923	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1924	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
Kojto	122:f9eeca106725	1925	* @retval None
Kojto	122:f9eeca106725	1926	*/
Kojto	122:f9eeca106725	1927	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
Kojto	122:f9eeca106725	1928	{
AnnaBridge	145:64910690c574	1929	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
Kojto	122:f9eeca106725	1930	}
Kojto	122:f9eeca106725	1931
Kojto	122:f9eeca106725	1932	/**
Kojto	122:f9eeca106725	1933	* @brief Get the number of bytes configured for transfer.
Kojto	122:f9eeca106725	1934	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
Kojto	122:f9eeca106725	1935	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1936	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
Kojto	122:f9eeca106725	1937	*/
Kojto	122:f9eeca106725	1938	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1939	{
AnnaBridge	145:64910690c574	1940	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
Kojto	122:f9eeca106725	1941	}
Kojto	122:f9eeca106725	1942
Kojto	122:f9eeca106725	1943	/**
Kojto	122:f9eeca106725	1944	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
Kojto	122:f9eeca106725	1945	* @note Usage in Slave mode only.
Kojto	122:f9eeca106725	1946	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
Kojto	122:f9eeca106725	1947	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1948	* @param TypeAcknowledge This parameter can be one of the following values:
Kojto	122:f9eeca106725	1949	* @arg @ref LL_I2C_ACK
Kojto	122:f9eeca106725	1950	* @arg @ref LL_I2C_NACK
Kojto	122:f9eeca106725	1951	* @retval None
Kojto	122:f9eeca106725	1952	*/
Kojto	122:f9eeca106725	1953	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
Kojto	122:f9eeca106725	1954	{
Kojto	122:f9eeca106725	1955	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
Kojto	122:f9eeca106725	1956	}
Kojto	122:f9eeca106725	1957
Kojto	122:f9eeca106725	1958	/**
Kojto	122:f9eeca106725	1959	* @brief Generate a START or RESTART condition
Kojto	122:f9eeca106725	1960	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
Kojto	122:f9eeca106725	1961	* This action has no effect when RELOAD is set.
Kojto	122:f9eeca106725	1962	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
Kojto	122:f9eeca106725	1963	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1964	* @retval None
Kojto	122:f9eeca106725	1965	*/
Kojto	122:f9eeca106725	1966	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1967	{
Kojto	122:f9eeca106725	1968	SET_BIT(I2Cx->CR2, I2C_CR2_START);
Kojto	122:f9eeca106725	1969	}
Kojto	122:f9eeca106725	1970
Kojto	122:f9eeca106725	1971	/**
AnnaBridge	145:64910690c574	1972	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	145:64910690c574	1973	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	145:64910690c574	1974	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1975	* @retval None
AnnaBridge	145:64910690c574	1976	*/
AnnaBridge	145:64910690c574	1977	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1978	{
AnnaBridge	145:64910690c574	1979	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	145:64910690c574	1980	}
AnnaBridge	145:64910690c574	1981
AnnaBridge	145:64910690c574	1982	/**
Kojto	122:f9eeca106725	1983	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
Kojto	122:f9eeca106725	1984	* @note The master sends the complete 10bit slave address read sequence :
Kojto	122:f9eeca106725	1985	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
Kojto	122:f9eeca106725	1986	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
Kojto	122:f9eeca106725	1987	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	1988	* @retval None
Kojto	122:f9eeca106725	1989	*/
Kojto	122:f9eeca106725	1990	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	1991	{
Kojto	122:f9eeca106725	1992	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
Kojto	122:f9eeca106725	1993	}
Kojto	122:f9eeca106725	1994
Kojto	122:f9eeca106725	1995	/**
Kojto	122:f9eeca106725	1996	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
Kojto	122:f9eeca106725	1997	* @note The master only sends the first 7 bits of 10bit address in Read direction.
Kojto	122:f9eeca106725	1998	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
Kojto	122:f9eeca106725	1999	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2000	* @retval None
Kojto	122:f9eeca106725	2001	*/
Kojto	122:f9eeca106725	2002	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2003	{
Kojto	122:f9eeca106725	2004	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
Kojto	122:f9eeca106725	2005	}
Kojto	122:f9eeca106725	2006
Kojto	122:f9eeca106725	2007	/**
Kojto	122:f9eeca106725	2008	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
Kojto	122:f9eeca106725	2009	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
Kojto	122:f9eeca106725	2010	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2011	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2012	*/
Kojto	122:f9eeca106725	2013	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2014	{
Kojto	122:f9eeca106725	2015	return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
Kojto	122:f9eeca106725	2016	}
Kojto	122:f9eeca106725	2017
Kojto	122:f9eeca106725	2018	/**
Kojto	122:f9eeca106725	2019	* @brief Configure the transfer direction (master mode).
Kojto	122:f9eeca106725	2020	* @note Changing these bits when START bit is set is not allowed.
Kojto	122:f9eeca106725	2021	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
Kojto	122:f9eeca106725	2022	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2023	* @param TransferRequest This parameter can be one of the following values:
Kojto	122:f9eeca106725	2024	* @arg @ref LL_I2C_REQUEST_WRITE
Kojto	122:f9eeca106725	2025	* @arg @ref LL_I2C_REQUEST_READ
Kojto	122:f9eeca106725	2026	* @retval None
Kojto	122:f9eeca106725	2027	*/
Kojto	122:f9eeca106725	2028	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
Kojto	122:f9eeca106725	2029	{
Kojto	122:f9eeca106725	2030	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
Kojto	122:f9eeca106725	2031	}
Kojto	122:f9eeca106725	2032
Kojto	122:f9eeca106725	2033	/**
Kojto	122:f9eeca106725	2034	* @brief Get the transfer direction requested (master mode).
Kojto	122:f9eeca106725	2035	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
Kojto	122:f9eeca106725	2036	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2037	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2038	* @arg @ref LL_I2C_REQUEST_WRITE
Kojto	122:f9eeca106725	2039	* @arg @ref LL_I2C_REQUEST_READ
Kojto	122:f9eeca106725	2040	*/
Kojto	122:f9eeca106725	2041	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2042	{
Kojto	122:f9eeca106725	2043	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
Kojto	122:f9eeca106725	2044	}
Kojto	122:f9eeca106725	2045
Kojto	122:f9eeca106725	2046	/**
Kojto	122:f9eeca106725	2047	* @brief Configure the slave address for transfer (master mode).
Kojto	122:f9eeca106725	2048	* @note Changing these bits when START bit is set is not allowed.
Kojto	122:f9eeca106725	2049	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
Kojto	122:f9eeca106725	2050	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2051	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
Kojto	122:f9eeca106725	2052	* @retval None
Kojto	122:f9eeca106725	2053	*/
Kojto	122:f9eeca106725	2054	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
Kojto	122:f9eeca106725	2055	{
Kojto	122:f9eeca106725	2056	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
Kojto	122:f9eeca106725	2057	}
Kojto	122:f9eeca106725	2058
Kojto	122:f9eeca106725	2059	/**
Kojto	122:f9eeca106725	2060	* @brief Get the slave address programmed for transfer.
Kojto	122:f9eeca106725	2061	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
Kojto	122:f9eeca106725	2062	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2063	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
Kojto	122:f9eeca106725	2064	*/
Kojto	122:f9eeca106725	2065	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2066	{
Kojto	122:f9eeca106725	2067	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
Kojto	122:f9eeca106725	2068	}
Kojto	122:f9eeca106725	2069
Kojto	122:f9eeca106725	2070	/**
Kojto	122:f9eeca106725	2071	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
Kojto	122:f9eeca106725	2072	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2073	* CR2 ADD10 LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2074	* CR2 RD_WRN LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2075	* CR2 START LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2076	* CR2 STOP LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2077	* CR2 RELOAD LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2078	* CR2 NBYTES LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2079	* CR2 AUTOEND LL_I2C_HandleTransfer\n
Kojto	122:f9eeca106725	2080	* CR2 HEAD10R LL_I2C_HandleTransfer
Kojto	122:f9eeca106725	2081	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2082	* @param SlaveAddr Specifies the slave address to be programmed.
Kojto	122:f9eeca106725	2083	* @param SlaveAddrSize This parameter can be one of the following values:
Kojto	122:f9eeca106725	2084	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
Kojto	122:f9eeca106725	2085	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
Kojto	122:f9eeca106725	2086	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	145:64910690c574	2087	* This parameter must be a value between Min_Data=0 and Max_Data=255.
Kojto	122:f9eeca106725	2088	* @param EndMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	2089	* @arg @ref LL_I2C_MODE_RELOAD
Kojto	122:f9eeca106725	2090	* @arg @ref LL_I2C_MODE_AUTOEND
Kojto	122:f9eeca106725	2091	* @arg @ref LL_I2C_MODE_SOFTEND
Kojto	122:f9eeca106725	2092	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
Kojto	122:f9eeca106725	2093	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
Kojto	122:f9eeca106725	2094	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
Kojto	122:f9eeca106725	2095	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
Kojto	122:f9eeca106725	2096	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
Kojto	122:f9eeca106725	2097	* @param Request This parameter can be one of the following values:
Kojto	122:f9eeca106725	2098	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
Kojto	122:f9eeca106725	2099	* @arg @ref LL_I2C_GENERATE_STOP
Kojto	122:f9eeca106725	2100	* @arg @ref LL_I2C_GENERATE_START_READ
Kojto	122:f9eeca106725	2101	* @arg @ref LL_I2C_GENERATE_START_WRITE
Kojto	122:f9eeca106725	2102	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
Kojto	122:f9eeca106725	2103	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
Kojto	122:f9eeca106725	2104	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
Kojto	122:f9eeca106725	2105	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
Kojto	122:f9eeca106725	2106	* @retval None
Kojto	122:f9eeca106725	2107	*/
Kojto	122:f9eeca106725	2108	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
Kojto	122:f9eeca106725	2109	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
Kojto	122:f9eeca106725	2110	{
Kojto	122:f9eeca106725	2111	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| I2C_CR2_RD_WRN \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
Kojto	122:f9eeca106725	2112	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	145:64910690c574	2113	SlaveAddr \| SlaveAddrSize \| TransferSize << I2C_CR2_NBYTES_Pos \| EndMode \| Request);
Kojto	122:f9eeca106725	2114	}
Kojto	122:f9eeca106725	2115
Kojto	122:f9eeca106725	2116	/**
Kojto	122:f9eeca106725	2117	* @brief Indicate the value of transfer direction (slave mode).
Kojto	122:f9eeca106725	2118	* @note RESET: Write transfer, Slave enters in receiver mode.
Kojto	122:f9eeca106725	2119	* SET: Read transfer, Slave enters in transmitter mode.
Kojto	122:f9eeca106725	2120	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
Kojto	122:f9eeca106725	2121	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2122	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2123	* @arg @ref LL_I2C_DIRECTION_WRITE
Kojto	122:f9eeca106725	2124	* @arg @ref LL_I2C_DIRECTION_READ
Kojto	122:f9eeca106725	2125	*/
Kojto	122:f9eeca106725	2126	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2127	{
Kojto	122:f9eeca106725	2128	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
Kojto	122:f9eeca106725	2129	}
Kojto	122:f9eeca106725	2130
Kojto	122:f9eeca106725	2131	/**
Kojto	122:f9eeca106725	2132	* @brief Return the slave matched address.
Kojto	122:f9eeca106725	2133	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
Kojto	122:f9eeca106725	2134	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2135	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
Kojto	122:f9eeca106725	2136	*/
Kojto	122:f9eeca106725	2137	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2138	{
AnnaBridge	145:64910690c574	2139	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
Kojto	122:f9eeca106725	2140	}
Kojto	122:f9eeca106725	2141
Kojto	122:f9eeca106725	2142	/**
AnnaBridge	145:64910690c574	2143	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
Kojto	122:f9eeca106725	2144	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	2145	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	2146	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
Kojto	122:f9eeca106725	2147	* This bit has no effect when RELOAD bit is set.
Kojto	122:f9eeca106725	2148	* This bit has no effect in device mode when SBC bit is not set.
Kojto	122:f9eeca106725	2149	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
Kojto	122:f9eeca106725	2150	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2151	* @retval None
Kojto	122:f9eeca106725	2152	*/
Kojto	122:f9eeca106725	2153	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2154	{
Kojto	122:f9eeca106725	2155	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
Kojto	122:f9eeca106725	2156	}
Kojto	122:f9eeca106725	2157
Kojto	122:f9eeca106725	2158	/**
AnnaBridge	145:64910690c574	2159	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
Kojto	122:f9eeca106725	2160	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	2161	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	2162	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
Kojto	122:f9eeca106725	2163	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2164	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2165	*/
Kojto	122:f9eeca106725	2166	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2167	{
Kojto	122:f9eeca106725	2168	return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
Kojto	122:f9eeca106725	2169	}
Kojto	122:f9eeca106725	2170
Kojto	122:f9eeca106725	2171	/**
AnnaBridge	145:64910690c574	2172	* @brief Get the SMBus Packet Error byte calculated.
Kojto	122:f9eeca106725	2173	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
Kojto	122:f9eeca106725	2174	* SMBus feature is supported by the I2Cx Instance.
Kojto	122:f9eeca106725	2175	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
Kojto	122:f9eeca106725	2176	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2177	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
Kojto	122:f9eeca106725	2178	*/
Kojto	122:f9eeca106725	2179	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2180	{
Kojto	122:f9eeca106725	2181	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
Kojto	122:f9eeca106725	2182	}
Kojto	122:f9eeca106725	2183
Kojto	122:f9eeca106725	2184	/**
Kojto	122:f9eeca106725	2185	* @brief Read Receive Data register.
Kojto	122:f9eeca106725	2186	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
Kojto	122:f9eeca106725	2187	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2188	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
Kojto	122:f9eeca106725	2189	*/
Kojto	122:f9eeca106725	2190	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
Kojto	122:f9eeca106725	2191	{
Kojto	122:f9eeca106725	2192	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
Kojto	122:f9eeca106725	2193	}
Kojto	122:f9eeca106725	2194
Kojto	122:f9eeca106725	2195	/**
Kojto	122:f9eeca106725	2196	* @brief Write in Transmit Data Register .
Kojto	122:f9eeca106725	2197	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
Kojto	122:f9eeca106725	2198	* @param I2Cx I2C Instance.
Kojto	122:f9eeca106725	2199	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
Kojto	122:f9eeca106725	2200	* @retval None
Kojto	122:f9eeca106725	2201	*/
Kojto	122:f9eeca106725	2202	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
Kojto	122:f9eeca106725	2203	{
Kojto	122:f9eeca106725	2204	WRITE_REG(I2Cx->TXDR, Data);
Kojto	122:f9eeca106725	2205	}
Kojto	122:f9eeca106725	2206
Kojto	122:f9eeca106725	2207	/**
Kojto	122:f9eeca106725	2208	* @}
Kojto	122:f9eeca106725	2209	*/
Kojto	122:f9eeca106725	2210
Kojto	122:f9eeca106725	2211	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	2212	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
Kojto	122:f9eeca106725	2213	* @{
Kojto	122:f9eeca106725	2214	*/
Kojto	122:f9eeca106725	2215
Kojto	122:f9eeca106725	2216	uint32_t LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
Kojto	122:f9eeca106725	2217	uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
Kojto	122:f9eeca106725	2218	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
Kojto	122:f9eeca106725	2219
Kojto	122:f9eeca106725	2220
Kojto	122:f9eeca106725	2221	/**
Kojto	122:f9eeca106725	2222	* @}
Kojto	122:f9eeca106725	2223	*/
Kojto	122:f9eeca106725	2224	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	2225
Kojto	122:f9eeca106725	2226	/**
Kojto	122:f9eeca106725	2227	* @}
Kojto	122:f9eeca106725	2228	*/
Kojto	122:f9eeca106725	2229
Kojto	122:f9eeca106725	2230	/**
Kojto	122:f9eeca106725	2231	* @}
Kojto	122:f9eeca106725	2232	*/
Kojto	122:f9eeca106725	2233
AnnaBridge	145:64910690c574	2234	#endif /* I2C1 \|\| I2C2 \|\| I2C3 \|\| I2C4 */
Kojto	122:f9eeca106725	2235
Kojto	122:f9eeca106725	2236	/**
Kojto	122:f9eeca106725	2237	* @}
Kojto	122:f9eeca106725	2238	*/
Kojto	122:f9eeca106725	2239
Kojto	122:f9eeca106725	2240	#ifdef __cplusplus
Kojto	122:f9eeca106725	2241	}
Kojto	122:f9eeca106725	2242	#endif
Kojto	122:f9eeca106725	2243
Kojto	122:f9eeca106725	2244	#endif /* __STM32L4xx_LL_I2C_H */
Kojto	122:f9eeca106725	2245
Kojto	122:f9eeca106725	2246	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/