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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.h@145:64910690c574, 2017-06-21 (annotated)

Committer:: AnnaBridge
Date:: Wed Jun 21 17:31:38 2017 +0100
Revision:: 145:64910690c574
Parent:: 128:9bcdf88f62b0

Release 145 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	122:f9eeca106725	1	/**
Kojto	122:f9eeca106725	2	******************************************************************************
Kojto	122:f9eeca106725	3	* @file stm32l4xx_hal_tim_ex.h
Kojto	122:f9eeca106725	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @version V1.7.1
AnnaBridge	145:64910690c574	6	* @date 21-April-2017
Kojto	122:f9eeca106725	7	* @brief Header file of TIM HAL Extended module.
Kojto	122:f9eeca106725	8	******************************************************************************
Kojto	122:f9eeca106725	9	* @attention
Kojto	122:f9eeca106725	10	*
AnnaBridge	145:64910690c574	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Kojto	122:f9eeca106725	12	*
Kojto	122:f9eeca106725	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	122:f9eeca106725	14	* are permitted provided that the following conditions are met:
Kojto	122:f9eeca106725	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	122:f9eeca106725	16	* this list of conditions and the following disclaimer.
Kojto	122:f9eeca106725	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	122:f9eeca106725	18	* this list of conditions and the following disclaimer in the documentation
Kojto	122:f9eeca106725	19	* and/or other materials provided with the distribution.
Kojto	122:f9eeca106725	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	122:f9eeca106725	21	* may be used to endorse or promote products derived from this software
Kojto	122:f9eeca106725	22	* without specific prior written permission.
Kojto	122:f9eeca106725	23	*
Kojto	122:f9eeca106725	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	122:f9eeca106725	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	122:f9eeca106725	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	122:f9eeca106725	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	122:f9eeca106725	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	122:f9eeca106725	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	122:f9eeca106725	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	122:f9eeca106725	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	122:f9eeca106725	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	122:f9eeca106725	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	122:f9eeca106725	34	*
Kojto	122:f9eeca106725	35	******************************************************************************
AnnaBridge	145:64910690c574	36	*/
Kojto	122:f9eeca106725	37
Kojto	122:f9eeca106725	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	122:f9eeca106725	39	#ifndef __STM32L4xx_HAL_TIM_EX_H
Kojto	122:f9eeca106725	40	#define __STM32L4xx_HAL_TIM_EX_H
Kojto	122:f9eeca106725	41
Kojto	122:f9eeca106725	42	#ifdef __cplusplus
Kojto	122:f9eeca106725	43	extern "C" {
Kojto	122:f9eeca106725	44	#endif
Kojto	122:f9eeca106725	45
Kojto	122:f9eeca106725	46	/* Includes ------------------------------------------------------------------*/
Kojto	122:f9eeca106725	47	#include "stm32l4xx_hal_def.h"
Kojto	122:f9eeca106725	48
Kojto	122:f9eeca106725	49	/** @addtogroup STM32L4xx_HAL_Driver
Kojto	122:f9eeca106725	50	* @{
Kojto	122:f9eeca106725	51	*/
Kojto	122:f9eeca106725	52
Kojto	122:f9eeca106725	53	/** @addtogroup TIMEx
Kojto	122:f9eeca106725	54	* @{
AnnaBridge	145:64910690c574	55	*/
Kojto	122:f9eeca106725	56
AnnaBridge	145:64910690c574	57	/* Exported types ------------------------------------------------------------*/
Kojto	122:f9eeca106725	58	/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
Kojto	122:f9eeca106725	59	* @{
Kojto	122:f9eeca106725	60	*/
Kojto	122:f9eeca106725	61
Kojto	122:f9eeca106725	62	/**
Kojto	122:f9eeca106725	63	* @brief TIM Hall sensor Configuration Structure definition
Kojto	122:f9eeca106725	64	*/
Kojto	122:f9eeca106725	65
Kojto	122:f9eeca106725	66	typedef struct
Kojto	122:f9eeca106725	67	{
Kojto	122:f9eeca106725	68
Kojto	122:f9eeca106725	69	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
Kojto	122:f9eeca106725	70	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto	122:f9eeca106725	71
Kojto	122:f9eeca106725	72	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	122:f9eeca106725	73	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto	122:f9eeca106725	74
Kojto	122:f9eeca106725	75	uint32_t IC1Filter; /*!< Specifies the input capture filter.
AnnaBridge	145:64910690c574	76	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	122:f9eeca106725	77
Kojto	122:f9eeca106725	78	uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
AnnaBridge	145:64910690c574	79	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto	122:f9eeca106725	80	} TIM_HallSensor_InitTypeDef;
Kojto	122:f9eeca106725	81
Kojto	122:f9eeca106725	82	/**
Kojto	122:f9eeca106725	83	* @brief TIM Break/Break2 input configuration
Kojto	122:f9eeca106725	84	*/
Kojto	122:f9eeca106725	85	typedef struct {
Kojto	122:f9eeca106725	86	uint32_t Source; /*!< Specifies the source of the timer break input.
Kojto	122:f9eeca106725	87	This parameter can be a value of @ref TIMEx_Break_Input_Source */
Kojto	122:f9eeca106725	88	uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
Kojto	122:f9eeca106725	89	This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
Kojto	122:f9eeca106725	90	uint32_t Polarity; /*!< Specifies the break input source polarity.
Kojto	122:f9eeca106725	91	This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
Kojto	122:f9eeca106725	92	Not relevant when analog watchdog output of the DFSDM1 used as break input source */
Kojto	122:f9eeca106725	93	} TIMEx_BreakInputConfigTypeDef;
Kojto	122:f9eeca106725	94
Kojto	122:f9eeca106725	95	/**
Kojto	122:f9eeca106725	96	* @}
Kojto	122:f9eeca106725	97	*/
AnnaBridge	145:64910690c574	98	/* End of exported types -----------------------------------------------------*/
Kojto	122:f9eeca106725	99
Kojto	122:f9eeca106725	100	/* Exported constants --------------------------------------------------------*/
Kojto	122:f9eeca106725	101	/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
Kojto	122:f9eeca106725	102	* @{
Kojto	122:f9eeca106725	103	*/
Kojto	122:f9eeca106725	104
Kojto	122:f9eeca106725	105	/** @defgroup TIMEx_Remap TIM Extended Remapping
Kojto	122:f9eeca106725	106	* @{
Kojto	122:f9eeca106725	107	*/
Kojto	122:f9eeca106725	108	#define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto	122:f9eeca106725	109	#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto	122:f9eeca106725	110	#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto	122:f9eeca106725	111	#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 \| TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
AnnaBridge	145:64910690c574	112	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	113	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	114	#define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto	122:f9eeca106725	115	#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */
Kojto	122:f9eeca106725	116	#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */
Kojto	122:f9eeca106725	117	#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 \| TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
AnnaBridge	145:64910690c574	118	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	119	/* STM32L496xx \|\| STM32L4A6xx */
Kojto	122:f9eeca106725	120	#define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	121	#define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */
Kojto	122:f9eeca106725	122	#define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */
Kojto	122:f9eeca106725	123	#define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */
AnnaBridge	145:64910690c574	124
AnnaBridge	145:64910690c574	125	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	126	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	127	#define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */
Kojto	122:f9eeca106725	128	#define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */
AnnaBridge	145:64910690c574	129	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	130	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	131	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx) \|\| \
AnnaBridge	145:64910690c574	132	defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx)
Kojto	122:f9eeca106725	133	#define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */
Kojto	122:f9eeca106725	134	#define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */
AnnaBridge	145:64910690c574	135	#endif /* STM32L431xx \|\| STM32L432xx \|\| STM32L442xx \|\| STM32L433xx \|\| STM32L443xx \|\| */
AnnaBridge	145:64910690c574	136	/* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx */
Kojto	122:f9eeca106725	137	#define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */
Kojto	122:f9eeca106725	138	#define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */
Kojto	122:f9eeca106725	139	#define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */
Kojto	122:f9eeca106725	140	#define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */
Kojto	122:f9eeca106725	141	#define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */
Kojto	122:f9eeca106725	142	#define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */
Kojto	122:f9eeca106725	143	#define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */
Kojto	122:f9eeca106725	144	#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1\| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
AnnaBridge	145:64910690c574	145
AnnaBridge	145:64910690c574	146	#if defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx) \|\| \
AnnaBridge	145:64910690c574	147	defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	148	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	149	#define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	150	#define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */
Kojto	122:f9eeca106725	151	#define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */
Kojto	122:f9eeca106725	152	#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 \| TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
Kojto	122:f9eeca106725	153	#define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */
Kojto	122:f9eeca106725	154	#define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */
AnnaBridge	145:64910690c574	155	#endif /* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx \|\| */
AnnaBridge	145:64910690c574	156	/* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	157	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	158
AnnaBridge	145:64910690c574	159	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	160	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	161	#define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
Kojto	122:f9eeca106725	162	#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
Kojto	122:f9eeca106725	163	#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */
Kojto	122:f9eeca106725	164	#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 \| TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
Kojto	122:f9eeca106725	165	#define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
Kojto	122:f9eeca106725	166	#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */
Kojto	122:f9eeca106725	167	#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */
Kojto	122:f9eeca106725	168	#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 \| TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
AnnaBridge	145:64910690c574	169	#define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */
AnnaBridge	145:64910690c574	170	#define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */
Kojto	122:f9eeca106725	171	#define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	172	#define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */
AnnaBridge	145:64910690c574	173	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	174	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	175
Kojto	122:f9eeca106725	176	#define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	177	#define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */
Kojto	122:f9eeca106725	178	#define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */
Kojto	122:f9eeca106725	179	#define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge	145:64910690c574	180	#if defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx) \|\| \
AnnaBridge	145:64910690c574	181	defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	182	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	183	#define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge	145:64910690c574	184	#endif /* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx */
AnnaBridge	145:64910690c574	185	/* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	186	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	187	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	188	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	189	#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 \| TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge	145:64910690c574	190	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	191	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	192
Kojto	122:f9eeca106725	193	#define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	194	#define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */
Kojto	122:f9eeca106725	195	#define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */
Kojto	122:f9eeca106725	196	#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
AnnaBridge	145:64910690c574	197	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx) \|\| \
AnnaBridge	145:64910690c574	198	defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx) \|\| \
AnnaBridge	145:64910690c574	199	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	200	#define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */
Kojto	122:f9eeca106725	201	#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */
Kojto	122:f9eeca106725	202	#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */
AnnaBridge	145:64910690c574	203	#endif /* STM32L431xx \|\| STM32L432xx \|\| STM32L442xx \|\| STM32L433xx \|\| STM32L443xx \|\| */
AnnaBridge	145:64910690c574	204	/* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx \|\| */
AnnaBridge	145:64910690c574	205	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	206
AnnaBridge	145:64910690c574	207	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	208	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	209	#define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */
Kojto	122:f9eeca106725	210	#define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */
Kojto	122:f9eeca106725	211	#define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */
Kojto	122:f9eeca106725	212	#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 \| TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
AnnaBridge	145:64910690c574	213	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	214	/* STM32L496xx \|\| STM32L4A6xx */
Kojto	122:f9eeca106725	215	/**
Kojto	122:f9eeca106725	216	* @}
AnnaBridge	145:64910690c574	217	*/
Kojto	122:f9eeca106725	218
Kojto	122:f9eeca106725	219	/** @defgroup TIMEx_Break_Input TIM Extended Break input
Kojto	122:f9eeca106725	220	* @{
Kojto	122:f9eeca106725	221	*/
Kojto	122:f9eeca106725	222	#define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */
Kojto	122:f9eeca106725	223	#define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */
Kojto	122:f9eeca106725	224	/**
Kojto	122:f9eeca106725	225	* @}
AnnaBridge	145:64910690c574	226	*/
Kojto	122:f9eeca106725	227
Kojto	122:f9eeca106725	228	/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
Kojto	122:f9eeca106725	229	* @{
Kojto	122:f9eeca106725	230	*/
Kojto	122:f9eeca106725	231	#define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */
Kojto	122:f9eeca106725	232	#define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */
Kojto	122:f9eeca106725	233	#define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */
AnnaBridge	145:64910690c574	234	#if defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx) \|\| \
AnnaBridge	145:64910690c574	235	defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	236	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	237	#define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
AnnaBridge	145:64910690c574	238	#endif /* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx \|\| */
AnnaBridge	145:64910690c574	239	/* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	240	/* STM32L496xx \|\| STM32L4A6xx */
Kojto	122:f9eeca106725	241	/**
Kojto	122:f9eeca106725	242	* @}
AnnaBridge	145:64910690c574	243	*/
Kojto	122:f9eeca106725	244
Kojto	122:f9eeca106725	245	/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
Kojto	122:f9eeca106725	246	* @{
Kojto	122:f9eeca106725	247	*/
Kojto	122:f9eeca106725	248	#define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
Kojto	122:f9eeca106725	249	#define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */
Kojto	122:f9eeca106725	250	/**
Kojto	122:f9eeca106725	251	* @}
AnnaBridge	145:64910690c574	252	*/
Kojto	122:f9eeca106725	253
Kojto	122:f9eeca106725	254	/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
Kojto	122:f9eeca106725	255	* @{
Kojto	122:f9eeca106725	256	*/
Kojto	122:f9eeca106725	257	#define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */
Kojto	122:f9eeca106725	258	#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */
Kojto	122:f9eeca106725	259	/**
Kojto	122:f9eeca106725	260	* @}
AnnaBridge	145:64910690c574	261	*/
Kojto	122:f9eeca106725	262
Kojto	122:f9eeca106725	263	/**
Kojto	122:f9eeca106725	264	* @}
AnnaBridge	145:64910690c574	265	*/
Kojto	122:f9eeca106725	266	/* End of exported constants -------------------------------------------------*/
Kojto	122:f9eeca106725	267
Kojto	122:f9eeca106725	268	/* Exported macro ------------------------------------------------------------*/
Kojto	122:f9eeca106725	269	/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
Kojto	122:f9eeca106725	270	* @{
AnnaBridge	145:64910690c574	271	*/
Kojto	122:f9eeca106725	272
Kojto	122:f9eeca106725	273	/**
Kojto	122:f9eeca106725	274	* @}
AnnaBridge	145:64910690c574	275	*/
Kojto	122:f9eeca106725	276	/* End of exported macro -----------------------------------------------------*/
Kojto	122:f9eeca106725	277
Kojto	122:f9eeca106725	278	/* Private macro -------------------------------------------------------------*/
Kojto	122:f9eeca106725	279	/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
Kojto	122:f9eeca106725	280	* @{
AnnaBridge	145:64910690c574	281	*/
Kojto	122:f9eeca106725	282	#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F))
Kojto	122:f9eeca106725	283
Kojto	122:f9eeca106725	284	#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) \|\| \
Kojto	122:f9eeca106725	285	((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
Kojto	122:f9eeca106725	286
AnnaBridge	145:64910690c574	287	#if defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx) \|\| \
AnnaBridge	145:64910690c574	288	defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| \
AnnaBridge	145:64910690c574	289	defined (STM32L496xx) \|\| defined (STM32L4A6xx)
Kojto	122:f9eeca106725	290	#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) \|\| \
Kojto	122:f9eeca106725	291	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) \|\| \
Kojto	122:f9eeca106725	292	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) \|\| \
Kojto	122:f9eeca106725	293	((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
Kojto	122:f9eeca106725	294	#else
Kojto	122:f9eeca106725	295	#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) \|\| \
Kojto	122:f9eeca106725	296	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) \|\| \
Kojto	122:f9eeca106725	297	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2))
AnnaBridge	145:64910690c574	298	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| STM32L496xx \|\| STM32L4A6xx */
Kojto	122:f9eeca106725	299
Kojto	122:f9eeca106725	300	#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) \|\| \
Kojto	122:f9eeca106725	301	((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
Kojto	122:f9eeca106725	302
Kojto	122:f9eeca106725	303	#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) \|\| \
Kojto	122:f9eeca106725	304	((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
Kojto	122:f9eeca106725	305	/**
Kojto	122:f9eeca106725	306	* @}
AnnaBridge	145:64910690c574	307	*/
Kojto	122:f9eeca106725	308	/* End of private macro ------------------------------------------------------*/
Kojto	122:f9eeca106725	309
Kojto	122:f9eeca106725	310	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	311	/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
Kojto	122:f9eeca106725	312	* @{
Kojto	122:f9eeca106725	313	*/
Kojto	122:f9eeca106725	314
Kojto	122:f9eeca106725	315	/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
Kojto	122:f9eeca106725	316	* @brief Timer Hall Sensor functions
Kojto	122:f9eeca106725	317	* @{
Kojto	122:f9eeca106725	318	*/
Kojto	122:f9eeca106725	319	/* Timer Hall Sensor functions **********************************************/
Kojto	122:f9eeca106725	320	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig);
Kojto	122:f9eeca106725	321	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	322
Kojto	122:f9eeca106725	323	void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	324	void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	325
Kojto	122:f9eeca106725	326	/* Blocking mode: Polling */
Kojto	122:f9eeca106725	327	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	328	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	329	/* Non-Blocking mode: Interrupt */
Kojto	122:f9eeca106725	330	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	331	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	332	/* Non-Blocking mode: DMA */
Kojto	122:f9eeca106725	333	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
Kojto	122:f9eeca106725	334	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	335	/**
Kojto	122:f9eeca106725	336	* @}
Kojto	122:f9eeca106725	337	*/
Kojto	122:f9eeca106725	338
Kojto	122:f9eeca106725	339	/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
Kojto	122:f9eeca106725	340	* @brief Timer Complementary Output Compare functions
Kojto	122:f9eeca106725	341	* @{
Kojto	122:f9eeca106725	342	*/
Kojto	122:f9eeca106725	343	/* Timer Complementary Output Compare functions *****************************/
Kojto	122:f9eeca106725	344	/* Blocking mode: Polling */
Kojto	122:f9eeca106725	345	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	346	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	347
Kojto	122:f9eeca106725	348	/* Non-Blocking mode: Interrupt */
Kojto	122:f9eeca106725	349	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	350	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	351
Kojto	122:f9eeca106725	352	/* Non-Blocking mode: DMA */
Kojto	122:f9eeca106725	353	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
Kojto	122:f9eeca106725	354	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	355	/**
Kojto	122:f9eeca106725	356	* @}
Kojto	122:f9eeca106725	357	*/
Kojto	122:f9eeca106725	358
Kojto	122:f9eeca106725	359	/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
Kojto	122:f9eeca106725	360	* @brief Timer Complementary PWM functions
Kojto	122:f9eeca106725	361	* @{
Kojto	122:f9eeca106725	362	*/
Kojto	122:f9eeca106725	363	/* Timer Complementary PWM functions ****************************************/
Kojto	122:f9eeca106725	364	/* Blocking mode: Polling */
Kojto	122:f9eeca106725	365	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	366	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	367
Kojto	122:f9eeca106725	368	/* Non-Blocking mode: Interrupt */
Kojto	122:f9eeca106725	369	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	370	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	371	/* Non-Blocking mode: DMA */
Kojto	122:f9eeca106725	372	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
Kojto	122:f9eeca106725	373	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	374	/**
Kojto	122:f9eeca106725	375	* @}
Kojto	122:f9eeca106725	376	*/
Kojto	122:f9eeca106725	377
Kojto	122:f9eeca106725	378	/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
Kojto	122:f9eeca106725	379	* @brief Timer Complementary One Pulse functions
Kojto	122:f9eeca106725	380	* @{
Kojto	122:f9eeca106725	381	*/
Kojto	122:f9eeca106725	382	/* Timer Complementary One Pulse functions **********************************/
Kojto	122:f9eeca106725	383	/* Blocking mode: Polling */
Kojto	122:f9eeca106725	384	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	122:f9eeca106725	385	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	122:f9eeca106725	386
Kojto	122:f9eeca106725	387	/* Non-Blocking mode: Interrupt */
Kojto	122:f9eeca106725	388	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	122:f9eeca106725	389	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	122:f9eeca106725	390	/**
Kojto	122:f9eeca106725	391	* @}
Kojto	122:f9eeca106725	392	*/
Kojto	122:f9eeca106725	393
Kojto	122:f9eeca106725	394	/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
Kojto	122:f9eeca106725	395	* @brief Peripheral Control functions
Kojto	122:f9eeca106725	396	* @{
Kojto	122:f9eeca106725	397	*/
Kojto	122:f9eeca106725	398	/* Extended Control functions ************************************************/
Kojto	122:f9eeca106725	399	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto	122:f9eeca106725	400	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto	122:f9eeca106725	401	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto	122:f9eeca106725	402	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef htim, TIM_MasterConfigTypeDef sMasterConfig);
Kojto	122:f9eeca106725	403	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef htim, TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig);
Kojto	122:f9eeca106725	404	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef sBreakInputConfig);
Kojto	122:f9eeca106725	405	HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
Kojto	122:f9eeca106725	406	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
Kojto	122:f9eeca106725	407
Kojto	122:f9eeca106725	408	/**
Kojto	122:f9eeca106725	409	* @}
Kojto	122:f9eeca106725	410	*/
Kojto	122:f9eeca106725	411
Kojto	122:f9eeca106725	412	/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
Kojto	122:f9eeca106725	413	* @brief Extended Callbacks functions
Kojto	122:f9eeca106725	414	* @{
Kojto	122:f9eeca106725	415	*/
Kojto	122:f9eeca106725	416	/* Extended Callback **********************************************************/
Kojto	122:f9eeca106725	417	void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	418	void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	419	/**
Kojto	122:f9eeca106725	420	* @}
Kojto	122:f9eeca106725	421	*/
Kojto	122:f9eeca106725	422
Kojto	122:f9eeca106725	423	/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
Kojto	122:f9eeca106725	424	* @brief Extended Peripheral State functions
Kojto	122:f9eeca106725	425	* @{
Kojto	122:f9eeca106725	426	*/
Kojto	122:f9eeca106725	427	/* Extended Peripheral State functions ***************************************/
Kojto	122:f9eeca106725	428	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	429	/**
Kojto	122:f9eeca106725	430	* @}
Kojto	122:f9eeca106725	431	*/
Kojto	122:f9eeca106725	432
Kojto	122:f9eeca106725	433	/**
Kojto	122:f9eeca106725	434	* @}
AnnaBridge	145:64910690c574	435	*/
Kojto	122:f9eeca106725	436	/* End of exported functions -------------------------------------------------*/
Kojto	122:f9eeca106725	437
Kojto	122:f9eeca106725	438	/* Private functions----------------------------------------------------------*/
Kojto	122:f9eeca106725	439	/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
Kojto	122:f9eeca106725	440	* @{
Kojto	122:f9eeca106725	441	*/
Kojto	122:f9eeca106725	442	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
Kojto	122:f9eeca106725	443	/**
Kojto	122:f9eeca106725	444	* @}
AnnaBridge	145:64910690c574	445	*/
Kojto	122:f9eeca106725	446	/* End of private functions --------------------------------------------------*/
Kojto	122:f9eeca106725	447
Kojto	122:f9eeca106725	448	/**
Kojto	122:f9eeca106725	449	* @}
AnnaBridge	145:64910690c574	450	*/
Kojto	122:f9eeca106725	451
Kojto	122:f9eeca106725	452	/**
Kojto	122:f9eeca106725	453	* @}
Kojto	122:f9eeca106725	454	*/
Kojto	122:f9eeca106725	455
Kojto	122:f9eeca106725	456	#ifdef __cplusplus
Kojto	122:f9eeca106725	457	}
Kojto	122:f9eeca106725	458	#endif
Kojto	122:f9eeca106725	459
Kojto	122:f9eeca106725	460
Kojto	122:f9eeca106725	461	#endif /* __STM32L4xx_HAL_TIM_EX_H */
Kojto	122:f9eeca106725	462
Kojto	122:f9eeca106725	463	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/