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TARGET_NUCLEO_F207ZG/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_pwr.h@145:64910690c574, 2017-06-21 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Jun 21 17:31:38 2017 +0100
- Revision:
- 145:64910690c574
Release 145 of the mbed library.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 145:64910690c574 | 1 | /** |
AnnaBridge | 145:64910690c574 | 2 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 3 | * @file stm32f2xx_ll_pwr.h |
AnnaBridge | 145:64910690c574 | 4 | * @author MCD Application Team |
AnnaBridge | 145:64910690c574 | 5 | * @version V1.2.1 |
AnnaBridge | 145:64910690c574 | 6 | * @date 14-April-2017 |
AnnaBridge | 145:64910690c574 | 7 | * @brief Header file of PWR LL module. |
AnnaBridge | 145:64910690c574 | 8 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 9 | * @attention |
AnnaBridge | 145:64910690c574 | 10 | * |
AnnaBridge | 145:64910690c574 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 145:64910690c574 | 12 | * |
AnnaBridge | 145:64910690c574 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 145:64910690c574 | 14 | * are permitted provided that the following conditions are met: |
AnnaBridge | 145:64910690c574 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 145:64910690c574 | 16 | * this list of conditions and the following disclaimer. |
AnnaBridge | 145:64910690c574 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 145:64910690c574 | 18 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 145:64910690c574 | 19 | * and/or other materials provided with the distribution. |
AnnaBridge | 145:64910690c574 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 145:64910690c574 | 21 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 145:64910690c574 | 22 | * without specific prior written permission. |
AnnaBridge | 145:64910690c574 | 23 | * |
AnnaBridge | 145:64910690c574 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 145:64910690c574 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 145:64910690c574 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 145:64910690c574 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 145:64910690c574 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 145:64910690c574 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 145:64910690c574 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 145:64910690c574 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 145:64910690c574 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 145:64910690c574 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 145:64910690c574 | 34 | * |
AnnaBridge | 145:64910690c574 | 35 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 36 | */ |
AnnaBridge | 145:64910690c574 | 37 | |
AnnaBridge | 145:64910690c574 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 39 | #ifndef __STM32F2xx_LL_PWR_H |
AnnaBridge | 145:64910690c574 | 40 | #define __STM32F2xx_LL_PWR_H |
AnnaBridge | 145:64910690c574 | 41 | |
AnnaBridge | 145:64910690c574 | 42 | #ifdef __cplusplus |
AnnaBridge | 145:64910690c574 | 43 | extern "C" { |
AnnaBridge | 145:64910690c574 | 44 | #endif |
AnnaBridge | 145:64910690c574 | 45 | |
AnnaBridge | 145:64910690c574 | 46 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 47 | #include "stm32f2xx.h" |
AnnaBridge | 145:64910690c574 | 48 | |
AnnaBridge | 145:64910690c574 | 49 | /** @addtogroup STM32F2xx_LL_Driver |
AnnaBridge | 145:64910690c574 | 50 | * @{ |
AnnaBridge | 145:64910690c574 | 51 | */ |
AnnaBridge | 145:64910690c574 | 52 | |
AnnaBridge | 145:64910690c574 | 53 | #if defined(PWR) |
AnnaBridge | 145:64910690c574 | 54 | |
AnnaBridge | 145:64910690c574 | 55 | /** @defgroup PWR_LL PWR |
AnnaBridge | 145:64910690c574 | 56 | * @{ |
AnnaBridge | 145:64910690c574 | 57 | */ |
AnnaBridge | 145:64910690c574 | 58 | |
AnnaBridge | 145:64910690c574 | 59 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 60 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 61 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 62 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 63 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 64 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 65 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
AnnaBridge | 145:64910690c574 | 66 | * @{ |
AnnaBridge | 145:64910690c574 | 67 | */ |
AnnaBridge | 145:64910690c574 | 68 | |
AnnaBridge | 145:64910690c574 | 69 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
AnnaBridge | 145:64910690c574 | 70 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
AnnaBridge | 145:64910690c574 | 71 | * @{ |
AnnaBridge | 145:64910690c574 | 72 | */ |
AnnaBridge | 145:64910690c574 | 73 | #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
AnnaBridge | 145:64910690c574 | 74 | #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
AnnaBridge | 145:64910690c574 | 75 | /** |
AnnaBridge | 145:64910690c574 | 76 | * @} |
AnnaBridge | 145:64910690c574 | 77 | */ |
AnnaBridge | 145:64910690c574 | 78 | |
AnnaBridge | 145:64910690c574 | 79 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 145:64910690c574 | 80 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
AnnaBridge | 145:64910690c574 | 81 | * @{ |
AnnaBridge | 145:64910690c574 | 82 | */ |
AnnaBridge | 145:64910690c574 | 83 | #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
AnnaBridge | 145:64910690c574 | 84 | #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
AnnaBridge | 145:64910690c574 | 85 | #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
AnnaBridge | 145:64910690c574 | 86 | #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */ |
AnnaBridge | 145:64910690c574 | 87 | /** |
AnnaBridge | 145:64910690c574 | 88 | * @} |
AnnaBridge | 145:64910690c574 | 89 | */ |
AnnaBridge | 145:64910690c574 | 90 | |
AnnaBridge | 145:64910690c574 | 91 | |
AnnaBridge | 145:64910690c574 | 92 | /** @defgroup PWR_LL_EC_MODE_PWR Mode Power |
AnnaBridge | 145:64910690c574 | 93 | * @{ |
AnnaBridge | 145:64910690c574 | 94 | */ |
AnnaBridge | 145:64910690c574 | 95 | #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ |
AnnaBridge | 145:64910690c574 | 96 | #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (ith low power regulator ON) when the CPU enters deepsleep */ |
AnnaBridge | 145:64910690c574 | 97 | #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
AnnaBridge | 145:64910690c574 | 98 | /** |
AnnaBridge | 145:64910690c574 | 99 | * @} |
AnnaBridge | 145:64910690c574 | 100 | */ |
AnnaBridge | 145:64910690c574 | 101 | |
AnnaBridge | 145:64910690c574 | 102 | /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode |
AnnaBridge | 145:64910690c574 | 103 | * @{ |
AnnaBridge | 145:64910690c574 | 104 | */ |
AnnaBridge | 145:64910690c574 | 105 | #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage regulator in main mode during deepsleep mode */ |
AnnaBridge | 145:64910690c574 | 106 | #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode */ |
AnnaBridge | 145:64910690c574 | 107 | /** |
AnnaBridge | 145:64910690c574 | 108 | * @} |
AnnaBridge | 145:64910690c574 | 109 | */ |
AnnaBridge | 145:64910690c574 | 110 | |
AnnaBridge | 145:64910690c574 | 111 | /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level |
AnnaBridge | 145:64910690c574 | 112 | * @{ |
AnnaBridge | 145:64910690c574 | 113 | */ |
AnnaBridge | 145:64910690c574 | 114 | #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */ |
AnnaBridge | 145:64910690c574 | 115 | #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */ |
AnnaBridge | 145:64910690c574 | 116 | #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */ |
AnnaBridge | 145:64910690c574 | 117 | #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
AnnaBridge | 145:64910690c574 | 118 | #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */ |
AnnaBridge | 145:64910690c574 | 119 | #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */ |
AnnaBridge | 145:64910690c574 | 120 | #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */ |
AnnaBridge | 145:64910690c574 | 121 | #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */ |
AnnaBridge | 145:64910690c574 | 122 | /** |
AnnaBridge | 145:64910690c574 | 123 | * @} |
AnnaBridge | 145:64910690c574 | 124 | */ |
AnnaBridge | 145:64910690c574 | 125 | /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins |
AnnaBridge | 145:64910690c574 | 126 | * @{ |
AnnaBridge | 145:64910690c574 | 127 | */ |
AnnaBridge | 145:64910690c574 | 128 | #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */ |
AnnaBridge | 145:64910690c574 | 129 | /** |
AnnaBridge | 145:64910690c574 | 130 | * @} |
AnnaBridge | 145:64910690c574 | 131 | */ |
AnnaBridge | 145:64910690c574 | 132 | |
AnnaBridge | 145:64910690c574 | 133 | /** |
AnnaBridge | 145:64910690c574 | 134 | * @} |
AnnaBridge | 145:64910690c574 | 135 | */ |
AnnaBridge | 145:64910690c574 | 136 | |
AnnaBridge | 145:64910690c574 | 137 | |
AnnaBridge | 145:64910690c574 | 138 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 139 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
AnnaBridge | 145:64910690c574 | 140 | * @{ |
AnnaBridge | 145:64910690c574 | 141 | */ |
AnnaBridge | 145:64910690c574 | 142 | |
AnnaBridge | 145:64910690c574 | 143 | /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros |
AnnaBridge | 145:64910690c574 | 144 | * @{ |
AnnaBridge | 145:64910690c574 | 145 | */ |
AnnaBridge | 145:64910690c574 | 146 | |
AnnaBridge | 145:64910690c574 | 147 | /** |
AnnaBridge | 145:64910690c574 | 148 | * @brief Write a value in PWR register |
AnnaBridge | 145:64910690c574 | 149 | * @param __REG__ Register to be written |
AnnaBridge | 145:64910690c574 | 150 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 145:64910690c574 | 151 | * @retval None |
AnnaBridge | 145:64910690c574 | 152 | */ |
AnnaBridge | 145:64910690c574 | 153 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
AnnaBridge | 145:64910690c574 | 154 | |
AnnaBridge | 145:64910690c574 | 155 | /** |
AnnaBridge | 145:64910690c574 | 156 | * @brief Read a value in PWR register |
AnnaBridge | 145:64910690c574 | 157 | * @param __REG__ Register to be read |
AnnaBridge | 145:64910690c574 | 158 | * @retval Register value |
AnnaBridge | 145:64910690c574 | 159 | */ |
AnnaBridge | 145:64910690c574 | 160 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
AnnaBridge | 145:64910690c574 | 161 | /** |
AnnaBridge | 145:64910690c574 | 162 | * @} |
AnnaBridge | 145:64910690c574 | 163 | */ |
AnnaBridge | 145:64910690c574 | 164 | |
AnnaBridge | 145:64910690c574 | 165 | /** |
AnnaBridge | 145:64910690c574 | 166 | * @} |
AnnaBridge | 145:64910690c574 | 167 | */ |
AnnaBridge | 145:64910690c574 | 168 | |
AnnaBridge | 145:64910690c574 | 169 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 170 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
AnnaBridge | 145:64910690c574 | 171 | * @{ |
AnnaBridge | 145:64910690c574 | 172 | */ |
AnnaBridge | 145:64910690c574 | 173 | |
AnnaBridge | 145:64910690c574 | 174 | /** @defgroup PWR_LL_EF_Configuration Configuration |
AnnaBridge | 145:64910690c574 | 175 | * @{ |
AnnaBridge | 145:64910690c574 | 176 | */ |
AnnaBridge | 145:64910690c574 | 177 | /** |
AnnaBridge | 145:64910690c574 | 178 | * @brief Enable the Flash Power Down in Stop Mode |
AnnaBridge | 145:64910690c574 | 179 | * @rmtoll CR FPDS LL_PWR_EnableFlashPowerDown |
AnnaBridge | 145:64910690c574 | 180 | * @retval None |
AnnaBridge | 145:64910690c574 | 181 | */ |
AnnaBridge | 145:64910690c574 | 182 | __STATIC_INLINE void LL_PWR_EnableFlashPowerDown(void) |
AnnaBridge | 145:64910690c574 | 183 | { |
AnnaBridge | 145:64910690c574 | 184 | SET_BIT(PWR->CR, PWR_CR_FPDS); |
AnnaBridge | 145:64910690c574 | 185 | } |
AnnaBridge | 145:64910690c574 | 186 | |
AnnaBridge | 145:64910690c574 | 187 | /** |
AnnaBridge | 145:64910690c574 | 188 | * @brief Disable the Flash Power Down in Stop Mode |
AnnaBridge | 145:64910690c574 | 189 | * @rmtoll CR FPDS LL_PWR_DisableFlashPowerDown |
AnnaBridge | 145:64910690c574 | 190 | * @retval None |
AnnaBridge | 145:64910690c574 | 191 | */ |
AnnaBridge | 145:64910690c574 | 192 | __STATIC_INLINE void LL_PWR_DisableFlashPowerDown(void) |
AnnaBridge | 145:64910690c574 | 193 | { |
AnnaBridge | 145:64910690c574 | 194 | CLEAR_BIT(PWR->CR, PWR_CR_FPDS); |
AnnaBridge | 145:64910690c574 | 195 | } |
AnnaBridge | 145:64910690c574 | 196 | |
AnnaBridge | 145:64910690c574 | 197 | /** |
AnnaBridge | 145:64910690c574 | 198 | * @brief Check if the Flash Power Down in Stop Mode is enabled |
AnnaBridge | 145:64910690c574 | 199 | * @rmtoll CR FPDS LL_PWR_IsEnabledFlashPowerDown |
AnnaBridge | 145:64910690c574 | 200 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 201 | */ |
AnnaBridge | 145:64910690c574 | 202 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledFlashPowerDown(void) |
AnnaBridge | 145:64910690c574 | 203 | { |
AnnaBridge | 145:64910690c574 | 204 | return (READ_BIT(PWR->CR, PWR_CR_FPDS) == (PWR_CR_FPDS)); |
AnnaBridge | 145:64910690c574 | 205 | } |
AnnaBridge | 145:64910690c574 | 206 | |
AnnaBridge | 145:64910690c574 | 207 | /** |
AnnaBridge | 145:64910690c574 | 208 | * @brief Enable access to the backup domain |
AnnaBridge | 145:64910690c574 | 209 | * @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
AnnaBridge | 145:64910690c574 | 210 | * @retval None |
AnnaBridge | 145:64910690c574 | 211 | */ |
AnnaBridge | 145:64910690c574 | 212 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
AnnaBridge | 145:64910690c574 | 213 | { |
AnnaBridge | 145:64910690c574 | 214 | SET_BIT(PWR->CR, PWR_CR_DBP); |
AnnaBridge | 145:64910690c574 | 215 | } |
AnnaBridge | 145:64910690c574 | 216 | |
AnnaBridge | 145:64910690c574 | 217 | /** |
AnnaBridge | 145:64910690c574 | 218 | * @brief Disable access to the backup domain |
AnnaBridge | 145:64910690c574 | 219 | * @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
AnnaBridge | 145:64910690c574 | 220 | * @retval None |
AnnaBridge | 145:64910690c574 | 221 | */ |
AnnaBridge | 145:64910690c574 | 222 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
AnnaBridge | 145:64910690c574 | 223 | { |
AnnaBridge | 145:64910690c574 | 224 | CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
AnnaBridge | 145:64910690c574 | 225 | } |
AnnaBridge | 145:64910690c574 | 226 | |
AnnaBridge | 145:64910690c574 | 227 | /** |
AnnaBridge | 145:64910690c574 | 228 | * @brief Check if the backup domain is enabled |
AnnaBridge | 145:64910690c574 | 229 | * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
AnnaBridge | 145:64910690c574 | 230 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 231 | */ |
AnnaBridge | 145:64910690c574 | 232 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
AnnaBridge | 145:64910690c574 | 233 | { |
AnnaBridge | 145:64910690c574 | 234 | return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); |
AnnaBridge | 145:64910690c574 | 235 | } |
AnnaBridge | 145:64910690c574 | 236 | /** |
AnnaBridge | 145:64910690c574 | 237 | * @brief Enable the backup regulator |
AnnaBridge | 145:64910690c574 | 238 | * @rmtoll CSR BRE LL_PWR_EnableBkUpRegulator |
AnnaBridge | 145:64910690c574 | 239 | * @note The BRE bit of the PWR_CSR register is protected against parasitic write access. |
AnnaBridge | 145:64910690c574 | 240 | * The LL_PWR_EnableBkUpAccess() must be called before using this API. |
AnnaBridge | 145:64910690c574 | 241 | * @retval None |
AnnaBridge | 145:64910690c574 | 242 | */ |
AnnaBridge | 145:64910690c574 | 243 | __STATIC_INLINE void LL_PWR_EnableBkUpRegulator(void) |
AnnaBridge | 145:64910690c574 | 244 | { |
AnnaBridge | 145:64910690c574 | 245 | SET_BIT(PWR->CSR, PWR_CSR_BRE); |
AnnaBridge | 145:64910690c574 | 246 | } |
AnnaBridge | 145:64910690c574 | 247 | |
AnnaBridge | 145:64910690c574 | 248 | /** |
AnnaBridge | 145:64910690c574 | 249 | * @brief Disable the backup Regulator |
AnnaBridge | 145:64910690c574 | 250 | * @rmtoll CSR BRE LL_PWR_DisableBkUpRegulator |
AnnaBridge | 145:64910690c574 | 251 | * @note The BRE bit of the PWR_CSR register is protected against parasitic write access. |
AnnaBridge | 145:64910690c574 | 252 | * The LL_PWR_EnableBkUpAccess() must be called before using this API. |
AnnaBridge | 145:64910690c574 | 253 | * @retval None |
AnnaBridge | 145:64910690c574 | 254 | */ |
AnnaBridge | 145:64910690c574 | 255 | __STATIC_INLINE void LL_PWR_DisableBkUpRegulator(void) |
AnnaBridge | 145:64910690c574 | 256 | { |
AnnaBridge | 145:64910690c574 | 257 | CLEAR_BIT(PWR->CSR, PWR_CSR_BRE); |
AnnaBridge | 145:64910690c574 | 258 | } |
AnnaBridge | 145:64910690c574 | 259 | |
AnnaBridge | 145:64910690c574 | 260 | /** |
AnnaBridge | 145:64910690c574 | 261 | * @brief Check if the backup Regulator is enabled |
AnnaBridge | 145:64910690c574 | 262 | * @rmtoll CSR BRE LL_PWR_IsEnabledBkUpRegulator |
AnnaBridge | 145:64910690c574 | 263 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 264 | */ |
AnnaBridge | 145:64910690c574 | 265 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpRegulator(void) |
AnnaBridge | 145:64910690c574 | 266 | { |
AnnaBridge | 145:64910690c574 | 267 | return (READ_BIT(PWR->CSR, PWR_CSR_BRE) == (PWR_CSR_BRE)); |
AnnaBridge | 145:64910690c574 | 268 | } |
AnnaBridge | 145:64910690c574 | 269 | |
AnnaBridge | 145:64910690c574 | 270 | /** |
AnnaBridge | 145:64910690c574 | 271 | * @brief Set voltage regulator mode during deep sleep mode |
AnnaBridge | 145:64910690c574 | 272 | * @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
AnnaBridge | 145:64910690c574 | 273 | * @param RegulMode This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 274 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
AnnaBridge | 145:64910690c574 | 275 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
AnnaBridge | 145:64910690c574 | 276 | * @retval None |
AnnaBridge | 145:64910690c574 | 277 | */ |
AnnaBridge | 145:64910690c574 | 278 | __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
AnnaBridge | 145:64910690c574 | 279 | { |
AnnaBridge | 145:64910690c574 | 280 | MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
AnnaBridge | 145:64910690c574 | 281 | } |
AnnaBridge | 145:64910690c574 | 282 | |
AnnaBridge | 145:64910690c574 | 283 | /** |
AnnaBridge | 145:64910690c574 | 284 | * @brief Get voltage regulator mode during deep sleep mode |
AnnaBridge | 145:64910690c574 | 285 | * @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
AnnaBridge | 145:64910690c574 | 286 | * @retval Returned value can be one of the following values: |
AnnaBridge | 145:64910690c574 | 287 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
AnnaBridge | 145:64910690c574 | 288 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
AnnaBridge | 145:64910690c574 | 289 | */ |
AnnaBridge | 145:64910690c574 | 290 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
AnnaBridge | 145:64910690c574 | 291 | { |
AnnaBridge | 145:64910690c574 | 292 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
AnnaBridge | 145:64910690c574 | 293 | } |
AnnaBridge | 145:64910690c574 | 294 | |
AnnaBridge | 145:64910690c574 | 295 | /** |
AnnaBridge | 145:64910690c574 | 296 | * @brief Set power down mode when CPU enters deepsleep |
AnnaBridge | 145:64910690c574 | 297 | * @rmtoll CR PDDS LL_PWR_SetPowerMode\n |
AnnaBridge | 145:64910690c574 | 298 | * @rmtoll CR LPDS LL_PWR_SetPowerMode |
AnnaBridge | 145:64910690c574 | 299 | * @param PDMode This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 300 | * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
AnnaBridge | 145:64910690c574 | 301 | * @arg @ref LL_PWR_MODE_STOP_LPREGU |
AnnaBridge | 145:64910690c574 | 302 | * @arg @ref LL_PWR_MODE_STANDBY |
AnnaBridge | 145:64910690c574 | 303 | * @retval None |
AnnaBridge | 145:64910690c574 | 304 | */ |
AnnaBridge | 145:64910690c574 | 305 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
AnnaBridge | 145:64910690c574 | 306 | { |
AnnaBridge | 145:64910690c574 | 307 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode); |
AnnaBridge | 145:64910690c574 | 308 | } |
AnnaBridge | 145:64910690c574 | 309 | |
AnnaBridge | 145:64910690c574 | 310 | /** |
AnnaBridge | 145:64910690c574 | 311 | * @brief Get power down mode when CPU enters deepsleep |
AnnaBridge | 145:64910690c574 | 312 | * @rmtoll CR PDDS LL_PWR_GetPowerMode\n |
AnnaBridge | 145:64910690c574 | 313 | * @rmtoll CR LPDS LL_PWR_GetPowerMode |
AnnaBridge | 145:64910690c574 | 314 | * @retval Returned value can be one of the following values: |
AnnaBridge | 145:64910690c574 | 315 | * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
AnnaBridge | 145:64910690c574 | 316 | * @arg @ref LL_PWR_MODE_STOP_LPREGU |
AnnaBridge | 145:64910690c574 | 317 | * @arg @ref LL_PWR_MODE_STANDBY |
AnnaBridge | 145:64910690c574 | 318 | */ |
AnnaBridge | 145:64910690c574 | 319 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
AnnaBridge | 145:64910690c574 | 320 | { |
AnnaBridge | 145:64910690c574 | 321 | return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS))); |
AnnaBridge | 145:64910690c574 | 322 | } |
AnnaBridge | 145:64910690c574 | 323 | |
AnnaBridge | 145:64910690c574 | 324 | /** |
AnnaBridge | 145:64910690c574 | 325 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
AnnaBridge | 145:64910690c574 | 326 | * @rmtoll CR PLS LL_PWR_SetPVDLevel |
AnnaBridge | 145:64910690c574 | 327 | * @param PVDLevel This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 328 | * @arg @ref LL_PWR_PVDLEVEL_0 |
AnnaBridge | 145:64910690c574 | 329 | * @arg @ref LL_PWR_PVDLEVEL_1 |
AnnaBridge | 145:64910690c574 | 330 | * @arg @ref LL_PWR_PVDLEVEL_2 |
AnnaBridge | 145:64910690c574 | 331 | * @arg @ref LL_PWR_PVDLEVEL_3 |
AnnaBridge | 145:64910690c574 | 332 | * @arg @ref LL_PWR_PVDLEVEL_4 |
AnnaBridge | 145:64910690c574 | 333 | * @arg @ref LL_PWR_PVDLEVEL_5 |
AnnaBridge | 145:64910690c574 | 334 | * @arg @ref LL_PWR_PVDLEVEL_6 |
AnnaBridge | 145:64910690c574 | 335 | * @arg @ref LL_PWR_PVDLEVEL_7 |
AnnaBridge | 145:64910690c574 | 336 | * @retval None |
AnnaBridge | 145:64910690c574 | 337 | */ |
AnnaBridge | 145:64910690c574 | 338 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
AnnaBridge | 145:64910690c574 | 339 | { |
AnnaBridge | 145:64910690c574 | 340 | MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
AnnaBridge | 145:64910690c574 | 341 | } |
AnnaBridge | 145:64910690c574 | 342 | |
AnnaBridge | 145:64910690c574 | 343 | /** |
AnnaBridge | 145:64910690c574 | 344 | * @brief Get the voltage threshold detection |
AnnaBridge | 145:64910690c574 | 345 | * @rmtoll CR PLS LL_PWR_GetPVDLevel |
AnnaBridge | 145:64910690c574 | 346 | * @retval Returned value can be one of the following values: |
AnnaBridge | 145:64910690c574 | 347 | * @arg @ref LL_PWR_PVDLEVEL_0 |
AnnaBridge | 145:64910690c574 | 348 | * @arg @ref LL_PWR_PVDLEVEL_1 |
AnnaBridge | 145:64910690c574 | 349 | * @arg @ref LL_PWR_PVDLEVEL_2 |
AnnaBridge | 145:64910690c574 | 350 | * @arg @ref LL_PWR_PVDLEVEL_3 |
AnnaBridge | 145:64910690c574 | 351 | * @arg @ref LL_PWR_PVDLEVEL_4 |
AnnaBridge | 145:64910690c574 | 352 | * @arg @ref LL_PWR_PVDLEVEL_5 |
AnnaBridge | 145:64910690c574 | 353 | * @arg @ref LL_PWR_PVDLEVEL_6 |
AnnaBridge | 145:64910690c574 | 354 | * @arg @ref LL_PWR_PVDLEVEL_7 |
AnnaBridge | 145:64910690c574 | 355 | */ |
AnnaBridge | 145:64910690c574 | 356 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
AnnaBridge | 145:64910690c574 | 357 | { |
AnnaBridge | 145:64910690c574 | 358 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
AnnaBridge | 145:64910690c574 | 359 | } |
AnnaBridge | 145:64910690c574 | 360 | |
AnnaBridge | 145:64910690c574 | 361 | /** |
AnnaBridge | 145:64910690c574 | 362 | * @brief Enable Power Voltage Detector |
AnnaBridge | 145:64910690c574 | 363 | * @rmtoll CR PVDE LL_PWR_EnablePVD |
AnnaBridge | 145:64910690c574 | 364 | * @retval None |
AnnaBridge | 145:64910690c574 | 365 | */ |
AnnaBridge | 145:64910690c574 | 366 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
AnnaBridge | 145:64910690c574 | 367 | { |
AnnaBridge | 145:64910690c574 | 368 | SET_BIT(PWR->CR, PWR_CR_PVDE); |
AnnaBridge | 145:64910690c574 | 369 | } |
AnnaBridge | 145:64910690c574 | 370 | |
AnnaBridge | 145:64910690c574 | 371 | /** |
AnnaBridge | 145:64910690c574 | 372 | * @brief Disable Power Voltage Detector |
AnnaBridge | 145:64910690c574 | 373 | * @rmtoll CR PVDE LL_PWR_DisablePVD |
AnnaBridge | 145:64910690c574 | 374 | * @retval None |
AnnaBridge | 145:64910690c574 | 375 | */ |
AnnaBridge | 145:64910690c574 | 376 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
AnnaBridge | 145:64910690c574 | 377 | { |
AnnaBridge | 145:64910690c574 | 378 | CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
AnnaBridge | 145:64910690c574 | 379 | } |
AnnaBridge | 145:64910690c574 | 380 | |
AnnaBridge | 145:64910690c574 | 381 | /** |
AnnaBridge | 145:64910690c574 | 382 | * @brief Check if Power Voltage Detector is enabled |
AnnaBridge | 145:64910690c574 | 383 | * @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
AnnaBridge | 145:64910690c574 | 384 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 385 | */ |
AnnaBridge | 145:64910690c574 | 386 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
AnnaBridge | 145:64910690c574 | 387 | { |
AnnaBridge | 145:64910690c574 | 388 | return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); |
AnnaBridge | 145:64910690c574 | 389 | } |
AnnaBridge | 145:64910690c574 | 390 | |
AnnaBridge | 145:64910690c574 | 391 | /** |
AnnaBridge | 145:64910690c574 | 392 | * @brief Enable the WakeUp PINx functionality |
AnnaBridge | 145:64910690c574 | 393 | * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin |
AnnaBridge | 145:64910690c574 | 394 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 395 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 145:64910690c574 | 396 | * @retval None |
AnnaBridge | 145:64910690c574 | 397 | */ |
AnnaBridge | 145:64910690c574 | 398 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 145:64910690c574 | 399 | { |
AnnaBridge | 145:64910690c574 | 400 | SET_BIT(PWR->CSR, WakeUpPin); |
AnnaBridge | 145:64910690c574 | 401 | } |
AnnaBridge | 145:64910690c574 | 402 | |
AnnaBridge | 145:64910690c574 | 403 | /** |
AnnaBridge | 145:64910690c574 | 404 | * @brief Disable the WakeUp PINx functionality |
AnnaBridge | 145:64910690c574 | 405 | * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin |
AnnaBridge | 145:64910690c574 | 406 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 407 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 145:64910690c574 | 408 | * @retval None |
AnnaBridge | 145:64910690c574 | 409 | */ |
AnnaBridge | 145:64910690c574 | 410 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 145:64910690c574 | 411 | { |
AnnaBridge | 145:64910690c574 | 412 | CLEAR_BIT(PWR->CSR, WakeUpPin); |
AnnaBridge | 145:64910690c574 | 413 | } |
AnnaBridge | 145:64910690c574 | 414 | |
AnnaBridge | 145:64910690c574 | 415 | /** |
AnnaBridge | 145:64910690c574 | 416 | * @brief Check if the WakeUp PINx functionality is enabled |
AnnaBridge | 145:64910690c574 | 417 | * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin |
AnnaBridge | 145:64910690c574 | 418 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 145:64910690c574 | 419 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 145:64910690c574 | 420 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 421 | */ |
AnnaBridge | 145:64910690c574 | 422 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 145:64910690c574 | 423 | { |
AnnaBridge | 145:64910690c574 | 424 | return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); |
AnnaBridge | 145:64910690c574 | 425 | } |
AnnaBridge | 145:64910690c574 | 426 | |
AnnaBridge | 145:64910690c574 | 427 | |
AnnaBridge | 145:64910690c574 | 428 | /** |
AnnaBridge | 145:64910690c574 | 429 | * @} |
AnnaBridge | 145:64910690c574 | 430 | */ |
AnnaBridge | 145:64910690c574 | 431 | |
AnnaBridge | 145:64910690c574 | 432 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
AnnaBridge | 145:64910690c574 | 433 | * @{ |
AnnaBridge | 145:64910690c574 | 434 | */ |
AnnaBridge | 145:64910690c574 | 435 | |
AnnaBridge | 145:64910690c574 | 436 | /** |
AnnaBridge | 145:64910690c574 | 437 | * @brief Get Wake-up Flag |
AnnaBridge | 145:64910690c574 | 438 | * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
AnnaBridge | 145:64910690c574 | 439 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 440 | */ |
AnnaBridge | 145:64910690c574 | 441 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
AnnaBridge | 145:64910690c574 | 442 | { |
AnnaBridge | 145:64910690c574 | 443 | return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); |
AnnaBridge | 145:64910690c574 | 444 | } |
AnnaBridge | 145:64910690c574 | 445 | |
AnnaBridge | 145:64910690c574 | 446 | /** |
AnnaBridge | 145:64910690c574 | 447 | * @brief Get Standby Flag |
AnnaBridge | 145:64910690c574 | 448 | * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
AnnaBridge | 145:64910690c574 | 449 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 450 | */ |
AnnaBridge | 145:64910690c574 | 451 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
AnnaBridge | 145:64910690c574 | 452 | { |
AnnaBridge | 145:64910690c574 | 453 | return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); |
AnnaBridge | 145:64910690c574 | 454 | } |
AnnaBridge | 145:64910690c574 | 455 | |
AnnaBridge | 145:64910690c574 | 456 | /** |
AnnaBridge | 145:64910690c574 | 457 | * @brief Get Backup regulator ready Flag |
AnnaBridge | 145:64910690c574 | 458 | * @rmtoll CSR BRR LL_PWR_IsActiveFlag_BRR |
AnnaBridge | 145:64910690c574 | 459 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 460 | */ |
AnnaBridge | 145:64910690c574 | 461 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_BRR(void) |
AnnaBridge | 145:64910690c574 | 462 | { |
AnnaBridge | 145:64910690c574 | 463 | return (READ_BIT(PWR->CSR, PWR_CSR_BRR) == (PWR_CSR_BRR)); |
AnnaBridge | 145:64910690c574 | 464 | } |
AnnaBridge | 145:64910690c574 | 465 | /** |
AnnaBridge | 145:64910690c574 | 466 | * @brief Indicate whether VDD voltage is below the selected PVD threshold |
AnnaBridge | 145:64910690c574 | 467 | * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
AnnaBridge | 145:64910690c574 | 468 | * @retval State of bit (1 or 0). |
AnnaBridge | 145:64910690c574 | 469 | */ |
AnnaBridge | 145:64910690c574 | 470 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
AnnaBridge | 145:64910690c574 | 471 | { |
AnnaBridge | 145:64910690c574 | 472 | return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); |
AnnaBridge | 145:64910690c574 | 473 | } |
AnnaBridge | 145:64910690c574 | 474 | |
AnnaBridge | 145:64910690c574 | 475 | /** |
AnnaBridge | 145:64910690c574 | 476 | * @brief Clear Standby Flag |
AnnaBridge | 145:64910690c574 | 477 | * @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
AnnaBridge | 145:64910690c574 | 478 | * @retval None |
AnnaBridge | 145:64910690c574 | 479 | */ |
AnnaBridge | 145:64910690c574 | 480 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
AnnaBridge | 145:64910690c574 | 481 | { |
AnnaBridge | 145:64910690c574 | 482 | SET_BIT(PWR->CR, PWR_CR_CSBF); |
AnnaBridge | 145:64910690c574 | 483 | } |
AnnaBridge | 145:64910690c574 | 484 | |
AnnaBridge | 145:64910690c574 | 485 | /** |
AnnaBridge | 145:64910690c574 | 486 | * @brief Clear Wake-up Flags |
AnnaBridge | 145:64910690c574 | 487 | * @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
AnnaBridge | 145:64910690c574 | 488 | * @retval None |
AnnaBridge | 145:64910690c574 | 489 | */ |
AnnaBridge | 145:64910690c574 | 490 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
AnnaBridge | 145:64910690c574 | 491 | { |
AnnaBridge | 145:64910690c574 | 492 | SET_BIT(PWR->CR, PWR_CR_CWUF); |
AnnaBridge | 145:64910690c574 | 493 | } |
AnnaBridge | 145:64910690c574 | 494 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 145:64910690c574 | 495 | /** @defgroup PWR_LL_EF_Init De-initialization function |
AnnaBridge | 145:64910690c574 | 496 | * @{ |
AnnaBridge | 145:64910690c574 | 497 | */ |
AnnaBridge | 145:64910690c574 | 498 | ErrorStatus LL_PWR_DeInit(void); |
AnnaBridge | 145:64910690c574 | 499 | /** |
AnnaBridge | 145:64910690c574 | 500 | * @} |
AnnaBridge | 145:64910690c574 | 501 | */ |
AnnaBridge | 145:64910690c574 | 502 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 145:64910690c574 | 503 | |
AnnaBridge | 145:64910690c574 | 504 | /** |
AnnaBridge | 145:64910690c574 | 505 | * @} |
AnnaBridge | 145:64910690c574 | 506 | */ |
AnnaBridge | 145:64910690c574 | 507 | |
AnnaBridge | 145:64910690c574 | 508 | /** |
AnnaBridge | 145:64910690c574 | 509 | * @} |
AnnaBridge | 145:64910690c574 | 510 | */ |
AnnaBridge | 145:64910690c574 | 511 | |
AnnaBridge | 145:64910690c574 | 512 | /** |
AnnaBridge | 145:64910690c574 | 513 | * @} |
AnnaBridge | 145:64910690c574 | 514 | */ |
AnnaBridge | 145:64910690c574 | 515 | |
AnnaBridge | 145:64910690c574 | 516 | #endif /* defined(PWR) */ |
AnnaBridge | 145:64910690c574 | 517 | |
AnnaBridge | 145:64910690c574 | 518 | /** |
AnnaBridge | 145:64910690c574 | 519 | * @} |
AnnaBridge | 145:64910690c574 | 520 | */ |
AnnaBridge | 145:64910690c574 | 521 | |
AnnaBridge | 145:64910690c574 | 522 | #ifdef __cplusplus |
AnnaBridge | 145:64910690c574 | 523 | } |
AnnaBridge | 145:64910690c574 | 524 | #endif |
AnnaBridge | 145:64910690c574 | 525 | |
AnnaBridge | 145:64910690c574 | 526 | #endif /* __STM32F2xx_LL_PWR_H */ |
AnnaBridge | 145:64910690c574 | 527 | |
AnnaBridge | 145:64910690c574 | 528 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |