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TARGET_DISCO_L475VG_IOT01A/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.h@145:64910690c574, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:31:38 2017 +0100
Revision:
145:64910690c574
Child:
161:aa5281ff4a02
Release 145 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 145:64910690c574 1 /**
AnnaBridge 145:64910690c574 2 ******************************************************************************
AnnaBridge 145:64910690c574 3 * @file stm32l4xx_hal_tim_ex.h
AnnaBridge 145:64910690c574 4 * @author MCD Application Team
AnnaBridge 145:64910690c574 5 * @version V1.7.1
AnnaBridge 145:64910690c574 6 * @date 21-April-2017
AnnaBridge 145:64910690c574 7 * @brief Header file of TIM HAL Extended module.
AnnaBridge 145:64910690c574 8 ******************************************************************************
AnnaBridge 145:64910690c574 9 * @attention
AnnaBridge 145:64910690c574 10 *
AnnaBridge 145:64910690c574 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 145:64910690c574 12 *
AnnaBridge 145:64910690c574 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 145:64910690c574 14 * are permitted provided that the following conditions are met:
AnnaBridge 145:64910690c574 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 145:64910690c574 16 * this list of conditions and the following disclaimer.
AnnaBridge 145:64910690c574 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 145:64910690c574 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 145:64910690c574 19 * and/or other materials provided with the distribution.
AnnaBridge 145:64910690c574 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 145:64910690c574 21 * may be used to endorse or promote products derived from this software
AnnaBridge 145:64910690c574 22 * without specific prior written permission.
AnnaBridge 145:64910690c574 23 *
AnnaBridge 145:64910690c574 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 145:64910690c574 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 145:64910690c574 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 145:64910690c574 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 145:64910690c574 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 145:64910690c574 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 145:64910690c574 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 145:64910690c574 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 145:64910690c574 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 145:64910690c574 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 145:64910690c574 34 *
AnnaBridge 145:64910690c574 35 ******************************************************************************
AnnaBridge 145:64910690c574 36 */
AnnaBridge 145:64910690c574 37
AnnaBridge 145:64910690c574 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 145:64910690c574 39 #ifndef __STM32L4xx_HAL_TIM_EX_H
AnnaBridge 145:64910690c574 40 #define __STM32L4xx_HAL_TIM_EX_H
AnnaBridge 145:64910690c574 41
AnnaBridge 145:64910690c574 42 #ifdef __cplusplus
AnnaBridge 145:64910690c574 43 extern "C" {
AnnaBridge 145:64910690c574 44 #endif
AnnaBridge 145:64910690c574 45
AnnaBridge 145:64910690c574 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 145:64910690c574 47 #include "stm32l4xx_hal_def.h"
AnnaBridge 145:64910690c574 48
AnnaBridge 145:64910690c574 49 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 145:64910690c574 50 * @{
AnnaBridge 145:64910690c574 51 */
AnnaBridge 145:64910690c574 52
AnnaBridge 145:64910690c574 53 /** @addtogroup TIMEx
AnnaBridge 145:64910690c574 54 * @{
AnnaBridge 145:64910690c574 55 */
AnnaBridge 145:64910690c574 56
AnnaBridge 145:64910690c574 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 145:64910690c574 58 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
AnnaBridge 145:64910690c574 59 * @{
AnnaBridge 145:64910690c574 60 */
AnnaBridge 145:64910690c574 61
AnnaBridge 145:64910690c574 62 /**
AnnaBridge 145:64910690c574 63 * @brief TIM Hall sensor Configuration Structure definition
AnnaBridge 145:64910690c574 64 */
AnnaBridge 145:64910690c574 65
AnnaBridge 145:64910690c574 66 typedef struct
AnnaBridge 145:64910690c574 67 {
AnnaBridge 145:64910690c574 68
AnnaBridge 145:64910690c574 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
AnnaBridge 145:64910690c574 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
AnnaBridge 145:64910690c574 71
AnnaBridge 145:64910690c574 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
AnnaBridge 145:64910690c574 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
AnnaBridge 145:64910690c574 74
AnnaBridge 145:64910690c574 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
AnnaBridge 145:64910690c574 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
AnnaBridge 145:64910690c574 77
AnnaBridge 145:64910690c574 78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
AnnaBridge 145:64910690c574 79 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
AnnaBridge 145:64910690c574 80 } TIM_HallSensor_InitTypeDef;
AnnaBridge 145:64910690c574 81
AnnaBridge 145:64910690c574 82 /**
AnnaBridge 145:64910690c574 83 * @brief TIM Break/Break2 input configuration
AnnaBridge 145:64910690c574 84 */
AnnaBridge 145:64910690c574 85 typedef struct {
AnnaBridge 145:64910690c574 86 uint32_t Source; /*!< Specifies the source of the timer break input.
AnnaBridge 145:64910690c574 87 This parameter can be a value of @ref TIMEx_Break_Input_Source */
AnnaBridge 145:64910690c574 88 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
AnnaBridge 145:64910690c574 89 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
AnnaBridge 145:64910690c574 90 uint32_t Polarity; /*!< Specifies the break input source polarity.
AnnaBridge 145:64910690c574 91 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
AnnaBridge 145:64910690c574 92 Not relevant when analog watchdog output of the DFSDM1 used as break input source */
AnnaBridge 145:64910690c574 93 } TIMEx_BreakInputConfigTypeDef;
AnnaBridge 145:64910690c574 94
AnnaBridge 145:64910690c574 95 /**
AnnaBridge 145:64910690c574 96 * @}
AnnaBridge 145:64910690c574 97 */
AnnaBridge 145:64910690c574 98 /* End of exported types -----------------------------------------------------*/
AnnaBridge 145:64910690c574 99
AnnaBridge 145:64910690c574 100 /* Exported constants --------------------------------------------------------*/
AnnaBridge 145:64910690c574 101 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
AnnaBridge 145:64910690c574 102 * @{
AnnaBridge 145:64910690c574 103 */
AnnaBridge 145:64910690c574 104
AnnaBridge 145:64910690c574 105 /** @defgroup TIMEx_Remap TIM Extended Remapping
AnnaBridge 145:64910690c574 106 * @{
AnnaBridge 145:64910690c574 107 */
AnnaBridge 145:64910690c574 108 #define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
AnnaBridge 145:64910690c574 109 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
AnnaBridge 145:64910690c574 110 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */
AnnaBridge 145:64910690c574 111 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
AnnaBridge 145:64910690c574 112 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 113 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 114 #define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
AnnaBridge 145:64910690c574 115 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */
AnnaBridge 145:64910690c574 116 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */
AnnaBridge 145:64910690c574 117 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
AnnaBridge 145:64910690c574 118 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 119 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 120 #define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 121 #define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */
AnnaBridge 145:64910690c574 122 #define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */
AnnaBridge 145:64910690c574 123 #define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */
AnnaBridge 145:64910690c574 124
AnnaBridge 145:64910690c574 125 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 126 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 127 #define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */
AnnaBridge 145:64910690c574 128 #define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */
AnnaBridge 145:64910690c574 129 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 130 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 131 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
AnnaBridge 145:64910690c574 132 defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
AnnaBridge 145:64910690c574 133 #define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */
AnnaBridge 145:64910690c574 134 #define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */
AnnaBridge 145:64910690c574 135 #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */
AnnaBridge 145:64910690c574 136 /* STM32L451xx || STM32L452xx || STM32L462xx */
AnnaBridge 145:64910690c574 137 #define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */
AnnaBridge 145:64910690c574 138 #define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */
AnnaBridge 145:64910690c574 139 #define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */
AnnaBridge 145:64910690c574 140 #define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */
AnnaBridge 145:64910690c574 141 #define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */
AnnaBridge 145:64910690c574 142 #define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */
AnnaBridge 145:64910690c574 143 #define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */
AnnaBridge 145:64910690c574 144 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
AnnaBridge 145:64910690c574 145
AnnaBridge 145:64910690c574 146 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
AnnaBridge 145:64910690c574 147 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 148 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 149 #define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 150 #define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */
AnnaBridge 145:64910690c574 151 #define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */
AnnaBridge 145:64910690c574 152 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
AnnaBridge 145:64910690c574 153 #define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */
AnnaBridge 145:64910690c574 154 #define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */
AnnaBridge 145:64910690c574 155 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
AnnaBridge 145:64910690c574 156 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 157 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 158
AnnaBridge 145:64910690c574 159 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 160 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 161 #define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
AnnaBridge 145:64910690c574 162 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
AnnaBridge 145:64910690c574 163 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */
AnnaBridge 145:64910690c574 164 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
AnnaBridge 145:64910690c574 165 #define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
AnnaBridge 145:64910690c574 166 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */
AnnaBridge 145:64910690c574 167 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */
AnnaBridge 145:64910690c574 168 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
AnnaBridge 145:64910690c574 169 #define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */
AnnaBridge 145:64910690c574 170 #define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */
AnnaBridge 145:64910690c574 171 #define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 172 #define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */
AnnaBridge 145:64910690c574 173 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 174 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 175
AnnaBridge 145:64910690c574 176 #define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 177 #define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */
AnnaBridge 145:64910690c574 178 #define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */
AnnaBridge 145:64910690c574 179 #define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge 145:64910690c574 180 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
AnnaBridge 145:64910690c574 181 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 182 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 183 #define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge 145:64910690c574 184 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
AnnaBridge 145:64910690c574 185 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 186 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 187 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 188 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 189 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
AnnaBridge 145:64910690c574 190 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 191 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 192
AnnaBridge 145:64910690c574 193 #define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 194 #define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */
AnnaBridge 145:64910690c574 195 #define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */
AnnaBridge 145:64910690c574 196 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
AnnaBridge 145:64910690c574 197 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
AnnaBridge 145:64910690c574 198 defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
AnnaBridge 145:64910690c574 199 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 200 #define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */
AnnaBridge 145:64910690c574 201 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */
AnnaBridge 145:64910690c574 202 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */
AnnaBridge 145:64910690c574 203 #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */
AnnaBridge 145:64910690c574 204 /* STM32L451xx || STM32L452xx || STM32L462xx || */
AnnaBridge 145:64910690c574 205 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 206
AnnaBridge 145:64910690c574 207 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 208 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 209 #define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */
AnnaBridge 145:64910690c574 210 #define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */
AnnaBridge 145:64910690c574 211 #define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */
AnnaBridge 145:64910690c574 212 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
AnnaBridge 145:64910690c574 213 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 214 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 215 /**
AnnaBridge 145:64910690c574 216 * @}
AnnaBridge 145:64910690c574 217 */
AnnaBridge 145:64910690c574 218
AnnaBridge 145:64910690c574 219 /** @defgroup TIMEx_Break_Input TIM Extended Break input
AnnaBridge 145:64910690c574 220 * @{
AnnaBridge 145:64910690c574 221 */
AnnaBridge 145:64910690c574 222 #define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */
AnnaBridge 145:64910690c574 223 #define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */
AnnaBridge 145:64910690c574 224 /**
AnnaBridge 145:64910690c574 225 * @}
AnnaBridge 145:64910690c574 226 */
AnnaBridge 145:64910690c574 227
AnnaBridge 145:64910690c574 228 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
AnnaBridge 145:64910690c574 229 * @{
AnnaBridge 145:64910690c574 230 */
AnnaBridge 145:64910690c574 231 #define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */
AnnaBridge 145:64910690c574 232 #define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */
AnnaBridge 145:64910690c574 233 #define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */
AnnaBridge 145:64910690c574 234 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
AnnaBridge 145:64910690c574 235 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 236 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 237 #define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
AnnaBridge 145:64910690c574 238 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
AnnaBridge 145:64910690c574 239 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 145:64910690c574 240 /* STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 241 /**
AnnaBridge 145:64910690c574 242 * @}
AnnaBridge 145:64910690c574 243 */
AnnaBridge 145:64910690c574 244
AnnaBridge 145:64910690c574 245 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
AnnaBridge 145:64910690c574 246 * @{
AnnaBridge 145:64910690c574 247 */
AnnaBridge 145:64910690c574 248 #define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
AnnaBridge 145:64910690c574 249 #define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */
AnnaBridge 145:64910690c574 250 /**
AnnaBridge 145:64910690c574 251 * @}
AnnaBridge 145:64910690c574 252 */
AnnaBridge 145:64910690c574 253
AnnaBridge 145:64910690c574 254 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
AnnaBridge 145:64910690c574 255 * @{
AnnaBridge 145:64910690c574 256 */
AnnaBridge 145:64910690c574 257 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */
AnnaBridge 145:64910690c574 258 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */
AnnaBridge 145:64910690c574 259 /**
AnnaBridge 145:64910690c574 260 * @}
AnnaBridge 145:64910690c574 261 */
AnnaBridge 145:64910690c574 262
AnnaBridge 145:64910690c574 263 /**
AnnaBridge 145:64910690c574 264 * @}
AnnaBridge 145:64910690c574 265 */
AnnaBridge 145:64910690c574 266 /* End of exported constants -------------------------------------------------*/
AnnaBridge 145:64910690c574 267
AnnaBridge 145:64910690c574 268 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 145:64910690c574 269 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
AnnaBridge 145:64910690c574 270 * @{
AnnaBridge 145:64910690c574 271 */
AnnaBridge 145:64910690c574 272
AnnaBridge 145:64910690c574 273 /**
AnnaBridge 145:64910690c574 274 * @}
AnnaBridge 145:64910690c574 275 */
AnnaBridge 145:64910690c574 276 /* End of exported macro -----------------------------------------------------*/
AnnaBridge 145:64910690c574 277
AnnaBridge 145:64910690c574 278 /* Private macro -------------------------------------------------------------*/
AnnaBridge 145:64910690c574 279 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
AnnaBridge 145:64910690c574 280 * @{
AnnaBridge 145:64910690c574 281 */
AnnaBridge 145:64910690c574 282 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F))
AnnaBridge 145:64910690c574 283
AnnaBridge 145:64910690c574 284 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
AnnaBridge 145:64910690c574 285 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
AnnaBridge 145:64910690c574 286
AnnaBridge 145:64910690c574 287 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
AnnaBridge 145:64910690c574 288 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
AnnaBridge 145:64910690c574 289 defined (STM32L496xx) || defined (STM32L4A6xx)
AnnaBridge 145:64910690c574 290 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
AnnaBridge 145:64910690c574 291 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
AnnaBridge 145:64910690c574 292 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
AnnaBridge 145:64910690c574 293 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
AnnaBridge 145:64910690c574 294 #else
AnnaBridge 145:64910690c574 295 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
AnnaBridge 145:64910690c574 296 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
AnnaBridge 145:64910690c574 297 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2))
AnnaBridge 145:64910690c574 298 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */
AnnaBridge 145:64910690c574 299
AnnaBridge 145:64910690c574 300 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
AnnaBridge 145:64910690c574 301 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
AnnaBridge 145:64910690c574 302
AnnaBridge 145:64910690c574 303 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
AnnaBridge 145:64910690c574 304 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
AnnaBridge 145:64910690c574 305 /**
AnnaBridge 145:64910690c574 306 * @}
AnnaBridge 145:64910690c574 307 */
AnnaBridge 145:64910690c574 308 /* End of private macro ------------------------------------------------------*/
AnnaBridge 145:64910690c574 309
AnnaBridge 145:64910690c574 310 /* Exported functions --------------------------------------------------------*/
AnnaBridge 145:64910690c574 311 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
AnnaBridge 145:64910690c574 312 * @{
AnnaBridge 145:64910690c574 313 */
AnnaBridge 145:64910690c574 314
AnnaBridge 145:64910690c574 315 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
AnnaBridge 145:64910690c574 316 * @brief Timer Hall Sensor functions
AnnaBridge 145:64910690c574 317 * @{
AnnaBridge 145:64910690c574 318 */
AnnaBridge 145:64910690c574 319 /* Timer Hall Sensor functions **********************************************/
AnnaBridge 145:64910690c574 320 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
AnnaBridge 145:64910690c574 321 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 322
AnnaBridge 145:64910690c574 323 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 324 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 325
AnnaBridge 145:64910690c574 326 /* Blocking mode: Polling */
AnnaBridge 145:64910690c574 327 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 328 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 329 /* Non-Blocking mode: Interrupt */
AnnaBridge 145:64910690c574 330 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 331 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 332 /* Non-Blocking mode: DMA */
AnnaBridge 145:64910690c574 333 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
AnnaBridge 145:64910690c574 334 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 335 /**
AnnaBridge 145:64910690c574 336 * @}
AnnaBridge 145:64910690c574 337 */
AnnaBridge 145:64910690c574 338
AnnaBridge 145:64910690c574 339 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
AnnaBridge 145:64910690c574 340 * @brief Timer Complementary Output Compare functions
AnnaBridge 145:64910690c574 341 * @{
AnnaBridge 145:64910690c574 342 */
AnnaBridge 145:64910690c574 343 /* Timer Complementary Output Compare functions *****************************/
AnnaBridge 145:64910690c574 344 /* Blocking mode: Polling */
AnnaBridge 145:64910690c574 345 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 346 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 347
AnnaBridge 145:64910690c574 348 /* Non-Blocking mode: Interrupt */
AnnaBridge 145:64910690c574 349 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 350 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 351
AnnaBridge 145:64910690c574 352 /* Non-Blocking mode: DMA */
AnnaBridge 145:64910690c574 353 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge 145:64910690c574 354 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 355 /**
AnnaBridge 145:64910690c574 356 * @}
AnnaBridge 145:64910690c574 357 */
AnnaBridge 145:64910690c574 358
AnnaBridge 145:64910690c574 359 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
AnnaBridge 145:64910690c574 360 * @brief Timer Complementary PWM functions
AnnaBridge 145:64910690c574 361 * @{
AnnaBridge 145:64910690c574 362 */
AnnaBridge 145:64910690c574 363 /* Timer Complementary PWM functions ****************************************/
AnnaBridge 145:64910690c574 364 /* Blocking mode: Polling */
AnnaBridge 145:64910690c574 365 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 366 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 367
AnnaBridge 145:64910690c574 368 /* Non-Blocking mode: Interrupt */
AnnaBridge 145:64910690c574 369 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 370 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 371 /* Non-Blocking mode: DMA */
AnnaBridge 145:64910690c574 372 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge 145:64910690c574 373 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge 145:64910690c574 374 /**
AnnaBridge 145:64910690c574 375 * @}
AnnaBridge 145:64910690c574 376 */
AnnaBridge 145:64910690c574 377
AnnaBridge 145:64910690c574 378 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
AnnaBridge 145:64910690c574 379 * @brief Timer Complementary One Pulse functions
AnnaBridge 145:64910690c574 380 * @{
AnnaBridge 145:64910690c574 381 */
AnnaBridge 145:64910690c574 382 /* Timer Complementary One Pulse functions **********************************/
AnnaBridge 145:64910690c574 383 /* Blocking mode: Polling */
AnnaBridge 145:64910690c574 384 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge 145:64910690c574 385 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge 145:64910690c574 386
AnnaBridge 145:64910690c574 387 /* Non-Blocking mode: Interrupt */
AnnaBridge 145:64910690c574 388 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge 145:64910690c574 389 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge 145:64910690c574 390 /**
AnnaBridge 145:64910690c574 391 * @}
AnnaBridge 145:64910690c574 392 */
AnnaBridge 145:64910690c574 393
AnnaBridge 145:64910690c574 394 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
AnnaBridge 145:64910690c574 395 * @brief Peripheral Control functions
AnnaBridge 145:64910690c574 396 * @{
AnnaBridge 145:64910690c574 397 */
AnnaBridge 145:64910690c574 398 /* Extended Control functions ************************************************/
AnnaBridge 145:64910690c574 399 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 145:64910690c574 400 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 145:64910690c574 401 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 145:64910690c574 402 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
AnnaBridge 145:64910690c574 403 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
AnnaBridge 145:64910690c574 404 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
AnnaBridge 145:64910690c574 405 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
AnnaBridge 145:64910690c574 406 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
AnnaBridge 145:64910690c574 407
AnnaBridge 145:64910690c574 408 /**
AnnaBridge 145:64910690c574 409 * @}
AnnaBridge 145:64910690c574 410 */
AnnaBridge 145:64910690c574 411
AnnaBridge 145:64910690c574 412 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
AnnaBridge 145:64910690c574 413 * @brief Extended Callbacks functions
AnnaBridge 145:64910690c574 414 * @{
AnnaBridge 145:64910690c574 415 */
AnnaBridge 145:64910690c574 416 /* Extended Callback **********************************************************/
AnnaBridge 145:64910690c574 417 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 418 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 419 /**
AnnaBridge 145:64910690c574 420 * @}
AnnaBridge 145:64910690c574 421 */
AnnaBridge 145:64910690c574 422
AnnaBridge 145:64910690c574 423 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
AnnaBridge 145:64910690c574 424 * @brief Extended Peripheral State functions
AnnaBridge 145:64910690c574 425 * @{
AnnaBridge 145:64910690c574 426 */
AnnaBridge 145:64910690c574 427 /* Extended Peripheral State functions ***************************************/
AnnaBridge 145:64910690c574 428 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
AnnaBridge 145:64910690c574 429 /**
AnnaBridge 145:64910690c574 430 * @}
AnnaBridge 145:64910690c574 431 */
AnnaBridge 145:64910690c574 432
AnnaBridge 145:64910690c574 433 /**
AnnaBridge 145:64910690c574 434 * @}
AnnaBridge 145:64910690c574 435 */
AnnaBridge 145:64910690c574 436 /* End of exported functions -------------------------------------------------*/
AnnaBridge 145:64910690c574 437
AnnaBridge 145:64910690c574 438 /* Private functions----------------------------------------------------------*/
AnnaBridge 145:64910690c574 439 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
AnnaBridge 145:64910690c574 440 * @{
AnnaBridge 145:64910690c574 441 */
AnnaBridge 145:64910690c574 442 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
AnnaBridge 145:64910690c574 443 /**
AnnaBridge 145:64910690c574 444 * @}
AnnaBridge 145:64910690c574 445 */
AnnaBridge 145:64910690c574 446 /* End of private functions --------------------------------------------------*/
AnnaBridge 145:64910690c574 447
AnnaBridge 145:64910690c574 448 /**
AnnaBridge 145:64910690c574 449 * @}
AnnaBridge 145:64910690c574 450 */
AnnaBridge 145:64910690c574 451
AnnaBridge 145:64910690c574 452 /**
AnnaBridge 145:64910690c574 453 * @}
AnnaBridge 145:64910690c574 454 */
AnnaBridge 145:64910690c574 455
AnnaBridge 145:64910690c574 456 #ifdef __cplusplus
AnnaBridge 145:64910690c574 457 }
AnnaBridge 145:64910690c574 458 #endif
AnnaBridge 145:64910690c574 459
AnnaBridge 145:64910690c574 460
AnnaBridge 145:64910690c574 461 #endif /* __STM32L4xx_HAL_TIM_EX_H */
AnnaBridge 145:64910690c574 462
AnnaBridge 145:64910690c574 463 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/