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TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma2d.h@145:64910690c574, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:31:38 2017 +0100
Revision:
145:64910690c574
Parent:
128:9bcdf88f62b0 
Release 145 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f4xx_hal_dma2d.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
AnnaBridge 145:64910690c574 5 * @version V1.7.1
AnnaBridge 145:64910690c574 6 * @date 14-April-2017
Kojto 122:f9eeca106725 7 * @brief Header file of DMA2D HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
AnnaBridge 145:64910690c574 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F4xx_HAL_DMA2D_H
Kojto 122:f9eeca106725 40 #define __STM32F4xx_HAL_DMA2D_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 122:f9eeca106725 47 defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 48 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 49 #include "stm32f4xx_hal_def.h"
Kojto 122:f9eeca106725 50
Kojto 122:f9eeca106725 51 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 122:f9eeca106725 52 * @{
Kojto 122:f9eeca106725 53 */
Kojto 122:f9eeca106725 54
Kojto 122:f9eeca106725 55 /** @addtogroup DMA2D DMA2D
Kojto 122:f9eeca106725 56 * @brief DMA2D HAL module driver
Kojto 122:f9eeca106725 57 * @{
Kojto 122:f9eeca106725 58 */
Kojto 122:f9eeca106725 59
Kojto 122:f9eeca106725 60 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 61 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
Kojto 122:f9eeca106725 62 * @{
Kojto 122:f9eeca106725 63 */
Kojto 122:f9eeca106725 64 #define MAX_DMA2D_LAYER 2U
Kojto 122:f9eeca106725 65
Kojto 122:f9eeca106725 66 /**
Kojto 122:f9eeca106725 67 * @brief DMA2D color Structure definition
Kojto 122:f9eeca106725 68 */
Kojto 122:f9eeca106725 69 typedef struct
Kojto 122:f9eeca106725 70 {
AnnaBridge 145:64910690c574 71 uint32_t Blue; /*!< Configures the blue value.
AnnaBridge 145:64910690c574 72 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 122:f9eeca106725 73
AnnaBridge 145:64910690c574 74 uint32_t Green; /*!< Configures the green value.
AnnaBridge 145:64910690c574 75 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 122:f9eeca106725 76
AnnaBridge 145:64910690c574 77 uint32_t Red; /*!< Configures the red value.
AnnaBridge 145:64910690c574 78 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 122:f9eeca106725 79 } DMA2D_ColorTypeDef;
Kojto 122:f9eeca106725 80
Kojto 122:f9eeca106725 81 /**
Kojto 122:f9eeca106725 82 * @brief DMA2D CLUT Structure definition
Kojto 122:f9eeca106725 83 */
Kojto 122:f9eeca106725 84 typedef struct
Kojto 122:f9eeca106725 85 {
AnnaBridge 145:64910690c574 86 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
Kojto 122:f9eeca106725 87
AnnaBridge 145:64910690c574 88 uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode.
AnnaBridge 145:64910690c574 89 This parameter can be one value of @ref DMA2D_CLUT_CM. */
Kojto 122:f9eeca106725 90
AnnaBridge 145:64910690c574 91 uint32_t Size; /*!< Configures the DMA2D CLUT size.
AnnaBridge 145:64910690c574 92 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
Kojto 122:f9eeca106725 93 } DMA2D_CLUTCfgTypeDef;
Kojto 122:f9eeca106725 94
Kojto 122:f9eeca106725 95 /**
Kojto 122:f9eeca106725 96 * @brief DMA2D Init structure definition
Kojto 122:f9eeca106725 97 */
Kojto 122:f9eeca106725 98 typedef struct
Kojto 122:f9eeca106725 99 {
Kojto 122:f9eeca106725 100 uint32_t Mode; /*!< Configures the DMA2D transfer mode.
Kojto 122:f9eeca106725 101 This parameter can be one value of @ref DMA2D_Mode. */
Kojto 122:f9eeca106725 102
Kojto 122:f9eeca106725 103 uint32_t ColorMode; /*!< Configures the color format of the output image.
Kojto 122:f9eeca106725 104 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */
Kojto 122:f9eeca106725 105
Kojto 122:f9eeca106725 106 uint32_t OutputOffset; /*!< Specifies the Offset value.
Kojto 122:f9eeca106725 107 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
Kojto 122:f9eeca106725 108
Kojto 122:f9eeca106725 109 } DMA2D_InitTypeDef;
Kojto 122:f9eeca106725 110
Kojto 122:f9eeca106725 111 /**
Kojto 122:f9eeca106725 112 * @brief DMA2D Layer structure definition
Kojto 122:f9eeca106725 113 */
Kojto 122:f9eeca106725 114 typedef struct
Kojto 122:f9eeca106725 115 {
AnnaBridge 145:64910690c574 116 uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset.
AnnaBridge 145:64910690c574 117 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
AnnaBridge 145:64910690c574 118
AnnaBridge 145:64910690c574 119 uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode.
AnnaBridge 145:64910690c574 120 This parameter can be one value of @ref DMA2D_Input_Color_Mode. */
AnnaBridge 145:64910690c574 121
AnnaBridge 145:64910690c574 122 uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode.
AnnaBridge 145:64910690c574 123 This parameter can be one value of @ref DMA2D_Alpha_Mode. */
AnnaBridge 145:64910690c574 124
AnnaBridge 145:64910690c574 125 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.
AnnaBridge 145:64910690c574 126 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.
AnnaBridge 145:64910690c574 127 @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between
AnnaBridge 145:64910690c574 128 Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where
AnnaBridge 145:64910690c574 129 - InputAlpha[24:31] is the alpha value ALPHA[0:7]
AnnaBridge 145:64910690c574 130 - InputAlpha[16:23] is the red value RED[0:7]
AnnaBridge 145:64910690c574 131 - InputAlpha[8:15] is the green value GREEN[0:7]
AnnaBridge 145:64910690c574 132 - InputAlpha[0:7] is the blue value BLUE[0:7]. */
Kojto 122:f9eeca106725 133
Kojto 122:f9eeca106725 134 } DMA2D_LayerCfgTypeDef;
Kojto 122:f9eeca106725 135
Kojto 122:f9eeca106725 136 /**
Kojto 122:f9eeca106725 137 * @brief HAL DMA2D State structures definition
Kojto 122:f9eeca106725 138 */
Kojto 122:f9eeca106725 139 typedef enum
Kojto 122:f9eeca106725 140 {
Kojto 122:f9eeca106725 141 HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */
Kojto 122:f9eeca106725 142 HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
Kojto 122:f9eeca106725 143 HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
Kojto 122:f9eeca106725 144 HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
Kojto 122:f9eeca106725 145 HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */
Kojto 122:f9eeca106725 146 HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */
Kojto 122:f9eeca106725 147 }HAL_DMA2D_StateTypeDef;
Kojto 122:f9eeca106725 148
Kojto 122:f9eeca106725 149 /**
Kojto 122:f9eeca106725 150 * @brief DMA2D handle Structure definition
Kojto 122:f9eeca106725 151 */
Kojto 122:f9eeca106725 152 typedef struct __DMA2D_HandleTypeDef
Kojto 122:f9eeca106725 153 {
Kojto 122:f9eeca106725 154 DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */
Kojto 122:f9eeca106725 155
Kojto 122:f9eeca106725 156 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */
Kojto 122:f9eeca106725 157
Kojto 122:f9eeca106725 158 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */
Kojto 122:f9eeca106725 159
Kojto 122:f9eeca106725 160 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */
Kojto 122:f9eeca106725 161
Kojto 122:f9eeca106725 162 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
Kojto 122:f9eeca106725 163
Kojto 122:f9eeca106725 164 HAL_LockTypeDef Lock; /*!< DMA2D lock. */
Kojto 122:f9eeca106725 165
Kojto 122:f9eeca106725 166 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */
Kojto 122:f9eeca106725 167
Kojto 122:f9eeca106725 168 __IO uint32_t ErrorCode; /*!< DMA2D error code. */
Kojto 122:f9eeca106725 169 } DMA2D_HandleTypeDef;
Kojto 122:f9eeca106725 170 /**
Kojto 122:f9eeca106725 171 * @}
Kojto 122:f9eeca106725 172 */
Kojto 122:f9eeca106725 173
Kojto 122:f9eeca106725 174 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 175 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
Kojto 122:f9eeca106725 176 * @{
Kojto 122:f9eeca106725 177 */
Kojto 122:f9eeca106725 178
Kojto 122:f9eeca106725 179 /** @defgroup DMA2D_Error_Code DMA2D Error Code
Kojto 122:f9eeca106725 180 * @{
Kojto 122:f9eeca106725 181 */
AnnaBridge 145:64910690c574 182 #define HAL_DMA2D_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 145:64910690c574 183 #define HAL_DMA2D_ERROR_TE 0x00000001U /*!< Transfer error */
AnnaBridge 145:64910690c574 184 #define HAL_DMA2D_ERROR_CE 0x00000002U /*!< Configuration error */
AnnaBridge 145:64910690c574 185 #define HAL_DMA2D_ERROR_CAE 0x00000004U /*!< CLUT access error */
AnnaBridge 145:64910690c574 186 #define HAL_DMA2D_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
Kojto 122:f9eeca106725 187 /**
Kojto 122:f9eeca106725 188 * @}
Kojto 122:f9eeca106725 189 */
Kojto 122:f9eeca106725 190
Kojto 122:f9eeca106725 191 /** @defgroup DMA2D_Mode DMA2D Mode
Kojto 122:f9eeca106725 192 * @{
Kojto 122:f9eeca106725 193 */
AnnaBridge 145:64910690c574 194 #define DMA2D_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
Kojto 122:f9eeca106725 195 #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
Kojto 122:f9eeca106725 196 #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
Kojto 122:f9eeca106725 197 #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
Kojto 122:f9eeca106725 198 /**
Kojto 122:f9eeca106725 199 * @}
Kojto 122:f9eeca106725 200 */
Kojto 122:f9eeca106725 201
Kojto 122:f9eeca106725 202 /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode
Kojto 122:f9eeca106725 203 * @{
Kojto 122:f9eeca106725 204 */
AnnaBridge 145:64910690c574 205 #define DMA2D_OUTPUT_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D color mode */
Kojto 122:f9eeca106725 206 #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */
Kojto 122:f9eeca106725 207 #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */
Kojto 122:f9eeca106725 208 #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */
Kojto 122:f9eeca106725 209 #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */
Kojto 122:f9eeca106725 210 /**
Kojto 122:f9eeca106725 211 * @}
Kojto 122:f9eeca106725 212 */
Kojto 122:f9eeca106725 213
Kojto 122:f9eeca106725 214 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
Kojto 122:f9eeca106725 215 * @{
Kojto 122:f9eeca106725 216 */
AnnaBridge 145:64910690c574 217 #define DMA2D_INPUT_ARGB8888 0x00000000U /*!< ARGB8888 color mode */
AnnaBridge 145:64910690c574 218 #define DMA2D_INPUT_RGB888 0x00000001U /*!< RGB888 color mode */
AnnaBridge 145:64910690c574 219 #define DMA2D_INPUT_RGB565 0x00000002U /*!< RGB565 color mode */
AnnaBridge 145:64910690c574 220 #define DMA2D_INPUT_ARGB1555 0x00000003U /*!< ARGB1555 color mode */
AnnaBridge 145:64910690c574 221 #define DMA2D_INPUT_ARGB4444 0x00000004U /*!< ARGB4444 color mode */
AnnaBridge 145:64910690c574 222 #define DMA2D_INPUT_L8 0x00000005U /*!< L8 color mode */
AnnaBridge 145:64910690c574 223 #define DMA2D_INPUT_AL44 0x00000006U /*!< AL44 color mode */
AnnaBridge 145:64910690c574 224 #define DMA2D_INPUT_AL88 0x00000007U /*!< AL88 color mode */
AnnaBridge 145:64910690c574 225 #define DMA2D_INPUT_L4 0x00000008U /*!< L4 color mode */
AnnaBridge 145:64910690c574 226 #define DMA2D_INPUT_A8 0x00000009U /*!< A8 color mode */
AnnaBridge 145:64910690c574 227 #define DMA2D_INPUT_A4 0x0000000AU /*!< A4 color mode */
Kojto 122:f9eeca106725 228 /**
Kojto 122:f9eeca106725 229 * @}
Kojto 122:f9eeca106725 230 */
Kojto 122:f9eeca106725 231
Kojto 122:f9eeca106725 232 /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode
Kojto 122:f9eeca106725 233 * @{
Kojto 122:f9eeca106725 234 */
AnnaBridge 145:64910690c574 235 #define DMA2D_NO_MODIF_ALPHA 0x00000000U /*!< No modification of the alpha channel value */
AnnaBridge 145:64910690c574 236 #define DMA2D_REPLACE_ALPHA 0x00000001U /*!< Replace original alpha channel value by programmed alpha value */
AnnaBridge 145:64910690c574 237 #define DMA2D_COMBINE_ALPHA 0x00000002U /*!< Replace original alpha channel value by programmed alpha value
AnnaBridge 145:64910690c574 238 with original alpha channel value */
Kojto 122:f9eeca106725 239 /**
Kojto 122:f9eeca106725 240 * @}
Kojto 122:f9eeca106725 241 */
Kojto 122:f9eeca106725 242
Kojto 122:f9eeca106725 243 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode
Kojto 122:f9eeca106725 244 * @{
Kojto 122:f9eeca106725 245 */
AnnaBridge 145:64910690c574 246 #define DMA2D_CCM_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D CLUT color mode */
AnnaBridge 145:64910690c574 247 #define DMA2D_CCM_RGB888 0x00000001U /*!< RGB888 DMA2D CLUT color mode */
Kojto 122:f9eeca106725 248 /**
Kojto 122:f9eeca106725 249 * @}
Kojto 122:f9eeca106725 250 */
Kojto 122:f9eeca106725 251
Kojto 122:f9eeca106725 252 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
Kojto 122:f9eeca106725 253 * @{
Kojto 122:f9eeca106725 254 */
Kojto 122:f9eeca106725 255 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
Kojto 122:f9eeca106725 256 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
Kojto 122:f9eeca106725 257 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
Kojto 122:f9eeca106725 258 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
Kojto 122:f9eeca106725 259 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
Kojto 122:f9eeca106725 260 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
Kojto 122:f9eeca106725 261 /**
Kojto 122:f9eeca106725 262 * @}
Kojto 122:f9eeca106725 263 */
Kojto 122:f9eeca106725 264
Kojto 122:f9eeca106725 265 /** @defgroup DMA2D_Flags DMA2D Flags
Kojto 122:f9eeca106725 266 * @{
Kojto 122:f9eeca106725 267 */
Kojto 122:f9eeca106725 268 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
Kojto 122:f9eeca106725 269 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
Kojto 122:f9eeca106725 270 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
Kojto 122:f9eeca106725 271 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
Kojto 122:f9eeca106725 272 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
Kojto 122:f9eeca106725 273 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
Kojto 122:f9eeca106725 274 /**
Kojto 122:f9eeca106725 275 * @}
Kojto 122:f9eeca106725 276 */
Kojto 122:f9eeca106725 277
Kojto 122:f9eeca106725 278 /** @defgroup DMA2D_Aliases DMA2D API Aliases
Kojto 122:f9eeca106725 279 * @{
Kojto 122:f9eeca106725 280 */
Kojto 122:f9eeca106725 281 #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */
Kojto 122:f9eeca106725 282 /**
Kojto 122:f9eeca106725 283 * @}
Kojto 122:f9eeca106725 284 */
Kojto 122:f9eeca106725 285
Kojto 122:f9eeca106725 286 /**
Kojto 122:f9eeca106725 287 * @}
Kojto 122:f9eeca106725 288 */
Kojto 122:f9eeca106725 289 /* Exported macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 290 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
Kojto 122:f9eeca106725 291 * @{
Kojto 122:f9eeca106725 292 */
Kojto 122:f9eeca106725 293
Kojto 122:f9eeca106725 294 /** @brief Reset DMA2D handle state
Kojto 122:f9eeca106725 295 * @param __HANDLE__: specifies the DMA2D handle.
Kojto 122:f9eeca106725 296 * @retval None
Kojto 122:f9eeca106725 297 */
Kojto 122:f9eeca106725 298 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
Kojto 122:f9eeca106725 299
Kojto 122:f9eeca106725 300 /**
Kojto 122:f9eeca106725 301 * @brief Enable the DMA2D.
Kojto 122:f9eeca106725 302 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 303 * @retval None.
Kojto 122:f9eeca106725 304 */
AnnaBridge 145:64910690c574 305 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
Kojto 122:f9eeca106725 306
Kojto 122:f9eeca106725 307 /* Interrupt & Flag management */
Kojto 122:f9eeca106725 308 /**
Kojto 122:f9eeca106725 309 * @brief Get the DMA2D pending flags.
Kojto 122:f9eeca106725 310 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 311 * @param __FLAG__: flag to check.
Kojto 122:f9eeca106725 312 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 313 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 122:f9eeca106725 314 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
Kojto 122:f9eeca106725 315 * @arg DMA2D_FLAG_CAE: CLUT access error flag
Kojto 122:f9eeca106725 316 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
Kojto 122:f9eeca106725 317 * @arg DMA2D_FLAG_TC: Transfer complete flag
Kojto 122:f9eeca106725 318 * @arg DMA2D_FLAG_TE: Transfer error flag
Kojto 122:f9eeca106725 319 * @retval The state of FLAG.
Kojto 122:f9eeca106725 320 */
Kojto 122:f9eeca106725 321 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
Kojto 122:f9eeca106725 322
Kojto 122:f9eeca106725 323 /**
Kojto 122:f9eeca106725 324 * @brief Clear the DMA2D pending flags.
Kojto 122:f9eeca106725 325 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 326 * @param __FLAG__: specifies the flag to clear.
Kojto 122:f9eeca106725 327 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 328 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 122:f9eeca106725 329 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
Kojto 122:f9eeca106725 330 * @arg DMA2D_FLAG_CAE: CLUT access error flag
Kojto 122:f9eeca106725 331 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
Kojto 122:f9eeca106725 332 * @arg DMA2D_FLAG_TC: Transfer complete flag
Kojto 122:f9eeca106725 333 * @arg DMA2D_FLAG_TE: Transfer error flag
Kojto 122:f9eeca106725 334 * @retval None
Kojto 122:f9eeca106725 335 */
Kojto 122:f9eeca106725 336 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
Kojto 122:f9eeca106725 337
Kojto 122:f9eeca106725 338 /**
Kojto 122:f9eeca106725 339 * @brief Enable the specified DMA2D interrupts.
Kojto 122:f9eeca106725 340 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 341 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
Kojto 122:f9eeca106725 342 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 343 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 344 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 345 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
Kojto 122:f9eeca106725 346 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 122:f9eeca106725 347 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 348 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 349 * @retval None
Kojto 122:f9eeca106725 350 */
Kojto 122:f9eeca106725 351 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
Kojto 122:f9eeca106725 352
Kojto 122:f9eeca106725 353 /**
Kojto 122:f9eeca106725 354 * @brief Disable the specified DMA2D interrupts.
Kojto 122:f9eeca106725 355 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 356 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
Kojto 122:f9eeca106725 357 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 358 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 359 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 360 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
Kojto 122:f9eeca106725 361 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 122:f9eeca106725 362 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 363 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 364 * @retval None
Kojto 122:f9eeca106725 365 */
Kojto 122:f9eeca106725 366 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
Kojto 122:f9eeca106725 367
Kojto 122:f9eeca106725 368 /**
Kojto 122:f9eeca106725 369 * @brief Check whether the specified DMA2D interrupt source is enabled or not.
Kojto 122:f9eeca106725 370 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 371 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
Kojto 122:f9eeca106725 372 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 373 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 374 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 375 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
Kojto 122:f9eeca106725 376 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 122:f9eeca106725 377 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 378 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 379 * @retval The state of INTERRUPT source.
Kojto 122:f9eeca106725 380 */
Kojto 122:f9eeca106725 381 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
Kojto 122:f9eeca106725 382
Kojto 122:f9eeca106725 383 /**
Kojto 122:f9eeca106725 384 * @}
Kojto 122:f9eeca106725 385 */
Kojto 122:f9eeca106725 386
Kojto 122:f9eeca106725 387 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 388 /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions
Kojto 122:f9eeca106725 389 * @{
Kojto 122:f9eeca106725 390 */
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 122:f9eeca106725 393 * @{
Kojto 122:f9eeca106725 394 */
Kojto 122:f9eeca106725 395
Kojto 122:f9eeca106725 396 /* Initialization and de-initialization functions *******************************/
Kojto 122:f9eeca106725 397 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 398 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 399 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 122:f9eeca106725 400 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 122:f9eeca106725 401
Kojto 122:f9eeca106725 402 /**
Kojto 122:f9eeca106725 403 * @}
Kojto 122:f9eeca106725 404 */
Kojto 122:f9eeca106725 405
Kojto 122:f9eeca106725 406 /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions
Kojto 122:f9eeca106725 407 * @{
Kojto 122:f9eeca106725 408 */
Kojto 122:f9eeca106725 409
Kojto 122:f9eeca106725 410 /* IO operation functions *******************************************************/
Kojto 122:f9eeca106725 411 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 122:f9eeca106725 412 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 122:f9eeca106725 413 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 122:f9eeca106725 414 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 122:f9eeca106725 415 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 416 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 417 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 418 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 419 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 420 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 421 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 422 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 423 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 424 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
Kojto 122:f9eeca106725 425 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 426 void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 427 void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 428
Kojto 122:f9eeca106725 429 /**
Kojto 122:f9eeca106725 430 * @}
Kojto 122:f9eeca106725 431 */
Kojto 122:f9eeca106725 432
Kojto 122:f9eeca106725 433 /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
Kojto 122:f9eeca106725 434 * @{
Kojto 122:f9eeca106725 435 */
Kojto 122:f9eeca106725 436
Kojto 122:f9eeca106725 437 /* Peripheral Control functions *************************************************/
Kojto 122:f9eeca106725 438 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 439 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 440 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
Kojto 122:f9eeca106725 441 HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 442 HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 443 HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);
Kojto 122:f9eeca106725 444
Kojto 122:f9eeca106725 445 /**
Kojto 122:f9eeca106725 446 * @}
Kojto 122:f9eeca106725 447 */
Kojto 122:f9eeca106725 448
Kojto 122:f9eeca106725 449 /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
Kojto 122:f9eeca106725 450 * @{
Kojto 122:f9eeca106725 451 */
Kojto 122:f9eeca106725 452
Kojto 122:f9eeca106725 453 /* Peripheral State functions ***************************************************/
Kojto 122:f9eeca106725 454 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 455 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 456
Kojto 122:f9eeca106725 457 /**
Kojto 122:f9eeca106725 458 * @}
Kojto 122:f9eeca106725 459 */
Kojto 122:f9eeca106725 460
Kojto 122:f9eeca106725 461 /**
Kojto 122:f9eeca106725 462 * @}
Kojto 122:f9eeca106725 463 */
Kojto 122:f9eeca106725 464
Kojto 122:f9eeca106725 465 /* Private constants ---------------------------------------------------------*/
Kojto 122:f9eeca106725 466
Kojto 122:f9eeca106725 467 /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants
Kojto 122:f9eeca106725 468 * @{
Kojto 122:f9eeca106725 469 */
Kojto 122:f9eeca106725 470
Kojto 122:f9eeca106725 471 /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark
Kojto 122:f9eeca106725 472 * @{
Kojto 122:f9eeca106725 473 */
AnnaBridge 145:64910690c574 474 #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */
Kojto 122:f9eeca106725 475 /**
Kojto 122:f9eeca106725 476 * @}
Kojto 122:f9eeca106725 477 */
Kojto 122:f9eeca106725 478
Kojto 122:f9eeca106725 479 /** @defgroup DMA2D_Color_Value DMA2D Color Value
Kojto 122:f9eeca106725 480 * @{
Kojto 122:f9eeca106725 481 */
AnnaBridge 145:64910690c574 482 #define DMA2D_COLOR_VALUE 0x000000FFU /*!< Color value mask */
Kojto 122:f9eeca106725 483 /**
Kojto 122:f9eeca106725 484 * @}
Kojto 122:f9eeca106725 485 */
Kojto 122:f9eeca106725 486
Kojto 122:f9eeca106725 487 /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers
Kojto 122:f9eeca106725 488 * @{
Kojto 122:f9eeca106725 489 */
AnnaBridge 145:64910690c574 490 #define DMA2D_MAX_LAYER 2U /*!< DMA2D maximum number of layers */
Kojto 122:f9eeca106725 491 /**
Kojto 122:f9eeca106725 492 * @}
Kojto 122:f9eeca106725 493 */
Kojto 122:f9eeca106725 494
Kojto 122:f9eeca106725 495 /** @defgroup DMA2D_Offset DMA2D Offset
Kojto 122:f9eeca106725 496 * @{
Kojto 122:f9eeca106725 497 */
AnnaBridge 145:64910690c574 498 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
Kojto 122:f9eeca106725 499 /**
Kojto 122:f9eeca106725 500 * @}
Kojto 122:f9eeca106725 501 */
Kojto 122:f9eeca106725 502
Kojto 122:f9eeca106725 503 /** @defgroup DMA2D_Size DMA2D Size
Kojto 122:f9eeca106725 504 * @{
Kojto 122:f9eeca106725 505 */
AnnaBridge 145:64910690c574 506 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D number of pixels per line */
AnnaBridge 145:64910690c574 507 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of lines */
Kojto 122:f9eeca106725 508 /**
Kojto 122:f9eeca106725 509 * @}
Kojto 122:f9eeca106725 510 */
Kojto 122:f9eeca106725 511
Kojto 122:f9eeca106725 512 /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size
Kojto 122:f9eeca106725 513 * @{
Kojto 122:f9eeca106725 514 */
AnnaBridge 145:64910690c574 515 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U) /*!< DMA2D CLUT size */
Kojto 122:f9eeca106725 516 /**
Kojto 122:f9eeca106725 517 * @}
Kojto 122:f9eeca106725 518 */
Kojto 122:f9eeca106725 519
Kojto 122:f9eeca106725 520 /**
Kojto 122:f9eeca106725 521 * @}
Kojto 122:f9eeca106725 522 */
Kojto 122:f9eeca106725 523
Kojto 122:f9eeca106725 524 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 525 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
Kojto 122:f9eeca106725 526 * @{
Kojto 122:f9eeca106725 527 */
Kojto 122:f9eeca106725 528 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= DMA2D_MAX_LAYER)
Kojto 122:f9eeca106725 529 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
Kojto 122:f9eeca106725 530 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
Kojto 122:f9eeca106725 531 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \
Kojto 122:f9eeca106725 532 ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
Kojto 122:f9eeca106725 533 ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
Kojto 122:f9eeca106725 534 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE)
Kojto 122:f9eeca106725 535 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
Kojto 122:f9eeca106725 536 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
Kojto 122:f9eeca106725 537 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
Kojto 122:f9eeca106725 538 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \
Kojto 122:f9eeca106725 539 ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
Kojto 122:f9eeca106725 540 ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \
Kojto 122:f9eeca106725 541 ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \
Kojto 122:f9eeca106725 542 ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \
Kojto 122:f9eeca106725 543 ((INPUT_CM) == DMA2D_INPUT_A4))
Kojto 122:f9eeca106725 544 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
Kojto 122:f9eeca106725 545 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
Kojto 122:f9eeca106725 546 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
Kojto 122:f9eeca106725 547
Kojto 122:f9eeca106725 548 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
Kojto 122:f9eeca106725 549 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
Kojto 122:f9eeca106725 550 #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
Kojto 122:f9eeca106725 551 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
Kojto 122:f9eeca106725 552 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
Kojto 122:f9eeca106725 553 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
Kojto 122:f9eeca106725 554 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
Kojto 122:f9eeca106725 555 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
Kojto 122:f9eeca106725 556 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
Kojto 122:f9eeca106725 557 /**
Kojto 122:f9eeca106725 558 * @}
Kojto 122:f9eeca106725 559 */
Kojto 122:f9eeca106725 560
Kojto 122:f9eeca106725 561 /**
Kojto 122:f9eeca106725 562 * @}
Kojto 122:f9eeca106725 563 */
Kojto 122:f9eeca106725 564
Kojto 122:f9eeca106725 565 /**
Kojto 122:f9eeca106725 566 * @}
Kojto 122:f9eeca106725 567 */
Kojto 122:f9eeca106725 568
Kojto 122:f9eeca106725 569 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 570
Kojto 122:f9eeca106725 571 #ifdef __cplusplus
Kojto 122:f9eeca106725 572 }
Kojto 122:f9eeca106725 573 #endif
Kojto 122:f9eeca106725 574
Kojto 122:f9eeca106725 575 #endif /* __STM32F4xx_HAL_DMA2D_H */
Kojto 122:f9eeca106725 576
Kojto 122:f9eeca106725 577 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/