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mbed 2

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TARGET_VK_RZ_A1H/cmsis_armclang.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
165:d1b4690b3f8b
Child:
169:a7c7b631e539
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /**************************************************************************//**
AnnaBridge 165:d1b4690b3f8b 2 * @file cmsis_armclang.h
AnnaBridge 165:d1b4690b3f8b 3 * @brief CMSIS compiler specific macros, functions, instructions
AnnaBridge 165:d1b4690b3f8b 4 * @version V1.0.1
AnnaBridge 165:d1b4690b3f8b 5 * @date 07. Sep 2017
AnnaBridge 165:d1b4690b3f8b 6 ******************************************************************************/
AnnaBridge 165:d1b4690b3f8b 7 /*
AnnaBridge 165:d1b4690b3f8b 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 165:d1b4690b3f8b 9 *
AnnaBridge 165:d1b4690b3f8b 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 165:d1b4690b3f8b 11 *
AnnaBridge 165:d1b4690b3f8b 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 165:d1b4690b3f8b 13 * not use this file except in compliance with the License.
AnnaBridge 165:d1b4690b3f8b 14 * You may obtain a copy of the License at
AnnaBridge 165:d1b4690b3f8b 15 *
AnnaBridge 165:d1b4690b3f8b 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 165:d1b4690b3f8b 17 *
AnnaBridge 165:d1b4690b3f8b 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 165:d1b4690b3f8b 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 165:d1b4690b3f8b 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 165:d1b4690b3f8b 21 * See the License for the specific language governing permissions and
AnnaBridge 165:d1b4690b3f8b 22 * limitations under the License.
AnnaBridge 165:d1b4690b3f8b 23 */
AnnaBridge 165:d1b4690b3f8b 24
AnnaBridge 165:d1b4690b3f8b 25 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 165:d1b4690b3f8b 26 #define __CMSIS_ARMCLANG_H
AnnaBridge 165:d1b4690b3f8b 27
AnnaBridge 165:d1b4690b3f8b 28 #pragma clang system_header /* treat file as system include file */
AnnaBridge 165:d1b4690b3f8b 29
AnnaBridge 165:d1b4690b3f8b 30 #ifndef __ARM_COMPAT_H
AnnaBridge 165:d1b4690b3f8b 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 165:d1b4690b3f8b 32 #endif
AnnaBridge 165:d1b4690b3f8b 33
AnnaBridge 165:d1b4690b3f8b 34 /* CMSIS compiler specific defines */
AnnaBridge 165:d1b4690b3f8b 35 #ifndef __ASM
AnnaBridge 165:d1b4690b3f8b 36 #define __ASM __asm
AnnaBridge 165:d1b4690b3f8b 37 #endif
AnnaBridge 165:d1b4690b3f8b 38 #ifndef __INLINE
AnnaBridge 165:d1b4690b3f8b 39 #define __INLINE __inline
AnnaBridge 165:d1b4690b3f8b 40 #endif
AnnaBridge 165:d1b4690b3f8b 41 #ifndef __FORCEINLINE
AnnaBridge 165:d1b4690b3f8b 42 #define __FORCEINLINE __attribute__((always_inline))
AnnaBridge 165:d1b4690b3f8b 43 #endif
AnnaBridge 165:d1b4690b3f8b 44 #ifndef __STATIC_INLINE
AnnaBridge 165:d1b4690b3f8b 45 #define __STATIC_INLINE static __inline
AnnaBridge 165:d1b4690b3f8b 46 #endif
AnnaBridge 165:d1b4690b3f8b 47 #ifndef __STATIC_FORCEINLINE
AnnaBridge 165:d1b4690b3f8b 48 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
AnnaBridge 165:d1b4690b3f8b 49 #endif
AnnaBridge 165:d1b4690b3f8b 50 #ifndef __NO_RETURN
AnnaBridge 165:d1b4690b3f8b 51 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 165:d1b4690b3f8b 52 #endif
AnnaBridge 165:d1b4690b3f8b 53 #ifndef CMSIS_DEPRECATED
AnnaBridge 165:d1b4690b3f8b 54 #define CMSIS_DEPRECATED __attribute__((deprecated))
AnnaBridge 165:d1b4690b3f8b 55 #endif
AnnaBridge 165:d1b4690b3f8b 56 #ifndef __USED
AnnaBridge 165:d1b4690b3f8b 57 #define __USED __attribute__((used))
AnnaBridge 165:d1b4690b3f8b 58 #endif
AnnaBridge 165:d1b4690b3f8b 59 #ifndef __WEAK
AnnaBridge 165:d1b4690b3f8b 60 #define __WEAK __attribute__((weak))
AnnaBridge 165:d1b4690b3f8b 61 #endif
AnnaBridge 165:d1b4690b3f8b 62 #ifndef __PACKED
AnnaBridge 165:d1b4690b3f8b 63 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 165:d1b4690b3f8b 64 #endif
AnnaBridge 165:d1b4690b3f8b 65 #ifndef __PACKED_STRUCT
AnnaBridge 165:d1b4690b3f8b 66 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 165:d1b4690b3f8b 67 #endif
AnnaBridge 165:d1b4690b3f8b 68 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 165:d1b4690b3f8b 69 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 70 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 71 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 165:d1b4690b3f8b 72 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 165:d1b4690b3f8b 73 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 74 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 165:d1b4690b3f8b 75 #endif
AnnaBridge 165:d1b4690b3f8b 76 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 165:d1b4690b3f8b 77 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 78 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 79 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 165:d1b4690b3f8b 80 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 165:d1b4690b3f8b 81 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 82 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 165:d1b4690b3f8b 83 #endif
AnnaBridge 165:d1b4690b3f8b 84 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 165:d1b4690b3f8b 85 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 86 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 87 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 165:d1b4690b3f8b 88 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 165:d1b4690b3f8b 89 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 90 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 165:d1b4690b3f8b 91 #endif
AnnaBridge 165:d1b4690b3f8b 92 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 165:d1b4690b3f8b 93 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 94 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 95 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 165:d1b4690b3f8b 96 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 97 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 165:d1b4690b3f8b 98 #endif
AnnaBridge 165:d1b4690b3f8b 99 #ifndef __ALIGNED
AnnaBridge 165:d1b4690b3f8b 100 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 165:d1b4690b3f8b 101 #endif
AnnaBridge 165:d1b4690b3f8b 102 #ifndef __PACKED
AnnaBridge 165:d1b4690b3f8b 103 #define __PACKED __attribute__((packed))
AnnaBridge 165:d1b4690b3f8b 104 #endif
AnnaBridge 165:d1b4690b3f8b 105
AnnaBridge 165:d1b4690b3f8b 106 /* ########################## Core Instruction Access ######################### */
AnnaBridge 165:d1b4690b3f8b 107 /**
AnnaBridge 165:d1b4690b3f8b 108 \brief No Operation
AnnaBridge 165:d1b4690b3f8b 109 */
AnnaBridge 165:d1b4690b3f8b 110 #define __NOP __builtin_arm_nop
AnnaBridge 165:d1b4690b3f8b 111
AnnaBridge 165:d1b4690b3f8b 112 /**
AnnaBridge 165:d1b4690b3f8b 113 \brief Wait For Interrupt
AnnaBridge 165:d1b4690b3f8b 114 */
AnnaBridge 165:d1b4690b3f8b 115 #define __WFI __builtin_arm_wfi
AnnaBridge 165:d1b4690b3f8b 116
AnnaBridge 165:d1b4690b3f8b 117 /**
AnnaBridge 165:d1b4690b3f8b 118 \brief Wait For Event
AnnaBridge 165:d1b4690b3f8b 119 */
AnnaBridge 165:d1b4690b3f8b 120 #define __WFE __builtin_arm_wfe
AnnaBridge 165:d1b4690b3f8b 121
AnnaBridge 165:d1b4690b3f8b 122 /**
AnnaBridge 165:d1b4690b3f8b 123 \brief Send Event
AnnaBridge 165:d1b4690b3f8b 124 */
AnnaBridge 165:d1b4690b3f8b 125 #define __SEV __builtin_arm_sev
AnnaBridge 165:d1b4690b3f8b 126
AnnaBridge 165:d1b4690b3f8b 127 /**
AnnaBridge 165:d1b4690b3f8b 128 \brief Instruction Synchronization Barrier
AnnaBridge 165:d1b4690b3f8b 129 */
AnnaBridge 165:d1b4690b3f8b 130 #define __ISB() do {\
AnnaBridge 165:d1b4690b3f8b 131 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 132 __builtin_arm_isb(0xF);\
AnnaBridge 165:d1b4690b3f8b 133 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 134 } while (0U)
AnnaBridge 165:d1b4690b3f8b 135
AnnaBridge 165:d1b4690b3f8b 136 /**
AnnaBridge 165:d1b4690b3f8b 137 \brief Data Synchronization Barrier
AnnaBridge 165:d1b4690b3f8b 138 */
AnnaBridge 165:d1b4690b3f8b 139 #define __DSB() do {\
AnnaBridge 165:d1b4690b3f8b 140 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 141 __builtin_arm_dsb(0xF);\
AnnaBridge 165:d1b4690b3f8b 142 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 143 } while (0U)
AnnaBridge 165:d1b4690b3f8b 144
AnnaBridge 165:d1b4690b3f8b 145 /**
AnnaBridge 165:d1b4690b3f8b 146 \brief Data Memory Barrier
AnnaBridge 165:d1b4690b3f8b 147 */
AnnaBridge 165:d1b4690b3f8b 148 #define __DMB() do {\
AnnaBridge 165:d1b4690b3f8b 149 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 150 __builtin_arm_dmb(0xF);\
AnnaBridge 165:d1b4690b3f8b 151 __schedule_barrier();\
AnnaBridge 165:d1b4690b3f8b 152 } while (0U)
AnnaBridge 165:d1b4690b3f8b 153
AnnaBridge 165:d1b4690b3f8b 154 /**
AnnaBridge 165:d1b4690b3f8b 155 \brief Reverse byte order (32 bit)
AnnaBridge 165:d1b4690b3f8b 156 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
AnnaBridge 165:d1b4690b3f8b 157 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 158 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 159 */
AnnaBridge 165:d1b4690b3f8b 160 #define __REV(value) __builtin_bswap32(value)
AnnaBridge 165:d1b4690b3f8b 161
AnnaBridge 165:d1b4690b3f8b 162 /**
AnnaBridge 165:d1b4690b3f8b 163 \brief Reverse byte order (16 bit)
AnnaBridge 165:d1b4690b3f8b 164 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
AnnaBridge 165:d1b4690b3f8b 165 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 166 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 167 */
AnnaBridge 165:d1b4690b3f8b 168 #define __REV16(value) __ROR(__REV(value), 16)
AnnaBridge 165:d1b4690b3f8b 169
AnnaBridge 165:d1b4690b3f8b 170
AnnaBridge 165:d1b4690b3f8b 171 /**
AnnaBridge 165:d1b4690b3f8b 172 \brief Reverse byte order (16 bit)
AnnaBridge 165:d1b4690b3f8b 173 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
AnnaBridge 165:d1b4690b3f8b 174 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 175 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 176 */
AnnaBridge 165:d1b4690b3f8b 177 #define __REVSH(value) (int16_t)__builtin_bswap16(value)
AnnaBridge 165:d1b4690b3f8b 178
AnnaBridge 165:d1b4690b3f8b 179
AnnaBridge 165:d1b4690b3f8b 180 /**
AnnaBridge 165:d1b4690b3f8b 181 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 165:d1b4690b3f8b 182 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 165:d1b4690b3f8b 183 \param [in] op1 Value to rotate
AnnaBridge 165:d1b4690b3f8b 184 \param [in] op2 Number of Bits to rotate
AnnaBridge 165:d1b4690b3f8b 185 \return Rotated value
AnnaBridge 165:d1b4690b3f8b 186 */
AnnaBridge 165:d1b4690b3f8b 187 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 188 {
AnnaBridge 165:d1b4690b3f8b 189 op2 %= 32U;
AnnaBridge 165:d1b4690b3f8b 190 if (op2 == 0U)
AnnaBridge 165:d1b4690b3f8b 191 {
AnnaBridge 165:d1b4690b3f8b 192 return op1;
AnnaBridge 165:d1b4690b3f8b 193 }
AnnaBridge 165:d1b4690b3f8b 194 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 165:d1b4690b3f8b 195 }
AnnaBridge 165:d1b4690b3f8b 196
AnnaBridge 165:d1b4690b3f8b 197
AnnaBridge 165:d1b4690b3f8b 198 /**
AnnaBridge 165:d1b4690b3f8b 199 \brief Breakpoint
AnnaBridge 165:d1b4690b3f8b 200 \param [in] value is ignored by the processor.
AnnaBridge 165:d1b4690b3f8b 201 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 165:d1b4690b3f8b 202 */
AnnaBridge 165:d1b4690b3f8b 203 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 165:d1b4690b3f8b 204
AnnaBridge 165:d1b4690b3f8b 205 /**
AnnaBridge 165:d1b4690b3f8b 206 \brief Reverse bit order of value
AnnaBridge 165:d1b4690b3f8b 207 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 208 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 209 */
AnnaBridge 165:d1b4690b3f8b 210 #define __RBIT __builtin_arm_rbit
AnnaBridge 165:d1b4690b3f8b 211
AnnaBridge 165:d1b4690b3f8b 212 /**
AnnaBridge 165:d1b4690b3f8b 213 \brief Count leading zeros
AnnaBridge 165:d1b4690b3f8b 214 \param [in] value Value to count the leading zeros
AnnaBridge 165:d1b4690b3f8b 215 \return number of leading zeros in value
AnnaBridge 165:d1b4690b3f8b 216 */
AnnaBridge 165:d1b4690b3f8b 217 #define __CLZ (uint8_t)__builtin_clz
AnnaBridge 165:d1b4690b3f8b 218
AnnaBridge 165:d1b4690b3f8b 219 /**
AnnaBridge 165:d1b4690b3f8b 220 \brief LDR Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 221 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 165:d1b4690b3f8b 222 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 223 \return value of type uint8_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 224 */
AnnaBridge 165:d1b4690b3f8b 225 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 226
AnnaBridge 165:d1b4690b3f8b 227
AnnaBridge 165:d1b4690b3f8b 228 /**
AnnaBridge 165:d1b4690b3f8b 229 \brief LDR Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 230 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 231 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 232 \return value of type uint16_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 233 */
AnnaBridge 165:d1b4690b3f8b 234 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 235
AnnaBridge 165:d1b4690b3f8b 236 /**
AnnaBridge 165:d1b4690b3f8b 237 \brief LDR Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 238 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 239 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 240 \return value of type uint32_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 241 */
AnnaBridge 165:d1b4690b3f8b 242 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 243
AnnaBridge 165:d1b4690b3f8b 244 /**
AnnaBridge 165:d1b4690b3f8b 245 \brief STR Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 246 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 165:d1b4690b3f8b 247 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 248 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 249 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 250 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 251 */
AnnaBridge 165:d1b4690b3f8b 252 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 253
AnnaBridge 165:d1b4690b3f8b 254 /**
AnnaBridge 165:d1b4690b3f8b 255 \brief STR Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 256 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 257 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 258 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 259 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 260 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 261 */
AnnaBridge 165:d1b4690b3f8b 262 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 263
AnnaBridge 165:d1b4690b3f8b 264 /**
AnnaBridge 165:d1b4690b3f8b 265 \brief STR Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 266 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 267 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 268 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 269 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 270 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 271 */
AnnaBridge 165:d1b4690b3f8b 272 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 273
AnnaBridge 165:d1b4690b3f8b 274 /**
AnnaBridge 165:d1b4690b3f8b 275 \brief Remove the exclusive lock
AnnaBridge 165:d1b4690b3f8b 276 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 165:d1b4690b3f8b 277 */
AnnaBridge 165:d1b4690b3f8b 278 #define __CLREX __builtin_arm_clrex
AnnaBridge 165:d1b4690b3f8b 279
AnnaBridge 165:d1b4690b3f8b 280 /**
AnnaBridge 165:d1b4690b3f8b 281 \brief Signed Saturate
AnnaBridge 165:d1b4690b3f8b 282 \details Saturates a signed value.
AnnaBridge 165:d1b4690b3f8b 283 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 284 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 165:d1b4690b3f8b 285 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 286 */
AnnaBridge 165:d1b4690b3f8b 287 #define __SSAT __builtin_arm_ssat
AnnaBridge 165:d1b4690b3f8b 288
AnnaBridge 165:d1b4690b3f8b 289 /**
AnnaBridge 165:d1b4690b3f8b 290 \brief Unsigned Saturate
AnnaBridge 165:d1b4690b3f8b 291 \details Saturates an unsigned value.
AnnaBridge 165:d1b4690b3f8b 292 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 293 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 165:d1b4690b3f8b 294 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 295 */
AnnaBridge 165:d1b4690b3f8b 296 #define __USAT __builtin_arm_usat
AnnaBridge 165:d1b4690b3f8b 297
AnnaBridge 165:d1b4690b3f8b 298
AnnaBridge 165:d1b4690b3f8b 299 /* ########################### Core Function Access ########################### */
AnnaBridge 165:d1b4690b3f8b 300
AnnaBridge 165:d1b4690b3f8b 301 /**
AnnaBridge 165:d1b4690b3f8b 302 \brief Get FPSCR
AnnaBridge 165:d1b4690b3f8b 303 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 165:d1b4690b3f8b 304 \return Floating Point Status/Control register value
AnnaBridge 165:d1b4690b3f8b 305 */
AnnaBridge 165:d1b4690b3f8b 306 #define __get_FPSCR __builtin_arm_get_fpscr
AnnaBridge 165:d1b4690b3f8b 307
AnnaBridge 165:d1b4690b3f8b 308 /**
AnnaBridge 165:d1b4690b3f8b 309 \brief Set FPSCR
AnnaBridge 165:d1b4690b3f8b 310 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 165:d1b4690b3f8b 311 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 165:d1b4690b3f8b 312 */
AnnaBridge 165:d1b4690b3f8b 313 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 165:d1b4690b3f8b 314
AnnaBridge 165:d1b4690b3f8b 315 /** \brief Get CPSR Register
AnnaBridge 165:d1b4690b3f8b 316 \return CPSR Register value
AnnaBridge 165:d1b4690b3f8b 317 */
AnnaBridge 165:d1b4690b3f8b 318 __STATIC_FORCEINLINE uint32_t __get_CPSR(void)
AnnaBridge 165:d1b4690b3f8b 319 {
AnnaBridge 165:d1b4690b3f8b 320 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 321 __ASM volatile("MRS %0, cpsr" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 322 return(result);
AnnaBridge 165:d1b4690b3f8b 323 }
AnnaBridge 165:d1b4690b3f8b 324
AnnaBridge 165:d1b4690b3f8b 325 /** \brief Set CPSR Register
AnnaBridge 165:d1b4690b3f8b 326 \param [in] cpsr CPSR value to set
AnnaBridge 165:d1b4690b3f8b 327 */
AnnaBridge 165:d1b4690b3f8b 328 __STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
AnnaBridge 165:d1b4690b3f8b 329 {
AnnaBridge 165:d1b4690b3f8b 330 __ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "memory");
AnnaBridge 165:d1b4690b3f8b 331 }
AnnaBridge 165:d1b4690b3f8b 332
AnnaBridge 165:d1b4690b3f8b 333 /** \brief Get Mode
AnnaBridge 165:d1b4690b3f8b 334 \return Processor Mode
AnnaBridge 165:d1b4690b3f8b 335 */
AnnaBridge 165:d1b4690b3f8b 336 __STATIC_FORCEINLINE uint32_t __get_mode(void)
AnnaBridge 165:d1b4690b3f8b 337 {
AnnaBridge 165:d1b4690b3f8b 338 return (__get_CPSR() & 0x1FU);
AnnaBridge 165:d1b4690b3f8b 339 }
AnnaBridge 165:d1b4690b3f8b 340
AnnaBridge 165:d1b4690b3f8b 341 /** \brief Set Mode
AnnaBridge 165:d1b4690b3f8b 342 \param [in] mode Mode value to set
AnnaBridge 165:d1b4690b3f8b 343 */
AnnaBridge 165:d1b4690b3f8b 344 __STATIC_FORCEINLINE void __set_mode(uint32_t mode)
AnnaBridge 165:d1b4690b3f8b 345 {
AnnaBridge 165:d1b4690b3f8b 346 __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
AnnaBridge 165:d1b4690b3f8b 347 }
AnnaBridge 165:d1b4690b3f8b 348
AnnaBridge 165:d1b4690b3f8b 349 /** \brief Get Stack Pointer
AnnaBridge 165:d1b4690b3f8b 350 \return Stack Pointer value
AnnaBridge 165:d1b4690b3f8b 351 */
AnnaBridge 165:d1b4690b3f8b 352 __STATIC_FORCEINLINE uint32_t __get_SP()
AnnaBridge 165:d1b4690b3f8b 353 {
AnnaBridge 165:d1b4690b3f8b 354 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 355 __ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
AnnaBridge 165:d1b4690b3f8b 356 return result;
AnnaBridge 165:d1b4690b3f8b 357 }
AnnaBridge 165:d1b4690b3f8b 358
AnnaBridge 165:d1b4690b3f8b 359 /** \brief Set Stack Pointer
AnnaBridge 165:d1b4690b3f8b 360 \param [in] stack Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 361 */
AnnaBridge 165:d1b4690b3f8b 362 __STATIC_FORCEINLINE void __set_SP(uint32_t stack)
AnnaBridge 165:d1b4690b3f8b 363 {
AnnaBridge 165:d1b4690b3f8b 364 __ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
AnnaBridge 165:d1b4690b3f8b 365 }
AnnaBridge 165:d1b4690b3f8b 366
AnnaBridge 165:d1b4690b3f8b 367 /** \brief Get USR/SYS Stack Pointer
AnnaBridge 165:d1b4690b3f8b 368 \return USR/SYS Stack Pointer value
AnnaBridge 165:d1b4690b3f8b 369 */
AnnaBridge 165:d1b4690b3f8b 370 __STATIC_FORCEINLINE uint32_t __get_SP_usr()
AnnaBridge 165:d1b4690b3f8b 371 {
AnnaBridge 165:d1b4690b3f8b 372 uint32_t cpsr;
AnnaBridge 165:d1b4690b3f8b 373 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 374 __ASM volatile(
AnnaBridge 165:d1b4690b3f8b 375 "MRS %0, cpsr \n"
AnnaBridge 165:d1b4690b3f8b 376 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 165:d1b4690b3f8b 377 "MOV %1, sp \n"
AnnaBridge 165:d1b4690b3f8b 378 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 165:d1b4690b3f8b 379 "ISB" : "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory"
AnnaBridge 165:d1b4690b3f8b 380 );
AnnaBridge 165:d1b4690b3f8b 381 return result;
AnnaBridge 165:d1b4690b3f8b 382 }
AnnaBridge 165:d1b4690b3f8b 383
AnnaBridge 165:d1b4690b3f8b 384 /** \brief Set USR/SYS Stack Pointer
AnnaBridge 165:d1b4690b3f8b 385 \param [in] topOfProcStack USR/SYS Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 386 */
AnnaBridge 165:d1b4690b3f8b 387 __STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
AnnaBridge 165:d1b4690b3f8b 388 {
AnnaBridge 165:d1b4690b3f8b 389 uint32_t cpsr;
AnnaBridge 165:d1b4690b3f8b 390 __ASM volatile(
AnnaBridge 165:d1b4690b3f8b 391 "MRS %0, cpsr \n"
AnnaBridge 165:d1b4690b3f8b 392 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 165:d1b4690b3f8b 393 "MOV sp, %1 \n"
AnnaBridge 165:d1b4690b3f8b 394 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 165:d1b4690b3f8b 395 "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory"
AnnaBridge 165:d1b4690b3f8b 396 );
AnnaBridge 165:d1b4690b3f8b 397 }
AnnaBridge 165:d1b4690b3f8b 398
AnnaBridge 165:d1b4690b3f8b 399 /** \brief Get FPEXC
AnnaBridge 165:d1b4690b3f8b 400 \return Floating Point Exception Control register value
AnnaBridge 165:d1b4690b3f8b 401 */
AnnaBridge 165:d1b4690b3f8b 402 __STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
AnnaBridge 165:d1b4690b3f8b 403 {
AnnaBridge 165:d1b4690b3f8b 404 #if (__FPU_PRESENT == 1)
AnnaBridge 165:d1b4690b3f8b 405 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 406 __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
AnnaBridge 165:d1b4690b3f8b 407 return(result);
AnnaBridge 165:d1b4690b3f8b 408 #else
AnnaBridge 165:d1b4690b3f8b 409 return(0);
AnnaBridge 165:d1b4690b3f8b 410 #endif
AnnaBridge 165:d1b4690b3f8b 411 }
AnnaBridge 165:d1b4690b3f8b 412
AnnaBridge 165:d1b4690b3f8b 413 /** \brief Set FPEXC
AnnaBridge 165:d1b4690b3f8b 414 \param [in] fpexc Floating Point Exception Control value to set
AnnaBridge 165:d1b4690b3f8b 415 */
AnnaBridge 165:d1b4690b3f8b 416 __STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
AnnaBridge 165:d1b4690b3f8b 417 {
AnnaBridge 165:d1b4690b3f8b 418 #if (__FPU_PRESENT == 1)
AnnaBridge 165:d1b4690b3f8b 419 __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
AnnaBridge 165:d1b4690b3f8b 420 #endif
AnnaBridge 165:d1b4690b3f8b 421 }
AnnaBridge 165:d1b4690b3f8b 422
AnnaBridge 165:d1b4690b3f8b 423 /*
AnnaBridge 165:d1b4690b3f8b 424 * Include common core functions to access Coprocessor 15 registers
AnnaBridge 165:d1b4690b3f8b 425 */
AnnaBridge 165:d1b4690b3f8b 426
AnnaBridge 165:d1b4690b3f8b 427 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
AnnaBridge 165:d1b4690b3f8b 428 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
AnnaBridge 165:d1b4690b3f8b 429 #define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
AnnaBridge 165:d1b4690b3f8b 430 #define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
AnnaBridge 165:d1b4690b3f8b 431
AnnaBridge 165:d1b4690b3f8b 432 #include "cmsis_cp15.h"
AnnaBridge 165:d1b4690b3f8b 433
AnnaBridge 165:d1b4690b3f8b 434 /** \brief Enable Floating Point Unit
AnnaBridge 165:d1b4690b3f8b 435
AnnaBridge 165:d1b4690b3f8b 436 Critical section, called from undef handler, so systick is disabled
AnnaBridge 165:d1b4690b3f8b 437 */
AnnaBridge 165:d1b4690b3f8b 438 __STATIC_INLINE void __FPU_Enable(void)
AnnaBridge 165:d1b4690b3f8b 439 {
AnnaBridge 165:d1b4690b3f8b 440 __ASM volatile(
AnnaBridge 165:d1b4690b3f8b 441 //Permit access to VFP/NEON, registers by modifying CPACR
AnnaBridge 165:d1b4690b3f8b 442 " MRC p15,0,R1,c1,c0,2 \n"
AnnaBridge 165:d1b4690b3f8b 443 " ORR R1,R1,#0x00F00000 \n"
AnnaBridge 165:d1b4690b3f8b 444 " MCR p15,0,R1,c1,c0,2 \n"
AnnaBridge 165:d1b4690b3f8b 445
AnnaBridge 165:d1b4690b3f8b 446 //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
AnnaBridge 165:d1b4690b3f8b 447 " ISB \n"
AnnaBridge 165:d1b4690b3f8b 448
AnnaBridge 165:d1b4690b3f8b 449 //Enable VFP/NEON
AnnaBridge 165:d1b4690b3f8b 450 " VMRS R1,FPEXC \n"
AnnaBridge 165:d1b4690b3f8b 451 " ORR R1,R1,#0x40000000 \n"
AnnaBridge 165:d1b4690b3f8b 452 " VMSR FPEXC,R1 \n"
AnnaBridge 165:d1b4690b3f8b 453
AnnaBridge 165:d1b4690b3f8b 454 //Initialise VFP/NEON registers to 0
AnnaBridge 165:d1b4690b3f8b 455 " MOV R2,#0 \n"
AnnaBridge 165:d1b4690b3f8b 456
AnnaBridge 165:d1b4690b3f8b 457 //Initialise D16 registers to 0
AnnaBridge 165:d1b4690b3f8b 458 " VMOV D0, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 459 " VMOV D1, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 460 " VMOV D2, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 461 " VMOV D3, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 462 " VMOV D4, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 463 " VMOV D5, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 464 " VMOV D6, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 465 " VMOV D7, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 466 " VMOV D8, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 467 " VMOV D9, R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 468 " VMOV D10,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 469 " VMOV D11,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 470 " VMOV D12,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 471 " VMOV D13,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 472 " VMOV D14,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 473 " VMOV D15,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 474
AnnaBridge 165:d1b4690b3f8b 475 #if __ARM_NEON == 1
AnnaBridge 165:d1b4690b3f8b 476 //Initialise D32 registers to 0
AnnaBridge 165:d1b4690b3f8b 477 " VMOV D16,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 478 " VMOV D17,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 479 " VMOV D18,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 480 " VMOV D19,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 481 " VMOV D20,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 482 " VMOV D21,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 483 " VMOV D22,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 484 " VMOV D23,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 485 " VMOV D24,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 486 " VMOV D25,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 487 " VMOV D26,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 488 " VMOV D27,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 489 " VMOV D28,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 490 " VMOV D29,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 491 " VMOV D30,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 492 " VMOV D31,R2,R2 \n"
AnnaBridge 165:d1b4690b3f8b 493 #endif
AnnaBridge 165:d1b4690b3f8b 494
AnnaBridge 165:d1b4690b3f8b 495 //Initialise FPSCR to a known state
AnnaBridge 165:d1b4690b3f8b 496 " VMRS R2,FPSCR \n"
AnnaBridge 165:d1b4690b3f8b 497 " LDR R3,=0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
AnnaBridge 165:d1b4690b3f8b 498 " AND R2,R2,R3 \n"
AnnaBridge 165:d1b4690b3f8b 499 " VMSR FPSCR,R2 "
AnnaBridge 165:d1b4690b3f8b 500 );
AnnaBridge 165:d1b4690b3f8b 501 }
AnnaBridge 165:d1b4690b3f8b 502
AnnaBridge 165:d1b4690b3f8b 503 #endif /* __CMSIS_ARMCLANG_H */