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TARGET_SAMD21J18A/cmsis_armclang.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:: Anna Bridge
Date:: Fri Apr 20 11:08:29 2018 +0100
Revision:: 166:5aab5a7997ee
Parent:: 160:5571c4ff569f
Child:: 169:a7c7b631e539

Updating mbed 2 version number

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/************************************************************************//
AnnaBridge	145:64910690c574	2	* @file cmsis_armclang.h
AnnaBridge	145:64910690c574	3	* @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge	145:64910690c574	4	* @version V5.0.3
AnnaBridge	145:64910690c574	5	* @date 27. March 2017
AnnaBridge	145:64910690c574	6	******************************************************************************/
AnnaBridge	145:64910690c574	7	/*
AnnaBridge	145:64910690c574	8	* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge	145:64910690c574	9	*
AnnaBridge	145:64910690c574	10	* SPDX-License-Identifier: Apache-2.0
AnnaBridge	145:64910690c574	11	*
AnnaBridge	145:64910690c574	12	* Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge	145:64910690c574	13	* not use this file except in compliance with the License.
AnnaBridge	145:64910690c574	14	* You may obtain a copy of the License at
AnnaBridge	145:64910690c574	15	*
AnnaBridge	145:64910690c574	16	* www.apache.org/licenses/LICENSE-2.0
AnnaBridge	145:64910690c574	17	*
AnnaBridge	145:64910690c574	18	* Unless required by applicable law or agreed to in writing, software
AnnaBridge	145:64910690c574	19	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge	145:64910690c574	20	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge	145:64910690c574	21	* See the License for the specific language governing permissions and
AnnaBridge	145:64910690c574	22	* limitations under the License.
AnnaBridge	145:64910690c574	23	*/
AnnaBridge	145:64910690c574	24
Anna Bridge	160:5571c4ff569f	25	/lint -esym(9058, IRQn)/ /* disable MISRA 2012 Rule 2.4 for IRQn */
AnnaBridge	145:64910690c574	26
AnnaBridge	145:64910690c574	27	#ifndef __CMSIS_ARMCLANG_H
AnnaBridge	145:64910690c574	28	#define __CMSIS_ARMCLANG_H
AnnaBridge	145:64910690c574	29
AnnaBridge	145:64910690c574	30	#ifndef __ARM_COMPAT_H
AnnaBridge	145:64910690c574	31	#include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge	145:64910690c574	32	#endif
AnnaBridge	145:64910690c574	33
AnnaBridge	145:64910690c574	34	/* CMSIS compiler specific defines */
AnnaBridge	145:64910690c574	35	#ifndef __ASM
AnnaBridge	145:64910690c574	36	#define __ASM __asm
AnnaBridge	145:64910690c574	37	#endif
AnnaBridge	145:64910690c574	38	#ifndef __INLINE
AnnaBridge	145:64910690c574	39	#define __INLINE __inline
AnnaBridge	145:64910690c574	40	#endif
AnnaBridge	145:64910690c574	41	#ifndef __STATIC_INLINE
AnnaBridge	145:64910690c574	42	#define __STATIC_INLINE static __inline
AnnaBridge	145:64910690c574	43	#endif
AnnaBridge	145:64910690c574	44	#ifndef __NO_RETURN
AnnaBridge	145:64910690c574	45	#define __NO_RETURN __attribute__((noreturn))
AnnaBridge	145:64910690c574	46	#endif
AnnaBridge	145:64910690c574	47	#ifndef __USED
AnnaBridge	145:64910690c574	48	#define __USED __attribute__((used))
AnnaBridge	145:64910690c574	49	#endif
AnnaBridge	145:64910690c574	50	#ifndef __WEAK
AnnaBridge	145:64910690c574	51	#define __WEAK __attribute__((weak))
AnnaBridge	145:64910690c574	52	#endif
AnnaBridge	145:64910690c574	53	#ifndef __PACKED
AnnaBridge	145:64910690c574	54	#define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge	145:64910690c574	55	#endif
AnnaBridge	145:64910690c574	56	#ifndef __PACKED_STRUCT
AnnaBridge	145:64910690c574	57	#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge	145:64910690c574	58	#endif
Anna Bridge	160:5571c4ff569f	59	#ifndef __PACKED_UNION
Anna Bridge	160:5571c4ff569f	60	#define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge	160:5571c4ff569f	61	#endif
AnnaBridge	145:64910690c574	62	#ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge	145:64910690c574	63	#pragma clang diagnostic push
AnnaBridge	145:64910690c574	64	#pragma clang diagnostic ignored "-Wpacked"
Anna Bridge	160:5571c4ff569f	65	/lint -esym(9058, T_UINT32)/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
AnnaBridge	145:64910690c574	66	struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge	145:64910690c574	67	#pragma clang diagnostic pop
AnnaBridge	145:64910690c574	68	#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge	145:64910690c574	69	#endif
AnnaBridge	145:64910690c574	70	#ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge	145:64910690c574	71	#pragma clang diagnostic push
AnnaBridge	145:64910690c574	72	#pragma clang diagnostic ignored "-Wpacked"
Anna Bridge	160:5571c4ff569f	73	/lint -esym(9058, T_UINT16_WRITE)/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge	145:64910690c574	74	__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge	145:64910690c574	75	#pragma clang diagnostic pop
AnnaBridge	145:64910690c574	76	#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE )(void )(addr))->v) = (val))
AnnaBridge	145:64910690c574	77	#endif
AnnaBridge	145:64910690c574	78	#ifndef __UNALIGNED_UINT16_READ
AnnaBridge	145:64910690c574	79	#pragma clang diagnostic push
AnnaBridge	145:64910690c574	80	#pragma clang diagnostic ignored "-Wpacked"
Anna Bridge	160:5571c4ff569f	81	/lint -esym(9058, T_UINT16_READ)/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge	145:64910690c574	82	__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge	145:64910690c574	83	#pragma clang diagnostic pop
AnnaBridge	145:64910690c574	84	#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ )(const void )(addr))->v)
AnnaBridge	145:64910690c574	85	#endif
AnnaBridge	145:64910690c574	86	#ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge	145:64910690c574	87	#pragma clang diagnostic push
AnnaBridge	145:64910690c574	88	#pragma clang diagnostic ignored "-Wpacked"
Anna Bridge	160:5571c4ff569f	89	/lint -esym(9058, T_UINT32_WRITE)/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge	145:64910690c574	90	__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge	145:64910690c574	91	#pragma clang diagnostic pop
AnnaBridge	145:64910690c574	92	#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE )(void )(addr))->v) = (val))
AnnaBridge	145:64910690c574	93	#endif
AnnaBridge	145:64910690c574	94	#ifndef __UNALIGNED_UINT32_READ
AnnaBridge	145:64910690c574	95	#pragma clang diagnostic push
AnnaBridge	145:64910690c574	96	#pragma clang diagnostic ignored "-Wpacked"
Anna Bridge	160:5571c4ff569f	97	/lint -esym(9058, T_UINT32_READ)/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
AnnaBridge	145:64910690c574	98	__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge	145:64910690c574	99	#pragma clang diagnostic pop
AnnaBridge	145:64910690c574	100	#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ )(const void )(addr))->v)
AnnaBridge	145:64910690c574	101	#endif
AnnaBridge	145:64910690c574	102	#ifndef __ALIGNED
AnnaBridge	145:64910690c574	103	#define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge	145:64910690c574	104	#endif
Anna Bridge	160:5571c4ff569f	105	#ifndef __RESTRICT
Anna Bridge	160:5571c4ff569f	106	#define __RESTRICT __restrict
Anna Bridge	160:5571c4ff569f	107	#endif
AnnaBridge	145:64910690c574	108
AnnaBridge	145:64910690c574	109
AnnaBridge	145:64910690c574	110	/* ########################### Core Function Access ########################### */
AnnaBridge	145:64910690c574	111	/** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge	145:64910690c574	112	\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge	145:64910690c574	113	@{
AnnaBridge	145:64910690c574	114	*/
AnnaBridge	145:64910690c574	115
AnnaBridge	145:64910690c574	116	/**
AnnaBridge	145:64910690c574	117	\brief Enable IRQ Interrupts
AnnaBridge	145:64910690c574	118	\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge	145:64910690c574	119	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	120	*/
AnnaBridge	145:64910690c574	121	/* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge	145:64910690c574	122
AnnaBridge	145:64910690c574	123
AnnaBridge	145:64910690c574	124	/**
AnnaBridge	145:64910690c574	125	\brief Disable IRQ Interrupts
AnnaBridge	145:64910690c574	126	\details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge	145:64910690c574	127	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	128	*/
AnnaBridge	145:64910690c574	129	/* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge	145:64910690c574	130
AnnaBridge	145:64910690c574	131
AnnaBridge	145:64910690c574	132	/**
AnnaBridge	145:64910690c574	133	\brief Get Control Register
AnnaBridge	145:64910690c574	134	\details Returns the content of the Control Register.
AnnaBridge	145:64910690c574	135	\return Control Register value
AnnaBridge	145:64910690c574	136	*/
AnnaBridge	145:64910690c574	137	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge	145:64910690c574	138	{
AnnaBridge	145:64910690c574	139	uint32_t result;
AnnaBridge	145:64910690c574	140
AnnaBridge	145:64910690c574	141	__ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge	145:64910690c574	142	return(result);
AnnaBridge	145:64910690c574	143	}
AnnaBridge	145:64910690c574	144
AnnaBridge	145:64910690c574	145
AnnaBridge	145:64910690c574	146	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	147	/**
AnnaBridge	145:64910690c574	148	\brief Get Control Register (non-secure)
AnnaBridge	145:64910690c574	149	\details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge	145:64910690c574	150	\return non-secure Control Register value
AnnaBridge	145:64910690c574	151	*/
AnnaBridge	145:64910690c574	152	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge	145:64910690c574	153	{
AnnaBridge	145:64910690c574	154	uint32_t result;
AnnaBridge	145:64910690c574	155
AnnaBridge	145:64910690c574	156	__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	157	return(result);
AnnaBridge	145:64910690c574	158	}
AnnaBridge	145:64910690c574	159	#endif
AnnaBridge	145:64910690c574	160
AnnaBridge	145:64910690c574	161
AnnaBridge	145:64910690c574	162	/**
AnnaBridge	145:64910690c574	163	\brief Set Control Register
AnnaBridge	145:64910690c574	164	\details Writes the given value to the Control Register.
AnnaBridge	145:64910690c574	165	\param [in] control Control Register value to set
AnnaBridge	145:64910690c574	166	*/
AnnaBridge	145:64910690c574	167	__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge	145:64910690c574	168	{
AnnaBridge	145:64910690c574	169	__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge	145:64910690c574	170	}
AnnaBridge	145:64910690c574	171
AnnaBridge	145:64910690c574	172
AnnaBridge	145:64910690c574	173	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	174	/**
AnnaBridge	145:64910690c574	175	\brief Set Control Register (non-secure)
AnnaBridge	145:64910690c574	176	\details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge	145:64910690c574	177	\param [in] control Control Register value to set
AnnaBridge	145:64910690c574	178	*/
AnnaBridge	145:64910690c574	179	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge	145:64910690c574	180	{
AnnaBridge	145:64910690c574	181	__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge	145:64910690c574	182	}
AnnaBridge	145:64910690c574	183	#endif
AnnaBridge	145:64910690c574	184
AnnaBridge	145:64910690c574	185
AnnaBridge	145:64910690c574	186	/**
AnnaBridge	145:64910690c574	187	\brief Get IPSR Register
AnnaBridge	145:64910690c574	188	\details Returns the content of the IPSR Register.
AnnaBridge	145:64910690c574	189	\return IPSR Register value
AnnaBridge	145:64910690c574	190	*/
AnnaBridge	145:64910690c574	191	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge	145:64910690c574	192	{
AnnaBridge	145:64910690c574	193	uint32_t result;
AnnaBridge	145:64910690c574	194
AnnaBridge	145:64910690c574	195	__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge	145:64910690c574	196	return(result);
AnnaBridge	145:64910690c574	197	}
AnnaBridge	145:64910690c574	198
AnnaBridge	145:64910690c574	199
AnnaBridge	145:64910690c574	200	/**
AnnaBridge	145:64910690c574	201	\brief Get APSR Register
AnnaBridge	145:64910690c574	202	\details Returns the content of the APSR Register.
AnnaBridge	145:64910690c574	203	\return APSR Register value
AnnaBridge	145:64910690c574	204	*/
AnnaBridge	145:64910690c574	205	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge	145:64910690c574	206	{
AnnaBridge	145:64910690c574	207	uint32_t result;
AnnaBridge	145:64910690c574	208
AnnaBridge	145:64910690c574	209	__ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge	145:64910690c574	210	return(result);
AnnaBridge	145:64910690c574	211	}
AnnaBridge	145:64910690c574	212
AnnaBridge	145:64910690c574	213
AnnaBridge	145:64910690c574	214	/**
AnnaBridge	145:64910690c574	215	\brief Get xPSR Register
AnnaBridge	145:64910690c574	216	\details Returns the content of the xPSR Register.
AnnaBridge	145:64910690c574	217	\return xPSR Register value
AnnaBridge	145:64910690c574	218	*/
AnnaBridge	145:64910690c574	219	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge	145:64910690c574	220	{
AnnaBridge	145:64910690c574	221	uint32_t result;
AnnaBridge	145:64910690c574	222
AnnaBridge	145:64910690c574	223	__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge	145:64910690c574	224	return(result);
AnnaBridge	145:64910690c574	225	}
AnnaBridge	145:64910690c574	226
AnnaBridge	145:64910690c574	227
AnnaBridge	145:64910690c574	228	/**
AnnaBridge	145:64910690c574	229	\brief Get Process Stack Pointer
AnnaBridge	145:64910690c574	230	\details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge	145:64910690c574	231	\return PSP Register value
AnnaBridge	145:64910690c574	232	*/
AnnaBridge	145:64910690c574	233	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge	145:64910690c574	234	{
AnnaBridge	145:64910690c574	235	register uint32_t result;
AnnaBridge	145:64910690c574	236
AnnaBridge	145:64910690c574	237	__ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge	145:64910690c574	238	return(result);
AnnaBridge	145:64910690c574	239	}
AnnaBridge	145:64910690c574	240
AnnaBridge	145:64910690c574	241
AnnaBridge	145:64910690c574	242	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	243	/**
AnnaBridge	145:64910690c574	244	\brief Get Process Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	245	\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	145:64910690c574	246	\return PSP Register value
AnnaBridge	145:64910690c574	247	*/
AnnaBridge	145:64910690c574	248	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge	145:64910690c574	249	{
AnnaBridge	145:64910690c574	250	register uint32_t result;
AnnaBridge	145:64910690c574	251
AnnaBridge	145:64910690c574	252	__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	253	return(result);
AnnaBridge	145:64910690c574	254	}
AnnaBridge	145:64910690c574	255	#endif
AnnaBridge	145:64910690c574	256
AnnaBridge	145:64910690c574	257
AnnaBridge	145:64910690c574	258	/**
AnnaBridge	145:64910690c574	259	\brief Set Process Stack Pointer
AnnaBridge	145:64910690c574	260	\details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge	145:64910690c574	261	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	145:64910690c574	262	*/
AnnaBridge	145:64910690c574	263	__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge	145:64910690c574	264	{
AnnaBridge	145:64910690c574	265	__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge	145:64910690c574	266	}
AnnaBridge	145:64910690c574	267
AnnaBridge	145:64910690c574	268
AnnaBridge	145:64910690c574	269	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	270	/**
AnnaBridge	145:64910690c574	271	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	272	\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	145:64910690c574	273	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	145:64910690c574	274	*/
AnnaBridge	145:64910690c574	275	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge	145:64910690c574	276	{
AnnaBridge	145:64910690c574	277	__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge	145:64910690c574	278	}
AnnaBridge	145:64910690c574	279	#endif
AnnaBridge	145:64910690c574	280
AnnaBridge	145:64910690c574	281
AnnaBridge	145:64910690c574	282	/**
AnnaBridge	145:64910690c574	283	\brief Get Main Stack Pointer
AnnaBridge	145:64910690c574	284	\details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge	145:64910690c574	285	\return MSP Register value
AnnaBridge	145:64910690c574	286	*/
AnnaBridge	145:64910690c574	287	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge	145:64910690c574	288	{
AnnaBridge	145:64910690c574	289	register uint32_t result;
AnnaBridge	145:64910690c574	290
AnnaBridge	145:64910690c574	291	__ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge	145:64910690c574	292	return(result);
AnnaBridge	145:64910690c574	293	}
AnnaBridge	145:64910690c574	294
AnnaBridge	145:64910690c574	295
AnnaBridge	145:64910690c574	296	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	297	/**
AnnaBridge	145:64910690c574	298	\brief Get Main Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	299	\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	145:64910690c574	300	\return MSP Register value
AnnaBridge	145:64910690c574	301	*/
AnnaBridge	145:64910690c574	302	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge	145:64910690c574	303	{
AnnaBridge	145:64910690c574	304	register uint32_t result;
AnnaBridge	145:64910690c574	305
AnnaBridge	145:64910690c574	306	__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	307	return(result);
AnnaBridge	145:64910690c574	308	}
AnnaBridge	145:64910690c574	309	#endif
AnnaBridge	145:64910690c574	310
AnnaBridge	145:64910690c574	311
AnnaBridge	145:64910690c574	312	/**
AnnaBridge	145:64910690c574	313	\brief Set Main Stack Pointer
AnnaBridge	145:64910690c574	314	\details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge	145:64910690c574	315	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	145:64910690c574	316	*/
AnnaBridge	145:64910690c574	317	__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge	145:64910690c574	318	{
AnnaBridge	145:64910690c574	319	__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge	145:64910690c574	320	}
AnnaBridge	145:64910690c574	321
AnnaBridge	145:64910690c574	322
AnnaBridge	145:64910690c574	323	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	324	/**
AnnaBridge	145:64910690c574	325	\brief Set Main Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	326	\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	145:64910690c574	327	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	145:64910690c574	328	*/
AnnaBridge	145:64910690c574	329	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge	145:64910690c574	330	{
AnnaBridge	145:64910690c574	331	__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge	145:64910690c574	332	}
AnnaBridge	145:64910690c574	333	#endif
AnnaBridge	145:64910690c574	334
AnnaBridge	145:64910690c574	335
AnnaBridge	145:64910690c574	336	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	337	/**
AnnaBridge	145:64910690c574	338	\brief Get Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	339	\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	145:64910690c574	340	\return SP Register value
AnnaBridge	145:64910690c574	341	*/
AnnaBridge	145:64910690c574	342	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge	145:64910690c574	343	{
AnnaBridge	145:64910690c574	344	register uint32_t result;
AnnaBridge	145:64910690c574	345
AnnaBridge	145:64910690c574	346	__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	347	return(result);
AnnaBridge	145:64910690c574	348	}
AnnaBridge	145:64910690c574	349
AnnaBridge	145:64910690c574	350
AnnaBridge	145:64910690c574	351	/**
AnnaBridge	145:64910690c574	352	\brief Set Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	353	\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	145:64910690c574	354	\param [in] topOfStack Stack Pointer value to set
AnnaBridge	145:64910690c574	355	*/
AnnaBridge	145:64910690c574	356	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge	145:64910690c574	357	{
AnnaBridge	145:64910690c574	358	__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge	145:64910690c574	359	}
AnnaBridge	145:64910690c574	360	#endif
AnnaBridge	145:64910690c574	361
AnnaBridge	145:64910690c574	362
AnnaBridge	145:64910690c574	363	/**
AnnaBridge	145:64910690c574	364	\brief Get Priority Mask
AnnaBridge	145:64910690c574	365	\details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge	145:64910690c574	366	\return Priority Mask value
AnnaBridge	145:64910690c574	367	*/
AnnaBridge	145:64910690c574	368	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge	145:64910690c574	369	{
AnnaBridge	145:64910690c574	370	uint32_t result;
AnnaBridge	145:64910690c574	371
AnnaBridge	145:64910690c574	372	__ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge	145:64910690c574	373	return(result);
AnnaBridge	145:64910690c574	374	}
AnnaBridge	145:64910690c574	375
AnnaBridge	145:64910690c574	376
AnnaBridge	145:64910690c574	377	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	378	/**
AnnaBridge	145:64910690c574	379	\brief Get Priority Mask (non-secure)
AnnaBridge	145:64910690c574	380	\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge	145:64910690c574	381	\return Priority Mask value
AnnaBridge	145:64910690c574	382	*/
AnnaBridge	145:64910690c574	383	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge	145:64910690c574	384	{
AnnaBridge	145:64910690c574	385	uint32_t result;
AnnaBridge	145:64910690c574	386
AnnaBridge	145:64910690c574	387	__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	388	return(result);
AnnaBridge	145:64910690c574	389	}
AnnaBridge	145:64910690c574	390	#endif
AnnaBridge	145:64910690c574	391
AnnaBridge	145:64910690c574	392
AnnaBridge	145:64910690c574	393	/**
AnnaBridge	145:64910690c574	394	\brief Set Priority Mask
AnnaBridge	145:64910690c574	395	\details Assigns the given value to the Priority Mask Register.
AnnaBridge	145:64910690c574	396	\param [in] priMask Priority Mask
AnnaBridge	145:64910690c574	397	*/
AnnaBridge	145:64910690c574	398	__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge	145:64910690c574	399	{
AnnaBridge	145:64910690c574	400	__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge	145:64910690c574	401	}
AnnaBridge	145:64910690c574	402
AnnaBridge	145:64910690c574	403
AnnaBridge	145:64910690c574	404	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	405	/**
AnnaBridge	145:64910690c574	406	\brief Set Priority Mask (non-secure)
AnnaBridge	145:64910690c574	407	\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge	145:64910690c574	408	\param [in] priMask Priority Mask
AnnaBridge	145:64910690c574	409	*/
AnnaBridge	145:64910690c574	410	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge	145:64910690c574	411	{
AnnaBridge	145:64910690c574	412	__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge	145:64910690c574	413	}
AnnaBridge	145:64910690c574	414	#endif
AnnaBridge	145:64910690c574	415
AnnaBridge	145:64910690c574	416
AnnaBridge	145:64910690c574	417	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	418	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	419	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	420	/**
AnnaBridge	145:64910690c574	421	\brief Enable FIQ
AnnaBridge	145:64910690c574	422	\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge	145:64910690c574	423	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	424	*/
AnnaBridge	145:64910690c574	425	#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge	145:64910690c574	426
AnnaBridge	145:64910690c574	427
AnnaBridge	145:64910690c574	428	/**
AnnaBridge	145:64910690c574	429	\brief Disable FIQ
AnnaBridge	145:64910690c574	430	\details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge	145:64910690c574	431	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	432	*/
AnnaBridge	145:64910690c574	433	#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge	145:64910690c574	434
AnnaBridge	145:64910690c574	435
AnnaBridge	145:64910690c574	436	/**
AnnaBridge	145:64910690c574	437	\brief Get Base Priority
AnnaBridge	145:64910690c574	438	\details Returns the current value of the Base Priority register.
AnnaBridge	145:64910690c574	439	\return Base Priority register value
AnnaBridge	145:64910690c574	440	*/
AnnaBridge	145:64910690c574	441	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge	145:64910690c574	442	{
AnnaBridge	145:64910690c574	443	uint32_t result;
AnnaBridge	145:64910690c574	444
AnnaBridge	145:64910690c574	445	__ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge	145:64910690c574	446	return(result);
AnnaBridge	145:64910690c574	447	}
AnnaBridge	145:64910690c574	448
AnnaBridge	145:64910690c574	449
AnnaBridge	145:64910690c574	450	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	451	/**
AnnaBridge	145:64910690c574	452	\brief Get Base Priority (non-secure)
AnnaBridge	145:64910690c574	453	\details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge	145:64910690c574	454	\return Base Priority register value
AnnaBridge	145:64910690c574	455	*/
AnnaBridge	145:64910690c574	456	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge	145:64910690c574	457	{
AnnaBridge	145:64910690c574	458	uint32_t result;
AnnaBridge	145:64910690c574	459
AnnaBridge	145:64910690c574	460	__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	461	return(result);
AnnaBridge	145:64910690c574	462	}
AnnaBridge	145:64910690c574	463	#endif
AnnaBridge	145:64910690c574	464
AnnaBridge	145:64910690c574	465
AnnaBridge	145:64910690c574	466	/**
AnnaBridge	145:64910690c574	467	\brief Set Base Priority
AnnaBridge	145:64910690c574	468	\details Assigns the given value to the Base Priority register.
AnnaBridge	145:64910690c574	469	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	470	*/
AnnaBridge	145:64910690c574	471	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge	145:64910690c574	472	{
AnnaBridge	145:64910690c574	473	__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	474	}
AnnaBridge	145:64910690c574	475
AnnaBridge	145:64910690c574	476
AnnaBridge	145:64910690c574	477	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	478	/**
AnnaBridge	145:64910690c574	479	\brief Set Base Priority (non-secure)
AnnaBridge	145:64910690c574	480	\details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge	145:64910690c574	481	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	482	*/
AnnaBridge	145:64910690c574	483	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge	145:64910690c574	484	{
AnnaBridge	145:64910690c574	485	__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	486	}
AnnaBridge	145:64910690c574	487	#endif
AnnaBridge	145:64910690c574	488
AnnaBridge	145:64910690c574	489
AnnaBridge	145:64910690c574	490	/**
AnnaBridge	145:64910690c574	491	\brief Set Base Priority with condition
AnnaBridge	145:64910690c574	492	\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge	145:64910690c574	493	or the new value increases the BASEPRI priority level.
AnnaBridge	145:64910690c574	494	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	495	*/
AnnaBridge	145:64910690c574	496	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge	145:64910690c574	497	{
AnnaBridge	145:64910690c574	498	__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	499	}
AnnaBridge	145:64910690c574	500
AnnaBridge	145:64910690c574	501
AnnaBridge	145:64910690c574	502	/**
AnnaBridge	145:64910690c574	503	\brief Get Fault Mask
AnnaBridge	145:64910690c574	504	\details Returns the current value of the Fault Mask register.
AnnaBridge	145:64910690c574	505	\return Fault Mask register value
AnnaBridge	145:64910690c574	506	*/
AnnaBridge	145:64910690c574	507	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge	145:64910690c574	508	{
AnnaBridge	145:64910690c574	509	uint32_t result;
AnnaBridge	145:64910690c574	510
AnnaBridge	145:64910690c574	511	__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge	145:64910690c574	512	return(result);
AnnaBridge	145:64910690c574	513	}
AnnaBridge	145:64910690c574	514
AnnaBridge	145:64910690c574	515
AnnaBridge	145:64910690c574	516	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	517	/**
AnnaBridge	145:64910690c574	518	\brief Get Fault Mask (non-secure)
AnnaBridge	145:64910690c574	519	\details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge	145:64910690c574	520	\return Fault Mask register value
AnnaBridge	145:64910690c574	521	*/
AnnaBridge	145:64910690c574	522	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge	145:64910690c574	523	{
AnnaBridge	145:64910690c574	524	uint32_t result;
AnnaBridge	145:64910690c574	525
AnnaBridge	145:64910690c574	526	__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	527	return(result);
AnnaBridge	145:64910690c574	528	}
AnnaBridge	145:64910690c574	529	#endif
AnnaBridge	145:64910690c574	530
AnnaBridge	145:64910690c574	531
AnnaBridge	145:64910690c574	532	/**
AnnaBridge	145:64910690c574	533	\brief Set Fault Mask
AnnaBridge	145:64910690c574	534	\details Assigns the given value to the Fault Mask register.
AnnaBridge	145:64910690c574	535	\param [in] faultMask Fault Mask value to set
AnnaBridge	145:64910690c574	536	*/
AnnaBridge	145:64910690c574	537	__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge	145:64910690c574	538	{
AnnaBridge	145:64910690c574	539	__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge	145:64910690c574	540	}
AnnaBridge	145:64910690c574	541
AnnaBridge	145:64910690c574	542
AnnaBridge	145:64910690c574	543	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	544	/**
AnnaBridge	145:64910690c574	545	\brief Set Fault Mask (non-secure)
AnnaBridge	145:64910690c574	546	\details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge	145:64910690c574	547	\param [in] faultMask Fault Mask value to set
AnnaBridge	145:64910690c574	548	*/
AnnaBridge	145:64910690c574	549	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge	145:64910690c574	550	{
AnnaBridge	145:64910690c574	551	__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge	145:64910690c574	552	}
AnnaBridge	145:64910690c574	553	#endif
AnnaBridge	145:64910690c574	554
AnnaBridge	145:64910690c574	555	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	556	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	557	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	558
AnnaBridge	145:64910690c574	559
AnnaBridge	145:64910690c574	560	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	561	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	562
AnnaBridge	145:64910690c574	563	/**
AnnaBridge	145:64910690c574	564	\brief Get Process Stack Pointer Limit
AnnaBridge	145:64910690c574	565	\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	145:64910690c574	566	\return PSPLIM Register value
AnnaBridge	145:64910690c574	567	*/
AnnaBridge	145:64910690c574	568	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge	145:64910690c574	569	{
AnnaBridge	145:64910690c574	570	register uint32_t result;
AnnaBridge	145:64910690c574	571
AnnaBridge	145:64910690c574	572	__ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge	145:64910690c574	573	return(result);
AnnaBridge	145:64910690c574	574	}
AnnaBridge	145:64910690c574	575
AnnaBridge	145:64910690c574	576
AnnaBridge	145:64910690c574	577	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	145:64910690c574	578	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	579	/**
AnnaBridge	145:64910690c574	580	\brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge	145:64910690c574	581	\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	145:64910690c574	582	\return PSPLIM Register value
AnnaBridge	145:64910690c574	583	*/
AnnaBridge	145:64910690c574	584	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge	145:64910690c574	585	{
AnnaBridge	145:64910690c574	586	register uint32_t result;
AnnaBridge	145:64910690c574	587
AnnaBridge	145:64910690c574	588	__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	589	return(result);
AnnaBridge	145:64910690c574	590	}
AnnaBridge	145:64910690c574	591	#endif
AnnaBridge	145:64910690c574	592
AnnaBridge	145:64910690c574	593
AnnaBridge	145:64910690c574	594	/**
AnnaBridge	145:64910690c574	595	\brief Set Process Stack Pointer Limit
AnnaBridge	145:64910690c574	596	\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	145:64910690c574	597	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	598	*/
AnnaBridge	145:64910690c574	599	__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge	145:64910690c574	600	{
AnnaBridge	145:64910690c574	601	__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge	145:64910690c574	602	}
AnnaBridge	145:64910690c574	603
AnnaBridge	145:64910690c574	604
AnnaBridge	145:64910690c574	605	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	145:64910690c574	606	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	607	/**
AnnaBridge	145:64910690c574	608	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	609	\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	145:64910690c574	610	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	611	*/
AnnaBridge	145:64910690c574	612	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge	145:64910690c574	613	{
AnnaBridge	145:64910690c574	614	__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge	145:64910690c574	615	}
AnnaBridge	145:64910690c574	616	#endif
AnnaBridge	145:64910690c574	617
AnnaBridge	145:64910690c574	618
AnnaBridge	145:64910690c574	619	/**
AnnaBridge	145:64910690c574	620	\brief Get Main Stack Pointer Limit
AnnaBridge	145:64910690c574	621	\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	145:64910690c574	622	\return MSPLIM Register value
AnnaBridge	145:64910690c574	623	*/
AnnaBridge	145:64910690c574	624	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge	145:64910690c574	625	{
AnnaBridge	145:64910690c574	626	register uint32_t result;
AnnaBridge	145:64910690c574	627
AnnaBridge	145:64910690c574	628	__ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge	145:64910690c574	629
AnnaBridge	145:64910690c574	630	return(result);
AnnaBridge	145:64910690c574	631	}
AnnaBridge	145:64910690c574	632
AnnaBridge	145:64910690c574	633
AnnaBridge	145:64910690c574	634	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	145:64910690c574	635	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	636	/**
AnnaBridge	145:64910690c574	637	\brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge	145:64910690c574	638	\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge	145:64910690c574	639	\return MSPLIM Register value
AnnaBridge	145:64910690c574	640	*/
AnnaBridge	145:64910690c574	641	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge	145:64910690c574	642	{
AnnaBridge	145:64910690c574	643	register uint32_t result;
AnnaBridge	145:64910690c574	644
AnnaBridge	145:64910690c574	645	__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	646	return(result);
AnnaBridge	145:64910690c574	647	}
AnnaBridge	145:64910690c574	648	#endif
AnnaBridge	145:64910690c574	649
AnnaBridge	145:64910690c574	650
AnnaBridge	145:64910690c574	651	/**
AnnaBridge	145:64910690c574	652	\brief Set Main Stack Pointer Limit
AnnaBridge	145:64910690c574	653	\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	145:64910690c574	654	\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	655	*/
AnnaBridge	145:64910690c574	656	__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge	145:64910690c574	657	{
AnnaBridge	145:64910690c574	658	__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	145:64910690c574	659	}
AnnaBridge	145:64910690c574	660
AnnaBridge	145:64910690c574	661
AnnaBridge	145:64910690c574	662	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	145:64910690c574	663	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	664	/**
AnnaBridge	145:64910690c574	665	\brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge	145:64910690c574	666	\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge	145:64910690c574	667	\param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge	145:64910690c574	668	*/
AnnaBridge	145:64910690c574	669	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge	145:64910690c574	670	{
AnnaBridge	145:64910690c574	671	__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	145:64910690c574	672	}
AnnaBridge	145:64910690c574	673	#endif
AnnaBridge	145:64910690c574	674
AnnaBridge	145:64910690c574	675	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	676	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	677
AnnaBridge	145:64910690c574	678
AnnaBridge	145:64910690c574	679	#if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	680	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	681
AnnaBridge	145:64910690c574	682	/**
AnnaBridge	145:64910690c574	683	\brief Get FPSCR
AnnaBridge	145:64910690c574	684	\details Returns the current value of the Floating Point Status/Control register.
AnnaBridge	145:64910690c574	685	\return Floating Point Status/Control register value
AnnaBridge	145:64910690c574	686	*/
AnnaBridge	145:64910690c574	687	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	145:64910690c574	688	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge	160:5571c4ff569f	689	#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
AnnaBridge	145:64910690c574	690	#else
Anna Bridge	160:5571c4ff569f	691	#define __get_FPSCR() ((uint32_t)0U)
AnnaBridge	145:64910690c574	692	#endif
AnnaBridge	145:64910690c574	693
AnnaBridge	145:64910690c574	694	/**
AnnaBridge	145:64910690c574	695	\brief Set FPSCR
AnnaBridge	145:64910690c574	696	\details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge	145:64910690c574	697	\param [in] fpscr Floating Point Status/Control value to set
AnnaBridge	145:64910690c574	698	*/
AnnaBridge	145:64910690c574	699	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	145:64910690c574	700	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge	160:5571c4ff569f	701	#define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge	145:64910690c574	702	#else
Anna Bridge	160:5571c4ff569f	703	#define __set_FPSCR(x) ((void)(x))
AnnaBridge	145:64910690c574	704	#endif
AnnaBridge	145:64910690c574	705
AnnaBridge	145:64910690c574	706	#endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	707	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	708
AnnaBridge	145:64910690c574	709
AnnaBridge	145:64910690c574	710
AnnaBridge	145:64910690c574	711	/@} end of CMSIS_Core_RegAccFunctions /
AnnaBridge	145:64910690c574	712
AnnaBridge	145:64910690c574	713
AnnaBridge	145:64910690c574	714	/* ########################## Core Instruction Access ######################### */
AnnaBridge	145:64910690c574	715	/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge	145:64910690c574	716	Access to dedicated instructions
AnnaBridge	145:64910690c574	717	@{
AnnaBridge	145:64910690c574	718	*/
AnnaBridge	145:64910690c574	719
AnnaBridge	145:64910690c574	720	/* Define macros for porting to both thumb1 and thumb2.
AnnaBridge	145:64910690c574	721	* For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge	145:64910690c574	722	* Otherwise, use general registers, specified by constraint "r" */
AnnaBridge	145:64910690c574	723	#if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge	145:64910690c574	724	#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge	145:64910690c574	725	#define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge	145:64910690c574	726	#else
AnnaBridge	145:64910690c574	727	#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge	145:64910690c574	728	#define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge	145:64910690c574	729	#endif
AnnaBridge	145:64910690c574	730
AnnaBridge	145:64910690c574	731	/**
AnnaBridge	145:64910690c574	732	\brief No Operation
AnnaBridge	145:64910690c574	733	\details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge	145:64910690c574	734	*/
AnnaBridge	145:64910690c574	735	#define __NOP __builtin_arm_nop
AnnaBridge	145:64910690c574	736
AnnaBridge	145:64910690c574	737	/**
AnnaBridge	145:64910690c574	738	\brief Wait For Interrupt
AnnaBridge	145:64910690c574	739	\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge	145:64910690c574	740	*/
AnnaBridge	145:64910690c574	741	#define __WFI __builtin_arm_wfi
AnnaBridge	145:64910690c574	742
AnnaBridge	145:64910690c574	743
AnnaBridge	145:64910690c574	744	/**
AnnaBridge	145:64910690c574	745	\brief Wait For Event
AnnaBridge	145:64910690c574	746	\details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge	145:64910690c574	747	a low-power state until one of a number of events occurs.
AnnaBridge	145:64910690c574	748	*/
AnnaBridge	145:64910690c574	749	#define __WFE __builtin_arm_wfe
AnnaBridge	145:64910690c574	750
AnnaBridge	145:64910690c574	751
AnnaBridge	145:64910690c574	752	/**
AnnaBridge	145:64910690c574	753	\brief Send Event
AnnaBridge	145:64910690c574	754	\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge	145:64910690c574	755	*/
AnnaBridge	145:64910690c574	756	#define __SEV __builtin_arm_sev
AnnaBridge	145:64910690c574	757
AnnaBridge	145:64910690c574	758
AnnaBridge	145:64910690c574	759	/**
AnnaBridge	145:64910690c574	760	\brief Instruction Synchronization Barrier
AnnaBridge	145:64910690c574	761	\details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge	145:64910690c574	762	so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge	145:64910690c574	763	after the instruction has been completed.
AnnaBridge	145:64910690c574	764	*/
AnnaBridge	145:64910690c574	765	#define __ISB() __builtin_arm_isb(0xF);
AnnaBridge	145:64910690c574	766
AnnaBridge	145:64910690c574	767	/**
AnnaBridge	145:64910690c574	768	\brief Data Synchronization Barrier
AnnaBridge	145:64910690c574	769	\details Acts as a special kind of Data Memory Barrier.
AnnaBridge	145:64910690c574	770	It completes when all explicit memory accesses before this instruction complete.
AnnaBridge	145:64910690c574	771	*/
AnnaBridge	145:64910690c574	772	#define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge	145:64910690c574	773
AnnaBridge	145:64910690c574	774
AnnaBridge	145:64910690c574	775	/**
AnnaBridge	145:64910690c574	776	\brief Data Memory Barrier
AnnaBridge	145:64910690c574	777	\details Ensures the apparent order of the explicit memory operations before
AnnaBridge	145:64910690c574	778	and after the instruction, without ensuring their completion.
AnnaBridge	145:64910690c574	779	*/
AnnaBridge	145:64910690c574	780	#define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge	145:64910690c574	781
AnnaBridge	145:64910690c574	782
AnnaBridge	145:64910690c574	783	/**
AnnaBridge	145:64910690c574	784	\brief Reverse byte order (32 bit)
AnnaBridge	145:64910690c574	785	\details Reverses the byte order in integer value.
AnnaBridge	145:64910690c574	786	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	787	\return Reversed value
AnnaBridge	145:64910690c574	788	*/
Anna Bridge	160:5571c4ff569f	789	#define __REV (uint32_t)__builtin_bswap32
AnnaBridge	145:64910690c574	790
AnnaBridge	145:64910690c574	791
AnnaBridge	145:64910690c574	792	/**
AnnaBridge	145:64910690c574	793	\brief Reverse byte order (16 bit)
AnnaBridge	145:64910690c574	794	\details Reverses the byte order in two unsigned short values.
AnnaBridge	145:64910690c574	795	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	796	\return Reversed value
AnnaBridge	145:64910690c574	797	*/
Anna Bridge	160:5571c4ff569f	798	#define __REV16 (uint16_t)__builtin_bswap16
AnnaBridge	145:64910690c574	799
AnnaBridge	145:64910690c574	800
AnnaBridge	145:64910690c574	801	/**
AnnaBridge	145:64910690c574	802	\brief Reverse byte order in signed short value
AnnaBridge	145:64910690c574	803	\details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge	145:64910690c574	804	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	805	\return Reversed value
AnnaBridge	145:64910690c574	806	*/
Anna Bridge	160:5571c4ff569f	807	__attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge	145:64910690c574	808	{
Anna Bridge	160:5571c4ff569f	809	int16_t result;
AnnaBridge	145:64910690c574	810
AnnaBridge	145:64910690c574	811	__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge	160:5571c4ff569f	812
Anna Bridge	160:5571c4ff569f	813	return result;
AnnaBridge	145:64910690c574	814	}
AnnaBridge	145:64910690c574	815
AnnaBridge	145:64910690c574	816
AnnaBridge	145:64910690c574	817	/**
AnnaBridge	145:64910690c574	818	\brief Rotate Right in unsigned value (32 bit)
AnnaBridge	145:64910690c574	819	\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge	145:64910690c574	820	\param [in] op1 Value to rotate
AnnaBridge	145:64910690c574	821	\param [in] op2 Number of Bits to rotate
AnnaBridge	145:64910690c574	822	\return Rotated value
AnnaBridge	145:64910690c574	823	*/
AnnaBridge	145:64910690c574	824	__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	825	{
AnnaBridge	145:64910690c574	826	return (op1 >> op2) \| (op1 << (32U - op2));
AnnaBridge	145:64910690c574	827	}
AnnaBridge	145:64910690c574	828
AnnaBridge	145:64910690c574	829
AnnaBridge	145:64910690c574	830	/**
AnnaBridge	145:64910690c574	831	\brief Breakpoint
AnnaBridge	145:64910690c574	832	\details Causes the processor to enter Debug state.
AnnaBridge	145:64910690c574	833	Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge	145:64910690c574	834	\param [in] value is ignored by the processor.
AnnaBridge	145:64910690c574	835	If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge	145:64910690c574	836	*/
Anna Bridge	160:5571c4ff569f	837	#define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge	145:64910690c574	838
AnnaBridge	145:64910690c574	839
AnnaBridge	145:64910690c574	840	/**
AnnaBridge	145:64910690c574	841	\brief Reverse bit order of value
AnnaBridge	145:64910690c574	842	\details Reverses the bit order of the given value.
AnnaBridge	145:64910690c574	843	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	844	\return Reversed value
AnnaBridge	145:64910690c574	845	*/
Anna Bridge	160:5571c4ff569f	846	#define __RBIT (uint32_t)__builtin_arm_rbit
AnnaBridge	145:64910690c574	847
AnnaBridge	145:64910690c574	848	/**
AnnaBridge	145:64910690c574	849	\brief Count leading zeros
AnnaBridge	145:64910690c574	850	\details Counts the number of leading zeros of a data value.
AnnaBridge	145:64910690c574	851	\param [in] value Value to count the leading zeros
AnnaBridge	145:64910690c574	852	\return number of leading zeros in value
AnnaBridge	145:64910690c574	853	*/
AnnaBridge	145:64910690c574	854	#define __CLZ __builtin_clz
AnnaBridge	145:64910690c574	855
AnnaBridge	145:64910690c574	856
AnnaBridge	145:64910690c574	857	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	858	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	859	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	860	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	861	/**
AnnaBridge	145:64910690c574	862	\brief LDR Exclusive (8 bit)
AnnaBridge	145:64910690c574	863	\details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge	145:64910690c574	864	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	865	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	866	*/
AnnaBridge	145:64910690c574	867	#define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge	145:64910690c574	868
AnnaBridge	145:64910690c574	869
AnnaBridge	145:64910690c574	870	/**
AnnaBridge	145:64910690c574	871	\brief LDR Exclusive (16 bit)
AnnaBridge	145:64910690c574	872	\details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge	145:64910690c574	873	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	874	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	875	*/
AnnaBridge	145:64910690c574	876	#define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge	145:64910690c574	877
AnnaBridge	145:64910690c574	878
AnnaBridge	145:64910690c574	879	/**
AnnaBridge	145:64910690c574	880	\brief LDR Exclusive (32 bit)
AnnaBridge	145:64910690c574	881	\details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge	145:64910690c574	882	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	883	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	884	*/
AnnaBridge	145:64910690c574	885	#define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge	145:64910690c574	886
AnnaBridge	145:64910690c574	887
AnnaBridge	145:64910690c574	888	/**
AnnaBridge	145:64910690c574	889	\brief STR Exclusive (8 bit)
AnnaBridge	145:64910690c574	890	\details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge	145:64910690c574	891	\param [in] value Value to store
AnnaBridge	145:64910690c574	892	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	893	\return 0 Function succeeded
AnnaBridge	145:64910690c574	894	\return 1 Function failed
AnnaBridge	145:64910690c574	895	*/
AnnaBridge	145:64910690c574	896	#define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge	145:64910690c574	897
AnnaBridge	145:64910690c574	898
AnnaBridge	145:64910690c574	899	/**
AnnaBridge	145:64910690c574	900	\brief STR Exclusive (16 bit)
AnnaBridge	145:64910690c574	901	\details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge	145:64910690c574	902	\param [in] value Value to store
AnnaBridge	145:64910690c574	903	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	904	\return 0 Function succeeded
AnnaBridge	145:64910690c574	905	\return 1 Function failed
AnnaBridge	145:64910690c574	906	*/
AnnaBridge	145:64910690c574	907	#define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge	145:64910690c574	908
AnnaBridge	145:64910690c574	909
AnnaBridge	145:64910690c574	910	/**
AnnaBridge	145:64910690c574	911	\brief STR Exclusive (32 bit)
AnnaBridge	145:64910690c574	912	\details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge	145:64910690c574	913	\param [in] value Value to store
AnnaBridge	145:64910690c574	914	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	915	\return 0 Function succeeded
AnnaBridge	145:64910690c574	916	\return 1 Function failed
AnnaBridge	145:64910690c574	917	*/
AnnaBridge	145:64910690c574	918	#define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge	145:64910690c574	919
AnnaBridge	145:64910690c574	920
AnnaBridge	145:64910690c574	921	/**
AnnaBridge	145:64910690c574	922	\brief Remove the exclusive lock
AnnaBridge	145:64910690c574	923	\details Removes the exclusive lock which is created by LDREX.
AnnaBridge	145:64910690c574	924	*/
AnnaBridge	145:64910690c574	925	#define __CLREX __builtin_arm_clrex
AnnaBridge	145:64910690c574	926
AnnaBridge	145:64910690c574	927	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	928	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	929	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	930	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	931
AnnaBridge	145:64910690c574	932
AnnaBridge	145:64910690c574	933	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	934	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	935	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Anna Bridge	160:5571c4ff569f	936
AnnaBridge	145:64910690c574	937	/**
AnnaBridge	145:64910690c574	938	\brief Signed Saturate
AnnaBridge	145:64910690c574	939	\details Saturates a signed value.
AnnaBridge	145:64910690c574	940	\param [in] value Value to be saturated
AnnaBridge	145:64910690c574	941	\param [in] sat Bit position to saturate to (1..32)
AnnaBridge	145:64910690c574	942	\return Saturated value
AnnaBridge	145:64910690c574	943	*/
AnnaBridge	145:64910690c574	944	#define __SSAT __builtin_arm_ssat
AnnaBridge	145:64910690c574	945
AnnaBridge	145:64910690c574	946
AnnaBridge	145:64910690c574	947	/**
AnnaBridge	145:64910690c574	948	\brief Unsigned Saturate
AnnaBridge	145:64910690c574	949	\details Saturates an unsigned value.
AnnaBridge	145:64910690c574	950	\param [in] value Value to be saturated
AnnaBridge	145:64910690c574	951	\param [in] sat Bit position to saturate to (0..31)
AnnaBridge	145:64910690c574	952	\return Saturated value
AnnaBridge	145:64910690c574	953	*/
AnnaBridge	145:64910690c574	954	#define __USAT __builtin_arm_usat
AnnaBridge	145:64910690c574	955
AnnaBridge	145:64910690c574	956
AnnaBridge	145:64910690c574	957	/**
AnnaBridge	145:64910690c574	958	\brief Rotate Right with Extend (32 bit)
AnnaBridge	145:64910690c574	959	\details Moves each bit of a bitstring right by one bit.
AnnaBridge	145:64910690c574	960	The carry input is shifted in at the left end of the bitstring.
AnnaBridge	145:64910690c574	961	\param [in] value Value to rotate
AnnaBridge	145:64910690c574	962	\return Rotated value
AnnaBridge	145:64910690c574	963	*/
AnnaBridge	145:64910690c574	964	__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge	145:64910690c574	965	{
AnnaBridge	145:64910690c574	966	uint32_t result;
AnnaBridge	145:64910690c574	967
AnnaBridge	145:64910690c574	968	__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	145:64910690c574	969	return(result);
AnnaBridge	145:64910690c574	970	}
AnnaBridge	145:64910690c574	971
AnnaBridge	145:64910690c574	972
AnnaBridge	145:64910690c574	973	/**
AnnaBridge	145:64910690c574	974	\brief LDRT Unprivileged (8 bit)
AnnaBridge	145:64910690c574	975	\details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge	145:64910690c574	976	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	977	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	978	*/
AnnaBridge	145:64910690c574	979	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	980	{
AnnaBridge	145:64910690c574	981	uint32_t result;
AnnaBridge	145:64910690c574	982
AnnaBridge	145:64910690c574	983	__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	984	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	985	}
AnnaBridge	145:64910690c574	986
AnnaBridge	145:64910690c574	987
AnnaBridge	145:64910690c574	988	/**
AnnaBridge	145:64910690c574	989	\brief LDRT Unprivileged (16 bit)
AnnaBridge	145:64910690c574	990	\details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge	145:64910690c574	991	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	992	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	993	*/
AnnaBridge	145:64910690c574	994	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	995	{
AnnaBridge	145:64910690c574	996	uint32_t result;
AnnaBridge	145:64910690c574	997
AnnaBridge	145:64910690c574	998	__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	999	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	1000	}
AnnaBridge	145:64910690c574	1001
AnnaBridge	145:64910690c574	1002
AnnaBridge	145:64910690c574	1003	/**
AnnaBridge	145:64910690c574	1004	\brief LDRT Unprivileged (32 bit)
AnnaBridge	145:64910690c574	1005	\details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge	145:64910690c574	1006	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1007	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1008	*/
AnnaBridge	145:64910690c574	1009	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1010	{
AnnaBridge	145:64910690c574	1011	uint32_t result;
AnnaBridge	145:64910690c574	1012
AnnaBridge	145:64910690c574	1013	__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1014	return(result);
AnnaBridge	145:64910690c574	1015	}
AnnaBridge	145:64910690c574	1016
AnnaBridge	145:64910690c574	1017
AnnaBridge	145:64910690c574	1018	/**
AnnaBridge	145:64910690c574	1019	\brief STRT Unprivileged (8 bit)
AnnaBridge	145:64910690c574	1020	\details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge	145:64910690c574	1021	\param [in] value Value to store
AnnaBridge	145:64910690c574	1022	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1023	*/
AnnaBridge	145:64910690c574	1024	__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1025	{
AnnaBridge	145:64910690c574	1026	__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1027	}
AnnaBridge	145:64910690c574	1028
AnnaBridge	145:64910690c574	1029
AnnaBridge	145:64910690c574	1030	/**
AnnaBridge	145:64910690c574	1031	\brief STRT Unprivileged (16 bit)
AnnaBridge	145:64910690c574	1032	\details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge	145:64910690c574	1033	\param [in] value Value to store
AnnaBridge	145:64910690c574	1034	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1035	*/
AnnaBridge	145:64910690c574	1036	__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1037	{
AnnaBridge	145:64910690c574	1038	__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1039	}
AnnaBridge	145:64910690c574	1040
AnnaBridge	145:64910690c574	1041
AnnaBridge	145:64910690c574	1042	/**
AnnaBridge	145:64910690c574	1043	\brief STRT Unprivileged (32 bit)
AnnaBridge	145:64910690c574	1044	\details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge	145:64910690c574	1045	\param [in] value Value to store
AnnaBridge	145:64910690c574	1046	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1047	*/
AnnaBridge	145:64910690c574	1048	__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1049	{
AnnaBridge	145:64910690c574	1050	__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge	145:64910690c574	1051	}
AnnaBridge	145:64910690c574	1052
Anna Bridge	160:5571c4ff569f	1053	#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
Anna Bridge	160:5571c4ff569f	1054	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
Anna Bridge	160:5571c4ff569f	1055	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge	160:5571c4ff569f	1056
Anna Bridge	160:5571c4ff569f	1057	/**
Anna Bridge	160:5571c4ff569f	1058	\brief Signed Saturate
Anna Bridge	160:5571c4ff569f	1059	\details Saturates a signed value.
Anna Bridge	160:5571c4ff569f	1060	\param [in] value Value to be saturated
Anna Bridge	160:5571c4ff569f	1061	\param [in] sat Bit position to saturate to (1..32)
Anna Bridge	160:5571c4ff569f	1062	\return Saturated value
Anna Bridge	160:5571c4ff569f	1063	*/
Anna Bridge	160:5571c4ff569f	1064	__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge	160:5571c4ff569f	1065	{
Anna Bridge	160:5571c4ff569f	1066	if ((sat >= 1U) && (sat <= 32U)) {
Anna Bridge	160:5571c4ff569f	1067	const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge	160:5571c4ff569f	1068	const int32_t min = -1 - max ;
Anna Bridge	160:5571c4ff569f	1069	if (val > max) {
Anna Bridge	160:5571c4ff569f	1070	return max;
Anna Bridge	160:5571c4ff569f	1071	} else if (val < min) {
Anna Bridge	160:5571c4ff569f	1072	return min;
Anna Bridge	160:5571c4ff569f	1073	}
Anna Bridge	160:5571c4ff569f	1074	}
Anna Bridge	160:5571c4ff569f	1075	return val;
Anna Bridge	160:5571c4ff569f	1076	}
Anna Bridge	160:5571c4ff569f	1077
Anna Bridge	160:5571c4ff569f	1078	/**
Anna Bridge	160:5571c4ff569f	1079	\brief Unsigned Saturate
Anna Bridge	160:5571c4ff569f	1080	\details Saturates an unsigned value.
Anna Bridge	160:5571c4ff569f	1081	\param [in] value Value to be saturated
Anna Bridge	160:5571c4ff569f	1082	\param [in] sat Bit position to saturate to (0..31)
Anna Bridge	160:5571c4ff569f	1083	\return Saturated value
Anna Bridge	160:5571c4ff569f	1084	*/
Anna Bridge	160:5571c4ff569f	1085	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge	160:5571c4ff569f	1086	{
Anna Bridge	160:5571c4ff569f	1087	if (sat <= 31U) {
Anna Bridge	160:5571c4ff569f	1088	const uint32_t max = ((1U << sat) - 1U);
Anna Bridge	160:5571c4ff569f	1089	if (val > (int32_t)max) {
Anna Bridge	160:5571c4ff569f	1090	return max;
Anna Bridge	160:5571c4ff569f	1091	} else if (val < 0) {
Anna Bridge	160:5571c4ff569f	1092	return 0U;
Anna Bridge	160:5571c4ff569f	1093	}
Anna Bridge	160:5571c4ff569f	1094	}
Anna Bridge	160:5571c4ff569f	1095	return (uint32_t)val;
Anna Bridge	160:5571c4ff569f	1096	}
Anna Bridge	160:5571c4ff569f	1097
AnnaBridge	145:64910690c574	1098	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1099	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1100	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	1101
AnnaBridge	145:64910690c574	1102
AnnaBridge	145:64910690c574	1103	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1104	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	1105	/**
AnnaBridge	145:64910690c574	1106	\brief Load-Acquire (8 bit)
AnnaBridge	145:64910690c574	1107	\details Executes a LDAB instruction for 8 bit value.
AnnaBridge	145:64910690c574	1108	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1109	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1110	*/
AnnaBridge	145:64910690c574	1111	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1112	{
AnnaBridge	145:64910690c574	1113	uint32_t result;
AnnaBridge	145:64910690c574	1114
AnnaBridge	145:64910690c574	1115	__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1116	return ((uint8_t) result);
AnnaBridge	145:64910690c574	1117	}
AnnaBridge	145:64910690c574	1118
AnnaBridge	145:64910690c574	1119
AnnaBridge	145:64910690c574	1120	/**
AnnaBridge	145:64910690c574	1121	\brief Load-Acquire (16 bit)
AnnaBridge	145:64910690c574	1122	\details Executes a LDAH instruction for 16 bit values.
AnnaBridge	145:64910690c574	1123	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1124	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1125	*/
AnnaBridge	145:64910690c574	1126	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1127	{
AnnaBridge	145:64910690c574	1128	uint32_t result;
AnnaBridge	145:64910690c574	1129
AnnaBridge	145:64910690c574	1130	__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1131	return ((uint16_t) result);
AnnaBridge	145:64910690c574	1132	}
AnnaBridge	145:64910690c574	1133
AnnaBridge	145:64910690c574	1134
AnnaBridge	145:64910690c574	1135	/**
AnnaBridge	145:64910690c574	1136	\brief Load-Acquire (32 bit)
AnnaBridge	145:64910690c574	1137	\details Executes a LDA instruction for 32 bit values.
AnnaBridge	145:64910690c574	1138	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1139	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1140	*/
AnnaBridge	145:64910690c574	1141	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1142	{
AnnaBridge	145:64910690c574	1143	uint32_t result;
AnnaBridge	145:64910690c574	1144
AnnaBridge	145:64910690c574	1145	__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1146	return(result);
AnnaBridge	145:64910690c574	1147	}
AnnaBridge	145:64910690c574	1148
AnnaBridge	145:64910690c574	1149
AnnaBridge	145:64910690c574	1150	/**
AnnaBridge	145:64910690c574	1151	\brief Store-Release (8 bit)
AnnaBridge	145:64910690c574	1152	\details Executes a STLB instruction for 8 bit values.
AnnaBridge	145:64910690c574	1153	\param [in] value Value to store
AnnaBridge	145:64910690c574	1154	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1155	*/
AnnaBridge	145:64910690c574	1156	__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1157	{
AnnaBridge	145:64910690c574	1158	__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1159	}
AnnaBridge	145:64910690c574	1160
AnnaBridge	145:64910690c574	1161
AnnaBridge	145:64910690c574	1162	/**
AnnaBridge	145:64910690c574	1163	\brief Store-Release (16 bit)
AnnaBridge	145:64910690c574	1164	\details Executes a STLH instruction for 16 bit values.
AnnaBridge	145:64910690c574	1165	\param [in] value Value to store
AnnaBridge	145:64910690c574	1166	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1167	*/
AnnaBridge	145:64910690c574	1168	__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1169	{
AnnaBridge	145:64910690c574	1170	__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1171	}
AnnaBridge	145:64910690c574	1172
AnnaBridge	145:64910690c574	1173
AnnaBridge	145:64910690c574	1174	/**
AnnaBridge	145:64910690c574	1175	\brief Store-Release (32 bit)
AnnaBridge	145:64910690c574	1176	\details Executes a STL instruction for 32 bit values.
AnnaBridge	145:64910690c574	1177	\param [in] value Value to store
AnnaBridge	145:64910690c574	1178	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1179	*/
AnnaBridge	145:64910690c574	1180	__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1181	{
AnnaBridge	145:64910690c574	1182	__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1183	}
AnnaBridge	145:64910690c574	1184
AnnaBridge	145:64910690c574	1185
AnnaBridge	145:64910690c574	1186	/**
AnnaBridge	145:64910690c574	1187	\brief Load-Acquire Exclusive (8 bit)
AnnaBridge	145:64910690c574	1188	\details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge	145:64910690c574	1189	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1190	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1191	*/
AnnaBridge	145:64910690c574	1192	#define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge	145:64910690c574	1193
AnnaBridge	145:64910690c574	1194
AnnaBridge	145:64910690c574	1195	/**
AnnaBridge	145:64910690c574	1196	\brief Load-Acquire Exclusive (16 bit)
AnnaBridge	145:64910690c574	1197	\details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge	145:64910690c574	1198	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1199	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1200	*/
AnnaBridge	145:64910690c574	1201	#define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge	145:64910690c574	1202
AnnaBridge	145:64910690c574	1203
AnnaBridge	145:64910690c574	1204	/**
AnnaBridge	145:64910690c574	1205	\brief Load-Acquire Exclusive (32 bit)
AnnaBridge	145:64910690c574	1206	\details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge	145:64910690c574	1207	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1208	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1209	*/
AnnaBridge	145:64910690c574	1210	#define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge	145:64910690c574	1211
AnnaBridge	145:64910690c574	1212
AnnaBridge	145:64910690c574	1213	/**
AnnaBridge	145:64910690c574	1214	\brief Store-Release Exclusive (8 bit)
AnnaBridge	145:64910690c574	1215	\details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge	145:64910690c574	1216	\param [in] value Value to store
AnnaBridge	145:64910690c574	1217	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1218	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1219	\return 1 Function failed
AnnaBridge	145:64910690c574	1220	*/
AnnaBridge	145:64910690c574	1221	#define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge	145:64910690c574	1222
AnnaBridge	145:64910690c574	1223
AnnaBridge	145:64910690c574	1224	/**
AnnaBridge	145:64910690c574	1225	\brief Store-Release Exclusive (16 bit)
AnnaBridge	145:64910690c574	1226	\details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge	145:64910690c574	1227	\param [in] value Value to store
AnnaBridge	145:64910690c574	1228	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1229	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1230	\return 1 Function failed
AnnaBridge	145:64910690c574	1231	*/
AnnaBridge	145:64910690c574	1232	#define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge	145:64910690c574	1233
AnnaBridge	145:64910690c574	1234
AnnaBridge	145:64910690c574	1235	/**
AnnaBridge	145:64910690c574	1236	\brief Store-Release Exclusive (32 bit)
AnnaBridge	145:64910690c574	1237	\details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge	145:64910690c574	1238	\param [in] value Value to store
AnnaBridge	145:64910690c574	1239	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1240	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1241	\return 1 Function failed
AnnaBridge	145:64910690c574	1242	*/
AnnaBridge	145:64910690c574	1243	#define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge	145:64910690c574	1244
AnnaBridge	145:64910690c574	1245	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1246	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	1247
AnnaBridge	145:64910690c574	1248	/@}/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge	145:64910690c574	1249
AnnaBridge	145:64910690c574	1250
AnnaBridge	145:64910690c574	1251	/* ################### Compiler specific Intrinsics ########################### */
AnnaBridge	145:64910690c574	1252	/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge	145:64910690c574	1253	Access to dedicated SIMD instructions
AnnaBridge	145:64910690c574	1254	@{
AnnaBridge	145:64910690c574	1255	*/
AnnaBridge	145:64910690c574	1256
AnnaBridge	145:64910690c574	1257	#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge	145:64910690c574	1258
AnnaBridge	145:64910690c574	1259	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1260	{
AnnaBridge	145:64910690c574	1261	uint32_t result;
AnnaBridge	145:64910690c574	1262
AnnaBridge	145:64910690c574	1263	__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1264	return(result);
AnnaBridge	145:64910690c574	1265	}
AnnaBridge	145:64910690c574	1266
AnnaBridge	145:64910690c574	1267	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1268	{
AnnaBridge	145:64910690c574	1269	uint32_t result;
AnnaBridge	145:64910690c574	1270
AnnaBridge	145:64910690c574	1271	__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1272	return(result);
AnnaBridge	145:64910690c574	1273	}
AnnaBridge	145:64910690c574	1274
AnnaBridge	145:64910690c574	1275	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1276	{
AnnaBridge	145:64910690c574	1277	uint32_t result;
AnnaBridge	145:64910690c574	1278
AnnaBridge	145:64910690c574	1279	__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1280	return(result);
AnnaBridge	145:64910690c574	1281	}
AnnaBridge	145:64910690c574	1282
AnnaBridge	145:64910690c574	1283	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1284	{
AnnaBridge	145:64910690c574	1285	uint32_t result;
AnnaBridge	145:64910690c574	1286
AnnaBridge	145:64910690c574	1287	__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1288	return(result);
AnnaBridge	145:64910690c574	1289	}
AnnaBridge	145:64910690c574	1290
AnnaBridge	145:64910690c574	1291	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1292	{
AnnaBridge	145:64910690c574	1293	uint32_t result;
AnnaBridge	145:64910690c574	1294
AnnaBridge	145:64910690c574	1295	__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1296	return(result);
AnnaBridge	145:64910690c574	1297	}
AnnaBridge	145:64910690c574	1298
AnnaBridge	145:64910690c574	1299	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1300	{
AnnaBridge	145:64910690c574	1301	uint32_t result;
AnnaBridge	145:64910690c574	1302
AnnaBridge	145:64910690c574	1303	__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1304	return(result);
AnnaBridge	145:64910690c574	1305	}
AnnaBridge	145:64910690c574	1306
AnnaBridge	145:64910690c574	1307
AnnaBridge	145:64910690c574	1308	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1309	{
AnnaBridge	145:64910690c574	1310	uint32_t result;
AnnaBridge	145:64910690c574	1311
AnnaBridge	145:64910690c574	1312	__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1313	return(result);
AnnaBridge	145:64910690c574	1314	}
AnnaBridge	145:64910690c574	1315
AnnaBridge	145:64910690c574	1316	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1317	{
AnnaBridge	145:64910690c574	1318	uint32_t result;
AnnaBridge	145:64910690c574	1319
AnnaBridge	145:64910690c574	1320	__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1321	return(result);
AnnaBridge	145:64910690c574	1322	}
AnnaBridge	145:64910690c574	1323
AnnaBridge	145:64910690c574	1324	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1325	{
AnnaBridge	145:64910690c574	1326	uint32_t result;
AnnaBridge	145:64910690c574	1327
AnnaBridge	145:64910690c574	1328	__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1329	return(result);
AnnaBridge	145:64910690c574	1330	}
AnnaBridge	145:64910690c574	1331
AnnaBridge	145:64910690c574	1332	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1333	{
AnnaBridge	145:64910690c574	1334	uint32_t result;
AnnaBridge	145:64910690c574	1335
AnnaBridge	145:64910690c574	1336	__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1337	return(result);
AnnaBridge	145:64910690c574	1338	}
AnnaBridge	145:64910690c574	1339
AnnaBridge	145:64910690c574	1340	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1341	{
AnnaBridge	145:64910690c574	1342	uint32_t result;
AnnaBridge	145:64910690c574	1343
AnnaBridge	145:64910690c574	1344	__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1345	return(result);
AnnaBridge	145:64910690c574	1346	}
AnnaBridge	145:64910690c574	1347
AnnaBridge	145:64910690c574	1348	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1349	{
AnnaBridge	145:64910690c574	1350	uint32_t result;
AnnaBridge	145:64910690c574	1351
AnnaBridge	145:64910690c574	1352	__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1353	return(result);
AnnaBridge	145:64910690c574	1354	}
AnnaBridge	145:64910690c574	1355
AnnaBridge	145:64910690c574	1356
AnnaBridge	145:64910690c574	1357	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1358	{
AnnaBridge	145:64910690c574	1359	uint32_t result;
AnnaBridge	145:64910690c574	1360
AnnaBridge	145:64910690c574	1361	__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1362	return(result);
AnnaBridge	145:64910690c574	1363	}
AnnaBridge	145:64910690c574	1364
AnnaBridge	145:64910690c574	1365	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1366	{
AnnaBridge	145:64910690c574	1367	uint32_t result;
AnnaBridge	145:64910690c574	1368
AnnaBridge	145:64910690c574	1369	__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1370	return(result);
AnnaBridge	145:64910690c574	1371	}
AnnaBridge	145:64910690c574	1372
AnnaBridge	145:64910690c574	1373	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1374	{
AnnaBridge	145:64910690c574	1375	uint32_t result;
AnnaBridge	145:64910690c574	1376
AnnaBridge	145:64910690c574	1377	__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1378	return(result);
AnnaBridge	145:64910690c574	1379	}
AnnaBridge	145:64910690c574	1380
AnnaBridge	145:64910690c574	1381	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1382	{
AnnaBridge	145:64910690c574	1383	uint32_t result;
AnnaBridge	145:64910690c574	1384
AnnaBridge	145:64910690c574	1385	__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1386	return(result);
AnnaBridge	145:64910690c574	1387	}
AnnaBridge	145:64910690c574	1388
AnnaBridge	145:64910690c574	1389	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1390	{
AnnaBridge	145:64910690c574	1391	uint32_t result;
AnnaBridge	145:64910690c574	1392
AnnaBridge	145:64910690c574	1393	__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1394	return(result);
AnnaBridge	145:64910690c574	1395	}
AnnaBridge	145:64910690c574	1396
AnnaBridge	145:64910690c574	1397	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1398	{
AnnaBridge	145:64910690c574	1399	uint32_t result;
AnnaBridge	145:64910690c574	1400
AnnaBridge	145:64910690c574	1401	__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1402	return(result);
AnnaBridge	145:64910690c574	1403	}
AnnaBridge	145:64910690c574	1404
AnnaBridge	145:64910690c574	1405	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1406	{
AnnaBridge	145:64910690c574	1407	uint32_t result;
AnnaBridge	145:64910690c574	1408
AnnaBridge	145:64910690c574	1409	__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1410	return(result);
AnnaBridge	145:64910690c574	1411	}
AnnaBridge	145:64910690c574	1412
AnnaBridge	145:64910690c574	1413	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1414	{
AnnaBridge	145:64910690c574	1415	uint32_t result;
AnnaBridge	145:64910690c574	1416
AnnaBridge	145:64910690c574	1417	__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1418	return(result);
AnnaBridge	145:64910690c574	1419	}
AnnaBridge	145:64910690c574	1420
AnnaBridge	145:64910690c574	1421	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1422	{
AnnaBridge	145:64910690c574	1423	uint32_t result;
AnnaBridge	145:64910690c574	1424
AnnaBridge	145:64910690c574	1425	__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1426	return(result);
AnnaBridge	145:64910690c574	1427	}
AnnaBridge	145:64910690c574	1428
AnnaBridge	145:64910690c574	1429	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1430	{
AnnaBridge	145:64910690c574	1431	uint32_t result;
AnnaBridge	145:64910690c574	1432
AnnaBridge	145:64910690c574	1433	__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1434	return(result);
AnnaBridge	145:64910690c574	1435	}
AnnaBridge	145:64910690c574	1436
AnnaBridge	145:64910690c574	1437	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1438	{
AnnaBridge	145:64910690c574	1439	uint32_t result;
AnnaBridge	145:64910690c574	1440
AnnaBridge	145:64910690c574	1441	__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1442	return(result);
AnnaBridge	145:64910690c574	1443	}
AnnaBridge	145:64910690c574	1444
AnnaBridge	145:64910690c574	1445	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1446	{
AnnaBridge	145:64910690c574	1447	uint32_t result;
AnnaBridge	145:64910690c574	1448
AnnaBridge	145:64910690c574	1449	__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1450	return(result);
AnnaBridge	145:64910690c574	1451	}
AnnaBridge	145:64910690c574	1452
AnnaBridge	145:64910690c574	1453	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1454	{
AnnaBridge	145:64910690c574	1455	uint32_t result;
AnnaBridge	145:64910690c574	1456
AnnaBridge	145:64910690c574	1457	__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1458	return(result);
AnnaBridge	145:64910690c574	1459	}
AnnaBridge	145:64910690c574	1460
AnnaBridge	145:64910690c574	1461	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1462	{
AnnaBridge	145:64910690c574	1463	uint32_t result;
AnnaBridge	145:64910690c574	1464
AnnaBridge	145:64910690c574	1465	__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1466	return(result);
AnnaBridge	145:64910690c574	1467	}
AnnaBridge	145:64910690c574	1468
AnnaBridge	145:64910690c574	1469	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1470	{
AnnaBridge	145:64910690c574	1471	uint32_t result;
AnnaBridge	145:64910690c574	1472
AnnaBridge	145:64910690c574	1473	__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1474	return(result);
AnnaBridge	145:64910690c574	1475	}
AnnaBridge	145:64910690c574	1476
AnnaBridge	145:64910690c574	1477	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1478	{
AnnaBridge	145:64910690c574	1479	uint32_t result;
AnnaBridge	145:64910690c574	1480
AnnaBridge	145:64910690c574	1481	__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1482	return(result);
AnnaBridge	145:64910690c574	1483	}
AnnaBridge	145:64910690c574	1484
AnnaBridge	145:64910690c574	1485	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1486	{
AnnaBridge	145:64910690c574	1487	uint32_t result;
AnnaBridge	145:64910690c574	1488
AnnaBridge	145:64910690c574	1489	__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1490	return(result);
AnnaBridge	145:64910690c574	1491	}
AnnaBridge	145:64910690c574	1492
AnnaBridge	145:64910690c574	1493	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1494	{
AnnaBridge	145:64910690c574	1495	uint32_t result;
AnnaBridge	145:64910690c574	1496
AnnaBridge	145:64910690c574	1497	__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1498	return(result);
AnnaBridge	145:64910690c574	1499	}
AnnaBridge	145:64910690c574	1500
AnnaBridge	145:64910690c574	1501	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1502	{
AnnaBridge	145:64910690c574	1503	uint32_t result;
AnnaBridge	145:64910690c574	1504
AnnaBridge	145:64910690c574	1505	__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1506	return(result);
AnnaBridge	145:64910690c574	1507	}
AnnaBridge	145:64910690c574	1508
AnnaBridge	145:64910690c574	1509	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1510	{
AnnaBridge	145:64910690c574	1511	uint32_t result;
AnnaBridge	145:64910690c574	1512
AnnaBridge	145:64910690c574	1513	__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1514	return(result);
AnnaBridge	145:64910690c574	1515	}
AnnaBridge	145:64910690c574	1516
AnnaBridge	145:64910690c574	1517	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1518	{
AnnaBridge	145:64910690c574	1519	uint32_t result;
AnnaBridge	145:64910690c574	1520
AnnaBridge	145:64910690c574	1521	__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1522	return(result);
AnnaBridge	145:64910690c574	1523	}
AnnaBridge	145:64910690c574	1524
AnnaBridge	145:64910690c574	1525	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1526	{
AnnaBridge	145:64910690c574	1527	uint32_t result;
AnnaBridge	145:64910690c574	1528
AnnaBridge	145:64910690c574	1529	__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1530	return(result);
AnnaBridge	145:64910690c574	1531	}
AnnaBridge	145:64910690c574	1532
AnnaBridge	145:64910690c574	1533	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1534	{
AnnaBridge	145:64910690c574	1535	uint32_t result;
AnnaBridge	145:64910690c574	1536
AnnaBridge	145:64910690c574	1537	__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1538	return(result);
AnnaBridge	145:64910690c574	1539	}
AnnaBridge	145:64910690c574	1540
AnnaBridge	145:64910690c574	1541	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1542	{
AnnaBridge	145:64910690c574	1543	uint32_t result;
AnnaBridge	145:64910690c574	1544
AnnaBridge	145:64910690c574	1545	__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1546	return(result);
AnnaBridge	145:64910690c574	1547	}
AnnaBridge	145:64910690c574	1548
AnnaBridge	145:64910690c574	1549	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1550	{
AnnaBridge	145:64910690c574	1551	uint32_t result;
AnnaBridge	145:64910690c574	1552
AnnaBridge	145:64910690c574	1553	__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1554	return(result);
AnnaBridge	145:64910690c574	1555	}
AnnaBridge	145:64910690c574	1556
AnnaBridge	145:64910690c574	1557	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1558	{
AnnaBridge	145:64910690c574	1559	uint32_t result;
AnnaBridge	145:64910690c574	1560
AnnaBridge	145:64910690c574	1561	__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1562	return(result);
AnnaBridge	145:64910690c574	1563	}
AnnaBridge	145:64910690c574	1564
AnnaBridge	145:64910690c574	1565	#define __SSAT16(ARG1,ARG2) \
AnnaBridge	145:64910690c574	1566	({ \
AnnaBridge	145:64910690c574	1567	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1568	__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1569	__RES; \
AnnaBridge	145:64910690c574	1570	})
AnnaBridge	145:64910690c574	1571
AnnaBridge	145:64910690c574	1572	#define __USAT16(ARG1,ARG2) \
AnnaBridge	145:64910690c574	1573	({ \
AnnaBridge	145:64910690c574	1574	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1575	__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1576	__RES; \
AnnaBridge	145:64910690c574	1577	})
AnnaBridge	145:64910690c574	1578
AnnaBridge	145:64910690c574	1579	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge	145:64910690c574	1580	{
AnnaBridge	145:64910690c574	1581	uint32_t result;
AnnaBridge	145:64910690c574	1582
AnnaBridge	145:64910690c574	1583	__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	145:64910690c574	1584	return(result);
AnnaBridge	145:64910690c574	1585	}
AnnaBridge	145:64910690c574	1586
AnnaBridge	145:64910690c574	1587	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1588	{
AnnaBridge	145:64910690c574	1589	uint32_t result;
AnnaBridge	145:64910690c574	1590
AnnaBridge	145:64910690c574	1591	__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1592	return(result);
AnnaBridge	145:64910690c574	1593	}
AnnaBridge	145:64910690c574	1594
AnnaBridge	145:64910690c574	1595	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge	145:64910690c574	1596	{
AnnaBridge	145:64910690c574	1597	uint32_t result;
AnnaBridge	145:64910690c574	1598
AnnaBridge	145:64910690c574	1599	__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	145:64910690c574	1600	return(result);
AnnaBridge	145:64910690c574	1601	}
AnnaBridge	145:64910690c574	1602
AnnaBridge	145:64910690c574	1603	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1604	{
AnnaBridge	145:64910690c574	1605	uint32_t result;
AnnaBridge	145:64910690c574	1606
AnnaBridge	145:64910690c574	1607	__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1608	return(result);
AnnaBridge	145:64910690c574	1609	}
AnnaBridge	145:64910690c574	1610
AnnaBridge	145:64910690c574	1611	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1612	{
AnnaBridge	145:64910690c574	1613	uint32_t result;
AnnaBridge	145:64910690c574	1614
AnnaBridge	145:64910690c574	1615	__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1616	return(result);
AnnaBridge	145:64910690c574	1617	}
AnnaBridge	145:64910690c574	1618
AnnaBridge	145:64910690c574	1619	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1620	{
AnnaBridge	145:64910690c574	1621	uint32_t result;
AnnaBridge	145:64910690c574	1622
AnnaBridge	145:64910690c574	1623	__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1624	return(result);
AnnaBridge	145:64910690c574	1625	}
AnnaBridge	145:64910690c574	1626
AnnaBridge	145:64910690c574	1627	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1628	{
AnnaBridge	145:64910690c574	1629	uint32_t result;
AnnaBridge	145:64910690c574	1630
AnnaBridge	145:64910690c574	1631	__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1632	return(result);
AnnaBridge	145:64910690c574	1633	}
AnnaBridge	145:64910690c574	1634
AnnaBridge	145:64910690c574	1635	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1636	{
AnnaBridge	145:64910690c574	1637	uint32_t result;
AnnaBridge	145:64910690c574	1638
AnnaBridge	145:64910690c574	1639	__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1640	return(result);
AnnaBridge	145:64910690c574	1641	}
AnnaBridge	145:64910690c574	1642
AnnaBridge	145:64910690c574	1643	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1644	{
AnnaBridge	145:64910690c574	1645	union llreg_u{
AnnaBridge	145:64910690c574	1646	uint32_t w32[2];
AnnaBridge	145:64910690c574	1647	uint64_t w64;
AnnaBridge	145:64910690c574	1648	} llr;
AnnaBridge	145:64910690c574	1649	llr.w64 = acc;
AnnaBridge	145:64910690c574	1650
AnnaBridge	145:64910690c574	1651	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1652	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1653	#else /* Big endian */
AnnaBridge	145:64910690c574	1654	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1655	#endif
AnnaBridge	145:64910690c574	1656
AnnaBridge	145:64910690c574	1657	return(llr.w64);
AnnaBridge	145:64910690c574	1658	}
AnnaBridge	145:64910690c574	1659
AnnaBridge	145:64910690c574	1660	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1661	{
AnnaBridge	145:64910690c574	1662	union llreg_u{
AnnaBridge	145:64910690c574	1663	uint32_t w32[2];
AnnaBridge	145:64910690c574	1664	uint64_t w64;
AnnaBridge	145:64910690c574	1665	} llr;
AnnaBridge	145:64910690c574	1666	llr.w64 = acc;
AnnaBridge	145:64910690c574	1667
AnnaBridge	145:64910690c574	1668	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1669	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1670	#else /* Big endian */
AnnaBridge	145:64910690c574	1671	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1672	#endif
AnnaBridge	145:64910690c574	1673
AnnaBridge	145:64910690c574	1674	return(llr.w64);
AnnaBridge	145:64910690c574	1675	}
AnnaBridge	145:64910690c574	1676
AnnaBridge	145:64910690c574	1677	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1678	{
AnnaBridge	145:64910690c574	1679	uint32_t result;
AnnaBridge	145:64910690c574	1680
AnnaBridge	145:64910690c574	1681	__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1682	return(result);
AnnaBridge	145:64910690c574	1683	}
AnnaBridge	145:64910690c574	1684
AnnaBridge	145:64910690c574	1685	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1686	{
AnnaBridge	145:64910690c574	1687	uint32_t result;
AnnaBridge	145:64910690c574	1688
AnnaBridge	145:64910690c574	1689	__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1690	return(result);
AnnaBridge	145:64910690c574	1691	}
AnnaBridge	145:64910690c574	1692
AnnaBridge	145:64910690c574	1693	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1694	{
AnnaBridge	145:64910690c574	1695	uint32_t result;
AnnaBridge	145:64910690c574	1696
AnnaBridge	145:64910690c574	1697	__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1698	return(result);
AnnaBridge	145:64910690c574	1699	}
AnnaBridge	145:64910690c574	1700
AnnaBridge	145:64910690c574	1701	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1702	{
AnnaBridge	145:64910690c574	1703	uint32_t result;
AnnaBridge	145:64910690c574	1704
AnnaBridge	145:64910690c574	1705	__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1706	return(result);
AnnaBridge	145:64910690c574	1707	}
AnnaBridge	145:64910690c574	1708
AnnaBridge	145:64910690c574	1709	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1710	{
AnnaBridge	145:64910690c574	1711	union llreg_u{
AnnaBridge	145:64910690c574	1712	uint32_t w32[2];
AnnaBridge	145:64910690c574	1713	uint64_t w64;
AnnaBridge	145:64910690c574	1714	} llr;
AnnaBridge	145:64910690c574	1715	llr.w64 = acc;
AnnaBridge	145:64910690c574	1716
AnnaBridge	145:64910690c574	1717	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1718	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1719	#else /* Big endian */
AnnaBridge	145:64910690c574	1720	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1721	#endif
AnnaBridge	145:64910690c574	1722
AnnaBridge	145:64910690c574	1723	return(llr.w64);
AnnaBridge	145:64910690c574	1724	}
AnnaBridge	145:64910690c574	1725
AnnaBridge	145:64910690c574	1726	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1727	{
AnnaBridge	145:64910690c574	1728	union llreg_u{
AnnaBridge	145:64910690c574	1729	uint32_t w32[2];
AnnaBridge	145:64910690c574	1730	uint64_t w64;
AnnaBridge	145:64910690c574	1731	} llr;
AnnaBridge	145:64910690c574	1732	llr.w64 = acc;
AnnaBridge	145:64910690c574	1733
AnnaBridge	145:64910690c574	1734	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1735	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1736	#else /* Big endian */
AnnaBridge	145:64910690c574	1737	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1738	#endif
AnnaBridge	145:64910690c574	1739
AnnaBridge	145:64910690c574	1740	return(llr.w64);
AnnaBridge	145:64910690c574	1741	}
AnnaBridge	145:64910690c574	1742
AnnaBridge	145:64910690c574	1743	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1744	{
AnnaBridge	145:64910690c574	1745	uint32_t result;
AnnaBridge	145:64910690c574	1746
AnnaBridge	145:64910690c574	1747	__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1748	return(result);
AnnaBridge	145:64910690c574	1749	}
AnnaBridge	145:64910690c574	1750
AnnaBridge	145:64910690c574	1751	__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge	145:64910690c574	1752	{
AnnaBridge	145:64910690c574	1753	int32_t result;
AnnaBridge	145:64910690c574	1754
AnnaBridge	145:64910690c574	1755	__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1756	return(result);
AnnaBridge	145:64910690c574	1757	}
AnnaBridge	145:64910690c574	1758
AnnaBridge	145:64910690c574	1759	__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge	145:64910690c574	1760	{
AnnaBridge	145:64910690c574	1761	int32_t result;
AnnaBridge	145:64910690c574	1762
AnnaBridge	145:64910690c574	1763	__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1764	return(result);
AnnaBridge	145:64910690c574	1765	}
AnnaBridge	145:64910690c574	1766
AnnaBridge	145:64910690c574	1767	#if 0
AnnaBridge	145:64910690c574	1768	#define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge	145:64910690c574	1769	({ \
AnnaBridge	145:64910690c574	1770	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	145:64910690c574	1771	__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	145:64910690c574	1772	__RES; \
AnnaBridge	145:64910690c574	1773	})
AnnaBridge	145:64910690c574	1774
AnnaBridge	145:64910690c574	1775	#define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge	145:64910690c574	1776	({ \
AnnaBridge	145:64910690c574	1777	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	145:64910690c574	1778	if (ARG3 == 0) \
AnnaBridge	145:64910690c574	1779	__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge	145:64910690c574	1780	else \
AnnaBridge	145:64910690c574	1781	__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	145:64910690c574	1782	__RES; \
AnnaBridge	145:64910690c574	1783	})
AnnaBridge	145:64910690c574	1784	#endif
AnnaBridge	145:64910690c574	1785
AnnaBridge	145:64910690c574	1786	#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) \| \
AnnaBridge	145:64910690c574	1787	((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge	145:64910690c574	1788
AnnaBridge	145:64910690c574	1789	#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) \| \
AnnaBridge	145:64910690c574	1790	((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge	145:64910690c574	1791
AnnaBridge	145:64910690c574	1792	__attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge	145:64910690c574	1793	{
AnnaBridge	145:64910690c574	1794	int32_t result;
AnnaBridge	145:64910690c574	1795
AnnaBridge	145:64910690c574	1796	__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1797	return(result);
AnnaBridge	145:64910690c574	1798	}
AnnaBridge	145:64910690c574	1799
AnnaBridge	145:64910690c574	1800	#endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge	145:64910690c574	1801	/@} end of group CMSIS_SIMD_intrinsics /
AnnaBridge	145:64910690c574	1802
AnnaBridge	145:64910690c574	1803
AnnaBridge	145:64910690c574	1804	#endif /* __CMSIS_ARMCLANG_H */