mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MTB_MXCHIP_EMW3166/cmsis_gcc.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
161:aa5281ff4a02
Child:
169:a7c7b631e539
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**************************************************************************//**
AnnaBridge 161:aa5281ff4a02 2 * @file cmsis_gcc.h
AnnaBridge 161:aa5281ff4a02 3 * @brief CMSIS compiler GCC header file
AnnaBridge 161:aa5281ff4a02 4 * @version V5.0.2
AnnaBridge 161:aa5281ff4a02 5 * @date 13. February 2017
AnnaBridge 161:aa5281ff4a02 6 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 7 /*
AnnaBridge 161:aa5281ff4a02 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 161:aa5281ff4a02 9 *
AnnaBridge 161:aa5281ff4a02 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 161:aa5281ff4a02 11 *
AnnaBridge 161:aa5281ff4a02 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 161:aa5281ff4a02 13 * not use this file except in compliance with the License.
AnnaBridge 161:aa5281ff4a02 14 * You may obtain a copy of the License at
AnnaBridge 161:aa5281ff4a02 15 *
AnnaBridge 161:aa5281ff4a02 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 161:aa5281ff4a02 17 *
AnnaBridge 161:aa5281ff4a02 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 161:aa5281ff4a02 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 161:aa5281ff4a02 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 161:aa5281ff4a02 21 * See the License for the specific language governing permissions and
AnnaBridge 161:aa5281ff4a02 22 * limitations under the License.
AnnaBridge 161:aa5281ff4a02 23 */
AnnaBridge 161:aa5281ff4a02 24
AnnaBridge 161:aa5281ff4a02 25 #ifndef __CMSIS_GCC_H
AnnaBridge 161:aa5281ff4a02 26 #define __CMSIS_GCC_H
AnnaBridge 161:aa5281ff4a02 27
AnnaBridge 161:aa5281ff4a02 28 /* ignore some GCC warnings */
AnnaBridge 161:aa5281ff4a02 29 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 30 #pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge 161:aa5281ff4a02 31 #pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge 161:aa5281ff4a02 32 #pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge 161:aa5281ff4a02 33
AnnaBridge 161:aa5281ff4a02 34 /* Fallback for __has_builtin */
AnnaBridge 161:aa5281ff4a02 35 #ifndef __has_builtin
AnnaBridge 161:aa5281ff4a02 36 #define __has_builtin(x) (0)
AnnaBridge 161:aa5281ff4a02 37 #endif
AnnaBridge 161:aa5281ff4a02 38
AnnaBridge 161:aa5281ff4a02 39 /* CMSIS compiler specific defines */
AnnaBridge 161:aa5281ff4a02 40 #ifndef __ASM
AnnaBridge 161:aa5281ff4a02 41 #define __ASM __asm
AnnaBridge 161:aa5281ff4a02 42 #endif
AnnaBridge 161:aa5281ff4a02 43 #ifndef __INLINE
AnnaBridge 161:aa5281ff4a02 44 #define __INLINE inline
AnnaBridge 161:aa5281ff4a02 45 #endif
AnnaBridge 161:aa5281ff4a02 46 #ifndef __STATIC_INLINE
AnnaBridge 161:aa5281ff4a02 47 #define __STATIC_INLINE static inline
AnnaBridge 161:aa5281ff4a02 48 #endif
AnnaBridge 161:aa5281ff4a02 49 #ifndef __NO_RETURN
AnnaBridge 161:aa5281ff4a02 50 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 161:aa5281ff4a02 51 #endif
AnnaBridge 161:aa5281ff4a02 52 #ifndef __USED
AnnaBridge 161:aa5281ff4a02 53 #define __USED __attribute__((used))
AnnaBridge 161:aa5281ff4a02 54 #endif
AnnaBridge 161:aa5281ff4a02 55 #ifndef __WEAK
AnnaBridge 161:aa5281ff4a02 56 #define __WEAK __attribute__((weak))
AnnaBridge 161:aa5281ff4a02 57 #endif
AnnaBridge 161:aa5281ff4a02 58 #ifndef __PACKED
AnnaBridge 161:aa5281ff4a02 59 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 60 #endif
AnnaBridge 161:aa5281ff4a02 61 #ifndef __PACKED_STRUCT
AnnaBridge 161:aa5281ff4a02 62 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 63 #endif
AnnaBridge 161:aa5281ff4a02 64 #ifndef __PACKED_UNION
AnnaBridge 161:aa5281ff4a02 65 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 66 #endif
AnnaBridge 161:aa5281ff4a02 67 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 161:aa5281ff4a02 68 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 69 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 70 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 161:aa5281ff4a02 71 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 72 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 73 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 161:aa5281ff4a02 74 #endif
AnnaBridge 161:aa5281ff4a02 75 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 161:aa5281ff4a02 76 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 77 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 78 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 161:aa5281ff4a02 79 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 80 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 81 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 82 #endif
AnnaBridge 161:aa5281ff4a02 83 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 161:aa5281ff4a02 84 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 85 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 86 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 161:aa5281ff4a02 87 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 88 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 89 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 90 #endif
AnnaBridge 161:aa5281ff4a02 91 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 161:aa5281ff4a02 92 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 93 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 94 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 161:aa5281ff4a02 95 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 96 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 97 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 98 #endif
AnnaBridge 161:aa5281ff4a02 99 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 161:aa5281ff4a02 100 #pragma GCC diagnostic push
AnnaBridge 161:aa5281ff4a02 101 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 102 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 161:aa5281ff4a02 103 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 104 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 105 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 106 #endif
AnnaBridge 161:aa5281ff4a02 107 #ifndef __ALIGNED
AnnaBridge 161:aa5281ff4a02 108 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 161:aa5281ff4a02 109 #endif
AnnaBridge 161:aa5281ff4a02 110 #ifndef __RESTRICT
AnnaBridge 161:aa5281ff4a02 111 #define __RESTRICT __restrict
AnnaBridge 161:aa5281ff4a02 112 #endif
AnnaBridge 161:aa5281ff4a02 113
AnnaBridge 161:aa5281ff4a02 114
AnnaBridge 161:aa5281ff4a02 115 /* ########################### Core Function Access ########################### */
AnnaBridge 161:aa5281ff4a02 116 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 161:aa5281ff4a02 117 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 161:aa5281ff4a02 118 @{
AnnaBridge 161:aa5281ff4a02 119 */
AnnaBridge 161:aa5281ff4a02 120
AnnaBridge 161:aa5281ff4a02 121 /**
AnnaBridge 161:aa5281ff4a02 122 \brief Enable IRQ Interrupts
AnnaBridge 161:aa5281ff4a02 123 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 124 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 125 */
AnnaBridge 161:aa5281ff4a02 126 __attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
AnnaBridge 161:aa5281ff4a02 127 {
AnnaBridge 161:aa5281ff4a02 128 __ASM volatile ("cpsie i" : : : "memory");
AnnaBridge 161:aa5281ff4a02 129 }
AnnaBridge 161:aa5281ff4a02 130
AnnaBridge 161:aa5281ff4a02 131
AnnaBridge 161:aa5281ff4a02 132 /**
AnnaBridge 161:aa5281ff4a02 133 \brief Disable IRQ Interrupts
AnnaBridge 161:aa5281ff4a02 134 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 135 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 136 */
AnnaBridge 161:aa5281ff4a02 137 __attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
AnnaBridge 161:aa5281ff4a02 138 {
AnnaBridge 161:aa5281ff4a02 139 __ASM volatile ("cpsid i" : : : "memory");
AnnaBridge 161:aa5281ff4a02 140 }
AnnaBridge 161:aa5281ff4a02 141
AnnaBridge 161:aa5281ff4a02 142
AnnaBridge 161:aa5281ff4a02 143 /**
AnnaBridge 161:aa5281ff4a02 144 \brief Get Control Register
AnnaBridge 161:aa5281ff4a02 145 \details Returns the content of the Control Register.
AnnaBridge 161:aa5281ff4a02 146 \return Control Register value
AnnaBridge 161:aa5281ff4a02 147 */
AnnaBridge 161:aa5281ff4a02 148 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 161:aa5281ff4a02 149 {
AnnaBridge 161:aa5281ff4a02 150 uint32_t result;
AnnaBridge 161:aa5281ff4a02 151
AnnaBridge 161:aa5281ff4a02 152 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 153 return(result);
AnnaBridge 161:aa5281ff4a02 154 }
AnnaBridge 161:aa5281ff4a02 155
AnnaBridge 161:aa5281ff4a02 156
AnnaBridge 161:aa5281ff4a02 157 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 158 /**
AnnaBridge 161:aa5281ff4a02 159 \brief Get Control Register (non-secure)
AnnaBridge 161:aa5281ff4a02 160 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 161:aa5281ff4a02 161 \return non-secure Control Register value
AnnaBridge 161:aa5281ff4a02 162 */
AnnaBridge 161:aa5281ff4a02 163 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 161:aa5281ff4a02 164 {
AnnaBridge 161:aa5281ff4a02 165 uint32_t result;
AnnaBridge 161:aa5281ff4a02 166
AnnaBridge 161:aa5281ff4a02 167 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 168 return(result);
AnnaBridge 161:aa5281ff4a02 169 }
AnnaBridge 161:aa5281ff4a02 170 #endif
AnnaBridge 161:aa5281ff4a02 171
AnnaBridge 161:aa5281ff4a02 172
AnnaBridge 161:aa5281ff4a02 173 /**
AnnaBridge 161:aa5281ff4a02 174 \brief Set Control Register
AnnaBridge 161:aa5281ff4a02 175 \details Writes the given value to the Control Register.
AnnaBridge 161:aa5281ff4a02 176 \param [in] control Control Register value to set
AnnaBridge 161:aa5281ff4a02 177 */
AnnaBridge 161:aa5281ff4a02 178 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 161:aa5281ff4a02 179 {
AnnaBridge 161:aa5281ff4a02 180 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 161:aa5281ff4a02 181 }
AnnaBridge 161:aa5281ff4a02 182
AnnaBridge 161:aa5281ff4a02 183
AnnaBridge 161:aa5281ff4a02 184 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 185 /**
AnnaBridge 161:aa5281ff4a02 186 \brief Set Control Register (non-secure)
AnnaBridge 161:aa5281ff4a02 187 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 161:aa5281ff4a02 188 \param [in] control Control Register value to set
AnnaBridge 161:aa5281ff4a02 189 */
AnnaBridge 161:aa5281ff4a02 190 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 161:aa5281ff4a02 191 {
AnnaBridge 161:aa5281ff4a02 192 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 161:aa5281ff4a02 193 }
AnnaBridge 161:aa5281ff4a02 194 #endif
AnnaBridge 161:aa5281ff4a02 195
AnnaBridge 161:aa5281ff4a02 196
AnnaBridge 161:aa5281ff4a02 197 /**
AnnaBridge 161:aa5281ff4a02 198 \brief Get IPSR Register
AnnaBridge 161:aa5281ff4a02 199 \details Returns the content of the IPSR Register.
AnnaBridge 161:aa5281ff4a02 200 \return IPSR Register value
AnnaBridge 161:aa5281ff4a02 201 */
AnnaBridge 161:aa5281ff4a02 202 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 161:aa5281ff4a02 203 {
AnnaBridge 161:aa5281ff4a02 204 uint32_t result;
AnnaBridge 161:aa5281ff4a02 205
AnnaBridge 161:aa5281ff4a02 206 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 207 return(result);
AnnaBridge 161:aa5281ff4a02 208 }
AnnaBridge 161:aa5281ff4a02 209
AnnaBridge 161:aa5281ff4a02 210
AnnaBridge 161:aa5281ff4a02 211 /**
AnnaBridge 161:aa5281ff4a02 212 \brief Get APSR Register
AnnaBridge 161:aa5281ff4a02 213 \details Returns the content of the APSR Register.
AnnaBridge 161:aa5281ff4a02 214 \return APSR Register value
AnnaBridge 161:aa5281ff4a02 215 */
AnnaBridge 161:aa5281ff4a02 216 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 161:aa5281ff4a02 217 {
AnnaBridge 161:aa5281ff4a02 218 uint32_t result;
AnnaBridge 161:aa5281ff4a02 219
AnnaBridge 161:aa5281ff4a02 220 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 221 return(result);
AnnaBridge 161:aa5281ff4a02 222 }
AnnaBridge 161:aa5281ff4a02 223
AnnaBridge 161:aa5281ff4a02 224
AnnaBridge 161:aa5281ff4a02 225 /**
AnnaBridge 161:aa5281ff4a02 226 \brief Get xPSR Register
AnnaBridge 161:aa5281ff4a02 227 \details Returns the content of the xPSR Register.
AnnaBridge 161:aa5281ff4a02 228 \return xPSR Register value
AnnaBridge 161:aa5281ff4a02 229 */
AnnaBridge 161:aa5281ff4a02 230 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 161:aa5281ff4a02 231 {
AnnaBridge 161:aa5281ff4a02 232 uint32_t result;
AnnaBridge 161:aa5281ff4a02 233
AnnaBridge 161:aa5281ff4a02 234 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 235 return(result);
AnnaBridge 161:aa5281ff4a02 236 }
AnnaBridge 161:aa5281ff4a02 237
AnnaBridge 161:aa5281ff4a02 238
AnnaBridge 161:aa5281ff4a02 239 /**
AnnaBridge 161:aa5281ff4a02 240 \brief Get Process Stack Pointer
AnnaBridge 161:aa5281ff4a02 241 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 161:aa5281ff4a02 242 \return PSP Register value
AnnaBridge 161:aa5281ff4a02 243 */
AnnaBridge 161:aa5281ff4a02 244 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 161:aa5281ff4a02 245 {
AnnaBridge 161:aa5281ff4a02 246 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 247
AnnaBridge 161:aa5281ff4a02 248 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 249 return(result);
AnnaBridge 161:aa5281ff4a02 250 }
AnnaBridge 161:aa5281ff4a02 251
AnnaBridge 161:aa5281ff4a02 252
AnnaBridge 161:aa5281ff4a02 253 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 254 /**
AnnaBridge 161:aa5281ff4a02 255 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 256 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 257 \return PSP Register value
AnnaBridge 161:aa5281ff4a02 258 */
AnnaBridge 161:aa5281ff4a02 259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 161:aa5281ff4a02 260 {
AnnaBridge 161:aa5281ff4a02 261 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 262
AnnaBridge 161:aa5281ff4a02 263 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 264 return(result);
AnnaBridge 161:aa5281ff4a02 265 }
AnnaBridge 161:aa5281ff4a02 266 #endif
AnnaBridge 161:aa5281ff4a02 267
AnnaBridge 161:aa5281ff4a02 268
AnnaBridge 161:aa5281ff4a02 269 /**
AnnaBridge 161:aa5281ff4a02 270 \brief Set Process Stack Pointer
AnnaBridge 161:aa5281ff4a02 271 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 161:aa5281ff4a02 272 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 273 */
AnnaBridge 161:aa5281ff4a02 274 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 161:aa5281ff4a02 275 {
AnnaBridge 161:aa5281ff4a02 276 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 161:aa5281ff4a02 277 }
AnnaBridge 161:aa5281ff4a02 278
AnnaBridge 161:aa5281ff4a02 279
AnnaBridge 161:aa5281ff4a02 280 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 281 /**
AnnaBridge 161:aa5281ff4a02 282 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 283 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 284 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 285 */
AnnaBridge 161:aa5281ff4a02 286 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 161:aa5281ff4a02 287 {
AnnaBridge 161:aa5281ff4a02 288 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 161:aa5281ff4a02 289 }
AnnaBridge 161:aa5281ff4a02 290 #endif
AnnaBridge 161:aa5281ff4a02 291
AnnaBridge 161:aa5281ff4a02 292
AnnaBridge 161:aa5281ff4a02 293 /**
AnnaBridge 161:aa5281ff4a02 294 \brief Get Main Stack Pointer
AnnaBridge 161:aa5281ff4a02 295 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 161:aa5281ff4a02 296 \return MSP Register value
AnnaBridge 161:aa5281ff4a02 297 */
AnnaBridge 161:aa5281ff4a02 298 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 161:aa5281ff4a02 299 {
AnnaBridge 161:aa5281ff4a02 300 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 301
AnnaBridge 161:aa5281ff4a02 302 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 303 return(result);
AnnaBridge 161:aa5281ff4a02 304 }
AnnaBridge 161:aa5281ff4a02 305
AnnaBridge 161:aa5281ff4a02 306
AnnaBridge 161:aa5281ff4a02 307 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 308 /**
AnnaBridge 161:aa5281ff4a02 309 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 310 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 311 \return MSP Register value
AnnaBridge 161:aa5281ff4a02 312 */
AnnaBridge 161:aa5281ff4a02 313 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 161:aa5281ff4a02 314 {
AnnaBridge 161:aa5281ff4a02 315 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 316
AnnaBridge 161:aa5281ff4a02 317 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 318 return(result);
AnnaBridge 161:aa5281ff4a02 319 }
AnnaBridge 161:aa5281ff4a02 320 #endif
AnnaBridge 161:aa5281ff4a02 321
AnnaBridge 161:aa5281ff4a02 322
AnnaBridge 161:aa5281ff4a02 323 /**
AnnaBridge 161:aa5281ff4a02 324 \brief Set Main Stack Pointer
AnnaBridge 161:aa5281ff4a02 325 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 161:aa5281ff4a02 326 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 327 */
AnnaBridge 161:aa5281ff4a02 328 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 161:aa5281ff4a02 329 {
AnnaBridge 161:aa5281ff4a02 330 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 161:aa5281ff4a02 331 }
AnnaBridge 161:aa5281ff4a02 332
AnnaBridge 161:aa5281ff4a02 333
AnnaBridge 161:aa5281ff4a02 334 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 335 /**
AnnaBridge 161:aa5281ff4a02 336 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 337 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 338 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 339 */
AnnaBridge 161:aa5281ff4a02 340 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 161:aa5281ff4a02 341 {
AnnaBridge 161:aa5281ff4a02 342 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 161:aa5281ff4a02 343 }
AnnaBridge 161:aa5281ff4a02 344 #endif
AnnaBridge 161:aa5281ff4a02 345
AnnaBridge 161:aa5281ff4a02 346
AnnaBridge 161:aa5281ff4a02 347 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 348 /**
AnnaBridge 161:aa5281ff4a02 349 \brief Get Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 350 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 161:aa5281ff4a02 351 \return SP Register value
AnnaBridge 161:aa5281ff4a02 352 */
AnnaBridge 161:aa5281ff4a02 353 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 161:aa5281ff4a02 354 {
AnnaBridge 161:aa5281ff4a02 355 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 356
AnnaBridge 161:aa5281ff4a02 357 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 358 return(result);
AnnaBridge 161:aa5281ff4a02 359 }
AnnaBridge 161:aa5281ff4a02 360
AnnaBridge 161:aa5281ff4a02 361
AnnaBridge 161:aa5281ff4a02 362 /**
AnnaBridge 161:aa5281ff4a02 363 \brief Set Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 364 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 161:aa5281ff4a02 365 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 366 */
AnnaBridge 161:aa5281ff4a02 367 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 161:aa5281ff4a02 368 {
AnnaBridge 161:aa5281ff4a02 369 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 161:aa5281ff4a02 370 }
AnnaBridge 161:aa5281ff4a02 371 #endif
AnnaBridge 161:aa5281ff4a02 372
AnnaBridge 161:aa5281ff4a02 373
AnnaBridge 161:aa5281ff4a02 374 /**
AnnaBridge 161:aa5281ff4a02 375 \brief Get Priority Mask
AnnaBridge 161:aa5281ff4a02 376 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 161:aa5281ff4a02 377 \return Priority Mask value
AnnaBridge 161:aa5281ff4a02 378 */
AnnaBridge 161:aa5281ff4a02 379 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 161:aa5281ff4a02 380 {
AnnaBridge 161:aa5281ff4a02 381 uint32_t result;
AnnaBridge 161:aa5281ff4a02 382
AnnaBridge 161:aa5281ff4a02 383 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 384 return(result);
AnnaBridge 161:aa5281ff4a02 385 }
AnnaBridge 161:aa5281ff4a02 386
AnnaBridge 161:aa5281ff4a02 387
AnnaBridge 161:aa5281ff4a02 388 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 389 /**
AnnaBridge 161:aa5281ff4a02 390 \brief Get Priority Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 391 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 161:aa5281ff4a02 392 \return Priority Mask value
AnnaBridge 161:aa5281ff4a02 393 */
AnnaBridge 161:aa5281ff4a02 394 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 161:aa5281ff4a02 395 {
AnnaBridge 161:aa5281ff4a02 396 uint32_t result;
AnnaBridge 161:aa5281ff4a02 397
AnnaBridge 161:aa5281ff4a02 398 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 399 return(result);
AnnaBridge 161:aa5281ff4a02 400 }
AnnaBridge 161:aa5281ff4a02 401 #endif
AnnaBridge 161:aa5281ff4a02 402
AnnaBridge 161:aa5281ff4a02 403
AnnaBridge 161:aa5281ff4a02 404 /**
AnnaBridge 161:aa5281ff4a02 405 \brief Set Priority Mask
AnnaBridge 161:aa5281ff4a02 406 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 161:aa5281ff4a02 407 \param [in] priMask Priority Mask
AnnaBridge 161:aa5281ff4a02 408 */
AnnaBridge 161:aa5281ff4a02 409 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 161:aa5281ff4a02 410 {
AnnaBridge 161:aa5281ff4a02 411 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 161:aa5281ff4a02 412 }
AnnaBridge 161:aa5281ff4a02 413
AnnaBridge 161:aa5281ff4a02 414
AnnaBridge 161:aa5281ff4a02 415 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 416 /**
AnnaBridge 161:aa5281ff4a02 417 \brief Set Priority Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 418 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 161:aa5281ff4a02 419 \param [in] priMask Priority Mask
AnnaBridge 161:aa5281ff4a02 420 */
AnnaBridge 161:aa5281ff4a02 421 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 161:aa5281ff4a02 422 {
AnnaBridge 161:aa5281ff4a02 423 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 161:aa5281ff4a02 424 }
AnnaBridge 161:aa5281ff4a02 425 #endif
AnnaBridge 161:aa5281ff4a02 426
AnnaBridge 161:aa5281ff4a02 427
AnnaBridge 161:aa5281ff4a02 428 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 429 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 430 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 431 /**
AnnaBridge 161:aa5281ff4a02 432 \brief Enable FIQ
AnnaBridge 161:aa5281ff4a02 433 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 434 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 435 */
AnnaBridge 161:aa5281ff4a02 436 __attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge 161:aa5281ff4a02 437 {
AnnaBridge 161:aa5281ff4a02 438 __ASM volatile ("cpsie f" : : : "memory");
AnnaBridge 161:aa5281ff4a02 439 }
AnnaBridge 161:aa5281ff4a02 440
AnnaBridge 161:aa5281ff4a02 441
AnnaBridge 161:aa5281ff4a02 442 /**
AnnaBridge 161:aa5281ff4a02 443 \brief Disable FIQ
AnnaBridge 161:aa5281ff4a02 444 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 445 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 446 */
AnnaBridge 161:aa5281ff4a02 447 __attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge 161:aa5281ff4a02 448 {
AnnaBridge 161:aa5281ff4a02 449 __ASM volatile ("cpsid f" : : : "memory");
AnnaBridge 161:aa5281ff4a02 450 }
AnnaBridge 161:aa5281ff4a02 451
AnnaBridge 161:aa5281ff4a02 452
AnnaBridge 161:aa5281ff4a02 453 /**
AnnaBridge 161:aa5281ff4a02 454 \brief Get Base Priority
AnnaBridge 161:aa5281ff4a02 455 \details Returns the current value of the Base Priority register.
AnnaBridge 161:aa5281ff4a02 456 \return Base Priority register value
AnnaBridge 161:aa5281ff4a02 457 */
AnnaBridge 161:aa5281ff4a02 458 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 161:aa5281ff4a02 459 {
AnnaBridge 161:aa5281ff4a02 460 uint32_t result;
AnnaBridge 161:aa5281ff4a02 461
AnnaBridge 161:aa5281ff4a02 462 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 463 return(result);
AnnaBridge 161:aa5281ff4a02 464 }
AnnaBridge 161:aa5281ff4a02 465
AnnaBridge 161:aa5281ff4a02 466
AnnaBridge 161:aa5281ff4a02 467 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 468 /**
AnnaBridge 161:aa5281ff4a02 469 \brief Get Base Priority (non-secure)
AnnaBridge 161:aa5281ff4a02 470 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 161:aa5281ff4a02 471 \return Base Priority register value
AnnaBridge 161:aa5281ff4a02 472 */
AnnaBridge 161:aa5281ff4a02 473 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 161:aa5281ff4a02 474 {
AnnaBridge 161:aa5281ff4a02 475 uint32_t result;
AnnaBridge 161:aa5281ff4a02 476
AnnaBridge 161:aa5281ff4a02 477 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 478 return(result);
AnnaBridge 161:aa5281ff4a02 479 }
AnnaBridge 161:aa5281ff4a02 480 #endif
AnnaBridge 161:aa5281ff4a02 481
AnnaBridge 161:aa5281ff4a02 482
AnnaBridge 161:aa5281ff4a02 483 /**
AnnaBridge 161:aa5281ff4a02 484 \brief Set Base Priority
AnnaBridge 161:aa5281ff4a02 485 \details Assigns the given value to the Base Priority register.
AnnaBridge 161:aa5281ff4a02 486 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 487 */
AnnaBridge 161:aa5281ff4a02 488 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 489 {
AnnaBridge 161:aa5281ff4a02 490 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 491 }
AnnaBridge 161:aa5281ff4a02 492
AnnaBridge 161:aa5281ff4a02 493
AnnaBridge 161:aa5281ff4a02 494 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 495 /**
AnnaBridge 161:aa5281ff4a02 496 \brief Set Base Priority (non-secure)
AnnaBridge 161:aa5281ff4a02 497 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 161:aa5281ff4a02 498 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 499 */
AnnaBridge 161:aa5281ff4a02 500 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 501 {
AnnaBridge 161:aa5281ff4a02 502 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 503 }
AnnaBridge 161:aa5281ff4a02 504 #endif
AnnaBridge 161:aa5281ff4a02 505
AnnaBridge 161:aa5281ff4a02 506
AnnaBridge 161:aa5281ff4a02 507 /**
AnnaBridge 161:aa5281ff4a02 508 \brief Set Base Priority with condition
AnnaBridge 161:aa5281ff4a02 509 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 161:aa5281ff4a02 510 or the new value increases the BASEPRI priority level.
AnnaBridge 161:aa5281ff4a02 511 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 512 */
AnnaBridge 161:aa5281ff4a02 513 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 514 {
AnnaBridge 161:aa5281ff4a02 515 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 516 }
AnnaBridge 161:aa5281ff4a02 517
AnnaBridge 161:aa5281ff4a02 518
AnnaBridge 161:aa5281ff4a02 519 /**
AnnaBridge 161:aa5281ff4a02 520 \brief Get Fault Mask
AnnaBridge 161:aa5281ff4a02 521 \details Returns the current value of the Fault Mask register.
AnnaBridge 161:aa5281ff4a02 522 \return Fault Mask register value
AnnaBridge 161:aa5281ff4a02 523 */
AnnaBridge 161:aa5281ff4a02 524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 161:aa5281ff4a02 525 {
AnnaBridge 161:aa5281ff4a02 526 uint32_t result;
AnnaBridge 161:aa5281ff4a02 527
AnnaBridge 161:aa5281ff4a02 528 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 529 return(result);
AnnaBridge 161:aa5281ff4a02 530 }
AnnaBridge 161:aa5281ff4a02 531
AnnaBridge 161:aa5281ff4a02 532
AnnaBridge 161:aa5281ff4a02 533 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 534 /**
AnnaBridge 161:aa5281ff4a02 535 \brief Get Fault Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 536 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 161:aa5281ff4a02 537 \return Fault Mask register value
AnnaBridge 161:aa5281ff4a02 538 */
AnnaBridge 161:aa5281ff4a02 539 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 161:aa5281ff4a02 540 {
AnnaBridge 161:aa5281ff4a02 541 uint32_t result;
AnnaBridge 161:aa5281ff4a02 542
AnnaBridge 161:aa5281ff4a02 543 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 544 return(result);
AnnaBridge 161:aa5281ff4a02 545 }
AnnaBridge 161:aa5281ff4a02 546 #endif
AnnaBridge 161:aa5281ff4a02 547
AnnaBridge 161:aa5281ff4a02 548
AnnaBridge 161:aa5281ff4a02 549 /**
AnnaBridge 161:aa5281ff4a02 550 \brief Set Fault Mask
AnnaBridge 161:aa5281ff4a02 551 \details Assigns the given value to the Fault Mask register.
AnnaBridge 161:aa5281ff4a02 552 \param [in] faultMask Fault Mask value to set
AnnaBridge 161:aa5281ff4a02 553 */
AnnaBridge 161:aa5281ff4a02 554 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 161:aa5281ff4a02 555 {
AnnaBridge 161:aa5281ff4a02 556 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 161:aa5281ff4a02 557 }
AnnaBridge 161:aa5281ff4a02 558
AnnaBridge 161:aa5281ff4a02 559
AnnaBridge 161:aa5281ff4a02 560 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 561 /**
AnnaBridge 161:aa5281ff4a02 562 \brief Set Fault Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 563 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 161:aa5281ff4a02 564 \param [in] faultMask Fault Mask value to set
AnnaBridge 161:aa5281ff4a02 565 */
AnnaBridge 161:aa5281ff4a02 566 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 161:aa5281ff4a02 567 {
AnnaBridge 161:aa5281ff4a02 568 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 161:aa5281ff4a02 569 }
AnnaBridge 161:aa5281ff4a02 570 #endif
AnnaBridge 161:aa5281ff4a02 571
AnnaBridge 161:aa5281ff4a02 572 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 573 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 574 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 575
AnnaBridge 161:aa5281ff4a02 576
AnnaBridge 161:aa5281ff4a02 577 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 578 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 579
AnnaBridge 161:aa5281ff4a02 580 /**
AnnaBridge 161:aa5281ff4a02 581 \brief Get Process Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 582 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 161:aa5281ff4a02 583 \return PSPLIM Register value
AnnaBridge 161:aa5281ff4a02 584 */
AnnaBridge 161:aa5281ff4a02 585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 161:aa5281ff4a02 586 {
AnnaBridge 161:aa5281ff4a02 587 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 588
AnnaBridge 161:aa5281ff4a02 589 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 590 return(result);
AnnaBridge 161:aa5281ff4a02 591 }
AnnaBridge 161:aa5281ff4a02 592
AnnaBridge 161:aa5281ff4a02 593
AnnaBridge 161:aa5281ff4a02 594 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 595 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 596 /**
AnnaBridge 161:aa5281ff4a02 597 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 598 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 599 \return PSPLIM Register value
AnnaBridge 161:aa5281ff4a02 600 */
AnnaBridge 161:aa5281ff4a02 601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 161:aa5281ff4a02 602 {
AnnaBridge 161:aa5281ff4a02 603 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 604
AnnaBridge 161:aa5281ff4a02 605 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 606 return(result);
AnnaBridge 161:aa5281ff4a02 607 }
AnnaBridge 161:aa5281ff4a02 608 #endif
AnnaBridge 161:aa5281ff4a02 609
AnnaBridge 161:aa5281ff4a02 610
AnnaBridge 161:aa5281ff4a02 611 /**
AnnaBridge 161:aa5281ff4a02 612 \brief Set Process Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 613 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 161:aa5281ff4a02 614 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 615 */
AnnaBridge 161:aa5281ff4a02 616 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 617 {
AnnaBridge 161:aa5281ff4a02 618 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 619 }
AnnaBridge 161:aa5281ff4a02 620
AnnaBridge 161:aa5281ff4a02 621
AnnaBridge 161:aa5281ff4a02 622 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 623 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 624 /**
AnnaBridge 161:aa5281ff4a02 625 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 626 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 627 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 628 */
AnnaBridge 161:aa5281ff4a02 629 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 630 {
AnnaBridge 161:aa5281ff4a02 631 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 632 }
AnnaBridge 161:aa5281ff4a02 633 #endif
AnnaBridge 161:aa5281ff4a02 634
AnnaBridge 161:aa5281ff4a02 635
AnnaBridge 161:aa5281ff4a02 636 /**
AnnaBridge 161:aa5281ff4a02 637 \brief Get Main Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 638 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 161:aa5281ff4a02 639 \return MSPLIM Register value
AnnaBridge 161:aa5281ff4a02 640 */
AnnaBridge 161:aa5281ff4a02 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 161:aa5281ff4a02 642 {
AnnaBridge 161:aa5281ff4a02 643 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 644
AnnaBridge 161:aa5281ff4a02 645 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 646
AnnaBridge 161:aa5281ff4a02 647 return(result);
AnnaBridge 161:aa5281ff4a02 648 }
AnnaBridge 161:aa5281ff4a02 649
AnnaBridge 161:aa5281ff4a02 650
AnnaBridge 161:aa5281ff4a02 651 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 652 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 653 /**
AnnaBridge 161:aa5281ff4a02 654 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 655 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 656 \return MSPLIM Register value
AnnaBridge 161:aa5281ff4a02 657 */
AnnaBridge 161:aa5281ff4a02 658 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 161:aa5281ff4a02 659 {
AnnaBridge 161:aa5281ff4a02 660 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 661
AnnaBridge 161:aa5281ff4a02 662 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 663 return(result);
AnnaBridge 161:aa5281ff4a02 664 }
AnnaBridge 161:aa5281ff4a02 665 #endif
AnnaBridge 161:aa5281ff4a02 666
AnnaBridge 161:aa5281ff4a02 667
AnnaBridge 161:aa5281ff4a02 668 /**
AnnaBridge 161:aa5281ff4a02 669 \brief Set Main Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 670 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 161:aa5281ff4a02 671 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 672 */
AnnaBridge 161:aa5281ff4a02 673 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 674 {
AnnaBridge 161:aa5281ff4a02 675 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 676 }
AnnaBridge 161:aa5281ff4a02 677
AnnaBridge 161:aa5281ff4a02 678
AnnaBridge 161:aa5281ff4a02 679 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 680 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 681 /**
AnnaBridge 161:aa5281ff4a02 682 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 683 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 684 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 685 */
AnnaBridge 161:aa5281ff4a02 686 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 687 {
AnnaBridge 161:aa5281ff4a02 688 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 689 }
AnnaBridge 161:aa5281ff4a02 690 #endif
AnnaBridge 161:aa5281ff4a02 691
AnnaBridge 161:aa5281ff4a02 692 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 693 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 694
AnnaBridge 161:aa5281ff4a02 695
AnnaBridge 161:aa5281ff4a02 696 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 697 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 698
AnnaBridge 161:aa5281ff4a02 699 /**
AnnaBridge 161:aa5281ff4a02 700 \brief Get FPSCR
AnnaBridge 161:aa5281ff4a02 701 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 702 \return Floating Point Status/Control register value
AnnaBridge 161:aa5281ff4a02 703 */
AnnaBridge 161:aa5281ff4a02 704 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 161:aa5281ff4a02 705 {
AnnaBridge 161:aa5281ff4a02 706 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 707 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 161:aa5281ff4a02 708 #if __has_builtin(__builtin_arm_get_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge 161:aa5281ff4a02 709 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge 161:aa5281ff4a02 710 return __builtin_arm_get_fpscr();
AnnaBridge 161:aa5281ff4a02 711 #else
AnnaBridge 161:aa5281ff4a02 712 uint32_t result;
AnnaBridge 161:aa5281ff4a02 713
AnnaBridge 161:aa5281ff4a02 714 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 715 return(result);
AnnaBridge 161:aa5281ff4a02 716 #endif
AnnaBridge 161:aa5281ff4a02 717 #else
AnnaBridge 161:aa5281ff4a02 718 return(0U);
AnnaBridge 161:aa5281ff4a02 719 #endif
AnnaBridge 161:aa5281ff4a02 720 }
AnnaBridge 161:aa5281ff4a02 721
AnnaBridge 161:aa5281ff4a02 722
AnnaBridge 161:aa5281ff4a02 723 /**
AnnaBridge 161:aa5281ff4a02 724 \brief Set FPSCR
AnnaBridge 161:aa5281ff4a02 725 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 726 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 161:aa5281ff4a02 727 */
AnnaBridge 161:aa5281ff4a02 728 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 161:aa5281ff4a02 729 {
AnnaBridge 161:aa5281ff4a02 730 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 731 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 161:aa5281ff4a02 732 #if __has_builtin(__builtin_arm_set_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge 161:aa5281ff4a02 733 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge 161:aa5281ff4a02 734 __builtin_arm_set_fpscr(fpscr);
AnnaBridge 161:aa5281ff4a02 735 #else
AnnaBridge 161:aa5281ff4a02 736 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
AnnaBridge 161:aa5281ff4a02 737 #endif
AnnaBridge 161:aa5281ff4a02 738 #else
AnnaBridge 161:aa5281ff4a02 739 (void)fpscr;
AnnaBridge 161:aa5281ff4a02 740 #endif
AnnaBridge 161:aa5281ff4a02 741 }
AnnaBridge 161:aa5281ff4a02 742
AnnaBridge 161:aa5281ff4a02 743 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 744 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 745
AnnaBridge 161:aa5281ff4a02 746
AnnaBridge 161:aa5281ff4a02 747
AnnaBridge 161:aa5281ff4a02 748 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 161:aa5281ff4a02 749
AnnaBridge 161:aa5281ff4a02 750
AnnaBridge 161:aa5281ff4a02 751 /* ########################## Core Instruction Access ######################### */
AnnaBridge 161:aa5281ff4a02 752 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 161:aa5281ff4a02 753 Access to dedicated instructions
AnnaBridge 161:aa5281ff4a02 754 @{
AnnaBridge 161:aa5281ff4a02 755 */
AnnaBridge 161:aa5281ff4a02 756
AnnaBridge 161:aa5281ff4a02 757 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 161:aa5281ff4a02 758 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 161:aa5281ff4a02 759 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 161:aa5281ff4a02 760 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 161:aa5281ff4a02 761 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 161:aa5281ff4a02 762 #define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge 161:aa5281ff4a02 763 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 161:aa5281ff4a02 764 #else
AnnaBridge 161:aa5281ff4a02 765 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 161:aa5281ff4a02 766 #define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge 161:aa5281ff4a02 767 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 161:aa5281ff4a02 768 #endif
AnnaBridge 161:aa5281ff4a02 769
AnnaBridge 161:aa5281ff4a02 770 /**
AnnaBridge 161:aa5281ff4a02 771 \brief No Operation
AnnaBridge 161:aa5281ff4a02 772 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 161:aa5281ff4a02 773 */
AnnaBridge 161:aa5281ff4a02 774 //__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
AnnaBridge 161:aa5281ff4a02 775 //{
AnnaBridge 161:aa5281ff4a02 776 // __ASM volatile ("nop");
AnnaBridge 161:aa5281ff4a02 777 //}
AnnaBridge 161:aa5281ff4a02 778 #define __NOP() __ASM volatile ("nop") /* This implementation generates debug information */
AnnaBridge 161:aa5281ff4a02 779
AnnaBridge 161:aa5281ff4a02 780 /**
AnnaBridge 161:aa5281ff4a02 781 \brief Wait For Interrupt
AnnaBridge 161:aa5281ff4a02 782 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 161:aa5281ff4a02 783 */
AnnaBridge 161:aa5281ff4a02 784 //__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
AnnaBridge 161:aa5281ff4a02 785 //{
AnnaBridge 161:aa5281ff4a02 786 // __ASM volatile ("wfi");
AnnaBridge 161:aa5281ff4a02 787 //}
AnnaBridge 161:aa5281ff4a02 788 #define __WFI() __ASM volatile ("wfi") /* This implementation generates debug information */
AnnaBridge 161:aa5281ff4a02 789
AnnaBridge 161:aa5281ff4a02 790
AnnaBridge 161:aa5281ff4a02 791 /**
AnnaBridge 161:aa5281ff4a02 792 \brief Wait For Event
AnnaBridge 161:aa5281ff4a02 793 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 161:aa5281ff4a02 794 a low-power state until one of a number of events occurs.
AnnaBridge 161:aa5281ff4a02 795 */
AnnaBridge 161:aa5281ff4a02 796 //__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
AnnaBridge 161:aa5281ff4a02 797 //{
AnnaBridge 161:aa5281ff4a02 798 // __ASM volatile ("wfe");
AnnaBridge 161:aa5281ff4a02 799 //}
AnnaBridge 161:aa5281ff4a02 800 #define __WFE() __ASM volatile ("wfe") /* This implementation generates debug information */
AnnaBridge 161:aa5281ff4a02 801
AnnaBridge 161:aa5281ff4a02 802
AnnaBridge 161:aa5281ff4a02 803 /**
AnnaBridge 161:aa5281ff4a02 804 \brief Send Event
AnnaBridge 161:aa5281ff4a02 805 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 161:aa5281ff4a02 806 */
AnnaBridge 161:aa5281ff4a02 807 //__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
AnnaBridge 161:aa5281ff4a02 808 //{
AnnaBridge 161:aa5281ff4a02 809 // __ASM volatile ("sev");
AnnaBridge 161:aa5281ff4a02 810 //}
AnnaBridge 161:aa5281ff4a02 811 #define __SEV() __ASM volatile ("sev") /* This implementation generates debug information */
AnnaBridge 161:aa5281ff4a02 812
AnnaBridge 161:aa5281ff4a02 813
AnnaBridge 161:aa5281ff4a02 814 /**
AnnaBridge 161:aa5281ff4a02 815 \brief Instruction Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 816 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 161:aa5281ff4a02 817 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 161:aa5281ff4a02 818 after the instruction has been completed.
AnnaBridge 161:aa5281ff4a02 819 */
AnnaBridge 161:aa5281ff4a02 820 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
AnnaBridge 161:aa5281ff4a02 821 {
AnnaBridge 161:aa5281ff4a02 822 __ASM volatile ("isb 0xF":::"memory");
AnnaBridge 161:aa5281ff4a02 823 }
AnnaBridge 161:aa5281ff4a02 824
AnnaBridge 161:aa5281ff4a02 825
AnnaBridge 161:aa5281ff4a02 826 /**
AnnaBridge 161:aa5281ff4a02 827 \brief Data Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 828 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 161:aa5281ff4a02 829 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 161:aa5281ff4a02 830 */
AnnaBridge 161:aa5281ff4a02 831 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
AnnaBridge 161:aa5281ff4a02 832 {
AnnaBridge 161:aa5281ff4a02 833 __ASM volatile ("dsb 0xF":::"memory");
AnnaBridge 161:aa5281ff4a02 834 }
AnnaBridge 161:aa5281ff4a02 835
AnnaBridge 161:aa5281ff4a02 836
AnnaBridge 161:aa5281ff4a02 837 /**
AnnaBridge 161:aa5281ff4a02 838 \brief Data Memory Barrier
AnnaBridge 161:aa5281ff4a02 839 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 161:aa5281ff4a02 840 and after the instruction, without ensuring their completion.
AnnaBridge 161:aa5281ff4a02 841 */
AnnaBridge 161:aa5281ff4a02 842 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
AnnaBridge 161:aa5281ff4a02 843 {
AnnaBridge 161:aa5281ff4a02 844 __ASM volatile ("dmb 0xF":::"memory");
AnnaBridge 161:aa5281ff4a02 845 }
AnnaBridge 161:aa5281ff4a02 846
AnnaBridge 161:aa5281ff4a02 847
AnnaBridge 161:aa5281ff4a02 848 /**
AnnaBridge 161:aa5281ff4a02 849 \brief Reverse byte order (32 bit)
AnnaBridge 161:aa5281ff4a02 850 \details Reverses the byte order in unsigned integer value.
AnnaBridge 161:aa5281ff4a02 851 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 852 \return Reversed value
AnnaBridge 161:aa5281ff4a02 853 */
AnnaBridge 161:aa5281ff4a02 854 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
AnnaBridge 161:aa5281ff4a02 855 {
AnnaBridge 161:aa5281ff4a02 856 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge 161:aa5281ff4a02 857 return __builtin_bswap32(value);
AnnaBridge 161:aa5281ff4a02 858 #else
AnnaBridge 161:aa5281ff4a02 859 uint32_t result;
AnnaBridge 161:aa5281ff4a02 860
AnnaBridge 161:aa5281ff4a02 861 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 862 return(result);
AnnaBridge 161:aa5281ff4a02 863 #endif
AnnaBridge 161:aa5281ff4a02 864 }
AnnaBridge 161:aa5281ff4a02 865
AnnaBridge 161:aa5281ff4a02 866
AnnaBridge 161:aa5281ff4a02 867 /**
AnnaBridge 161:aa5281ff4a02 868 \brief Reverse byte order (16 bit)
AnnaBridge 161:aa5281ff4a02 869 \details Reverses the byte order in unsigned short value.
AnnaBridge 161:aa5281ff4a02 870 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 871 \return Reversed value
AnnaBridge 161:aa5281ff4a02 872 */
AnnaBridge 161:aa5281ff4a02 873 __attribute__((always_inline)) __STATIC_INLINE uint16_t __REV16(uint16_t value)
AnnaBridge 161:aa5281ff4a02 874 {
AnnaBridge 161:aa5281ff4a02 875 uint16_t result;
AnnaBridge 161:aa5281ff4a02 876
AnnaBridge 161:aa5281ff4a02 877 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 878 return(result);
AnnaBridge 161:aa5281ff4a02 879 }
AnnaBridge 161:aa5281ff4a02 880
AnnaBridge 161:aa5281ff4a02 881
AnnaBridge 161:aa5281ff4a02 882 /**
AnnaBridge 161:aa5281ff4a02 883 \brief Reverse byte order in signed short value
AnnaBridge 161:aa5281ff4a02 884 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 161:aa5281ff4a02 885 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 886 \return Reversed value
AnnaBridge 161:aa5281ff4a02 887 */
AnnaBridge 161:aa5281ff4a02 888 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 161:aa5281ff4a02 889 {
AnnaBridge 161:aa5281ff4a02 890 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 161:aa5281ff4a02 891 return (int16_t)__builtin_bswap16(value);
AnnaBridge 161:aa5281ff4a02 892 #else
AnnaBridge 161:aa5281ff4a02 893 int16_t result;
AnnaBridge 161:aa5281ff4a02 894
AnnaBridge 161:aa5281ff4a02 895 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 896 return result;
AnnaBridge 161:aa5281ff4a02 897 #endif
AnnaBridge 161:aa5281ff4a02 898 }
AnnaBridge 161:aa5281ff4a02 899
AnnaBridge 161:aa5281ff4a02 900
AnnaBridge 161:aa5281ff4a02 901 /**
AnnaBridge 161:aa5281ff4a02 902 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 161:aa5281ff4a02 903 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 161:aa5281ff4a02 904 \param [in] op1 Value to rotate
AnnaBridge 161:aa5281ff4a02 905 \param [in] op2 Number of Bits to rotate
AnnaBridge 161:aa5281ff4a02 906 \return Rotated value
AnnaBridge 161:aa5281ff4a02 907 */
AnnaBridge 161:aa5281ff4a02 908 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 909 {
AnnaBridge 161:aa5281ff4a02 910 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 161:aa5281ff4a02 911 }
AnnaBridge 161:aa5281ff4a02 912
AnnaBridge 161:aa5281ff4a02 913
AnnaBridge 161:aa5281ff4a02 914 /**
AnnaBridge 161:aa5281ff4a02 915 \brief Breakpoint
AnnaBridge 161:aa5281ff4a02 916 \details Causes the processor to enter Debug state.
AnnaBridge 161:aa5281ff4a02 917 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 161:aa5281ff4a02 918 \param [in] value is ignored by the processor.
AnnaBridge 161:aa5281ff4a02 919 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 161:aa5281ff4a02 920 */
AnnaBridge 161:aa5281ff4a02 921 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 161:aa5281ff4a02 922
AnnaBridge 161:aa5281ff4a02 923
AnnaBridge 161:aa5281ff4a02 924 /**
AnnaBridge 161:aa5281ff4a02 925 \brief Reverse bit order of value
AnnaBridge 161:aa5281ff4a02 926 \details Reverses the bit order of the given value.
AnnaBridge 161:aa5281ff4a02 927 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 928 \return Reversed value
AnnaBridge 161:aa5281ff4a02 929 */
AnnaBridge 161:aa5281ff4a02 930 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 161:aa5281ff4a02 931 {
AnnaBridge 161:aa5281ff4a02 932 uint32_t result;
AnnaBridge 161:aa5281ff4a02 933
AnnaBridge 161:aa5281ff4a02 934 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 935 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 936 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 937 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 161:aa5281ff4a02 938 #else
AnnaBridge 161:aa5281ff4a02 939 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge 161:aa5281ff4a02 940
AnnaBridge 161:aa5281ff4a02 941 result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge 161:aa5281ff4a02 942 for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge 161:aa5281ff4a02 943 {
AnnaBridge 161:aa5281ff4a02 944 result <<= 1U;
AnnaBridge 161:aa5281ff4a02 945 result |= value & 1U;
AnnaBridge 161:aa5281ff4a02 946 s--;
AnnaBridge 161:aa5281ff4a02 947 }
AnnaBridge 161:aa5281ff4a02 948 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 161:aa5281ff4a02 949 #endif
AnnaBridge 161:aa5281ff4a02 950 return result;
AnnaBridge 161:aa5281ff4a02 951 }
AnnaBridge 161:aa5281ff4a02 952
AnnaBridge 161:aa5281ff4a02 953
AnnaBridge 161:aa5281ff4a02 954 /**
AnnaBridge 161:aa5281ff4a02 955 \brief Count leading zeros
AnnaBridge 161:aa5281ff4a02 956 \details Counts the number of leading zeros of a data value.
AnnaBridge 161:aa5281ff4a02 957 \param [in] value Value to count the leading zeros
AnnaBridge 161:aa5281ff4a02 958 \return number of leading zeros in value
AnnaBridge 161:aa5281ff4a02 959 */
AnnaBridge 161:aa5281ff4a02 960 #define __CLZ __builtin_clz
AnnaBridge 161:aa5281ff4a02 961
AnnaBridge 161:aa5281ff4a02 962
AnnaBridge 161:aa5281ff4a02 963 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 964 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 965 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 966 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 967 /**
AnnaBridge 161:aa5281ff4a02 968 \brief LDR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 969 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 970 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 971 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 972 */
AnnaBridge 161:aa5281ff4a02 973 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge 161:aa5281ff4a02 974 {
AnnaBridge 161:aa5281ff4a02 975 uint32_t result;
AnnaBridge 161:aa5281ff4a02 976
AnnaBridge 161:aa5281ff4a02 977 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 161:aa5281ff4a02 978 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 161:aa5281ff4a02 979 #else
AnnaBridge 161:aa5281ff4a02 980 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 161:aa5281ff4a02 981 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 161:aa5281ff4a02 982 */
AnnaBridge 161:aa5281ff4a02 983 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 161:aa5281ff4a02 984 #endif
AnnaBridge 161:aa5281ff4a02 985 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 986 }
AnnaBridge 161:aa5281ff4a02 987
AnnaBridge 161:aa5281ff4a02 988
AnnaBridge 161:aa5281ff4a02 989 /**
AnnaBridge 161:aa5281ff4a02 990 \brief LDR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 991 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 992 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 993 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 994 */
AnnaBridge 161:aa5281ff4a02 995 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge 161:aa5281ff4a02 996 {
AnnaBridge 161:aa5281ff4a02 997 uint32_t result;
AnnaBridge 161:aa5281ff4a02 998
AnnaBridge 161:aa5281ff4a02 999 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 161:aa5281ff4a02 1000 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 161:aa5281ff4a02 1001 #else
AnnaBridge 161:aa5281ff4a02 1002 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 161:aa5281ff4a02 1003 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 161:aa5281ff4a02 1004 */
AnnaBridge 161:aa5281ff4a02 1005 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 161:aa5281ff4a02 1006 #endif
AnnaBridge 161:aa5281ff4a02 1007 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 1008 }
AnnaBridge 161:aa5281ff4a02 1009
AnnaBridge 161:aa5281ff4a02 1010
AnnaBridge 161:aa5281ff4a02 1011 /**
AnnaBridge 161:aa5281ff4a02 1012 \brief LDR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1013 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1014 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1015 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1016 */
AnnaBridge 161:aa5281ff4a02 1017 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge 161:aa5281ff4a02 1018 {
AnnaBridge 161:aa5281ff4a02 1019 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1020
AnnaBridge 161:aa5281ff4a02 1021 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 161:aa5281ff4a02 1022 return(result);
AnnaBridge 161:aa5281ff4a02 1023 }
AnnaBridge 161:aa5281ff4a02 1024
AnnaBridge 161:aa5281ff4a02 1025
AnnaBridge 161:aa5281ff4a02 1026 /**
AnnaBridge 161:aa5281ff4a02 1027 \brief STR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 1028 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1029 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1030 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1031 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1032 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1033 */
AnnaBridge 161:aa5281ff4a02 1034 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge 161:aa5281ff4a02 1035 {
AnnaBridge 161:aa5281ff4a02 1036 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1037
AnnaBridge 161:aa5281ff4a02 1038 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1039 return(result);
AnnaBridge 161:aa5281ff4a02 1040 }
AnnaBridge 161:aa5281ff4a02 1041
AnnaBridge 161:aa5281ff4a02 1042
AnnaBridge 161:aa5281ff4a02 1043 /**
AnnaBridge 161:aa5281ff4a02 1044 \brief STR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 1045 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1046 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1047 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1048 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1049 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1050 */
AnnaBridge 161:aa5281ff4a02 1051 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge 161:aa5281ff4a02 1052 {
AnnaBridge 161:aa5281ff4a02 1053 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1054
AnnaBridge 161:aa5281ff4a02 1055 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1056 return(result);
AnnaBridge 161:aa5281ff4a02 1057 }
AnnaBridge 161:aa5281ff4a02 1058
AnnaBridge 161:aa5281ff4a02 1059
AnnaBridge 161:aa5281ff4a02 1060 /**
AnnaBridge 161:aa5281ff4a02 1061 \brief STR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1062 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1063 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1064 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1065 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1066 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1067 */
AnnaBridge 161:aa5281ff4a02 1068 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge 161:aa5281ff4a02 1069 {
AnnaBridge 161:aa5281ff4a02 1070 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1071
AnnaBridge 161:aa5281ff4a02 1072 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge 161:aa5281ff4a02 1073 return(result);
AnnaBridge 161:aa5281ff4a02 1074 }
AnnaBridge 161:aa5281ff4a02 1075
AnnaBridge 161:aa5281ff4a02 1076
AnnaBridge 161:aa5281ff4a02 1077 /**
AnnaBridge 161:aa5281ff4a02 1078 \brief Remove the exclusive lock
AnnaBridge 161:aa5281ff4a02 1079 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 161:aa5281ff4a02 1080 */
AnnaBridge 161:aa5281ff4a02 1081 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
AnnaBridge 161:aa5281ff4a02 1082 {
AnnaBridge 161:aa5281ff4a02 1083 __ASM volatile ("clrex" ::: "memory");
AnnaBridge 161:aa5281ff4a02 1084 }
AnnaBridge 161:aa5281ff4a02 1085
AnnaBridge 161:aa5281ff4a02 1086 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1087 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1088 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1089 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1090
AnnaBridge 161:aa5281ff4a02 1091
AnnaBridge 161:aa5281ff4a02 1092 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1093 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1094 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 1095 /**
AnnaBridge 161:aa5281ff4a02 1096 \brief Signed Saturate
AnnaBridge 161:aa5281ff4a02 1097 \details Saturates a signed value.
AnnaBridge 161:aa5281ff4a02 1098 \param [in] ARG1 Value to be saturated
AnnaBridge 161:aa5281ff4a02 1099 \param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge 161:aa5281ff4a02 1100 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1101 */
AnnaBridge 161:aa5281ff4a02 1102 #define __SSAT(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1103 __extension__ \
AnnaBridge 161:aa5281ff4a02 1104 ({ \
AnnaBridge 161:aa5281ff4a02 1105 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1106 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1107 __RES; \
AnnaBridge 161:aa5281ff4a02 1108 })
AnnaBridge 161:aa5281ff4a02 1109
AnnaBridge 161:aa5281ff4a02 1110
AnnaBridge 161:aa5281ff4a02 1111 /**
AnnaBridge 161:aa5281ff4a02 1112 \brief Unsigned Saturate
AnnaBridge 161:aa5281ff4a02 1113 \details Saturates an unsigned value.
AnnaBridge 161:aa5281ff4a02 1114 \param [in] ARG1 Value to be saturated
AnnaBridge 161:aa5281ff4a02 1115 \param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge 161:aa5281ff4a02 1116 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1117 */
AnnaBridge 161:aa5281ff4a02 1118 #define __USAT(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1119 __extension__ \
AnnaBridge 161:aa5281ff4a02 1120 ({ \
AnnaBridge 161:aa5281ff4a02 1121 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1122 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1123 __RES; \
AnnaBridge 161:aa5281ff4a02 1124 })
AnnaBridge 161:aa5281ff4a02 1125
AnnaBridge 161:aa5281ff4a02 1126
AnnaBridge 161:aa5281ff4a02 1127 /**
AnnaBridge 161:aa5281ff4a02 1128 \brief Rotate Right with Extend (32 bit)
AnnaBridge 161:aa5281ff4a02 1129 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 161:aa5281ff4a02 1130 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 161:aa5281ff4a02 1131 \param [in] value Value to rotate
AnnaBridge 161:aa5281ff4a02 1132 \return Rotated value
AnnaBridge 161:aa5281ff4a02 1133 */
AnnaBridge 161:aa5281ff4a02 1134 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 161:aa5281ff4a02 1135 {
AnnaBridge 161:aa5281ff4a02 1136 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1137
AnnaBridge 161:aa5281ff4a02 1138 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 1139 return(result);
AnnaBridge 161:aa5281ff4a02 1140 }
AnnaBridge 161:aa5281ff4a02 1141
AnnaBridge 161:aa5281ff4a02 1142
AnnaBridge 161:aa5281ff4a02 1143 /**
AnnaBridge 161:aa5281ff4a02 1144 \brief LDRT Unprivileged (8 bit)
AnnaBridge 161:aa5281ff4a02 1145 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 1146 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1147 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1148 */
AnnaBridge 161:aa5281ff4a02 1149 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1150 {
AnnaBridge 161:aa5281ff4a02 1151 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1152
AnnaBridge 161:aa5281ff4a02 1153 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 161:aa5281ff4a02 1154 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1155 #else
AnnaBridge 161:aa5281ff4a02 1156 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 161:aa5281ff4a02 1157 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 161:aa5281ff4a02 1158 */
AnnaBridge 161:aa5281ff4a02 1159 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 161:aa5281ff4a02 1160 #endif
AnnaBridge 161:aa5281ff4a02 1161 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 1162 }
AnnaBridge 161:aa5281ff4a02 1163
AnnaBridge 161:aa5281ff4a02 1164
AnnaBridge 161:aa5281ff4a02 1165 /**
AnnaBridge 161:aa5281ff4a02 1166 \brief LDRT Unprivileged (16 bit)
AnnaBridge 161:aa5281ff4a02 1167 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1168 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1169 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1170 */
AnnaBridge 161:aa5281ff4a02 1171 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1172 {
AnnaBridge 161:aa5281ff4a02 1173 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1174
AnnaBridge 161:aa5281ff4a02 1175 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 161:aa5281ff4a02 1176 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1177 #else
AnnaBridge 161:aa5281ff4a02 1178 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 161:aa5281ff4a02 1179 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 161:aa5281ff4a02 1180 */
AnnaBridge 161:aa5281ff4a02 1181 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 161:aa5281ff4a02 1182 #endif
AnnaBridge 161:aa5281ff4a02 1183 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 1184 }
AnnaBridge 161:aa5281ff4a02 1185
AnnaBridge 161:aa5281ff4a02 1186
AnnaBridge 161:aa5281ff4a02 1187 /**
AnnaBridge 161:aa5281ff4a02 1188 \brief LDRT Unprivileged (32 bit)
AnnaBridge 161:aa5281ff4a02 1189 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1190 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1191 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1192 */
AnnaBridge 161:aa5281ff4a02 1193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1194 {
AnnaBridge 161:aa5281ff4a02 1195 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1196
AnnaBridge 161:aa5281ff4a02 1197 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1198 return(result);
AnnaBridge 161:aa5281ff4a02 1199 }
AnnaBridge 161:aa5281ff4a02 1200
AnnaBridge 161:aa5281ff4a02 1201
AnnaBridge 161:aa5281ff4a02 1202 /**
AnnaBridge 161:aa5281ff4a02 1203 \brief STRT Unprivileged (8 bit)
AnnaBridge 161:aa5281ff4a02 1204 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1205 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1206 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1207 */
AnnaBridge 161:aa5281ff4a02 1208 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1209 {
AnnaBridge 161:aa5281ff4a02 1210 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1211 }
AnnaBridge 161:aa5281ff4a02 1212
AnnaBridge 161:aa5281ff4a02 1213
AnnaBridge 161:aa5281ff4a02 1214 /**
AnnaBridge 161:aa5281ff4a02 1215 \brief STRT Unprivileged (16 bit)
AnnaBridge 161:aa5281ff4a02 1216 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1217 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1218 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1219 */
AnnaBridge 161:aa5281ff4a02 1220 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1221 {
AnnaBridge 161:aa5281ff4a02 1222 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1223 }
AnnaBridge 161:aa5281ff4a02 1224
AnnaBridge 161:aa5281ff4a02 1225
AnnaBridge 161:aa5281ff4a02 1226 /**
AnnaBridge 161:aa5281ff4a02 1227 \brief STRT Unprivileged (32 bit)
AnnaBridge 161:aa5281ff4a02 1228 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1229 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1230 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1231 */
AnnaBridge 161:aa5281ff4a02 1232 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1233 {
AnnaBridge 161:aa5281ff4a02 1234 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 161:aa5281ff4a02 1235 }
AnnaBridge 161:aa5281ff4a02 1236
AnnaBridge 161:aa5281ff4a02 1237 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1238 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1239 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1240
AnnaBridge 161:aa5281ff4a02 1241 /**
AnnaBridge 161:aa5281ff4a02 1242 \brief Signed Saturate
AnnaBridge 161:aa5281ff4a02 1243 \details Saturates a signed value.
AnnaBridge 161:aa5281ff4a02 1244 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 1245 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 161:aa5281ff4a02 1246 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1247 */
AnnaBridge 161:aa5281ff4a02 1248 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge 161:aa5281ff4a02 1249 {
AnnaBridge 161:aa5281ff4a02 1250 if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge 161:aa5281ff4a02 1251 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 161:aa5281ff4a02 1252 const int32_t min = -1 - max ;
AnnaBridge 161:aa5281ff4a02 1253 if (val > max) {
AnnaBridge 161:aa5281ff4a02 1254 return max;
AnnaBridge 161:aa5281ff4a02 1255 } else if (val < min) {
AnnaBridge 161:aa5281ff4a02 1256 return min;
AnnaBridge 161:aa5281ff4a02 1257 }
AnnaBridge 161:aa5281ff4a02 1258 }
AnnaBridge 161:aa5281ff4a02 1259 return val;
AnnaBridge 161:aa5281ff4a02 1260 }
AnnaBridge 161:aa5281ff4a02 1261
AnnaBridge 161:aa5281ff4a02 1262 /**
AnnaBridge 161:aa5281ff4a02 1263 \brief Unsigned Saturate
AnnaBridge 161:aa5281ff4a02 1264 \details Saturates an unsigned value.
AnnaBridge 161:aa5281ff4a02 1265 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 1266 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 161:aa5281ff4a02 1267 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1268 */
AnnaBridge 161:aa5281ff4a02 1269 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge 161:aa5281ff4a02 1270 {
AnnaBridge 161:aa5281ff4a02 1271 if (sat <= 31U) {
AnnaBridge 161:aa5281ff4a02 1272 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 161:aa5281ff4a02 1273 if (val > (int32_t)max) {
AnnaBridge 161:aa5281ff4a02 1274 return max;
AnnaBridge 161:aa5281ff4a02 1275 } else if (val < 0) {
AnnaBridge 161:aa5281ff4a02 1276 return 0U;
AnnaBridge 161:aa5281ff4a02 1277 }
AnnaBridge 161:aa5281ff4a02 1278 }
AnnaBridge 161:aa5281ff4a02 1279 return (uint32_t)val;
AnnaBridge 161:aa5281ff4a02 1280 }
AnnaBridge 161:aa5281ff4a02 1281
AnnaBridge 161:aa5281ff4a02 1282 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1283 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1284 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1285
AnnaBridge 161:aa5281ff4a02 1286
AnnaBridge 161:aa5281ff4a02 1287 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1288 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 1289 /**
AnnaBridge 161:aa5281ff4a02 1290 \brief Load-Acquire (8 bit)
AnnaBridge 161:aa5281ff4a02 1291 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 1292 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1293 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1294 */
AnnaBridge 161:aa5281ff4a02 1295 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1296 {
AnnaBridge 161:aa5281ff4a02 1297 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1298
AnnaBridge 161:aa5281ff4a02 1299 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1300 return ((uint8_t) result);
AnnaBridge 161:aa5281ff4a02 1301 }
AnnaBridge 161:aa5281ff4a02 1302
AnnaBridge 161:aa5281ff4a02 1303
AnnaBridge 161:aa5281ff4a02 1304 /**
AnnaBridge 161:aa5281ff4a02 1305 \brief Load-Acquire (16 bit)
AnnaBridge 161:aa5281ff4a02 1306 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1307 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1308 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1309 */
AnnaBridge 161:aa5281ff4a02 1310 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1311 {
AnnaBridge 161:aa5281ff4a02 1312 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1313
AnnaBridge 161:aa5281ff4a02 1314 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1315 return ((uint16_t) result);
AnnaBridge 161:aa5281ff4a02 1316 }
AnnaBridge 161:aa5281ff4a02 1317
AnnaBridge 161:aa5281ff4a02 1318
AnnaBridge 161:aa5281ff4a02 1319 /**
AnnaBridge 161:aa5281ff4a02 1320 \brief Load-Acquire (32 bit)
AnnaBridge 161:aa5281ff4a02 1321 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1322 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1323 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1324 */
AnnaBridge 161:aa5281ff4a02 1325 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1326 {
AnnaBridge 161:aa5281ff4a02 1327 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1328
AnnaBridge 161:aa5281ff4a02 1329 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1330 return(result);
AnnaBridge 161:aa5281ff4a02 1331 }
AnnaBridge 161:aa5281ff4a02 1332
AnnaBridge 161:aa5281ff4a02 1333
AnnaBridge 161:aa5281ff4a02 1334 /**
AnnaBridge 161:aa5281ff4a02 1335 \brief Store-Release (8 bit)
AnnaBridge 161:aa5281ff4a02 1336 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1337 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1338 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1339 */
AnnaBridge 161:aa5281ff4a02 1340 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1341 {
AnnaBridge 161:aa5281ff4a02 1342 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1343 }
AnnaBridge 161:aa5281ff4a02 1344
AnnaBridge 161:aa5281ff4a02 1345
AnnaBridge 161:aa5281ff4a02 1346 /**
AnnaBridge 161:aa5281ff4a02 1347 \brief Store-Release (16 bit)
AnnaBridge 161:aa5281ff4a02 1348 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1349 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1350 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1351 */
AnnaBridge 161:aa5281ff4a02 1352 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1353 {
AnnaBridge 161:aa5281ff4a02 1354 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1355 }
AnnaBridge 161:aa5281ff4a02 1356
AnnaBridge 161:aa5281ff4a02 1357
AnnaBridge 161:aa5281ff4a02 1358 /**
AnnaBridge 161:aa5281ff4a02 1359 \brief Store-Release (32 bit)
AnnaBridge 161:aa5281ff4a02 1360 \details Executes a STL instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1361 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1362 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1363 */
AnnaBridge 161:aa5281ff4a02 1364 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1365 {
AnnaBridge 161:aa5281ff4a02 1366 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1367 }
AnnaBridge 161:aa5281ff4a02 1368
AnnaBridge 161:aa5281ff4a02 1369
AnnaBridge 161:aa5281ff4a02 1370 /**
AnnaBridge 161:aa5281ff4a02 1371 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 1372 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 1373 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1374 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1375 */
AnnaBridge 161:aa5281ff4a02 1376 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1377 {
AnnaBridge 161:aa5281ff4a02 1378 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1379
AnnaBridge 161:aa5281ff4a02 1380 __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1381 return ((uint8_t) result);
AnnaBridge 161:aa5281ff4a02 1382 }
AnnaBridge 161:aa5281ff4a02 1383
AnnaBridge 161:aa5281ff4a02 1384
AnnaBridge 161:aa5281ff4a02 1385 /**
AnnaBridge 161:aa5281ff4a02 1386 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 1387 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1388 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1389 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1390 */
AnnaBridge 161:aa5281ff4a02 1391 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1392 {
AnnaBridge 161:aa5281ff4a02 1393 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1394
AnnaBridge 161:aa5281ff4a02 1395 __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1396 return ((uint16_t) result);
AnnaBridge 161:aa5281ff4a02 1397 }
AnnaBridge 161:aa5281ff4a02 1398
AnnaBridge 161:aa5281ff4a02 1399
AnnaBridge 161:aa5281ff4a02 1400 /**
AnnaBridge 161:aa5281ff4a02 1401 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1402 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1403 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1404 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1405 */
AnnaBridge 161:aa5281ff4a02 1406 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1407 {
AnnaBridge 161:aa5281ff4a02 1408 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1409
AnnaBridge 161:aa5281ff4a02 1410 __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1411 return(result);
AnnaBridge 161:aa5281ff4a02 1412 }
AnnaBridge 161:aa5281ff4a02 1413
AnnaBridge 161:aa5281ff4a02 1414
AnnaBridge 161:aa5281ff4a02 1415 /**
AnnaBridge 161:aa5281ff4a02 1416 \brief Store-Release Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 1417 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1418 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1419 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1420 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1421 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1422 */
AnnaBridge 161:aa5281ff4a02 1423 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1424 {
AnnaBridge 161:aa5281ff4a02 1425 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1426
AnnaBridge 161:aa5281ff4a02 1427 __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1428 return(result);
AnnaBridge 161:aa5281ff4a02 1429 }
AnnaBridge 161:aa5281ff4a02 1430
AnnaBridge 161:aa5281ff4a02 1431
AnnaBridge 161:aa5281ff4a02 1432 /**
AnnaBridge 161:aa5281ff4a02 1433 \brief Store-Release Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 1434 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1435 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1436 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1437 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1438 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1439 */
AnnaBridge 161:aa5281ff4a02 1440 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1441 {
AnnaBridge 161:aa5281ff4a02 1442 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1443
AnnaBridge 161:aa5281ff4a02 1444 __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1445 return(result);
AnnaBridge 161:aa5281ff4a02 1446 }
AnnaBridge 161:aa5281ff4a02 1447
AnnaBridge 161:aa5281ff4a02 1448
AnnaBridge 161:aa5281ff4a02 1449 /**
AnnaBridge 161:aa5281ff4a02 1450 \brief Store-Release Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1451 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1452 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1453 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1454 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1455 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1456 */
AnnaBridge 161:aa5281ff4a02 1457 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1458 {
AnnaBridge 161:aa5281ff4a02 1459 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1460
AnnaBridge 161:aa5281ff4a02 1461 __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1462 return(result);
AnnaBridge 161:aa5281ff4a02 1463 }
AnnaBridge 161:aa5281ff4a02 1464
AnnaBridge 161:aa5281ff4a02 1465 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1466 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1467
AnnaBridge 161:aa5281ff4a02 1468 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 161:aa5281ff4a02 1469
AnnaBridge 161:aa5281ff4a02 1470
AnnaBridge 161:aa5281ff4a02 1471 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 161:aa5281ff4a02 1472 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 161:aa5281ff4a02 1473 Access to dedicated SIMD instructions
AnnaBridge 161:aa5281ff4a02 1474 @{
AnnaBridge 161:aa5281ff4a02 1475 */
AnnaBridge 161:aa5281ff4a02 1476
AnnaBridge 161:aa5281ff4a02 1477 #if (__ARM_FEATURE_DSP == 1) /* ToDo ARMCLANG: This should be ARCH >= ARMv7-M + SIMD */
AnnaBridge 161:aa5281ff4a02 1478
AnnaBridge 161:aa5281ff4a02 1479 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1480 {
AnnaBridge 161:aa5281ff4a02 1481 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1482
AnnaBridge 161:aa5281ff4a02 1483 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1484 return(result);
AnnaBridge 161:aa5281ff4a02 1485 }
AnnaBridge 161:aa5281ff4a02 1486
AnnaBridge 161:aa5281ff4a02 1487 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1488 {
AnnaBridge 161:aa5281ff4a02 1489 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1490
AnnaBridge 161:aa5281ff4a02 1491 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1492 return(result);
AnnaBridge 161:aa5281ff4a02 1493 }
AnnaBridge 161:aa5281ff4a02 1494
AnnaBridge 161:aa5281ff4a02 1495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1496 {
AnnaBridge 161:aa5281ff4a02 1497 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1498
AnnaBridge 161:aa5281ff4a02 1499 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1500 return(result);
AnnaBridge 161:aa5281ff4a02 1501 }
AnnaBridge 161:aa5281ff4a02 1502
AnnaBridge 161:aa5281ff4a02 1503 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1504 {
AnnaBridge 161:aa5281ff4a02 1505 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1506
AnnaBridge 161:aa5281ff4a02 1507 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1508 return(result);
AnnaBridge 161:aa5281ff4a02 1509 }
AnnaBridge 161:aa5281ff4a02 1510
AnnaBridge 161:aa5281ff4a02 1511 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1512 {
AnnaBridge 161:aa5281ff4a02 1513 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1514
AnnaBridge 161:aa5281ff4a02 1515 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1516 return(result);
AnnaBridge 161:aa5281ff4a02 1517 }
AnnaBridge 161:aa5281ff4a02 1518
AnnaBridge 161:aa5281ff4a02 1519 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1520 {
AnnaBridge 161:aa5281ff4a02 1521 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1522
AnnaBridge 161:aa5281ff4a02 1523 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1524 return(result);
AnnaBridge 161:aa5281ff4a02 1525 }
AnnaBridge 161:aa5281ff4a02 1526
AnnaBridge 161:aa5281ff4a02 1527
AnnaBridge 161:aa5281ff4a02 1528 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1529 {
AnnaBridge 161:aa5281ff4a02 1530 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1531
AnnaBridge 161:aa5281ff4a02 1532 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1533 return(result);
AnnaBridge 161:aa5281ff4a02 1534 }
AnnaBridge 161:aa5281ff4a02 1535
AnnaBridge 161:aa5281ff4a02 1536 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1537 {
AnnaBridge 161:aa5281ff4a02 1538 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1539
AnnaBridge 161:aa5281ff4a02 1540 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1541 return(result);
AnnaBridge 161:aa5281ff4a02 1542 }
AnnaBridge 161:aa5281ff4a02 1543
AnnaBridge 161:aa5281ff4a02 1544 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1545 {
AnnaBridge 161:aa5281ff4a02 1546 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1547
AnnaBridge 161:aa5281ff4a02 1548 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1549 return(result);
AnnaBridge 161:aa5281ff4a02 1550 }
AnnaBridge 161:aa5281ff4a02 1551
AnnaBridge 161:aa5281ff4a02 1552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1553 {
AnnaBridge 161:aa5281ff4a02 1554 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1555
AnnaBridge 161:aa5281ff4a02 1556 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1557 return(result);
AnnaBridge 161:aa5281ff4a02 1558 }
AnnaBridge 161:aa5281ff4a02 1559
AnnaBridge 161:aa5281ff4a02 1560 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1561 {
AnnaBridge 161:aa5281ff4a02 1562 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1563
AnnaBridge 161:aa5281ff4a02 1564 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1565 return(result);
AnnaBridge 161:aa5281ff4a02 1566 }
AnnaBridge 161:aa5281ff4a02 1567
AnnaBridge 161:aa5281ff4a02 1568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1569 {
AnnaBridge 161:aa5281ff4a02 1570 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1571
AnnaBridge 161:aa5281ff4a02 1572 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1573 return(result);
AnnaBridge 161:aa5281ff4a02 1574 }
AnnaBridge 161:aa5281ff4a02 1575
AnnaBridge 161:aa5281ff4a02 1576
AnnaBridge 161:aa5281ff4a02 1577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1578 {
AnnaBridge 161:aa5281ff4a02 1579 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1580
AnnaBridge 161:aa5281ff4a02 1581 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1582 return(result);
AnnaBridge 161:aa5281ff4a02 1583 }
AnnaBridge 161:aa5281ff4a02 1584
AnnaBridge 161:aa5281ff4a02 1585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1586 {
AnnaBridge 161:aa5281ff4a02 1587 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1588
AnnaBridge 161:aa5281ff4a02 1589 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1590 return(result);
AnnaBridge 161:aa5281ff4a02 1591 }
AnnaBridge 161:aa5281ff4a02 1592
AnnaBridge 161:aa5281ff4a02 1593 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1594 {
AnnaBridge 161:aa5281ff4a02 1595 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1596
AnnaBridge 161:aa5281ff4a02 1597 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1598 return(result);
AnnaBridge 161:aa5281ff4a02 1599 }
AnnaBridge 161:aa5281ff4a02 1600
AnnaBridge 161:aa5281ff4a02 1601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1602 {
AnnaBridge 161:aa5281ff4a02 1603 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1604
AnnaBridge 161:aa5281ff4a02 1605 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1606 return(result);
AnnaBridge 161:aa5281ff4a02 1607 }
AnnaBridge 161:aa5281ff4a02 1608
AnnaBridge 161:aa5281ff4a02 1609 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1610 {
AnnaBridge 161:aa5281ff4a02 1611 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1612
AnnaBridge 161:aa5281ff4a02 1613 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1614 return(result);
AnnaBridge 161:aa5281ff4a02 1615 }
AnnaBridge 161:aa5281ff4a02 1616
AnnaBridge 161:aa5281ff4a02 1617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1618 {
AnnaBridge 161:aa5281ff4a02 1619 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1620
AnnaBridge 161:aa5281ff4a02 1621 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1622 return(result);
AnnaBridge 161:aa5281ff4a02 1623 }
AnnaBridge 161:aa5281ff4a02 1624
AnnaBridge 161:aa5281ff4a02 1625 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1626 {
AnnaBridge 161:aa5281ff4a02 1627 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1628
AnnaBridge 161:aa5281ff4a02 1629 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1630 return(result);
AnnaBridge 161:aa5281ff4a02 1631 }
AnnaBridge 161:aa5281ff4a02 1632
AnnaBridge 161:aa5281ff4a02 1633 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1634 {
AnnaBridge 161:aa5281ff4a02 1635 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1636
AnnaBridge 161:aa5281ff4a02 1637 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1638 return(result);
AnnaBridge 161:aa5281ff4a02 1639 }
AnnaBridge 161:aa5281ff4a02 1640
AnnaBridge 161:aa5281ff4a02 1641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1642 {
AnnaBridge 161:aa5281ff4a02 1643 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1644
AnnaBridge 161:aa5281ff4a02 1645 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1646 return(result);
AnnaBridge 161:aa5281ff4a02 1647 }
AnnaBridge 161:aa5281ff4a02 1648
AnnaBridge 161:aa5281ff4a02 1649 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1650 {
AnnaBridge 161:aa5281ff4a02 1651 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1652
AnnaBridge 161:aa5281ff4a02 1653 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1654 return(result);
AnnaBridge 161:aa5281ff4a02 1655 }
AnnaBridge 161:aa5281ff4a02 1656
AnnaBridge 161:aa5281ff4a02 1657 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1658 {
AnnaBridge 161:aa5281ff4a02 1659 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1660
AnnaBridge 161:aa5281ff4a02 1661 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1662 return(result);
AnnaBridge 161:aa5281ff4a02 1663 }
AnnaBridge 161:aa5281ff4a02 1664
AnnaBridge 161:aa5281ff4a02 1665 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1666 {
AnnaBridge 161:aa5281ff4a02 1667 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1668
AnnaBridge 161:aa5281ff4a02 1669 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1670 return(result);
AnnaBridge 161:aa5281ff4a02 1671 }
AnnaBridge 161:aa5281ff4a02 1672
AnnaBridge 161:aa5281ff4a02 1673 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1674 {
AnnaBridge 161:aa5281ff4a02 1675 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1676
AnnaBridge 161:aa5281ff4a02 1677 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1678 return(result);
AnnaBridge 161:aa5281ff4a02 1679 }
AnnaBridge 161:aa5281ff4a02 1680
AnnaBridge 161:aa5281ff4a02 1681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1682 {
AnnaBridge 161:aa5281ff4a02 1683 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1684
AnnaBridge 161:aa5281ff4a02 1685 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1686 return(result);
AnnaBridge 161:aa5281ff4a02 1687 }
AnnaBridge 161:aa5281ff4a02 1688
AnnaBridge 161:aa5281ff4a02 1689 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1690 {
AnnaBridge 161:aa5281ff4a02 1691 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1692
AnnaBridge 161:aa5281ff4a02 1693 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1694 return(result);
AnnaBridge 161:aa5281ff4a02 1695 }
AnnaBridge 161:aa5281ff4a02 1696
AnnaBridge 161:aa5281ff4a02 1697 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1698 {
AnnaBridge 161:aa5281ff4a02 1699 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1700
AnnaBridge 161:aa5281ff4a02 1701 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1702 return(result);
AnnaBridge 161:aa5281ff4a02 1703 }
AnnaBridge 161:aa5281ff4a02 1704
AnnaBridge 161:aa5281ff4a02 1705 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1706 {
AnnaBridge 161:aa5281ff4a02 1707 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1708
AnnaBridge 161:aa5281ff4a02 1709 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1710 return(result);
AnnaBridge 161:aa5281ff4a02 1711 }
AnnaBridge 161:aa5281ff4a02 1712
AnnaBridge 161:aa5281ff4a02 1713 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1714 {
AnnaBridge 161:aa5281ff4a02 1715 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1716
AnnaBridge 161:aa5281ff4a02 1717 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1718 return(result);
AnnaBridge 161:aa5281ff4a02 1719 }
AnnaBridge 161:aa5281ff4a02 1720
AnnaBridge 161:aa5281ff4a02 1721 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1722 {
AnnaBridge 161:aa5281ff4a02 1723 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1724
AnnaBridge 161:aa5281ff4a02 1725 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1726 return(result);
AnnaBridge 161:aa5281ff4a02 1727 }
AnnaBridge 161:aa5281ff4a02 1728
AnnaBridge 161:aa5281ff4a02 1729 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1730 {
AnnaBridge 161:aa5281ff4a02 1731 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1732
AnnaBridge 161:aa5281ff4a02 1733 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1734 return(result);
AnnaBridge 161:aa5281ff4a02 1735 }
AnnaBridge 161:aa5281ff4a02 1736
AnnaBridge 161:aa5281ff4a02 1737 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1738 {
AnnaBridge 161:aa5281ff4a02 1739 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1740
AnnaBridge 161:aa5281ff4a02 1741 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1742 return(result);
AnnaBridge 161:aa5281ff4a02 1743 }
AnnaBridge 161:aa5281ff4a02 1744
AnnaBridge 161:aa5281ff4a02 1745 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1746 {
AnnaBridge 161:aa5281ff4a02 1747 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1748
AnnaBridge 161:aa5281ff4a02 1749 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1750 return(result);
AnnaBridge 161:aa5281ff4a02 1751 }
AnnaBridge 161:aa5281ff4a02 1752
AnnaBridge 161:aa5281ff4a02 1753 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1754 {
AnnaBridge 161:aa5281ff4a02 1755 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1756
AnnaBridge 161:aa5281ff4a02 1757 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1758 return(result);
AnnaBridge 161:aa5281ff4a02 1759 }
AnnaBridge 161:aa5281ff4a02 1760
AnnaBridge 161:aa5281ff4a02 1761 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1762 {
AnnaBridge 161:aa5281ff4a02 1763 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1764
AnnaBridge 161:aa5281ff4a02 1765 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1766 return(result);
AnnaBridge 161:aa5281ff4a02 1767 }
AnnaBridge 161:aa5281ff4a02 1768
AnnaBridge 161:aa5281ff4a02 1769 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1770 {
AnnaBridge 161:aa5281ff4a02 1771 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1772
AnnaBridge 161:aa5281ff4a02 1773 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1774 return(result);
AnnaBridge 161:aa5281ff4a02 1775 }
AnnaBridge 161:aa5281ff4a02 1776
AnnaBridge 161:aa5281ff4a02 1777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1778 {
AnnaBridge 161:aa5281ff4a02 1779 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1780
AnnaBridge 161:aa5281ff4a02 1781 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1782 return(result);
AnnaBridge 161:aa5281ff4a02 1783 }
AnnaBridge 161:aa5281ff4a02 1784
AnnaBridge 161:aa5281ff4a02 1785 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1786 ({ \
AnnaBridge 161:aa5281ff4a02 1787 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1788 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1789 __RES; \
AnnaBridge 161:aa5281ff4a02 1790 })
AnnaBridge 161:aa5281ff4a02 1791
AnnaBridge 161:aa5281ff4a02 1792 #define __USAT16(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1793 ({ \
AnnaBridge 161:aa5281ff4a02 1794 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1795 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1796 __RES; \
AnnaBridge 161:aa5281ff4a02 1797 })
AnnaBridge 161:aa5281ff4a02 1798
AnnaBridge 161:aa5281ff4a02 1799 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 161:aa5281ff4a02 1800 {
AnnaBridge 161:aa5281ff4a02 1801 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1802
AnnaBridge 161:aa5281ff4a02 1803 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 161:aa5281ff4a02 1804 return(result);
AnnaBridge 161:aa5281ff4a02 1805 }
AnnaBridge 161:aa5281ff4a02 1806
AnnaBridge 161:aa5281ff4a02 1807 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1808 {
AnnaBridge 161:aa5281ff4a02 1809 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1810
AnnaBridge 161:aa5281ff4a02 1811 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1812 return(result);
AnnaBridge 161:aa5281ff4a02 1813 }
AnnaBridge 161:aa5281ff4a02 1814
AnnaBridge 161:aa5281ff4a02 1815 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 161:aa5281ff4a02 1816 {
AnnaBridge 161:aa5281ff4a02 1817 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1818
AnnaBridge 161:aa5281ff4a02 1819 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 161:aa5281ff4a02 1820 return(result);
AnnaBridge 161:aa5281ff4a02 1821 }
AnnaBridge 161:aa5281ff4a02 1822
AnnaBridge 161:aa5281ff4a02 1823 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1824 {
AnnaBridge 161:aa5281ff4a02 1825 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1826
AnnaBridge 161:aa5281ff4a02 1827 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1828 return(result);
AnnaBridge 161:aa5281ff4a02 1829 }
AnnaBridge 161:aa5281ff4a02 1830
AnnaBridge 161:aa5281ff4a02 1831 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1832 {
AnnaBridge 161:aa5281ff4a02 1833 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1834
AnnaBridge 161:aa5281ff4a02 1835 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1836 return(result);
AnnaBridge 161:aa5281ff4a02 1837 }
AnnaBridge 161:aa5281ff4a02 1838
AnnaBridge 161:aa5281ff4a02 1839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1840 {
AnnaBridge 161:aa5281ff4a02 1841 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1842
AnnaBridge 161:aa5281ff4a02 1843 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1844 return(result);
AnnaBridge 161:aa5281ff4a02 1845 }
AnnaBridge 161:aa5281ff4a02 1846
AnnaBridge 161:aa5281ff4a02 1847 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1848 {
AnnaBridge 161:aa5281ff4a02 1849 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1850
AnnaBridge 161:aa5281ff4a02 1851 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1852 return(result);
AnnaBridge 161:aa5281ff4a02 1853 }
AnnaBridge 161:aa5281ff4a02 1854
AnnaBridge 161:aa5281ff4a02 1855 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1856 {
AnnaBridge 161:aa5281ff4a02 1857 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1858
AnnaBridge 161:aa5281ff4a02 1859 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1860 return(result);
AnnaBridge 161:aa5281ff4a02 1861 }
AnnaBridge 161:aa5281ff4a02 1862
AnnaBridge 161:aa5281ff4a02 1863 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1864 {
AnnaBridge 161:aa5281ff4a02 1865 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1866 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1867 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1868 } llr;
AnnaBridge 161:aa5281ff4a02 1869 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1870
AnnaBridge 161:aa5281ff4a02 1871 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1872 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1873 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1874 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1875 #endif
AnnaBridge 161:aa5281ff4a02 1876
AnnaBridge 161:aa5281ff4a02 1877 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1878 }
AnnaBridge 161:aa5281ff4a02 1879
AnnaBridge 161:aa5281ff4a02 1880 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1881 {
AnnaBridge 161:aa5281ff4a02 1882 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1883 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1884 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1885 } llr;
AnnaBridge 161:aa5281ff4a02 1886 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1887
AnnaBridge 161:aa5281ff4a02 1888 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1889 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1890 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1891 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1892 #endif
AnnaBridge 161:aa5281ff4a02 1893
AnnaBridge 161:aa5281ff4a02 1894 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1895 }
AnnaBridge 161:aa5281ff4a02 1896
AnnaBridge 161:aa5281ff4a02 1897 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1898 {
AnnaBridge 161:aa5281ff4a02 1899 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1900
AnnaBridge 161:aa5281ff4a02 1901 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1902 return(result);
AnnaBridge 161:aa5281ff4a02 1903 }
AnnaBridge 161:aa5281ff4a02 1904
AnnaBridge 161:aa5281ff4a02 1905 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1906 {
AnnaBridge 161:aa5281ff4a02 1907 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1908
AnnaBridge 161:aa5281ff4a02 1909 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1910 return(result);
AnnaBridge 161:aa5281ff4a02 1911 }
AnnaBridge 161:aa5281ff4a02 1912
AnnaBridge 161:aa5281ff4a02 1913 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1914 {
AnnaBridge 161:aa5281ff4a02 1915 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1916
AnnaBridge 161:aa5281ff4a02 1917 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1918 return(result);
AnnaBridge 161:aa5281ff4a02 1919 }
AnnaBridge 161:aa5281ff4a02 1920
AnnaBridge 161:aa5281ff4a02 1921 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1922 {
AnnaBridge 161:aa5281ff4a02 1923 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1924
AnnaBridge 161:aa5281ff4a02 1925 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1926 return(result);
AnnaBridge 161:aa5281ff4a02 1927 }
AnnaBridge 161:aa5281ff4a02 1928
AnnaBridge 161:aa5281ff4a02 1929 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1930 {
AnnaBridge 161:aa5281ff4a02 1931 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1932 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1933 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1934 } llr;
AnnaBridge 161:aa5281ff4a02 1935 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1936
AnnaBridge 161:aa5281ff4a02 1937 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1938 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1939 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1940 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1941 #endif
AnnaBridge 161:aa5281ff4a02 1942
AnnaBridge 161:aa5281ff4a02 1943 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1944 }
AnnaBridge 161:aa5281ff4a02 1945
AnnaBridge 161:aa5281ff4a02 1946 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1947 {
AnnaBridge 161:aa5281ff4a02 1948 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1949 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1950 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1951 } llr;
AnnaBridge 161:aa5281ff4a02 1952 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1953
AnnaBridge 161:aa5281ff4a02 1954 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1955 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1956 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1957 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1958 #endif
AnnaBridge 161:aa5281ff4a02 1959
AnnaBridge 161:aa5281ff4a02 1960 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1961 }
AnnaBridge 161:aa5281ff4a02 1962
AnnaBridge 161:aa5281ff4a02 1963 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1964 {
AnnaBridge 161:aa5281ff4a02 1965 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1966
AnnaBridge 161:aa5281ff4a02 1967 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1968 return(result);
AnnaBridge 161:aa5281ff4a02 1969 }
AnnaBridge 161:aa5281ff4a02 1970
AnnaBridge 161:aa5281ff4a02 1971 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 161:aa5281ff4a02 1972 {
AnnaBridge 161:aa5281ff4a02 1973 int32_t result;
AnnaBridge 161:aa5281ff4a02 1974
AnnaBridge 161:aa5281ff4a02 1975 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1976 return(result);
AnnaBridge 161:aa5281ff4a02 1977 }
AnnaBridge 161:aa5281ff4a02 1978
AnnaBridge 161:aa5281ff4a02 1979 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 161:aa5281ff4a02 1980 {
AnnaBridge 161:aa5281ff4a02 1981 int32_t result;
AnnaBridge 161:aa5281ff4a02 1982
AnnaBridge 161:aa5281ff4a02 1983 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1984 return(result);
AnnaBridge 161:aa5281ff4a02 1985 }
AnnaBridge 161:aa5281ff4a02 1986
AnnaBridge 161:aa5281ff4a02 1987 #if 0
AnnaBridge 161:aa5281ff4a02 1988 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 161:aa5281ff4a02 1989 ({ \
AnnaBridge 161:aa5281ff4a02 1990 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 161:aa5281ff4a02 1991 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 161:aa5281ff4a02 1992 __RES; \
AnnaBridge 161:aa5281ff4a02 1993 })
AnnaBridge 161:aa5281ff4a02 1994
AnnaBridge 161:aa5281ff4a02 1995 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 161:aa5281ff4a02 1996 ({ \
AnnaBridge 161:aa5281ff4a02 1997 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 161:aa5281ff4a02 1998 if (ARG3 == 0) \
AnnaBridge 161:aa5281ff4a02 1999 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 161:aa5281ff4a02 2000 else \
AnnaBridge 161:aa5281ff4a02 2001 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 161:aa5281ff4a02 2002 __RES; \
AnnaBridge 161:aa5281ff4a02 2003 })
AnnaBridge 161:aa5281ff4a02 2004 #endif
AnnaBridge 161:aa5281ff4a02 2005
AnnaBridge 161:aa5281ff4a02 2006 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 161:aa5281ff4a02 2007 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 161:aa5281ff4a02 2008
AnnaBridge 161:aa5281ff4a02 2009 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 161:aa5281ff4a02 2010 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 161:aa5281ff4a02 2011
AnnaBridge 161:aa5281ff4a02 2012 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 161:aa5281ff4a02 2013 {
AnnaBridge 161:aa5281ff4a02 2014 int32_t result;
AnnaBridge 161:aa5281ff4a02 2015
AnnaBridge 161:aa5281ff4a02 2016 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 2017 return(result);
AnnaBridge 161:aa5281ff4a02 2018 }
AnnaBridge 161:aa5281ff4a02 2019
AnnaBridge 161:aa5281ff4a02 2020 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 161:aa5281ff4a02 2021 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 161:aa5281ff4a02 2022
AnnaBridge 161:aa5281ff4a02 2023
AnnaBridge 161:aa5281ff4a02 2024 #pragma GCC diagnostic pop
AnnaBridge 161:aa5281ff4a02 2025
AnnaBridge 161:aa5281ff4a02 2026 #endif /* __CMSIS_GCC_H */