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TARGET_MTB_MXCHIP_EMW3166/cmsis_armclang.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
161:aa5281ff4a02
Child:
169:a7c7b631e539
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**************************************************************************//**
AnnaBridge 161:aa5281ff4a02 2 * @file cmsis_armclang.h
AnnaBridge 161:aa5281ff4a02 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 161:aa5281ff4a02 4 * @version V5.0.3
AnnaBridge 161:aa5281ff4a02 5 * @date 27. March 2017
AnnaBridge 161:aa5281ff4a02 6 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 7 /*
AnnaBridge 161:aa5281ff4a02 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 161:aa5281ff4a02 9 *
AnnaBridge 161:aa5281ff4a02 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 161:aa5281ff4a02 11 *
AnnaBridge 161:aa5281ff4a02 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 161:aa5281ff4a02 13 * not use this file except in compliance with the License.
AnnaBridge 161:aa5281ff4a02 14 * You may obtain a copy of the License at
AnnaBridge 161:aa5281ff4a02 15 *
AnnaBridge 161:aa5281ff4a02 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 161:aa5281ff4a02 17 *
AnnaBridge 161:aa5281ff4a02 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 161:aa5281ff4a02 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 161:aa5281ff4a02 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 161:aa5281ff4a02 21 * See the License for the specific language governing permissions and
AnnaBridge 161:aa5281ff4a02 22 * limitations under the License.
AnnaBridge 161:aa5281ff4a02 23 */
AnnaBridge 161:aa5281ff4a02 24
AnnaBridge 161:aa5281ff4a02 25 /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
AnnaBridge 161:aa5281ff4a02 26
AnnaBridge 161:aa5281ff4a02 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 161:aa5281ff4a02 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 161:aa5281ff4a02 29
AnnaBridge 161:aa5281ff4a02 30 #ifndef __ARM_COMPAT_H
AnnaBridge 161:aa5281ff4a02 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 161:aa5281ff4a02 32 #endif
AnnaBridge 161:aa5281ff4a02 33
AnnaBridge 161:aa5281ff4a02 34 /* CMSIS compiler specific defines */
AnnaBridge 161:aa5281ff4a02 35 #ifndef __ASM
AnnaBridge 161:aa5281ff4a02 36 #define __ASM __asm
AnnaBridge 161:aa5281ff4a02 37 #endif
AnnaBridge 161:aa5281ff4a02 38 #ifndef __INLINE
AnnaBridge 161:aa5281ff4a02 39 #define __INLINE __inline
AnnaBridge 161:aa5281ff4a02 40 #endif
AnnaBridge 161:aa5281ff4a02 41 #ifndef __STATIC_INLINE
AnnaBridge 161:aa5281ff4a02 42 #define __STATIC_INLINE static __inline
AnnaBridge 161:aa5281ff4a02 43 #endif
AnnaBridge 161:aa5281ff4a02 44 #ifndef __NO_RETURN
AnnaBridge 161:aa5281ff4a02 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 161:aa5281ff4a02 46 #endif
AnnaBridge 161:aa5281ff4a02 47 #ifndef __USED
AnnaBridge 161:aa5281ff4a02 48 #define __USED __attribute__((used))
AnnaBridge 161:aa5281ff4a02 49 #endif
AnnaBridge 161:aa5281ff4a02 50 #ifndef __WEAK
AnnaBridge 161:aa5281ff4a02 51 #define __WEAK __attribute__((weak))
AnnaBridge 161:aa5281ff4a02 52 #endif
AnnaBridge 161:aa5281ff4a02 53 #ifndef __PACKED
AnnaBridge 161:aa5281ff4a02 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 55 #endif
AnnaBridge 161:aa5281ff4a02 56 #ifndef __PACKED_STRUCT
AnnaBridge 161:aa5281ff4a02 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 58 #endif
AnnaBridge 161:aa5281ff4a02 59 #ifndef __PACKED_UNION
AnnaBridge 161:aa5281ff4a02 60 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 61 #endif
AnnaBridge 161:aa5281ff4a02 62 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 161:aa5281ff4a02 63 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 64 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 65 /*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
AnnaBridge 161:aa5281ff4a02 66 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 67 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 68 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 161:aa5281ff4a02 69 #endif
AnnaBridge 161:aa5281ff4a02 70 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 161:aa5281ff4a02 71 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 72 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 73 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 161:aa5281ff4a02 74 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 75 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 76 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 77 #endif
AnnaBridge 161:aa5281ff4a02 78 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 161:aa5281ff4a02 79 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 80 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 81 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 161:aa5281ff4a02 82 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 83 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 84 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 85 #endif
AnnaBridge 161:aa5281ff4a02 86 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 161:aa5281ff4a02 87 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 88 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 89 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 161:aa5281ff4a02 90 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 91 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 92 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 93 #endif
AnnaBridge 161:aa5281ff4a02 94 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 161:aa5281ff4a02 95 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 96 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 97 /*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
AnnaBridge 161:aa5281ff4a02 98 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 99 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 100 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 101 #endif
AnnaBridge 161:aa5281ff4a02 102 #ifndef __ALIGNED
AnnaBridge 161:aa5281ff4a02 103 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 161:aa5281ff4a02 104 #endif
AnnaBridge 161:aa5281ff4a02 105 #ifndef __RESTRICT
AnnaBridge 161:aa5281ff4a02 106 #define __RESTRICT __restrict
AnnaBridge 161:aa5281ff4a02 107 #endif
AnnaBridge 161:aa5281ff4a02 108
AnnaBridge 161:aa5281ff4a02 109
AnnaBridge 161:aa5281ff4a02 110 /* ########################### Core Function Access ########################### */
AnnaBridge 161:aa5281ff4a02 111 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 161:aa5281ff4a02 112 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 161:aa5281ff4a02 113 @{
AnnaBridge 161:aa5281ff4a02 114 */
AnnaBridge 161:aa5281ff4a02 115
AnnaBridge 161:aa5281ff4a02 116 /**
AnnaBridge 161:aa5281ff4a02 117 \brief Enable IRQ Interrupts
AnnaBridge 161:aa5281ff4a02 118 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 119 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 120 */
AnnaBridge 161:aa5281ff4a02 121 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 161:aa5281ff4a02 122
AnnaBridge 161:aa5281ff4a02 123
AnnaBridge 161:aa5281ff4a02 124 /**
AnnaBridge 161:aa5281ff4a02 125 \brief Disable IRQ Interrupts
AnnaBridge 161:aa5281ff4a02 126 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 127 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 128 */
AnnaBridge 161:aa5281ff4a02 129 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 161:aa5281ff4a02 130
AnnaBridge 161:aa5281ff4a02 131
AnnaBridge 161:aa5281ff4a02 132 /**
AnnaBridge 161:aa5281ff4a02 133 \brief Get Control Register
AnnaBridge 161:aa5281ff4a02 134 \details Returns the content of the Control Register.
AnnaBridge 161:aa5281ff4a02 135 \return Control Register value
AnnaBridge 161:aa5281ff4a02 136 */
AnnaBridge 161:aa5281ff4a02 137 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 161:aa5281ff4a02 138 {
AnnaBridge 161:aa5281ff4a02 139 uint32_t result;
AnnaBridge 161:aa5281ff4a02 140
AnnaBridge 161:aa5281ff4a02 141 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 142 return(result);
AnnaBridge 161:aa5281ff4a02 143 }
AnnaBridge 161:aa5281ff4a02 144
AnnaBridge 161:aa5281ff4a02 145
AnnaBridge 161:aa5281ff4a02 146 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 147 /**
AnnaBridge 161:aa5281ff4a02 148 \brief Get Control Register (non-secure)
AnnaBridge 161:aa5281ff4a02 149 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 161:aa5281ff4a02 150 \return non-secure Control Register value
AnnaBridge 161:aa5281ff4a02 151 */
AnnaBridge 161:aa5281ff4a02 152 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 161:aa5281ff4a02 153 {
AnnaBridge 161:aa5281ff4a02 154 uint32_t result;
AnnaBridge 161:aa5281ff4a02 155
AnnaBridge 161:aa5281ff4a02 156 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 157 return(result);
AnnaBridge 161:aa5281ff4a02 158 }
AnnaBridge 161:aa5281ff4a02 159 #endif
AnnaBridge 161:aa5281ff4a02 160
AnnaBridge 161:aa5281ff4a02 161
AnnaBridge 161:aa5281ff4a02 162 /**
AnnaBridge 161:aa5281ff4a02 163 \brief Set Control Register
AnnaBridge 161:aa5281ff4a02 164 \details Writes the given value to the Control Register.
AnnaBridge 161:aa5281ff4a02 165 \param [in] control Control Register value to set
AnnaBridge 161:aa5281ff4a02 166 */
AnnaBridge 161:aa5281ff4a02 167 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 161:aa5281ff4a02 168 {
AnnaBridge 161:aa5281ff4a02 169 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 161:aa5281ff4a02 170 }
AnnaBridge 161:aa5281ff4a02 171
AnnaBridge 161:aa5281ff4a02 172
AnnaBridge 161:aa5281ff4a02 173 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 174 /**
AnnaBridge 161:aa5281ff4a02 175 \brief Set Control Register (non-secure)
AnnaBridge 161:aa5281ff4a02 176 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 161:aa5281ff4a02 177 \param [in] control Control Register value to set
AnnaBridge 161:aa5281ff4a02 178 */
AnnaBridge 161:aa5281ff4a02 179 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 161:aa5281ff4a02 180 {
AnnaBridge 161:aa5281ff4a02 181 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 161:aa5281ff4a02 182 }
AnnaBridge 161:aa5281ff4a02 183 #endif
AnnaBridge 161:aa5281ff4a02 184
AnnaBridge 161:aa5281ff4a02 185
AnnaBridge 161:aa5281ff4a02 186 /**
AnnaBridge 161:aa5281ff4a02 187 \brief Get IPSR Register
AnnaBridge 161:aa5281ff4a02 188 \details Returns the content of the IPSR Register.
AnnaBridge 161:aa5281ff4a02 189 \return IPSR Register value
AnnaBridge 161:aa5281ff4a02 190 */
AnnaBridge 161:aa5281ff4a02 191 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 161:aa5281ff4a02 192 {
AnnaBridge 161:aa5281ff4a02 193 uint32_t result;
AnnaBridge 161:aa5281ff4a02 194
AnnaBridge 161:aa5281ff4a02 195 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 196 return(result);
AnnaBridge 161:aa5281ff4a02 197 }
AnnaBridge 161:aa5281ff4a02 198
AnnaBridge 161:aa5281ff4a02 199
AnnaBridge 161:aa5281ff4a02 200 /**
AnnaBridge 161:aa5281ff4a02 201 \brief Get APSR Register
AnnaBridge 161:aa5281ff4a02 202 \details Returns the content of the APSR Register.
AnnaBridge 161:aa5281ff4a02 203 \return APSR Register value
AnnaBridge 161:aa5281ff4a02 204 */
AnnaBridge 161:aa5281ff4a02 205 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 161:aa5281ff4a02 206 {
AnnaBridge 161:aa5281ff4a02 207 uint32_t result;
AnnaBridge 161:aa5281ff4a02 208
AnnaBridge 161:aa5281ff4a02 209 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 210 return(result);
AnnaBridge 161:aa5281ff4a02 211 }
AnnaBridge 161:aa5281ff4a02 212
AnnaBridge 161:aa5281ff4a02 213
AnnaBridge 161:aa5281ff4a02 214 /**
AnnaBridge 161:aa5281ff4a02 215 \brief Get xPSR Register
AnnaBridge 161:aa5281ff4a02 216 \details Returns the content of the xPSR Register.
AnnaBridge 161:aa5281ff4a02 217 \return xPSR Register value
AnnaBridge 161:aa5281ff4a02 218 */
AnnaBridge 161:aa5281ff4a02 219 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 161:aa5281ff4a02 220 {
AnnaBridge 161:aa5281ff4a02 221 uint32_t result;
AnnaBridge 161:aa5281ff4a02 222
AnnaBridge 161:aa5281ff4a02 223 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 224 return(result);
AnnaBridge 161:aa5281ff4a02 225 }
AnnaBridge 161:aa5281ff4a02 226
AnnaBridge 161:aa5281ff4a02 227
AnnaBridge 161:aa5281ff4a02 228 /**
AnnaBridge 161:aa5281ff4a02 229 \brief Get Process Stack Pointer
AnnaBridge 161:aa5281ff4a02 230 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 161:aa5281ff4a02 231 \return PSP Register value
AnnaBridge 161:aa5281ff4a02 232 */
AnnaBridge 161:aa5281ff4a02 233 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 161:aa5281ff4a02 234 {
AnnaBridge 161:aa5281ff4a02 235 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 236
AnnaBridge 161:aa5281ff4a02 237 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 238 return(result);
AnnaBridge 161:aa5281ff4a02 239 }
AnnaBridge 161:aa5281ff4a02 240
AnnaBridge 161:aa5281ff4a02 241
AnnaBridge 161:aa5281ff4a02 242 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 243 /**
AnnaBridge 161:aa5281ff4a02 244 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 245 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 246 \return PSP Register value
AnnaBridge 161:aa5281ff4a02 247 */
AnnaBridge 161:aa5281ff4a02 248 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 161:aa5281ff4a02 249 {
AnnaBridge 161:aa5281ff4a02 250 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 251
AnnaBridge 161:aa5281ff4a02 252 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 253 return(result);
AnnaBridge 161:aa5281ff4a02 254 }
AnnaBridge 161:aa5281ff4a02 255 #endif
AnnaBridge 161:aa5281ff4a02 256
AnnaBridge 161:aa5281ff4a02 257
AnnaBridge 161:aa5281ff4a02 258 /**
AnnaBridge 161:aa5281ff4a02 259 \brief Set Process Stack Pointer
AnnaBridge 161:aa5281ff4a02 260 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 161:aa5281ff4a02 261 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 262 */
AnnaBridge 161:aa5281ff4a02 263 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 161:aa5281ff4a02 264 {
AnnaBridge 161:aa5281ff4a02 265 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 161:aa5281ff4a02 266 }
AnnaBridge 161:aa5281ff4a02 267
AnnaBridge 161:aa5281ff4a02 268
AnnaBridge 161:aa5281ff4a02 269 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 270 /**
AnnaBridge 161:aa5281ff4a02 271 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 272 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 273 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 274 */
AnnaBridge 161:aa5281ff4a02 275 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 161:aa5281ff4a02 276 {
AnnaBridge 161:aa5281ff4a02 277 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 161:aa5281ff4a02 278 }
AnnaBridge 161:aa5281ff4a02 279 #endif
AnnaBridge 161:aa5281ff4a02 280
AnnaBridge 161:aa5281ff4a02 281
AnnaBridge 161:aa5281ff4a02 282 /**
AnnaBridge 161:aa5281ff4a02 283 \brief Get Main Stack Pointer
AnnaBridge 161:aa5281ff4a02 284 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 161:aa5281ff4a02 285 \return MSP Register value
AnnaBridge 161:aa5281ff4a02 286 */
AnnaBridge 161:aa5281ff4a02 287 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 161:aa5281ff4a02 288 {
AnnaBridge 161:aa5281ff4a02 289 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 290
AnnaBridge 161:aa5281ff4a02 291 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 292 return(result);
AnnaBridge 161:aa5281ff4a02 293 }
AnnaBridge 161:aa5281ff4a02 294
AnnaBridge 161:aa5281ff4a02 295
AnnaBridge 161:aa5281ff4a02 296 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 297 /**
AnnaBridge 161:aa5281ff4a02 298 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 299 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 300 \return MSP Register value
AnnaBridge 161:aa5281ff4a02 301 */
AnnaBridge 161:aa5281ff4a02 302 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 161:aa5281ff4a02 303 {
AnnaBridge 161:aa5281ff4a02 304 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 305
AnnaBridge 161:aa5281ff4a02 306 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 307 return(result);
AnnaBridge 161:aa5281ff4a02 308 }
AnnaBridge 161:aa5281ff4a02 309 #endif
AnnaBridge 161:aa5281ff4a02 310
AnnaBridge 161:aa5281ff4a02 311
AnnaBridge 161:aa5281ff4a02 312 /**
AnnaBridge 161:aa5281ff4a02 313 \brief Set Main Stack Pointer
AnnaBridge 161:aa5281ff4a02 314 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 161:aa5281ff4a02 315 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 316 */
AnnaBridge 161:aa5281ff4a02 317 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 161:aa5281ff4a02 318 {
AnnaBridge 161:aa5281ff4a02 319 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 161:aa5281ff4a02 320 }
AnnaBridge 161:aa5281ff4a02 321
AnnaBridge 161:aa5281ff4a02 322
AnnaBridge 161:aa5281ff4a02 323 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 324 /**
AnnaBridge 161:aa5281ff4a02 325 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 326 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 161:aa5281ff4a02 327 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 328 */
AnnaBridge 161:aa5281ff4a02 329 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 161:aa5281ff4a02 330 {
AnnaBridge 161:aa5281ff4a02 331 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 161:aa5281ff4a02 332 }
AnnaBridge 161:aa5281ff4a02 333 #endif
AnnaBridge 161:aa5281ff4a02 334
AnnaBridge 161:aa5281ff4a02 335
AnnaBridge 161:aa5281ff4a02 336 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 337 /**
AnnaBridge 161:aa5281ff4a02 338 \brief Get Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 339 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 161:aa5281ff4a02 340 \return SP Register value
AnnaBridge 161:aa5281ff4a02 341 */
AnnaBridge 161:aa5281ff4a02 342 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 161:aa5281ff4a02 343 {
AnnaBridge 161:aa5281ff4a02 344 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 345
AnnaBridge 161:aa5281ff4a02 346 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 347 return(result);
AnnaBridge 161:aa5281ff4a02 348 }
AnnaBridge 161:aa5281ff4a02 349
AnnaBridge 161:aa5281ff4a02 350
AnnaBridge 161:aa5281ff4a02 351 /**
AnnaBridge 161:aa5281ff4a02 352 \brief Set Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 353 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 161:aa5281ff4a02 354 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 355 */
AnnaBridge 161:aa5281ff4a02 356 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 161:aa5281ff4a02 357 {
AnnaBridge 161:aa5281ff4a02 358 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 161:aa5281ff4a02 359 }
AnnaBridge 161:aa5281ff4a02 360 #endif
AnnaBridge 161:aa5281ff4a02 361
AnnaBridge 161:aa5281ff4a02 362
AnnaBridge 161:aa5281ff4a02 363 /**
AnnaBridge 161:aa5281ff4a02 364 \brief Get Priority Mask
AnnaBridge 161:aa5281ff4a02 365 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 161:aa5281ff4a02 366 \return Priority Mask value
AnnaBridge 161:aa5281ff4a02 367 */
AnnaBridge 161:aa5281ff4a02 368 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 161:aa5281ff4a02 369 {
AnnaBridge 161:aa5281ff4a02 370 uint32_t result;
AnnaBridge 161:aa5281ff4a02 371
AnnaBridge 161:aa5281ff4a02 372 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 373 return(result);
AnnaBridge 161:aa5281ff4a02 374 }
AnnaBridge 161:aa5281ff4a02 375
AnnaBridge 161:aa5281ff4a02 376
AnnaBridge 161:aa5281ff4a02 377 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 378 /**
AnnaBridge 161:aa5281ff4a02 379 \brief Get Priority Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 380 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 161:aa5281ff4a02 381 \return Priority Mask value
AnnaBridge 161:aa5281ff4a02 382 */
AnnaBridge 161:aa5281ff4a02 383 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 161:aa5281ff4a02 384 {
AnnaBridge 161:aa5281ff4a02 385 uint32_t result;
AnnaBridge 161:aa5281ff4a02 386
AnnaBridge 161:aa5281ff4a02 387 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 388 return(result);
AnnaBridge 161:aa5281ff4a02 389 }
AnnaBridge 161:aa5281ff4a02 390 #endif
AnnaBridge 161:aa5281ff4a02 391
AnnaBridge 161:aa5281ff4a02 392
AnnaBridge 161:aa5281ff4a02 393 /**
AnnaBridge 161:aa5281ff4a02 394 \brief Set Priority Mask
AnnaBridge 161:aa5281ff4a02 395 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 161:aa5281ff4a02 396 \param [in] priMask Priority Mask
AnnaBridge 161:aa5281ff4a02 397 */
AnnaBridge 161:aa5281ff4a02 398 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 161:aa5281ff4a02 399 {
AnnaBridge 161:aa5281ff4a02 400 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 161:aa5281ff4a02 401 }
AnnaBridge 161:aa5281ff4a02 402
AnnaBridge 161:aa5281ff4a02 403
AnnaBridge 161:aa5281ff4a02 404 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 405 /**
AnnaBridge 161:aa5281ff4a02 406 \brief Set Priority Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 407 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 161:aa5281ff4a02 408 \param [in] priMask Priority Mask
AnnaBridge 161:aa5281ff4a02 409 */
AnnaBridge 161:aa5281ff4a02 410 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 161:aa5281ff4a02 411 {
AnnaBridge 161:aa5281ff4a02 412 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 161:aa5281ff4a02 413 }
AnnaBridge 161:aa5281ff4a02 414 #endif
AnnaBridge 161:aa5281ff4a02 415
AnnaBridge 161:aa5281ff4a02 416
AnnaBridge 161:aa5281ff4a02 417 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 418 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 419 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 420 /**
AnnaBridge 161:aa5281ff4a02 421 \brief Enable FIQ
AnnaBridge 161:aa5281ff4a02 422 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 423 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 424 */
AnnaBridge 161:aa5281ff4a02 425 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 161:aa5281ff4a02 426
AnnaBridge 161:aa5281ff4a02 427
AnnaBridge 161:aa5281ff4a02 428 /**
AnnaBridge 161:aa5281ff4a02 429 \brief Disable FIQ
AnnaBridge 161:aa5281ff4a02 430 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 161:aa5281ff4a02 431 Can only be executed in Privileged modes.
AnnaBridge 161:aa5281ff4a02 432 */
AnnaBridge 161:aa5281ff4a02 433 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 161:aa5281ff4a02 434
AnnaBridge 161:aa5281ff4a02 435
AnnaBridge 161:aa5281ff4a02 436 /**
AnnaBridge 161:aa5281ff4a02 437 \brief Get Base Priority
AnnaBridge 161:aa5281ff4a02 438 \details Returns the current value of the Base Priority register.
AnnaBridge 161:aa5281ff4a02 439 \return Base Priority register value
AnnaBridge 161:aa5281ff4a02 440 */
AnnaBridge 161:aa5281ff4a02 441 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 161:aa5281ff4a02 442 {
AnnaBridge 161:aa5281ff4a02 443 uint32_t result;
AnnaBridge 161:aa5281ff4a02 444
AnnaBridge 161:aa5281ff4a02 445 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 446 return(result);
AnnaBridge 161:aa5281ff4a02 447 }
AnnaBridge 161:aa5281ff4a02 448
AnnaBridge 161:aa5281ff4a02 449
AnnaBridge 161:aa5281ff4a02 450 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 451 /**
AnnaBridge 161:aa5281ff4a02 452 \brief Get Base Priority (non-secure)
AnnaBridge 161:aa5281ff4a02 453 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 161:aa5281ff4a02 454 \return Base Priority register value
AnnaBridge 161:aa5281ff4a02 455 */
AnnaBridge 161:aa5281ff4a02 456 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 161:aa5281ff4a02 457 {
AnnaBridge 161:aa5281ff4a02 458 uint32_t result;
AnnaBridge 161:aa5281ff4a02 459
AnnaBridge 161:aa5281ff4a02 460 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 461 return(result);
AnnaBridge 161:aa5281ff4a02 462 }
AnnaBridge 161:aa5281ff4a02 463 #endif
AnnaBridge 161:aa5281ff4a02 464
AnnaBridge 161:aa5281ff4a02 465
AnnaBridge 161:aa5281ff4a02 466 /**
AnnaBridge 161:aa5281ff4a02 467 \brief Set Base Priority
AnnaBridge 161:aa5281ff4a02 468 \details Assigns the given value to the Base Priority register.
AnnaBridge 161:aa5281ff4a02 469 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 470 */
AnnaBridge 161:aa5281ff4a02 471 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 472 {
AnnaBridge 161:aa5281ff4a02 473 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 474 }
AnnaBridge 161:aa5281ff4a02 475
AnnaBridge 161:aa5281ff4a02 476
AnnaBridge 161:aa5281ff4a02 477 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 478 /**
AnnaBridge 161:aa5281ff4a02 479 \brief Set Base Priority (non-secure)
AnnaBridge 161:aa5281ff4a02 480 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 161:aa5281ff4a02 481 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 482 */
AnnaBridge 161:aa5281ff4a02 483 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 484 {
AnnaBridge 161:aa5281ff4a02 485 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 486 }
AnnaBridge 161:aa5281ff4a02 487 #endif
AnnaBridge 161:aa5281ff4a02 488
AnnaBridge 161:aa5281ff4a02 489
AnnaBridge 161:aa5281ff4a02 490 /**
AnnaBridge 161:aa5281ff4a02 491 \brief Set Base Priority with condition
AnnaBridge 161:aa5281ff4a02 492 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 161:aa5281ff4a02 493 or the new value increases the BASEPRI priority level.
AnnaBridge 161:aa5281ff4a02 494 \param [in] basePri Base Priority value to set
AnnaBridge 161:aa5281ff4a02 495 */
AnnaBridge 161:aa5281ff4a02 496 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 161:aa5281ff4a02 497 {
AnnaBridge 161:aa5281ff4a02 498 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 161:aa5281ff4a02 499 }
AnnaBridge 161:aa5281ff4a02 500
AnnaBridge 161:aa5281ff4a02 501
AnnaBridge 161:aa5281ff4a02 502 /**
AnnaBridge 161:aa5281ff4a02 503 \brief Get Fault Mask
AnnaBridge 161:aa5281ff4a02 504 \details Returns the current value of the Fault Mask register.
AnnaBridge 161:aa5281ff4a02 505 \return Fault Mask register value
AnnaBridge 161:aa5281ff4a02 506 */
AnnaBridge 161:aa5281ff4a02 507 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 161:aa5281ff4a02 508 {
AnnaBridge 161:aa5281ff4a02 509 uint32_t result;
AnnaBridge 161:aa5281ff4a02 510
AnnaBridge 161:aa5281ff4a02 511 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 512 return(result);
AnnaBridge 161:aa5281ff4a02 513 }
AnnaBridge 161:aa5281ff4a02 514
AnnaBridge 161:aa5281ff4a02 515
AnnaBridge 161:aa5281ff4a02 516 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 517 /**
AnnaBridge 161:aa5281ff4a02 518 \brief Get Fault Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 519 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 161:aa5281ff4a02 520 \return Fault Mask register value
AnnaBridge 161:aa5281ff4a02 521 */
AnnaBridge 161:aa5281ff4a02 522 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 161:aa5281ff4a02 523 {
AnnaBridge 161:aa5281ff4a02 524 uint32_t result;
AnnaBridge 161:aa5281ff4a02 525
AnnaBridge 161:aa5281ff4a02 526 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 527 return(result);
AnnaBridge 161:aa5281ff4a02 528 }
AnnaBridge 161:aa5281ff4a02 529 #endif
AnnaBridge 161:aa5281ff4a02 530
AnnaBridge 161:aa5281ff4a02 531
AnnaBridge 161:aa5281ff4a02 532 /**
AnnaBridge 161:aa5281ff4a02 533 \brief Set Fault Mask
AnnaBridge 161:aa5281ff4a02 534 \details Assigns the given value to the Fault Mask register.
AnnaBridge 161:aa5281ff4a02 535 \param [in] faultMask Fault Mask value to set
AnnaBridge 161:aa5281ff4a02 536 */
AnnaBridge 161:aa5281ff4a02 537 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 161:aa5281ff4a02 538 {
AnnaBridge 161:aa5281ff4a02 539 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 161:aa5281ff4a02 540 }
AnnaBridge 161:aa5281ff4a02 541
AnnaBridge 161:aa5281ff4a02 542
AnnaBridge 161:aa5281ff4a02 543 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 161:aa5281ff4a02 544 /**
AnnaBridge 161:aa5281ff4a02 545 \brief Set Fault Mask (non-secure)
AnnaBridge 161:aa5281ff4a02 546 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 161:aa5281ff4a02 547 \param [in] faultMask Fault Mask value to set
AnnaBridge 161:aa5281ff4a02 548 */
AnnaBridge 161:aa5281ff4a02 549 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 161:aa5281ff4a02 550 {
AnnaBridge 161:aa5281ff4a02 551 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 161:aa5281ff4a02 552 }
AnnaBridge 161:aa5281ff4a02 553 #endif
AnnaBridge 161:aa5281ff4a02 554
AnnaBridge 161:aa5281ff4a02 555 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 556 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 557 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 558
AnnaBridge 161:aa5281ff4a02 559
AnnaBridge 161:aa5281ff4a02 560 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 561 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 562
AnnaBridge 161:aa5281ff4a02 563 /**
AnnaBridge 161:aa5281ff4a02 564 \brief Get Process Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 565 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 161:aa5281ff4a02 566 \return PSPLIM Register value
AnnaBridge 161:aa5281ff4a02 567 */
AnnaBridge 161:aa5281ff4a02 568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 161:aa5281ff4a02 569 {
AnnaBridge 161:aa5281ff4a02 570 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 571
AnnaBridge 161:aa5281ff4a02 572 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 573 return(result);
AnnaBridge 161:aa5281ff4a02 574 }
AnnaBridge 161:aa5281ff4a02 575
AnnaBridge 161:aa5281ff4a02 576
AnnaBridge 161:aa5281ff4a02 577 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 578 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 579 /**
AnnaBridge 161:aa5281ff4a02 580 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 581 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 582 \return PSPLIM Register value
AnnaBridge 161:aa5281ff4a02 583 */
AnnaBridge 161:aa5281ff4a02 584 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 161:aa5281ff4a02 585 {
AnnaBridge 161:aa5281ff4a02 586 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 587
AnnaBridge 161:aa5281ff4a02 588 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 589 return(result);
AnnaBridge 161:aa5281ff4a02 590 }
AnnaBridge 161:aa5281ff4a02 591 #endif
AnnaBridge 161:aa5281ff4a02 592
AnnaBridge 161:aa5281ff4a02 593
AnnaBridge 161:aa5281ff4a02 594 /**
AnnaBridge 161:aa5281ff4a02 595 \brief Set Process Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 596 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 161:aa5281ff4a02 597 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 598 */
AnnaBridge 161:aa5281ff4a02 599 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 600 {
AnnaBridge 161:aa5281ff4a02 601 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 602 }
AnnaBridge 161:aa5281ff4a02 603
AnnaBridge 161:aa5281ff4a02 604
AnnaBridge 161:aa5281ff4a02 605 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 606 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 607 /**
AnnaBridge 161:aa5281ff4a02 608 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 161:aa5281ff4a02 609 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 610 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 611 */
AnnaBridge 161:aa5281ff4a02 612 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 613 {
AnnaBridge 161:aa5281ff4a02 614 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 615 }
AnnaBridge 161:aa5281ff4a02 616 #endif
AnnaBridge 161:aa5281ff4a02 617
AnnaBridge 161:aa5281ff4a02 618
AnnaBridge 161:aa5281ff4a02 619 /**
AnnaBridge 161:aa5281ff4a02 620 \brief Get Main Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 621 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 161:aa5281ff4a02 622 \return MSPLIM Register value
AnnaBridge 161:aa5281ff4a02 623 */
AnnaBridge 161:aa5281ff4a02 624 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 161:aa5281ff4a02 625 {
AnnaBridge 161:aa5281ff4a02 626 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 627
AnnaBridge 161:aa5281ff4a02 628 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 629
AnnaBridge 161:aa5281ff4a02 630 return(result);
AnnaBridge 161:aa5281ff4a02 631 }
AnnaBridge 161:aa5281ff4a02 632
AnnaBridge 161:aa5281ff4a02 633
AnnaBridge 161:aa5281ff4a02 634 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 635 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 636 /**
AnnaBridge 161:aa5281ff4a02 637 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 638 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 639 \return MSPLIM Register value
AnnaBridge 161:aa5281ff4a02 640 */
AnnaBridge 161:aa5281ff4a02 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 161:aa5281ff4a02 642 {
AnnaBridge 161:aa5281ff4a02 643 register uint32_t result;
AnnaBridge 161:aa5281ff4a02 644
AnnaBridge 161:aa5281ff4a02 645 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 646 return(result);
AnnaBridge 161:aa5281ff4a02 647 }
AnnaBridge 161:aa5281ff4a02 648 #endif
AnnaBridge 161:aa5281ff4a02 649
AnnaBridge 161:aa5281ff4a02 650
AnnaBridge 161:aa5281ff4a02 651 /**
AnnaBridge 161:aa5281ff4a02 652 \brief Set Main Stack Pointer Limit
AnnaBridge 161:aa5281ff4a02 653 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 161:aa5281ff4a02 654 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 161:aa5281ff4a02 655 */
AnnaBridge 161:aa5281ff4a02 656 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 657 {
AnnaBridge 161:aa5281ff4a02 658 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 659 }
AnnaBridge 161:aa5281ff4a02 660
AnnaBridge 161:aa5281ff4a02 661
AnnaBridge 161:aa5281ff4a02 662 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 161:aa5281ff4a02 663 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 664 /**
AnnaBridge 161:aa5281ff4a02 665 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 161:aa5281ff4a02 666 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 161:aa5281ff4a02 667 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 668 */
AnnaBridge 161:aa5281ff4a02 669 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 161:aa5281ff4a02 670 {
AnnaBridge 161:aa5281ff4a02 671 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 161:aa5281ff4a02 672 }
AnnaBridge 161:aa5281ff4a02 673 #endif
AnnaBridge 161:aa5281ff4a02 674
AnnaBridge 161:aa5281ff4a02 675 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 676 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 677
AnnaBridge 161:aa5281ff4a02 678
AnnaBridge 161:aa5281ff4a02 679 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 680 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 681
AnnaBridge 161:aa5281ff4a02 682 /**
AnnaBridge 161:aa5281ff4a02 683 \brief Get FPSCR
AnnaBridge 161:aa5281ff4a02 684 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 685 \return Floating Point Status/Control register value
AnnaBridge 161:aa5281ff4a02 686 */
AnnaBridge 161:aa5281ff4a02 687 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 688 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 161:aa5281ff4a02 689 #define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
AnnaBridge 161:aa5281ff4a02 690 #else
AnnaBridge 161:aa5281ff4a02 691 #define __get_FPSCR() ((uint32_t)0U)
AnnaBridge 161:aa5281ff4a02 692 #endif
AnnaBridge 161:aa5281ff4a02 693
AnnaBridge 161:aa5281ff4a02 694 /**
AnnaBridge 161:aa5281ff4a02 695 \brief Set FPSCR
AnnaBridge 161:aa5281ff4a02 696 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 697 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 161:aa5281ff4a02 698 */
AnnaBridge 161:aa5281ff4a02 699 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 700 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 161:aa5281ff4a02 701 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 161:aa5281ff4a02 702 #else
AnnaBridge 161:aa5281ff4a02 703 #define __set_FPSCR(x) ((void)(x))
AnnaBridge 161:aa5281ff4a02 704 #endif
AnnaBridge 161:aa5281ff4a02 705
AnnaBridge 161:aa5281ff4a02 706 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 707 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 708
AnnaBridge 161:aa5281ff4a02 709
AnnaBridge 161:aa5281ff4a02 710
AnnaBridge 161:aa5281ff4a02 711 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 161:aa5281ff4a02 712
AnnaBridge 161:aa5281ff4a02 713
AnnaBridge 161:aa5281ff4a02 714 /* ########################## Core Instruction Access ######################### */
AnnaBridge 161:aa5281ff4a02 715 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 161:aa5281ff4a02 716 Access to dedicated instructions
AnnaBridge 161:aa5281ff4a02 717 @{
AnnaBridge 161:aa5281ff4a02 718 */
AnnaBridge 161:aa5281ff4a02 719
AnnaBridge 161:aa5281ff4a02 720 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 161:aa5281ff4a02 721 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 161:aa5281ff4a02 722 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 161:aa5281ff4a02 723 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 161:aa5281ff4a02 724 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 161:aa5281ff4a02 725 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 161:aa5281ff4a02 726 #else
AnnaBridge 161:aa5281ff4a02 727 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 161:aa5281ff4a02 728 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 161:aa5281ff4a02 729 #endif
AnnaBridge 161:aa5281ff4a02 730
AnnaBridge 161:aa5281ff4a02 731 /**
AnnaBridge 161:aa5281ff4a02 732 \brief No Operation
AnnaBridge 161:aa5281ff4a02 733 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 161:aa5281ff4a02 734 */
AnnaBridge 161:aa5281ff4a02 735 #define __NOP __builtin_arm_nop
AnnaBridge 161:aa5281ff4a02 736
AnnaBridge 161:aa5281ff4a02 737 /**
AnnaBridge 161:aa5281ff4a02 738 \brief Wait For Interrupt
AnnaBridge 161:aa5281ff4a02 739 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 161:aa5281ff4a02 740 */
AnnaBridge 161:aa5281ff4a02 741 #define __WFI __builtin_arm_wfi
AnnaBridge 161:aa5281ff4a02 742
AnnaBridge 161:aa5281ff4a02 743
AnnaBridge 161:aa5281ff4a02 744 /**
AnnaBridge 161:aa5281ff4a02 745 \brief Wait For Event
AnnaBridge 161:aa5281ff4a02 746 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 161:aa5281ff4a02 747 a low-power state until one of a number of events occurs.
AnnaBridge 161:aa5281ff4a02 748 */
AnnaBridge 161:aa5281ff4a02 749 #define __WFE __builtin_arm_wfe
AnnaBridge 161:aa5281ff4a02 750
AnnaBridge 161:aa5281ff4a02 751
AnnaBridge 161:aa5281ff4a02 752 /**
AnnaBridge 161:aa5281ff4a02 753 \brief Send Event
AnnaBridge 161:aa5281ff4a02 754 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 161:aa5281ff4a02 755 */
AnnaBridge 161:aa5281ff4a02 756 #define __SEV __builtin_arm_sev
AnnaBridge 161:aa5281ff4a02 757
AnnaBridge 161:aa5281ff4a02 758
AnnaBridge 161:aa5281ff4a02 759 /**
AnnaBridge 161:aa5281ff4a02 760 \brief Instruction Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 761 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 161:aa5281ff4a02 762 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 161:aa5281ff4a02 763 after the instruction has been completed.
AnnaBridge 161:aa5281ff4a02 764 */
AnnaBridge 161:aa5281ff4a02 765 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 161:aa5281ff4a02 766
AnnaBridge 161:aa5281ff4a02 767 /**
AnnaBridge 161:aa5281ff4a02 768 \brief Data Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 769 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 161:aa5281ff4a02 770 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 161:aa5281ff4a02 771 */
AnnaBridge 161:aa5281ff4a02 772 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 161:aa5281ff4a02 773
AnnaBridge 161:aa5281ff4a02 774
AnnaBridge 161:aa5281ff4a02 775 /**
AnnaBridge 161:aa5281ff4a02 776 \brief Data Memory Barrier
AnnaBridge 161:aa5281ff4a02 777 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 161:aa5281ff4a02 778 and after the instruction, without ensuring their completion.
AnnaBridge 161:aa5281ff4a02 779 */
AnnaBridge 161:aa5281ff4a02 780 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 161:aa5281ff4a02 781
AnnaBridge 161:aa5281ff4a02 782
AnnaBridge 161:aa5281ff4a02 783 /**
AnnaBridge 161:aa5281ff4a02 784 \brief Reverse byte order (32 bit)
AnnaBridge 161:aa5281ff4a02 785 \details Reverses the byte order in integer value.
AnnaBridge 161:aa5281ff4a02 786 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 787 \return Reversed value
AnnaBridge 161:aa5281ff4a02 788 */
AnnaBridge 161:aa5281ff4a02 789 #define __REV (uint32_t)__builtin_bswap32
AnnaBridge 161:aa5281ff4a02 790
AnnaBridge 161:aa5281ff4a02 791
AnnaBridge 161:aa5281ff4a02 792 /**
AnnaBridge 161:aa5281ff4a02 793 \brief Reverse byte order (16 bit)
AnnaBridge 161:aa5281ff4a02 794 \details Reverses the byte order in two unsigned short values.
AnnaBridge 161:aa5281ff4a02 795 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 796 \return Reversed value
AnnaBridge 161:aa5281ff4a02 797 */
AnnaBridge 161:aa5281ff4a02 798 #define __REV16 (uint16_t)__builtin_bswap16
AnnaBridge 161:aa5281ff4a02 799
AnnaBridge 161:aa5281ff4a02 800
AnnaBridge 161:aa5281ff4a02 801 /**
AnnaBridge 161:aa5281ff4a02 802 \brief Reverse byte order in signed short value
AnnaBridge 161:aa5281ff4a02 803 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 161:aa5281ff4a02 804 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 805 \return Reversed value
AnnaBridge 161:aa5281ff4a02 806 */
AnnaBridge 161:aa5281ff4a02 807 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 161:aa5281ff4a02 808 {
AnnaBridge 161:aa5281ff4a02 809 int16_t result;
AnnaBridge 161:aa5281ff4a02 810
AnnaBridge 161:aa5281ff4a02 811 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 812
AnnaBridge 161:aa5281ff4a02 813 return result;
AnnaBridge 161:aa5281ff4a02 814 }
AnnaBridge 161:aa5281ff4a02 815
AnnaBridge 161:aa5281ff4a02 816
AnnaBridge 161:aa5281ff4a02 817 /**
AnnaBridge 161:aa5281ff4a02 818 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 161:aa5281ff4a02 819 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 161:aa5281ff4a02 820 \param [in] op1 Value to rotate
AnnaBridge 161:aa5281ff4a02 821 \param [in] op2 Number of Bits to rotate
AnnaBridge 161:aa5281ff4a02 822 \return Rotated value
AnnaBridge 161:aa5281ff4a02 823 */
AnnaBridge 161:aa5281ff4a02 824 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 825 {
AnnaBridge 161:aa5281ff4a02 826 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 161:aa5281ff4a02 827 }
AnnaBridge 161:aa5281ff4a02 828
AnnaBridge 161:aa5281ff4a02 829
AnnaBridge 161:aa5281ff4a02 830 /**
AnnaBridge 161:aa5281ff4a02 831 \brief Breakpoint
AnnaBridge 161:aa5281ff4a02 832 \details Causes the processor to enter Debug state.
AnnaBridge 161:aa5281ff4a02 833 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 161:aa5281ff4a02 834 \param [in] value is ignored by the processor.
AnnaBridge 161:aa5281ff4a02 835 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 161:aa5281ff4a02 836 */
AnnaBridge 161:aa5281ff4a02 837 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 161:aa5281ff4a02 838
AnnaBridge 161:aa5281ff4a02 839
AnnaBridge 161:aa5281ff4a02 840 /**
AnnaBridge 161:aa5281ff4a02 841 \brief Reverse bit order of value
AnnaBridge 161:aa5281ff4a02 842 \details Reverses the bit order of the given value.
AnnaBridge 161:aa5281ff4a02 843 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 844 \return Reversed value
AnnaBridge 161:aa5281ff4a02 845 */
AnnaBridge 161:aa5281ff4a02 846 #define __RBIT (uint32_t)__builtin_arm_rbit
AnnaBridge 161:aa5281ff4a02 847
AnnaBridge 161:aa5281ff4a02 848 /**
AnnaBridge 161:aa5281ff4a02 849 \brief Count leading zeros
AnnaBridge 161:aa5281ff4a02 850 \details Counts the number of leading zeros of a data value.
AnnaBridge 161:aa5281ff4a02 851 \param [in] value Value to count the leading zeros
AnnaBridge 161:aa5281ff4a02 852 \return number of leading zeros in value
AnnaBridge 161:aa5281ff4a02 853 */
AnnaBridge 161:aa5281ff4a02 854 #define __CLZ __builtin_clz
AnnaBridge 161:aa5281ff4a02 855
AnnaBridge 161:aa5281ff4a02 856
AnnaBridge 161:aa5281ff4a02 857 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 858 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 859 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 860 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 861 /**
AnnaBridge 161:aa5281ff4a02 862 \brief LDR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 863 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 864 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 865 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 866 */
AnnaBridge 161:aa5281ff4a02 867 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 868
AnnaBridge 161:aa5281ff4a02 869
AnnaBridge 161:aa5281ff4a02 870 /**
AnnaBridge 161:aa5281ff4a02 871 \brief LDR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 872 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 873 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 874 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 875 */
AnnaBridge 161:aa5281ff4a02 876 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 877
AnnaBridge 161:aa5281ff4a02 878
AnnaBridge 161:aa5281ff4a02 879 /**
AnnaBridge 161:aa5281ff4a02 880 \brief LDR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 881 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 882 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 883 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 884 */
AnnaBridge 161:aa5281ff4a02 885 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 886
AnnaBridge 161:aa5281ff4a02 887
AnnaBridge 161:aa5281ff4a02 888 /**
AnnaBridge 161:aa5281ff4a02 889 \brief STR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 890 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 891 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 892 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 893 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 894 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 895 */
AnnaBridge 161:aa5281ff4a02 896 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 897
AnnaBridge 161:aa5281ff4a02 898
AnnaBridge 161:aa5281ff4a02 899 /**
AnnaBridge 161:aa5281ff4a02 900 \brief STR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 901 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 902 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 903 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 904 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 905 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 906 */
AnnaBridge 161:aa5281ff4a02 907 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 908
AnnaBridge 161:aa5281ff4a02 909
AnnaBridge 161:aa5281ff4a02 910 /**
AnnaBridge 161:aa5281ff4a02 911 \brief STR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 912 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 913 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 914 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 915 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 916 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 917 */
AnnaBridge 161:aa5281ff4a02 918 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 919
AnnaBridge 161:aa5281ff4a02 920
AnnaBridge 161:aa5281ff4a02 921 /**
AnnaBridge 161:aa5281ff4a02 922 \brief Remove the exclusive lock
AnnaBridge 161:aa5281ff4a02 923 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 161:aa5281ff4a02 924 */
AnnaBridge 161:aa5281ff4a02 925 #define __CLREX __builtin_arm_clrex
AnnaBridge 161:aa5281ff4a02 926
AnnaBridge 161:aa5281ff4a02 927 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 928 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 929 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 930 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 931
AnnaBridge 161:aa5281ff4a02 932
AnnaBridge 161:aa5281ff4a02 933 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 934 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 935 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 161:aa5281ff4a02 936
AnnaBridge 161:aa5281ff4a02 937 /**
AnnaBridge 161:aa5281ff4a02 938 \brief Signed Saturate
AnnaBridge 161:aa5281ff4a02 939 \details Saturates a signed value.
AnnaBridge 161:aa5281ff4a02 940 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 941 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 161:aa5281ff4a02 942 \return Saturated value
AnnaBridge 161:aa5281ff4a02 943 */
AnnaBridge 161:aa5281ff4a02 944 #define __SSAT __builtin_arm_ssat
AnnaBridge 161:aa5281ff4a02 945
AnnaBridge 161:aa5281ff4a02 946
AnnaBridge 161:aa5281ff4a02 947 /**
AnnaBridge 161:aa5281ff4a02 948 \brief Unsigned Saturate
AnnaBridge 161:aa5281ff4a02 949 \details Saturates an unsigned value.
AnnaBridge 161:aa5281ff4a02 950 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 951 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 161:aa5281ff4a02 952 \return Saturated value
AnnaBridge 161:aa5281ff4a02 953 */
AnnaBridge 161:aa5281ff4a02 954 #define __USAT __builtin_arm_usat
AnnaBridge 161:aa5281ff4a02 955
AnnaBridge 161:aa5281ff4a02 956
AnnaBridge 161:aa5281ff4a02 957 /**
AnnaBridge 161:aa5281ff4a02 958 \brief Rotate Right with Extend (32 bit)
AnnaBridge 161:aa5281ff4a02 959 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 161:aa5281ff4a02 960 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 161:aa5281ff4a02 961 \param [in] value Value to rotate
AnnaBridge 161:aa5281ff4a02 962 \return Rotated value
AnnaBridge 161:aa5281ff4a02 963 */
AnnaBridge 161:aa5281ff4a02 964 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 161:aa5281ff4a02 965 {
AnnaBridge 161:aa5281ff4a02 966 uint32_t result;
AnnaBridge 161:aa5281ff4a02 967
AnnaBridge 161:aa5281ff4a02 968 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 161:aa5281ff4a02 969 return(result);
AnnaBridge 161:aa5281ff4a02 970 }
AnnaBridge 161:aa5281ff4a02 971
AnnaBridge 161:aa5281ff4a02 972
AnnaBridge 161:aa5281ff4a02 973 /**
AnnaBridge 161:aa5281ff4a02 974 \brief LDRT Unprivileged (8 bit)
AnnaBridge 161:aa5281ff4a02 975 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 976 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 977 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 978 */
AnnaBridge 161:aa5281ff4a02 979 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 980 {
AnnaBridge 161:aa5281ff4a02 981 uint32_t result;
AnnaBridge 161:aa5281ff4a02 982
AnnaBridge 161:aa5281ff4a02 983 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 984 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 985 }
AnnaBridge 161:aa5281ff4a02 986
AnnaBridge 161:aa5281ff4a02 987
AnnaBridge 161:aa5281ff4a02 988 /**
AnnaBridge 161:aa5281ff4a02 989 \brief LDRT Unprivileged (16 bit)
AnnaBridge 161:aa5281ff4a02 990 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 991 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 992 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 993 */
AnnaBridge 161:aa5281ff4a02 994 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 995 {
AnnaBridge 161:aa5281ff4a02 996 uint32_t result;
AnnaBridge 161:aa5281ff4a02 997
AnnaBridge 161:aa5281ff4a02 998 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 999 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 161:aa5281ff4a02 1000 }
AnnaBridge 161:aa5281ff4a02 1001
AnnaBridge 161:aa5281ff4a02 1002
AnnaBridge 161:aa5281ff4a02 1003 /**
AnnaBridge 161:aa5281ff4a02 1004 \brief LDRT Unprivileged (32 bit)
AnnaBridge 161:aa5281ff4a02 1005 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1006 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1007 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1008 */
AnnaBridge 161:aa5281ff4a02 1009 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1010 {
AnnaBridge 161:aa5281ff4a02 1011 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1012
AnnaBridge 161:aa5281ff4a02 1013 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1014 return(result);
AnnaBridge 161:aa5281ff4a02 1015 }
AnnaBridge 161:aa5281ff4a02 1016
AnnaBridge 161:aa5281ff4a02 1017
AnnaBridge 161:aa5281ff4a02 1018 /**
AnnaBridge 161:aa5281ff4a02 1019 \brief STRT Unprivileged (8 bit)
AnnaBridge 161:aa5281ff4a02 1020 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1021 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1022 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1023 */
AnnaBridge 161:aa5281ff4a02 1024 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1025 {
AnnaBridge 161:aa5281ff4a02 1026 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1027 }
AnnaBridge 161:aa5281ff4a02 1028
AnnaBridge 161:aa5281ff4a02 1029
AnnaBridge 161:aa5281ff4a02 1030 /**
AnnaBridge 161:aa5281ff4a02 1031 \brief STRT Unprivileged (16 bit)
AnnaBridge 161:aa5281ff4a02 1032 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1033 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1034 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1035 */
AnnaBridge 161:aa5281ff4a02 1036 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1037 {
AnnaBridge 161:aa5281ff4a02 1038 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1039 }
AnnaBridge 161:aa5281ff4a02 1040
AnnaBridge 161:aa5281ff4a02 1041
AnnaBridge 161:aa5281ff4a02 1042 /**
AnnaBridge 161:aa5281ff4a02 1043 \brief STRT Unprivileged (32 bit)
AnnaBridge 161:aa5281ff4a02 1044 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1045 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1046 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1047 */
AnnaBridge 161:aa5281ff4a02 1048 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1049 {
AnnaBridge 161:aa5281ff4a02 1050 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 161:aa5281ff4a02 1051 }
AnnaBridge 161:aa5281ff4a02 1052
AnnaBridge 161:aa5281ff4a02 1053 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1054 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1055 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1056
AnnaBridge 161:aa5281ff4a02 1057 /**
AnnaBridge 161:aa5281ff4a02 1058 \brief Signed Saturate
AnnaBridge 161:aa5281ff4a02 1059 \details Saturates a signed value.
AnnaBridge 161:aa5281ff4a02 1060 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 1061 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 161:aa5281ff4a02 1062 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1063 */
AnnaBridge 161:aa5281ff4a02 1064 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge 161:aa5281ff4a02 1065 {
AnnaBridge 161:aa5281ff4a02 1066 if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge 161:aa5281ff4a02 1067 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 161:aa5281ff4a02 1068 const int32_t min = -1 - max ;
AnnaBridge 161:aa5281ff4a02 1069 if (val > max) {
AnnaBridge 161:aa5281ff4a02 1070 return max;
AnnaBridge 161:aa5281ff4a02 1071 } else if (val < min) {
AnnaBridge 161:aa5281ff4a02 1072 return min;
AnnaBridge 161:aa5281ff4a02 1073 }
AnnaBridge 161:aa5281ff4a02 1074 }
AnnaBridge 161:aa5281ff4a02 1075 return val;
AnnaBridge 161:aa5281ff4a02 1076 }
AnnaBridge 161:aa5281ff4a02 1077
AnnaBridge 161:aa5281ff4a02 1078 /**
AnnaBridge 161:aa5281ff4a02 1079 \brief Unsigned Saturate
AnnaBridge 161:aa5281ff4a02 1080 \details Saturates an unsigned value.
AnnaBridge 161:aa5281ff4a02 1081 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 1082 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 161:aa5281ff4a02 1083 \return Saturated value
AnnaBridge 161:aa5281ff4a02 1084 */
AnnaBridge 161:aa5281ff4a02 1085 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge 161:aa5281ff4a02 1086 {
AnnaBridge 161:aa5281ff4a02 1087 if (sat <= 31U) {
AnnaBridge 161:aa5281ff4a02 1088 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 161:aa5281ff4a02 1089 if (val > (int32_t)max) {
AnnaBridge 161:aa5281ff4a02 1090 return max;
AnnaBridge 161:aa5281ff4a02 1091 } else if (val < 0) {
AnnaBridge 161:aa5281ff4a02 1092 return 0U;
AnnaBridge 161:aa5281ff4a02 1093 }
AnnaBridge 161:aa5281ff4a02 1094 }
AnnaBridge 161:aa5281ff4a02 1095 return (uint32_t)val;
AnnaBridge 161:aa5281ff4a02 1096 }
AnnaBridge 161:aa5281ff4a02 1097
AnnaBridge 161:aa5281ff4a02 1098 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1099 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1100 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1101
AnnaBridge 161:aa5281ff4a02 1102
AnnaBridge 161:aa5281ff4a02 1103 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1104 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 1105 /**
AnnaBridge 161:aa5281ff4a02 1106 \brief Load-Acquire (8 bit)
AnnaBridge 161:aa5281ff4a02 1107 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 1108 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1109 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1110 */
AnnaBridge 161:aa5281ff4a02 1111 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1112 {
AnnaBridge 161:aa5281ff4a02 1113 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1114
AnnaBridge 161:aa5281ff4a02 1115 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1116 return ((uint8_t) result);
AnnaBridge 161:aa5281ff4a02 1117 }
AnnaBridge 161:aa5281ff4a02 1118
AnnaBridge 161:aa5281ff4a02 1119
AnnaBridge 161:aa5281ff4a02 1120 /**
AnnaBridge 161:aa5281ff4a02 1121 \brief Load-Acquire (16 bit)
AnnaBridge 161:aa5281ff4a02 1122 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1123 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1124 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1125 */
AnnaBridge 161:aa5281ff4a02 1126 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1127 {
AnnaBridge 161:aa5281ff4a02 1128 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1129
AnnaBridge 161:aa5281ff4a02 1130 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1131 return ((uint16_t) result);
AnnaBridge 161:aa5281ff4a02 1132 }
AnnaBridge 161:aa5281ff4a02 1133
AnnaBridge 161:aa5281ff4a02 1134
AnnaBridge 161:aa5281ff4a02 1135 /**
AnnaBridge 161:aa5281ff4a02 1136 \brief Load-Acquire (32 bit)
AnnaBridge 161:aa5281ff4a02 1137 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1138 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1139 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1140 */
AnnaBridge 161:aa5281ff4a02 1141 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1142 {
AnnaBridge 161:aa5281ff4a02 1143 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1144
AnnaBridge 161:aa5281ff4a02 1145 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 161:aa5281ff4a02 1146 return(result);
AnnaBridge 161:aa5281ff4a02 1147 }
AnnaBridge 161:aa5281ff4a02 1148
AnnaBridge 161:aa5281ff4a02 1149
AnnaBridge 161:aa5281ff4a02 1150 /**
AnnaBridge 161:aa5281ff4a02 1151 \brief Store-Release (8 bit)
AnnaBridge 161:aa5281ff4a02 1152 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1153 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1154 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1155 */
AnnaBridge 161:aa5281ff4a02 1156 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 161:aa5281ff4a02 1157 {
AnnaBridge 161:aa5281ff4a02 1158 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1159 }
AnnaBridge 161:aa5281ff4a02 1160
AnnaBridge 161:aa5281ff4a02 1161
AnnaBridge 161:aa5281ff4a02 1162 /**
AnnaBridge 161:aa5281ff4a02 1163 \brief Store-Release (16 bit)
AnnaBridge 161:aa5281ff4a02 1164 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1165 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1166 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1167 */
AnnaBridge 161:aa5281ff4a02 1168 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 161:aa5281ff4a02 1169 {
AnnaBridge 161:aa5281ff4a02 1170 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1171 }
AnnaBridge 161:aa5281ff4a02 1172
AnnaBridge 161:aa5281ff4a02 1173
AnnaBridge 161:aa5281ff4a02 1174 /**
AnnaBridge 161:aa5281ff4a02 1175 \brief Store-Release (32 bit)
AnnaBridge 161:aa5281ff4a02 1176 \details Executes a STL instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1177 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1178 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1179 */
AnnaBridge 161:aa5281ff4a02 1180 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 161:aa5281ff4a02 1181 {
AnnaBridge 161:aa5281ff4a02 1182 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 161:aa5281ff4a02 1183 }
AnnaBridge 161:aa5281ff4a02 1184
AnnaBridge 161:aa5281ff4a02 1185
AnnaBridge 161:aa5281ff4a02 1186 /**
AnnaBridge 161:aa5281ff4a02 1187 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 1188 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 1189 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1190 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1191 */
AnnaBridge 161:aa5281ff4a02 1192 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 161:aa5281ff4a02 1193
AnnaBridge 161:aa5281ff4a02 1194
AnnaBridge 161:aa5281ff4a02 1195 /**
AnnaBridge 161:aa5281ff4a02 1196 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 1197 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1198 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1199 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1200 */
AnnaBridge 161:aa5281ff4a02 1201 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 161:aa5281ff4a02 1202
AnnaBridge 161:aa5281ff4a02 1203
AnnaBridge 161:aa5281ff4a02 1204 /**
AnnaBridge 161:aa5281ff4a02 1205 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1206 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1207 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 1208 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 1209 */
AnnaBridge 161:aa5281ff4a02 1210 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 161:aa5281ff4a02 1211
AnnaBridge 161:aa5281ff4a02 1212
AnnaBridge 161:aa5281ff4a02 1213 /**
AnnaBridge 161:aa5281ff4a02 1214 \brief Store-Release Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 1215 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 1216 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1217 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1218 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1219 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1220 */
AnnaBridge 161:aa5281ff4a02 1221 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 161:aa5281ff4a02 1222
AnnaBridge 161:aa5281ff4a02 1223
AnnaBridge 161:aa5281ff4a02 1224 /**
AnnaBridge 161:aa5281ff4a02 1225 \brief Store-Release Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 1226 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 1227 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1228 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1229 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1230 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1231 */
AnnaBridge 161:aa5281ff4a02 1232 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 161:aa5281ff4a02 1233
AnnaBridge 161:aa5281ff4a02 1234
AnnaBridge 161:aa5281ff4a02 1235 /**
AnnaBridge 161:aa5281ff4a02 1236 \brief Store-Release Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 1237 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 1238 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 1239 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 1240 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 1241 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 1242 */
AnnaBridge 161:aa5281ff4a02 1243 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 161:aa5281ff4a02 1244
AnnaBridge 161:aa5281ff4a02 1245 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 1246 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 161:aa5281ff4a02 1247
AnnaBridge 161:aa5281ff4a02 1248 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 161:aa5281ff4a02 1249
AnnaBridge 161:aa5281ff4a02 1250
AnnaBridge 161:aa5281ff4a02 1251 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 161:aa5281ff4a02 1252 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 161:aa5281ff4a02 1253 Access to dedicated SIMD instructions
AnnaBridge 161:aa5281ff4a02 1254 @{
AnnaBridge 161:aa5281ff4a02 1255 */
AnnaBridge 161:aa5281ff4a02 1256
AnnaBridge 161:aa5281ff4a02 1257 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 161:aa5281ff4a02 1258
AnnaBridge 161:aa5281ff4a02 1259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1260 {
AnnaBridge 161:aa5281ff4a02 1261 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1262
AnnaBridge 161:aa5281ff4a02 1263 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1264 return(result);
AnnaBridge 161:aa5281ff4a02 1265 }
AnnaBridge 161:aa5281ff4a02 1266
AnnaBridge 161:aa5281ff4a02 1267 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1268 {
AnnaBridge 161:aa5281ff4a02 1269 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1270
AnnaBridge 161:aa5281ff4a02 1271 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1272 return(result);
AnnaBridge 161:aa5281ff4a02 1273 }
AnnaBridge 161:aa5281ff4a02 1274
AnnaBridge 161:aa5281ff4a02 1275 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1276 {
AnnaBridge 161:aa5281ff4a02 1277 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1278
AnnaBridge 161:aa5281ff4a02 1279 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1280 return(result);
AnnaBridge 161:aa5281ff4a02 1281 }
AnnaBridge 161:aa5281ff4a02 1282
AnnaBridge 161:aa5281ff4a02 1283 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1284 {
AnnaBridge 161:aa5281ff4a02 1285 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1286
AnnaBridge 161:aa5281ff4a02 1287 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1288 return(result);
AnnaBridge 161:aa5281ff4a02 1289 }
AnnaBridge 161:aa5281ff4a02 1290
AnnaBridge 161:aa5281ff4a02 1291 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1292 {
AnnaBridge 161:aa5281ff4a02 1293 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1294
AnnaBridge 161:aa5281ff4a02 1295 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1296 return(result);
AnnaBridge 161:aa5281ff4a02 1297 }
AnnaBridge 161:aa5281ff4a02 1298
AnnaBridge 161:aa5281ff4a02 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1300 {
AnnaBridge 161:aa5281ff4a02 1301 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1302
AnnaBridge 161:aa5281ff4a02 1303 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1304 return(result);
AnnaBridge 161:aa5281ff4a02 1305 }
AnnaBridge 161:aa5281ff4a02 1306
AnnaBridge 161:aa5281ff4a02 1307
AnnaBridge 161:aa5281ff4a02 1308 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1309 {
AnnaBridge 161:aa5281ff4a02 1310 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1311
AnnaBridge 161:aa5281ff4a02 1312 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1313 return(result);
AnnaBridge 161:aa5281ff4a02 1314 }
AnnaBridge 161:aa5281ff4a02 1315
AnnaBridge 161:aa5281ff4a02 1316 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1317 {
AnnaBridge 161:aa5281ff4a02 1318 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1319
AnnaBridge 161:aa5281ff4a02 1320 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1321 return(result);
AnnaBridge 161:aa5281ff4a02 1322 }
AnnaBridge 161:aa5281ff4a02 1323
AnnaBridge 161:aa5281ff4a02 1324 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1325 {
AnnaBridge 161:aa5281ff4a02 1326 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1327
AnnaBridge 161:aa5281ff4a02 1328 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1329 return(result);
AnnaBridge 161:aa5281ff4a02 1330 }
AnnaBridge 161:aa5281ff4a02 1331
AnnaBridge 161:aa5281ff4a02 1332 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1333 {
AnnaBridge 161:aa5281ff4a02 1334 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1335
AnnaBridge 161:aa5281ff4a02 1336 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1337 return(result);
AnnaBridge 161:aa5281ff4a02 1338 }
AnnaBridge 161:aa5281ff4a02 1339
AnnaBridge 161:aa5281ff4a02 1340 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1341 {
AnnaBridge 161:aa5281ff4a02 1342 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1343
AnnaBridge 161:aa5281ff4a02 1344 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1345 return(result);
AnnaBridge 161:aa5281ff4a02 1346 }
AnnaBridge 161:aa5281ff4a02 1347
AnnaBridge 161:aa5281ff4a02 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1349 {
AnnaBridge 161:aa5281ff4a02 1350 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1351
AnnaBridge 161:aa5281ff4a02 1352 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1353 return(result);
AnnaBridge 161:aa5281ff4a02 1354 }
AnnaBridge 161:aa5281ff4a02 1355
AnnaBridge 161:aa5281ff4a02 1356
AnnaBridge 161:aa5281ff4a02 1357 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1358 {
AnnaBridge 161:aa5281ff4a02 1359 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1360
AnnaBridge 161:aa5281ff4a02 1361 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1362 return(result);
AnnaBridge 161:aa5281ff4a02 1363 }
AnnaBridge 161:aa5281ff4a02 1364
AnnaBridge 161:aa5281ff4a02 1365 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1366 {
AnnaBridge 161:aa5281ff4a02 1367 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1368
AnnaBridge 161:aa5281ff4a02 1369 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1370 return(result);
AnnaBridge 161:aa5281ff4a02 1371 }
AnnaBridge 161:aa5281ff4a02 1372
AnnaBridge 161:aa5281ff4a02 1373 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1374 {
AnnaBridge 161:aa5281ff4a02 1375 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1376
AnnaBridge 161:aa5281ff4a02 1377 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1378 return(result);
AnnaBridge 161:aa5281ff4a02 1379 }
AnnaBridge 161:aa5281ff4a02 1380
AnnaBridge 161:aa5281ff4a02 1381 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1382 {
AnnaBridge 161:aa5281ff4a02 1383 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1384
AnnaBridge 161:aa5281ff4a02 1385 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1386 return(result);
AnnaBridge 161:aa5281ff4a02 1387 }
AnnaBridge 161:aa5281ff4a02 1388
AnnaBridge 161:aa5281ff4a02 1389 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1390 {
AnnaBridge 161:aa5281ff4a02 1391 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1392
AnnaBridge 161:aa5281ff4a02 1393 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1394 return(result);
AnnaBridge 161:aa5281ff4a02 1395 }
AnnaBridge 161:aa5281ff4a02 1396
AnnaBridge 161:aa5281ff4a02 1397 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1398 {
AnnaBridge 161:aa5281ff4a02 1399 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1400
AnnaBridge 161:aa5281ff4a02 1401 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1402 return(result);
AnnaBridge 161:aa5281ff4a02 1403 }
AnnaBridge 161:aa5281ff4a02 1404
AnnaBridge 161:aa5281ff4a02 1405 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1406 {
AnnaBridge 161:aa5281ff4a02 1407 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1408
AnnaBridge 161:aa5281ff4a02 1409 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1410 return(result);
AnnaBridge 161:aa5281ff4a02 1411 }
AnnaBridge 161:aa5281ff4a02 1412
AnnaBridge 161:aa5281ff4a02 1413 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1414 {
AnnaBridge 161:aa5281ff4a02 1415 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1416
AnnaBridge 161:aa5281ff4a02 1417 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1418 return(result);
AnnaBridge 161:aa5281ff4a02 1419 }
AnnaBridge 161:aa5281ff4a02 1420
AnnaBridge 161:aa5281ff4a02 1421 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1422 {
AnnaBridge 161:aa5281ff4a02 1423 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1424
AnnaBridge 161:aa5281ff4a02 1425 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1426 return(result);
AnnaBridge 161:aa5281ff4a02 1427 }
AnnaBridge 161:aa5281ff4a02 1428
AnnaBridge 161:aa5281ff4a02 1429 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1430 {
AnnaBridge 161:aa5281ff4a02 1431 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1432
AnnaBridge 161:aa5281ff4a02 1433 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1434 return(result);
AnnaBridge 161:aa5281ff4a02 1435 }
AnnaBridge 161:aa5281ff4a02 1436
AnnaBridge 161:aa5281ff4a02 1437 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1438 {
AnnaBridge 161:aa5281ff4a02 1439 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1440
AnnaBridge 161:aa5281ff4a02 1441 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1442 return(result);
AnnaBridge 161:aa5281ff4a02 1443 }
AnnaBridge 161:aa5281ff4a02 1444
AnnaBridge 161:aa5281ff4a02 1445 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1446 {
AnnaBridge 161:aa5281ff4a02 1447 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1448
AnnaBridge 161:aa5281ff4a02 1449 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1450 return(result);
AnnaBridge 161:aa5281ff4a02 1451 }
AnnaBridge 161:aa5281ff4a02 1452
AnnaBridge 161:aa5281ff4a02 1453 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1454 {
AnnaBridge 161:aa5281ff4a02 1455 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1456
AnnaBridge 161:aa5281ff4a02 1457 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1458 return(result);
AnnaBridge 161:aa5281ff4a02 1459 }
AnnaBridge 161:aa5281ff4a02 1460
AnnaBridge 161:aa5281ff4a02 1461 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1462 {
AnnaBridge 161:aa5281ff4a02 1463 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1464
AnnaBridge 161:aa5281ff4a02 1465 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1466 return(result);
AnnaBridge 161:aa5281ff4a02 1467 }
AnnaBridge 161:aa5281ff4a02 1468
AnnaBridge 161:aa5281ff4a02 1469 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1470 {
AnnaBridge 161:aa5281ff4a02 1471 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1472
AnnaBridge 161:aa5281ff4a02 1473 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1474 return(result);
AnnaBridge 161:aa5281ff4a02 1475 }
AnnaBridge 161:aa5281ff4a02 1476
AnnaBridge 161:aa5281ff4a02 1477 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1478 {
AnnaBridge 161:aa5281ff4a02 1479 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1480
AnnaBridge 161:aa5281ff4a02 1481 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1482 return(result);
AnnaBridge 161:aa5281ff4a02 1483 }
AnnaBridge 161:aa5281ff4a02 1484
AnnaBridge 161:aa5281ff4a02 1485 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1486 {
AnnaBridge 161:aa5281ff4a02 1487 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1488
AnnaBridge 161:aa5281ff4a02 1489 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1490 return(result);
AnnaBridge 161:aa5281ff4a02 1491 }
AnnaBridge 161:aa5281ff4a02 1492
AnnaBridge 161:aa5281ff4a02 1493 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1494 {
AnnaBridge 161:aa5281ff4a02 1495 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1496
AnnaBridge 161:aa5281ff4a02 1497 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1498 return(result);
AnnaBridge 161:aa5281ff4a02 1499 }
AnnaBridge 161:aa5281ff4a02 1500
AnnaBridge 161:aa5281ff4a02 1501 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1502 {
AnnaBridge 161:aa5281ff4a02 1503 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1504
AnnaBridge 161:aa5281ff4a02 1505 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1506 return(result);
AnnaBridge 161:aa5281ff4a02 1507 }
AnnaBridge 161:aa5281ff4a02 1508
AnnaBridge 161:aa5281ff4a02 1509 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1510 {
AnnaBridge 161:aa5281ff4a02 1511 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1512
AnnaBridge 161:aa5281ff4a02 1513 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1514 return(result);
AnnaBridge 161:aa5281ff4a02 1515 }
AnnaBridge 161:aa5281ff4a02 1516
AnnaBridge 161:aa5281ff4a02 1517 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1518 {
AnnaBridge 161:aa5281ff4a02 1519 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1520
AnnaBridge 161:aa5281ff4a02 1521 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1522 return(result);
AnnaBridge 161:aa5281ff4a02 1523 }
AnnaBridge 161:aa5281ff4a02 1524
AnnaBridge 161:aa5281ff4a02 1525 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1526 {
AnnaBridge 161:aa5281ff4a02 1527 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1528
AnnaBridge 161:aa5281ff4a02 1529 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1530 return(result);
AnnaBridge 161:aa5281ff4a02 1531 }
AnnaBridge 161:aa5281ff4a02 1532
AnnaBridge 161:aa5281ff4a02 1533 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1534 {
AnnaBridge 161:aa5281ff4a02 1535 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1536
AnnaBridge 161:aa5281ff4a02 1537 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1538 return(result);
AnnaBridge 161:aa5281ff4a02 1539 }
AnnaBridge 161:aa5281ff4a02 1540
AnnaBridge 161:aa5281ff4a02 1541 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1542 {
AnnaBridge 161:aa5281ff4a02 1543 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1544
AnnaBridge 161:aa5281ff4a02 1545 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1546 return(result);
AnnaBridge 161:aa5281ff4a02 1547 }
AnnaBridge 161:aa5281ff4a02 1548
AnnaBridge 161:aa5281ff4a02 1549 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1550 {
AnnaBridge 161:aa5281ff4a02 1551 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1552
AnnaBridge 161:aa5281ff4a02 1553 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1554 return(result);
AnnaBridge 161:aa5281ff4a02 1555 }
AnnaBridge 161:aa5281ff4a02 1556
AnnaBridge 161:aa5281ff4a02 1557 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1558 {
AnnaBridge 161:aa5281ff4a02 1559 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1560
AnnaBridge 161:aa5281ff4a02 1561 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1562 return(result);
AnnaBridge 161:aa5281ff4a02 1563 }
AnnaBridge 161:aa5281ff4a02 1564
AnnaBridge 161:aa5281ff4a02 1565 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1566 ({ \
AnnaBridge 161:aa5281ff4a02 1567 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1568 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1569 __RES; \
AnnaBridge 161:aa5281ff4a02 1570 })
AnnaBridge 161:aa5281ff4a02 1571
AnnaBridge 161:aa5281ff4a02 1572 #define __USAT16(ARG1,ARG2) \
AnnaBridge 161:aa5281ff4a02 1573 ({ \
AnnaBridge 161:aa5281ff4a02 1574 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 161:aa5281ff4a02 1575 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 161:aa5281ff4a02 1576 __RES; \
AnnaBridge 161:aa5281ff4a02 1577 })
AnnaBridge 161:aa5281ff4a02 1578
AnnaBridge 161:aa5281ff4a02 1579 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 161:aa5281ff4a02 1580 {
AnnaBridge 161:aa5281ff4a02 1581 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1582
AnnaBridge 161:aa5281ff4a02 1583 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 161:aa5281ff4a02 1584 return(result);
AnnaBridge 161:aa5281ff4a02 1585 }
AnnaBridge 161:aa5281ff4a02 1586
AnnaBridge 161:aa5281ff4a02 1587 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1588 {
AnnaBridge 161:aa5281ff4a02 1589 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1590
AnnaBridge 161:aa5281ff4a02 1591 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1592 return(result);
AnnaBridge 161:aa5281ff4a02 1593 }
AnnaBridge 161:aa5281ff4a02 1594
AnnaBridge 161:aa5281ff4a02 1595 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 161:aa5281ff4a02 1596 {
AnnaBridge 161:aa5281ff4a02 1597 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1598
AnnaBridge 161:aa5281ff4a02 1599 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 161:aa5281ff4a02 1600 return(result);
AnnaBridge 161:aa5281ff4a02 1601 }
AnnaBridge 161:aa5281ff4a02 1602
AnnaBridge 161:aa5281ff4a02 1603 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1604 {
AnnaBridge 161:aa5281ff4a02 1605 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1606
AnnaBridge 161:aa5281ff4a02 1607 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1608 return(result);
AnnaBridge 161:aa5281ff4a02 1609 }
AnnaBridge 161:aa5281ff4a02 1610
AnnaBridge 161:aa5281ff4a02 1611 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1612 {
AnnaBridge 161:aa5281ff4a02 1613 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1614
AnnaBridge 161:aa5281ff4a02 1615 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1616 return(result);
AnnaBridge 161:aa5281ff4a02 1617 }
AnnaBridge 161:aa5281ff4a02 1618
AnnaBridge 161:aa5281ff4a02 1619 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1620 {
AnnaBridge 161:aa5281ff4a02 1621 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1622
AnnaBridge 161:aa5281ff4a02 1623 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1624 return(result);
AnnaBridge 161:aa5281ff4a02 1625 }
AnnaBridge 161:aa5281ff4a02 1626
AnnaBridge 161:aa5281ff4a02 1627 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1628 {
AnnaBridge 161:aa5281ff4a02 1629 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1630
AnnaBridge 161:aa5281ff4a02 1631 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1632 return(result);
AnnaBridge 161:aa5281ff4a02 1633 }
AnnaBridge 161:aa5281ff4a02 1634
AnnaBridge 161:aa5281ff4a02 1635 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1636 {
AnnaBridge 161:aa5281ff4a02 1637 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1638
AnnaBridge 161:aa5281ff4a02 1639 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1640 return(result);
AnnaBridge 161:aa5281ff4a02 1641 }
AnnaBridge 161:aa5281ff4a02 1642
AnnaBridge 161:aa5281ff4a02 1643 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1644 {
AnnaBridge 161:aa5281ff4a02 1645 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1646 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1647 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1648 } llr;
AnnaBridge 161:aa5281ff4a02 1649 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1650
AnnaBridge 161:aa5281ff4a02 1651 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1652 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1653 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1654 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1655 #endif
AnnaBridge 161:aa5281ff4a02 1656
AnnaBridge 161:aa5281ff4a02 1657 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1658 }
AnnaBridge 161:aa5281ff4a02 1659
AnnaBridge 161:aa5281ff4a02 1660 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1661 {
AnnaBridge 161:aa5281ff4a02 1662 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1663 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1664 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1665 } llr;
AnnaBridge 161:aa5281ff4a02 1666 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1667
AnnaBridge 161:aa5281ff4a02 1668 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1669 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1670 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1671 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1672 #endif
AnnaBridge 161:aa5281ff4a02 1673
AnnaBridge 161:aa5281ff4a02 1674 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1675 }
AnnaBridge 161:aa5281ff4a02 1676
AnnaBridge 161:aa5281ff4a02 1677 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1678 {
AnnaBridge 161:aa5281ff4a02 1679 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1680
AnnaBridge 161:aa5281ff4a02 1681 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1682 return(result);
AnnaBridge 161:aa5281ff4a02 1683 }
AnnaBridge 161:aa5281ff4a02 1684
AnnaBridge 161:aa5281ff4a02 1685 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1686 {
AnnaBridge 161:aa5281ff4a02 1687 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1688
AnnaBridge 161:aa5281ff4a02 1689 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1690 return(result);
AnnaBridge 161:aa5281ff4a02 1691 }
AnnaBridge 161:aa5281ff4a02 1692
AnnaBridge 161:aa5281ff4a02 1693 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1694 {
AnnaBridge 161:aa5281ff4a02 1695 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1696
AnnaBridge 161:aa5281ff4a02 1697 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1698 return(result);
AnnaBridge 161:aa5281ff4a02 1699 }
AnnaBridge 161:aa5281ff4a02 1700
AnnaBridge 161:aa5281ff4a02 1701 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 161:aa5281ff4a02 1702 {
AnnaBridge 161:aa5281ff4a02 1703 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1704
AnnaBridge 161:aa5281ff4a02 1705 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1706 return(result);
AnnaBridge 161:aa5281ff4a02 1707 }
AnnaBridge 161:aa5281ff4a02 1708
AnnaBridge 161:aa5281ff4a02 1709 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1710 {
AnnaBridge 161:aa5281ff4a02 1711 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1712 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1713 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1714 } llr;
AnnaBridge 161:aa5281ff4a02 1715 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1716
AnnaBridge 161:aa5281ff4a02 1717 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1718 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1719 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1720 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1721 #endif
AnnaBridge 161:aa5281ff4a02 1722
AnnaBridge 161:aa5281ff4a02 1723 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1724 }
AnnaBridge 161:aa5281ff4a02 1725
AnnaBridge 161:aa5281ff4a02 1726 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 161:aa5281ff4a02 1727 {
AnnaBridge 161:aa5281ff4a02 1728 union llreg_u{
AnnaBridge 161:aa5281ff4a02 1729 uint32_t w32[2];
AnnaBridge 161:aa5281ff4a02 1730 uint64_t w64;
AnnaBridge 161:aa5281ff4a02 1731 } llr;
AnnaBridge 161:aa5281ff4a02 1732 llr.w64 = acc;
AnnaBridge 161:aa5281ff4a02 1733
AnnaBridge 161:aa5281ff4a02 1734 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 161:aa5281ff4a02 1735 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 161:aa5281ff4a02 1736 #else /* Big endian */
AnnaBridge 161:aa5281ff4a02 1737 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 161:aa5281ff4a02 1738 #endif
AnnaBridge 161:aa5281ff4a02 1739
AnnaBridge 161:aa5281ff4a02 1740 return(llr.w64);
AnnaBridge 161:aa5281ff4a02 1741 }
AnnaBridge 161:aa5281ff4a02 1742
AnnaBridge 161:aa5281ff4a02 1743 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 1744 {
AnnaBridge 161:aa5281ff4a02 1745 uint32_t result;
AnnaBridge 161:aa5281ff4a02 1746
AnnaBridge 161:aa5281ff4a02 1747 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1748 return(result);
AnnaBridge 161:aa5281ff4a02 1749 }
AnnaBridge 161:aa5281ff4a02 1750
AnnaBridge 161:aa5281ff4a02 1751 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 161:aa5281ff4a02 1752 {
AnnaBridge 161:aa5281ff4a02 1753 int32_t result;
AnnaBridge 161:aa5281ff4a02 1754
AnnaBridge 161:aa5281ff4a02 1755 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1756 return(result);
AnnaBridge 161:aa5281ff4a02 1757 }
AnnaBridge 161:aa5281ff4a02 1758
AnnaBridge 161:aa5281ff4a02 1759 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 161:aa5281ff4a02 1760 {
AnnaBridge 161:aa5281ff4a02 1761 int32_t result;
AnnaBridge 161:aa5281ff4a02 1762
AnnaBridge 161:aa5281ff4a02 1763 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 161:aa5281ff4a02 1764 return(result);
AnnaBridge 161:aa5281ff4a02 1765 }
AnnaBridge 161:aa5281ff4a02 1766
AnnaBridge 161:aa5281ff4a02 1767 #if 0
AnnaBridge 161:aa5281ff4a02 1768 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 161:aa5281ff4a02 1769 ({ \
AnnaBridge 161:aa5281ff4a02 1770 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 161:aa5281ff4a02 1771 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 161:aa5281ff4a02 1772 __RES; \
AnnaBridge 161:aa5281ff4a02 1773 })
AnnaBridge 161:aa5281ff4a02 1774
AnnaBridge 161:aa5281ff4a02 1775 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 161:aa5281ff4a02 1776 ({ \
AnnaBridge 161:aa5281ff4a02 1777 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 161:aa5281ff4a02 1778 if (ARG3 == 0) \
AnnaBridge 161:aa5281ff4a02 1779 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 161:aa5281ff4a02 1780 else \
AnnaBridge 161:aa5281ff4a02 1781 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 161:aa5281ff4a02 1782 __RES; \
AnnaBridge 161:aa5281ff4a02 1783 })
AnnaBridge 161:aa5281ff4a02 1784 #endif
AnnaBridge 161:aa5281ff4a02 1785
AnnaBridge 161:aa5281ff4a02 1786 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 161:aa5281ff4a02 1787 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 161:aa5281ff4a02 1788
AnnaBridge 161:aa5281ff4a02 1789 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 161:aa5281ff4a02 1790 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 161:aa5281ff4a02 1791
AnnaBridge 161:aa5281ff4a02 1792 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 161:aa5281ff4a02 1793 {
AnnaBridge 161:aa5281ff4a02 1794 int32_t result;
AnnaBridge 161:aa5281ff4a02 1795
AnnaBridge 161:aa5281ff4a02 1796 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 161:aa5281ff4a02 1797 return(result);
AnnaBridge 161:aa5281ff4a02 1798 }
AnnaBridge 161:aa5281ff4a02 1799
AnnaBridge 161:aa5281ff4a02 1800 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 161:aa5281ff4a02 1801 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 161:aa5281ff4a02 1802
AnnaBridge 161:aa5281ff4a02 1803
AnnaBridge 161:aa5281ff4a02 1804 #endif /* __CMSIS_ARMCLANG_H */