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TARGET_LPC546XX/cmsis_armclang.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
160:5571c4ff569f
Child:
169:a7c7b631e539
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 153:b484a57bc302 1 /**************************************************************************//**
AnnaBridge 153:b484a57bc302 2 * @file cmsis_armclang.h
AnnaBridge 153:b484a57bc302 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 153:b484a57bc302 4 * @version V5.0.3
AnnaBridge 153:b484a57bc302 5 * @date 27. March 2017
AnnaBridge 153:b484a57bc302 6 ******************************************************************************/
AnnaBridge 153:b484a57bc302 7 /*
AnnaBridge 153:b484a57bc302 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 153:b484a57bc302 9 *
AnnaBridge 153:b484a57bc302 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 153:b484a57bc302 11 *
AnnaBridge 153:b484a57bc302 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 153:b484a57bc302 13 * not use this file except in compliance with the License.
AnnaBridge 153:b484a57bc302 14 * You may obtain a copy of the License at
AnnaBridge 153:b484a57bc302 15 *
AnnaBridge 153:b484a57bc302 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 153:b484a57bc302 17 *
AnnaBridge 153:b484a57bc302 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 153:b484a57bc302 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 153:b484a57bc302 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 153:b484a57bc302 21 * See the License for the specific language governing permissions and
AnnaBridge 153:b484a57bc302 22 * limitations under the License.
AnnaBridge 153:b484a57bc302 23 */
AnnaBridge 153:b484a57bc302 24
Anna Bridge 160:5571c4ff569f 25 /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
AnnaBridge 153:b484a57bc302 26
AnnaBridge 153:b484a57bc302 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 153:b484a57bc302 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 153:b484a57bc302 29
AnnaBridge 153:b484a57bc302 30 #ifndef __ARM_COMPAT_H
AnnaBridge 153:b484a57bc302 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 153:b484a57bc302 32 #endif
AnnaBridge 153:b484a57bc302 33
AnnaBridge 153:b484a57bc302 34 /* CMSIS compiler specific defines */
AnnaBridge 153:b484a57bc302 35 #ifndef __ASM
AnnaBridge 153:b484a57bc302 36 #define __ASM __asm
AnnaBridge 153:b484a57bc302 37 #endif
AnnaBridge 153:b484a57bc302 38 #ifndef __INLINE
AnnaBridge 153:b484a57bc302 39 #define __INLINE __inline
AnnaBridge 153:b484a57bc302 40 #endif
AnnaBridge 153:b484a57bc302 41 #ifndef __STATIC_INLINE
AnnaBridge 153:b484a57bc302 42 #define __STATIC_INLINE static __inline
AnnaBridge 153:b484a57bc302 43 #endif
AnnaBridge 153:b484a57bc302 44 #ifndef __NO_RETURN
AnnaBridge 153:b484a57bc302 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 153:b484a57bc302 46 #endif
AnnaBridge 153:b484a57bc302 47 #ifndef __USED
AnnaBridge 153:b484a57bc302 48 #define __USED __attribute__((used))
AnnaBridge 153:b484a57bc302 49 #endif
AnnaBridge 153:b484a57bc302 50 #ifndef __WEAK
AnnaBridge 153:b484a57bc302 51 #define __WEAK __attribute__((weak))
AnnaBridge 153:b484a57bc302 52 #endif
AnnaBridge 153:b484a57bc302 53 #ifndef __PACKED
AnnaBridge 153:b484a57bc302 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 55 #endif
AnnaBridge 153:b484a57bc302 56 #ifndef __PACKED_STRUCT
AnnaBridge 153:b484a57bc302 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 58 #endif
Anna Bridge 160:5571c4ff569f 59 #ifndef __PACKED_UNION
Anna Bridge 160:5571c4ff569f 60 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge 160:5571c4ff569f 61 #endif
AnnaBridge 153:b484a57bc302 62 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 153:b484a57bc302 63 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 64 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 65 /*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
AnnaBridge 153:b484a57bc302 66 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 153:b484a57bc302 67 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 68 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 153:b484a57bc302 69 #endif
AnnaBridge 153:b484a57bc302 70 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 153:b484a57bc302 71 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 72 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 73 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 153:b484a57bc302 74 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 153:b484a57bc302 75 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 76 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 77 #endif
AnnaBridge 153:b484a57bc302 78 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 153:b484a57bc302 79 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 80 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 81 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 153:b484a57bc302 82 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 153:b484a57bc302 83 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 84 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 85 #endif
AnnaBridge 153:b484a57bc302 86 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 153:b484a57bc302 87 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 88 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 89 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 153:b484a57bc302 90 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 153:b484a57bc302 91 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 92 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 93 #endif
AnnaBridge 153:b484a57bc302 94 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 153:b484a57bc302 95 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 96 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 97 /*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
AnnaBridge 153:b484a57bc302 98 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 153:b484a57bc302 99 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 100 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 101 #endif
AnnaBridge 153:b484a57bc302 102 #ifndef __ALIGNED
AnnaBridge 153:b484a57bc302 103 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 153:b484a57bc302 104 #endif
Anna Bridge 160:5571c4ff569f 105 #ifndef __RESTRICT
Anna Bridge 160:5571c4ff569f 106 #define __RESTRICT __restrict
Anna Bridge 160:5571c4ff569f 107 #endif
AnnaBridge 153:b484a57bc302 108
AnnaBridge 153:b484a57bc302 109
AnnaBridge 153:b484a57bc302 110 /* ########################### Core Function Access ########################### */
AnnaBridge 153:b484a57bc302 111 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 153:b484a57bc302 112 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 153:b484a57bc302 113 @{
AnnaBridge 153:b484a57bc302 114 */
AnnaBridge 153:b484a57bc302 115
AnnaBridge 153:b484a57bc302 116 /**
AnnaBridge 153:b484a57bc302 117 \brief Enable IRQ Interrupts
AnnaBridge 153:b484a57bc302 118 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 119 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 120 */
AnnaBridge 153:b484a57bc302 121 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 153:b484a57bc302 122
AnnaBridge 153:b484a57bc302 123
AnnaBridge 153:b484a57bc302 124 /**
AnnaBridge 153:b484a57bc302 125 \brief Disable IRQ Interrupts
AnnaBridge 153:b484a57bc302 126 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 127 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 128 */
AnnaBridge 153:b484a57bc302 129 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 153:b484a57bc302 130
AnnaBridge 153:b484a57bc302 131
AnnaBridge 153:b484a57bc302 132 /**
AnnaBridge 153:b484a57bc302 133 \brief Get Control Register
AnnaBridge 153:b484a57bc302 134 \details Returns the content of the Control Register.
AnnaBridge 153:b484a57bc302 135 \return Control Register value
AnnaBridge 153:b484a57bc302 136 */
AnnaBridge 153:b484a57bc302 137 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 153:b484a57bc302 138 {
AnnaBridge 153:b484a57bc302 139 uint32_t result;
AnnaBridge 153:b484a57bc302 140
AnnaBridge 153:b484a57bc302 141 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 153:b484a57bc302 142 return(result);
AnnaBridge 153:b484a57bc302 143 }
AnnaBridge 153:b484a57bc302 144
AnnaBridge 153:b484a57bc302 145
AnnaBridge 153:b484a57bc302 146 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 147 /**
AnnaBridge 153:b484a57bc302 148 \brief Get Control Register (non-secure)
AnnaBridge 153:b484a57bc302 149 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 153:b484a57bc302 150 \return non-secure Control Register value
AnnaBridge 153:b484a57bc302 151 */
AnnaBridge 153:b484a57bc302 152 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 153:b484a57bc302 153 {
AnnaBridge 153:b484a57bc302 154 uint32_t result;
AnnaBridge 153:b484a57bc302 155
AnnaBridge 153:b484a57bc302 156 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 157 return(result);
AnnaBridge 153:b484a57bc302 158 }
AnnaBridge 153:b484a57bc302 159 #endif
AnnaBridge 153:b484a57bc302 160
AnnaBridge 153:b484a57bc302 161
AnnaBridge 153:b484a57bc302 162 /**
AnnaBridge 153:b484a57bc302 163 \brief Set Control Register
AnnaBridge 153:b484a57bc302 164 \details Writes the given value to the Control Register.
AnnaBridge 153:b484a57bc302 165 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 166 */
AnnaBridge 153:b484a57bc302 167 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 153:b484a57bc302 168 {
AnnaBridge 153:b484a57bc302 169 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 170 }
AnnaBridge 153:b484a57bc302 171
AnnaBridge 153:b484a57bc302 172
AnnaBridge 153:b484a57bc302 173 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 174 /**
AnnaBridge 153:b484a57bc302 175 \brief Set Control Register (non-secure)
AnnaBridge 153:b484a57bc302 176 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 153:b484a57bc302 177 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 178 */
AnnaBridge 153:b484a57bc302 179 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 153:b484a57bc302 180 {
AnnaBridge 153:b484a57bc302 181 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 182 }
AnnaBridge 153:b484a57bc302 183 #endif
AnnaBridge 153:b484a57bc302 184
AnnaBridge 153:b484a57bc302 185
AnnaBridge 153:b484a57bc302 186 /**
AnnaBridge 153:b484a57bc302 187 \brief Get IPSR Register
AnnaBridge 153:b484a57bc302 188 \details Returns the content of the IPSR Register.
AnnaBridge 153:b484a57bc302 189 \return IPSR Register value
AnnaBridge 153:b484a57bc302 190 */
AnnaBridge 153:b484a57bc302 191 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 153:b484a57bc302 192 {
AnnaBridge 153:b484a57bc302 193 uint32_t result;
AnnaBridge 153:b484a57bc302 194
AnnaBridge 153:b484a57bc302 195 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 196 return(result);
AnnaBridge 153:b484a57bc302 197 }
AnnaBridge 153:b484a57bc302 198
AnnaBridge 153:b484a57bc302 199
AnnaBridge 153:b484a57bc302 200 /**
AnnaBridge 153:b484a57bc302 201 \brief Get APSR Register
AnnaBridge 153:b484a57bc302 202 \details Returns the content of the APSR Register.
AnnaBridge 153:b484a57bc302 203 \return APSR Register value
AnnaBridge 153:b484a57bc302 204 */
AnnaBridge 153:b484a57bc302 205 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 153:b484a57bc302 206 {
AnnaBridge 153:b484a57bc302 207 uint32_t result;
AnnaBridge 153:b484a57bc302 208
AnnaBridge 153:b484a57bc302 209 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 210 return(result);
AnnaBridge 153:b484a57bc302 211 }
AnnaBridge 153:b484a57bc302 212
AnnaBridge 153:b484a57bc302 213
AnnaBridge 153:b484a57bc302 214 /**
AnnaBridge 153:b484a57bc302 215 \brief Get xPSR Register
AnnaBridge 153:b484a57bc302 216 \details Returns the content of the xPSR Register.
AnnaBridge 153:b484a57bc302 217 \return xPSR Register value
AnnaBridge 153:b484a57bc302 218 */
AnnaBridge 153:b484a57bc302 219 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 153:b484a57bc302 220 {
AnnaBridge 153:b484a57bc302 221 uint32_t result;
AnnaBridge 153:b484a57bc302 222
AnnaBridge 153:b484a57bc302 223 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 224 return(result);
AnnaBridge 153:b484a57bc302 225 }
AnnaBridge 153:b484a57bc302 226
AnnaBridge 153:b484a57bc302 227
AnnaBridge 153:b484a57bc302 228 /**
AnnaBridge 153:b484a57bc302 229 \brief Get Process Stack Pointer
AnnaBridge 153:b484a57bc302 230 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 231 \return PSP Register value
AnnaBridge 153:b484a57bc302 232 */
AnnaBridge 153:b484a57bc302 233 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 153:b484a57bc302 234 {
AnnaBridge 153:b484a57bc302 235 register uint32_t result;
AnnaBridge 153:b484a57bc302 236
AnnaBridge 153:b484a57bc302 237 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 238 return(result);
AnnaBridge 153:b484a57bc302 239 }
AnnaBridge 153:b484a57bc302 240
AnnaBridge 153:b484a57bc302 241
AnnaBridge 153:b484a57bc302 242 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 243 /**
AnnaBridge 153:b484a57bc302 244 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 245 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 246 \return PSP Register value
AnnaBridge 153:b484a57bc302 247 */
AnnaBridge 153:b484a57bc302 248 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 153:b484a57bc302 249 {
AnnaBridge 153:b484a57bc302 250 register uint32_t result;
AnnaBridge 153:b484a57bc302 251
AnnaBridge 153:b484a57bc302 252 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 253 return(result);
AnnaBridge 153:b484a57bc302 254 }
AnnaBridge 153:b484a57bc302 255 #endif
AnnaBridge 153:b484a57bc302 256
AnnaBridge 153:b484a57bc302 257
AnnaBridge 153:b484a57bc302 258 /**
AnnaBridge 153:b484a57bc302 259 \brief Set Process Stack Pointer
AnnaBridge 153:b484a57bc302 260 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 261 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 262 */
AnnaBridge 153:b484a57bc302 263 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 264 {
AnnaBridge 153:b484a57bc302 265 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 266 }
AnnaBridge 153:b484a57bc302 267
AnnaBridge 153:b484a57bc302 268
AnnaBridge 153:b484a57bc302 269 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 270 /**
AnnaBridge 153:b484a57bc302 271 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 272 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 273 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 274 */
AnnaBridge 153:b484a57bc302 275 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 276 {
AnnaBridge 153:b484a57bc302 277 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 278 }
AnnaBridge 153:b484a57bc302 279 #endif
AnnaBridge 153:b484a57bc302 280
AnnaBridge 153:b484a57bc302 281
AnnaBridge 153:b484a57bc302 282 /**
AnnaBridge 153:b484a57bc302 283 \brief Get Main Stack Pointer
AnnaBridge 153:b484a57bc302 284 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 285 \return MSP Register value
AnnaBridge 153:b484a57bc302 286 */
AnnaBridge 153:b484a57bc302 287 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 153:b484a57bc302 288 {
AnnaBridge 153:b484a57bc302 289 register uint32_t result;
AnnaBridge 153:b484a57bc302 290
AnnaBridge 153:b484a57bc302 291 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 292 return(result);
AnnaBridge 153:b484a57bc302 293 }
AnnaBridge 153:b484a57bc302 294
AnnaBridge 153:b484a57bc302 295
AnnaBridge 153:b484a57bc302 296 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 297 /**
AnnaBridge 153:b484a57bc302 298 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 299 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 300 \return MSP Register value
AnnaBridge 153:b484a57bc302 301 */
AnnaBridge 153:b484a57bc302 302 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 153:b484a57bc302 303 {
AnnaBridge 153:b484a57bc302 304 register uint32_t result;
AnnaBridge 153:b484a57bc302 305
AnnaBridge 153:b484a57bc302 306 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 307 return(result);
AnnaBridge 153:b484a57bc302 308 }
AnnaBridge 153:b484a57bc302 309 #endif
AnnaBridge 153:b484a57bc302 310
AnnaBridge 153:b484a57bc302 311
AnnaBridge 153:b484a57bc302 312 /**
AnnaBridge 153:b484a57bc302 313 \brief Set Main Stack Pointer
AnnaBridge 153:b484a57bc302 314 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 315 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 316 */
AnnaBridge 153:b484a57bc302 317 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 318 {
AnnaBridge 153:b484a57bc302 319 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 320 }
AnnaBridge 153:b484a57bc302 321
AnnaBridge 153:b484a57bc302 322
AnnaBridge 153:b484a57bc302 323 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 324 /**
AnnaBridge 153:b484a57bc302 325 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 326 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 327 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 328 */
AnnaBridge 153:b484a57bc302 329 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 330 {
AnnaBridge 153:b484a57bc302 331 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 332 }
AnnaBridge 153:b484a57bc302 333 #endif
AnnaBridge 153:b484a57bc302 334
AnnaBridge 153:b484a57bc302 335
AnnaBridge 153:b484a57bc302 336 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 337 /**
AnnaBridge 153:b484a57bc302 338 \brief Get Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 339 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 340 \return SP Register value
AnnaBridge 153:b484a57bc302 341 */
AnnaBridge 153:b484a57bc302 342 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 153:b484a57bc302 343 {
AnnaBridge 153:b484a57bc302 344 register uint32_t result;
AnnaBridge 153:b484a57bc302 345
AnnaBridge 153:b484a57bc302 346 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 347 return(result);
AnnaBridge 153:b484a57bc302 348 }
AnnaBridge 153:b484a57bc302 349
AnnaBridge 153:b484a57bc302 350
AnnaBridge 153:b484a57bc302 351 /**
AnnaBridge 153:b484a57bc302 352 \brief Set Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 353 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 354 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 153:b484a57bc302 355 */
AnnaBridge 153:b484a57bc302 356 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 153:b484a57bc302 357 {
AnnaBridge 153:b484a57bc302 358 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 153:b484a57bc302 359 }
AnnaBridge 153:b484a57bc302 360 #endif
AnnaBridge 153:b484a57bc302 361
AnnaBridge 153:b484a57bc302 362
AnnaBridge 153:b484a57bc302 363 /**
AnnaBridge 153:b484a57bc302 364 \brief Get Priority Mask
AnnaBridge 153:b484a57bc302 365 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 153:b484a57bc302 366 \return Priority Mask value
AnnaBridge 153:b484a57bc302 367 */
AnnaBridge 153:b484a57bc302 368 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 153:b484a57bc302 369 {
AnnaBridge 153:b484a57bc302 370 uint32_t result;
AnnaBridge 153:b484a57bc302 371
AnnaBridge 153:b484a57bc302 372 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 373 return(result);
AnnaBridge 153:b484a57bc302 374 }
AnnaBridge 153:b484a57bc302 375
AnnaBridge 153:b484a57bc302 376
AnnaBridge 153:b484a57bc302 377 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 378 /**
AnnaBridge 153:b484a57bc302 379 \brief Get Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 380 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 381 \return Priority Mask value
AnnaBridge 153:b484a57bc302 382 */
AnnaBridge 153:b484a57bc302 383 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 153:b484a57bc302 384 {
AnnaBridge 153:b484a57bc302 385 uint32_t result;
AnnaBridge 153:b484a57bc302 386
AnnaBridge 153:b484a57bc302 387 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 388 return(result);
AnnaBridge 153:b484a57bc302 389 }
AnnaBridge 153:b484a57bc302 390 #endif
AnnaBridge 153:b484a57bc302 391
AnnaBridge 153:b484a57bc302 392
AnnaBridge 153:b484a57bc302 393 /**
AnnaBridge 153:b484a57bc302 394 \brief Set Priority Mask
AnnaBridge 153:b484a57bc302 395 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 153:b484a57bc302 396 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 397 */
AnnaBridge 153:b484a57bc302 398 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 153:b484a57bc302 399 {
AnnaBridge 153:b484a57bc302 400 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 401 }
AnnaBridge 153:b484a57bc302 402
AnnaBridge 153:b484a57bc302 403
AnnaBridge 153:b484a57bc302 404 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 405 /**
AnnaBridge 153:b484a57bc302 406 \brief Set Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 407 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 408 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 409 */
AnnaBridge 153:b484a57bc302 410 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 153:b484a57bc302 411 {
AnnaBridge 153:b484a57bc302 412 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 413 }
AnnaBridge 153:b484a57bc302 414 #endif
AnnaBridge 153:b484a57bc302 415
AnnaBridge 153:b484a57bc302 416
AnnaBridge 153:b484a57bc302 417 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 418 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 419 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 420 /**
AnnaBridge 153:b484a57bc302 421 \brief Enable FIQ
AnnaBridge 153:b484a57bc302 422 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 423 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 424 */
AnnaBridge 153:b484a57bc302 425 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 153:b484a57bc302 426
AnnaBridge 153:b484a57bc302 427
AnnaBridge 153:b484a57bc302 428 /**
AnnaBridge 153:b484a57bc302 429 \brief Disable FIQ
AnnaBridge 153:b484a57bc302 430 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 431 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 432 */
AnnaBridge 153:b484a57bc302 433 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 153:b484a57bc302 434
AnnaBridge 153:b484a57bc302 435
AnnaBridge 153:b484a57bc302 436 /**
AnnaBridge 153:b484a57bc302 437 \brief Get Base Priority
AnnaBridge 153:b484a57bc302 438 \details Returns the current value of the Base Priority register.
AnnaBridge 153:b484a57bc302 439 \return Base Priority register value
AnnaBridge 153:b484a57bc302 440 */
AnnaBridge 153:b484a57bc302 441 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 153:b484a57bc302 442 {
AnnaBridge 153:b484a57bc302 443 uint32_t result;
AnnaBridge 153:b484a57bc302 444
AnnaBridge 153:b484a57bc302 445 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 153:b484a57bc302 446 return(result);
AnnaBridge 153:b484a57bc302 447 }
AnnaBridge 153:b484a57bc302 448
AnnaBridge 153:b484a57bc302 449
AnnaBridge 153:b484a57bc302 450 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 451 /**
AnnaBridge 153:b484a57bc302 452 \brief Get Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 453 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 454 \return Base Priority register value
AnnaBridge 153:b484a57bc302 455 */
AnnaBridge 153:b484a57bc302 456 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 153:b484a57bc302 457 {
AnnaBridge 153:b484a57bc302 458 uint32_t result;
AnnaBridge 153:b484a57bc302 459
AnnaBridge 153:b484a57bc302 460 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 461 return(result);
AnnaBridge 153:b484a57bc302 462 }
AnnaBridge 153:b484a57bc302 463 #endif
AnnaBridge 153:b484a57bc302 464
AnnaBridge 153:b484a57bc302 465
AnnaBridge 153:b484a57bc302 466 /**
AnnaBridge 153:b484a57bc302 467 \brief Set Base Priority
AnnaBridge 153:b484a57bc302 468 \details Assigns the given value to the Base Priority register.
AnnaBridge 153:b484a57bc302 469 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 470 */
AnnaBridge 153:b484a57bc302 471 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 153:b484a57bc302 472 {
AnnaBridge 153:b484a57bc302 473 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 474 }
AnnaBridge 153:b484a57bc302 475
AnnaBridge 153:b484a57bc302 476
AnnaBridge 153:b484a57bc302 477 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 478 /**
AnnaBridge 153:b484a57bc302 479 \brief Set Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 480 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 481 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 482 */
AnnaBridge 153:b484a57bc302 483 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 153:b484a57bc302 484 {
AnnaBridge 153:b484a57bc302 485 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 486 }
AnnaBridge 153:b484a57bc302 487 #endif
AnnaBridge 153:b484a57bc302 488
AnnaBridge 153:b484a57bc302 489
AnnaBridge 153:b484a57bc302 490 /**
AnnaBridge 153:b484a57bc302 491 \brief Set Base Priority with condition
AnnaBridge 153:b484a57bc302 492 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 153:b484a57bc302 493 or the new value increases the BASEPRI priority level.
AnnaBridge 153:b484a57bc302 494 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 495 */
AnnaBridge 153:b484a57bc302 496 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 153:b484a57bc302 497 {
AnnaBridge 153:b484a57bc302 498 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 499 }
AnnaBridge 153:b484a57bc302 500
AnnaBridge 153:b484a57bc302 501
AnnaBridge 153:b484a57bc302 502 /**
AnnaBridge 153:b484a57bc302 503 \brief Get Fault Mask
AnnaBridge 153:b484a57bc302 504 \details Returns the current value of the Fault Mask register.
AnnaBridge 153:b484a57bc302 505 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 506 */
AnnaBridge 153:b484a57bc302 507 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 153:b484a57bc302 508 {
AnnaBridge 153:b484a57bc302 509 uint32_t result;
AnnaBridge 153:b484a57bc302 510
AnnaBridge 153:b484a57bc302 511 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 512 return(result);
AnnaBridge 153:b484a57bc302 513 }
AnnaBridge 153:b484a57bc302 514
AnnaBridge 153:b484a57bc302 515
AnnaBridge 153:b484a57bc302 516 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 517 /**
AnnaBridge 153:b484a57bc302 518 \brief Get Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 519 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 520 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 521 */
AnnaBridge 153:b484a57bc302 522 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 153:b484a57bc302 523 {
AnnaBridge 153:b484a57bc302 524 uint32_t result;
AnnaBridge 153:b484a57bc302 525
AnnaBridge 153:b484a57bc302 526 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 527 return(result);
AnnaBridge 153:b484a57bc302 528 }
AnnaBridge 153:b484a57bc302 529 #endif
AnnaBridge 153:b484a57bc302 530
AnnaBridge 153:b484a57bc302 531
AnnaBridge 153:b484a57bc302 532 /**
AnnaBridge 153:b484a57bc302 533 \brief Set Fault Mask
AnnaBridge 153:b484a57bc302 534 \details Assigns the given value to the Fault Mask register.
AnnaBridge 153:b484a57bc302 535 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 536 */
AnnaBridge 153:b484a57bc302 537 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 538 {
AnnaBridge 153:b484a57bc302 539 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 540 }
AnnaBridge 153:b484a57bc302 541
AnnaBridge 153:b484a57bc302 542
AnnaBridge 153:b484a57bc302 543 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 544 /**
AnnaBridge 153:b484a57bc302 545 \brief Set Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 546 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 547 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 548 */
AnnaBridge 153:b484a57bc302 549 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 550 {
AnnaBridge 153:b484a57bc302 551 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 552 }
AnnaBridge 153:b484a57bc302 553 #endif
AnnaBridge 153:b484a57bc302 554
AnnaBridge 153:b484a57bc302 555 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 556 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 557 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 558
AnnaBridge 153:b484a57bc302 559
AnnaBridge 153:b484a57bc302 560 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 561 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 562
AnnaBridge 153:b484a57bc302 563 /**
AnnaBridge 153:b484a57bc302 564 \brief Get Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 565 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 566 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 567 */
AnnaBridge 153:b484a57bc302 568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 153:b484a57bc302 569 {
AnnaBridge 153:b484a57bc302 570 register uint32_t result;
AnnaBridge 153:b484a57bc302 571
AnnaBridge 153:b484a57bc302 572 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 573 return(result);
AnnaBridge 153:b484a57bc302 574 }
AnnaBridge 153:b484a57bc302 575
AnnaBridge 153:b484a57bc302 576
AnnaBridge 153:b484a57bc302 577 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 578 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 579 /**
AnnaBridge 153:b484a57bc302 580 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 581 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 582 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 583 */
AnnaBridge 153:b484a57bc302 584 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 585 {
AnnaBridge 153:b484a57bc302 586 register uint32_t result;
AnnaBridge 153:b484a57bc302 587
AnnaBridge 153:b484a57bc302 588 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 589 return(result);
AnnaBridge 153:b484a57bc302 590 }
AnnaBridge 153:b484a57bc302 591 #endif
AnnaBridge 153:b484a57bc302 592
AnnaBridge 153:b484a57bc302 593
AnnaBridge 153:b484a57bc302 594 /**
AnnaBridge 153:b484a57bc302 595 \brief Set Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 596 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 597 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 598 */
AnnaBridge 153:b484a57bc302 599 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 600 {
AnnaBridge 153:b484a57bc302 601 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 602 }
AnnaBridge 153:b484a57bc302 603
AnnaBridge 153:b484a57bc302 604
AnnaBridge 153:b484a57bc302 605 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 606 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 607 /**
AnnaBridge 153:b484a57bc302 608 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 609 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 610 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 611 */
AnnaBridge 153:b484a57bc302 612 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 613 {
AnnaBridge 153:b484a57bc302 614 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 615 }
AnnaBridge 153:b484a57bc302 616 #endif
AnnaBridge 153:b484a57bc302 617
AnnaBridge 153:b484a57bc302 618
AnnaBridge 153:b484a57bc302 619 /**
AnnaBridge 153:b484a57bc302 620 \brief Get Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 621 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 622 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 623 */
AnnaBridge 153:b484a57bc302 624 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 153:b484a57bc302 625 {
AnnaBridge 153:b484a57bc302 626 register uint32_t result;
AnnaBridge 153:b484a57bc302 627
AnnaBridge 153:b484a57bc302 628 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 629
AnnaBridge 153:b484a57bc302 630 return(result);
AnnaBridge 153:b484a57bc302 631 }
AnnaBridge 153:b484a57bc302 632
AnnaBridge 153:b484a57bc302 633
AnnaBridge 153:b484a57bc302 634 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 635 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 636 /**
AnnaBridge 153:b484a57bc302 637 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 638 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 639 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 640 */
AnnaBridge 153:b484a57bc302 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 642 {
AnnaBridge 153:b484a57bc302 643 register uint32_t result;
AnnaBridge 153:b484a57bc302 644
AnnaBridge 153:b484a57bc302 645 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 646 return(result);
AnnaBridge 153:b484a57bc302 647 }
AnnaBridge 153:b484a57bc302 648 #endif
AnnaBridge 153:b484a57bc302 649
AnnaBridge 153:b484a57bc302 650
AnnaBridge 153:b484a57bc302 651 /**
AnnaBridge 153:b484a57bc302 652 \brief Set Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 653 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 654 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 655 */
AnnaBridge 153:b484a57bc302 656 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 657 {
AnnaBridge 153:b484a57bc302 658 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 659 }
AnnaBridge 153:b484a57bc302 660
AnnaBridge 153:b484a57bc302 661
AnnaBridge 153:b484a57bc302 662 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 663 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 664 /**
AnnaBridge 153:b484a57bc302 665 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 666 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 667 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 668 */
AnnaBridge 153:b484a57bc302 669 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 670 {
AnnaBridge 153:b484a57bc302 671 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 672 }
AnnaBridge 153:b484a57bc302 673 #endif
AnnaBridge 153:b484a57bc302 674
AnnaBridge 153:b484a57bc302 675 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 676 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 677
AnnaBridge 153:b484a57bc302 678
AnnaBridge 153:b484a57bc302 679 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 680 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 681
AnnaBridge 153:b484a57bc302 682 /**
AnnaBridge 153:b484a57bc302 683 \brief Get FPSCR
AnnaBridge 153:b484a57bc302 684 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 685 \return Floating Point Status/Control register value
AnnaBridge 153:b484a57bc302 686 */
AnnaBridge 153:b484a57bc302 687 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 688 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 689 #define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
AnnaBridge 153:b484a57bc302 690 #else
Anna Bridge 160:5571c4ff569f 691 #define __get_FPSCR() ((uint32_t)0U)
AnnaBridge 153:b484a57bc302 692 #endif
AnnaBridge 153:b484a57bc302 693
AnnaBridge 153:b484a57bc302 694 /**
AnnaBridge 153:b484a57bc302 695 \brief Set FPSCR
AnnaBridge 153:b484a57bc302 696 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 697 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 153:b484a57bc302 698 */
AnnaBridge 153:b484a57bc302 699 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 700 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 701 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 153:b484a57bc302 702 #else
Anna Bridge 160:5571c4ff569f 703 #define __set_FPSCR(x) ((void)(x))
AnnaBridge 153:b484a57bc302 704 #endif
AnnaBridge 153:b484a57bc302 705
AnnaBridge 153:b484a57bc302 706 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 707 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 708
AnnaBridge 153:b484a57bc302 709
AnnaBridge 153:b484a57bc302 710
AnnaBridge 153:b484a57bc302 711 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 153:b484a57bc302 712
AnnaBridge 153:b484a57bc302 713
AnnaBridge 153:b484a57bc302 714 /* ########################## Core Instruction Access ######################### */
AnnaBridge 153:b484a57bc302 715 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 153:b484a57bc302 716 Access to dedicated instructions
AnnaBridge 153:b484a57bc302 717 @{
AnnaBridge 153:b484a57bc302 718 */
AnnaBridge 153:b484a57bc302 719
AnnaBridge 153:b484a57bc302 720 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 153:b484a57bc302 721 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 153:b484a57bc302 722 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 153:b484a57bc302 723 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 153:b484a57bc302 724 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 153:b484a57bc302 725 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 153:b484a57bc302 726 #else
AnnaBridge 153:b484a57bc302 727 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 153:b484a57bc302 728 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 153:b484a57bc302 729 #endif
AnnaBridge 153:b484a57bc302 730
AnnaBridge 153:b484a57bc302 731 /**
AnnaBridge 153:b484a57bc302 732 \brief No Operation
AnnaBridge 153:b484a57bc302 733 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 153:b484a57bc302 734 */
AnnaBridge 153:b484a57bc302 735 #define __NOP __builtin_arm_nop
AnnaBridge 153:b484a57bc302 736
AnnaBridge 153:b484a57bc302 737 /**
AnnaBridge 153:b484a57bc302 738 \brief Wait For Interrupt
AnnaBridge 153:b484a57bc302 739 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 740 */
AnnaBridge 153:b484a57bc302 741 #define __WFI __builtin_arm_wfi
AnnaBridge 153:b484a57bc302 742
AnnaBridge 153:b484a57bc302 743
AnnaBridge 153:b484a57bc302 744 /**
AnnaBridge 153:b484a57bc302 745 \brief Wait For Event
AnnaBridge 153:b484a57bc302 746 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 153:b484a57bc302 747 a low-power state until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 748 */
AnnaBridge 153:b484a57bc302 749 #define __WFE __builtin_arm_wfe
AnnaBridge 153:b484a57bc302 750
AnnaBridge 153:b484a57bc302 751
AnnaBridge 153:b484a57bc302 752 /**
AnnaBridge 153:b484a57bc302 753 \brief Send Event
AnnaBridge 153:b484a57bc302 754 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 153:b484a57bc302 755 */
AnnaBridge 153:b484a57bc302 756 #define __SEV __builtin_arm_sev
AnnaBridge 153:b484a57bc302 757
AnnaBridge 153:b484a57bc302 758
AnnaBridge 153:b484a57bc302 759 /**
AnnaBridge 153:b484a57bc302 760 \brief Instruction Synchronization Barrier
AnnaBridge 153:b484a57bc302 761 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 153:b484a57bc302 762 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 153:b484a57bc302 763 after the instruction has been completed.
AnnaBridge 153:b484a57bc302 764 */
AnnaBridge 153:b484a57bc302 765 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 153:b484a57bc302 766
AnnaBridge 153:b484a57bc302 767 /**
AnnaBridge 153:b484a57bc302 768 \brief Data Synchronization Barrier
AnnaBridge 153:b484a57bc302 769 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 153:b484a57bc302 770 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 153:b484a57bc302 771 */
AnnaBridge 153:b484a57bc302 772 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 153:b484a57bc302 773
AnnaBridge 153:b484a57bc302 774
AnnaBridge 153:b484a57bc302 775 /**
AnnaBridge 153:b484a57bc302 776 \brief Data Memory Barrier
AnnaBridge 153:b484a57bc302 777 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 153:b484a57bc302 778 and after the instruction, without ensuring their completion.
AnnaBridge 153:b484a57bc302 779 */
AnnaBridge 153:b484a57bc302 780 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 153:b484a57bc302 781
AnnaBridge 153:b484a57bc302 782
AnnaBridge 153:b484a57bc302 783 /**
AnnaBridge 153:b484a57bc302 784 \brief Reverse byte order (32 bit)
AnnaBridge 153:b484a57bc302 785 \details Reverses the byte order in integer value.
AnnaBridge 153:b484a57bc302 786 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 787 \return Reversed value
AnnaBridge 153:b484a57bc302 788 */
Anna Bridge 160:5571c4ff569f 789 #define __REV (uint32_t)__builtin_bswap32
AnnaBridge 153:b484a57bc302 790
AnnaBridge 153:b484a57bc302 791
AnnaBridge 153:b484a57bc302 792 /**
AnnaBridge 153:b484a57bc302 793 \brief Reverse byte order (16 bit)
AnnaBridge 153:b484a57bc302 794 \details Reverses the byte order in two unsigned short values.
AnnaBridge 153:b484a57bc302 795 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 796 \return Reversed value
AnnaBridge 153:b484a57bc302 797 */
Anna Bridge 160:5571c4ff569f 798 #define __REV16 (uint16_t)__builtin_bswap16
AnnaBridge 153:b484a57bc302 799
AnnaBridge 153:b484a57bc302 800
AnnaBridge 153:b484a57bc302 801 /**
AnnaBridge 153:b484a57bc302 802 \brief Reverse byte order in signed short value
AnnaBridge 153:b484a57bc302 803 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 153:b484a57bc302 804 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 805 \return Reversed value
AnnaBridge 153:b484a57bc302 806 */
Anna Bridge 160:5571c4ff569f 807 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 153:b484a57bc302 808 {
Anna Bridge 160:5571c4ff569f 809 int16_t result;
AnnaBridge 153:b484a57bc302 810
AnnaBridge 153:b484a57bc302 811 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge 160:5571c4ff569f 812
Anna Bridge 160:5571c4ff569f 813 return result;
AnnaBridge 153:b484a57bc302 814 }
AnnaBridge 153:b484a57bc302 815
AnnaBridge 153:b484a57bc302 816
AnnaBridge 153:b484a57bc302 817 /**
AnnaBridge 153:b484a57bc302 818 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 153:b484a57bc302 819 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 153:b484a57bc302 820 \param [in] op1 Value to rotate
AnnaBridge 153:b484a57bc302 821 \param [in] op2 Number of Bits to rotate
AnnaBridge 153:b484a57bc302 822 \return Rotated value
AnnaBridge 153:b484a57bc302 823 */
AnnaBridge 153:b484a57bc302 824 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 825 {
AnnaBridge 153:b484a57bc302 826 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 153:b484a57bc302 827 }
AnnaBridge 153:b484a57bc302 828
AnnaBridge 153:b484a57bc302 829
AnnaBridge 153:b484a57bc302 830 /**
AnnaBridge 153:b484a57bc302 831 \brief Breakpoint
AnnaBridge 153:b484a57bc302 832 \details Causes the processor to enter Debug state.
AnnaBridge 153:b484a57bc302 833 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 153:b484a57bc302 834 \param [in] value is ignored by the processor.
AnnaBridge 153:b484a57bc302 835 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 153:b484a57bc302 836 */
Anna Bridge 160:5571c4ff569f 837 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 153:b484a57bc302 838
AnnaBridge 153:b484a57bc302 839
AnnaBridge 153:b484a57bc302 840 /**
AnnaBridge 153:b484a57bc302 841 \brief Reverse bit order of value
AnnaBridge 153:b484a57bc302 842 \details Reverses the bit order of the given value.
AnnaBridge 153:b484a57bc302 843 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 844 \return Reversed value
AnnaBridge 153:b484a57bc302 845 */
Anna Bridge 160:5571c4ff569f 846 #define __RBIT (uint32_t)__builtin_arm_rbit
AnnaBridge 153:b484a57bc302 847
AnnaBridge 153:b484a57bc302 848 /**
AnnaBridge 153:b484a57bc302 849 \brief Count leading zeros
AnnaBridge 153:b484a57bc302 850 \details Counts the number of leading zeros of a data value.
AnnaBridge 153:b484a57bc302 851 \param [in] value Value to count the leading zeros
AnnaBridge 153:b484a57bc302 852 \return number of leading zeros in value
AnnaBridge 153:b484a57bc302 853 */
AnnaBridge 153:b484a57bc302 854 #define __CLZ __builtin_clz
AnnaBridge 153:b484a57bc302 855
AnnaBridge 153:b484a57bc302 856
AnnaBridge 153:b484a57bc302 857 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 858 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 859 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 860 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 861 /**
AnnaBridge 153:b484a57bc302 862 \brief LDR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 863 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 864 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 865 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 866 */
AnnaBridge 153:b484a57bc302 867 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 868
AnnaBridge 153:b484a57bc302 869
AnnaBridge 153:b484a57bc302 870 /**
AnnaBridge 153:b484a57bc302 871 \brief LDR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 872 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 873 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 874 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 875 */
AnnaBridge 153:b484a57bc302 876 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 877
AnnaBridge 153:b484a57bc302 878
AnnaBridge 153:b484a57bc302 879 /**
AnnaBridge 153:b484a57bc302 880 \brief LDR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 881 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 882 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 883 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 884 */
AnnaBridge 153:b484a57bc302 885 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 886
AnnaBridge 153:b484a57bc302 887
AnnaBridge 153:b484a57bc302 888 /**
AnnaBridge 153:b484a57bc302 889 \brief STR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 890 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 891 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 892 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 893 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 894 \return 1 Function failed
AnnaBridge 153:b484a57bc302 895 */
AnnaBridge 153:b484a57bc302 896 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 897
AnnaBridge 153:b484a57bc302 898
AnnaBridge 153:b484a57bc302 899 /**
AnnaBridge 153:b484a57bc302 900 \brief STR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 901 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 902 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 903 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 904 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 905 \return 1 Function failed
AnnaBridge 153:b484a57bc302 906 */
AnnaBridge 153:b484a57bc302 907 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 908
AnnaBridge 153:b484a57bc302 909
AnnaBridge 153:b484a57bc302 910 /**
AnnaBridge 153:b484a57bc302 911 \brief STR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 912 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 913 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 914 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 915 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 916 \return 1 Function failed
AnnaBridge 153:b484a57bc302 917 */
AnnaBridge 153:b484a57bc302 918 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 919
AnnaBridge 153:b484a57bc302 920
AnnaBridge 153:b484a57bc302 921 /**
AnnaBridge 153:b484a57bc302 922 \brief Remove the exclusive lock
AnnaBridge 153:b484a57bc302 923 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 153:b484a57bc302 924 */
AnnaBridge 153:b484a57bc302 925 #define __CLREX __builtin_arm_clrex
AnnaBridge 153:b484a57bc302 926
AnnaBridge 153:b484a57bc302 927 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 928 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 929 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 930 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 931
AnnaBridge 153:b484a57bc302 932
AnnaBridge 153:b484a57bc302 933 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 934 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 935 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Anna Bridge 160:5571c4ff569f 936
AnnaBridge 153:b484a57bc302 937 /**
AnnaBridge 153:b484a57bc302 938 \brief Signed Saturate
AnnaBridge 153:b484a57bc302 939 \details Saturates a signed value.
AnnaBridge 153:b484a57bc302 940 \param [in] value Value to be saturated
AnnaBridge 153:b484a57bc302 941 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 153:b484a57bc302 942 \return Saturated value
AnnaBridge 153:b484a57bc302 943 */
AnnaBridge 153:b484a57bc302 944 #define __SSAT __builtin_arm_ssat
AnnaBridge 153:b484a57bc302 945
AnnaBridge 153:b484a57bc302 946
AnnaBridge 153:b484a57bc302 947 /**
AnnaBridge 153:b484a57bc302 948 \brief Unsigned Saturate
AnnaBridge 153:b484a57bc302 949 \details Saturates an unsigned value.
AnnaBridge 153:b484a57bc302 950 \param [in] value Value to be saturated
AnnaBridge 153:b484a57bc302 951 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 153:b484a57bc302 952 \return Saturated value
AnnaBridge 153:b484a57bc302 953 */
AnnaBridge 153:b484a57bc302 954 #define __USAT __builtin_arm_usat
AnnaBridge 153:b484a57bc302 955
AnnaBridge 153:b484a57bc302 956
AnnaBridge 153:b484a57bc302 957 /**
AnnaBridge 153:b484a57bc302 958 \brief Rotate Right with Extend (32 bit)
AnnaBridge 153:b484a57bc302 959 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 153:b484a57bc302 960 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 153:b484a57bc302 961 \param [in] value Value to rotate
AnnaBridge 153:b484a57bc302 962 \return Rotated value
AnnaBridge 153:b484a57bc302 963 */
AnnaBridge 153:b484a57bc302 964 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 153:b484a57bc302 965 {
AnnaBridge 153:b484a57bc302 966 uint32_t result;
AnnaBridge 153:b484a57bc302 967
AnnaBridge 153:b484a57bc302 968 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 969 return(result);
AnnaBridge 153:b484a57bc302 970 }
AnnaBridge 153:b484a57bc302 971
AnnaBridge 153:b484a57bc302 972
AnnaBridge 153:b484a57bc302 973 /**
AnnaBridge 153:b484a57bc302 974 \brief LDRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 975 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 976 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 977 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 978 */
AnnaBridge 153:b484a57bc302 979 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 980 {
AnnaBridge 153:b484a57bc302 981 uint32_t result;
AnnaBridge 153:b484a57bc302 982
AnnaBridge 153:b484a57bc302 983 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 984 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 985 }
AnnaBridge 153:b484a57bc302 986
AnnaBridge 153:b484a57bc302 987
AnnaBridge 153:b484a57bc302 988 /**
AnnaBridge 153:b484a57bc302 989 \brief LDRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 990 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 991 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 992 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 993 */
AnnaBridge 153:b484a57bc302 994 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 995 {
AnnaBridge 153:b484a57bc302 996 uint32_t result;
AnnaBridge 153:b484a57bc302 997
AnnaBridge 153:b484a57bc302 998 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 999 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1000 }
AnnaBridge 153:b484a57bc302 1001
AnnaBridge 153:b484a57bc302 1002
AnnaBridge 153:b484a57bc302 1003 /**
AnnaBridge 153:b484a57bc302 1004 \brief LDRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1005 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1006 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1007 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1008 */
AnnaBridge 153:b484a57bc302 1009 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1010 {
AnnaBridge 153:b484a57bc302 1011 uint32_t result;
AnnaBridge 153:b484a57bc302 1012
AnnaBridge 153:b484a57bc302 1013 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1014 return(result);
AnnaBridge 153:b484a57bc302 1015 }
AnnaBridge 153:b484a57bc302 1016
AnnaBridge 153:b484a57bc302 1017
AnnaBridge 153:b484a57bc302 1018 /**
AnnaBridge 153:b484a57bc302 1019 \brief STRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 1020 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1021 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1022 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1023 */
AnnaBridge 153:b484a57bc302 1024 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1025 {
AnnaBridge 153:b484a57bc302 1026 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1027 }
AnnaBridge 153:b484a57bc302 1028
AnnaBridge 153:b484a57bc302 1029
AnnaBridge 153:b484a57bc302 1030 /**
AnnaBridge 153:b484a57bc302 1031 \brief STRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 1032 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1033 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1034 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1035 */
AnnaBridge 153:b484a57bc302 1036 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1037 {
AnnaBridge 153:b484a57bc302 1038 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1039 }
AnnaBridge 153:b484a57bc302 1040
AnnaBridge 153:b484a57bc302 1041
AnnaBridge 153:b484a57bc302 1042 /**
AnnaBridge 153:b484a57bc302 1043 \brief STRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1044 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1045 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1046 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1047 */
AnnaBridge 153:b484a57bc302 1048 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1049 {
AnnaBridge 153:b484a57bc302 1050 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 153:b484a57bc302 1051 }
AnnaBridge 153:b484a57bc302 1052
Anna Bridge 160:5571c4ff569f 1053 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1054 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1055 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge 160:5571c4ff569f 1056
Anna Bridge 160:5571c4ff569f 1057 /**
Anna Bridge 160:5571c4ff569f 1058 \brief Signed Saturate
Anna Bridge 160:5571c4ff569f 1059 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1060 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1061 \param [in] sat Bit position to saturate to (1..32)
Anna Bridge 160:5571c4ff569f 1062 \return Saturated value
Anna Bridge 160:5571c4ff569f 1063 */
Anna Bridge 160:5571c4ff569f 1064 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1065 {
Anna Bridge 160:5571c4ff569f 1066 if ((sat >= 1U) && (sat <= 32U)) {
Anna Bridge 160:5571c4ff569f 1067 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge 160:5571c4ff569f 1068 const int32_t min = -1 - max ;
Anna Bridge 160:5571c4ff569f 1069 if (val > max) {
Anna Bridge 160:5571c4ff569f 1070 return max;
Anna Bridge 160:5571c4ff569f 1071 } else if (val < min) {
Anna Bridge 160:5571c4ff569f 1072 return min;
Anna Bridge 160:5571c4ff569f 1073 }
Anna Bridge 160:5571c4ff569f 1074 }
Anna Bridge 160:5571c4ff569f 1075 return val;
Anna Bridge 160:5571c4ff569f 1076 }
Anna Bridge 160:5571c4ff569f 1077
Anna Bridge 160:5571c4ff569f 1078 /**
Anna Bridge 160:5571c4ff569f 1079 \brief Unsigned Saturate
Anna Bridge 160:5571c4ff569f 1080 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1081 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1082 \param [in] sat Bit position to saturate to (0..31)
Anna Bridge 160:5571c4ff569f 1083 \return Saturated value
Anna Bridge 160:5571c4ff569f 1084 */
Anna Bridge 160:5571c4ff569f 1085 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1086 {
Anna Bridge 160:5571c4ff569f 1087 if (sat <= 31U) {
Anna Bridge 160:5571c4ff569f 1088 const uint32_t max = ((1U << sat) - 1U);
Anna Bridge 160:5571c4ff569f 1089 if (val > (int32_t)max) {
Anna Bridge 160:5571c4ff569f 1090 return max;
Anna Bridge 160:5571c4ff569f 1091 } else if (val < 0) {
Anna Bridge 160:5571c4ff569f 1092 return 0U;
Anna Bridge 160:5571c4ff569f 1093 }
Anna Bridge 160:5571c4ff569f 1094 }
Anna Bridge 160:5571c4ff569f 1095 return (uint32_t)val;
Anna Bridge 160:5571c4ff569f 1096 }
Anna Bridge 160:5571c4ff569f 1097
AnnaBridge 153:b484a57bc302 1098 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 1099 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 1100 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1101
AnnaBridge 153:b484a57bc302 1102
AnnaBridge 153:b484a57bc302 1103 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1104 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 1105 /**
AnnaBridge 153:b484a57bc302 1106 \brief Load-Acquire (8 bit)
AnnaBridge 153:b484a57bc302 1107 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1108 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1109 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1110 */
AnnaBridge 153:b484a57bc302 1111 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1112 {
AnnaBridge 153:b484a57bc302 1113 uint32_t result;
AnnaBridge 153:b484a57bc302 1114
AnnaBridge 153:b484a57bc302 1115 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1116 return ((uint8_t) result);
AnnaBridge 153:b484a57bc302 1117 }
AnnaBridge 153:b484a57bc302 1118
AnnaBridge 153:b484a57bc302 1119
AnnaBridge 153:b484a57bc302 1120 /**
AnnaBridge 153:b484a57bc302 1121 \brief Load-Acquire (16 bit)
AnnaBridge 153:b484a57bc302 1122 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1123 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1124 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1125 */
AnnaBridge 153:b484a57bc302 1126 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1127 {
AnnaBridge 153:b484a57bc302 1128 uint32_t result;
AnnaBridge 153:b484a57bc302 1129
AnnaBridge 153:b484a57bc302 1130 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1131 return ((uint16_t) result);
AnnaBridge 153:b484a57bc302 1132 }
AnnaBridge 153:b484a57bc302 1133
AnnaBridge 153:b484a57bc302 1134
AnnaBridge 153:b484a57bc302 1135 /**
AnnaBridge 153:b484a57bc302 1136 \brief Load-Acquire (32 bit)
AnnaBridge 153:b484a57bc302 1137 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1138 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1139 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1140 */
AnnaBridge 153:b484a57bc302 1141 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1142 {
AnnaBridge 153:b484a57bc302 1143 uint32_t result;
AnnaBridge 153:b484a57bc302 1144
AnnaBridge 153:b484a57bc302 1145 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1146 return(result);
AnnaBridge 153:b484a57bc302 1147 }
AnnaBridge 153:b484a57bc302 1148
AnnaBridge 153:b484a57bc302 1149
AnnaBridge 153:b484a57bc302 1150 /**
AnnaBridge 153:b484a57bc302 1151 \brief Store-Release (8 bit)
AnnaBridge 153:b484a57bc302 1152 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1153 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1154 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1155 */
AnnaBridge 153:b484a57bc302 1156 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1157 {
AnnaBridge 153:b484a57bc302 1158 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1159 }
AnnaBridge 153:b484a57bc302 1160
AnnaBridge 153:b484a57bc302 1161
AnnaBridge 153:b484a57bc302 1162 /**
AnnaBridge 153:b484a57bc302 1163 \brief Store-Release (16 bit)
AnnaBridge 153:b484a57bc302 1164 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1165 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1166 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1167 */
AnnaBridge 153:b484a57bc302 1168 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1169 {
AnnaBridge 153:b484a57bc302 1170 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1171 }
AnnaBridge 153:b484a57bc302 1172
AnnaBridge 153:b484a57bc302 1173
AnnaBridge 153:b484a57bc302 1174 /**
AnnaBridge 153:b484a57bc302 1175 \brief Store-Release (32 bit)
AnnaBridge 153:b484a57bc302 1176 \details Executes a STL instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1177 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1178 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1179 */
AnnaBridge 153:b484a57bc302 1180 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1181 {
AnnaBridge 153:b484a57bc302 1182 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1183 }
AnnaBridge 153:b484a57bc302 1184
AnnaBridge 153:b484a57bc302 1185
AnnaBridge 153:b484a57bc302 1186 /**
AnnaBridge 153:b484a57bc302 1187 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1188 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1189 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1190 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1191 */
AnnaBridge 153:b484a57bc302 1192 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1193
AnnaBridge 153:b484a57bc302 1194
AnnaBridge 153:b484a57bc302 1195 /**
AnnaBridge 153:b484a57bc302 1196 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1197 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1198 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1199 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1200 */
AnnaBridge 153:b484a57bc302 1201 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1202
AnnaBridge 153:b484a57bc302 1203
AnnaBridge 153:b484a57bc302 1204 /**
AnnaBridge 153:b484a57bc302 1205 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1206 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1207 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1208 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1209 */
AnnaBridge 153:b484a57bc302 1210 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1211
AnnaBridge 153:b484a57bc302 1212
AnnaBridge 153:b484a57bc302 1213 /**
AnnaBridge 153:b484a57bc302 1214 \brief Store-Release Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1215 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1216 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1217 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1218 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1219 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1220 */
AnnaBridge 153:b484a57bc302 1221 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1222
AnnaBridge 153:b484a57bc302 1223
AnnaBridge 153:b484a57bc302 1224 /**
AnnaBridge 153:b484a57bc302 1225 \brief Store-Release Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1226 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1227 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1228 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1229 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1230 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1231 */
AnnaBridge 153:b484a57bc302 1232 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1233
AnnaBridge 153:b484a57bc302 1234
AnnaBridge 153:b484a57bc302 1235 /**
AnnaBridge 153:b484a57bc302 1236 \brief Store-Release Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1237 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1238 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1239 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1240 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1241 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1242 */
AnnaBridge 153:b484a57bc302 1243 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1244
AnnaBridge 153:b484a57bc302 1245 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1246 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1247
AnnaBridge 153:b484a57bc302 1248 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 153:b484a57bc302 1249
AnnaBridge 153:b484a57bc302 1250
AnnaBridge 153:b484a57bc302 1251 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 153:b484a57bc302 1252 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 153:b484a57bc302 1253 Access to dedicated SIMD instructions
AnnaBridge 153:b484a57bc302 1254 @{
AnnaBridge 153:b484a57bc302 1255 */
AnnaBridge 153:b484a57bc302 1256
AnnaBridge 153:b484a57bc302 1257 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 153:b484a57bc302 1258
AnnaBridge 153:b484a57bc302 1259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1260 {
AnnaBridge 153:b484a57bc302 1261 uint32_t result;
AnnaBridge 153:b484a57bc302 1262
AnnaBridge 153:b484a57bc302 1263 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1264 return(result);
AnnaBridge 153:b484a57bc302 1265 }
AnnaBridge 153:b484a57bc302 1266
AnnaBridge 153:b484a57bc302 1267 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1268 {
AnnaBridge 153:b484a57bc302 1269 uint32_t result;
AnnaBridge 153:b484a57bc302 1270
AnnaBridge 153:b484a57bc302 1271 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1272 return(result);
AnnaBridge 153:b484a57bc302 1273 }
AnnaBridge 153:b484a57bc302 1274
AnnaBridge 153:b484a57bc302 1275 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1276 {
AnnaBridge 153:b484a57bc302 1277 uint32_t result;
AnnaBridge 153:b484a57bc302 1278
AnnaBridge 153:b484a57bc302 1279 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1280 return(result);
AnnaBridge 153:b484a57bc302 1281 }
AnnaBridge 153:b484a57bc302 1282
AnnaBridge 153:b484a57bc302 1283 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1284 {
AnnaBridge 153:b484a57bc302 1285 uint32_t result;
AnnaBridge 153:b484a57bc302 1286
AnnaBridge 153:b484a57bc302 1287 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1288 return(result);
AnnaBridge 153:b484a57bc302 1289 }
AnnaBridge 153:b484a57bc302 1290
AnnaBridge 153:b484a57bc302 1291 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1292 {
AnnaBridge 153:b484a57bc302 1293 uint32_t result;
AnnaBridge 153:b484a57bc302 1294
AnnaBridge 153:b484a57bc302 1295 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1296 return(result);
AnnaBridge 153:b484a57bc302 1297 }
AnnaBridge 153:b484a57bc302 1298
AnnaBridge 153:b484a57bc302 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1300 {
AnnaBridge 153:b484a57bc302 1301 uint32_t result;
AnnaBridge 153:b484a57bc302 1302
AnnaBridge 153:b484a57bc302 1303 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1304 return(result);
AnnaBridge 153:b484a57bc302 1305 }
AnnaBridge 153:b484a57bc302 1306
AnnaBridge 153:b484a57bc302 1307
AnnaBridge 153:b484a57bc302 1308 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1309 {
AnnaBridge 153:b484a57bc302 1310 uint32_t result;
AnnaBridge 153:b484a57bc302 1311
AnnaBridge 153:b484a57bc302 1312 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1313 return(result);
AnnaBridge 153:b484a57bc302 1314 }
AnnaBridge 153:b484a57bc302 1315
AnnaBridge 153:b484a57bc302 1316 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1317 {
AnnaBridge 153:b484a57bc302 1318 uint32_t result;
AnnaBridge 153:b484a57bc302 1319
AnnaBridge 153:b484a57bc302 1320 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1321 return(result);
AnnaBridge 153:b484a57bc302 1322 }
AnnaBridge 153:b484a57bc302 1323
AnnaBridge 153:b484a57bc302 1324 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1325 {
AnnaBridge 153:b484a57bc302 1326 uint32_t result;
AnnaBridge 153:b484a57bc302 1327
AnnaBridge 153:b484a57bc302 1328 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1329 return(result);
AnnaBridge 153:b484a57bc302 1330 }
AnnaBridge 153:b484a57bc302 1331
AnnaBridge 153:b484a57bc302 1332 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1333 {
AnnaBridge 153:b484a57bc302 1334 uint32_t result;
AnnaBridge 153:b484a57bc302 1335
AnnaBridge 153:b484a57bc302 1336 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1337 return(result);
AnnaBridge 153:b484a57bc302 1338 }
AnnaBridge 153:b484a57bc302 1339
AnnaBridge 153:b484a57bc302 1340 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1341 {
AnnaBridge 153:b484a57bc302 1342 uint32_t result;
AnnaBridge 153:b484a57bc302 1343
AnnaBridge 153:b484a57bc302 1344 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1345 return(result);
AnnaBridge 153:b484a57bc302 1346 }
AnnaBridge 153:b484a57bc302 1347
AnnaBridge 153:b484a57bc302 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1349 {
AnnaBridge 153:b484a57bc302 1350 uint32_t result;
AnnaBridge 153:b484a57bc302 1351
AnnaBridge 153:b484a57bc302 1352 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1353 return(result);
AnnaBridge 153:b484a57bc302 1354 }
AnnaBridge 153:b484a57bc302 1355
AnnaBridge 153:b484a57bc302 1356
AnnaBridge 153:b484a57bc302 1357 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1358 {
AnnaBridge 153:b484a57bc302 1359 uint32_t result;
AnnaBridge 153:b484a57bc302 1360
AnnaBridge 153:b484a57bc302 1361 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1362 return(result);
AnnaBridge 153:b484a57bc302 1363 }
AnnaBridge 153:b484a57bc302 1364
AnnaBridge 153:b484a57bc302 1365 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1366 {
AnnaBridge 153:b484a57bc302 1367 uint32_t result;
AnnaBridge 153:b484a57bc302 1368
AnnaBridge 153:b484a57bc302 1369 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1370 return(result);
AnnaBridge 153:b484a57bc302 1371 }
AnnaBridge 153:b484a57bc302 1372
AnnaBridge 153:b484a57bc302 1373 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1374 {
AnnaBridge 153:b484a57bc302 1375 uint32_t result;
AnnaBridge 153:b484a57bc302 1376
AnnaBridge 153:b484a57bc302 1377 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1378 return(result);
AnnaBridge 153:b484a57bc302 1379 }
AnnaBridge 153:b484a57bc302 1380
AnnaBridge 153:b484a57bc302 1381 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1382 {
AnnaBridge 153:b484a57bc302 1383 uint32_t result;
AnnaBridge 153:b484a57bc302 1384
AnnaBridge 153:b484a57bc302 1385 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1386 return(result);
AnnaBridge 153:b484a57bc302 1387 }
AnnaBridge 153:b484a57bc302 1388
AnnaBridge 153:b484a57bc302 1389 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1390 {
AnnaBridge 153:b484a57bc302 1391 uint32_t result;
AnnaBridge 153:b484a57bc302 1392
AnnaBridge 153:b484a57bc302 1393 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1394 return(result);
AnnaBridge 153:b484a57bc302 1395 }
AnnaBridge 153:b484a57bc302 1396
AnnaBridge 153:b484a57bc302 1397 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1398 {
AnnaBridge 153:b484a57bc302 1399 uint32_t result;
AnnaBridge 153:b484a57bc302 1400
AnnaBridge 153:b484a57bc302 1401 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1402 return(result);
AnnaBridge 153:b484a57bc302 1403 }
AnnaBridge 153:b484a57bc302 1404
AnnaBridge 153:b484a57bc302 1405 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1406 {
AnnaBridge 153:b484a57bc302 1407 uint32_t result;
AnnaBridge 153:b484a57bc302 1408
AnnaBridge 153:b484a57bc302 1409 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1410 return(result);
AnnaBridge 153:b484a57bc302 1411 }
AnnaBridge 153:b484a57bc302 1412
AnnaBridge 153:b484a57bc302 1413 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1414 {
AnnaBridge 153:b484a57bc302 1415 uint32_t result;
AnnaBridge 153:b484a57bc302 1416
AnnaBridge 153:b484a57bc302 1417 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1418 return(result);
AnnaBridge 153:b484a57bc302 1419 }
AnnaBridge 153:b484a57bc302 1420
AnnaBridge 153:b484a57bc302 1421 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1422 {
AnnaBridge 153:b484a57bc302 1423 uint32_t result;
AnnaBridge 153:b484a57bc302 1424
AnnaBridge 153:b484a57bc302 1425 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1426 return(result);
AnnaBridge 153:b484a57bc302 1427 }
AnnaBridge 153:b484a57bc302 1428
AnnaBridge 153:b484a57bc302 1429 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1430 {
AnnaBridge 153:b484a57bc302 1431 uint32_t result;
AnnaBridge 153:b484a57bc302 1432
AnnaBridge 153:b484a57bc302 1433 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1434 return(result);
AnnaBridge 153:b484a57bc302 1435 }
AnnaBridge 153:b484a57bc302 1436
AnnaBridge 153:b484a57bc302 1437 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1438 {
AnnaBridge 153:b484a57bc302 1439 uint32_t result;
AnnaBridge 153:b484a57bc302 1440
AnnaBridge 153:b484a57bc302 1441 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1442 return(result);
AnnaBridge 153:b484a57bc302 1443 }
AnnaBridge 153:b484a57bc302 1444
AnnaBridge 153:b484a57bc302 1445 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1446 {
AnnaBridge 153:b484a57bc302 1447 uint32_t result;
AnnaBridge 153:b484a57bc302 1448
AnnaBridge 153:b484a57bc302 1449 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1450 return(result);
AnnaBridge 153:b484a57bc302 1451 }
AnnaBridge 153:b484a57bc302 1452
AnnaBridge 153:b484a57bc302 1453 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1454 {
AnnaBridge 153:b484a57bc302 1455 uint32_t result;
AnnaBridge 153:b484a57bc302 1456
AnnaBridge 153:b484a57bc302 1457 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1458 return(result);
AnnaBridge 153:b484a57bc302 1459 }
AnnaBridge 153:b484a57bc302 1460
AnnaBridge 153:b484a57bc302 1461 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1462 {
AnnaBridge 153:b484a57bc302 1463 uint32_t result;
AnnaBridge 153:b484a57bc302 1464
AnnaBridge 153:b484a57bc302 1465 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1466 return(result);
AnnaBridge 153:b484a57bc302 1467 }
AnnaBridge 153:b484a57bc302 1468
AnnaBridge 153:b484a57bc302 1469 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1470 {
AnnaBridge 153:b484a57bc302 1471 uint32_t result;
AnnaBridge 153:b484a57bc302 1472
AnnaBridge 153:b484a57bc302 1473 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1474 return(result);
AnnaBridge 153:b484a57bc302 1475 }
AnnaBridge 153:b484a57bc302 1476
AnnaBridge 153:b484a57bc302 1477 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1478 {
AnnaBridge 153:b484a57bc302 1479 uint32_t result;
AnnaBridge 153:b484a57bc302 1480
AnnaBridge 153:b484a57bc302 1481 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1482 return(result);
AnnaBridge 153:b484a57bc302 1483 }
AnnaBridge 153:b484a57bc302 1484
AnnaBridge 153:b484a57bc302 1485 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1486 {
AnnaBridge 153:b484a57bc302 1487 uint32_t result;
AnnaBridge 153:b484a57bc302 1488
AnnaBridge 153:b484a57bc302 1489 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1490 return(result);
AnnaBridge 153:b484a57bc302 1491 }
AnnaBridge 153:b484a57bc302 1492
AnnaBridge 153:b484a57bc302 1493 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1494 {
AnnaBridge 153:b484a57bc302 1495 uint32_t result;
AnnaBridge 153:b484a57bc302 1496
AnnaBridge 153:b484a57bc302 1497 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1498 return(result);
AnnaBridge 153:b484a57bc302 1499 }
AnnaBridge 153:b484a57bc302 1500
AnnaBridge 153:b484a57bc302 1501 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1502 {
AnnaBridge 153:b484a57bc302 1503 uint32_t result;
AnnaBridge 153:b484a57bc302 1504
AnnaBridge 153:b484a57bc302 1505 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1506 return(result);
AnnaBridge 153:b484a57bc302 1507 }
AnnaBridge 153:b484a57bc302 1508
AnnaBridge 153:b484a57bc302 1509 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1510 {
AnnaBridge 153:b484a57bc302 1511 uint32_t result;
AnnaBridge 153:b484a57bc302 1512
AnnaBridge 153:b484a57bc302 1513 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1514 return(result);
AnnaBridge 153:b484a57bc302 1515 }
AnnaBridge 153:b484a57bc302 1516
AnnaBridge 153:b484a57bc302 1517 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1518 {
AnnaBridge 153:b484a57bc302 1519 uint32_t result;
AnnaBridge 153:b484a57bc302 1520
AnnaBridge 153:b484a57bc302 1521 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1522 return(result);
AnnaBridge 153:b484a57bc302 1523 }
AnnaBridge 153:b484a57bc302 1524
AnnaBridge 153:b484a57bc302 1525 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1526 {
AnnaBridge 153:b484a57bc302 1527 uint32_t result;
AnnaBridge 153:b484a57bc302 1528
AnnaBridge 153:b484a57bc302 1529 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1530 return(result);
AnnaBridge 153:b484a57bc302 1531 }
AnnaBridge 153:b484a57bc302 1532
AnnaBridge 153:b484a57bc302 1533 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1534 {
AnnaBridge 153:b484a57bc302 1535 uint32_t result;
AnnaBridge 153:b484a57bc302 1536
AnnaBridge 153:b484a57bc302 1537 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1538 return(result);
AnnaBridge 153:b484a57bc302 1539 }
AnnaBridge 153:b484a57bc302 1540
AnnaBridge 153:b484a57bc302 1541 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1542 {
AnnaBridge 153:b484a57bc302 1543 uint32_t result;
AnnaBridge 153:b484a57bc302 1544
AnnaBridge 153:b484a57bc302 1545 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1546 return(result);
AnnaBridge 153:b484a57bc302 1547 }
AnnaBridge 153:b484a57bc302 1548
AnnaBridge 153:b484a57bc302 1549 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1550 {
AnnaBridge 153:b484a57bc302 1551 uint32_t result;
AnnaBridge 153:b484a57bc302 1552
AnnaBridge 153:b484a57bc302 1553 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1554 return(result);
AnnaBridge 153:b484a57bc302 1555 }
AnnaBridge 153:b484a57bc302 1556
AnnaBridge 153:b484a57bc302 1557 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1558 {
AnnaBridge 153:b484a57bc302 1559 uint32_t result;
AnnaBridge 153:b484a57bc302 1560
AnnaBridge 153:b484a57bc302 1561 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1562 return(result);
AnnaBridge 153:b484a57bc302 1563 }
AnnaBridge 153:b484a57bc302 1564
AnnaBridge 153:b484a57bc302 1565 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1566 ({ \
AnnaBridge 153:b484a57bc302 1567 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1568 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1569 __RES; \
AnnaBridge 153:b484a57bc302 1570 })
AnnaBridge 153:b484a57bc302 1571
AnnaBridge 153:b484a57bc302 1572 #define __USAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1573 ({ \
AnnaBridge 153:b484a57bc302 1574 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1575 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1576 __RES; \
AnnaBridge 153:b484a57bc302 1577 })
AnnaBridge 153:b484a57bc302 1578
AnnaBridge 153:b484a57bc302 1579 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1580 {
AnnaBridge 153:b484a57bc302 1581 uint32_t result;
AnnaBridge 153:b484a57bc302 1582
AnnaBridge 153:b484a57bc302 1583 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1584 return(result);
AnnaBridge 153:b484a57bc302 1585 }
AnnaBridge 153:b484a57bc302 1586
AnnaBridge 153:b484a57bc302 1587 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1588 {
AnnaBridge 153:b484a57bc302 1589 uint32_t result;
AnnaBridge 153:b484a57bc302 1590
AnnaBridge 153:b484a57bc302 1591 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1592 return(result);
AnnaBridge 153:b484a57bc302 1593 }
AnnaBridge 153:b484a57bc302 1594
AnnaBridge 153:b484a57bc302 1595 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1596 {
AnnaBridge 153:b484a57bc302 1597 uint32_t result;
AnnaBridge 153:b484a57bc302 1598
AnnaBridge 153:b484a57bc302 1599 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1600 return(result);
AnnaBridge 153:b484a57bc302 1601 }
AnnaBridge 153:b484a57bc302 1602
AnnaBridge 153:b484a57bc302 1603 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1604 {
AnnaBridge 153:b484a57bc302 1605 uint32_t result;
AnnaBridge 153:b484a57bc302 1606
AnnaBridge 153:b484a57bc302 1607 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1608 return(result);
AnnaBridge 153:b484a57bc302 1609 }
AnnaBridge 153:b484a57bc302 1610
AnnaBridge 153:b484a57bc302 1611 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1612 {
AnnaBridge 153:b484a57bc302 1613 uint32_t result;
AnnaBridge 153:b484a57bc302 1614
AnnaBridge 153:b484a57bc302 1615 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1616 return(result);
AnnaBridge 153:b484a57bc302 1617 }
AnnaBridge 153:b484a57bc302 1618
AnnaBridge 153:b484a57bc302 1619 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1620 {
AnnaBridge 153:b484a57bc302 1621 uint32_t result;
AnnaBridge 153:b484a57bc302 1622
AnnaBridge 153:b484a57bc302 1623 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1624 return(result);
AnnaBridge 153:b484a57bc302 1625 }
AnnaBridge 153:b484a57bc302 1626
AnnaBridge 153:b484a57bc302 1627 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1628 {
AnnaBridge 153:b484a57bc302 1629 uint32_t result;
AnnaBridge 153:b484a57bc302 1630
AnnaBridge 153:b484a57bc302 1631 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1632 return(result);
AnnaBridge 153:b484a57bc302 1633 }
AnnaBridge 153:b484a57bc302 1634
AnnaBridge 153:b484a57bc302 1635 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1636 {
AnnaBridge 153:b484a57bc302 1637 uint32_t result;
AnnaBridge 153:b484a57bc302 1638
AnnaBridge 153:b484a57bc302 1639 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1640 return(result);
AnnaBridge 153:b484a57bc302 1641 }
AnnaBridge 153:b484a57bc302 1642
AnnaBridge 153:b484a57bc302 1643 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1644 {
AnnaBridge 153:b484a57bc302 1645 union llreg_u{
AnnaBridge 153:b484a57bc302 1646 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1647 uint64_t w64;
AnnaBridge 153:b484a57bc302 1648 } llr;
AnnaBridge 153:b484a57bc302 1649 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1650
AnnaBridge 153:b484a57bc302 1651 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1652 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1653 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1654 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1655 #endif
AnnaBridge 153:b484a57bc302 1656
AnnaBridge 153:b484a57bc302 1657 return(llr.w64);
AnnaBridge 153:b484a57bc302 1658 }
AnnaBridge 153:b484a57bc302 1659
AnnaBridge 153:b484a57bc302 1660 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1661 {
AnnaBridge 153:b484a57bc302 1662 union llreg_u{
AnnaBridge 153:b484a57bc302 1663 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1664 uint64_t w64;
AnnaBridge 153:b484a57bc302 1665 } llr;
AnnaBridge 153:b484a57bc302 1666 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1667
AnnaBridge 153:b484a57bc302 1668 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1669 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1670 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1671 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1672 #endif
AnnaBridge 153:b484a57bc302 1673
AnnaBridge 153:b484a57bc302 1674 return(llr.w64);
AnnaBridge 153:b484a57bc302 1675 }
AnnaBridge 153:b484a57bc302 1676
AnnaBridge 153:b484a57bc302 1677 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1678 {
AnnaBridge 153:b484a57bc302 1679 uint32_t result;
AnnaBridge 153:b484a57bc302 1680
AnnaBridge 153:b484a57bc302 1681 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1682 return(result);
AnnaBridge 153:b484a57bc302 1683 }
AnnaBridge 153:b484a57bc302 1684
AnnaBridge 153:b484a57bc302 1685 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1686 {
AnnaBridge 153:b484a57bc302 1687 uint32_t result;
AnnaBridge 153:b484a57bc302 1688
AnnaBridge 153:b484a57bc302 1689 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1690 return(result);
AnnaBridge 153:b484a57bc302 1691 }
AnnaBridge 153:b484a57bc302 1692
AnnaBridge 153:b484a57bc302 1693 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1694 {
AnnaBridge 153:b484a57bc302 1695 uint32_t result;
AnnaBridge 153:b484a57bc302 1696
AnnaBridge 153:b484a57bc302 1697 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1698 return(result);
AnnaBridge 153:b484a57bc302 1699 }
AnnaBridge 153:b484a57bc302 1700
AnnaBridge 153:b484a57bc302 1701 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1702 {
AnnaBridge 153:b484a57bc302 1703 uint32_t result;
AnnaBridge 153:b484a57bc302 1704
AnnaBridge 153:b484a57bc302 1705 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1706 return(result);
AnnaBridge 153:b484a57bc302 1707 }
AnnaBridge 153:b484a57bc302 1708
AnnaBridge 153:b484a57bc302 1709 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1710 {
AnnaBridge 153:b484a57bc302 1711 union llreg_u{
AnnaBridge 153:b484a57bc302 1712 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1713 uint64_t w64;
AnnaBridge 153:b484a57bc302 1714 } llr;
AnnaBridge 153:b484a57bc302 1715 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1716
AnnaBridge 153:b484a57bc302 1717 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1718 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1719 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1720 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1721 #endif
AnnaBridge 153:b484a57bc302 1722
AnnaBridge 153:b484a57bc302 1723 return(llr.w64);
AnnaBridge 153:b484a57bc302 1724 }
AnnaBridge 153:b484a57bc302 1725
AnnaBridge 153:b484a57bc302 1726 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1727 {
AnnaBridge 153:b484a57bc302 1728 union llreg_u{
AnnaBridge 153:b484a57bc302 1729 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1730 uint64_t w64;
AnnaBridge 153:b484a57bc302 1731 } llr;
AnnaBridge 153:b484a57bc302 1732 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1733
AnnaBridge 153:b484a57bc302 1734 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1735 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1736 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1737 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1738 #endif
AnnaBridge 153:b484a57bc302 1739
AnnaBridge 153:b484a57bc302 1740 return(llr.w64);
AnnaBridge 153:b484a57bc302 1741 }
AnnaBridge 153:b484a57bc302 1742
AnnaBridge 153:b484a57bc302 1743 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1744 {
AnnaBridge 153:b484a57bc302 1745 uint32_t result;
AnnaBridge 153:b484a57bc302 1746
AnnaBridge 153:b484a57bc302 1747 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1748 return(result);
AnnaBridge 153:b484a57bc302 1749 }
AnnaBridge 153:b484a57bc302 1750
AnnaBridge 153:b484a57bc302 1751 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1752 {
AnnaBridge 153:b484a57bc302 1753 int32_t result;
AnnaBridge 153:b484a57bc302 1754
AnnaBridge 153:b484a57bc302 1755 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1756 return(result);
AnnaBridge 153:b484a57bc302 1757 }
AnnaBridge 153:b484a57bc302 1758
AnnaBridge 153:b484a57bc302 1759 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1760 {
AnnaBridge 153:b484a57bc302 1761 int32_t result;
AnnaBridge 153:b484a57bc302 1762
AnnaBridge 153:b484a57bc302 1763 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1764 return(result);
AnnaBridge 153:b484a57bc302 1765 }
AnnaBridge 153:b484a57bc302 1766
AnnaBridge 153:b484a57bc302 1767 #if 0
AnnaBridge 153:b484a57bc302 1768 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1769 ({ \
AnnaBridge 153:b484a57bc302 1770 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1771 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 1772 __RES; \
AnnaBridge 153:b484a57bc302 1773 })
AnnaBridge 153:b484a57bc302 1774
AnnaBridge 153:b484a57bc302 1775 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1776 ({ \
AnnaBridge 153:b484a57bc302 1777 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1778 if (ARG3 == 0) \
AnnaBridge 153:b484a57bc302 1779 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 153:b484a57bc302 1780 else \
AnnaBridge 153:b484a57bc302 1781 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 1782 __RES; \
AnnaBridge 153:b484a57bc302 1783 })
AnnaBridge 153:b484a57bc302 1784 #endif
AnnaBridge 153:b484a57bc302 1785
AnnaBridge 153:b484a57bc302 1786 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 153:b484a57bc302 1787 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 153:b484a57bc302 1788
AnnaBridge 153:b484a57bc302 1789 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 153:b484a57bc302 1790 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 153:b484a57bc302 1791
AnnaBridge 153:b484a57bc302 1792 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 153:b484a57bc302 1793 {
AnnaBridge 153:b484a57bc302 1794 int32_t result;
AnnaBridge 153:b484a57bc302 1795
AnnaBridge 153:b484a57bc302 1796 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1797 return(result);
AnnaBridge 153:b484a57bc302 1798 }
AnnaBridge 153:b484a57bc302 1799
AnnaBridge 153:b484a57bc302 1800 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 153:b484a57bc302 1801 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 153:b484a57bc302 1802
AnnaBridge 153:b484a57bc302 1803
AnnaBridge 153:b484a57bc302 1804 #endif /* __CMSIS_ARMCLANG_H */