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TARGET_DISCO_L496AG/cmsis_gcc.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:: Anna Bridge
Date:: Fri Apr 20 11:08:29 2018 +0100
Revision:: 166:5aab5a7997ee
Parent:: 165:d1b4690b3f8b
Child:: 169:a7c7b631e539

Updating mbed 2 version number

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	165:d1b4690b3f8b	1	/************************************************************************//
AnnaBridge	165:d1b4690b3f8b	2	* @file cmsis_gcc.h
AnnaBridge	165:d1b4690b3f8b	3	* @brief CMSIS compiler GCC header file
AnnaBridge	165:d1b4690b3f8b	4	* @version V5.0.2
AnnaBridge	165:d1b4690b3f8b	5	* @date 13. February 2017
AnnaBridge	165:d1b4690b3f8b	6	******************************************************************************/
AnnaBridge	165:d1b4690b3f8b	7	/*
AnnaBridge	165:d1b4690b3f8b	8	* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge	165:d1b4690b3f8b	9	*
AnnaBridge	165:d1b4690b3f8b	10	* SPDX-License-Identifier: Apache-2.0
AnnaBridge	165:d1b4690b3f8b	11	*
AnnaBridge	165:d1b4690b3f8b	12	* Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge	165:d1b4690b3f8b	13	* not use this file except in compliance with the License.
AnnaBridge	165:d1b4690b3f8b	14	* You may obtain a copy of the License at
AnnaBridge	165:d1b4690b3f8b	15	*
AnnaBridge	165:d1b4690b3f8b	16	* www.apache.org/licenses/LICENSE-2.0
AnnaBridge	165:d1b4690b3f8b	17	*
AnnaBridge	165:d1b4690b3f8b	18	* Unless required by applicable law or agreed to in writing, software
AnnaBridge	165:d1b4690b3f8b	19	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge	165:d1b4690b3f8b	20	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge	165:d1b4690b3f8b	21	* See the License for the specific language governing permissions and
AnnaBridge	165:d1b4690b3f8b	22	* limitations under the License.
AnnaBridge	165:d1b4690b3f8b	23	*/
AnnaBridge	165:d1b4690b3f8b	24
AnnaBridge	165:d1b4690b3f8b	25	#ifndef __CMSIS_GCC_H
AnnaBridge	165:d1b4690b3f8b	26	#define __CMSIS_GCC_H
AnnaBridge	165:d1b4690b3f8b	27
AnnaBridge	165:d1b4690b3f8b	28	/* ignore some GCC warnings */
AnnaBridge	165:d1b4690b3f8b	29	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	30	#pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge	165:d1b4690b3f8b	31	#pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge	165:d1b4690b3f8b	32	#pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge	165:d1b4690b3f8b	33
AnnaBridge	165:d1b4690b3f8b	34	/* Fallback for __has_builtin */
AnnaBridge	165:d1b4690b3f8b	35	#ifndef __has_builtin
AnnaBridge	165:d1b4690b3f8b	36	#define __has_builtin(x) (0)
AnnaBridge	165:d1b4690b3f8b	37	#endif
AnnaBridge	165:d1b4690b3f8b	38
AnnaBridge	165:d1b4690b3f8b	39	/* CMSIS compiler specific defines */
AnnaBridge	165:d1b4690b3f8b	40	#ifndef __ASM
AnnaBridge	165:d1b4690b3f8b	41	#define __ASM __asm
AnnaBridge	165:d1b4690b3f8b	42	#endif
AnnaBridge	165:d1b4690b3f8b	43	#ifndef __INLINE
AnnaBridge	165:d1b4690b3f8b	44	#define __INLINE inline
AnnaBridge	165:d1b4690b3f8b	45	#endif
AnnaBridge	165:d1b4690b3f8b	46	#ifndef __STATIC_INLINE
AnnaBridge	165:d1b4690b3f8b	47	#define __STATIC_INLINE static inline
AnnaBridge	165:d1b4690b3f8b	48	#endif
AnnaBridge	165:d1b4690b3f8b	49	#ifndef __NO_RETURN
AnnaBridge	165:d1b4690b3f8b	50	#define __NO_RETURN __attribute__((noreturn))
AnnaBridge	165:d1b4690b3f8b	51	#endif
AnnaBridge	165:d1b4690b3f8b	52	#ifndef __USED
AnnaBridge	165:d1b4690b3f8b	53	#define __USED __attribute__((used))
AnnaBridge	165:d1b4690b3f8b	54	#endif
AnnaBridge	165:d1b4690b3f8b	55	#ifndef __WEAK
AnnaBridge	165:d1b4690b3f8b	56	#define __WEAK __attribute__((weak))
AnnaBridge	165:d1b4690b3f8b	57	#endif
AnnaBridge	165:d1b4690b3f8b	58	#ifndef __PACKED
AnnaBridge	165:d1b4690b3f8b	59	#define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge	165:d1b4690b3f8b	60	#endif
AnnaBridge	165:d1b4690b3f8b	61	#ifndef __PACKED_STRUCT
AnnaBridge	165:d1b4690b3f8b	62	#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge	165:d1b4690b3f8b	63	#endif
AnnaBridge	165:d1b4690b3f8b	64	#ifndef __PACKED_UNION
AnnaBridge	165:d1b4690b3f8b	65	#define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge	165:d1b4690b3f8b	66	#endif
AnnaBridge	165:d1b4690b3f8b	67	#ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge	165:d1b4690b3f8b	68	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	69	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	165:d1b4690b3f8b	70	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	165:d1b4690b3f8b	71	struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge	165:d1b4690b3f8b	72	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	73	#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge	165:d1b4690b3f8b	74	#endif
AnnaBridge	165:d1b4690b3f8b	75	#ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge	165:d1b4690b3f8b	76	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	77	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	165:d1b4690b3f8b	78	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	165:d1b4690b3f8b	79	__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge	165:d1b4690b3f8b	80	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	81	#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE )(void )(addr))->v) = (val))
AnnaBridge	165:d1b4690b3f8b	82	#endif
AnnaBridge	165:d1b4690b3f8b	83	#ifndef __UNALIGNED_UINT16_READ
AnnaBridge	165:d1b4690b3f8b	84	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	85	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	165:d1b4690b3f8b	86	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	165:d1b4690b3f8b	87	__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge	165:d1b4690b3f8b	88	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	89	#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ )(const void )(addr))->v)
AnnaBridge	165:d1b4690b3f8b	90	#endif
AnnaBridge	165:d1b4690b3f8b	91	#ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge	165:d1b4690b3f8b	92	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	93	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	165:d1b4690b3f8b	94	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	165:d1b4690b3f8b	95	__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge	165:d1b4690b3f8b	96	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	97	#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE )(void )(addr))->v) = (val))
AnnaBridge	165:d1b4690b3f8b	98	#endif
AnnaBridge	165:d1b4690b3f8b	99	#ifndef __UNALIGNED_UINT32_READ
AnnaBridge	165:d1b4690b3f8b	100	#pragma GCC diagnostic push
AnnaBridge	165:d1b4690b3f8b	101	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	165:d1b4690b3f8b	102	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	165:d1b4690b3f8b	103	__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge	165:d1b4690b3f8b	104	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	105	#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ )(const void )(addr))->v)
AnnaBridge	165:d1b4690b3f8b	106	#endif
AnnaBridge	165:d1b4690b3f8b	107	#ifndef __ALIGNED
AnnaBridge	165:d1b4690b3f8b	108	#define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge	165:d1b4690b3f8b	109	#endif
AnnaBridge	165:d1b4690b3f8b	110	#ifndef __RESTRICT
AnnaBridge	165:d1b4690b3f8b	111	#define __RESTRICT __restrict
AnnaBridge	165:d1b4690b3f8b	112	#endif
AnnaBridge	165:d1b4690b3f8b	113
AnnaBridge	165:d1b4690b3f8b	114
AnnaBridge	165:d1b4690b3f8b	115	/* ########################### Core Function Access ########################### */
AnnaBridge	165:d1b4690b3f8b	116	/** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge	165:d1b4690b3f8b	117	\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge	165:d1b4690b3f8b	118	@{
AnnaBridge	165:d1b4690b3f8b	119	*/
AnnaBridge	165:d1b4690b3f8b	120
AnnaBridge	165:d1b4690b3f8b	121	/**
AnnaBridge	165:d1b4690b3f8b	122	\brief Enable IRQ Interrupts
AnnaBridge	165:d1b4690b3f8b	123	\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge	165:d1b4690b3f8b	124	Can only be executed in Privileged modes.
AnnaBridge	165:d1b4690b3f8b	125	*/
AnnaBridge	165:d1b4690b3f8b	126	__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
AnnaBridge	165:d1b4690b3f8b	127	{
AnnaBridge	165:d1b4690b3f8b	128	__ASM volatile ("cpsie i" : : : "memory");
AnnaBridge	165:d1b4690b3f8b	129	}
AnnaBridge	165:d1b4690b3f8b	130
AnnaBridge	165:d1b4690b3f8b	131
AnnaBridge	165:d1b4690b3f8b	132	/**
AnnaBridge	165:d1b4690b3f8b	133	\brief Disable IRQ Interrupts
AnnaBridge	165:d1b4690b3f8b	134	\details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge	165:d1b4690b3f8b	135	Can only be executed in Privileged modes.
AnnaBridge	165:d1b4690b3f8b	136	*/
AnnaBridge	165:d1b4690b3f8b	137	__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
AnnaBridge	165:d1b4690b3f8b	138	{
AnnaBridge	165:d1b4690b3f8b	139	__ASM volatile ("cpsid i" : : : "memory");
AnnaBridge	165:d1b4690b3f8b	140	}
AnnaBridge	165:d1b4690b3f8b	141
AnnaBridge	165:d1b4690b3f8b	142
AnnaBridge	165:d1b4690b3f8b	143	/**
AnnaBridge	165:d1b4690b3f8b	144	\brief Get Control Register
AnnaBridge	165:d1b4690b3f8b	145	\details Returns the content of the Control Register.
AnnaBridge	165:d1b4690b3f8b	146	\return Control Register value
AnnaBridge	165:d1b4690b3f8b	147	*/
AnnaBridge	165:d1b4690b3f8b	148	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge	165:d1b4690b3f8b	149	{
AnnaBridge	165:d1b4690b3f8b	150	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	151
AnnaBridge	165:d1b4690b3f8b	152	__ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	153	return(result);
AnnaBridge	165:d1b4690b3f8b	154	}
AnnaBridge	165:d1b4690b3f8b	155
AnnaBridge	165:d1b4690b3f8b	156
AnnaBridge	165:d1b4690b3f8b	157	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	158	/**
AnnaBridge	165:d1b4690b3f8b	159	\brief Get Control Register (non-secure)
AnnaBridge	165:d1b4690b3f8b	160	\details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge	165:d1b4690b3f8b	161	\return non-secure Control Register value
AnnaBridge	165:d1b4690b3f8b	162	*/
AnnaBridge	165:d1b4690b3f8b	163	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge	165:d1b4690b3f8b	164	{
AnnaBridge	165:d1b4690b3f8b	165	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	166
AnnaBridge	165:d1b4690b3f8b	167	__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	168	return(result);
AnnaBridge	165:d1b4690b3f8b	169	}
AnnaBridge	165:d1b4690b3f8b	170	#endif
AnnaBridge	165:d1b4690b3f8b	171
AnnaBridge	165:d1b4690b3f8b	172
AnnaBridge	165:d1b4690b3f8b	173	/**
AnnaBridge	165:d1b4690b3f8b	174	\brief Set Control Register
AnnaBridge	165:d1b4690b3f8b	175	\details Writes the given value to the Control Register.
AnnaBridge	165:d1b4690b3f8b	176	\param [in] control Control Register value to set
AnnaBridge	165:d1b4690b3f8b	177	*/
AnnaBridge	165:d1b4690b3f8b	178	__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge	165:d1b4690b3f8b	179	{
AnnaBridge	165:d1b4690b3f8b	180	__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge	165:d1b4690b3f8b	181	}
AnnaBridge	165:d1b4690b3f8b	182
AnnaBridge	165:d1b4690b3f8b	183
AnnaBridge	165:d1b4690b3f8b	184	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	185	/**
AnnaBridge	165:d1b4690b3f8b	186	\brief Set Control Register (non-secure)
AnnaBridge	165:d1b4690b3f8b	187	\details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge	165:d1b4690b3f8b	188	\param [in] control Control Register value to set
AnnaBridge	165:d1b4690b3f8b	189	*/
AnnaBridge	165:d1b4690b3f8b	190	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge	165:d1b4690b3f8b	191	{
AnnaBridge	165:d1b4690b3f8b	192	__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge	165:d1b4690b3f8b	193	}
AnnaBridge	165:d1b4690b3f8b	194	#endif
AnnaBridge	165:d1b4690b3f8b	195
AnnaBridge	165:d1b4690b3f8b	196
AnnaBridge	165:d1b4690b3f8b	197	/**
AnnaBridge	165:d1b4690b3f8b	198	\brief Get IPSR Register
AnnaBridge	165:d1b4690b3f8b	199	\details Returns the content of the IPSR Register.
AnnaBridge	165:d1b4690b3f8b	200	\return IPSR Register value
AnnaBridge	165:d1b4690b3f8b	201	*/
AnnaBridge	165:d1b4690b3f8b	202	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge	165:d1b4690b3f8b	203	{
AnnaBridge	165:d1b4690b3f8b	204	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	205
AnnaBridge	165:d1b4690b3f8b	206	__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	207	return(result);
AnnaBridge	165:d1b4690b3f8b	208	}
AnnaBridge	165:d1b4690b3f8b	209
AnnaBridge	165:d1b4690b3f8b	210
AnnaBridge	165:d1b4690b3f8b	211	/**
AnnaBridge	165:d1b4690b3f8b	212	\brief Get APSR Register
AnnaBridge	165:d1b4690b3f8b	213	\details Returns the content of the APSR Register.
AnnaBridge	165:d1b4690b3f8b	214	\return APSR Register value
AnnaBridge	165:d1b4690b3f8b	215	*/
AnnaBridge	165:d1b4690b3f8b	216	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge	165:d1b4690b3f8b	217	{
AnnaBridge	165:d1b4690b3f8b	218	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	219
AnnaBridge	165:d1b4690b3f8b	220	__ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	221	return(result);
AnnaBridge	165:d1b4690b3f8b	222	}
AnnaBridge	165:d1b4690b3f8b	223
AnnaBridge	165:d1b4690b3f8b	224
AnnaBridge	165:d1b4690b3f8b	225	/**
AnnaBridge	165:d1b4690b3f8b	226	\brief Get xPSR Register
AnnaBridge	165:d1b4690b3f8b	227	\details Returns the content of the xPSR Register.
AnnaBridge	165:d1b4690b3f8b	228	\return xPSR Register value
AnnaBridge	165:d1b4690b3f8b	229	*/
AnnaBridge	165:d1b4690b3f8b	230	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge	165:d1b4690b3f8b	231	{
AnnaBridge	165:d1b4690b3f8b	232	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	233
AnnaBridge	165:d1b4690b3f8b	234	__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	235	return(result);
AnnaBridge	165:d1b4690b3f8b	236	}
AnnaBridge	165:d1b4690b3f8b	237
AnnaBridge	165:d1b4690b3f8b	238
AnnaBridge	165:d1b4690b3f8b	239	/**
AnnaBridge	165:d1b4690b3f8b	240	\brief Get Process Stack Pointer
AnnaBridge	165:d1b4690b3f8b	241	\details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge	165:d1b4690b3f8b	242	\return PSP Register value
AnnaBridge	165:d1b4690b3f8b	243	*/
AnnaBridge	165:d1b4690b3f8b	244	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge	165:d1b4690b3f8b	245	{
AnnaBridge	165:d1b4690b3f8b	246	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	247
AnnaBridge	165:d1b4690b3f8b	248	__ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	249	return(result);
AnnaBridge	165:d1b4690b3f8b	250	}
AnnaBridge	165:d1b4690b3f8b	251
AnnaBridge	165:d1b4690b3f8b	252
AnnaBridge	165:d1b4690b3f8b	253	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	254	/**
AnnaBridge	165:d1b4690b3f8b	255	\brief Get Process Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	256	\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	257	\return PSP Register value
AnnaBridge	165:d1b4690b3f8b	258	*/
AnnaBridge	165:d1b4690b3f8b	259	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge	165:d1b4690b3f8b	260	{
AnnaBridge	165:d1b4690b3f8b	261	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	262
AnnaBridge	165:d1b4690b3f8b	263	__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	264	return(result);
AnnaBridge	165:d1b4690b3f8b	265	}
AnnaBridge	165:d1b4690b3f8b	266	#endif
AnnaBridge	165:d1b4690b3f8b	267
AnnaBridge	165:d1b4690b3f8b	268
AnnaBridge	165:d1b4690b3f8b	269	/**
AnnaBridge	165:d1b4690b3f8b	270	\brief Set Process Stack Pointer
AnnaBridge	165:d1b4690b3f8b	271	\details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge	165:d1b4690b3f8b	272	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	273	*/
AnnaBridge	165:d1b4690b3f8b	274	__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge	165:d1b4690b3f8b	275	{
AnnaBridge	165:d1b4690b3f8b	276	__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge	165:d1b4690b3f8b	277	}
AnnaBridge	165:d1b4690b3f8b	278
AnnaBridge	165:d1b4690b3f8b	279
AnnaBridge	165:d1b4690b3f8b	280	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	281	/**
AnnaBridge	165:d1b4690b3f8b	282	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	283	\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	284	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	285	*/
AnnaBridge	165:d1b4690b3f8b	286	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge	165:d1b4690b3f8b	287	{
AnnaBridge	165:d1b4690b3f8b	288	__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge	165:d1b4690b3f8b	289	}
AnnaBridge	165:d1b4690b3f8b	290	#endif
AnnaBridge	165:d1b4690b3f8b	291
AnnaBridge	165:d1b4690b3f8b	292
AnnaBridge	165:d1b4690b3f8b	293	/**
AnnaBridge	165:d1b4690b3f8b	294	\brief Get Main Stack Pointer
AnnaBridge	165:d1b4690b3f8b	295	\details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge	165:d1b4690b3f8b	296	\return MSP Register value
AnnaBridge	165:d1b4690b3f8b	297	*/
AnnaBridge	165:d1b4690b3f8b	298	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge	165:d1b4690b3f8b	299	{
AnnaBridge	165:d1b4690b3f8b	300	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	301
AnnaBridge	165:d1b4690b3f8b	302	__ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	303	return(result);
AnnaBridge	165:d1b4690b3f8b	304	}
AnnaBridge	165:d1b4690b3f8b	305
AnnaBridge	165:d1b4690b3f8b	306
AnnaBridge	165:d1b4690b3f8b	307	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	308	/**
AnnaBridge	165:d1b4690b3f8b	309	\brief Get Main Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	310	\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	311	\return MSP Register value
AnnaBridge	165:d1b4690b3f8b	312	*/
AnnaBridge	165:d1b4690b3f8b	313	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge	165:d1b4690b3f8b	314	{
AnnaBridge	165:d1b4690b3f8b	315	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	316
AnnaBridge	165:d1b4690b3f8b	317	__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	318	return(result);
AnnaBridge	165:d1b4690b3f8b	319	}
AnnaBridge	165:d1b4690b3f8b	320	#endif
AnnaBridge	165:d1b4690b3f8b	321
AnnaBridge	165:d1b4690b3f8b	322
AnnaBridge	165:d1b4690b3f8b	323	/**
AnnaBridge	165:d1b4690b3f8b	324	\brief Set Main Stack Pointer
AnnaBridge	165:d1b4690b3f8b	325	\details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge	165:d1b4690b3f8b	326	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	327	*/
AnnaBridge	165:d1b4690b3f8b	328	__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge	165:d1b4690b3f8b	329	{
AnnaBridge	165:d1b4690b3f8b	330	__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge	165:d1b4690b3f8b	331	}
AnnaBridge	165:d1b4690b3f8b	332
AnnaBridge	165:d1b4690b3f8b	333
AnnaBridge	165:d1b4690b3f8b	334	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	335	/**
AnnaBridge	165:d1b4690b3f8b	336	\brief Set Main Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	337	\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	338	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	339	*/
AnnaBridge	165:d1b4690b3f8b	340	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge	165:d1b4690b3f8b	341	{
AnnaBridge	165:d1b4690b3f8b	342	__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge	165:d1b4690b3f8b	343	}
AnnaBridge	165:d1b4690b3f8b	344	#endif
AnnaBridge	165:d1b4690b3f8b	345
AnnaBridge	165:d1b4690b3f8b	346
AnnaBridge	165:d1b4690b3f8b	347	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	348	/**
AnnaBridge	165:d1b4690b3f8b	349	\brief Get Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	350	\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	351	\return SP Register value
AnnaBridge	165:d1b4690b3f8b	352	*/
AnnaBridge	165:d1b4690b3f8b	353	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge	165:d1b4690b3f8b	354	{
AnnaBridge	165:d1b4690b3f8b	355	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	356
AnnaBridge	165:d1b4690b3f8b	357	__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	358	return(result);
AnnaBridge	165:d1b4690b3f8b	359	}
AnnaBridge	165:d1b4690b3f8b	360
AnnaBridge	165:d1b4690b3f8b	361
AnnaBridge	165:d1b4690b3f8b	362	/**
AnnaBridge	165:d1b4690b3f8b	363	\brief Set Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	364	\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	165:d1b4690b3f8b	365	\param [in] topOfStack Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	366	*/
AnnaBridge	165:d1b4690b3f8b	367	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge	165:d1b4690b3f8b	368	{
AnnaBridge	165:d1b4690b3f8b	369	__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge	165:d1b4690b3f8b	370	}
AnnaBridge	165:d1b4690b3f8b	371	#endif
AnnaBridge	165:d1b4690b3f8b	372
AnnaBridge	165:d1b4690b3f8b	373
AnnaBridge	165:d1b4690b3f8b	374	/**
AnnaBridge	165:d1b4690b3f8b	375	\brief Get Priority Mask
AnnaBridge	165:d1b4690b3f8b	376	\details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge	165:d1b4690b3f8b	377	\return Priority Mask value
AnnaBridge	165:d1b4690b3f8b	378	*/
AnnaBridge	165:d1b4690b3f8b	379	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge	165:d1b4690b3f8b	380	{
AnnaBridge	165:d1b4690b3f8b	381	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	382
AnnaBridge	165:d1b4690b3f8b	383	__ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	384	return(result);
AnnaBridge	165:d1b4690b3f8b	385	}
AnnaBridge	165:d1b4690b3f8b	386
AnnaBridge	165:d1b4690b3f8b	387
AnnaBridge	165:d1b4690b3f8b	388	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	389	/**
AnnaBridge	165:d1b4690b3f8b	390	\brief Get Priority Mask (non-secure)
AnnaBridge	165:d1b4690b3f8b	391	\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge	165:d1b4690b3f8b	392	\return Priority Mask value
AnnaBridge	165:d1b4690b3f8b	393	*/
AnnaBridge	165:d1b4690b3f8b	394	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge	165:d1b4690b3f8b	395	{
AnnaBridge	165:d1b4690b3f8b	396	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	397
AnnaBridge	165:d1b4690b3f8b	398	__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	399	return(result);
AnnaBridge	165:d1b4690b3f8b	400	}
AnnaBridge	165:d1b4690b3f8b	401	#endif
AnnaBridge	165:d1b4690b3f8b	402
AnnaBridge	165:d1b4690b3f8b	403
AnnaBridge	165:d1b4690b3f8b	404	/**
AnnaBridge	165:d1b4690b3f8b	405	\brief Set Priority Mask
AnnaBridge	165:d1b4690b3f8b	406	\details Assigns the given value to the Priority Mask Register.
AnnaBridge	165:d1b4690b3f8b	407	\param [in] priMask Priority Mask
AnnaBridge	165:d1b4690b3f8b	408	*/
AnnaBridge	165:d1b4690b3f8b	409	__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge	165:d1b4690b3f8b	410	{
AnnaBridge	165:d1b4690b3f8b	411	__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge	165:d1b4690b3f8b	412	}
AnnaBridge	165:d1b4690b3f8b	413
AnnaBridge	165:d1b4690b3f8b	414
AnnaBridge	165:d1b4690b3f8b	415	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	416	/**
AnnaBridge	165:d1b4690b3f8b	417	\brief Set Priority Mask (non-secure)
AnnaBridge	165:d1b4690b3f8b	418	\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge	165:d1b4690b3f8b	419	\param [in] priMask Priority Mask
AnnaBridge	165:d1b4690b3f8b	420	*/
AnnaBridge	165:d1b4690b3f8b	421	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge	165:d1b4690b3f8b	422	{
AnnaBridge	165:d1b4690b3f8b	423	__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge	165:d1b4690b3f8b	424	}
AnnaBridge	165:d1b4690b3f8b	425	#endif
AnnaBridge	165:d1b4690b3f8b	426
AnnaBridge	165:d1b4690b3f8b	427
AnnaBridge	165:d1b4690b3f8b	428	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	429	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	430	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	431	/**
AnnaBridge	165:d1b4690b3f8b	432	\brief Enable FIQ
AnnaBridge	165:d1b4690b3f8b	433	\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge	165:d1b4690b3f8b	434	Can only be executed in Privileged modes.
AnnaBridge	165:d1b4690b3f8b	435	*/
AnnaBridge	165:d1b4690b3f8b	436	__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge	165:d1b4690b3f8b	437	{
AnnaBridge	165:d1b4690b3f8b	438	__ASM volatile ("cpsie f" : : : "memory");
AnnaBridge	165:d1b4690b3f8b	439	}
AnnaBridge	165:d1b4690b3f8b	440
AnnaBridge	165:d1b4690b3f8b	441
AnnaBridge	165:d1b4690b3f8b	442	/**
AnnaBridge	165:d1b4690b3f8b	443	\brief Disable FIQ
AnnaBridge	165:d1b4690b3f8b	444	\details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge	165:d1b4690b3f8b	445	Can only be executed in Privileged modes.
AnnaBridge	165:d1b4690b3f8b	446	*/
AnnaBridge	165:d1b4690b3f8b	447	__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge	165:d1b4690b3f8b	448	{
AnnaBridge	165:d1b4690b3f8b	449	__ASM volatile ("cpsid f" : : : "memory");
AnnaBridge	165:d1b4690b3f8b	450	}
AnnaBridge	165:d1b4690b3f8b	451
AnnaBridge	165:d1b4690b3f8b	452
AnnaBridge	165:d1b4690b3f8b	453	/**
AnnaBridge	165:d1b4690b3f8b	454	\brief Get Base Priority
AnnaBridge	165:d1b4690b3f8b	455	\details Returns the current value of the Base Priority register.
AnnaBridge	165:d1b4690b3f8b	456	\return Base Priority register value
AnnaBridge	165:d1b4690b3f8b	457	*/
AnnaBridge	165:d1b4690b3f8b	458	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge	165:d1b4690b3f8b	459	{
AnnaBridge	165:d1b4690b3f8b	460	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	461
AnnaBridge	165:d1b4690b3f8b	462	__ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	463	return(result);
AnnaBridge	165:d1b4690b3f8b	464	}
AnnaBridge	165:d1b4690b3f8b	465
AnnaBridge	165:d1b4690b3f8b	466
AnnaBridge	165:d1b4690b3f8b	467	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	468	/**
AnnaBridge	165:d1b4690b3f8b	469	\brief Get Base Priority (non-secure)
AnnaBridge	165:d1b4690b3f8b	470	\details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge	165:d1b4690b3f8b	471	\return Base Priority register value
AnnaBridge	165:d1b4690b3f8b	472	*/
AnnaBridge	165:d1b4690b3f8b	473	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge	165:d1b4690b3f8b	474	{
AnnaBridge	165:d1b4690b3f8b	475	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	476
AnnaBridge	165:d1b4690b3f8b	477	__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	478	return(result);
AnnaBridge	165:d1b4690b3f8b	479	}
AnnaBridge	165:d1b4690b3f8b	480	#endif
AnnaBridge	165:d1b4690b3f8b	481
AnnaBridge	165:d1b4690b3f8b	482
AnnaBridge	165:d1b4690b3f8b	483	/**
AnnaBridge	165:d1b4690b3f8b	484	\brief Set Base Priority
AnnaBridge	165:d1b4690b3f8b	485	\details Assigns the given value to the Base Priority register.
AnnaBridge	165:d1b4690b3f8b	486	\param [in] basePri Base Priority value to set
AnnaBridge	165:d1b4690b3f8b	487	*/
AnnaBridge	165:d1b4690b3f8b	488	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge	165:d1b4690b3f8b	489	{
AnnaBridge	165:d1b4690b3f8b	490	__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge	165:d1b4690b3f8b	491	}
AnnaBridge	165:d1b4690b3f8b	492
AnnaBridge	165:d1b4690b3f8b	493
AnnaBridge	165:d1b4690b3f8b	494	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	495	/**
AnnaBridge	165:d1b4690b3f8b	496	\brief Set Base Priority (non-secure)
AnnaBridge	165:d1b4690b3f8b	497	\details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge	165:d1b4690b3f8b	498	\param [in] basePri Base Priority value to set
AnnaBridge	165:d1b4690b3f8b	499	*/
AnnaBridge	165:d1b4690b3f8b	500	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge	165:d1b4690b3f8b	501	{
AnnaBridge	165:d1b4690b3f8b	502	__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge	165:d1b4690b3f8b	503	}
AnnaBridge	165:d1b4690b3f8b	504	#endif
AnnaBridge	165:d1b4690b3f8b	505
AnnaBridge	165:d1b4690b3f8b	506
AnnaBridge	165:d1b4690b3f8b	507	/**
AnnaBridge	165:d1b4690b3f8b	508	\brief Set Base Priority with condition
AnnaBridge	165:d1b4690b3f8b	509	\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge	165:d1b4690b3f8b	510	or the new value increases the BASEPRI priority level.
AnnaBridge	165:d1b4690b3f8b	511	\param [in] basePri Base Priority value to set
AnnaBridge	165:d1b4690b3f8b	512	*/
AnnaBridge	165:d1b4690b3f8b	513	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge	165:d1b4690b3f8b	514	{
AnnaBridge	165:d1b4690b3f8b	515	__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge	165:d1b4690b3f8b	516	}
AnnaBridge	165:d1b4690b3f8b	517
AnnaBridge	165:d1b4690b3f8b	518
AnnaBridge	165:d1b4690b3f8b	519	/**
AnnaBridge	165:d1b4690b3f8b	520	\brief Get Fault Mask
AnnaBridge	165:d1b4690b3f8b	521	\details Returns the current value of the Fault Mask register.
AnnaBridge	165:d1b4690b3f8b	522	\return Fault Mask register value
AnnaBridge	165:d1b4690b3f8b	523	*/
AnnaBridge	165:d1b4690b3f8b	524	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge	165:d1b4690b3f8b	525	{
AnnaBridge	165:d1b4690b3f8b	526	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	527
AnnaBridge	165:d1b4690b3f8b	528	__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	529	return(result);
AnnaBridge	165:d1b4690b3f8b	530	}
AnnaBridge	165:d1b4690b3f8b	531
AnnaBridge	165:d1b4690b3f8b	532
AnnaBridge	165:d1b4690b3f8b	533	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	534	/**
AnnaBridge	165:d1b4690b3f8b	535	\brief Get Fault Mask (non-secure)
AnnaBridge	165:d1b4690b3f8b	536	\details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge	165:d1b4690b3f8b	537	\return Fault Mask register value
AnnaBridge	165:d1b4690b3f8b	538	*/
AnnaBridge	165:d1b4690b3f8b	539	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge	165:d1b4690b3f8b	540	{
AnnaBridge	165:d1b4690b3f8b	541	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	542
AnnaBridge	165:d1b4690b3f8b	543	__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	544	return(result);
AnnaBridge	165:d1b4690b3f8b	545	}
AnnaBridge	165:d1b4690b3f8b	546	#endif
AnnaBridge	165:d1b4690b3f8b	547
AnnaBridge	165:d1b4690b3f8b	548
AnnaBridge	165:d1b4690b3f8b	549	/**
AnnaBridge	165:d1b4690b3f8b	550	\brief Set Fault Mask
AnnaBridge	165:d1b4690b3f8b	551	\details Assigns the given value to the Fault Mask register.
AnnaBridge	165:d1b4690b3f8b	552	\param [in] faultMask Fault Mask value to set
AnnaBridge	165:d1b4690b3f8b	553	*/
AnnaBridge	165:d1b4690b3f8b	554	__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge	165:d1b4690b3f8b	555	{
AnnaBridge	165:d1b4690b3f8b	556	__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge	165:d1b4690b3f8b	557	}
AnnaBridge	165:d1b4690b3f8b	558
AnnaBridge	165:d1b4690b3f8b	559
AnnaBridge	165:d1b4690b3f8b	560	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	165:d1b4690b3f8b	561	/**
AnnaBridge	165:d1b4690b3f8b	562	\brief Set Fault Mask (non-secure)
AnnaBridge	165:d1b4690b3f8b	563	\details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge	165:d1b4690b3f8b	564	\param [in] faultMask Fault Mask value to set
AnnaBridge	165:d1b4690b3f8b	565	*/
AnnaBridge	165:d1b4690b3f8b	566	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge	165:d1b4690b3f8b	567	{
AnnaBridge	165:d1b4690b3f8b	568	__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge	165:d1b4690b3f8b	569	}
AnnaBridge	165:d1b4690b3f8b	570	#endif
AnnaBridge	165:d1b4690b3f8b	571
AnnaBridge	165:d1b4690b3f8b	572	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	573	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	574	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	575
AnnaBridge	165:d1b4690b3f8b	576
AnnaBridge	165:d1b4690b3f8b	577	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	578	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	579
AnnaBridge	165:d1b4690b3f8b	580	/**
AnnaBridge	165:d1b4690b3f8b	581	\brief Get Process Stack Pointer Limit
AnnaBridge	165:d1b4690b3f8b	582	\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	165:d1b4690b3f8b	583	\return PSPLIM Register value
AnnaBridge	165:d1b4690b3f8b	584	*/
AnnaBridge	165:d1b4690b3f8b	585	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge	165:d1b4690b3f8b	586	{
AnnaBridge	165:d1b4690b3f8b	587	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	588
AnnaBridge	165:d1b4690b3f8b	589	__ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	590	return(result);
AnnaBridge	165:d1b4690b3f8b	591	}
AnnaBridge	165:d1b4690b3f8b	592
AnnaBridge	165:d1b4690b3f8b	593
AnnaBridge	165:d1b4690b3f8b	594	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	165:d1b4690b3f8b	595	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	596	/**
AnnaBridge	165:d1b4690b3f8b	597	\brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge	165:d1b4690b3f8b	598	\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	165:d1b4690b3f8b	599	\return PSPLIM Register value
AnnaBridge	165:d1b4690b3f8b	600	*/
AnnaBridge	165:d1b4690b3f8b	601	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge	165:d1b4690b3f8b	602	{
AnnaBridge	165:d1b4690b3f8b	603	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	604
AnnaBridge	165:d1b4690b3f8b	605	__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	606	return(result);
AnnaBridge	165:d1b4690b3f8b	607	}
AnnaBridge	165:d1b4690b3f8b	608	#endif
AnnaBridge	165:d1b4690b3f8b	609
AnnaBridge	165:d1b4690b3f8b	610
AnnaBridge	165:d1b4690b3f8b	611	/**
AnnaBridge	165:d1b4690b3f8b	612	\brief Set Process Stack Pointer Limit
AnnaBridge	165:d1b4690b3f8b	613	\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	165:d1b4690b3f8b	614	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	165:d1b4690b3f8b	615	*/
AnnaBridge	165:d1b4690b3f8b	616	__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge	165:d1b4690b3f8b	617	{
AnnaBridge	165:d1b4690b3f8b	618	__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge	165:d1b4690b3f8b	619	}
AnnaBridge	165:d1b4690b3f8b	620
AnnaBridge	165:d1b4690b3f8b	621
AnnaBridge	165:d1b4690b3f8b	622	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	165:d1b4690b3f8b	623	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	624	/**
AnnaBridge	165:d1b4690b3f8b	625	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	165:d1b4690b3f8b	626	\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	165:d1b4690b3f8b	627	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	165:d1b4690b3f8b	628	*/
AnnaBridge	165:d1b4690b3f8b	629	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge	165:d1b4690b3f8b	630	{
AnnaBridge	165:d1b4690b3f8b	631	__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge	165:d1b4690b3f8b	632	}
AnnaBridge	165:d1b4690b3f8b	633	#endif
AnnaBridge	165:d1b4690b3f8b	634
AnnaBridge	165:d1b4690b3f8b	635
AnnaBridge	165:d1b4690b3f8b	636	/**
AnnaBridge	165:d1b4690b3f8b	637	\brief Get Main Stack Pointer Limit
AnnaBridge	165:d1b4690b3f8b	638	\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	165:d1b4690b3f8b	639	\return MSPLIM Register value
AnnaBridge	165:d1b4690b3f8b	640	*/
AnnaBridge	165:d1b4690b3f8b	641	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge	165:d1b4690b3f8b	642	{
AnnaBridge	165:d1b4690b3f8b	643	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	644
AnnaBridge	165:d1b4690b3f8b	645	__ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	646
AnnaBridge	165:d1b4690b3f8b	647	return(result);
AnnaBridge	165:d1b4690b3f8b	648	}
AnnaBridge	165:d1b4690b3f8b	649
AnnaBridge	165:d1b4690b3f8b	650
AnnaBridge	165:d1b4690b3f8b	651	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	165:d1b4690b3f8b	652	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	653	/**
AnnaBridge	165:d1b4690b3f8b	654	\brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge	165:d1b4690b3f8b	655	\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge	165:d1b4690b3f8b	656	\return MSPLIM Register value
AnnaBridge	165:d1b4690b3f8b	657	*/
AnnaBridge	165:d1b4690b3f8b	658	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge	165:d1b4690b3f8b	659	{
AnnaBridge	165:d1b4690b3f8b	660	register uint32_t result;
AnnaBridge	165:d1b4690b3f8b	661
AnnaBridge	165:d1b4690b3f8b	662	__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	663	return(result);
AnnaBridge	165:d1b4690b3f8b	664	}
AnnaBridge	165:d1b4690b3f8b	665	#endif
AnnaBridge	165:d1b4690b3f8b	666
AnnaBridge	165:d1b4690b3f8b	667
AnnaBridge	165:d1b4690b3f8b	668	/**
AnnaBridge	165:d1b4690b3f8b	669	\brief Set Main Stack Pointer Limit
AnnaBridge	165:d1b4690b3f8b	670	\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	165:d1b4690b3f8b	671	\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge	165:d1b4690b3f8b	672	*/
AnnaBridge	165:d1b4690b3f8b	673	__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge	165:d1b4690b3f8b	674	{
AnnaBridge	165:d1b4690b3f8b	675	__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	165:d1b4690b3f8b	676	}
AnnaBridge	165:d1b4690b3f8b	677
AnnaBridge	165:d1b4690b3f8b	678
AnnaBridge	165:d1b4690b3f8b	679	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	165:d1b4690b3f8b	680	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	681	/**
AnnaBridge	165:d1b4690b3f8b	682	\brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge	165:d1b4690b3f8b	683	\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge	165:d1b4690b3f8b	684	\param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge	165:d1b4690b3f8b	685	*/
AnnaBridge	165:d1b4690b3f8b	686	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge	165:d1b4690b3f8b	687	{
AnnaBridge	165:d1b4690b3f8b	688	__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	165:d1b4690b3f8b	689	}
AnnaBridge	165:d1b4690b3f8b	690	#endif
AnnaBridge	165:d1b4690b3f8b	691
AnnaBridge	165:d1b4690b3f8b	692	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	693	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	694
AnnaBridge	165:d1b4690b3f8b	695
AnnaBridge	165:d1b4690b3f8b	696	#if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	697	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	698
AnnaBridge	165:d1b4690b3f8b	699	/**
AnnaBridge	165:d1b4690b3f8b	700	\brief Get FPSCR
AnnaBridge	165:d1b4690b3f8b	701	\details Returns the current value of the Floating Point Status/Control register.
AnnaBridge	165:d1b4690b3f8b	702	\return Floating Point Status/Control register value
AnnaBridge	165:d1b4690b3f8b	703	*/
AnnaBridge	165:d1b4690b3f8b	704	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge	165:d1b4690b3f8b	705	{
AnnaBridge	165:d1b4690b3f8b	706	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	165:d1b4690b3f8b	707	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge	165:d1b4690b3f8b	708	#if __has_builtin(__builtin_arm_get_fpscr) \|\| (__GNUC__ > 7) \|\| (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge	165:d1b4690b3f8b	709	/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge	165:d1b4690b3f8b	710	return __builtin_arm_get_fpscr();
AnnaBridge	165:d1b4690b3f8b	711	#else
AnnaBridge	165:d1b4690b3f8b	712	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	713
AnnaBridge	165:d1b4690b3f8b	714	__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge	165:d1b4690b3f8b	715	return(result);
AnnaBridge	165:d1b4690b3f8b	716	#endif
AnnaBridge	165:d1b4690b3f8b	717	#else
AnnaBridge	165:d1b4690b3f8b	718	return(0U);
AnnaBridge	165:d1b4690b3f8b	719	#endif
AnnaBridge	165:d1b4690b3f8b	720	}
AnnaBridge	165:d1b4690b3f8b	721
AnnaBridge	165:d1b4690b3f8b	722
AnnaBridge	165:d1b4690b3f8b	723	/**
AnnaBridge	165:d1b4690b3f8b	724	\brief Set FPSCR
AnnaBridge	165:d1b4690b3f8b	725	\details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge	165:d1b4690b3f8b	726	\param [in] fpscr Floating Point Status/Control value to set
AnnaBridge	165:d1b4690b3f8b	727	*/
AnnaBridge	165:d1b4690b3f8b	728	__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge	165:d1b4690b3f8b	729	{
AnnaBridge	165:d1b4690b3f8b	730	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	165:d1b4690b3f8b	731	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge	165:d1b4690b3f8b	732	#if __has_builtin(__builtin_arm_set_fpscr) \|\| (__GNUC__ > 7) \|\| (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge	165:d1b4690b3f8b	733	/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge	165:d1b4690b3f8b	734	__builtin_arm_set_fpscr(fpscr);
AnnaBridge	165:d1b4690b3f8b	735	#else
AnnaBridge	165:d1b4690b3f8b	736	__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
AnnaBridge	165:d1b4690b3f8b	737	#endif
AnnaBridge	165:d1b4690b3f8b	738	#else
AnnaBridge	165:d1b4690b3f8b	739	(void)fpscr;
AnnaBridge	165:d1b4690b3f8b	740	#endif
AnnaBridge	165:d1b4690b3f8b	741	}
AnnaBridge	165:d1b4690b3f8b	742
AnnaBridge	165:d1b4690b3f8b	743	#endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	744	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	745
AnnaBridge	165:d1b4690b3f8b	746
AnnaBridge	165:d1b4690b3f8b	747
AnnaBridge	165:d1b4690b3f8b	748	/@} end of CMSIS_Core_RegAccFunctions /
AnnaBridge	165:d1b4690b3f8b	749
AnnaBridge	165:d1b4690b3f8b	750
AnnaBridge	165:d1b4690b3f8b	751	/* ########################## Core Instruction Access ######################### */
AnnaBridge	165:d1b4690b3f8b	752	/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge	165:d1b4690b3f8b	753	Access to dedicated instructions
AnnaBridge	165:d1b4690b3f8b	754	@{
AnnaBridge	165:d1b4690b3f8b	755	*/
AnnaBridge	165:d1b4690b3f8b	756
AnnaBridge	165:d1b4690b3f8b	757	/* Define macros for porting to both thumb1 and thumb2.
AnnaBridge	165:d1b4690b3f8b	758	* For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge	165:d1b4690b3f8b	759	* Otherwise, use general registers, specified by constraint "r" */
AnnaBridge	165:d1b4690b3f8b	760	#if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge	165:d1b4690b3f8b	761	#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge	165:d1b4690b3f8b	762	#define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge	165:d1b4690b3f8b	763	#define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge	165:d1b4690b3f8b	764	#else
AnnaBridge	165:d1b4690b3f8b	765	#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge	165:d1b4690b3f8b	766	#define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge	165:d1b4690b3f8b	767	#define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge	165:d1b4690b3f8b	768	#endif
AnnaBridge	165:d1b4690b3f8b	769
AnnaBridge	165:d1b4690b3f8b	770	/**
AnnaBridge	165:d1b4690b3f8b	771	\brief No Operation
AnnaBridge	165:d1b4690b3f8b	772	\details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge	165:d1b4690b3f8b	773	*/
AnnaBridge	165:d1b4690b3f8b	774	//__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
AnnaBridge	165:d1b4690b3f8b	775	//{
AnnaBridge	165:d1b4690b3f8b	776	// __ASM volatile ("nop");
AnnaBridge	165:d1b4690b3f8b	777	//}
AnnaBridge	165:d1b4690b3f8b	778	#define __NOP() __ASM volatile ("nop") /* This implementation generates debug information */
AnnaBridge	165:d1b4690b3f8b	779
AnnaBridge	165:d1b4690b3f8b	780	/**
AnnaBridge	165:d1b4690b3f8b	781	\brief Wait For Interrupt
AnnaBridge	165:d1b4690b3f8b	782	\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge	165:d1b4690b3f8b	783	*/
AnnaBridge	165:d1b4690b3f8b	784	//__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
AnnaBridge	165:d1b4690b3f8b	785	//{
AnnaBridge	165:d1b4690b3f8b	786	// __ASM volatile ("wfi");
AnnaBridge	165:d1b4690b3f8b	787	//}
AnnaBridge	165:d1b4690b3f8b	788	#define __WFI() __ASM volatile ("wfi") /* This implementation generates debug information */
AnnaBridge	165:d1b4690b3f8b	789
AnnaBridge	165:d1b4690b3f8b	790
AnnaBridge	165:d1b4690b3f8b	791	/**
AnnaBridge	165:d1b4690b3f8b	792	\brief Wait For Event
AnnaBridge	165:d1b4690b3f8b	793	\details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge	165:d1b4690b3f8b	794	a low-power state until one of a number of events occurs.
AnnaBridge	165:d1b4690b3f8b	795	*/
AnnaBridge	165:d1b4690b3f8b	796	//__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
AnnaBridge	165:d1b4690b3f8b	797	//{
AnnaBridge	165:d1b4690b3f8b	798	// __ASM volatile ("wfe");
AnnaBridge	165:d1b4690b3f8b	799	//}
AnnaBridge	165:d1b4690b3f8b	800	#define __WFE() __ASM volatile ("wfe") /* This implementation generates debug information */
AnnaBridge	165:d1b4690b3f8b	801
AnnaBridge	165:d1b4690b3f8b	802
AnnaBridge	165:d1b4690b3f8b	803	/**
AnnaBridge	165:d1b4690b3f8b	804	\brief Send Event
AnnaBridge	165:d1b4690b3f8b	805	\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge	165:d1b4690b3f8b	806	*/
AnnaBridge	165:d1b4690b3f8b	807	//__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
AnnaBridge	165:d1b4690b3f8b	808	//{
AnnaBridge	165:d1b4690b3f8b	809	// __ASM volatile ("sev");
AnnaBridge	165:d1b4690b3f8b	810	//}
AnnaBridge	165:d1b4690b3f8b	811	#define __SEV() __ASM volatile ("sev") /* This implementation generates debug information */
AnnaBridge	165:d1b4690b3f8b	812
AnnaBridge	165:d1b4690b3f8b	813
AnnaBridge	165:d1b4690b3f8b	814	/**
AnnaBridge	165:d1b4690b3f8b	815	\brief Instruction Synchronization Barrier
AnnaBridge	165:d1b4690b3f8b	816	\details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge	165:d1b4690b3f8b	817	so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge	165:d1b4690b3f8b	818	after the instruction has been completed.
AnnaBridge	165:d1b4690b3f8b	819	*/
AnnaBridge	165:d1b4690b3f8b	820	__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
AnnaBridge	165:d1b4690b3f8b	821	{
AnnaBridge	165:d1b4690b3f8b	822	__ASM volatile ("isb 0xF":::"memory");
AnnaBridge	165:d1b4690b3f8b	823	}
AnnaBridge	165:d1b4690b3f8b	824
AnnaBridge	165:d1b4690b3f8b	825
AnnaBridge	165:d1b4690b3f8b	826	/**
AnnaBridge	165:d1b4690b3f8b	827	\brief Data Synchronization Barrier
AnnaBridge	165:d1b4690b3f8b	828	\details Acts as a special kind of Data Memory Barrier.
AnnaBridge	165:d1b4690b3f8b	829	It completes when all explicit memory accesses before this instruction complete.
AnnaBridge	165:d1b4690b3f8b	830	*/
AnnaBridge	165:d1b4690b3f8b	831	__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
AnnaBridge	165:d1b4690b3f8b	832	{
AnnaBridge	165:d1b4690b3f8b	833	__ASM volatile ("dsb 0xF":::"memory");
AnnaBridge	165:d1b4690b3f8b	834	}
AnnaBridge	165:d1b4690b3f8b	835
AnnaBridge	165:d1b4690b3f8b	836
AnnaBridge	165:d1b4690b3f8b	837	/**
AnnaBridge	165:d1b4690b3f8b	838	\brief Data Memory Barrier
AnnaBridge	165:d1b4690b3f8b	839	\details Ensures the apparent order of the explicit memory operations before
AnnaBridge	165:d1b4690b3f8b	840	and after the instruction, without ensuring their completion.
AnnaBridge	165:d1b4690b3f8b	841	*/
AnnaBridge	165:d1b4690b3f8b	842	__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
AnnaBridge	165:d1b4690b3f8b	843	{
AnnaBridge	165:d1b4690b3f8b	844	__ASM volatile ("dmb 0xF":::"memory");
AnnaBridge	165:d1b4690b3f8b	845	}
AnnaBridge	165:d1b4690b3f8b	846
AnnaBridge	165:d1b4690b3f8b	847
AnnaBridge	165:d1b4690b3f8b	848	/**
AnnaBridge	165:d1b4690b3f8b	849	\brief Reverse byte order (32 bit)
AnnaBridge	165:d1b4690b3f8b	850	\details Reverses the byte order in unsigned integer value.
AnnaBridge	165:d1b4690b3f8b	851	\param [in] value Value to reverse
AnnaBridge	165:d1b4690b3f8b	852	\return Reversed value
AnnaBridge	165:d1b4690b3f8b	853	*/
AnnaBridge	165:d1b4690b3f8b	854	__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
AnnaBridge	165:d1b4690b3f8b	855	{
AnnaBridge	165:d1b4690b3f8b	856	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge	165:d1b4690b3f8b	857	return __builtin_bswap32(value);
AnnaBridge	165:d1b4690b3f8b	858	#else
AnnaBridge	165:d1b4690b3f8b	859	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	860
AnnaBridge	165:d1b4690b3f8b	861	__ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	165:d1b4690b3f8b	862	return(result);
AnnaBridge	165:d1b4690b3f8b	863	#endif
AnnaBridge	165:d1b4690b3f8b	864	}
AnnaBridge	165:d1b4690b3f8b	865
AnnaBridge	165:d1b4690b3f8b	866
AnnaBridge	165:d1b4690b3f8b	867	/**
AnnaBridge	165:d1b4690b3f8b	868	\brief Reverse byte order (16 bit)
AnnaBridge	165:d1b4690b3f8b	869	\details Reverses the byte order in unsigned short value.
AnnaBridge	165:d1b4690b3f8b	870	\param [in] value Value to reverse
AnnaBridge	165:d1b4690b3f8b	871	\return Reversed value
AnnaBridge	165:d1b4690b3f8b	872	*/
AnnaBridge	165:d1b4690b3f8b	873	__attribute__((always_inline)) __STATIC_INLINE uint16_t __REV16(uint16_t value)
AnnaBridge	165:d1b4690b3f8b	874	{
AnnaBridge	165:d1b4690b3f8b	875	uint16_t result;
AnnaBridge	165:d1b4690b3f8b	876
AnnaBridge	165:d1b4690b3f8b	877	__ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	165:d1b4690b3f8b	878	return(result);
AnnaBridge	165:d1b4690b3f8b	879	}
AnnaBridge	165:d1b4690b3f8b	880
AnnaBridge	165:d1b4690b3f8b	881
AnnaBridge	165:d1b4690b3f8b	882	/**
AnnaBridge	165:d1b4690b3f8b	883	\brief Reverse byte order in signed short value
AnnaBridge	165:d1b4690b3f8b	884	\details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge	165:d1b4690b3f8b	885	\param [in] value Value to reverse
AnnaBridge	165:d1b4690b3f8b	886	\return Reversed value
AnnaBridge	165:d1b4690b3f8b	887	*/
AnnaBridge	165:d1b4690b3f8b	888	__attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge	165:d1b4690b3f8b	889	{
AnnaBridge	165:d1b4690b3f8b	890	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	165:d1b4690b3f8b	891	return (int16_t)__builtin_bswap16(value);
AnnaBridge	165:d1b4690b3f8b	892	#else
AnnaBridge	165:d1b4690b3f8b	893	int16_t result;
AnnaBridge	165:d1b4690b3f8b	894
AnnaBridge	165:d1b4690b3f8b	895	__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	165:d1b4690b3f8b	896	return result;
AnnaBridge	165:d1b4690b3f8b	897	#endif
AnnaBridge	165:d1b4690b3f8b	898	}
AnnaBridge	165:d1b4690b3f8b	899
AnnaBridge	165:d1b4690b3f8b	900
AnnaBridge	165:d1b4690b3f8b	901	/**
AnnaBridge	165:d1b4690b3f8b	902	\brief Rotate Right in unsigned value (32 bit)
AnnaBridge	165:d1b4690b3f8b	903	\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge	165:d1b4690b3f8b	904	\param [in] op1 Value to rotate
AnnaBridge	165:d1b4690b3f8b	905	\param [in] op2 Number of Bits to rotate
AnnaBridge	165:d1b4690b3f8b	906	\return Rotated value
AnnaBridge	165:d1b4690b3f8b	907	*/
AnnaBridge	165:d1b4690b3f8b	908	__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	909	{
AnnaBridge	165:d1b4690b3f8b	910	return (op1 >> op2) \| (op1 << (32U - op2));
AnnaBridge	165:d1b4690b3f8b	911	}
AnnaBridge	165:d1b4690b3f8b	912
AnnaBridge	165:d1b4690b3f8b	913
AnnaBridge	165:d1b4690b3f8b	914	/**
AnnaBridge	165:d1b4690b3f8b	915	\brief Breakpoint
AnnaBridge	165:d1b4690b3f8b	916	\details Causes the processor to enter Debug state.
AnnaBridge	165:d1b4690b3f8b	917	Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge	165:d1b4690b3f8b	918	\param [in] value is ignored by the processor.
AnnaBridge	165:d1b4690b3f8b	919	If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge	165:d1b4690b3f8b	920	*/
AnnaBridge	165:d1b4690b3f8b	921	#define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge	165:d1b4690b3f8b	922
AnnaBridge	165:d1b4690b3f8b	923
AnnaBridge	165:d1b4690b3f8b	924	/**
AnnaBridge	165:d1b4690b3f8b	925	\brief Reverse bit order of value
AnnaBridge	165:d1b4690b3f8b	926	\details Reverses the bit order of the given value.
AnnaBridge	165:d1b4690b3f8b	927	\param [in] value Value to reverse
AnnaBridge	165:d1b4690b3f8b	928	\return Reversed value
AnnaBridge	165:d1b4690b3f8b	929	*/
AnnaBridge	165:d1b4690b3f8b	930	__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge	165:d1b4690b3f8b	931	{
AnnaBridge	165:d1b4690b3f8b	932	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	933
AnnaBridge	165:d1b4690b3f8b	934	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	935	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	936	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	937	__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge	165:d1b4690b3f8b	938	#else
AnnaBridge	165:d1b4690b3f8b	939	uint32_t s = (4U /sizeof(v)/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge	165:d1b4690b3f8b	940
AnnaBridge	165:d1b4690b3f8b	941	result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge	165:d1b4690b3f8b	942	for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge	165:d1b4690b3f8b	943	{
AnnaBridge	165:d1b4690b3f8b	944	result <<= 1U;
AnnaBridge	165:d1b4690b3f8b	945	result \|= value & 1U;
AnnaBridge	165:d1b4690b3f8b	946	s--;
AnnaBridge	165:d1b4690b3f8b	947	}
AnnaBridge	165:d1b4690b3f8b	948	result <<= s; /* shift when v's highest bits are zero */
AnnaBridge	165:d1b4690b3f8b	949	#endif
AnnaBridge	165:d1b4690b3f8b	950	return result;
AnnaBridge	165:d1b4690b3f8b	951	}
AnnaBridge	165:d1b4690b3f8b	952
AnnaBridge	165:d1b4690b3f8b	953
AnnaBridge	165:d1b4690b3f8b	954	/**
AnnaBridge	165:d1b4690b3f8b	955	\brief Count leading zeros
AnnaBridge	165:d1b4690b3f8b	956	\details Counts the number of leading zeros of a data value.
AnnaBridge	165:d1b4690b3f8b	957	\param [in] value Value to count the leading zeros
AnnaBridge	165:d1b4690b3f8b	958	\return number of leading zeros in value
AnnaBridge	165:d1b4690b3f8b	959	*/
AnnaBridge	165:d1b4690b3f8b	960	#define __CLZ __builtin_clz
AnnaBridge	165:d1b4690b3f8b	961
AnnaBridge	165:d1b4690b3f8b	962
AnnaBridge	165:d1b4690b3f8b	963	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	964	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	965	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	966	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	967	/**
AnnaBridge	165:d1b4690b3f8b	968	\brief LDR Exclusive (8 bit)
AnnaBridge	165:d1b4690b3f8b	969	\details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge	165:d1b4690b3f8b	970	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	971	\return value of type uint8_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	972	*/
AnnaBridge	165:d1b4690b3f8b	973	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge	165:d1b4690b3f8b	974	{
AnnaBridge	165:d1b4690b3f8b	975	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	976
AnnaBridge	165:d1b4690b3f8b	977	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	165:d1b4690b3f8b	978	__ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	165:d1b4690b3f8b	979	#else
AnnaBridge	165:d1b4690b3f8b	980	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	165:d1b4690b3f8b	981	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	165:d1b4690b3f8b	982	*/
AnnaBridge	165:d1b4690b3f8b	983	__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	165:d1b4690b3f8b	984	#endif
AnnaBridge	165:d1b4690b3f8b	985	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	165:d1b4690b3f8b	986	}
AnnaBridge	165:d1b4690b3f8b	987
AnnaBridge	165:d1b4690b3f8b	988
AnnaBridge	165:d1b4690b3f8b	989	/**
AnnaBridge	165:d1b4690b3f8b	990	\brief LDR Exclusive (16 bit)
AnnaBridge	165:d1b4690b3f8b	991	\details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	992	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	993	\return value of type uint16_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	994	*/
AnnaBridge	165:d1b4690b3f8b	995	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge	165:d1b4690b3f8b	996	{
AnnaBridge	165:d1b4690b3f8b	997	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	998
AnnaBridge	165:d1b4690b3f8b	999	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	165:d1b4690b3f8b	1000	__ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	165:d1b4690b3f8b	1001	#else
AnnaBridge	165:d1b4690b3f8b	1002	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	165:d1b4690b3f8b	1003	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	165:d1b4690b3f8b	1004	*/
AnnaBridge	165:d1b4690b3f8b	1005	__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	165:d1b4690b3f8b	1006	#endif
AnnaBridge	165:d1b4690b3f8b	1007	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	165:d1b4690b3f8b	1008	}
AnnaBridge	165:d1b4690b3f8b	1009
AnnaBridge	165:d1b4690b3f8b	1010
AnnaBridge	165:d1b4690b3f8b	1011	/**
AnnaBridge	165:d1b4690b3f8b	1012	\brief LDR Exclusive (32 bit)
AnnaBridge	165:d1b4690b3f8b	1013	\details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1014	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1015	\return value of type uint32_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1016	*/
AnnaBridge	165:d1b4690b3f8b	1017	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge	165:d1b4690b3f8b	1018	{
AnnaBridge	165:d1b4690b3f8b	1019	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1020
AnnaBridge	165:d1b4690b3f8b	1021	__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	165:d1b4690b3f8b	1022	return(result);
AnnaBridge	165:d1b4690b3f8b	1023	}
AnnaBridge	165:d1b4690b3f8b	1024
AnnaBridge	165:d1b4690b3f8b	1025
AnnaBridge	165:d1b4690b3f8b	1026	/**
AnnaBridge	165:d1b4690b3f8b	1027	\brief STR Exclusive (8 bit)
AnnaBridge	165:d1b4690b3f8b	1028	\details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge	165:d1b4690b3f8b	1029	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1030	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1031	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1032	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1033	*/
AnnaBridge	165:d1b4690b3f8b	1034	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge	165:d1b4690b3f8b	1035	{
AnnaBridge	165:d1b4690b3f8b	1036	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1037
AnnaBridge	165:d1b4690b3f8b	1038	__ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1039	return(result);
AnnaBridge	165:d1b4690b3f8b	1040	}
AnnaBridge	165:d1b4690b3f8b	1041
AnnaBridge	165:d1b4690b3f8b	1042
AnnaBridge	165:d1b4690b3f8b	1043	/**
AnnaBridge	165:d1b4690b3f8b	1044	\brief STR Exclusive (16 bit)
AnnaBridge	165:d1b4690b3f8b	1045	\details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1046	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1047	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1048	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1049	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1050	*/
AnnaBridge	165:d1b4690b3f8b	1051	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge	165:d1b4690b3f8b	1052	{
AnnaBridge	165:d1b4690b3f8b	1053	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1054
AnnaBridge	165:d1b4690b3f8b	1055	__ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1056	return(result);
AnnaBridge	165:d1b4690b3f8b	1057	}
AnnaBridge	165:d1b4690b3f8b	1058
AnnaBridge	165:d1b4690b3f8b	1059
AnnaBridge	165:d1b4690b3f8b	1060	/**
AnnaBridge	165:d1b4690b3f8b	1061	\brief STR Exclusive (32 bit)
AnnaBridge	165:d1b4690b3f8b	1062	\details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1063	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1064	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1065	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1066	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1067	*/
AnnaBridge	165:d1b4690b3f8b	1068	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge	165:d1b4690b3f8b	1069	{
AnnaBridge	165:d1b4690b3f8b	1070	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1071
AnnaBridge	165:d1b4690b3f8b	1072	__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge	165:d1b4690b3f8b	1073	return(result);
AnnaBridge	165:d1b4690b3f8b	1074	}
AnnaBridge	165:d1b4690b3f8b	1075
AnnaBridge	165:d1b4690b3f8b	1076
AnnaBridge	165:d1b4690b3f8b	1077	/**
AnnaBridge	165:d1b4690b3f8b	1078	\brief Remove the exclusive lock
AnnaBridge	165:d1b4690b3f8b	1079	\details Removes the exclusive lock which is created by LDREX.
AnnaBridge	165:d1b4690b3f8b	1080	*/
AnnaBridge	165:d1b4690b3f8b	1081	__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
AnnaBridge	165:d1b4690b3f8b	1082	{
AnnaBridge	165:d1b4690b3f8b	1083	__ASM volatile ("clrex" ::: "memory");
AnnaBridge	165:d1b4690b3f8b	1084	}
AnnaBridge	165:d1b4690b3f8b	1085
AnnaBridge	165:d1b4690b3f8b	1086	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1087	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1088	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1089	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	1090
AnnaBridge	165:d1b4690b3f8b	1091
AnnaBridge	165:d1b4690b3f8b	1092	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1093	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1094	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	1095	/**
AnnaBridge	165:d1b4690b3f8b	1096	\brief Signed Saturate
AnnaBridge	165:d1b4690b3f8b	1097	\details Saturates a signed value.
AnnaBridge	165:d1b4690b3f8b	1098	\param [in] ARG1 Value to be saturated
AnnaBridge	165:d1b4690b3f8b	1099	\param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge	165:d1b4690b3f8b	1100	\return Saturated value
AnnaBridge	165:d1b4690b3f8b	1101	*/
AnnaBridge	165:d1b4690b3f8b	1102	#define __SSAT(ARG1,ARG2) \
AnnaBridge	165:d1b4690b3f8b	1103	__extension__ \
AnnaBridge	165:d1b4690b3f8b	1104	({ \
AnnaBridge	165:d1b4690b3f8b	1105	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	165:d1b4690b3f8b	1106	__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	165:d1b4690b3f8b	1107	__RES; \
AnnaBridge	165:d1b4690b3f8b	1108	})
AnnaBridge	165:d1b4690b3f8b	1109
AnnaBridge	165:d1b4690b3f8b	1110
AnnaBridge	165:d1b4690b3f8b	1111	/**
AnnaBridge	165:d1b4690b3f8b	1112	\brief Unsigned Saturate
AnnaBridge	165:d1b4690b3f8b	1113	\details Saturates an unsigned value.
AnnaBridge	165:d1b4690b3f8b	1114	\param [in] ARG1 Value to be saturated
AnnaBridge	165:d1b4690b3f8b	1115	\param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge	165:d1b4690b3f8b	1116	\return Saturated value
AnnaBridge	165:d1b4690b3f8b	1117	*/
AnnaBridge	165:d1b4690b3f8b	1118	#define __USAT(ARG1,ARG2) \
AnnaBridge	165:d1b4690b3f8b	1119	__extension__ \
AnnaBridge	165:d1b4690b3f8b	1120	({ \
AnnaBridge	165:d1b4690b3f8b	1121	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	165:d1b4690b3f8b	1122	__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	165:d1b4690b3f8b	1123	__RES; \
AnnaBridge	165:d1b4690b3f8b	1124	})
AnnaBridge	165:d1b4690b3f8b	1125
AnnaBridge	165:d1b4690b3f8b	1126
AnnaBridge	165:d1b4690b3f8b	1127	/**
AnnaBridge	165:d1b4690b3f8b	1128	\brief Rotate Right with Extend (32 bit)
AnnaBridge	165:d1b4690b3f8b	1129	\details Moves each bit of a bitstring right by one bit.
AnnaBridge	165:d1b4690b3f8b	1130	The carry input is shifted in at the left end of the bitstring.
AnnaBridge	165:d1b4690b3f8b	1131	\param [in] value Value to rotate
AnnaBridge	165:d1b4690b3f8b	1132	\return Rotated value
AnnaBridge	165:d1b4690b3f8b	1133	*/
AnnaBridge	165:d1b4690b3f8b	1134	__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge	165:d1b4690b3f8b	1135	{
AnnaBridge	165:d1b4690b3f8b	1136	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1137
AnnaBridge	165:d1b4690b3f8b	1138	__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	165:d1b4690b3f8b	1139	return(result);
AnnaBridge	165:d1b4690b3f8b	1140	}
AnnaBridge	165:d1b4690b3f8b	1141
AnnaBridge	165:d1b4690b3f8b	1142
AnnaBridge	165:d1b4690b3f8b	1143	/**
AnnaBridge	165:d1b4690b3f8b	1144	\brief LDRT Unprivileged (8 bit)
AnnaBridge	165:d1b4690b3f8b	1145	\details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge	165:d1b4690b3f8b	1146	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1147	\return value of type uint8_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1148	*/
AnnaBridge	165:d1b4690b3f8b	1149	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1150	{
AnnaBridge	165:d1b4690b3f8b	1151	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1152
AnnaBridge	165:d1b4690b3f8b	1153	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	165:d1b4690b3f8b	1154	__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1155	#else
AnnaBridge	165:d1b4690b3f8b	1156	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	165:d1b4690b3f8b	1157	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	165:d1b4690b3f8b	1158	*/
AnnaBridge	165:d1b4690b3f8b	1159	__ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	165:d1b4690b3f8b	1160	#endif
AnnaBridge	165:d1b4690b3f8b	1161	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	165:d1b4690b3f8b	1162	}
AnnaBridge	165:d1b4690b3f8b	1163
AnnaBridge	165:d1b4690b3f8b	1164
AnnaBridge	165:d1b4690b3f8b	1165	/**
AnnaBridge	165:d1b4690b3f8b	1166	\brief LDRT Unprivileged (16 bit)
AnnaBridge	165:d1b4690b3f8b	1167	\details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1168	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1169	\return value of type uint16_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1170	*/
AnnaBridge	165:d1b4690b3f8b	1171	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1172	{
AnnaBridge	165:d1b4690b3f8b	1173	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1174
AnnaBridge	165:d1b4690b3f8b	1175	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	165:d1b4690b3f8b	1176	__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1177	#else
AnnaBridge	165:d1b4690b3f8b	1178	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	165:d1b4690b3f8b	1179	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	165:d1b4690b3f8b	1180	*/
AnnaBridge	165:d1b4690b3f8b	1181	__ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	165:d1b4690b3f8b	1182	#endif
AnnaBridge	165:d1b4690b3f8b	1183	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	165:d1b4690b3f8b	1184	}
AnnaBridge	165:d1b4690b3f8b	1185
AnnaBridge	165:d1b4690b3f8b	1186
AnnaBridge	165:d1b4690b3f8b	1187	/**
AnnaBridge	165:d1b4690b3f8b	1188	\brief LDRT Unprivileged (32 bit)
AnnaBridge	165:d1b4690b3f8b	1189	\details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1190	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1191	\return value of type uint32_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1192	*/
AnnaBridge	165:d1b4690b3f8b	1193	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1194	{
AnnaBridge	165:d1b4690b3f8b	1195	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1196
AnnaBridge	165:d1b4690b3f8b	1197	__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1198	return(result);
AnnaBridge	165:d1b4690b3f8b	1199	}
AnnaBridge	165:d1b4690b3f8b	1200
AnnaBridge	165:d1b4690b3f8b	1201
AnnaBridge	165:d1b4690b3f8b	1202	/**
AnnaBridge	165:d1b4690b3f8b	1203	\brief STRT Unprivileged (8 bit)
AnnaBridge	165:d1b4690b3f8b	1204	\details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge	165:d1b4690b3f8b	1205	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1206	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1207	*/
AnnaBridge	165:d1b4690b3f8b	1208	__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1209	{
AnnaBridge	165:d1b4690b3f8b	1210	__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1211	}
AnnaBridge	165:d1b4690b3f8b	1212
AnnaBridge	165:d1b4690b3f8b	1213
AnnaBridge	165:d1b4690b3f8b	1214	/**
AnnaBridge	165:d1b4690b3f8b	1215	\brief STRT Unprivileged (16 bit)
AnnaBridge	165:d1b4690b3f8b	1216	\details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1217	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1218	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1219	*/
AnnaBridge	165:d1b4690b3f8b	1220	__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1221	{
AnnaBridge	165:d1b4690b3f8b	1222	__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1223	}
AnnaBridge	165:d1b4690b3f8b	1224
AnnaBridge	165:d1b4690b3f8b	1225
AnnaBridge	165:d1b4690b3f8b	1226	/**
AnnaBridge	165:d1b4690b3f8b	1227	\brief STRT Unprivileged (32 bit)
AnnaBridge	165:d1b4690b3f8b	1228	\details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1229	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1230	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1231	*/
AnnaBridge	165:d1b4690b3f8b	1232	__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1233	{
AnnaBridge	165:d1b4690b3f8b	1234	__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge	165:d1b4690b3f8b	1235	}
AnnaBridge	165:d1b4690b3f8b	1236
AnnaBridge	165:d1b4690b3f8b	1237	#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1238	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1239	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	1240
AnnaBridge	165:d1b4690b3f8b	1241	/**
AnnaBridge	165:d1b4690b3f8b	1242	\brief Signed Saturate
AnnaBridge	165:d1b4690b3f8b	1243	\details Saturates a signed value.
AnnaBridge	165:d1b4690b3f8b	1244	\param [in] value Value to be saturated
AnnaBridge	165:d1b4690b3f8b	1245	\param [in] sat Bit position to saturate to (1..32)
AnnaBridge	165:d1b4690b3f8b	1246	\return Saturated value
AnnaBridge	165:d1b4690b3f8b	1247	*/
AnnaBridge	165:d1b4690b3f8b	1248	__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge	165:d1b4690b3f8b	1249	{
AnnaBridge	165:d1b4690b3f8b	1250	if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge	165:d1b4690b3f8b	1251	const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge	165:d1b4690b3f8b	1252	const int32_t min = -1 - max ;
AnnaBridge	165:d1b4690b3f8b	1253	if (val > max) {
AnnaBridge	165:d1b4690b3f8b	1254	return max;
AnnaBridge	165:d1b4690b3f8b	1255	} else if (val < min) {
AnnaBridge	165:d1b4690b3f8b	1256	return min;
AnnaBridge	165:d1b4690b3f8b	1257	}
AnnaBridge	165:d1b4690b3f8b	1258	}
AnnaBridge	165:d1b4690b3f8b	1259	return val;
AnnaBridge	165:d1b4690b3f8b	1260	}
AnnaBridge	165:d1b4690b3f8b	1261
AnnaBridge	165:d1b4690b3f8b	1262	/**
AnnaBridge	165:d1b4690b3f8b	1263	\brief Unsigned Saturate
AnnaBridge	165:d1b4690b3f8b	1264	\details Saturates an unsigned value.
AnnaBridge	165:d1b4690b3f8b	1265	\param [in] value Value to be saturated
AnnaBridge	165:d1b4690b3f8b	1266	\param [in] sat Bit position to saturate to (0..31)
AnnaBridge	165:d1b4690b3f8b	1267	\return Saturated value
AnnaBridge	165:d1b4690b3f8b	1268	*/
AnnaBridge	165:d1b4690b3f8b	1269	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge	165:d1b4690b3f8b	1270	{
AnnaBridge	165:d1b4690b3f8b	1271	if (sat <= 31U) {
AnnaBridge	165:d1b4690b3f8b	1272	const uint32_t max = ((1U << sat) - 1U);
AnnaBridge	165:d1b4690b3f8b	1273	if (val > (int32_t)max) {
AnnaBridge	165:d1b4690b3f8b	1274	return max;
AnnaBridge	165:d1b4690b3f8b	1275	} else if (val < 0) {
AnnaBridge	165:d1b4690b3f8b	1276	return 0U;
AnnaBridge	165:d1b4690b3f8b	1277	}
AnnaBridge	165:d1b4690b3f8b	1278	}
AnnaBridge	165:d1b4690b3f8b	1279	return (uint32_t)val;
AnnaBridge	165:d1b4690b3f8b	1280	}
AnnaBridge	165:d1b4690b3f8b	1281
AnnaBridge	165:d1b4690b3f8b	1282	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1283	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1284	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	1285
AnnaBridge	165:d1b4690b3f8b	1286
AnnaBridge	165:d1b4690b3f8b	1287	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1288	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	165:d1b4690b3f8b	1289	/**
AnnaBridge	165:d1b4690b3f8b	1290	\brief Load-Acquire (8 bit)
AnnaBridge	165:d1b4690b3f8b	1291	\details Executes a LDAB instruction for 8 bit value.
AnnaBridge	165:d1b4690b3f8b	1292	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1293	\return value of type uint8_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1294	*/
AnnaBridge	165:d1b4690b3f8b	1295	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1296	{
AnnaBridge	165:d1b4690b3f8b	1297	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1298
AnnaBridge	165:d1b4690b3f8b	1299	__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1300	return ((uint8_t) result);
AnnaBridge	165:d1b4690b3f8b	1301	}
AnnaBridge	165:d1b4690b3f8b	1302
AnnaBridge	165:d1b4690b3f8b	1303
AnnaBridge	165:d1b4690b3f8b	1304	/**
AnnaBridge	165:d1b4690b3f8b	1305	\brief Load-Acquire (16 bit)
AnnaBridge	165:d1b4690b3f8b	1306	\details Executes a LDAH instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1307	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1308	\return value of type uint16_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1309	*/
AnnaBridge	165:d1b4690b3f8b	1310	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1311	{
AnnaBridge	165:d1b4690b3f8b	1312	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1313
AnnaBridge	165:d1b4690b3f8b	1314	__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1315	return ((uint16_t) result);
AnnaBridge	165:d1b4690b3f8b	1316	}
AnnaBridge	165:d1b4690b3f8b	1317
AnnaBridge	165:d1b4690b3f8b	1318
AnnaBridge	165:d1b4690b3f8b	1319	/**
AnnaBridge	165:d1b4690b3f8b	1320	\brief Load-Acquire (32 bit)
AnnaBridge	165:d1b4690b3f8b	1321	\details Executes a LDA instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1322	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1323	\return value of type uint32_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1324	*/
AnnaBridge	165:d1b4690b3f8b	1325	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1326	{
AnnaBridge	165:d1b4690b3f8b	1327	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1328
AnnaBridge	165:d1b4690b3f8b	1329	__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1330	return(result);
AnnaBridge	165:d1b4690b3f8b	1331	}
AnnaBridge	165:d1b4690b3f8b	1332
AnnaBridge	165:d1b4690b3f8b	1333
AnnaBridge	165:d1b4690b3f8b	1334	/**
AnnaBridge	165:d1b4690b3f8b	1335	\brief Store-Release (8 bit)
AnnaBridge	165:d1b4690b3f8b	1336	\details Executes a STLB instruction for 8 bit values.
AnnaBridge	165:d1b4690b3f8b	1337	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1338	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1339	*/
AnnaBridge	165:d1b4690b3f8b	1340	__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1341	{
AnnaBridge	165:d1b4690b3f8b	1342	__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1343	}
AnnaBridge	165:d1b4690b3f8b	1344
AnnaBridge	165:d1b4690b3f8b	1345
AnnaBridge	165:d1b4690b3f8b	1346	/**
AnnaBridge	165:d1b4690b3f8b	1347	\brief Store-Release (16 bit)
AnnaBridge	165:d1b4690b3f8b	1348	\details Executes a STLH instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1349	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1350	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1351	*/
AnnaBridge	165:d1b4690b3f8b	1352	__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1353	{
AnnaBridge	165:d1b4690b3f8b	1354	__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1355	}
AnnaBridge	165:d1b4690b3f8b	1356
AnnaBridge	165:d1b4690b3f8b	1357
AnnaBridge	165:d1b4690b3f8b	1358	/**
AnnaBridge	165:d1b4690b3f8b	1359	\brief Store-Release (32 bit)
AnnaBridge	165:d1b4690b3f8b	1360	\details Executes a STL instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1361	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1362	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1363	*/
AnnaBridge	165:d1b4690b3f8b	1364	__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1365	{
AnnaBridge	165:d1b4690b3f8b	1366	__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1367	}
AnnaBridge	165:d1b4690b3f8b	1368
AnnaBridge	165:d1b4690b3f8b	1369
AnnaBridge	165:d1b4690b3f8b	1370	/**
AnnaBridge	165:d1b4690b3f8b	1371	\brief Load-Acquire Exclusive (8 bit)
AnnaBridge	165:d1b4690b3f8b	1372	\details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge	165:d1b4690b3f8b	1373	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1374	\return value of type uint8_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1375	*/
AnnaBridge	165:d1b4690b3f8b	1376	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1377	{
AnnaBridge	165:d1b4690b3f8b	1378	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1379
AnnaBridge	165:d1b4690b3f8b	1380	__ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1381	return ((uint8_t) result);
AnnaBridge	165:d1b4690b3f8b	1382	}
AnnaBridge	165:d1b4690b3f8b	1383
AnnaBridge	165:d1b4690b3f8b	1384
AnnaBridge	165:d1b4690b3f8b	1385	/**
AnnaBridge	165:d1b4690b3f8b	1386	\brief Load-Acquire Exclusive (16 bit)
AnnaBridge	165:d1b4690b3f8b	1387	\details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1388	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1389	\return value of type uint16_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1390	*/
AnnaBridge	165:d1b4690b3f8b	1391	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1392	{
AnnaBridge	165:d1b4690b3f8b	1393	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1394
AnnaBridge	165:d1b4690b3f8b	1395	__ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1396	return ((uint16_t) result);
AnnaBridge	165:d1b4690b3f8b	1397	}
AnnaBridge	165:d1b4690b3f8b	1398
AnnaBridge	165:d1b4690b3f8b	1399
AnnaBridge	165:d1b4690b3f8b	1400	/**
AnnaBridge	165:d1b4690b3f8b	1401	\brief Load-Acquire Exclusive (32 bit)
AnnaBridge	165:d1b4690b3f8b	1402	\details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1403	\param [in] ptr Pointer to data
AnnaBridge	165:d1b4690b3f8b	1404	\return value of type uint32_t at (*ptr)
AnnaBridge	165:d1b4690b3f8b	1405	*/
AnnaBridge	165:d1b4690b3f8b	1406	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1407	{
AnnaBridge	165:d1b4690b3f8b	1408	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1409
AnnaBridge	165:d1b4690b3f8b	1410	__ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	165:d1b4690b3f8b	1411	return(result);
AnnaBridge	165:d1b4690b3f8b	1412	}
AnnaBridge	165:d1b4690b3f8b	1413
AnnaBridge	165:d1b4690b3f8b	1414
AnnaBridge	165:d1b4690b3f8b	1415	/**
AnnaBridge	165:d1b4690b3f8b	1416	\brief Store-Release Exclusive (8 bit)
AnnaBridge	165:d1b4690b3f8b	1417	\details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge	165:d1b4690b3f8b	1418	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1419	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1420	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1421	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1422	*/
AnnaBridge	165:d1b4690b3f8b	1423	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1424	{
AnnaBridge	165:d1b4690b3f8b	1425	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1426
AnnaBridge	165:d1b4690b3f8b	1427	__ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1428	return(result);
AnnaBridge	165:d1b4690b3f8b	1429	}
AnnaBridge	165:d1b4690b3f8b	1430
AnnaBridge	165:d1b4690b3f8b	1431
AnnaBridge	165:d1b4690b3f8b	1432	/**
AnnaBridge	165:d1b4690b3f8b	1433	\brief Store-Release Exclusive (16 bit)
AnnaBridge	165:d1b4690b3f8b	1434	\details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge	165:d1b4690b3f8b	1435	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1436	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1437	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1438	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1439	*/
AnnaBridge	165:d1b4690b3f8b	1440	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1441	{
AnnaBridge	165:d1b4690b3f8b	1442	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1443
AnnaBridge	165:d1b4690b3f8b	1444	__ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1445	return(result);
AnnaBridge	165:d1b4690b3f8b	1446	}
AnnaBridge	165:d1b4690b3f8b	1447
AnnaBridge	165:d1b4690b3f8b	1448
AnnaBridge	165:d1b4690b3f8b	1449	/**
AnnaBridge	165:d1b4690b3f8b	1450	\brief Store-Release Exclusive (32 bit)
AnnaBridge	165:d1b4690b3f8b	1451	\details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge	165:d1b4690b3f8b	1452	\param [in] value Value to store
AnnaBridge	165:d1b4690b3f8b	1453	\param [in] ptr Pointer to location
AnnaBridge	165:d1b4690b3f8b	1454	\return 0 Function succeeded
AnnaBridge	165:d1b4690b3f8b	1455	\return 1 Function failed
AnnaBridge	165:d1b4690b3f8b	1456	*/
AnnaBridge	165:d1b4690b3f8b	1457	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	165:d1b4690b3f8b	1458	{
AnnaBridge	165:d1b4690b3f8b	1459	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1460
AnnaBridge	165:d1b4690b3f8b	1461	__ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	165:d1b4690b3f8b	1462	return(result);
AnnaBridge	165:d1b4690b3f8b	1463	}
AnnaBridge	165:d1b4690b3f8b	1464
AnnaBridge	165:d1b4690b3f8b	1465	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	165:d1b4690b3f8b	1466	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	165:d1b4690b3f8b	1467
AnnaBridge	165:d1b4690b3f8b	1468	/@}/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge	165:d1b4690b3f8b	1469
AnnaBridge	165:d1b4690b3f8b	1470
AnnaBridge	165:d1b4690b3f8b	1471	/* ################### Compiler specific Intrinsics ########################### */
AnnaBridge	165:d1b4690b3f8b	1472	/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge	165:d1b4690b3f8b	1473	Access to dedicated SIMD instructions
AnnaBridge	165:d1b4690b3f8b	1474	@{
AnnaBridge	165:d1b4690b3f8b	1475	*/
AnnaBridge	165:d1b4690b3f8b	1476
AnnaBridge	165:d1b4690b3f8b	1477	#if (__ARM_FEATURE_DSP == 1) /* ToDo ARMCLANG: This should be ARCH >= ARMv7-M + SIMD */
AnnaBridge	165:d1b4690b3f8b	1478
AnnaBridge	165:d1b4690b3f8b	1479	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1480	{
AnnaBridge	165:d1b4690b3f8b	1481	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1482
AnnaBridge	165:d1b4690b3f8b	1483	__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1484	return(result);
AnnaBridge	165:d1b4690b3f8b	1485	}
AnnaBridge	165:d1b4690b3f8b	1486
AnnaBridge	165:d1b4690b3f8b	1487	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1488	{
AnnaBridge	165:d1b4690b3f8b	1489	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1490
AnnaBridge	165:d1b4690b3f8b	1491	__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1492	return(result);
AnnaBridge	165:d1b4690b3f8b	1493	}
AnnaBridge	165:d1b4690b3f8b	1494
AnnaBridge	165:d1b4690b3f8b	1495	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1496	{
AnnaBridge	165:d1b4690b3f8b	1497	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1498
AnnaBridge	165:d1b4690b3f8b	1499	__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1500	return(result);
AnnaBridge	165:d1b4690b3f8b	1501	}
AnnaBridge	165:d1b4690b3f8b	1502
AnnaBridge	165:d1b4690b3f8b	1503	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1504	{
AnnaBridge	165:d1b4690b3f8b	1505	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1506
AnnaBridge	165:d1b4690b3f8b	1507	__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1508	return(result);
AnnaBridge	165:d1b4690b3f8b	1509	}
AnnaBridge	165:d1b4690b3f8b	1510
AnnaBridge	165:d1b4690b3f8b	1511	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1512	{
AnnaBridge	165:d1b4690b3f8b	1513	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1514
AnnaBridge	165:d1b4690b3f8b	1515	__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1516	return(result);
AnnaBridge	165:d1b4690b3f8b	1517	}
AnnaBridge	165:d1b4690b3f8b	1518
AnnaBridge	165:d1b4690b3f8b	1519	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1520	{
AnnaBridge	165:d1b4690b3f8b	1521	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1522
AnnaBridge	165:d1b4690b3f8b	1523	__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1524	return(result);
AnnaBridge	165:d1b4690b3f8b	1525	}
AnnaBridge	165:d1b4690b3f8b	1526
AnnaBridge	165:d1b4690b3f8b	1527
AnnaBridge	165:d1b4690b3f8b	1528	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1529	{
AnnaBridge	165:d1b4690b3f8b	1530	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1531
AnnaBridge	165:d1b4690b3f8b	1532	__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1533	return(result);
AnnaBridge	165:d1b4690b3f8b	1534	}
AnnaBridge	165:d1b4690b3f8b	1535
AnnaBridge	165:d1b4690b3f8b	1536	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1537	{
AnnaBridge	165:d1b4690b3f8b	1538	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1539
AnnaBridge	165:d1b4690b3f8b	1540	__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1541	return(result);
AnnaBridge	165:d1b4690b3f8b	1542	}
AnnaBridge	165:d1b4690b3f8b	1543
AnnaBridge	165:d1b4690b3f8b	1544	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1545	{
AnnaBridge	165:d1b4690b3f8b	1546	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1547
AnnaBridge	165:d1b4690b3f8b	1548	__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1549	return(result);
AnnaBridge	165:d1b4690b3f8b	1550	}
AnnaBridge	165:d1b4690b3f8b	1551
AnnaBridge	165:d1b4690b3f8b	1552	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1553	{
AnnaBridge	165:d1b4690b3f8b	1554	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1555
AnnaBridge	165:d1b4690b3f8b	1556	__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1557	return(result);
AnnaBridge	165:d1b4690b3f8b	1558	}
AnnaBridge	165:d1b4690b3f8b	1559
AnnaBridge	165:d1b4690b3f8b	1560	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1561	{
AnnaBridge	165:d1b4690b3f8b	1562	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1563
AnnaBridge	165:d1b4690b3f8b	1564	__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1565	return(result);
AnnaBridge	165:d1b4690b3f8b	1566	}
AnnaBridge	165:d1b4690b3f8b	1567
AnnaBridge	165:d1b4690b3f8b	1568	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1569	{
AnnaBridge	165:d1b4690b3f8b	1570	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1571
AnnaBridge	165:d1b4690b3f8b	1572	__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1573	return(result);
AnnaBridge	165:d1b4690b3f8b	1574	}
AnnaBridge	165:d1b4690b3f8b	1575
AnnaBridge	165:d1b4690b3f8b	1576
AnnaBridge	165:d1b4690b3f8b	1577	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1578	{
AnnaBridge	165:d1b4690b3f8b	1579	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1580
AnnaBridge	165:d1b4690b3f8b	1581	__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1582	return(result);
AnnaBridge	165:d1b4690b3f8b	1583	}
AnnaBridge	165:d1b4690b3f8b	1584
AnnaBridge	165:d1b4690b3f8b	1585	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1586	{
AnnaBridge	165:d1b4690b3f8b	1587	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1588
AnnaBridge	165:d1b4690b3f8b	1589	__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1590	return(result);
AnnaBridge	165:d1b4690b3f8b	1591	}
AnnaBridge	165:d1b4690b3f8b	1592
AnnaBridge	165:d1b4690b3f8b	1593	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1594	{
AnnaBridge	165:d1b4690b3f8b	1595	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1596
AnnaBridge	165:d1b4690b3f8b	1597	__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1598	return(result);
AnnaBridge	165:d1b4690b3f8b	1599	}
AnnaBridge	165:d1b4690b3f8b	1600
AnnaBridge	165:d1b4690b3f8b	1601	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1602	{
AnnaBridge	165:d1b4690b3f8b	1603	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1604
AnnaBridge	165:d1b4690b3f8b	1605	__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1606	return(result);
AnnaBridge	165:d1b4690b3f8b	1607	}
AnnaBridge	165:d1b4690b3f8b	1608
AnnaBridge	165:d1b4690b3f8b	1609	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1610	{
AnnaBridge	165:d1b4690b3f8b	1611	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1612
AnnaBridge	165:d1b4690b3f8b	1613	__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1614	return(result);
AnnaBridge	165:d1b4690b3f8b	1615	}
AnnaBridge	165:d1b4690b3f8b	1616
AnnaBridge	165:d1b4690b3f8b	1617	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1618	{
AnnaBridge	165:d1b4690b3f8b	1619	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1620
AnnaBridge	165:d1b4690b3f8b	1621	__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1622	return(result);
AnnaBridge	165:d1b4690b3f8b	1623	}
AnnaBridge	165:d1b4690b3f8b	1624
AnnaBridge	165:d1b4690b3f8b	1625	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1626	{
AnnaBridge	165:d1b4690b3f8b	1627	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1628
AnnaBridge	165:d1b4690b3f8b	1629	__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1630	return(result);
AnnaBridge	165:d1b4690b3f8b	1631	}
AnnaBridge	165:d1b4690b3f8b	1632
AnnaBridge	165:d1b4690b3f8b	1633	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1634	{
AnnaBridge	165:d1b4690b3f8b	1635	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1636
AnnaBridge	165:d1b4690b3f8b	1637	__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1638	return(result);
AnnaBridge	165:d1b4690b3f8b	1639	}
AnnaBridge	165:d1b4690b3f8b	1640
AnnaBridge	165:d1b4690b3f8b	1641	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1642	{
AnnaBridge	165:d1b4690b3f8b	1643	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1644
AnnaBridge	165:d1b4690b3f8b	1645	__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1646	return(result);
AnnaBridge	165:d1b4690b3f8b	1647	}
AnnaBridge	165:d1b4690b3f8b	1648
AnnaBridge	165:d1b4690b3f8b	1649	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1650	{
AnnaBridge	165:d1b4690b3f8b	1651	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1652
AnnaBridge	165:d1b4690b3f8b	1653	__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1654	return(result);
AnnaBridge	165:d1b4690b3f8b	1655	}
AnnaBridge	165:d1b4690b3f8b	1656
AnnaBridge	165:d1b4690b3f8b	1657	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1658	{
AnnaBridge	165:d1b4690b3f8b	1659	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1660
AnnaBridge	165:d1b4690b3f8b	1661	__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1662	return(result);
AnnaBridge	165:d1b4690b3f8b	1663	}
AnnaBridge	165:d1b4690b3f8b	1664
AnnaBridge	165:d1b4690b3f8b	1665	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1666	{
AnnaBridge	165:d1b4690b3f8b	1667	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1668
AnnaBridge	165:d1b4690b3f8b	1669	__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1670	return(result);
AnnaBridge	165:d1b4690b3f8b	1671	}
AnnaBridge	165:d1b4690b3f8b	1672
AnnaBridge	165:d1b4690b3f8b	1673	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1674	{
AnnaBridge	165:d1b4690b3f8b	1675	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1676
AnnaBridge	165:d1b4690b3f8b	1677	__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1678	return(result);
AnnaBridge	165:d1b4690b3f8b	1679	}
AnnaBridge	165:d1b4690b3f8b	1680
AnnaBridge	165:d1b4690b3f8b	1681	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1682	{
AnnaBridge	165:d1b4690b3f8b	1683	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1684
AnnaBridge	165:d1b4690b3f8b	1685	__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1686	return(result);
AnnaBridge	165:d1b4690b3f8b	1687	}
AnnaBridge	165:d1b4690b3f8b	1688
AnnaBridge	165:d1b4690b3f8b	1689	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1690	{
AnnaBridge	165:d1b4690b3f8b	1691	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1692
AnnaBridge	165:d1b4690b3f8b	1693	__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1694	return(result);
AnnaBridge	165:d1b4690b3f8b	1695	}
AnnaBridge	165:d1b4690b3f8b	1696
AnnaBridge	165:d1b4690b3f8b	1697	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1698	{
AnnaBridge	165:d1b4690b3f8b	1699	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1700
AnnaBridge	165:d1b4690b3f8b	1701	__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1702	return(result);
AnnaBridge	165:d1b4690b3f8b	1703	}
AnnaBridge	165:d1b4690b3f8b	1704
AnnaBridge	165:d1b4690b3f8b	1705	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1706	{
AnnaBridge	165:d1b4690b3f8b	1707	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1708
AnnaBridge	165:d1b4690b3f8b	1709	__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1710	return(result);
AnnaBridge	165:d1b4690b3f8b	1711	}
AnnaBridge	165:d1b4690b3f8b	1712
AnnaBridge	165:d1b4690b3f8b	1713	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1714	{
AnnaBridge	165:d1b4690b3f8b	1715	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1716
AnnaBridge	165:d1b4690b3f8b	1717	__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1718	return(result);
AnnaBridge	165:d1b4690b3f8b	1719	}
AnnaBridge	165:d1b4690b3f8b	1720
AnnaBridge	165:d1b4690b3f8b	1721	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1722	{
AnnaBridge	165:d1b4690b3f8b	1723	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1724
AnnaBridge	165:d1b4690b3f8b	1725	__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1726	return(result);
AnnaBridge	165:d1b4690b3f8b	1727	}
AnnaBridge	165:d1b4690b3f8b	1728
AnnaBridge	165:d1b4690b3f8b	1729	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1730	{
AnnaBridge	165:d1b4690b3f8b	1731	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1732
AnnaBridge	165:d1b4690b3f8b	1733	__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1734	return(result);
AnnaBridge	165:d1b4690b3f8b	1735	}
AnnaBridge	165:d1b4690b3f8b	1736
AnnaBridge	165:d1b4690b3f8b	1737	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1738	{
AnnaBridge	165:d1b4690b3f8b	1739	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1740
AnnaBridge	165:d1b4690b3f8b	1741	__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1742	return(result);
AnnaBridge	165:d1b4690b3f8b	1743	}
AnnaBridge	165:d1b4690b3f8b	1744
AnnaBridge	165:d1b4690b3f8b	1745	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1746	{
AnnaBridge	165:d1b4690b3f8b	1747	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1748
AnnaBridge	165:d1b4690b3f8b	1749	__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1750	return(result);
AnnaBridge	165:d1b4690b3f8b	1751	}
AnnaBridge	165:d1b4690b3f8b	1752
AnnaBridge	165:d1b4690b3f8b	1753	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1754	{
AnnaBridge	165:d1b4690b3f8b	1755	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1756
AnnaBridge	165:d1b4690b3f8b	1757	__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1758	return(result);
AnnaBridge	165:d1b4690b3f8b	1759	}
AnnaBridge	165:d1b4690b3f8b	1760
AnnaBridge	165:d1b4690b3f8b	1761	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1762	{
AnnaBridge	165:d1b4690b3f8b	1763	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1764
AnnaBridge	165:d1b4690b3f8b	1765	__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1766	return(result);
AnnaBridge	165:d1b4690b3f8b	1767	}
AnnaBridge	165:d1b4690b3f8b	1768
AnnaBridge	165:d1b4690b3f8b	1769	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1770	{
AnnaBridge	165:d1b4690b3f8b	1771	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1772
AnnaBridge	165:d1b4690b3f8b	1773	__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1774	return(result);
AnnaBridge	165:d1b4690b3f8b	1775	}
AnnaBridge	165:d1b4690b3f8b	1776
AnnaBridge	165:d1b4690b3f8b	1777	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	165:d1b4690b3f8b	1778	{
AnnaBridge	165:d1b4690b3f8b	1779	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1780
AnnaBridge	165:d1b4690b3f8b	1781	__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	1782	return(result);
AnnaBridge	165:d1b4690b3f8b	1783	}
AnnaBridge	165:d1b4690b3f8b	1784
AnnaBridge	165:d1b4690b3f8b	1785	#define __SSAT16(ARG1,ARG2) \
AnnaBridge	165:d1b4690b3f8b	1786	({ \
AnnaBridge	165:d1b4690b3f8b	1787	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	165:d1b4690b3f8b	1788	__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	165:d1b4690b3f8b	1789	__RES; \
AnnaBridge	165:d1b4690b3f8b	1790	})
AnnaBridge	165:d1b4690b3f8b	1791
AnnaBridge	165:d1b4690b3f8b	1792	#define __USAT16(ARG1,ARG2) \
AnnaBridge	165:d1b4690b3f8b	1793	({ \
AnnaBridge	165:d1b4690b3f8b	1794	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	165:d1b4690b3f8b	1795	__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	165:d1b4690b3f8b	1796	__RES; \
AnnaBridge	165:d1b4690b3f8b	1797	})
AnnaBridge	165:d1b4690b3f8b	1798
AnnaBridge	165:d1b4690b3f8b	1799	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge	165:d1b4690b3f8b	1800	{
AnnaBridge	165:d1b4690b3f8b	1801	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1802
AnnaBridge	165:d1b4690b3f8b	1803	__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	165:d1b4690b3f8b	1804	return(result);
AnnaBridge	165:d1b4690b3f8b	1805	}
AnnaBridge	165:d1b4690b3f8b	1806
AnnaBridge	165:d1b4690b3f8b	1807	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1808	{
AnnaBridge	165:d1b4690b3f8b	1809	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1810
AnnaBridge	165:d1b4690b3f8b	1811	__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1812	return(result);
AnnaBridge	165:d1b4690b3f8b	1813	}
AnnaBridge	165:d1b4690b3f8b	1814
AnnaBridge	165:d1b4690b3f8b	1815	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge	165:d1b4690b3f8b	1816	{
AnnaBridge	165:d1b4690b3f8b	1817	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1818
AnnaBridge	165:d1b4690b3f8b	1819	__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	165:d1b4690b3f8b	1820	return(result);
AnnaBridge	165:d1b4690b3f8b	1821	}
AnnaBridge	165:d1b4690b3f8b	1822
AnnaBridge	165:d1b4690b3f8b	1823	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1824	{
AnnaBridge	165:d1b4690b3f8b	1825	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1826
AnnaBridge	165:d1b4690b3f8b	1827	__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1828	return(result);
AnnaBridge	165:d1b4690b3f8b	1829	}
AnnaBridge	165:d1b4690b3f8b	1830
AnnaBridge	165:d1b4690b3f8b	1831	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1832	{
AnnaBridge	165:d1b4690b3f8b	1833	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1834
AnnaBridge	165:d1b4690b3f8b	1835	__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1836	return(result);
AnnaBridge	165:d1b4690b3f8b	1837	}
AnnaBridge	165:d1b4690b3f8b	1838
AnnaBridge	165:d1b4690b3f8b	1839	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1840	{
AnnaBridge	165:d1b4690b3f8b	1841	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1842
AnnaBridge	165:d1b4690b3f8b	1843	__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1844	return(result);
AnnaBridge	165:d1b4690b3f8b	1845	}
AnnaBridge	165:d1b4690b3f8b	1846
AnnaBridge	165:d1b4690b3f8b	1847	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	165:d1b4690b3f8b	1848	{
AnnaBridge	165:d1b4690b3f8b	1849	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1850
AnnaBridge	165:d1b4690b3f8b	1851	__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	1852	return(result);
AnnaBridge	165:d1b4690b3f8b	1853	}
AnnaBridge	165:d1b4690b3f8b	1854
AnnaBridge	165:d1b4690b3f8b	1855	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	165:d1b4690b3f8b	1856	{
AnnaBridge	165:d1b4690b3f8b	1857	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1858
AnnaBridge	165:d1b4690b3f8b	1859	__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	1860	return(result);
AnnaBridge	165:d1b4690b3f8b	1861	}
AnnaBridge	165:d1b4690b3f8b	1862
AnnaBridge	165:d1b4690b3f8b	1863	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	165:d1b4690b3f8b	1864	{
AnnaBridge	165:d1b4690b3f8b	1865	union llreg_u{
AnnaBridge	165:d1b4690b3f8b	1866	uint32_t w32[2];
AnnaBridge	165:d1b4690b3f8b	1867	uint64_t w64;
AnnaBridge	165:d1b4690b3f8b	1868	} llr;
AnnaBridge	165:d1b4690b3f8b	1869	llr.w64 = acc;
AnnaBridge	165:d1b4690b3f8b	1870
AnnaBridge	165:d1b4690b3f8b	1871	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	165:d1b4690b3f8b	1872	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	165:d1b4690b3f8b	1873	#else /* Big endian */
AnnaBridge	165:d1b4690b3f8b	1874	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	165:d1b4690b3f8b	1875	#endif
AnnaBridge	165:d1b4690b3f8b	1876
AnnaBridge	165:d1b4690b3f8b	1877	return(llr.w64);
AnnaBridge	165:d1b4690b3f8b	1878	}
AnnaBridge	165:d1b4690b3f8b	1879
AnnaBridge	165:d1b4690b3f8b	1880	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	165:d1b4690b3f8b	1881	{
AnnaBridge	165:d1b4690b3f8b	1882	union llreg_u{
AnnaBridge	165:d1b4690b3f8b	1883	uint32_t w32[2];
AnnaBridge	165:d1b4690b3f8b	1884	uint64_t w64;
AnnaBridge	165:d1b4690b3f8b	1885	} llr;
AnnaBridge	165:d1b4690b3f8b	1886	llr.w64 = acc;
AnnaBridge	165:d1b4690b3f8b	1887
AnnaBridge	165:d1b4690b3f8b	1888	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	165:d1b4690b3f8b	1889	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	165:d1b4690b3f8b	1890	#else /* Big endian */
AnnaBridge	165:d1b4690b3f8b	1891	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	165:d1b4690b3f8b	1892	#endif
AnnaBridge	165:d1b4690b3f8b	1893
AnnaBridge	165:d1b4690b3f8b	1894	return(llr.w64);
AnnaBridge	165:d1b4690b3f8b	1895	}
AnnaBridge	165:d1b4690b3f8b	1896
AnnaBridge	165:d1b4690b3f8b	1897	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1898	{
AnnaBridge	165:d1b4690b3f8b	1899	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1900
AnnaBridge	165:d1b4690b3f8b	1901	__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1902	return(result);
AnnaBridge	165:d1b4690b3f8b	1903	}
AnnaBridge	165:d1b4690b3f8b	1904
AnnaBridge	165:d1b4690b3f8b	1905	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1906	{
AnnaBridge	165:d1b4690b3f8b	1907	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1908
AnnaBridge	165:d1b4690b3f8b	1909	__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1910	return(result);
AnnaBridge	165:d1b4690b3f8b	1911	}
AnnaBridge	165:d1b4690b3f8b	1912
AnnaBridge	165:d1b4690b3f8b	1913	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	165:d1b4690b3f8b	1914	{
AnnaBridge	165:d1b4690b3f8b	1915	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1916
AnnaBridge	165:d1b4690b3f8b	1917	__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	1918	return(result);
AnnaBridge	165:d1b4690b3f8b	1919	}
AnnaBridge	165:d1b4690b3f8b	1920
AnnaBridge	165:d1b4690b3f8b	1921	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	165:d1b4690b3f8b	1922	{
AnnaBridge	165:d1b4690b3f8b	1923	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1924
AnnaBridge	165:d1b4690b3f8b	1925	__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	1926	return(result);
AnnaBridge	165:d1b4690b3f8b	1927	}
AnnaBridge	165:d1b4690b3f8b	1928
AnnaBridge	165:d1b4690b3f8b	1929	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	165:d1b4690b3f8b	1930	{
AnnaBridge	165:d1b4690b3f8b	1931	union llreg_u{
AnnaBridge	165:d1b4690b3f8b	1932	uint32_t w32[2];
AnnaBridge	165:d1b4690b3f8b	1933	uint64_t w64;
AnnaBridge	165:d1b4690b3f8b	1934	} llr;
AnnaBridge	165:d1b4690b3f8b	1935	llr.w64 = acc;
AnnaBridge	165:d1b4690b3f8b	1936
AnnaBridge	165:d1b4690b3f8b	1937	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	165:d1b4690b3f8b	1938	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	165:d1b4690b3f8b	1939	#else /* Big endian */
AnnaBridge	165:d1b4690b3f8b	1940	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	165:d1b4690b3f8b	1941	#endif
AnnaBridge	165:d1b4690b3f8b	1942
AnnaBridge	165:d1b4690b3f8b	1943	return(llr.w64);
AnnaBridge	165:d1b4690b3f8b	1944	}
AnnaBridge	165:d1b4690b3f8b	1945
AnnaBridge	165:d1b4690b3f8b	1946	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	165:d1b4690b3f8b	1947	{
AnnaBridge	165:d1b4690b3f8b	1948	union llreg_u{
AnnaBridge	165:d1b4690b3f8b	1949	uint32_t w32[2];
AnnaBridge	165:d1b4690b3f8b	1950	uint64_t w64;
AnnaBridge	165:d1b4690b3f8b	1951	} llr;
AnnaBridge	165:d1b4690b3f8b	1952	llr.w64 = acc;
AnnaBridge	165:d1b4690b3f8b	1953
AnnaBridge	165:d1b4690b3f8b	1954	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	165:d1b4690b3f8b	1955	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	165:d1b4690b3f8b	1956	#else /* Big endian */
AnnaBridge	165:d1b4690b3f8b	1957	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	165:d1b4690b3f8b	1958	#endif
AnnaBridge	165:d1b4690b3f8b	1959
AnnaBridge	165:d1b4690b3f8b	1960	return(llr.w64);
AnnaBridge	165:d1b4690b3f8b	1961	}
AnnaBridge	165:d1b4690b3f8b	1962
AnnaBridge	165:d1b4690b3f8b	1963	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge	165:d1b4690b3f8b	1964	{
AnnaBridge	165:d1b4690b3f8b	1965	uint32_t result;
AnnaBridge	165:d1b4690b3f8b	1966
AnnaBridge	165:d1b4690b3f8b	1967	__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1968	return(result);
AnnaBridge	165:d1b4690b3f8b	1969	}
AnnaBridge	165:d1b4690b3f8b	1970
AnnaBridge	165:d1b4690b3f8b	1971	__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge	165:d1b4690b3f8b	1972	{
AnnaBridge	165:d1b4690b3f8b	1973	int32_t result;
AnnaBridge	165:d1b4690b3f8b	1974
AnnaBridge	165:d1b4690b3f8b	1975	__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1976	return(result);
AnnaBridge	165:d1b4690b3f8b	1977	}
AnnaBridge	165:d1b4690b3f8b	1978
AnnaBridge	165:d1b4690b3f8b	1979	__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge	165:d1b4690b3f8b	1980	{
AnnaBridge	165:d1b4690b3f8b	1981	int32_t result;
AnnaBridge	165:d1b4690b3f8b	1982
AnnaBridge	165:d1b4690b3f8b	1983	__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	165:d1b4690b3f8b	1984	return(result);
AnnaBridge	165:d1b4690b3f8b	1985	}
AnnaBridge	165:d1b4690b3f8b	1986
AnnaBridge	165:d1b4690b3f8b	1987	#if 0
AnnaBridge	165:d1b4690b3f8b	1988	#define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge	165:d1b4690b3f8b	1989	({ \
AnnaBridge	165:d1b4690b3f8b	1990	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	165:d1b4690b3f8b	1991	__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	165:d1b4690b3f8b	1992	__RES; \
AnnaBridge	165:d1b4690b3f8b	1993	})
AnnaBridge	165:d1b4690b3f8b	1994
AnnaBridge	165:d1b4690b3f8b	1995	#define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge	165:d1b4690b3f8b	1996	({ \
AnnaBridge	165:d1b4690b3f8b	1997	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	165:d1b4690b3f8b	1998	if (ARG3 == 0) \
AnnaBridge	165:d1b4690b3f8b	1999	__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge	165:d1b4690b3f8b	2000	else \
AnnaBridge	165:d1b4690b3f8b	2001	__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	165:d1b4690b3f8b	2002	__RES; \
AnnaBridge	165:d1b4690b3f8b	2003	})
AnnaBridge	165:d1b4690b3f8b	2004	#endif
AnnaBridge	165:d1b4690b3f8b	2005
AnnaBridge	165:d1b4690b3f8b	2006	#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) \| \
AnnaBridge	165:d1b4690b3f8b	2007	((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge	165:d1b4690b3f8b	2008
AnnaBridge	165:d1b4690b3f8b	2009	#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) \| \
AnnaBridge	165:d1b4690b3f8b	2010	((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge	165:d1b4690b3f8b	2011
AnnaBridge	165:d1b4690b3f8b	2012	__attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge	165:d1b4690b3f8b	2013	{
AnnaBridge	165:d1b4690b3f8b	2014	int32_t result;
AnnaBridge	165:d1b4690b3f8b	2015
AnnaBridge	165:d1b4690b3f8b	2016	__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	165:d1b4690b3f8b	2017	return(result);
AnnaBridge	165:d1b4690b3f8b	2018	}
AnnaBridge	165:d1b4690b3f8b	2019
AnnaBridge	165:d1b4690b3f8b	2020	#endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge	165:d1b4690b3f8b	2021	/@} end of group CMSIS_SIMD_intrinsics /
AnnaBridge	165:d1b4690b3f8b	2022
AnnaBridge	165:d1b4690b3f8b	2023
AnnaBridge	165:d1b4690b3f8b	2024	#pragma GCC diagnostic pop
AnnaBridge	165:d1b4690b3f8b	2025
AnnaBridge	165:d1b4690b3f8b	2026	#endif /* __CMSIS_GCC_H */