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mbed 2

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TARGET_DISCO_L496AG/cmsis_armclang.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
165:d1b4690b3f8b
Child:
169:a7c7b631e539
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /**************************************************************************//**
AnnaBridge 165:d1b4690b3f8b 2 * @file cmsis_armclang.h
AnnaBridge 165:d1b4690b3f8b 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 165:d1b4690b3f8b 4 * @version V5.0.3
AnnaBridge 165:d1b4690b3f8b 5 * @date 27. March 2017
AnnaBridge 165:d1b4690b3f8b 6 ******************************************************************************/
AnnaBridge 165:d1b4690b3f8b 7 /*
AnnaBridge 165:d1b4690b3f8b 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 165:d1b4690b3f8b 9 *
AnnaBridge 165:d1b4690b3f8b 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 165:d1b4690b3f8b 11 *
AnnaBridge 165:d1b4690b3f8b 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 165:d1b4690b3f8b 13 * not use this file except in compliance with the License.
AnnaBridge 165:d1b4690b3f8b 14 * You may obtain a copy of the License at
AnnaBridge 165:d1b4690b3f8b 15 *
AnnaBridge 165:d1b4690b3f8b 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 165:d1b4690b3f8b 17 *
AnnaBridge 165:d1b4690b3f8b 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 165:d1b4690b3f8b 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 165:d1b4690b3f8b 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 165:d1b4690b3f8b 21 * See the License for the specific language governing permissions and
AnnaBridge 165:d1b4690b3f8b 22 * limitations under the License.
AnnaBridge 165:d1b4690b3f8b 23 */
AnnaBridge 165:d1b4690b3f8b 24
AnnaBridge 165:d1b4690b3f8b 25 /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
AnnaBridge 165:d1b4690b3f8b 26
AnnaBridge 165:d1b4690b3f8b 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 165:d1b4690b3f8b 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 165:d1b4690b3f8b 29
AnnaBridge 165:d1b4690b3f8b 30 #ifndef __ARM_COMPAT_H
AnnaBridge 165:d1b4690b3f8b 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 165:d1b4690b3f8b 32 #endif
AnnaBridge 165:d1b4690b3f8b 33
AnnaBridge 165:d1b4690b3f8b 34 /* CMSIS compiler specific defines */
AnnaBridge 165:d1b4690b3f8b 35 #ifndef __ASM
AnnaBridge 165:d1b4690b3f8b 36 #define __ASM __asm
AnnaBridge 165:d1b4690b3f8b 37 #endif
AnnaBridge 165:d1b4690b3f8b 38 #ifndef __INLINE
AnnaBridge 165:d1b4690b3f8b 39 #define __INLINE __inline
AnnaBridge 165:d1b4690b3f8b 40 #endif
AnnaBridge 165:d1b4690b3f8b 41 #ifndef __STATIC_INLINE
AnnaBridge 165:d1b4690b3f8b 42 #define __STATIC_INLINE static __inline
AnnaBridge 165:d1b4690b3f8b 43 #endif
AnnaBridge 165:d1b4690b3f8b 44 #ifndef __NO_RETURN
AnnaBridge 165:d1b4690b3f8b 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 165:d1b4690b3f8b 46 #endif
AnnaBridge 165:d1b4690b3f8b 47 #ifndef __USED
AnnaBridge 165:d1b4690b3f8b 48 #define __USED __attribute__((used))
AnnaBridge 165:d1b4690b3f8b 49 #endif
AnnaBridge 165:d1b4690b3f8b 50 #ifndef __WEAK
AnnaBridge 165:d1b4690b3f8b 51 #define __WEAK __attribute__((weak))
AnnaBridge 165:d1b4690b3f8b 52 #endif
AnnaBridge 165:d1b4690b3f8b 53 #ifndef __PACKED
AnnaBridge 165:d1b4690b3f8b 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 165:d1b4690b3f8b 55 #endif
AnnaBridge 165:d1b4690b3f8b 56 #ifndef __PACKED_STRUCT
AnnaBridge 165:d1b4690b3f8b 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 165:d1b4690b3f8b 58 #endif
AnnaBridge 165:d1b4690b3f8b 59 #ifndef __PACKED_UNION
AnnaBridge 165:d1b4690b3f8b 60 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 165:d1b4690b3f8b 61 #endif
AnnaBridge 165:d1b4690b3f8b 62 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 165:d1b4690b3f8b 63 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 64 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 65 /*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
AnnaBridge 165:d1b4690b3f8b 66 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 165:d1b4690b3f8b 67 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 68 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 165:d1b4690b3f8b 69 #endif
AnnaBridge 165:d1b4690b3f8b 70 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 165:d1b4690b3f8b 71 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 72 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 73 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 165:d1b4690b3f8b 74 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 165:d1b4690b3f8b 75 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 76 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 165:d1b4690b3f8b 77 #endif
AnnaBridge 165:d1b4690b3f8b 78 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 165:d1b4690b3f8b 79 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 80 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 81 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 165:d1b4690b3f8b 82 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 165:d1b4690b3f8b 83 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 84 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 165:d1b4690b3f8b 85 #endif
AnnaBridge 165:d1b4690b3f8b 86 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 165:d1b4690b3f8b 87 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 88 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 89 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 165:d1b4690b3f8b 90 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 165:d1b4690b3f8b 91 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 92 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 165:d1b4690b3f8b 93 #endif
AnnaBridge 165:d1b4690b3f8b 94 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 165:d1b4690b3f8b 95 #pragma clang diagnostic push
AnnaBridge 165:d1b4690b3f8b 96 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 165:d1b4690b3f8b 97 /*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
AnnaBridge 165:d1b4690b3f8b 98 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 165:d1b4690b3f8b 99 #pragma clang diagnostic pop
AnnaBridge 165:d1b4690b3f8b 100 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 165:d1b4690b3f8b 101 #endif
AnnaBridge 165:d1b4690b3f8b 102 #ifndef __ALIGNED
AnnaBridge 165:d1b4690b3f8b 103 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 165:d1b4690b3f8b 104 #endif
AnnaBridge 165:d1b4690b3f8b 105 #ifndef __RESTRICT
AnnaBridge 165:d1b4690b3f8b 106 #define __RESTRICT __restrict
AnnaBridge 165:d1b4690b3f8b 107 #endif
AnnaBridge 165:d1b4690b3f8b 108
AnnaBridge 165:d1b4690b3f8b 109
AnnaBridge 165:d1b4690b3f8b 110 /* ########################### Core Function Access ########################### */
AnnaBridge 165:d1b4690b3f8b 111 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 165:d1b4690b3f8b 112 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 165:d1b4690b3f8b 113 @{
AnnaBridge 165:d1b4690b3f8b 114 */
AnnaBridge 165:d1b4690b3f8b 115
AnnaBridge 165:d1b4690b3f8b 116 /**
AnnaBridge 165:d1b4690b3f8b 117 \brief Enable IRQ Interrupts
AnnaBridge 165:d1b4690b3f8b 118 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 165:d1b4690b3f8b 119 Can only be executed in Privileged modes.
AnnaBridge 165:d1b4690b3f8b 120 */
AnnaBridge 165:d1b4690b3f8b 121 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 165:d1b4690b3f8b 122
AnnaBridge 165:d1b4690b3f8b 123
AnnaBridge 165:d1b4690b3f8b 124 /**
AnnaBridge 165:d1b4690b3f8b 125 \brief Disable IRQ Interrupts
AnnaBridge 165:d1b4690b3f8b 126 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 165:d1b4690b3f8b 127 Can only be executed in Privileged modes.
AnnaBridge 165:d1b4690b3f8b 128 */
AnnaBridge 165:d1b4690b3f8b 129 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 165:d1b4690b3f8b 130
AnnaBridge 165:d1b4690b3f8b 131
AnnaBridge 165:d1b4690b3f8b 132 /**
AnnaBridge 165:d1b4690b3f8b 133 \brief Get Control Register
AnnaBridge 165:d1b4690b3f8b 134 \details Returns the content of the Control Register.
AnnaBridge 165:d1b4690b3f8b 135 \return Control Register value
AnnaBridge 165:d1b4690b3f8b 136 */
AnnaBridge 165:d1b4690b3f8b 137 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 165:d1b4690b3f8b 138 {
AnnaBridge 165:d1b4690b3f8b 139 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 140
AnnaBridge 165:d1b4690b3f8b 141 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 142 return(result);
AnnaBridge 165:d1b4690b3f8b 143 }
AnnaBridge 165:d1b4690b3f8b 144
AnnaBridge 165:d1b4690b3f8b 145
AnnaBridge 165:d1b4690b3f8b 146 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 147 /**
AnnaBridge 165:d1b4690b3f8b 148 \brief Get Control Register (non-secure)
AnnaBridge 165:d1b4690b3f8b 149 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 165:d1b4690b3f8b 150 \return non-secure Control Register value
AnnaBridge 165:d1b4690b3f8b 151 */
AnnaBridge 165:d1b4690b3f8b 152 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 165:d1b4690b3f8b 153 {
AnnaBridge 165:d1b4690b3f8b 154 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 155
AnnaBridge 165:d1b4690b3f8b 156 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 157 return(result);
AnnaBridge 165:d1b4690b3f8b 158 }
AnnaBridge 165:d1b4690b3f8b 159 #endif
AnnaBridge 165:d1b4690b3f8b 160
AnnaBridge 165:d1b4690b3f8b 161
AnnaBridge 165:d1b4690b3f8b 162 /**
AnnaBridge 165:d1b4690b3f8b 163 \brief Set Control Register
AnnaBridge 165:d1b4690b3f8b 164 \details Writes the given value to the Control Register.
AnnaBridge 165:d1b4690b3f8b 165 \param [in] control Control Register value to set
AnnaBridge 165:d1b4690b3f8b 166 */
AnnaBridge 165:d1b4690b3f8b 167 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 165:d1b4690b3f8b 168 {
AnnaBridge 165:d1b4690b3f8b 169 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 165:d1b4690b3f8b 170 }
AnnaBridge 165:d1b4690b3f8b 171
AnnaBridge 165:d1b4690b3f8b 172
AnnaBridge 165:d1b4690b3f8b 173 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 174 /**
AnnaBridge 165:d1b4690b3f8b 175 \brief Set Control Register (non-secure)
AnnaBridge 165:d1b4690b3f8b 176 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 165:d1b4690b3f8b 177 \param [in] control Control Register value to set
AnnaBridge 165:d1b4690b3f8b 178 */
AnnaBridge 165:d1b4690b3f8b 179 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 165:d1b4690b3f8b 180 {
AnnaBridge 165:d1b4690b3f8b 181 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 165:d1b4690b3f8b 182 }
AnnaBridge 165:d1b4690b3f8b 183 #endif
AnnaBridge 165:d1b4690b3f8b 184
AnnaBridge 165:d1b4690b3f8b 185
AnnaBridge 165:d1b4690b3f8b 186 /**
AnnaBridge 165:d1b4690b3f8b 187 \brief Get IPSR Register
AnnaBridge 165:d1b4690b3f8b 188 \details Returns the content of the IPSR Register.
AnnaBridge 165:d1b4690b3f8b 189 \return IPSR Register value
AnnaBridge 165:d1b4690b3f8b 190 */
AnnaBridge 165:d1b4690b3f8b 191 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 165:d1b4690b3f8b 192 {
AnnaBridge 165:d1b4690b3f8b 193 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 194
AnnaBridge 165:d1b4690b3f8b 195 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 196 return(result);
AnnaBridge 165:d1b4690b3f8b 197 }
AnnaBridge 165:d1b4690b3f8b 198
AnnaBridge 165:d1b4690b3f8b 199
AnnaBridge 165:d1b4690b3f8b 200 /**
AnnaBridge 165:d1b4690b3f8b 201 \brief Get APSR Register
AnnaBridge 165:d1b4690b3f8b 202 \details Returns the content of the APSR Register.
AnnaBridge 165:d1b4690b3f8b 203 \return APSR Register value
AnnaBridge 165:d1b4690b3f8b 204 */
AnnaBridge 165:d1b4690b3f8b 205 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 165:d1b4690b3f8b 206 {
AnnaBridge 165:d1b4690b3f8b 207 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 208
AnnaBridge 165:d1b4690b3f8b 209 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 210 return(result);
AnnaBridge 165:d1b4690b3f8b 211 }
AnnaBridge 165:d1b4690b3f8b 212
AnnaBridge 165:d1b4690b3f8b 213
AnnaBridge 165:d1b4690b3f8b 214 /**
AnnaBridge 165:d1b4690b3f8b 215 \brief Get xPSR Register
AnnaBridge 165:d1b4690b3f8b 216 \details Returns the content of the xPSR Register.
AnnaBridge 165:d1b4690b3f8b 217 \return xPSR Register value
AnnaBridge 165:d1b4690b3f8b 218 */
AnnaBridge 165:d1b4690b3f8b 219 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 165:d1b4690b3f8b 220 {
AnnaBridge 165:d1b4690b3f8b 221 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 222
AnnaBridge 165:d1b4690b3f8b 223 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 224 return(result);
AnnaBridge 165:d1b4690b3f8b 225 }
AnnaBridge 165:d1b4690b3f8b 226
AnnaBridge 165:d1b4690b3f8b 227
AnnaBridge 165:d1b4690b3f8b 228 /**
AnnaBridge 165:d1b4690b3f8b 229 \brief Get Process Stack Pointer
AnnaBridge 165:d1b4690b3f8b 230 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 165:d1b4690b3f8b 231 \return PSP Register value
AnnaBridge 165:d1b4690b3f8b 232 */
AnnaBridge 165:d1b4690b3f8b 233 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 165:d1b4690b3f8b 234 {
AnnaBridge 165:d1b4690b3f8b 235 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 236
AnnaBridge 165:d1b4690b3f8b 237 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 238 return(result);
AnnaBridge 165:d1b4690b3f8b 239 }
AnnaBridge 165:d1b4690b3f8b 240
AnnaBridge 165:d1b4690b3f8b 241
AnnaBridge 165:d1b4690b3f8b 242 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 243 /**
AnnaBridge 165:d1b4690b3f8b 244 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 245 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 246 \return PSP Register value
AnnaBridge 165:d1b4690b3f8b 247 */
AnnaBridge 165:d1b4690b3f8b 248 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 165:d1b4690b3f8b 249 {
AnnaBridge 165:d1b4690b3f8b 250 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 251
AnnaBridge 165:d1b4690b3f8b 252 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 253 return(result);
AnnaBridge 165:d1b4690b3f8b 254 }
AnnaBridge 165:d1b4690b3f8b 255 #endif
AnnaBridge 165:d1b4690b3f8b 256
AnnaBridge 165:d1b4690b3f8b 257
AnnaBridge 165:d1b4690b3f8b 258 /**
AnnaBridge 165:d1b4690b3f8b 259 \brief Set Process Stack Pointer
AnnaBridge 165:d1b4690b3f8b 260 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 165:d1b4690b3f8b 261 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 262 */
AnnaBridge 165:d1b4690b3f8b 263 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 165:d1b4690b3f8b 264 {
AnnaBridge 165:d1b4690b3f8b 265 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 165:d1b4690b3f8b 266 }
AnnaBridge 165:d1b4690b3f8b 267
AnnaBridge 165:d1b4690b3f8b 268
AnnaBridge 165:d1b4690b3f8b 269 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 270 /**
AnnaBridge 165:d1b4690b3f8b 271 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 272 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 273 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 274 */
AnnaBridge 165:d1b4690b3f8b 275 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 165:d1b4690b3f8b 276 {
AnnaBridge 165:d1b4690b3f8b 277 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 165:d1b4690b3f8b 278 }
AnnaBridge 165:d1b4690b3f8b 279 #endif
AnnaBridge 165:d1b4690b3f8b 280
AnnaBridge 165:d1b4690b3f8b 281
AnnaBridge 165:d1b4690b3f8b 282 /**
AnnaBridge 165:d1b4690b3f8b 283 \brief Get Main Stack Pointer
AnnaBridge 165:d1b4690b3f8b 284 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 165:d1b4690b3f8b 285 \return MSP Register value
AnnaBridge 165:d1b4690b3f8b 286 */
AnnaBridge 165:d1b4690b3f8b 287 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 165:d1b4690b3f8b 288 {
AnnaBridge 165:d1b4690b3f8b 289 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 290
AnnaBridge 165:d1b4690b3f8b 291 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 292 return(result);
AnnaBridge 165:d1b4690b3f8b 293 }
AnnaBridge 165:d1b4690b3f8b 294
AnnaBridge 165:d1b4690b3f8b 295
AnnaBridge 165:d1b4690b3f8b 296 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 297 /**
AnnaBridge 165:d1b4690b3f8b 298 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 299 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 300 \return MSP Register value
AnnaBridge 165:d1b4690b3f8b 301 */
AnnaBridge 165:d1b4690b3f8b 302 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 165:d1b4690b3f8b 303 {
AnnaBridge 165:d1b4690b3f8b 304 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 305
AnnaBridge 165:d1b4690b3f8b 306 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 307 return(result);
AnnaBridge 165:d1b4690b3f8b 308 }
AnnaBridge 165:d1b4690b3f8b 309 #endif
AnnaBridge 165:d1b4690b3f8b 310
AnnaBridge 165:d1b4690b3f8b 311
AnnaBridge 165:d1b4690b3f8b 312 /**
AnnaBridge 165:d1b4690b3f8b 313 \brief Set Main Stack Pointer
AnnaBridge 165:d1b4690b3f8b 314 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 165:d1b4690b3f8b 315 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 316 */
AnnaBridge 165:d1b4690b3f8b 317 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 165:d1b4690b3f8b 318 {
AnnaBridge 165:d1b4690b3f8b 319 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 165:d1b4690b3f8b 320 }
AnnaBridge 165:d1b4690b3f8b 321
AnnaBridge 165:d1b4690b3f8b 322
AnnaBridge 165:d1b4690b3f8b 323 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 324 /**
AnnaBridge 165:d1b4690b3f8b 325 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 326 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 327 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 328 */
AnnaBridge 165:d1b4690b3f8b 329 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 165:d1b4690b3f8b 330 {
AnnaBridge 165:d1b4690b3f8b 331 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 165:d1b4690b3f8b 332 }
AnnaBridge 165:d1b4690b3f8b 333 #endif
AnnaBridge 165:d1b4690b3f8b 334
AnnaBridge 165:d1b4690b3f8b 335
AnnaBridge 165:d1b4690b3f8b 336 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 337 /**
AnnaBridge 165:d1b4690b3f8b 338 \brief Get Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 339 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 340 \return SP Register value
AnnaBridge 165:d1b4690b3f8b 341 */
AnnaBridge 165:d1b4690b3f8b 342 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 165:d1b4690b3f8b 343 {
AnnaBridge 165:d1b4690b3f8b 344 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 345
AnnaBridge 165:d1b4690b3f8b 346 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 347 return(result);
AnnaBridge 165:d1b4690b3f8b 348 }
AnnaBridge 165:d1b4690b3f8b 349
AnnaBridge 165:d1b4690b3f8b 350
AnnaBridge 165:d1b4690b3f8b 351 /**
AnnaBridge 165:d1b4690b3f8b 352 \brief Set Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 353 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 165:d1b4690b3f8b 354 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 355 */
AnnaBridge 165:d1b4690b3f8b 356 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 165:d1b4690b3f8b 357 {
AnnaBridge 165:d1b4690b3f8b 358 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 165:d1b4690b3f8b 359 }
AnnaBridge 165:d1b4690b3f8b 360 #endif
AnnaBridge 165:d1b4690b3f8b 361
AnnaBridge 165:d1b4690b3f8b 362
AnnaBridge 165:d1b4690b3f8b 363 /**
AnnaBridge 165:d1b4690b3f8b 364 \brief Get Priority Mask
AnnaBridge 165:d1b4690b3f8b 365 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 165:d1b4690b3f8b 366 \return Priority Mask value
AnnaBridge 165:d1b4690b3f8b 367 */
AnnaBridge 165:d1b4690b3f8b 368 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 165:d1b4690b3f8b 369 {
AnnaBridge 165:d1b4690b3f8b 370 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 371
AnnaBridge 165:d1b4690b3f8b 372 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 373 return(result);
AnnaBridge 165:d1b4690b3f8b 374 }
AnnaBridge 165:d1b4690b3f8b 375
AnnaBridge 165:d1b4690b3f8b 376
AnnaBridge 165:d1b4690b3f8b 377 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 378 /**
AnnaBridge 165:d1b4690b3f8b 379 \brief Get Priority Mask (non-secure)
AnnaBridge 165:d1b4690b3f8b 380 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 165:d1b4690b3f8b 381 \return Priority Mask value
AnnaBridge 165:d1b4690b3f8b 382 */
AnnaBridge 165:d1b4690b3f8b 383 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 165:d1b4690b3f8b 384 {
AnnaBridge 165:d1b4690b3f8b 385 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 386
AnnaBridge 165:d1b4690b3f8b 387 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 388 return(result);
AnnaBridge 165:d1b4690b3f8b 389 }
AnnaBridge 165:d1b4690b3f8b 390 #endif
AnnaBridge 165:d1b4690b3f8b 391
AnnaBridge 165:d1b4690b3f8b 392
AnnaBridge 165:d1b4690b3f8b 393 /**
AnnaBridge 165:d1b4690b3f8b 394 \brief Set Priority Mask
AnnaBridge 165:d1b4690b3f8b 395 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 165:d1b4690b3f8b 396 \param [in] priMask Priority Mask
AnnaBridge 165:d1b4690b3f8b 397 */
AnnaBridge 165:d1b4690b3f8b 398 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 165:d1b4690b3f8b 399 {
AnnaBridge 165:d1b4690b3f8b 400 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 165:d1b4690b3f8b 401 }
AnnaBridge 165:d1b4690b3f8b 402
AnnaBridge 165:d1b4690b3f8b 403
AnnaBridge 165:d1b4690b3f8b 404 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 405 /**
AnnaBridge 165:d1b4690b3f8b 406 \brief Set Priority Mask (non-secure)
AnnaBridge 165:d1b4690b3f8b 407 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 165:d1b4690b3f8b 408 \param [in] priMask Priority Mask
AnnaBridge 165:d1b4690b3f8b 409 */
AnnaBridge 165:d1b4690b3f8b 410 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 165:d1b4690b3f8b 411 {
AnnaBridge 165:d1b4690b3f8b 412 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 165:d1b4690b3f8b 413 }
AnnaBridge 165:d1b4690b3f8b 414 #endif
AnnaBridge 165:d1b4690b3f8b 415
AnnaBridge 165:d1b4690b3f8b 416
AnnaBridge 165:d1b4690b3f8b 417 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 418 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 419 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 420 /**
AnnaBridge 165:d1b4690b3f8b 421 \brief Enable FIQ
AnnaBridge 165:d1b4690b3f8b 422 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 165:d1b4690b3f8b 423 Can only be executed in Privileged modes.
AnnaBridge 165:d1b4690b3f8b 424 */
AnnaBridge 165:d1b4690b3f8b 425 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 165:d1b4690b3f8b 426
AnnaBridge 165:d1b4690b3f8b 427
AnnaBridge 165:d1b4690b3f8b 428 /**
AnnaBridge 165:d1b4690b3f8b 429 \brief Disable FIQ
AnnaBridge 165:d1b4690b3f8b 430 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 165:d1b4690b3f8b 431 Can only be executed in Privileged modes.
AnnaBridge 165:d1b4690b3f8b 432 */
AnnaBridge 165:d1b4690b3f8b 433 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 165:d1b4690b3f8b 434
AnnaBridge 165:d1b4690b3f8b 435
AnnaBridge 165:d1b4690b3f8b 436 /**
AnnaBridge 165:d1b4690b3f8b 437 \brief Get Base Priority
AnnaBridge 165:d1b4690b3f8b 438 \details Returns the current value of the Base Priority register.
AnnaBridge 165:d1b4690b3f8b 439 \return Base Priority register value
AnnaBridge 165:d1b4690b3f8b 440 */
AnnaBridge 165:d1b4690b3f8b 441 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 165:d1b4690b3f8b 442 {
AnnaBridge 165:d1b4690b3f8b 443 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 444
AnnaBridge 165:d1b4690b3f8b 445 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 446 return(result);
AnnaBridge 165:d1b4690b3f8b 447 }
AnnaBridge 165:d1b4690b3f8b 448
AnnaBridge 165:d1b4690b3f8b 449
AnnaBridge 165:d1b4690b3f8b 450 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 451 /**
AnnaBridge 165:d1b4690b3f8b 452 \brief Get Base Priority (non-secure)
AnnaBridge 165:d1b4690b3f8b 453 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 165:d1b4690b3f8b 454 \return Base Priority register value
AnnaBridge 165:d1b4690b3f8b 455 */
AnnaBridge 165:d1b4690b3f8b 456 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 165:d1b4690b3f8b 457 {
AnnaBridge 165:d1b4690b3f8b 458 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 459
AnnaBridge 165:d1b4690b3f8b 460 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 461 return(result);
AnnaBridge 165:d1b4690b3f8b 462 }
AnnaBridge 165:d1b4690b3f8b 463 #endif
AnnaBridge 165:d1b4690b3f8b 464
AnnaBridge 165:d1b4690b3f8b 465
AnnaBridge 165:d1b4690b3f8b 466 /**
AnnaBridge 165:d1b4690b3f8b 467 \brief Set Base Priority
AnnaBridge 165:d1b4690b3f8b 468 \details Assigns the given value to the Base Priority register.
AnnaBridge 165:d1b4690b3f8b 469 \param [in] basePri Base Priority value to set
AnnaBridge 165:d1b4690b3f8b 470 */
AnnaBridge 165:d1b4690b3f8b 471 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 165:d1b4690b3f8b 472 {
AnnaBridge 165:d1b4690b3f8b 473 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 165:d1b4690b3f8b 474 }
AnnaBridge 165:d1b4690b3f8b 475
AnnaBridge 165:d1b4690b3f8b 476
AnnaBridge 165:d1b4690b3f8b 477 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 478 /**
AnnaBridge 165:d1b4690b3f8b 479 \brief Set Base Priority (non-secure)
AnnaBridge 165:d1b4690b3f8b 480 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 165:d1b4690b3f8b 481 \param [in] basePri Base Priority value to set
AnnaBridge 165:d1b4690b3f8b 482 */
AnnaBridge 165:d1b4690b3f8b 483 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 165:d1b4690b3f8b 484 {
AnnaBridge 165:d1b4690b3f8b 485 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 165:d1b4690b3f8b 486 }
AnnaBridge 165:d1b4690b3f8b 487 #endif
AnnaBridge 165:d1b4690b3f8b 488
AnnaBridge 165:d1b4690b3f8b 489
AnnaBridge 165:d1b4690b3f8b 490 /**
AnnaBridge 165:d1b4690b3f8b 491 \brief Set Base Priority with condition
AnnaBridge 165:d1b4690b3f8b 492 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 165:d1b4690b3f8b 493 or the new value increases the BASEPRI priority level.
AnnaBridge 165:d1b4690b3f8b 494 \param [in] basePri Base Priority value to set
AnnaBridge 165:d1b4690b3f8b 495 */
AnnaBridge 165:d1b4690b3f8b 496 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 165:d1b4690b3f8b 497 {
AnnaBridge 165:d1b4690b3f8b 498 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 165:d1b4690b3f8b 499 }
AnnaBridge 165:d1b4690b3f8b 500
AnnaBridge 165:d1b4690b3f8b 501
AnnaBridge 165:d1b4690b3f8b 502 /**
AnnaBridge 165:d1b4690b3f8b 503 \brief Get Fault Mask
AnnaBridge 165:d1b4690b3f8b 504 \details Returns the current value of the Fault Mask register.
AnnaBridge 165:d1b4690b3f8b 505 \return Fault Mask register value
AnnaBridge 165:d1b4690b3f8b 506 */
AnnaBridge 165:d1b4690b3f8b 507 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 165:d1b4690b3f8b 508 {
AnnaBridge 165:d1b4690b3f8b 509 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 510
AnnaBridge 165:d1b4690b3f8b 511 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 512 return(result);
AnnaBridge 165:d1b4690b3f8b 513 }
AnnaBridge 165:d1b4690b3f8b 514
AnnaBridge 165:d1b4690b3f8b 515
AnnaBridge 165:d1b4690b3f8b 516 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 517 /**
AnnaBridge 165:d1b4690b3f8b 518 \brief Get Fault Mask (non-secure)
AnnaBridge 165:d1b4690b3f8b 519 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 165:d1b4690b3f8b 520 \return Fault Mask register value
AnnaBridge 165:d1b4690b3f8b 521 */
AnnaBridge 165:d1b4690b3f8b 522 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 165:d1b4690b3f8b 523 {
AnnaBridge 165:d1b4690b3f8b 524 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 525
AnnaBridge 165:d1b4690b3f8b 526 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 527 return(result);
AnnaBridge 165:d1b4690b3f8b 528 }
AnnaBridge 165:d1b4690b3f8b 529 #endif
AnnaBridge 165:d1b4690b3f8b 530
AnnaBridge 165:d1b4690b3f8b 531
AnnaBridge 165:d1b4690b3f8b 532 /**
AnnaBridge 165:d1b4690b3f8b 533 \brief Set Fault Mask
AnnaBridge 165:d1b4690b3f8b 534 \details Assigns the given value to the Fault Mask register.
AnnaBridge 165:d1b4690b3f8b 535 \param [in] faultMask Fault Mask value to set
AnnaBridge 165:d1b4690b3f8b 536 */
AnnaBridge 165:d1b4690b3f8b 537 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 165:d1b4690b3f8b 538 {
AnnaBridge 165:d1b4690b3f8b 539 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 165:d1b4690b3f8b 540 }
AnnaBridge 165:d1b4690b3f8b 541
AnnaBridge 165:d1b4690b3f8b 542
AnnaBridge 165:d1b4690b3f8b 543 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 165:d1b4690b3f8b 544 /**
AnnaBridge 165:d1b4690b3f8b 545 \brief Set Fault Mask (non-secure)
AnnaBridge 165:d1b4690b3f8b 546 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 165:d1b4690b3f8b 547 \param [in] faultMask Fault Mask value to set
AnnaBridge 165:d1b4690b3f8b 548 */
AnnaBridge 165:d1b4690b3f8b 549 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 165:d1b4690b3f8b 550 {
AnnaBridge 165:d1b4690b3f8b 551 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 165:d1b4690b3f8b 552 }
AnnaBridge 165:d1b4690b3f8b 553 #endif
AnnaBridge 165:d1b4690b3f8b 554
AnnaBridge 165:d1b4690b3f8b 555 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 556 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 557 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 558
AnnaBridge 165:d1b4690b3f8b 559
AnnaBridge 165:d1b4690b3f8b 560 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 561 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 562
AnnaBridge 165:d1b4690b3f8b 563 /**
AnnaBridge 165:d1b4690b3f8b 564 \brief Get Process Stack Pointer Limit
AnnaBridge 165:d1b4690b3f8b 565 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 165:d1b4690b3f8b 566 \return PSPLIM Register value
AnnaBridge 165:d1b4690b3f8b 567 */
AnnaBridge 165:d1b4690b3f8b 568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 165:d1b4690b3f8b 569 {
AnnaBridge 165:d1b4690b3f8b 570 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 571
AnnaBridge 165:d1b4690b3f8b 572 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 573 return(result);
AnnaBridge 165:d1b4690b3f8b 574 }
AnnaBridge 165:d1b4690b3f8b 575
AnnaBridge 165:d1b4690b3f8b 576
AnnaBridge 165:d1b4690b3f8b 577 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 165:d1b4690b3f8b 578 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 579 /**
AnnaBridge 165:d1b4690b3f8b 580 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 165:d1b4690b3f8b 581 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 165:d1b4690b3f8b 582 \return PSPLIM Register value
AnnaBridge 165:d1b4690b3f8b 583 */
AnnaBridge 165:d1b4690b3f8b 584 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 165:d1b4690b3f8b 585 {
AnnaBridge 165:d1b4690b3f8b 586 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 587
AnnaBridge 165:d1b4690b3f8b 588 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 589 return(result);
AnnaBridge 165:d1b4690b3f8b 590 }
AnnaBridge 165:d1b4690b3f8b 591 #endif
AnnaBridge 165:d1b4690b3f8b 592
AnnaBridge 165:d1b4690b3f8b 593
AnnaBridge 165:d1b4690b3f8b 594 /**
AnnaBridge 165:d1b4690b3f8b 595 \brief Set Process Stack Pointer Limit
AnnaBridge 165:d1b4690b3f8b 596 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 165:d1b4690b3f8b 597 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 165:d1b4690b3f8b 598 */
AnnaBridge 165:d1b4690b3f8b 599 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 165:d1b4690b3f8b 600 {
AnnaBridge 165:d1b4690b3f8b 601 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 165:d1b4690b3f8b 602 }
AnnaBridge 165:d1b4690b3f8b 603
AnnaBridge 165:d1b4690b3f8b 604
AnnaBridge 165:d1b4690b3f8b 605 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 165:d1b4690b3f8b 606 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 607 /**
AnnaBridge 165:d1b4690b3f8b 608 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 165:d1b4690b3f8b 609 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 165:d1b4690b3f8b 610 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 165:d1b4690b3f8b 611 */
AnnaBridge 165:d1b4690b3f8b 612 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 165:d1b4690b3f8b 613 {
AnnaBridge 165:d1b4690b3f8b 614 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 165:d1b4690b3f8b 615 }
AnnaBridge 165:d1b4690b3f8b 616 #endif
AnnaBridge 165:d1b4690b3f8b 617
AnnaBridge 165:d1b4690b3f8b 618
AnnaBridge 165:d1b4690b3f8b 619 /**
AnnaBridge 165:d1b4690b3f8b 620 \brief Get Main Stack Pointer Limit
AnnaBridge 165:d1b4690b3f8b 621 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 165:d1b4690b3f8b 622 \return MSPLIM Register value
AnnaBridge 165:d1b4690b3f8b 623 */
AnnaBridge 165:d1b4690b3f8b 624 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 165:d1b4690b3f8b 625 {
AnnaBridge 165:d1b4690b3f8b 626 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 627
AnnaBridge 165:d1b4690b3f8b 628 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 629
AnnaBridge 165:d1b4690b3f8b 630 return(result);
AnnaBridge 165:d1b4690b3f8b 631 }
AnnaBridge 165:d1b4690b3f8b 632
AnnaBridge 165:d1b4690b3f8b 633
AnnaBridge 165:d1b4690b3f8b 634 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 165:d1b4690b3f8b 635 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 636 /**
AnnaBridge 165:d1b4690b3f8b 637 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 165:d1b4690b3f8b 638 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 165:d1b4690b3f8b 639 \return MSPLIM Register value
AnnaBridge 165:d1b4690b3f8b 640 */
AnnaBridge 165:d1b4690b3f8b 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 165:d1b4690b3f8b 642 {
AnnaBridge 165:d1b4690b3f8b 643 register uint32_t result;
AnnaBridge 165:d1b4690b3f8b 644
AnnaBridge 165:d1b4690b3f8b 645 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 165:d1b4690b3f8b 646 return(result);
AnnaBridge 165:d1b4690b3f8b 647 }
AnnaBridge 165:d1b4690b3f8b 648 #endif
AnnaBridge 165:d1b4690b3f8b 649
AnnaBridge 165:d1b4690b3f8b 650
AnnaBridge 165:d1b4690b3f8b 651 /**
AnnaBridge 165:d1b4690b3f8b 652 \brief Set Main Stack Pointer Limit
AnnaBridge 165:d1b4690b3f8b 653 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 165:d1b4690b3f8b 654 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 165:d1b4690b3f8b 655 */
AnnaBridge 165:d1b4690b3f8b 656 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 165:d1b4690b3f8b 657 {
AnnaBridge 165:d1b4690b3f8b 658 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 165:d1b4690b3f8b 659 }
AnnaBridge 165:d1b4690b3f8b 660
AnnaBridge 165:d1b4690b3f8b 661
AnnaBridge 165:d1b4690b3f8b 662 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 165:d1b4690b3f8b 663 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 664 /**
AnnaBridge 165:d1b4690b3f8b 665 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 165:d1b4690b3f8b 666 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 165:d1b4690b3f8b 667 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 165:d1b4690b3f8b 668 */
AnnaBridge 165:d1b4690b3f8b 669 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 165:d1b4690b3f8b 670 {
AnnaBridge 165:d1b4690b3f8b 671 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 165:d1b4690b3f8b 672 }
AnnaBridge 165:d1b4690b3f8b 673 #endif
AnnaBridge 165:d1b4690b3f8b 674
AnnaBridge 165:d1b4690b3f8b 675 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 676 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 677
AnnaBridge 165:d1b4690b3f8b 678
AnnaBridge 165:d1b4690b3f8b 679 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 680 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 681
AnnaBridge 165:d1b4690b3f8b 682 /**
AnnaBridge 165:d1b4690b3f8b 683 \brief Get FPSCR
AnnaBridge 165:d1b4690b3f8b 684 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 165:d1b4690b3f8b 685 \return Floating Point Status/Control register value
AnnaBridge 165:d1b4690b3f8b 686 */
AnnaBridge 165:d1b4690b3f8b 687 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 165:d1b4690b3f8b 688 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 165:d1b4690b3f8b 689 #define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
AnnaBridge 165:d1b4690b3f8b 690 #else
AnnaBridge 165:d1b4690b3f8b 691 #define __get_FPSCR() ((uint32_t)0U)
AnnaBridge 165:d1b4690b3f8b 692 #endif
AnnaBridge 165:d1b4690b3f8b 693
AnnaBridge 165:d1b4690b3f8b 694 /**
AnnaBridge 165:d1b4690b3f8b 695 \brief Set FPSCR
AnnaBridge 165:d1b4690b3f8b 696 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 165:d1b4690b3f8b 697 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 165:d1b4690b3f8b 698 */
AnnaBridge 165:d1b4690b3f8b 699 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 165:d1b4690b3f8b 700 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 165:d1b4690b3f8b 701 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 165:d1b4690b3f8b 702 #else
AnnaBridge 165:d1b4690b3f8b 703 #define __set_FPSCR(x) ((void)(x))
AnnaBridge 165:d1b4690b3f8b 704 #endif
AnnaBridge 165:d1b4690b3f8b 705
AnnaBridge 165:d1b4690b3f8b 706 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 707 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 708
AnnaBridge 165:d1b4690b3f8b 709
AnnaBridge 165:d1b4690b3f8b 710
AnnaBridge 165:d1b4690b3f8b 711 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 165:d1b4690b3f8b 712
AnnaBridge 165:d1b4690b3f8b 713
AnnaBridge 165:d1b4690b3f8b 714 /* ########################## Core Instruction Access ######################### */
AnnaBridge 165:d1b4690b3f8b 715 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 165:d1b4690b3f8b 716 Access to dedicated instructions
AnnaBridge 165:d1b4690b3f8b 717 @{
AnnaBridge 165:d1b4690b3f8b 718 */
AnnaBridge 165:d1b4690b3f8b 719
AnnaBridge 165:d1b4690b3f8b 720 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 165:d1b4690b3f8b 721 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 165:d1b4690b3f8b 722 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 165:d1b4690b3f8b 723 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 165:d1b4690b3f8b 724 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 165:d1b4690b3f8b 725 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 165:d1b4690b3f8b 726 #else
AnnaBridge 165:d1b4690b3f8b 727 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 165:d1b4690b3f8b 728 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 165:d1b4690b3f8b 729 #endif
AnnaBridge 165:d1b4690b3f8b 730
AnnaBridge 165:d1b4690b3f8b 731 /**
AnnaBridge 165:d1b4690b3f8b 732 \brief No Operation
AnnaBridge 165:d1b4690b3f8b 733 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 165:d1b4690b3f8b 734 */
AnnaBridge 165:d1b4690b3f8b 735 #define __NOP __builtin_arm_nop
AnnaBridge 165:d1b4690b3f8b 736
AnnaBridge 165:d1b4690b3f8b 737 /**
AnnaBridge 165:d1b4690b3f8b 738 \brief Wait For Interrupt
AnnaBridge 165:d1b4690b3f8b 739 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 165:d1b4690b3f8b 740 */
AnnaBridge 165:d1b4690b3f8b 741 #define __WFI __builtin_arm_wfi
AnnaBridge 165:d1b4690b3f8b 742
AnnaBridge 165:d1b4690b3f8b 743
AnnaBridge 165:d1b4690b3f8b 744 /**
AnnaBridge 165:d1b4690b3f8b 745 \brief Wait For Event
AnnaBridge 165:d1b4690b3f8b 746 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 165:d1b4690b3f8b 747 a low-power state until one of a number of events occurs.
AnnaBridge 165:d1b4690b3f8b 748 */
AnnaBridge 165:d1b4690b3f8b 749 #define __WFE __builtin_arm_wfe
AnnaBridge 165:d1b4690b3f8b 750
AnnaBridge 165:d1b4690b3f8b 751
AnnaBridge 165:d1b4690b3f8b 752 /**
AnnaBridge 165:d1b4690b3f8b 753 \brief Send Event
AnnaBridge 165:d1b4690b3f8b 754 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 165:d1b4690b3f8b 755 */
AnnaBridge 165:d1b4690b3f8b 756 #define __SEV __builtin_arm_sev
AnnaBridge 165:d1b4690b3f8b 757
AnnaBridge 165:d1b4690b3f8b 758
AnnaBridge 165:d1b4690b3f8b 759 /**
AnnaBridge 165:d1b4690b3f8b 760 \brief Instruction Synchronization Barrier
AnnaBridge 165:d1b4690b3f8b 761 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 165:d1b4690b3f8b 762 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 165:d1b4690b3f8b 763 after the instruction has been completed.
AnnaBridge 165:d1b4690b3f8b 764 */
AnnaBridge 165:d1b4690b3f8b 765 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 165:d1b4690b3f8b 766
AnnaBridge 165:d1b4690b3f8b 767 /**
AnnaBridge 165:d1b4690b3f8b 768 \brief Data Synchronization Barrier
AnnaBridge 165:d1b4690b3f8b 769 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 165:d1b4690b3f8b 770 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 165:d1b4690b3f8b 771 */
AnnaBridge 165:d1b4690b3f8b 772 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 165:d1b4690b3f8b 773
AnnaBridge 165:d1b4690b3f8b 774
AnnaBridge 165:d1b4690b3f8b 775 /**
AnnaBridge 165:d1b4690b3f8b 776 \brief Data Memory Barrier
AnnaBridge 165:d1b4690b3f8b 777 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 165:d1b4690b3f8b 778 and after the instruction, without ensuring their completion.
AnnaBridge 165:d1b4690b3f8b 779 */
AnnaBridge 165:d1b4690b3f8b 780 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 165:d1b4690b3f8b 781
AnnaBridge 165:d1b4690b3f8b 782
AnnaBridge 165:d1b4690b3f8b 783 /**
AnnaBridge 165:d1b4690b3f8b 784 \brief Reverse byte order (32 bit)
AnnaBridge 165:d1b4690b3f8b 785 \details Reverses the byte order in integer value.
AnnaBridge 165:d1b4690b3f8b 786 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 787 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 788 */
AnnaBridge 165:d1b4690b3f8b 789 #define __REV (uint32_t)__builtin_bswap32
AnnaBridge 165:d1b4690b3f8b 790
AnnaBridge 165:d1b4690b3f8b 791
AnnaBridge 165:d1b4690b3f8b 792 /**
AnnaBridge 165:d1b4690b3f8b 793 \brief Reverse byte order (16 bit)
AnnaBridge 165:d1b4690b3f8b 794 \details Reverses the byte order in two unsigned short values.
AnnaBridge 165:d1b4690b3f8b 795 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 796 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 797 */
AnnaBridge 165:d1b4690b3f8b 798 #define __REV16 (uint16_t)__builtin_bswap16
AnnaBridge 165:d1b4690b3f8b 799
AnnaBridge 165:d1b4690b3f8b 800
AnnaBridge 165:d1b4690b3f8b 801 /**
AnnaBridge 165:d1b4690b3f8b 802 \brief Reverse byte order in signed short value
AnnaBridge 165:d1b4690b3f8b 803 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 165:d1b4690b3f8b 804 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 805 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 806 */
AnnaBridge 165:d1b4690b3f8b 807 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 165:d1b4690b3f8b 808 {
AnnaBridge 165:d1b4690b3f8b 809 int16_t result;
AnnaBridge 165:d1b4690b3f8b 810
AnnaBridge 165:d1b4690b3f8b 811 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 165:d1b4690b3f8b 812
AnnaBridge 165:d1b4690b3f8b 813 return result;
AnnaBridge 165:d1b4690b3f8b 814 }
AnnaBridge 165:d1b4690b3f8b 815
AnnaBridge 165:d1b4690b3f8b 816
AnnaBridge 165:d1b4690b3f8b 817 /**
AnnaBridge 165:d1b4690b3f8b 818 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 165:d1b4690b3f8b 819 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 165:d1b4690b3f8b 820 \param [in] op1 Value to rotate
AnnaBridge 165:d1b4690b3f8b 821 \param [in] op2 Number of Bits to rotate
AnnaBridge 165:d1b4690b3f8b 822 \return Rotated value
AnnaBridge 165:d1b4690b3f8b 823 */
AnnaBridge 165:d1b4690b3f8b 824 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 825 {
AnnaBridge 165:d1b4690b3f8b 826 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 165:d1b4690b3f8b 827 }
AnnaBridge 165:d1b4690b3f8b 828
AnnaBridge 165:d1b4690b3f8b 829
AnnaBridge 165:d1b4690b3f8b 830 /**
AnnaBridge 165:d1b4690b3f8b 831 \brief Breakpoint
AnnaBridge 165:d1b4690b3f8b 832 \details Causes the processor to enter Debug state.
AnnaBridge 165:d1b4690b3f8b 833 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 165:d1b4690b3f8b 834 \param [in] value is ignored by the processor.
AnnaBridge 165:d1b4690b3f8b 835 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 165:d1b4690b3f8b 836 */
AnnaBridge 165:d1b4690b3f8b 837 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 165:d1b4690b3f8b 838
AnnaBridge 165:d1b4690b3f8b 839
AnnaBridge 165:d1b4690b3f8b 840 /**
AnnaBridge 165:d1b4690b3f8b 841 \brief Reverse bit order of value
AnnaBridge 165:d1b4690b3f8b 842 \details Reverses the bit order of the given value.
AnnaBridge 165:d1b4690b3f8b 843 \param [in] value Value to reverse
AnnaBridge 165:d1b4690b3f8b 844 \return Reversed value
AnnaBridge 165:d1b4690b3f8b 845 */
AnnaBridge 165:d1b4690b3f8b 846 #define __RBIT (uint32_t)__builtin_arm_rbit
AnnaBridge 165:d1b4690b3f8b 847
AnnaBridge 165:d1b4690b3f8b 848 /**
AnnaBridge 165:d1b4690b3f8b 849 \brief Count leading zeros
AnnaBridge 165:d1b4690b3f8b 850 \details Counts the number of leading zeros of a data value.
AnnaBridge 165:d1b4690b3f8b 851 \param [in] value Value to count the leading zeros
AnnaBridge 165:d1b4690b3f8b 852 \return number of leading zeros in value
AnnaBridge 165:d1b4690b3f8b 853 */
AnnaBridge 165:d1b4690b3f8b 854 #define __CLZ __builtin_clz
AnnaBridge 165:d1b4690b3f8b 855
AnnaBridge 165:d1b4690b3f8b 856
AnnaBridge 165:d1b4690b3f8b 857 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 858 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 859 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 860 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 861 /**
AnnaBridge 165:d1b4690b3f8b 862 \brief LDR Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 863 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 165:d1b4690b3f8b 864 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 865 \return value of type uint8_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 866 */
AnnaBridge 165:d1b4690b3f8b 867 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 868
AnnaBridge 165:d1b4690b3f8b 869
AnnaBridge 165:d1b4690b3f8b 870 /**
AnnaBridge 165:d1b4690b3f8b 871 \brief LDR Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 872 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 873 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 874 \return value of type uint16_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 875 */
AnnaBridge 165:d1b4690b3f8b 876 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 877
AnnaBridge 165:d1b4690b3f8b 878
AnnaBridge 165:d1b4690b3f8b 879 /**
AnnaBridge 165:d1b4690b3f8b 880 \brief LDR Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 881 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 882 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 883 \return value of type uint32_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 884 */
AnnaBridge 165:d1b4690b3f8b 885 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 165:d1b4690b3f8b 886
AnnaBridge 165:d1b4690b3f8b 887
AnnaBridge 165:d1b4690b3f8b 888 /**
AnnaBridge 165:d1b4690b3f8b 889 \brief STR Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 890 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 165:d1b4690b3f8b 891 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 892 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 893 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 894 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 895 */
AnnaBridge 165:d1b4690b3f8b 896 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 897
AnnaBridge 165:d1b4690b3f8b 898
AnnaBridge 165:d1b4690b3f8b 899 /**
AnnaBridge 165:d1b4690b3f8b 900 \brief STR Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 901 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 902 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 903 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 904 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 905 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 906 */
AnnaBridge 165:d1b4690b3f8b 907 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 908
AnnaBridge 165:d1b4690b3f8b 909
AnnaBridge 165:d1b4690b3f8b 910 /**
AnnaBridge 165:d1b4690b3f8b 911 \brief STR Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 912 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 913 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 914 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 915 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 916 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 917 */
AnnaBridge 165:d1b4690b3f8b 918 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 165:d1b4690b3f8b 919
AnnaBridge 165:d1b4690b3f8b 920
AnnaBridge 165:d1b4690b3f8b 921 /**
AnnaBridge 165:d1b4690b3f8b 922 \brief Remove the exclusive lock
AnnaBridge 165:d1b4690b3f8b 923 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 165:d1b4690b3f8b 924 */
AnnaBridge 165:d1b4690b3f8b 925 #define __CLREX __builtin_arm_clrex
AnnaBridge 165:d1b4690b3f8b 926
AnnaBridge 165:d1b4690b3f8b 927 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 928 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 929 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 930 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 931
AnnaBridge 165:d1b4690b3f8b 932
AnnaBridge 165:d1b4690b3f8b 933 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 934 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 935 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 936
AnnaBridge 165:d1b4690b3f8b 937 /**
AnnaBridge 165:d1b4690b3f8b 938 \brief Signed Saturate
AnnaBridge 165:d1b4690b3f8b 939 \details Saturates a signed value.
AnnaBridge 165:d1b4690b3f8b 940 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 941 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 165:d1b4690b3f8b 942 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 943 */
AnnaBridge 165:d1b4690b3f8b 944 #define __SSAT __builtin_arm_ssat
AnnaBridge 165:d1b4690b3f8b 945
AnnaBridge 165:d1b4690b3f8b 946
AnnaBridge 165:d1b4690b3f8b 947 /**
AnnaBridge 165:d1b4690b3f8b 948 \brief Unsigned Saturate
AnnaBridge 165:d1b4690b3f8b 949 \details Saturates an unsigned value.
AnnaBridge 165:d1b4690b3f8b 950 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 951 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 165:d1b4690b3f8b 952 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 953 */
AnnaBridge 165:d1b4690b3f8b 954 #define __USAT __builtin_arm_usat
AnnaBridge 165:d1b4690b3f8b 955
AnnaBridge 165:d1b4690b3f8b 956
AnnaBridge 165:d1b4690b3f8b 957 /**
AnnaBridge 165:d1b4690b3f8b 958 \brief Rotate Right with Extend (32 bit)
AnnaBridge 165:d1b4690b3f8b 959 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 165:d1b4690b3f8b 960 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 165:d1b4690b3f8b 961 \param [in] value Value to rotate
AnnaBridge 165:d1b4690b3f8b 962 \return Rotated value
AnnaBridge 165:d1b4690b3f8b 963 */
AnnaBridge 165:d1b4690b3f8b 964 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 165:d1b4690b3f8b 965 {
AnnaBridge 165:d1b4690b3f8b 966 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 967
AnnaBridge 165:d1b4690b3f8b 968 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 165:d1b4690b3f8b 969 return(result);
AnnaBridge 165:d1b4690b3f8b 970 }
AnnaBridge 165:d1b4690b3f8b 971
AnnaBridge 165:d1b4690b3f8b 972
AnnaBridge 165:d1b4690b3f8b 973 /**
AnnaBridge 165:d1b4690b3f8b 974 \brief LDRT Unprivileged (8 bit)
AnnaBridge 165:d1b4690b3f8b 975 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 165:d1b4690b3f8b 976 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 977 \return value of type uint8_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 978 */
AnnaBridge 165:d1b4690b3f8b 979 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 165:d1b4690b3f8b 980 {
AnnaBridge 165:d1b4690b3f8b 981 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 982
AnnaBridge 165:d1b4690b3f8b 983 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 984 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 165:d1b4690b3f8b 985 }
AnnaBridge 165:d1b4690b3f8b 986
AnnaBridge 165:d1b4690b3f8b 987
AnnaBridge 165:d1b4690b3f8b 988 /**
AnnaBridge 165:d1b4690b3f8b 989 \brief LDRT Unprivileged (16 bit)
AnnaBridge 165:d1b4690b3f8b 990 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 991 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 992 \return value of type uint16_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 993 */
AnnaBridge 165:d1b4690b3f8b 994 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 165:d1b4690b3f8b 995 {
AnnaBridge 165:d1b4690b3f8b 996 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 997
AnnaBridge 165:d1b4690b3f8b 998 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 999 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 165:d1b4690b3f8b 1000 }
AnnaBridge 165:d1b4690b3f8b 1001
AnnaBridge 165:d1b4690b3f8b 1002
AnnaBridge 165:d1b4690b3f8b 1003 /**
AnnaBridge 165:d1b4690b3f8b 1004 \brief LDRT Unprivileged (32 bit)
AnnaBridge 165:d1b4690b3f8b 1005 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1006 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1007 \return value of type uint32_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1008 */
AnnaBridge 165:d1b4690b3f8b 1009 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1010 {
AnnaBridge 165:d1b4690b3f8b 1011 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1012
AnnaBridge 165:d1b4690b3f8b 1013 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 1014 return(result);
AnnaBridge 165:d1b4690b3f8b 1015 }
AnnaBridge 165:d1b4690b3f8b 1016
AnnaBridge 165:d1b4690b3f8b 1017
AnnaBridge 165:d1b4690b3f8b 1018 /**
AnnaBridge 165:d1b4690b3f8b 1019 \brief STRT Unprivileged (8 bit)
AnnaBridge 165:d1b4690b3f8b 1020 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 165:d1b4690b3f8b 1021 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1022 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1023 */
AnnaBridge 165:d1b4690b3f8b 1024 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1025 {
AnnaBridge 165:d1b4690b3f8b 1026 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 165:d1b4690b3f8b 1027 }
AnnaBridge 165:d1b4690b3f8b 1028
AnnaBridge 165:d1b4690b3f8b 1029
AnnaBridge 165:d1b4690b3f8b 1030 /**
AnnaBridge 165:d1b4690b3f8b 1031 \brief STRT Unprivileged (16 bit)
AnnaBridge 165:d1b4690b3f8b 1032 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 1033 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1034 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1035 */
AnnaBridge 165:d1b4690b3f8b 1036 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1037 {
AnnaBridge 165:d1b4690b3f8b 1038 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 165:d1b4690b3f8b 1039 }
AnnaBridge 165:d1b4690b3f8b 1040
AnnaBridge 165:d1b4690b3f8b 1041
AnnaBridge 165:d1b4690b3f8b 1042 /**
AnnaBridge 165:d1b4690b3f8b 1043 \brief STRT Unprivileged (32 bit)
AnnaBridge 165:d1b4690b3f8b 1044 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1045 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1046 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1047 */
AnnaBridge 165:d1b4690b3f8b 1048 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1049 {
AnnaBridge 165:d1b4690b3f8b 1050 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 165:d1b4690b3f8b 1051 }
AnnaBridge 165:d1b4690b3f8b 1052
AnnaBridge 165:d1b4690b3f8b 1053 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1054 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1055 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 1056
AnnaBridge 165:d1b4690b3f8b 1057 /**
AnnaBridge 165:d1b4690b3f8b 1058 \brief Signed Saturate
AnnaBridge 165:d1b4690b3f8b 1059 \details Saturates a signed value.
AnnaBridge 165:d1b4690b3f8b 1060 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 1061 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 165:d1b4690b3f8b 1062 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 1063 */
AnnaBridge 165:d1b4690b3f8b 1064 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge 165:d1b4690b3f8b 1065 {
AnnaBridge 165:d1b4690b3f8b 1066 if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge 165:d1b4690b3f8b 1067 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 165:d1b4690b3f8b 1068 const int32_t min = -1 - max ;
AnnaBridge 165:d1b4690b3f8b 1069 if (val > max) {
AnnaBridge 165:d1b4690b3f8b 1070 return max;
AnnaBridge 165:d1b4690b3f8b 1071 } else if (val < min) {
AnnaBridge 165:d1b4690b3f8b 1072 return min;
AnnaBridge 165:d1b4690b3f8b 1073 }
AnnaBridge 165:d1b4690b3f8b 1074 }
AnnaBridge 165:d1b4690b3f8b 1075 return val;
AnnaBridge 165:d1b4690b3f8b 1076 }
AnnaBridge 165:d1b4690b3f8b 1077
AnnaBridge 165:d1b4690b3f8b 1078 /**
AnnaBridge 165:d1b4690b3f8b 1079 \brief Unsigned Saturate
AnnaBridge 165:d1b4690b3f8b 1080 \details Saturates an unsigned value.
AnnaBridge 165:d1b4690b3f8b 1081 \param [in] value Value to be saturated
AnnaBridge 165:d1b4690b3f8b 1082 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 165:d1b4690b3f8b 1083 \return Saturated value
AnnaBridge 165:d1b4690b3f8b 1084 */
AnnaBridge 165:d1b4690b3f8b 1085 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge 165:d1b4690b3f8b 1086 {
AnnaBridge 165:d1b4690b3f8b 1087 if (sat <= 31U) {
AnnaBridge 165:d1b4690b3f8b 1088 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 165:d1b4690b3f8b 1089 if (val > (int32_t)max) {
AnnaBridge 165:d1b4690b3f8b 1090 return max;
AnnaBridge 165:d1b4690b3f8b 1091 } else if (val < 0) {
AnnaBridge 165:d1b4690b3f8b 1092 return 0U;
AnnaBridge 165:d1b4690b3f8b 1093 }
AnnaBridge 165:d1b4690b3f8b 1094 }
AnnaBridge 165:d1b4690b3f8b 1095 return (uint32_t)val;
AnnaBridge 165:d1b4690b3f8b 1096 }
AnnaBridge 165:d1b4690b3f8b 1097
AnnaBridge 165:d1b4690b3f8b 1098 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1099 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1100 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 1101
AnnaBridge 165:d1b4690b3f8b 1102
AnnaBridge 165:d1b4690b3f8b 1103 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1104 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 165:d1b4690b3f8b 1105 /**
AnnaBridge 165:d1b4690b3f8b 1106 \brief Load-Acquire (8 bit)
AnnaBridge 165:d1b4690b3f8b 1107 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 165:d1b4690b3f8b 1108 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1109 \return value of type uint8_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1110 */
AnnaBridge 165:d1b4690b3f8b 1111 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1112 {
AnnaBridge 165:d1b4690b3f8b 1113 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1114
AnnaBridge 165:d1b4690b3f8b 1115 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 1116 return ((uint8_t) result);
AnnaBridge 165:d1b4690b3f8b 1117 }
AnnaBridge 165:d1b4690b3f8b 1118
AnnaBridge 165:d1b4690b3f8b 1119
AnnaBridge 165:d1b4690b3f8b 1120 /**
AnnaBridge 165:d1b4690b3f8b 1121 \brief Load-Acquire (16 bit)
AnnaBridge 165:d1b4690b3f8b 1122 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 1123 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1124 \return value of type uint16_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1125 */
AnnaBridge 165:d1b4690b3f8b 1126 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1127 {
AnnaBridge 165:d1b4690b3f8b 1128 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1129
AnnaBridge 165:d1b4690b3f8b 1130 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 1131 return ((uint16_t) result);
AnnaBridge 165:d1b4690b3f8b 1132 }
AnnaBridge 165:d1b4690b3f8b 1133
AnnaBridge 165:d1b4690b3f8b 1134
AnnaBridge 165:d1b4690b3f8b 1135 /**
AnnaBridge 165:d1b4690b3f8b 1136 \brief Load-Acquire (32 bit)
AnnaBridge 165:d1b4690b3f8b 1137 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1138 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1139 \return value of type uint32_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1140 */
AnnaBridge 165:d1b4690b3f8b 1141 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1142 {
AnnaBridge 165:d1b4690b3f8b 1143 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1144
AnnaBridge 165:d1b4690b3f8b 1145 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 165:d1b4690b3f8b 1146 return(result);
AnnaBridge 165:d1b4690b3f8b 1147 }
AnnaBridge 165:d1b4690b3f8b 1148
AnnaBridge 165:d1b4690b3f8b 1149
AnnaBridge 165:d1b4690b3f8b 1150 /**
AnnaBridge 165:d1b4690b3f8b 1151 \brief Store-Release (8 bit)
AnnaBridge 165:d1b4690b3f8b 1152 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 165:d1b4690b3f8b 1153 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1154 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1155 */
AnnaBridge 165:d1b4690b3f8b 1156 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1157 {
AnnaBridge 165:d1b4690b3f8b 1158 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 165:d1b4690b3f8b 1159 }
AnnaBridge 165:d1b4690b3f8b 1160
AnnaBridge 165:d1b4690b3f8b 1161
AnnaBridge 165:d1b4690b3f8b 1162 /**
AnnaBridge 165:d1b4690b3f8b 1163 \brief Store-Release (16 bit)
AnnaBridge 165:d1b4690b3f8b 1164 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 1165 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1166 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1167 */
AnnaBridge 165:d1b4690b3f8b 1168 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1169 {
AnnaBridge 165:d1b4690b3f8b 1170 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 165:d1b4690b3f8b 1171 }
AnnaBridge 165:d1b4690b3f8b 1172
AnnaBridge 165:d1b4690b3f8b 1173
AnnaBridge 165:d1b4690b3f8b 1174 /**
AnnaBridge 165:d1b4690b3f8b 1175 \brief Store-Release (32 bit)
AnnaBridge 165:d1b4690b3f8b 1176 \details Executes a STL instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1177 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1178 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1179 */
AnnaBridge 165:d1b4690b3f8b 1180 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 165:d1b4690b3f8b 1181 {
AnnaBridge 165:d1b4690b3f8b 1182 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 165:d1b4690b3f8b 1183 }
AnnaBridge 165:d1b4690b3f8b 1184
AnnaBridge 165:d1b4690b3f8b 1185
AnnaBridge 165:d1b4690b3f8b 1186 /**
AnnaBridge 165:d1b4690b3f8b 1187 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 1188 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 165:d1b4690b3f8b 1189 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1190 \return value of type uint8_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1191 */
AnnaBridge 165:d1b4690b3f8b 1192 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 165:d1b4690b3f8b 1193
AnnaBridge 165:d1b4690b3f8b 1194
AnnaBridge 165:d1b4690b3f8b 1195 /**
AnnaBridge 165:d1b4690b3f8b 1196 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 1197 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 1198 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1199 \return value of type uint16_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1200 */
AnnaBridge 165:d1b4690b3f8b 1201 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 165:d1b4690b3f8b 1202
AnnaBridge 165:d1b4690b3f8b 1203
AnnaBridge 165:d1b4690b3f8b 1204 /**
AnnaBridge 165:d1b4690b3f8b 1205 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 1206 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1207 \param [in] ptr Pointer to data
AnnaBridge 165:d1b4690b3f8b 1208 \return value of type uint32_t at (*ptr)
AnnaBridge 165:d1b4690b3f8b 1209 */
AnnaBridge 165:d1b4690b3f8b 1210 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 165:d1b4690b3f8b 1211
AnnaBridge 165:d1b4690b3f8b 1212
AnnaBridge 165:d1b4690b3f8b 1213 /**
AnnaBridge 165:d1b4690b3f8b 1214 \brief Store-Release Exclusive (8 bit)
AnnaBridge 165:d1b4690b3f8b 1215 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 165:d1b4690b3f8b 1216 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1217 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1218 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 1219 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 1220 */
AnnaBridge 165:d1b4690b3f8b 1221 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 165:d1b4690b3f8b 1222
AnnaBridge 165:d1b4690b3f8b 1223
AnnaBridge 165:d1b4690b3f8b 1224 /**
AnnaBridge 165:d1b4690b3f8b 1225 \brief Store-Release Exclusive (16 bit)
AnnaBridge 165:d1b4690b3f8b 1226 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 165:d1b4690b3f8b 1227 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1228 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1229 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 1230 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 1231 */
AnnaBridge 165:d1b4690b3f8b 1232 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 165:d1b4690b3f8b 1233
AnnaBridge 165:d1b4690b3f8b 1234
AnnaBridge 165:d1b4690b3f8b 1235 /**
AnnaBridge 165:d1b4690b3f8b 1236 \brief Store-Release Exclusive (32 bit)
AnnaBridge 165:d1b4690b3f8b 1237 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 165:d1b4690b3f8b 1238 \param [in] value Value to store
AnnaBridge 165:d1b4690b3f8b 1239 \param [in] ptr Pointer to location
AnnaBridge 165:d1b4690b3f8b 1240 \return 0 Function succeeded
AnnaBridge 165:d1b4690b3f8b 1241 \return 1 Function failed
AnnaBridge 165:d1b4690b3f8b 1242 */
AnnaBridge 165:d1b4690b3f8b 1243 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 165:d1b4690b3f8b 1244
AnnaBridge 165:d1b4690b3f8b 1245 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 165:d1b4690b3f8b 1246 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 165:d1b4690b3f8b 1247
AnnaBridge 165:d1b4690b3f8b 1248 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 165:d1b4690b3f8b 1249
AnnaBridge 165:d1b4690b3f8b 1250
AnnaBridge 165:d1b4690b3f8b 1251 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 165:d1b4690b3f8b 1252 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 165:d1b4690b3f8b 1253 Access to dedicated SIMD instructions
AnnaBridge 165:d1b4690b3f8b 1254 @{
AnnaBridge 165:d1b4690b3f8b 1255 */
AnnaBridge 165:d1b4690b3f8b 1256
AnnaBridge 165:d1b4690b3f8b 1257 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 165:d1b4690b3f8b 1258
AnnaBridge 165:d1b4690b3f8b 1259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1260 {
AnnaBridge 165:d1b4690b3f8b 1261 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1262
AnnaBridge 165:d1b4690b3f8b 1263 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1264 return(result);
AnnaBridge 165:d1b4690b3f8b 1265 }
AnnaBridge 165:d1b4690b3f8b 1266
AnnaBridge 165:d1b4690b3f8b 1267 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1268 {
AnnaBridge 165:d1b4690b3f8b 1269 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1270
AnnaBridge 165:d1b4690b3f8b 1271 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1272 return(result);
AnnaBridge 165:d1b4690b3f8b 1273 }
AnnaBridge 165:d1b4690b3f8b 1274
AnnaBridge 165:d1b4690b3f8b 1275 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1276 {
AnnaBridge 165:d1b4690b3f8b 1277 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1278
AnnaBridge 165:d1b4690b3f8b 1279 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1280 return(result);
AnnaBridge 165:d1b4690b3f8b 1281 }
AnnaBridge 165:d1b4690b3f8b 1282
AnnaBridge 165:d1b4690b3f8b 1283 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1284 {
AnnaBridge 165:d1b4690b3f8b 1285 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1286
AnnaBridge 165:d1b4690b3f8b 1287 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1288 return(result);
AnnaBridge 165:d1b4690b3f8b 1289 }
AnnaBridge 165:d1b4690b3f8b 1290
AnnaBridge 165:d1b4690b3f8b 1291 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1292 {
AnnaBridge 165:d1b4690b3f8b 1293 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1294
AnnaBridge 165:d1b4690b3f8b 1295 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1296 return(result);
AnnaBridge 165:d1b4690b3f8b 1297 }
AnnaBridge 165:d1b4690b3f8b 1298
AnnaBridge 165:d1b4690b3f8b 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1300 {
AnnaBridge 165:d1b4690b3f8b 1301 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1302
AnnaBridge 165:d1b4690b3f8b 1303 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1304 return(result);
AnnaBridge 165:d1b4690b3f8b 1305 }
AnnaBridge 165:d1b4690b3f8b 1306
AnnaBridge 165:d1b4690b3f8b 1307
AnnaBridge 165:d1b4690b3f8b 1308 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1309 {
AnnaBridge 165:d1b4690b3f8b 1310 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1311
AnnaBridge 165:d1b4690b3f8b 1312 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1313 return(result);
AnnaBridge 165:d1b4690b3f8b 1314 }
AnnaBridge 165:d1b4690b3f8b 1315
AnnaBridge 165:d1b4690b3f8b 1316 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1317 {
AnnaBridge 165:d1b4690b3f8b 1318 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1319
AnnaBridge 165:d1b4690b3f8b 1320 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1321 return(result);
AnnaBridge 165:d1b4690b3f8b 1322 }
AnnaBridge 165:d1b4690b3f8b 1323
AnnaBridge 165:d1b4690b3f8b 1324 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1325 {
AnnaBridge 165:d1b4690b3f8b 1326 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1327
AnnaBridge 165:d1b4690b3f8b 1328 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1329 return(result);
AnnaBridge 165:d1b4690b3f8b 1330 }
AnnaBridge 165:d1b4690b3f8b 1331
AnnaBridge 165:d1b4690b3f8b 1332 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1333 {
AnnaBridge 165:d1b4690b3f8b 1334 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1335
AnnaBridge 165:d1b4690b3f8b 1336 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1337 return(result);
AnnaBridge 165:d1b4690b3f8b 1338 }
AnnaBridge 165:d1b4690b3f8b 1339
AnnaBridge 165:d1b4690b3f8b 1340 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1341 {
AnnaBridge 165:d1b4690b3f8b 1342 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1343
AnnaBridge 165:d1b4690b3f8b 1344 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1345 return(result);
AnnaBridge 165:d1b4690b3f8b 1346 }
AnnaBridge 165:d1b4690b3f8b 1347
AnnaBridge 165:d1b4690b3f8b 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1349 {
AnnaBridge 165:d1b4690b3f8b 1350 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1351
AnnaBridge 165:d1b4690b3f8b 1352 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1353 return(result);
AnnaBridge 165:d1b4690b3f8b 1354 }
AnnaBridge 165:d1b4690b3f8b 1355
AnnaBridge 165:d1b4690b3f8b 1356
AnnaBridge 165:d1b4690b3f8b 1357 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1358 {
AnnaBridge 165:d1b4690b3f8b 1359 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1360
AnnaBridge 165:d1b4690b3f8b 1361 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1362 return(result);
AnnaBridge 165:d1b4690b3f8b 1363 }
AnnaBridge 165:d1b4690b3f8b 1364
AnnaBridge 165:d1b4690b3f8b 1365 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1366 {
AnnaBridge 165:d1b4690b3f8b 1367 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1368
AnnaBridge 165:d1b4690b3f8b 1369 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1370 return(result);
AnnaBridge 165:d1b4690b3f8b 1371 }
AnnaBridge 165:d1b4690b3f8b 1372
AnnaBridge 165:d1b4690b3f8b 1373 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1374 {
AnnaBridge 165:d1b4690b3f8b 1375 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1376
AnnaBridge 165:d1b4690b3f8b 1377 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1378 return(result);
AnnaBridge 165:d1b4690b3f8b 1379 }
AnnaBridge 165:d1b4690b3f8b 1380
AnnaBridge 165:d1b4690b3f8b 1381 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1382 {
AnnaBridge 165:d1b4690b3f8b 1383 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1384
AnnaBridge 165:d1b4690b3f8b 1385 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1386 return(result);
AnnaBridge 165:d1b4690b3f8b 1387 }
AnnaBridge 165:d1b4690b3f8b 1388
AnnaBridge 165:d1b4690b3f8b 1389 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1390 {
AnnaBridge 165:d1b4690b3f8b 1391 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1392
AnnaBridge 165:d1b4690b3f8b 1393 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1394 return(result);
AnnaBridge 165:d1b4690b3f8b 1395 }
AnnaBridge 165:d1b4690b3f8b 1396
AnnaBridge 165:d1b4690b3f8b 1397 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1398 {
AnnaBridge 165:d1b4690b3f8b 1399 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1400
AnnaBridge 165:d1b4690b3f8b 1401 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1402 return(result);
AnnaBridge 165:d1b4690b3f8b 1403 }
AnnaBridge 165:d1b4690b3f8b 1404
AnnaBridge 165:d1b4690b3f8b 1405 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1406 {
AnnaBridge 165:d1b4690b3f8b 1407 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1408
AnnaBridge 165:d1b4690b3f8b 1409 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1410 return(result);
AnnaBridge 165:d1b4690b3f8b 1411 }
AnnaBridge 165:d1b4690b3f8b 1412
AnnaBridge 165:d1b4690b3f8b 1413 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1414 {
AnnaBridge 165:d1b4690b3f8b 1415 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1416
AnnaBridge 165:d1b4690b3f8b 1417 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1418 return(result);
AnnaBridge 165:d1b4690b3f8b 1419 }
AnnaBridge 165:d1b4690b3f8b 1420
AnnaBridge 165:d1b4690b3f8b 1421 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1422 {
AnnaBridge 165:d1b4690b3f8b 1423 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1424
AnnaBridge 165:d1b4690b3f8b 1425 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1426 return(result);
AnnaBridge 165:d1b4690b3f8b 1427 }
AnnaBridge 165:d1b4690b3f8b 1428
AnnaBridge 165:d1b4690b3f8b 1429 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1430 {
AnnaBridge 165:d1b4690b3f8b 1431 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1432
AnnaBridge 165:d1b4690b3f8b 1433 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1434 return(result);
AnnaBridge 165:d1b4690b3f8b 1435 }
AnnaBridge 165:d1b4690b3f8b 1436
AnnaBridge 165:d1b4690b3f8b 1437 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1438 {
AnnaBridge 165:d1b4690b3f8b 1439 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1440
AnnaBridge 165:d1b4690b3f8b 1441 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1442 return(result);
AnnaBridge 165:d1b4690b3f8b 1443 }
AnnaBridge 165:d1b4690b3f8b 1444
AnnaBridge 165:d1b4690b3f8b 1445 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1446 {
AnnaBridge 165:d1b4690b3f8b 1447 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1448
AnnaBridge 165:d1b4690b3f8b 1449 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1450 return(result);
AnnaBridge 165:d1b4690b3f8b 1451 }
AnnaBridge 165:d1b4690b3f8b 1452
AnnaBridge 165:d1b4690b3f8b 1453 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1454 {
AnnaBridge 165:d1b4690b3f8b 1455 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1456
AnnaBridge 165:d1b4690b3f8b 1457 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1458 return(result);
AnnaBridge 165:d1b4690b3f8b 1459 }
AnnaBridge 165:d1b4690b3f8b 1460
AnnaBridge 165:d1b4690b3f8b 1461 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1462 {
AnnaBridge 165:d1b4690b3f8b 1463 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1464
AnnaBridge 165:d1b4690b3f8b 1465 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1466 return(result);
AnnaBridge 165:d1b4690b3f8b 1467 }
AnnaBridge 165:d1b4690b3f8b 1468
AnnaBridge 165:d1b4690b3f8b 1469 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1470 {
AnnaBridge 165:d1b4690b3f8b 1471 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1472
AnnaBridge 165:d1b4690b3f8b 1473 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1474 return(result);
AnnaBridge 165:d1b4690b3f8b 1475 }
AnnaBridge 165:d1b4690b3f8b 1476
AnnaBridge 165:d1b4690b3f8b 1477 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1478 {
AnnaBridge 165:d1b4690b3f8b 1479 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1480
AnnaBridge 165:d1b4690b3f8b 1481 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1482 return(result);
AnnaBridge 165:d1b4690b3f8b 1483 }
AnnaBridge 165:d1b4690b3f8b 1484
AnnaBridge 165:d1b4690b3f8b 1485 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1486 {
AnnaBridge 165:d1b4690b3f8b 1487 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1488
AnnaBridge 165:d1b4690b3f8b 1489 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1490 return(result);
AnnaBridge 165:d1b4690b3f8b 1491 }
AnnaBridge 165:d1b4690b3f8b 1492
AnnaBridge 165:d1b4690b3f8b 1493 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1494 {
AnnaBridge 165:d1b4690b3f8b 1495 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1496
AnnaBridge 165:d1b4690b3f8b 1497 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1498 return(result);
AnnaBridge 165:d1b4690b3f8b 1499 }
AnnaBridge 165:d1b4690b3f8b 1500
AnnaBridge 165:d1b4690b3f8b 1501 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1502 {
AnnaBridge 165:d1b4690b3f8b 1503 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1504
AnnaBridge 165:d1b4690b3f8b 1505 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1506 return(result);
AnnaBridge 165:d1b4690b3f8b 1507 }
AnnaBridge 165:d1b4690b3f8b 1508
AnnaBridge 165:d1b4690b3f8b 1509 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1510 {
AnnaBridge 165:d1b4690b3f8b 1511 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1512
AnnaBridge 165:d1b4690b3f8b 1513 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1514 return(result);
AnnaBridge 165:d1b4690b3f8b 1515 }
AnnaBridge 165:d1b4690b3f8b 1516
AnnaBridge 165:d1b4690b3f8b 1517 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1518 {
AnnaBridge 165:d1b4690b3f8b 1519 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1520
AnnaBridge 165:d1b4690b3f8b 1521 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1522 return(result);
AnnaBridge 165:d1b4690b3f8b 1523 }
AnnaBridge 165:d1b4690b3f8b 1524
AnnaBridge 165:d1b4690b3f8b 1525 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1526 {
AnnaBridge 165:d1b4690b3f8b 1527 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1528
AnnaBridge 165:d1b4690b3f8b 1529 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1530 return(result);
AnnaBridge 165:d1b4690b3f8b 1531 }
AnnaBridge 165:d1b4690b3f8b 1532
AnnaBridge 165:d1b4690b3f8b 1533 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1534 {
AnnaBridge 165:d1b4690b3f8b 1535 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1536
AnnaBridge 165:d1b4690b3f8b 1537 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1538 return(result);
AnnaBridge 165:d1b4690b3f8b 1539 }
AnnaBridge 165:d1b4690b3f8b 1540
AnnaBridge 165:d1b4690b3f8b 1541 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1542 {
AnnaBridge 165:d1b4690b3f8b 1543 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1544
AnnaBridge 165:d1b4690b3f8b 1545 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1546 return(result);
AnnaBridge 165:d1b4690b3f8b 1547 }
AnnaBridge 165:d1b4690b3f8b 1548
AnnaBridge 165:d1b4690b3f8b 1549 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1550 {
AnnaBridge 165:d1b4690b3f8b 1551 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1552
AnnaBridge 165:d1b4690b3f8b 1553 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1554 return(result);
AnnaBridge 165:d1b4690b3f8b 1555 }
AnnaBridge 165:d1b4690b3f8b 1556
AnnaBridge 165:d1b4690b3f8b 1557 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 165:d1b4690b3f8b 1558 {
AnnaBridge 165:d1b4690b3f8b 1559 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1560
AnnaBridge 165:d1b4690b3f8b 1561 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1562 return(result);
AnnaBridge 165:d1b4690b3f8b 1563 }
AnnaBridge 165:d1b4690b3f8b 1564
AnnaBridge 165:d1b4690b3f8b 1565 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 165:d1b4690b3f8b 1566 ({ \
AnnaBridge 165:d1b4690b3f8b 1567 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 165:d1b4690b3f8b 1568 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 165:d1b4690b3f8b 1569 __RES; \
AnnaBridge 165:d1b4690b3f8b 1570 })
AnnaBridge 165:d1b4690b3f8b 1571
AnnaBridge 165:d1b4690b3f8b 1572 #define __USAT16(ARG1,ARG2) \
AnnaBridge 165:d1b4690b3f8b 1573 ({ \
AnnaBridge 165:d1b4690b3f8b 1574 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 165:d1b4690b3f8b 1575 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 165:d1b4690b3f8b 1576 __RES; \
AnnaBridge 165:d1b4690b3f8b 1577 })
AnnaBridge 165:d1b4690b3f8b 1578
AnnaBridge 165:d1b4690b3f8b 1579 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 165:d1b4690b3f8b 1580 {
AnnaBridge 165:d1b4690b3f8b 1581 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1582
AnnaBridge 165:d1b4690b3f8b 1583 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 165:d1b4690b3f8b 1584 return(result);
AnnaBridge 165:d1b4690b3f8b 1585 }
AnnaBridge 165:d1b4690b3f8b 1586
AnnaBridge 165:d1b4690b3f8b 1587 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1588 {
AnnaBridge 165:d1b4690b3f8b 1589 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1590
AnnaBridge 165:d1b4690b3f8b 1591 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1592 return(result);
AnnaBridge 165:d1b4690b3f8b 1593 }
AnnaBridge 165:d1b4690b3f8b 1594
AnnaBridge 165:d1b4690b3f8b 1595 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 165:d1b4690b3f8b 1596 {
AnnaBridge 165:d1b4690b3f8b 1597 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1598
AnnaBridge 165:d1b4690b3f8b 1599 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 165:d1b4690b3f8b 1600 return(result);
AnnaBridge 165:d1b4690b3f8b 1601 }
AnnaBridge 165:d1b4690b3f8b 1602
AnnaBridge 165:d1b4690b3f8b 1603 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1604 {
AnnaBridge 165:d1b4690b3f8b 1605 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1606
AnnaBridge 165:d1b4690b3f8b 1607 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1608 return(result);
AnnaBridge 165:d1b4690b3f8b 1609 }
AnnaBridge 165:d1b4690b3f8b 1610
AnnaBridge 165:d1b4690b3f8b 1611 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1612 {
AnnaBridge 165:d1b4690b3f8b 1613 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1614
AnnaBridge 165:d1b4690b3f8b 1615 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1616 return(result);
AnnaBridge 165:d1b4690b3f8b 1617 }
AnnaBridge 165:d1b4690b3f8b 1618
AnnaBridge 165:d1b4690b3f8b 1619 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1620 {
AnnaBridge 165:d1b4690b3f8b 1621 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1622
AnnaBridge 165:d1b4690b3f8b 1623 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1624 return(result);
AnnaBridge 165:d1b4690b3f8b 1625 }
AnnaBridge 165:d1b4690b3f8b 1626
AnnaBridge 165:d1b4690b3f8b 1627 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 165:d1b4690b3f8b 1628 {
AnnaBridge 165:d1b4690b3f8b 1629 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1630
AnnaBridge 165:d1b4690b3f8b 1631 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1632 return(result);
AnnaBridge 165:d1b4690b3f8b 1633 }
AnnaBridge 165:d1b4690b3f8b 1634
AnnaBridge 165:d1b4690b3f8b 1635 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 165:d1b4690b3f8b 1636 {
AnnaBridge 165:d1b4690b3f8b 1637 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1638
AnnaBridge 165:d1b4690b3f8b 1639 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1640 return(result);
AnnaBridge 165:d1b4690b3f8b 1641 }
AnnaBridge 165:d1b4690b3f8b 1642
AnnaBridge 165:d1b4690b3f8b 1643 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 165:d1b4690b3f8b 1644 {
AnnaBridge 165:d1b4690b3f8b 1645 union llreg_u{
AnnaBridge 165:d1b4690b3f8b 1646 uint32_t w32[2];
AnnaBridge 165:d1b4690b3f8b 1647 uint64_t w64;
AnnaBridge 165:d1b4690b3f8b 1648 } llr;
AnnaBridge 165:d1b4690b3f8b 1649 llr.w64 = acc;
AnnaBridge 165:d1b4690b3f8b 1650
AnnaBridge 165:d1b4690b3f8b 1651 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 165:d1b4690b3f8b 1652 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 165:d1b4690b3f8b 1653 #else /* Big endian */
AnnaBridge 165:d1b4690b3f8b 1654 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 165:d1b4690b3f8b 1655 #endif
AnnaBridge 165:d1b4690b3f8b 1656
AnnaBridge 165:d1b4690b3f8b 1657 return(llr.w64);
AnnaBridge 165:d1b4690b3f8b 1658 }
AnnaBridge 165:d1b4690b3f8b 1659
AnnaBridge 165:d1b4690b3f8b 1660 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 165:d1b4690b3f8b 1661 {
AnnaBridge 165:d1b4690b3f8b 1662 union llreg_u{
AnnaBridge 165:d1b4690b3f8b 1663 uint32_t w32[2];
AnnaBridge 165:d1b4690b3f8b 1664 uint64_t w64;
AnnaBridge 165:d1b4690b3f8b 1665 } llr;
AnnaBridge 165:d1b4690b3f8b 1666 llr.w64 = acc;
AnnaBridge 165:d1b4690b3f8b 1667
AnnaBridge 165:d1b4690b3f8b 1668 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 165:d1b4690b3f8b 1669 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 165:d1b4690b3f8b 1670 #else /* Big endian */
AnnaBridge 165:d1b4690b3f8b 1671 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 165:d1b4690b3f8b 1672 #endif
AnnaBridge 165:d1b4690b3f8b 1673
AnnaBridge 165:d1b4690b3f8b 1674 return(llr.w64);
AnnaBridge 165:d1b4690b3f8b 1675 }
AnnaBridge 165:d1b4690b3f8b 1676
AnnaBridge 165:d1b4690b3f8b 1677 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1678 {
AnnaBridge 165:d1b4690b3f8b 1679 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1680
AnnaBridge 165:d1b4690b3f8b 1681 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1682 return(result);
AnnaBridge 165:d1b4690b3f8b 1683 }
AnnaBridge 165:d1b4690b3f8b 1684
AnnaBridge 165:d1b4690b3f8b 1685 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1686 {
AnnaBridge 165:d1b4690b3f8b 1687 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1688
AnnaBridge 165:d1b4690b3f8b 1689 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1690 return(result);
AnnaBridge 165:d1b4690b3f8b 1691 }
AnnaBridge 165:d1b4690b3f8b 1692
AnnaBridge 165:d1b4690b3f8b 1693 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 165:d1b4690b3f8b 1694 {
AnnaBridge 165:d1b4690b3f8b 1695 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1696
AnnaBridge 165:d1b4690b3f8b 1697 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1698 return(result);
AnnaBridge 165:d1b4690b3f8b 1699 }
AnnaBridge 165:d1b4690b3f8b 1700
AnnaBridge 165:d1b4690b3f8b 1701 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 165:d1b4690b3f8b 1702 {
AnnaBridge 165:d1b4690b3f8b 1703 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1704
AnnaBridge 165:d1b4690b3f8b 1705 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1706 return(result);
AnnaBridge 165:d1b4690b3f8b 1707 }
AnnaBridge 165:d1b4690b3f8b 1708
AnnaBridge 165:d1b4690b3f8b 1709 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 165:d1b4690b3f8b 1710 {
AnnaBridge 165:d1b4690b3f8b 1711 union llreg_u{
AnnaBridge 165:d1b4690b3f8b 1712 uint32_t w32[2];
AnnaBridge 165:d1b4690b3f8b 1713 uint64_t w64;
AnnaBridge 165:d1b4690b3f8b 1714 } llr;
AnnaBridge 165:d1b4690b3f8b 1715 llr.w64 = acc;
AnnaBridge 165:d1b4690b3f8b 1716
AnnaBridge 165:d1b4690b3f8b 1717 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 165:d1b4690b3f8b 1718 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 165:d1b4690b3f8b 1719 #else /* Big endian */
AnnaBridge 165:d1b4690b3f8b 1720 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 165:d1b4690b3f8b 1721 #endif
AnnaBridge 165:d1b4690b3f8b 1722
AnnaBridge 165:d1b4690b3f8b 1723 return(llr.w64);
AnnaBridge 165:d1b4690b3f8b 1724 }
AnnaBridge 165:d1b4690b3f8b 1725
AnnaBridge 165:d1b4690b3f8b 1726 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 165:d1b4690b3f8b 1727 {
AnnaBridge 165:d1b4690b3f8b 1728 union llreg_u{
AnnaBridge 165:d1b4690b3f8b 1729 uint32_t w32[2];
AnnaBridge 165:d1b4690b3f8b 1730 uint64_t w64;
AnnaBridge 165:d1b4690b3f8b 1731 } llr;
AnnaBridge 165:d1b4690b3f8b 1732 llr.w64 = acc;
AnnaBridge 165:d1b4690b3f8b 1733
AnnaBridge 165:d1b4690b3f8b 1734 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 165:d1b4690b3f8b 1735 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 165:d1b4690b3f8b 1736 #else /* Big endian */
AnnaBridge 165:d1b4690b3f8b 1737 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 165:d1b4690b3f8b 1738 #endif
AnnaBridge 165:d1b4690b3f8b 1739
AnnaBridge 165:d1b4690b3f8b 1740 return(llr.w64);
AnnaBridge 165:d1b4690b3f8b 1741 }
AnnaBridge 165:d1b4690b3f8b 1742
AnnaBridge 165:d1b4690b3f8b 1743 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 165:d1b4690b3f8b 1744 {
AnnaBridge 165:d1b4690b3f8b 1745 uint32_t result;
AnnaBridge 165:d1b4690b3f8b 1746
AnnaBridge 165:d1b4690b3f8b 1747 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1748 return(result);
AnnaBridge 165:d1b4690b3f8b 1749 }
AnnaBridge 165:d1b4690b3f8b 1750
AnnaBridge 165:d1b4690b3f8b 1751 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 165:d1b4690b3f8b 1752 {
AnnaBridge 165:d1b4690b3f8b 1753 int32_t result;
AnnaBridge 165:d1b4690b3f8b 1754
AnnaBridge 165:d1b4690b3f8b 1755 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1756 return(result);
AnnaBridge 165:d1b4690b3f8b 1757 }
AnnaBridge 165:d1b4690b3f8b 1758
AnnaBridge 165:d1b4690b3f8b 1759 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 165:d1b4690b3f8b 1760 {
AnnaBridge 165:d1b4690b3f8b 1761 int32_t result;
AnnaBridge 165:d1b4690b3f8b 1762
AnnaBridge 165:d1b4690b3f8b 1763 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 165:d1b4690b3f8b 1764 return(result);
AnnaBridge 165:d1b4690b3f8b 1765 }
AnnaBridge 165:d1b4690b3f8b 1766
AnnaBridge 165:d1b4690b3f8b 1767 #if 0
AnnaBridge 165:d1b4690b3f8b 1768 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 165:d1b4690b3f8b 1769 ({ \
AnnaBridge 165:d1b4690b3f8b 1770 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 165:d1b4690b3f8b 1771 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 165:d1b4690b3f8b 1772 __RES; \
AnnaBridge 165:d1b4690b3f8b 1773 })
AnnaBridge 165:d1b4690b3f8b 1774
AnnaBridge 165:d1b4690b3f8b 1775 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 165:d1b4690b3f8b 1776 ({ \
AnnaBridge 165:d1b4690b3f8b 1777 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 165:d1b4690b3f8b 1778 if (ARG3 == 0) \
AnnaBridge 165:d1b4690b3f8b 1779 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 165:d1b4690b3f8b 1780 else \
AnnaBridge 165:d1b4690b3f8b 1781 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 165:d1b4690b3f8b 1782 __RES; \
AnnaBridge 165:d1b4690b3f8b 1783 })
AnnaBridge 165:d1b4690b3f8b 1784 #endif
AnnaBridge 165:d1b4690b3f8b 1785
AnnaBridge 165:d1b4690b3f8b 1786 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 165:d1b4690b3f8b 1787 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 165:d1b4690b3f8b 1788
AnnaBridge 165:d1b4690b3f8b 1789 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 165:d1b4690b3f8b 1790 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 165:d1b4690b3f8b 1791
AnnaBridge 165:d1b4690b3f8b 1792 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 165:d1b4690b3f8b 1793 {
AnnaBridge 165:d1b4690b3f8b 1794 int32_t result;
AnnaBridge 165:d1b4690b3f8b 1795
AnnaBridge 165:d1b4690b3f8b 1796 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 165:d1b4690b3f8b 1797 return(result);
AnnaBridge 165:d1b4690b3f8b 1798 }
AnnaBridge 165:d1b4690b3f8b 1799
AnnaBridge 165:d1b4690b3f8b 1800 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 165:d1b4690b3f8b 1801 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 165:d1b4690b3f8b 1802
AnnaBridge 165:d1b4690b3f8b 1803
AnnaBridge 165:d1b4690b3f8b 1804 #endif /* __CMSIS_ARMCLANG_H */