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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_DISCO_L496AG/TARGET_STM/mbed_rtx.h@166:5aab5a7997ee, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:08:29 2018 +0100
Revision:
166:5aab5a7997ee
Parent:
165:d1b4690b3f8b
Child:
167:84c0a372a020
Updating mbed 2 version number

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /* mbed Microcontroller Library
AnnaBridge 165:d1b4690b3f8b 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 165:d1b4690b3f8b 3 *
AnnaBridge 165:d1b4690b3f8b 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 165:d1b4690b3f8b 5 * you may not use this file except in compliance with the License.
AnnaBridge 165:d1b4690b3f8b 6 * You may obtain a copy of the License at
AnnaBridge 165:d1b4690b3f8b 7 *
AnnaBridge 165:d1b4690b3f8b 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 165:d1b4690b3f8b 9 *
AnnaBridge 165:d1b4690b3f8b 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 165:d1b4690b3f8b 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 165:d1b4690b3f8b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 165:d1b4690b3f8b 13 * See the License for the specific language governing permissions and
AnnaBridge 165:d1b4690b3f8b 14 * limitations under the License.
AnnaBridge 165:d1b4690b3f8b 15 */
AnnaBridge 165:d1b4690b3f8b 16
AnnaBridge 165:d1b4690b3f8b 17 #ifndef MBED_MBED_RTX_H
AnnaBridge 165:d1b4690b3f8b 18 #define MBED_MBED_RTX_H
AnnaBridge 165:d1b4690b3f8b 19
AnnaBridge 165:d1b4690b3f8b 20 #ifndef INITIAL_SP
AnnaBridge 165:d1b4690b3f8b 21
AnnaBridge 165:d1b4690b3f8b 22 #if (defined(TARGET_STM32L475VG) ||\
AnnaBridge 165:d1b4690b3f8b 23 defined(TARGET_STM32L476RG) ||\
AnnaBridge 165:d1b4690b3f8b 24 defined(TARGET_STM32L476JG) ||\
AnnaBridge 165:d1b4690b3f8b 25 defined(TARGET_STM32L476VG) ||\
AnnaBridge 165:d1b4690b3f8b 26 defined(TARGET_STM32L486RG))
AnnaBridge 165:d1b4690b3f8b 27 /* only GCC_ARM and IAR toolchains have the stack on SRAM2 */
AnnaBridge 165:d1b4690b3f8b 28 #if (((defined(__GNUC__) && !defined(__CC_ARM)) ||\
AnnaBridge 165:d1b4690b3f8b 29 defined(__IAR_SYSTEMS_ICC__ )) &&\
AnnaBridge 165:d1b4690b3f8b 30 defined(TWO_RAM_REGIONS))
AnnaBridge 165:d1b4690b3f8b 31 #define INITIAL_SP (0x10008000UL)
AnnaBridge 165:d1b4690b3f8b 32 #else
AnnaBridge 165:d1b4690b3f8b 33 #define INITIAL_SP (0x20018000UL)
AnnaBridge 165:d1b4690b3f8b 34 #endif /* toolchains */
AnnaBridge 165:d1b4690b3f8b 35
AnnaBridge 165:d1b4690b3f8b 36 #elif (defined(TARGET_STM32F051R8) ||\
AnnaBridge 165:d1b4690b3f8b 37 defined(TARGET_STM32F100RB) ||\
AnnaBridge 165:d1b4690b3f8b 38 defined(TARGET_STM32L031K6) ||\
AnnaBridge 165:d1b4690b3f8b 39 defined(TARGET_STM32L053C8) ||\
AnnaBridge 165:d1b4690b3f8b 40 defined(TARGET_STM32L053R8))
AnnaBridge 165:d1b4690b3f8b 41 #define INITIAL_SP (0x20002000UL)
AnnaBridge 165:d1b4690b3f8b 42
AnnaBridge 165:d1b4690b3f8b 43 #elif (defined(TARGET_STM32F303K8) ||\
AnnaBridge 165:d1b4690b3f8b 44 defined(TARGET_STM32F334C8) ||\
AnnaBridge 165:d1b4690b3f8b 45 defined(TARGET_STM32F334R8))
AnnaBridge 165:d1b4690b3f8b 46 #define INITIAL_SP (0x20003000UL)
AnnaBridge 165:d1b4690b3f8b 47
AnnaBridge 165:d1b4690b3f8b 48 #elif (defined(TARGET_STM32F070RB) ||\
AnnaBridge 165:d1b4690b3f8b 49 defined(TARGET_STM32F072RB) ||\
AnnaBridge 165:d1b4690b3f8b 50 defined(TARGET_STM32F302R8))
AnnaBridge 165:d1b4690b3f8b 51 #define INITIAL_SP (0x20004000UL)
AnnaBridge 165:d1b4690b3f8b 52
AnnaBridge 165:d1b4690b3f8b 53 #elif (defined(TARGET_STM32F103RB) ||\
AnnaBridge 165:d1b4690b3f8b 54 defined(TARGET_STM32F103C8) ||\
AnnaBridge 165:d1b4690b3f8b 55 defined(TARGET_STM32L072CZ) ||\
AnnaBridge 165:d1b4690b3f8b 56 defined(TARGET_STM32L073RZ) ||\
AnnaBridge 165:d1b4690b3f8b 57 defined(TARGET_STM32L0x2xZ))
AnnaBridge 165:d1b4690b3f8b 58 #define INITIAL_SP (0x20005000UL)
AnnaBridge 165:d1b4690b3f8b 59
AnnaBridge 165:d1b4690b3f8b 60 #elif (defined(TARGET_STM32F091RC) ||\
AnnaBridge 165:d1b4690b3f8b 61 defined(TARGET_STM32F410RB) ||\
AnnaBridge 165:d1b4690b3f8b 62 defined(TARGET_STM32L151CBA)||\
AnnaBridge 165:d1b4690b3f8b 63 defined(TARGET_STM32L151CC) ||\
AnnaBridge 165:d1b4690b3f8b 64 defined(TARGET_STM32L151RC) ||\
AnnaBridge 165:d1b4690b3f8b 65 defined(TARGET_STM32L152RC))
AnnaBridge 165:d1b4690b3f8b 66 #define INITIAL_SP (0x20008000UL)
AnnaBridge 165:d1b4690b3f8b 67
AnnaBridge 165:d1b4690b3f8b 68 #elif defined(TARGET_STM32F303VC)
AnnaBridge 165:d1b4690b3f8b 69 #define INITIAL_SP (0x2000A000UL)
AnnaBridge 165:d1b4690b3f8b 70
AnnaBridge 165:d1b4690b3f8b 71 #elif defined(TARGET_STM32L443RC)
AnnaBridge 165:d1b4690b3f8b 72 #define INITIAL_SP (0x2000C000UL)
AnnaBridge 165:d1b4690b3f8b 73
AnnaBridge 165:d1b4690b3f8b 74 #elif defined(TARGET_STM32L432KC) ||\
AnnaBridge 165:d1b4690b3f8b 75 defined (TARGET_STM32L433RC)
AnnaBridge 165:d1b4690b3f8b 76 #define INITIAL_SP (0x20010000UL)
AnnaBridge 165:d1b4690b3f8b 77
AnnaBridge 165:d1b4690b3f8b 78 #elif (defined(TARGET_STM32F303RE) ||\
AnnaBridge 165:d1b4690b3f8b 79 defined(TARGET_STM32F303ZE) ||\
AnnaBridge 165:d1b4690b3f8b 80 defined(TARGET_STM32F401VC))
AnnaBridge 165:d1b4690b3f8b 81 #define INITIAL_SP (0x20010000UL)
AnnaBridge 165:d1b4690b3f8b 82
AnnaBridge 165:d1b4690b3f8b 83 #elif defined(TARGET_STM32L152RE)
AnnaBridge 165:d1b4690b3f8b 84 #define INITIAL_SP (0x20014000UL)
AnnaBridge 165:d1b4690b3f8b 85
AnnaBridge 165:d1b4690b3f8b 86 #elif (defined(TARGET_STM32F401RE) ||\
AnnaBridge 165:d1b4690b3f8b 87 defined(TARGET_STM32F401VE))
AnnaBridge 165:d1b4690b3f8b 88 #define INITIAL_SP (0x20018000UL)
AnnaBridge 165:d1b4690b3f8b 89
AnnaBridge 165:d1b4690b3f8b 90 #elif (defined(TARGET_STM32F207ZG) ||\
AnnaBridge 165:d1b4690b3f8b 91 defined(TARGET_STM32F405RG) ||\
AnnaBridge 165:d1b4690b3f8b 92 defined(TARGET_STM32F407VG) ||\
AnnaBridge 165:d1b4690b3f8b 93 defined(TARGET_STM32F411RE) ||\
AnnaBridge 165:d1b4690b3f8b 94 defined(TARGET_STM32F446RE) ||\
AnnaBridge 165:d1b4690b3f8b 95 defined(TARGET_STM32F446VE) ||\
AnnaBridge 165:d1b4690b3f8b 96 defined(TARGET_STM32F446ZE))
AnnaBridge 165:d1b4690b3f8b 97 #define INITIAL_SP (0x20020000UL)
AnnaBridge 165:d1b4690b3f8b 98
AnnaBridge 165:d1b4690b3f8b 99 #elif (defined(TARGET_STM32F429ZI) ||\
AnnaBridge 165:d1b4690b3f8b 100 defined(TARGET_STM32F437VG) ||\
AnnaBridge 165:d1b4690b3f8b 101 defined(TARGET_STM32F439ZI))
AnnaBridge 165:d1b4690b3f8b 102 #define INITIAL_SP (0x20030000UL)
AnnaBridge 165:d1b4690b3f8b 103
AnnaBridge 165:d1b4690b3f8b 104 #elif defined(TARGET_STM32F412ZG)
AnnaBridge 165:d1b4690b3f8b 105 #define INITIAL_SP (0x20040000UL)
AnnaBridge 165:d1b4690b3f8b 106
AnnaBridge 165:d1b4690b3f8b 107 #elif (defined(TARGET_STM32F413ZH) ||\
AnnaBridge 165:d1b4690b3f8b 108 defined(TARGET_STM32F469NI) ||\
AnnaBridge 165:d1b4690b3f8b 109 defined(TARGET_STM32F746NG) ||\
AnnaBridge 165:d1b4690b3f8b 110 defined(TARGET_STM32F746ZG) ||\
AnnaBridge 165:d1b4690b3f8b 111 defined(TARGET_STM32F756ZG) ||\
AnnaBridge 165:d1b4690b3f8b 112 defined(TARGET_STM32L496AG) ||\
AnnaBridge 165:d1b4690b3f8b 113 defined(TARGET_STM32L496ZG))
AnnaBridge 165:d1b4690b3f8b 114 #define INITIAL_SP (0x20050000UL)
AnnaBridge 165:d1b4690b3f8b 115
AnnaBridge 165:d1b4690b3f8b 116 #elif (defined(TARGET_STM32F767ZI) ||\
AnnaBridge 165:d1b4690b3f8b 117 defined(TARGET_STM32F769NI))
AnnaBridge 165:d1b4690b3f8b 118 #define INITIAL_SP (0x20080000UL)
AnnaBridge 165:d1b4690b3f8b 119
AnnaBridge 165:d1b4690b3f8b 120 #else
AnnaBridge 165:d1b4690b3f8b 121 #error "INITIAL_SP is not defined for this target in the mbed_rtx.h file"
AnnaBridge 165:d1b4690b3f8b 122 #endif
AnnaBridge 165:d1b4690b3f8b 123
AnnaBridge 165:d1b4690b3f8b 124 #endif // INITIAL_SP
AnnaBridge 165:d1b4690b3f8b 125 #if (defined(__GNUC__) && !defined(__CC_ARM) && defined(TWO_RAM_REGIONS))
AnnaBridge 165:d1b4690b3f8b 126 extern uint32_t __StackLimit[];
AnnaBridge 165:d1b4690b3f8b 127 extern uint32_t __StackTop[];
AnnaBridge 165:d1b4690b3f8b 128 extern uint32_t __end__[];
AnnaBridge 165:d1b4690b3f8b 129 extern uint32_t __HeapLimit[];
AnnaBridge 165:d1b4690b3f8b 130 #define HEAP_START ((unsigned char*)__end__)
AnnaBridge 165:d1b4690b3f8b 131 #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START))
AnnaBridge 165:d1b4690b3f8b 132 #define ISR_STACK_START ((unsigned char*)__StackLimit)
AnnaBridge 165:d1b4690b3f8b 133 #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit))
AnnaBridge 165:d1b4690b3f8b 134 #endif
AnnaBridge 165:d1b4690b3f8b 135
AnnaBridge 165:d1b4690b3f8b 136 #endif // MBED_MBED_RTX_H