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TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_gpio.h@160:5571c4ff569f, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 16:13:02 2018 +0000
Revision:
160:5571c4ff569f
Parent:
134:ad3be0349dc5 
mbed library. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 134:ad3be0349dc5 1 /**
<> 134:ad3be0349dc5 2 ******************************************************************************
<> 134:ad3be0349dc5 3 * @file stm32f0xx_ll_gpio.h
<> 134:ad3be0349dc5 4 * @author MCD Application Team
<> 134:ad3be0349dc5 5 * @brief Header file of GPIO LL module.
<> 134:ad3be0349dc5 6 ******************************************************************************
<> 134:ad3be0349dc5 7 * @attention
<> 134:ad3be0349dc5 8 *
<> 134:ad3be0349dc5 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 134:ad3be0349dc5 10 *
<> 134:ad3be0349dc5 11 * Redistribution and use in source and binary forms, with or without modification,
<> 134:ad3be0349dc5 12 * are permitted provided that the following conditions are met:
<> 134:ad3be0349dc5 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 134:ad3be0349dc5 14 * this list of conditions and the following disclaimer.
<> 134:ad3be0349dc5 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 134:ad3be0349dc5 16 * this list of conditions and the following disclaimer in the documentation
<> 134:ad3be0349dc5 17 * and/or other materials provided with the distribution.
<> 134:ad3be0349dc5 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 134:ad3be0349dc5 19 * may be used to endorse or promote products derived from this software
<> 134:ad3be0349dc5 20 * without specific prior written permission.
<> 134:ad3be0349dc5 21 *
<> 134:ad3be0349dc5 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 134:ad3be0349dc5 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 134:ad3be0349dc5 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 134:ad3be0349dc5 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 134:ad3be0349dc5 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 134:ad3be0349dc5 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 134:ad3be0349dc5 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 134:ad3be0349dc5 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 134:ad3be0349dc5 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 134:ad3be0349dc5 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 134:ad3be0349dc5 32 *
<> 134:ad3be0349dc5 33 ******************************************************************************
<> 134:ad3be0349dc5 34 */
<> 134:ad3be0349dc5 35
<> 134:ad3be0349dc5 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 134:ad3be0349dc5 37 #ifndef __STM32F0xx_LL_GPIO_H
<> 134:ad3be0349dc5 38 #define __STM32F0xx_LL_GPIO_H
<> 134:ad3be0349dc5 39
<> 134:ad3be0349dc5 40 #ifdef __cplusplus
<> 134:ad3be0349dc5 41 extern "C" {
<> 134:ad3be0349dc5 42 #endif
<> 134:ad3be0349dc5 43
<> 134:ad3be0349dc5 44 /* Includes ------------------------------------------------------------------*/
<> 134:ad3be0349dc5 45 #include "stm32f0xx.h"
<> 134:ad3be0349dc5 46
<> 134:ad3be0349dc5 47 /** @addtogroup STM32F0xx_LL_Driver
<> 134:ad3be0349dc5 48 * @{
<> 134:ad3be0349dc5 49 */
<> 134:ad3be0349dc5 50
<> 134:ad3be0349dc5 51 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF)
<> 134:ad3be0349dc5 52
<> 134:ad3be0349dc5 53 /** @defgroup GPIO_LL GPIO
<> 134:ad3be0349dc5 54 * @{
<> 134:ad3be0349dc5 55 */
<> 134:ad3be0349dc5 56
<> 134:ad3be0349dc5 57 /* Private types -------------------------------------------------------------*/
<> 134:ad3be0349dc5 58 /* Private variables ---------------------------------------------------------*/
<> 134:ad3be0349dc5 59 /* Private constants ---------------------------------------------------------*/
<> 134:ad3be0349dc5 60 /* Private macros ------------------------------------------------------------*/
<> 134:ad3be0349dc5 61 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 62 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 134:ad3be0349dc5 63 * @{
<> 134:ad3be0349dc5 64 */
<> 134:ad3be0349dc5 65
<> 134:ad3be0349dc5 66 /**
<> 134:ad3be0349dc5 67 * @}
<> 134:ad3be0349dc5 68 */
<> 134:ad3be0349dc5 69 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 70
<> 134:ad3be0349dc5 71 /* Exported types ------------------------------------------------------------*/
<> 134:ad3be0349dc5 72 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 73 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 134:ad3be0349dc5 74 * @{
<> 134:ad3be0349dc5 75 */
<> 134:ad3be0349dc5 76
<> 134:ad3be0349dc5 77 /**
<> 134:ad3be0349dc5 78 * @brief LL GPIO Init Structure definition
<> 134:ad3be0349dc5 79 */
<> 134:ad3be0349dc5 80 typedef struct
<> 134:ad3be0349dc5 81 {
<> 134:ad3be0349dc5 82 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 134:ad3be0349dc5 83 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 134:ad3be0349dc5 84
<> 134:ad3be0349dc5 85 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 134:ad3be0349dc5 86 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 134:ad3be0349dc5 87
<> 134:ad3be0349dc5 88 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 134:ad3be0349dc5 89
<> 134:ad3be0349dc5 90 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 134:ad3be0349dc5 91 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 134:ad3be0349dc5 92
<> 134:ad3be0349dc5 93 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 134:ad3be0349dc5 94
<> 134:ad3be0349dc5 95 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 134:ad3be0349dc5 96 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 134:ad3be0349dc5 97
<> 134:ad3be0349dc5 98 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 134:ad3be0349dc5 99
<> 134:ad3be0349dc5 100 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 134:ad3be0349dc5 101 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 134:ad3be0349dc5 102
<> 134:ad3be0349dc5 103 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 134:ad3be0349dc5 104
<> 134:ad3be0349dc5 105 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 134:ad3be0349dc5 106 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 134:ad3be0349dc5 107
<> 134:ad3be0349dc5 108 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 134:ad3be0349dc5 109 } LL_GPIO_InitTypeDef;
<> 134:ad3be0349dc5 110
<> 134:ad3be0349dc5 111 /**
<> 134:ad3be0349dc5 112 * @}
<> 134:ad3be0349dc5 113 */
<> 134:ad3be0349dc5 114 #endif /* USE_FULL_LL_DRIVER */
<> 134:ad3be0349dc5 115
<> 134:ad3be0349dc5 116 /* Exported constants --------------------------------------------------------*/
<> 134:ad3be0349dc5 117 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 134:ad3be0349dc5 118 * @{
<> 134:ad3be0349dc5 119 */
<> 134:ad3be0349dc5 120
<> 134:ad3be0349dc5 121 /** @defgroup GPIO_LL_EC_PIN PIN
<> 134:ad3be0349dc5 122 * @{
<> 134:ad3be0349dc5 123 */
<> 134:ad3be0349dc5 124 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 134:ad3be0349dc5 125 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 134:ad3be0349dc5 126 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 134:ad3be0349dc5 127 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 134:ad3be0349dc5 128 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 134:ad3be0349dc5 129 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 134:ad3be0349dc5 130 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 134:ad3be0349dc5 131 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 134:ad3be0349dc5 132 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 134:ad3be0349dc5 133 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 134:ad3be0349dc5 134 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 134:ad3be0349dc5 135 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 134:ad3be0349dc5 136 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 134:ad3be0349dc5 137 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 134:ad3be0349dc5 138 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 134:ad3be0349dc5 139 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 134:ad3be0349dc5 140 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 134:ad3be0349dc5 141 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 134:ad3be0349dc5 142 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 134:ad3be0349dc5 143 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 134:ad3be0349dc5 144 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 134:ad3be0349dc5 145 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 134:ad3be0349dc5 146 /**
<> 134:ad3be0349dc5 147 * @}
<> 134:ad3be0349dc5 148 */
<> 134:ad3be0349dc5 149
<> 134:ad3be0349dc5 150 /** @defgroup GPIO_LL_EC_MODE Mode
<> 134:ad3be0349dc5 151 * @{
<> 134:ad3be0349dc5 152 */
Anna Bridge 160:5571c4ff569f 153 #define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
<> 134:ad3be0349dc5 154 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 134:ad3be0349dc5 155 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 134:ad3be0349dc5 156 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 134:ad3be0349dc5 157 /**
<> 134:ad3be0349dc5 158 * @}
<> 134:ad3be0349dc5 159 */
<> 134:ad3be0349dc5 160
<> 134:ad3be0349dc5 161 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 134:ad3be0349dc5 162 * @{
<> 134:ad3be0349dc5 163 */
Anna Bridge 160:5571c4ff569f 164 #define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
<> 134:ad3be0349dc5 165 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 134:ad3be0349dc5 166 /**
<> 134:ad3be0349dc5 167 * @}
<> 134:ad3be0349dc5 168 */
<> 134:ad3be0349dc5 169
<> 134:ad3be0349dc5 170 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 134:ad3be0349dc5 171 * @{
<> 134:ad3be0349dc5 172 */
Anna Bridge 160:5571c4ff569f 173 #define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
<> 134:ad3be0349dc5 174 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDR_OSPEEDR0_0 /*!< Select I/O medium output speed */
Anna Bridge 160:5571c4ff569f 175 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDR_OSPEEDR0 /*!< Select I/O high output speed */
<> 134:ad3be0349dc5 176 /**
<> 134:ad3be0349dc5 177 * @}
<> 134:ad3be0349dc5 178 */
<> 134:ad3be0349dc5 179 #define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 180 #define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM
Anna Bridge 160:5571c4ff569f 181 #define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 182
<> 134:ad3be0349dc5 183 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 134:ad3be0349dc5 184 * @{
<> 134:ad3be0349dc5 185 */
Anna Bridge 160:5571c4ff569f 186 #define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
<> 134:ad3be0349dc5 187 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 134:ad3be0349dc5 188 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 134:ad3be0349dc5 189 /**
<> 134:ad3be0349dc5 190 * @}
<> 134:ad3be0349dc5 191 */
<> 134:ad3be0349dc5 192
<> 134:ad3be0349dc5 193 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 134:ad3be0349dc5 194 * @{
<> 134:ad3be0349dc5 195 */
Anna Bridge 160:5571c4ff569f 196 #define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
Anna Bridge 160:5571c4ff569f 197 #define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
Anna Bridge 160:5571c4ff569f 198 #define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
Anna Bridge 160:5571c4ff569f 199 #define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
Anna Bridge 160:5571c4ff569f 200 #define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
Anna Bridge 160:5571c4ff569f 201 #define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
Anna Bridge 160:5571c4ff569f 202 #define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
Anna Bridge 160:5571c4ff569f 203 #define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
<> 134:ad3be0349dc5 204 /**
<> 134:ad3be0349dc5 205 * @}
<> 134:ad3be0349dc5 206 */
<> 134:ad3be0349dc5 207
<> 134:ad3be0349dc5 208 /**
<> 134:ad3be0349dc5 209 * @}
<> 134:ad3be0349dc5 210 */
<> 134:ad3be0349dc5 211
<> 134:ad3be0349dc5 212 /* Exported macro ------------------------------------------------------------*/
<> 134:ad3be0349dc5 213 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 134:ad3be0349dc5 214 * @{
<> 134:ad3be0349dc5 215 */
<> 134:ad3be0349dc5 216
<> 134:ad3be0349dc5 217 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 134:ad3be0349dc5 218 * @{
<> 134:ad3be0349dc5 219 */
<> 134:ad3be0349dc5 220
<> 134:ad3be0349dc5 221 /**
<> 134:ad3be0349dc5 222 * @brief Write a value in GPIO register
<> 134:ad3be0349dc5 223 * @param __INSTANCE__ GPIO Instance
<> 134:ad3be0349dc5 224 * @param __REG__ Register to be written
<> 134:ad3be0349dc5 225 * @param __VALUE__ Value to be written in the register
<> 134:ad3be0349dc5 226 * @retval None
<> 134:ad3be0349dc5 227 */
<> 134:ad3be0349dc5 228 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 134:ad3be0349dc5 229
<> 134:ad3be0349dc5 230 /**
<> 134:ad3be0349dc5 231 * @brief Read a value in GPIO register
<> 134:ad3be0349dc5 232 * @param __INSTANCE__ GPIO Instance
<> 134:ad3be0349dc5 233 * @param __REG__ Register to be read
<> 134:ad3be0349dc5 234 * @retval Register value
<> 134:ad3be0349dc5 235 */
<> 134:ad3be0349dc5 236 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 134:ad3be0349dc5 237 /**
<> 134:ad3be0349dc5 238 * @}
<> 134:ad3be0349dc5 239 */
<> 134:ad3be0349dc5 240
<> 134:ad3be0349dc5 241 /**
<> 134:ad3be0349dc5 242 * @}
<> 134:ad3be0349dc5 243 */
<> 134:ad3be0349dc5 244
<> 134:ad3be0349dc5 245 /* Exported functions --------------------------------------------------------*/
<> 134:ad3be0349dc5 246 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 134:ad3be0349dc5 247 * @{
<> 134:ad3be0349dc5 248 */
<> 134:ad3be0349dc5 249
<> 134:ad3be0349dc5 250 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 134:ad3be0349dc5 251 * @{
<> 134:ad3be0349dc5 252 */
<> 134:ad3be0349dc5 253
<> 134:ad3be0349dc5 254 /**
<> 134:ad3be0349dc5 255 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 256 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 134:ad3be0349dc5 257 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 258 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 134:ad3be0349dc5 259 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 260 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 261 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 262 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 263 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 264 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 265 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 266 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 267 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 268 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 269 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 270 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 271 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 272 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 273 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 274 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 275 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 276 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 277 * @param Mode This parameter can be one of the following values:
<> 134:ad3be0349dc5 278 * @arg @ref LL_GPIO_MODE_INPUT
<> 134:ad3be0349dc5 279 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 134:ad3be0349dc5 280 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 134:ad3be0349dc5 281 * @arg @ref LL_GPIO_MODE_ANALOG
<> 134:ad3be0349dc5 282 * @retval None
<> 134:ad3be0349dc5 283 */
<> 134:ad3be0349dc5 284 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 134:ad3be0349dc5 285 {
<> 134:ad3be0349dc5 286 MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0), ((Pin * Pin) * Mode));
<> 134:ad3be0349dc5 287 }
<> 134:ad3be0349dc5 288
<> 134:ad3be0349dc5 289 /**
<> 134:ad3be0349dc5 290 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 291 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 134:ad3be0349dc5 292 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 293 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 134:ad3be0349dc5 294 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 295 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 296 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 297 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 298 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 299 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 300 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 301 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 302 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 303 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 304 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 305 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 306 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 307 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 308 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 309 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 310 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 311 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 312 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 313 * @arg @ref LL_GPIO_MODE_INPUT
<> 134:ad3be0349dc5 314 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 134:ad3be0349dc5 315 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 134:ad3be0349dc5 316 * @arg @ref LL_GPIO_MODE_ANALOG
<> 134:ad3be0349dc5 317 */
<> 134:ad3be0349dc5 318 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 319 {
<> 134:ad3be0349dc5 320 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
<> 134:ad3be0349dc5 321 }
<> 134:ad3be0349dc5 322
<> 134:ad3be0349dc5 323 /**
<> 134:ad3be0349dc5 324 * @brief Configure gpio output type for several pins on dedicated port.
<> 134:ad3be0349dc5 325 * @note Output type as to be set when gpio pin is in output or
<> 134:ad3be0349dc5 326 * alternate modes. Possible type are Push-pull or Open-drain.
<> 134:ad3be0349dc5 327 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 134:ad3be0349dc5 328 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 329 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 330 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 331 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 332 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 333 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 334 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 335 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 336 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 337 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 338 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 339 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 340 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 341 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 342 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 343 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 344 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 345 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 346 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 347 * @param OutputType This parameter can be one of the following values:
<> 134:ad3be0349dc5 348 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 134:ad3be0349dc5 349 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 134:ad3be0349dc5 350 * @retval None
<> 134:ad3be0349dc5 351 */
<> 134:ad3be0349dc5 352 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 134:ad3be0349dc5 353 {
<> 134:ad3be0349dc5 354 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 134:ad3be0349dc5 355 }
<> 134:ad3be0349dc5 356
<> 134:ad3be0349dc5 357 /**
<> 134:ad3be0349dc5 358 * @brief Return gpio output type for several pins on dedicated port.
<> 134:ad3be0349dc5 359 * @note Output type as to be set when gpio pin is in output or
<> 134:ad3be0349dc5 360 * alternate modes. Possible type are Push-pull or Open-drain.
<> 134:ad3be0349dc5 361 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 362 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 134:ad3be0349dc5 363 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 364 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 365 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 366 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 367 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 368 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 369 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 370 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 371 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 372 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 373 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 374 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 375 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 376 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 377 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 378 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 379 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 380 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 381 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 382 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 383 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 134:ad3be0349dc5 384 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 134:ad3be0349dc5 385 */
<> 134:ad3be0349dc5 386 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 387 {
<> 134:ad3be0349dc5 388 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin);
<> 134:ad3be0349dc5 389 }
<> 134:ad3be0349dc5 390
<> 134:ad3be0349dc5 391 /**
<> 134:ad3be0349dc5 392 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 393 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 134:ad3be0349dc5 394 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 395 * @note Refer to datasheet for frequency specifications and the power
<> 134:ad3be0349dc5 396 * supply and load conditions for each speed.
<> 134:ad3be0349dc5 397 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 134:ad3be0349dc5 398 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 399 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 400 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 401 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 402 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 403 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 404 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 405 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 406 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 407 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 408 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 409 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 410 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 411 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 412 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 413 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 414 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 415 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 416 * @param Speed This parameter can be one of the following values:
<> 134:ad3be0349dc5 417 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 418 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 134:ad3be0349dc5 419 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 420 * @retval None
<> 134:ad3be0349dc5 421 */
<> 134:ad3be0349dc5 422 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 134:ad3be0349dc5 423 {
<> 134:ad3be0349dc5 424 MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0), ((Pin * Pin) * Speed));
<> 134:ad3be0349dc5 425 }
<> 134:ad3be0349dc5 426
<> 134:ad3be0349dc5 427 /**
<> 134:ad3be0349dc5 428 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 429 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 134:ad3be0349dc5 430 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 431 * @note Refer to datasheet for frequency specifications and the power
<> 134:ad3be0349dc5 432 * supply and load conditions for each speed.
<> 134:ad3be0349dc5 433 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 134:ad3be0349dc5 434 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 435 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 436 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 437 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 438 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 439 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 440 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 441 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 442 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 443 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 444 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 445 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 446 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 447 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 448 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 449 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 450 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 451 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 452 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 453 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 454 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 134:ad3be0349dc5 455 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 456 */
<> 134:ad3be0349dc5 457 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 458 {
<> 134:ad3be0349dc5 459 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0)) / (Pin * Pin));
<> 134:ad3be0349dc5 460 }
<> 134:ad3be0349dc5 461
<> 134:ad3be0349dc5 462 /**
<> 134:ad3be0349dc5 463 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 134:ad3be0349dc5 464 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 465 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 134:ad3be0349dc5 466 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 467 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 468 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 469 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 470 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 471 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 472 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 473 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 474 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 475 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 476 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 477 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 478 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 479 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 480 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 481 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 482 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 483 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 484 * @param Pull This parameter can be one of the following values:
<> 134:ad3be0349dc5 485 * @arg @ref LL_GPIO_PULL_NO
<> 134:ad3be0349dc5 486 * @arg @ref LL_GPIO_PULL_UP
<> 134:ad3be0349dc5 487 * @arg @ref LL_GPIO_PULL_DOWN
<> 134:ad3be0349dc5 488 * @retval None
<> 134:ad3be0349dc5 489 */
<> 134:ad3be0349dc5 490 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 134:ad3be0349dc5 491 {
<> 134:ad3be0349dc5 492 MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0), ((Pin * Pin) * Pull));
<> 134:ad3be0349dc5 493 }
<> 134:ad3be0349dc5 494
<> 134:ad3be0349dc5 495 /**
<> 134:ad3be0349dc5 496 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 134:ad3be0349dc5 497 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 498 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 134:ad3be0349dc5 499 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 500 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 501 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 502 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 503 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 504 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 505 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 506 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 507 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 508 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 509 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 510 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 511 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 512 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 513 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 514 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 515 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 516 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 517 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 518 * @arg @ref LL_GPIO_PULL_NO
<> 134:ad3be0349dc5 519 * @arg @ref LL_GPIO_PULL_UP
<> 134:ad3be0349dc5 520 * @arg @ref LL_GPIO_PULL_DOWN
<> 134:ad3be0349dc5 521 */
<> 134:ad3be0349dc5 522 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 523 {
<> 134:ad3be0349dc5 524 return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0)) / (Pin * Pin));
<> 134:ad3be0349dc5 525 }
<> 134:ad3be0349dc5 526
<> 134:ad3be0349dc5 527 /**
<> 134:ad3be0349dc5 528 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 134:ad3be0349dc5 529 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 530 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 531 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 134:ad3be0349dc5 532 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 533 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 534 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 535 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 536 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 537 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 538 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 539 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 540 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 541 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 542 * @param Alternate This parameter can be one of the following values:
<> 134:ad3be0349dc5 543 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 544 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 545 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 546 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 547 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 548 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 549 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 550 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 551 * @retval None
<> 134:ad3be0349dc5 552 */
<> 134:ad3be0349dc5 553 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 134:ad3be0349dc5 554 {
Anna Bridge 160:5571c4ff569f 555 MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0),
<> 134:ad3be0349dc5 556 ((((Pin * Pin) * Pin) * Pin) * Alternate));
<> 134:ad3be0349dc5 557 }
<> 134:ad3be0349dc5 558
<> 134:ad3be0349dc5 559 /**
<> 134:ad3be0349dc5 560 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 134:ad3be0349dc5 561 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 134:ad3be0349dc5 562 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 563 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 564 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 565 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 566 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 567 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 568 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 569 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 570 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 571 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 572 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 573 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 574 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 575 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 576 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 577 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 578 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 579 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 580 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 581 */
<> 134:ad3be0349dc5 582 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 583 {
<> 134:ad3be0349dc5 584 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
Anna Bridge 160:5571c4ff569f 585 ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0)) / (((Pin * Pin) * Pin) * Pin));
<> 134:ad3be0349dc5 586 }
<> 134:ad3be0349dc5 587
<> 134:ad3be0349dc5 588 /**
<> 134:ad3be0349dc5 589 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 134:ad3be0349dc5 590 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 591 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 592 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 134:ad3be0349dc5 593 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 594 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 595 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 596 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 597 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 598 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 599 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 600 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 601 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 602 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 603 * @param Alternate This parameter can be one of the following values:
<> 134:ad3be0349dc5 604 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 605 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 606 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 607 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 608 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 609 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 610 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 611 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 612 * @retval None
<> 134:ad3be0349dc5 613 */
<> 134:ad3be0349dc5 614 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 134:ad3be0349dc5 615 {
Anna Bridge 160:5571c4ff569f 616 MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8),
<> 134:ad3be0349dc5 617 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate));
<> 134:ad3be0349dc5 618 }
<> 134:ad3be0349dc5 619
<> 134:ad3be0349dc5 620 /**
<> 134:ad3be0349dc5 621 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 134:ad3be0349dc5 622 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 623 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 134:ad3be0349dc5 624 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 625 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 626 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 627 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 628 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 629 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 630 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 631 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 632 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 633 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 634 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 635 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 636 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 637 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 638 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 639 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 640 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 641 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 642 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 643 */
<> 134:ad3be0349dc5 644 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 645 {
<> 134:ad3be0349dc5 646 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
Anna Bridge 160:5571c4ff569f 647 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8)) / ((((Pin >> 8U) *
<> 134:ad3be0349dc5 648 (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)));
<> 134:ad3be0349dc5 649 }
<> 134:ad3be0349dc5 650
<> 134:ad3be0349dc5 651
<> 134:ad3be0349dc5 652 /**
<> 134:ad3be0349dc5 653 * @brief Lock configuration of several pins for a dedicated port.
<> 134:ad3be0349dc5 654 * @note When the lock sequence has been applied on a port bit, the
<> 134:ad3be0349dc5 655 * value of this port bit can no longer be modified until the
<> 134:ad3be0349dc5 656 * next reset.
<> 134:ad3be0349dc5 657 * @note Each lock bit freezes a specific configuration register
<> 134:ad3be0349dc5 658 * (control and alternate function registers).
<> 134:ad3be0349dc5 659 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 134:ad3be0349dc5 660 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 661 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 662 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 663 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 664 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 665 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 666 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 667 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 668 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 669 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 670 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 671 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 672 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 673 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 674 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 675 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 676 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 677 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 678 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 679 * @retval None
<> 134:ad3be0349dc5 680 */
<> 134:ad3be0349dc5 681 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 682 {
<> 134:ad3be0349dc5 683 __IO uint32_t temp;
<> 134:ad3be0349dc5 684 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 134:ad3be0349dc5 685 WRITE_REG(GPIOx->LCKR, PinMask);
<> 134:ad3be0349dc5 686 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 134:ad3be0349dc5 687 temp = READ_REG(GPIOx->LCKR);
<> 134:ad3be0349dc5 688 (void) temp;
<> 134:ad3be0349dc5 689 }
<> 134:ad3be0349dc5 690
<> 134:ad3be0349dc5 691 /**
<> 134:ad3be0349dc5 692 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 134:ad3be0349dc5 693 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 134:ad3be0349dc5 694 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 695 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 696 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 697 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 698 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 699 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 700 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 701 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 702 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 703 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 704 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 705 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 706 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 707 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 708 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 709 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 710 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 711 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 712 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 713 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 714 */
<> 134:ad3be0349dc5 715 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 716 {
<> 134:ad3be0349dc5 717 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 718 }
<> 134:ad3be0349dc5 719
<> 134:ad3be0349dc5 720 /**
<> 134:ad3be0349dc5 721 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 134:ad3be0349dc5 722 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 134:ad3be0349dc5 723 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 724 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 725 */
<> 134:ad3be0349dc5 726 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 727 {
<> 134:ad3be0349dc5 728 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 134:ad3be0349dc5 729 }
<> 134:ad3be0349dc5 730
<> 134:ad3be0349dc5 731 /**
<> 134:ad3be0349dc5 732 * @}
<> 134:ad3be0349dc5 733 */
<> 134:ad3be0349dc5 734
<> 134:ad3be0349dc5 735 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 134:ad3be0349dc5 736 * @{
<> 134:ad3be0349dc5 737 */
<> 134:ad3be0349dc5 738
<> 134:ad3be0349dc5 739 /**
<> 134:ad3be0349dc5 740 * @brief Return full input data register value for a dedicated port.
<> 134:ad3be0349dc5 741 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 134:ad3be0349dc5 742 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 743 * @retval Input data register value of port
<> 134:ad3be0349dc5 744 */
<> 134:ad3be0349dc5 745 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 746 {
<> 134:ad3be0349dc5 747 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 134:ad3be0349dc5 748 }
<> 134:ad3be0349dc5 749
<> 134:ad3be0349dc5 750 /**
<> 134:ad3be0349dc5 751 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 134:ad3be0349dc5 752 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 134:ad3be0349dc5 753 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 754 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 755 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 756 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 757 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 758 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 759 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 760 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 761 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 762 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 763 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 764 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 765 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 766 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 767 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 768 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 769 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 770 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 771 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 772 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 773 */
<> 134:ad3be0349dc5 774 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 775 {
<> 134:ad3be0349dc5 776 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 777 }
<> 134:ad3be0349dc5 778
<> 134:ad3be0349dc5 779 /**
<> 134:ad3be0349dc5 780 * @brief Write output data register for the port.
<> 134:ad3be0349dc5 781 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 134:ad3be0349dc5 782 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 783 * @param PortValue Level value for each pin of the port
<> 134:ad3be0349dc5 784 * @retval None
<> 134:ad3be0349dc5 785 */
<> 134:ad3be0349dc5 786 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 134:ad3be0349dc5 787 {
<> 134:ad3be0349dc5 788 WRITE_REG(GPIOx->ODR, PortValue);
<> 134:ad3be0349dc5 789 }
<> 134:ad3be0349dc5 790
<> 134:ad3be0349dc5 791 /**
<> 134:ad3be0349dc5 792 * @brief Return full output data register value for a dedicated port.
<> 134:ad3be0349dc5 793 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 134:ad3be0349dc5 794 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 795 * @retval Output data register value of port
<> 134:ad3be0349dc5 796 */
<> 134:ad3be0349dc5 797 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 798 {
<> 134:ad3be0349dc5 799 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 134:ad3be0349dc5 800 }
<> 134:ad3be0349dc5 801
<> 134:ad3be0349dc5 802 /**
<> 134:ad3be0349dc5 803 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 134:ad3be0349dc5 804 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 134:ad3be0349dc5 805 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 806 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 807 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 808 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 809 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 810 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 811 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 812 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 813 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 814 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 815 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 816 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 817 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 818 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 819 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 820 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 821 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 822 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 823 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 824 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 825 */
<> 134:ad3be0349dc5 826 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 827 {
<> 134:ad3be0349dc5 828 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 829 }
<> 134:ad3be0349dc5 830
<> 134:ad3be0349dc5 831 /**
<> 134:ad3be0349dc5 832 * @brief Set several pins to high level on dedicated gpio port.
<> 134:ad3be0349dc5 833 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 134:ad3be0349dc5 834 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 835 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 836 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 837 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 838 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 839 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 840 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 841 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 842 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 843 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 844 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 845 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 846 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 847 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 848 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 849 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 850 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 851 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 852 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 853 * @retval None
<> 134:ad3be0349dc5 854 */
<> 134:ad3be0349dc5 855 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 856 {
<> 134:ad3be0349dc5 857 WRITE_REG(GPIOx->BSRR, PinMask);
<> 134:ad3be0349dc5 858 }
<> 134:ad3be0349dc5 859
<> 134:ad3be0349dc5 860 /**
<> 134:ad3be0349dc5 861 * @brief Set several pins to low level on dedicated gpio port.
<> 134:ad3be0349dc5 862 * @rmtoll BRR BRy LL_GPIO_ResetOutputPin
<> 134:ad3be0349dc5 863 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 864 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 865 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 866 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 867 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 868 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 869 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 870 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 871 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 872 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 873 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 874 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 875 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 876 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 877 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 878 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 879 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 880 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 881 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 882 * @retval None
<> 134:ad3be0349dc5 883 */
<> 134:ad3be0349dc5 884 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 885 {
<> 134:ad3be0349dc5 886 WRITE_REG(GPIOx->BRR, PinMask);
<> 134:ad3be0349dc5 887 }
<> 134:ad3be0349dc5 888
<> 134:ad3be0349dc5 889 /**
<> 134:ad3be0349dc5 890 * @brief Toggle data value for several pin of dedicated port.
<> 134:ad3be0349dc5 891 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 134:ad3be0349dc5 892 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 893 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 894 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 895 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 896 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 897 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 898 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 899 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 900 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 901 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 902 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 903 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 904 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 905 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 906 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 907 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 908 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 909 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 910 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 911 * @retval None
<> 134:ad3be0349dc5 912 */
<> 134:ad3be0349dc5 913 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 914 {
<> 134:ad3be0349dc5 915 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 134:ad3be0349dc5 916 }
<> 134:ad3be0349dc5 917
<> 134:ad3be0349dc5 918 /**
<> 134:ad3be0349dc5 919 * @}
<> 134:ad3be0349dc5 920 */
<> 134:ad3be0349dc5 921
<> 134:ad3be0349dc5 922 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 923 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 134:ad3be0349dc5 924 * @{
<> 134:ad3be0349dc5 925 */
<> 134:ad3be0349dc5 926
<> 134:ad3be0349dc5 927 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 134:ad3be0349dc5 928 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 134:ad3be0349dc5 929 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 134:ad3be0349dc5 930
<> 134:ad3be0349dc5 931 /**
<> 134:ad3be0349dc5 932 * @}
<> 134:ad3be0349dc5 933 */
<> 134:ad3be0349dc5 934 #endif /* USE_FULL_LL_DRIVER */
<> 134:ad3be0349dc5 935
<> 134:ad3be0349dc5 936 /**
<> 134:ad3be0349dc5 937 * @}
<> 134:ad3be0349dc5 938 */
<> 134:ad3be0349dc5 939
<> 134:ad3be0349dc5 940 /**
<> 134:ad3be0349dc5 941 * @}
<> 134:ad3be0349dc5 942 */
<> 134:ad3be0349dc5 943
<> 134:ad3be0349dc5 944 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */
<> 134:ad3be0349dc5 945 /**
<> 134:ad3be0349dc5 946 * @}
<> 134:ad3be0349dc5 947 */
<> 134:ad3be0349dc5 948
<> 134:ad3be0349dc5 949 #ifdef __cplusplus
<> 134:ad3be0349dc5 950 }
<> 134:ad3be0349dc5 951 #endif
<> 134:ad3be0349dc5 952
<> 134:ad3be0349dc5 953 #endif /* __STM32F0xx_LL_GPIO_H */
<> 134:ad3be0349dc5 954
<> 134:ad3be0349dc5 955 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/