mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_LPC546XX/cmsis_gcc.h@160:5571c4ff569f, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 16:13:02 2018 +0000
Revision:
160:5571c4ff569f
Parent:
153:b484a57bc302
Child:
169:a7c7b631e539
mbed library. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 153:b484a57bc302 1 /**************************************************************************//**
AnnaBridge 153:b484a57bc302 2 * @file cmsis_gcc.h
AnnaBridge 153:b484a57bc302 3 * @brief CMSIS compiler GCC header file
AnnaBridge 153:b484a57bc302 4 * @version V5.0.2
AnnaBridge 153:b484a57bc302 5 * @date 13. February 2017
AnnaBridge 153:b484a57bc302 6 ******************************************************************************/
AnnaBridge 153:b484a57bc302 7 /*
AnnaBridge 153:b484a57bc302 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 153:b484a57bc302 9 *
AnnaBridge 153:b484a57bc302 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 153:b484a57bc302 11 *
AnnaBridge 153:b484a57bc302 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 153:b484a57bc302 13 * not use this file except in compliance with the License.
AnnaBridge 153:b484a57bc302 14 * You may obtain a copy of the License at
AnnaBridge 153:b484a57bc302 15 *
AnnaBridge 153:b484a57bc302 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 153:b484a57bc302 17 *
AnnaBridge 153:b484a57bc302 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 153:b484a57bc302 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 153:b484a57bc302 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 153:b484a57bc302 21 * See the License for the specific language governing permissions and
AnnaBridge 153:b484a57bc302 22 * limitations under the License.
AnnaBridge 153:b484a57bc302 23 */
AnnaBridge 153:b484a57bc302 24
AnnaBridge 153:b484a57bc302 25 #ifndef __CMSIS_GCC_H
AnnaBridge 153:b484a57bc302 26 #define __CMSIS_GCC_H
AnnaBridge 153:b484a57bc302 27
AnnaBridge 153:b484a57bc302 28 /* ignore some GCC warnings */
AnnaBridge 153:b484a57bc302 29 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 30 #pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge 153:b484a57bc302 31 #pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge 153:b484a57bc302 32 #pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge 153:b484a57bc302 33
Anna Bridge 160:5571c4ff569f 34 /* Fallback for __has_builtin */
Anna Bridge 160:5571c4ff569f 35 #ifndef __has_builtin
Anna Bridge 160:5571c4ff569f 36 #define __has_builtin(x) (0)
Anna Bridge 160:5571c4ff569f 37 #endif
Anna Bridge 160:5571c4ff569f 38
AnnaBridge 153:b484a57bc302 39 /* CMSIS compiler specific defines */
AnnaBridge 153:b484a57bc302 40 #ifndef __ASM
AnnaBridge 153:b484a57bc302 41 #define __ASM __asm
AnnaBridge 153:b484a57bc302 42 #endif
AnnaBridge 153:b484a57bc302 43 #ifndef __INLINE
AnnaBridge 153:b484a57bc302 44 #define __INLINE inline
AnnaBridge 153:b484a57bc302 45 #endif
AnnaBridge 153:b484a57bc302 46 #ifndef __STATIC_INLINE
AnnaBridge 153:b484a57bc302 47 #define __STATIC_INLINE static inline
AnnaBridge 153:b484a57bc302 48 #endif
AnnaBridge 153:b484a57bc302 49 #ifndef __NO_RETURN
AnnaBridge 153:b484a57bc302 50 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 153:b484a57bc302 51 #endif
AnnaBridge 153:b484a57bc302 52 #ifndef __USED
AnnaBridge 153:b484a57bc302 53 #define __USED __attribute__((used))
AnnaBridge 153:b484a57bc302 54 #endif
AnnaBridge 153:b484a57bc302 55 #ifndef __WEAK
AnnaBridge 153:b484a57bc302 56 #define __WEAK __attribute__((weak))
AnnaBridge 153:b484a57bc302 57 #endif
AnnaBridge 153:b484a57bc302 58 #ifndef __PACKED
AnnaBridge 153:b484a57bc302 59 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 60 #endif
AnnaBridge 153:b484a57bc302 61 #ifndef __PACKED_STRUCT
AnnaBridge 153:b484a57bc302 62 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 63 #endif
Anna Bridge 160:5571c4ff569f 64 #ifndef __PACKED_UNION
Anna Bridge 160:5571c4ff569f 65 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge 160:5571c4ff569f 66 #endif
AnnaBridge 153:b484a57bc302 67 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 153:b484a57bc302 68 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 69 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 70 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 153:b484a57bc302 71 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 153:b484a57bc302 72 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 73 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 153:b484a57bc302 74 #endif
AnnaBridge 153:b484a57bc302 75 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 153:b484a57bc302 76 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 77 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 78 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 153:b484a57bc302 79 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 153:b484a57bc302 80 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 81 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 82 #endif
AnnaBridge 153:b484a57bc302 83 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 153:b484a57bc302 84 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 85 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 86 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 153:b484a57bc302 87 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 153:b484a57bc302 88 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 89 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 90 #endif
AnnaBridge 153:b484a57bc302 91 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 153:b484a57bc302 92 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 93 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 94 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 153:b484a57bc302 95 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 153:b484a57bc302 96 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 97 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 98 #endif
AnnaBridge 153:b484a57bc302 99 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 153:b484a57bc302 100 #pragma GCC diagnostic push
AnnaBridge 153:b484a57bc302 101 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 102 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 153:b484a57bc302 103 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 153:b484a57bc302 104 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 105 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 106 #endif
AnnaBridge 153:b484a57bc302 107 #ifndef __ALIGNED
AnnaBridge 153:b484a57bc302 108 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 153:b484a57bc302 109 #endif
Anna Bridge 160:5571c4ff569f 110 #ifndef __RESTRICT
Anna Bridge 160:5571c4ff569f 111 #define __RESTRICT __restrict
Anna Bridge 160:5571c4ff569f 112 #endif
AnnaBridge 153:b484a57bc302 113
AnnaBridge 153:b484a57bc302 114
AnnaBridge 153:b484a57bc302 115 /* ########################### Core Function Access ########################### */
AnnaBridge 153:b484a57bc302 116 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 153:b484a57bc302 117 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 153:b484a57bc302 118 @{
AnnaBridge 153:b484a57bc302 119 */
AnnaBridge 153:b484a57bc302 120
AnnaBridge 153:b484a57bc302 121 /**
AnnaBridge 153:b484a57bc302 122 \brief Enable IRQ Interrupts
AnnaBridge 153:b484a57bc302 123 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 124 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 125 */
AnnaBridge 153:b484a57bc302 126 __attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
AnnaBridge 153:b484a57bc302 127 {
AnnaBridge 153:b484a57bc302 128 __ASM volatile ("cpsie i" : : : "memory");
AnnaBridge 153:b484a57bc302 129 }
AnnaBridge 153:b484a57bc302 130
AnnaBridge 153:b484a57bc302 131
AnnaBridge 153:b484a57bc302 132 /**
AnnaBridge 153:b484a57bc302 133 \brief Disable IRQ Interrupts
AnnaBridge 153:b484a57bc302 134 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 135 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 136 */
AnnaBridge 153:b484a57bc302 137 __attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
AnnaBridge 153:b484a57bc302 138 {
AnnaBridge 153:b484a57bc302 139 __ASM volatile ("cpsid i" : : : "memory");
AnnaBridge 153:b484a57bc302 140 }
AnnaBridge 153:b484a57bc302 141
AnnaBridge 153:b484a57bc302 142
AnnaBridge 153:b484a57bc302 143 /**
AnnaBridge 153:b484a57bc302 144 \brief Get Control Register
AnnaBridge 153:b484a57bc302 145 \details Returns the content of the Control Register.
AnnaBridge 153:b484a57bc302 146 \return Control Register value
AnnaBridge 153:b484a57bc302 147 */
AnnaBridge 153:b484a57bc302 148 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 153:b484a57bc302 149 {
AnnaBridge 153:b484a57bc302 150 uint32_t result;
AnnaBridge 153:b484a57bc302 151
AnnaBridge 153:b484a57bc302 152 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 153:b484a57bc302 153 return(result);
AnnaBridge 153:b484a57bc302 154 }
AnnaBridge 153:b484a57bc302 155
AnnaBridge 153:b484a57bc302 156
AnnaBridge 153:b484a57bc302 157 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 158 /**
AnnaBridge 153:b484a57bc302 159 \brief Get Control Register (non-secure)
AnnaBridge 153:b484a57bc302 160 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 153:b484a57bc302 161 \return non-secure Control Register value
AnnaBridge 153:b484a57bc302 162 */
AnnaBridge 153:b484a57bc302 163 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 153:b484a57bc302 164 {
AnnaBridge 153:b484a57bc302 165 uint32_t result;
AnnaBridge 153:b484a57bc302 166
AnnaBridge 153:b484a57bc302 167 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 168 return(result);
AnnaBridge 153:b484a57bc302 169 }
AnnaBridge 153:b484a57bc302 170 #endif
AnnaBridge 153:b484a57bc302 171
AnnaBridge 153:b484a57bc302 172
AnnaBridge 153:b484a57bc302 173 /**
AnnaBridge 153:b484a57bc302 174 \brief Set Control Register
AnnaBridge 153:b484a57bc302 175 \details Writes the given value to the Control Register.
AnnaBridge 153:b484a57bc302 176 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 177 */
AnnaBridge 153:b484a57bc302 178 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 153:b484a57bc302 179 {
AnnaBridge 153:b484a57bc302 180 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 181 }
AnnaBridge 153:b484a57bc302 182
AnnaBridge 153:b484a57bc302 183
AnnaBridge 153:b484a57bc302 184 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 185 /**
AnnaBridge 153:b484a57bc302 186 \brief Set Control Register (non-secure)
AnnaBridge 153:b484a57bc302 187 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 153:b484a57bc302 188 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 189 */
AnnaBridge 153:b484a57bc302 190 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 153:b484a57bc302 191 {
AnnaBridge 153:b484a57bc302 192 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 193 }
AnnaBridge 153:b484a57bc302 194 #endif
AnnaBridge 153:b484a57bc302 195
AnnaBridge 153:b484a57bc302 196
AnnaBridge 153:b484a57bc302 197 /**
AnnaBridge 153:b484a57bc302 198 \brief Get IPSR Register
AnnaBridge 153:b484a57bc302 199 \details Returns the content of the IPSR Register.
AnnaBridge 153:b484a57bc302 200 \return IPSR Register value
AnnaBridge 153:b484a57bc302 201 */
AnnaBridge 153:b484a57bc302 202 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 153:b484a57bc302 203 {
AnnaBridge 153:b484a57bc302 204 uint32_t result;
AnnaBridge 153:b484a57bc302 205
AnnaBridge 153:b484a57bc302 206 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 207 return(result);
AnnaBridge 153:b484a57bc302 208 }
AnnaBridge 153:b484a57bc302 209
AnnaBridge 153:b484a57bc302 210
AnnaBridge 153:b484a57bc302 211 /**
AnnaBridge 153:b484a57bc302 212 \brief Get APSR Register
AnnaBridge 153:b484a57bc302 213 \details Returns the content of the APSR Register.
AnnaBridge 153:b484a57bc302 214 \return APSR Register value
AnnaBridge 153:b484a57bc302 215 */
AnnaBridge 153:b484a57bc302 216 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 153:b484a57bc302 217 {
AnnaBridge 153:b484a57bc302 218 uint32_t result;
AnnaBridge 153:b484a57bc302 219
AnnaBridge 153:b484a57bc302 220 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 221 return(result);
AnnaBridge 153:b484a57bc302 222 }
AnnaBridge 153:b484a57bc302 223
AnnaBridge 153:b484a57bc302 224
AnnaBridge 153:b484a57bc302 225 /**
AnnaBridge 153:b484a57bc302 226 \brief Get xPSR Register
AnnaBridge 153:b484a57bc302 227 \details Returns the content of the xPSR Register.
AnnaBridge 153:b484a57bc302 228 \return xPSR Register value
AnnaBridge 153:b484a57bc302 229 */
AnnaBridge 153:b484a57bc302 230 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 153:b484a57bc302 231 {
AnnaBridge 153:b484a57bc302 232 uint32_t result;
AnnaBridge 153:b484a57bc302 233
AnnaBridge 153:b484a57bc302 234 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 235 return(result);
AnnaBridge 153:b484a57bc302 236 }
AnnaBridge 153:b484a57bc302 237
AnnaBridge 153:b484a57bc302 238
AnnaBridge 153:b484a57bc302 239 /**
AnnaBridge 153:b484a57bc302 240 \brief Get Process Stack Pointer
AnnaBridge 153:b484a57bc302 241 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 242 \return PSP Register value
AnnaBridge 153:b484a57bc302 243 */
AnnaBridge 153:b484a57bc302 244 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 153:b484a57bc302 245 {
AnnaBridge 153:b484a57bc302 246 register uint32_t result;
AnnaBridge 153:b484a57bc302 247
AnnaBridge 153:b484a57bc302 248 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 249 return(result);
AnnaBridge 153:b484a57bc302 250 }
AnnaBridge 153:b484a57bc302 251
AnnaBridge 153:b484a57bc302 252
AnnaBridge 153:b484a57bc302 253 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 254 /**
AnnaBridge 153:b484a57bc302 255 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 256 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 257 \return PSP Register value
AnnaBridge 153:b484a57bc302 258 */
AnnaBridge 153:b484a57bc302 259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 153:b484a57bc302 260 {
AnnaBridge 153:b484a57bc302 261 register uint32_t result;
AnnaBridge 153:b484a57bc302 262
AnnaBridge 153:b484a57bc302 263 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 264 return(result);
AnnaBridge 153:b484a57bc302 265 }
AnnaBridge 153:b484a57bc302 266 #endif
AnnaBridge 153:b484a57bc302 267
AnnaBridge 153:b484a57bc302 268
AnnaBridge 153:b484a57bc302 269 /**
AnnaBridge 153:b484a57bc302 270 \brief Set Process Stack Pointer
AnnaBridge 153:b484a57bc302 271 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 272 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 273 */
AnnaBridge 153:b484a57bc302 274 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 275 {
AnnaBridge 153:b484a57bc302 276 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 277 }
AnnaBridge 153:b484a57bc302 278
AnnaBridge 153:b484a57bc302 279
AnnaBridge 153:b484a57bc302 280 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 281 /**
AnnaBridge 153:b484a57bc302 282 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 283 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 284 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 285 */
AnnaBridge 153:b484a57bc302 286 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 287 {
AnnaBridge 153:b484a57bc302 288 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 289 }
AnnaBridge 153:b484a57bc302 290 #endif
AnnaBridge 153:b484a57bc302 291
AnnaBridge 153:b484a57bc302 292
AnnaBridge 153:b484a57bc302 293 /**
AnnaBridge 153:b484a57bc302 294 \brief Get Main Stack Pointer
AnnaBridge 153:b484a57bc302 295 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 296 \return MSP Register value
AnnaBridge 153:b484a57bc302 297 */
AnnaBridge 153:b484a57bc302 298 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 153:b484a57bc302 299 {
AnnaBridge 153:b484a57bc302 300 register uint32_t result;
AnnaBridge 153:b484a57bc302 301
AnnaBridge 153:b484a57bc302 302 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 303 return(result);
AnnaBridge 153:b484a57bc302 304 }
AnnaBridge 153:b484a57bc302 305
AnnaBridge 153:b484a57bc302 306
AnnaBridge 153:b484a57bc302 307 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 308 /**
AnnaBridge 153:b484a57bc302 309 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 310 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 311 \return MSP Register value
AnnaBridge 153:b484a57bc302 312 */
AnnaBridge 153:b484a57bc302 313 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 153:b484a57bc302 314 {
AnnaBridge 153:b484a57bc302 315 register uint32_t result;
AnnaBridge 153:b484a57bc302 316
AnnaBridge 153:b484a57bc302 317 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 318 return(result);
AnnaBridge 153:b484a57bc302 319 }
AnnaBridge 153:b484a57bc302 320 #endif
AnnaBridge 153:b484a57bc302 321
AnnaBridge 153:b484a57bc302 322
AnnaBridge 153:b484a57bc302 323 /**
AnnaBridge 153:b484a57bc302 324 \brief Set Main Stack Pointer
AnnaBridge 153:b484a57bc302 325 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 326 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 327 */
AnnaBridge 153:b484a57bc302 328 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 329 {
AnnaBridge 153:b484a57bc302 330 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 331 }
AnnaBridge 153:b484a57bc302 332
AnnaBridge 153:b484a57bc302 333
AnnaBridge 153:b484a57bc302 334 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 335 /**
AnnaBridge 153:b484a57bc302 336 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 337 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 338 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 339 */
AnnaBridge 153:b484a57bc302 340 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 341 {
AnnaBridge 153:b484a57bc302 342 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 343 }
AnnaBridge 153:b484a57bc302 344 #endif
AnnaBridge 153:b484a57bc302 345
AnnaBridge 153:b484a57bc302 346
AnnaBridge 153:b484a57bc302 347 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 348 /**
AnnaBridge 153:b484a57bc302 349 \brief Get Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 350 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 351 \return SP Register value
AnnaBridge 153:b484a57bc302 352 */
AnnaBridge 153:b484a57bc302 353 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 153:b484a57bc302 354 {
AnnaBridge 153:b484a57bc302 355 register uint32_t result;
AnnaBridge 153:b484a57bc302 356
AnnaBridge 153:b484a57bc302 357 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 358 return(result);
AnnaBridge 153:b484a57bc302 359 }
AnnaBridge 153:b484a57bc302 360
AnnaBridge 153:b484a57bc302 361
AnnaBridge 153:b484a57bc302 362 /**
AnnaBridge 153:b484a57bc302 363 \brief Set Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 364 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 365 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 153:b484a57bc302 366 */
AnnaBridge 153:b484a57bc302 367 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 153:b484a57bc302 368 {
AnnaBridge 153:b484a57bc302 369 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 153:b484a57bc302 370 }
AnnaBridge 153:b484a57bc302 371 #endif
AnnaBridge 153:b484a57bc302 372
AnnaBridge 153:b484a57bc302 373
AnnaBridge 153:b484a57bc302 374 /**
AnnaBridge 153:b484a57bc302 375 \brief Get Priority Mask
AnnaBridge 153:b484a57bc302 376 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 153:b484a57bc302 377 \return Priority Mask value
AnnaBridge 153:b484a57bc302 378 */
AnnaBridge 153:b484a57bc302 379 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 153:b484a57bc302 380 {
AnnaBridge 153:b484a57bc302 381 uint32_t result;
AnnaBridge 153:b484a57bc302 382
AnnaBridge 153:b484a57bc302 383 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 384 return(result);
AnnaBridge 153:b484a57bc302 385 }
AnnaBridge 153:b484a57bc302 386
AnnaBridge 153:b484a57bc302 387
AnnaBridge 153:b484a57bc302 388 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 389 /**
AnnaBridge 153:b484a57bc302 390 \brief Get Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 391 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 392 \return Priority Mask value
AnnaBridge 153:b484a57bc302 393 */
AnnaBridge 153:b484a57bc302 394 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 153:b484a57bc302 395 {
AnnaBridge 153:b484a57bc302 396 uint32_t result;
AnnaBridge 153:b484a57bc302 397
AnnaBridge 153:b484a57bc302 398 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 399 return(result);
AnnaBridge 153:b484a57bc302 400 }
AnnaBridge 153:b484a57bc302 401 #endif
AnnaBridge 153:b484a57bc302 402
AnnaBridge 153:b484a57bc302 403
AnnaBridge 153:b484a57bc302 404 /**
AnnaBridge 153:b484a57bc302 405 \brief Set Priority Mask
AnnaBridge 153:b484a57bc302 406 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 153:b484a57bc302 407 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 408 */
AnnaBridge 153:b484a57bc302 409 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 153:b484a57bc302 410 {
AnnaBridge 153:b484a57bc302 411 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 412 }
AnnaBridge 153:b484a57bc302 413
AnnaBridge 153:b484a57bc302 414
AnnaBridge 153:b484a57bc302 415 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 416 /**
AnnaBridge 153:b484a57bc302 417 \brief Set Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 418 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 419 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 420 */
AnnaBridge 153:b484a57bc302 421 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 153:b484a57bc302 422 {
AnnaBridge 153:b484a57bc302 423 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 424 }
AnnaBridge 153:b484a57bc302 425 #endif
AnnaBridge 153:b484a57bc302 426
AnnaBridge 153:b484a57bc302 427
AnnaBridge 153:b484a57bc302 428 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 429 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 430 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 431 /**
AnnaBridge 153:b484a57bc302 432 \brief Enable FIQ
AnnaBridge 153:b484a57bc302 433 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 434 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 435 */
AnnaBridge 153:b484a57bc302 436 __attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge 153:b484a57bc302 437 {
AnnaBridge 153:b484a57bc302 438 __ASM volatile ("cpsie f" : : : "memory");
AnnaBridge 153:b484a57bc302 439 }
AnnaBridge 153:b484a57bc302 440
AnnaBridge 153:b484a57bc302 441
AnnaBridge 153:b484a57bc302 442 /**
AnnaBridge 153:b484a57bc302 443 \brief Disable FIQ
AnnaBridge 153:b484a57bc302 444 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 445 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 446 */
AnnaBridge 153:b484a57bc302 447 __attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge 153:b484a57bc302 448 {
AnnaBridge 153:b484a57bc302 449 __ASM volatile ("cpsid f" : : : "memory");
AnnaBridge 153:b484a57bc302 450 }
AnnaBridge 153:b484a57bc302 451
AnnaBridge 153:b484a57bc302 452
AnnaBridge 153:b484a57bc302 453 /**
AnnaBridge 153:b484a57bc302 454 \brief Get Base Priority
AnnaBridge 153:b484a57bc302 455 \details Returns the current value of the Base Priority register.
AnnaBridge 153:b484a57bc302 456 \return Base Priority register value
AnnaBridge 153:b484a57bc302 457 */
AnnaBridge 153:b484a57bc302 458 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 153:b484a57bc302 459 {
AnnaBridge 153:b484a57bc302 460 uint32_t result;
AnnaBridge 153:b484a57bc302 461
AnnaBridge 153:b484a57bc302 462 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 153:b484a57bc302 463 return(result);
AnnaBridge 153:b484a57bc302 464 }
AnnaBridge 153:b484a57bc302 465
AnnaBridge 153:b484a57bc302 466
AnnaBridge 153:b484a57bc302 467 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 468 /**
AnnaBridge 153:b484a57bc302 469 \brief Get Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 470 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 471 \return Base Priority register value
AnnaBridge 153:b484a57bc302 472 */
AnnaBridge 153:b484a57bc302 473 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 153:b484a57bc302 474 {
AnnaBridge 153:b484a57bc302 475 uint32_t result;
AnnaBridge 153:b484a57bc302 476
AnnaBridge 153:b484a57bc302 477 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 478 return(result);
AnnaBridge 153:b484a57bc302 479 }
AnnaBridge 153:b484a57bc302 480 #endif
AnnaBridge 153:b484a57bc302 481
AnnaBridge 153:b484a57bc302 482
AnnaBridge 153:b484a57bc302 483 /**
AnnaBridge 153:b484a57bc302 484 \brief Set Base Priority
AnnaBridge 153:b484a57bc302 485 \details Assigns the given value to the Base Priority register.
AnnaBridge 153:b484a57bc302 486 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 487 */
AnnaBridge 153:b484a57bc302 488 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 153:b484a57bc302 489 {
AnnaBridge 153:b484a57bc302 490 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 491 }
AnnaBridge 153:b484a57bc302 492
AnnaBridge 153:b484a57bc302 493
AnnaBridge 153:b484a57bc302 494 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 495 /**
AnnaBridge 153:b484a57bc302 496 \brief Set Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 497 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 498 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 499 */
AnnaBridge 153:b484a57bc302 500 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 153:b484a57bc302 501 {
AnnaBridge 153:b484a57bc302 502 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 503 }
AnnaBridge 153:b484a57bc302 504 #endif
AnnaBridge 153:b484a57bc302 505
AnnaBridge 153:b484a57bc302 506
AnnaBridge 153:b484a57bc302 507 /**
AnnaBridge 153:b484a57bc302 508 \brief Set Base Priority with condition
AnnaBridge 153:b484a57bc302 509 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 153:b484a57bc302 510 or the new value increases the BASEPRI priority level.
AnnaBridge 153:b484a57bc302 511 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 512 */
AnnaBridge 153:b484a57bc302 513 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 153:b484a57bc302 514 {
AnnaBridge 153:b484a57bc302 515 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 516 }
AnnaBridge 153:b484a57bc302 517
AnnaBridge 153:b484a57bc302 518
AnnaBridge 153:b484a57bc302 519 /**
AnnaBridge 153:b484a57bc302 520 \brief Get Fault Mask
AnnaBridge 153:b484a57bc302 521 \details Returns the current value of the Fault Mask register.
AnnaBridge 153:b484a57bc302 522 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 523 */
AnnaBridge 153:b484a57bc302 524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 153:b484a57bc302 525 {
AnnaBridge 153:b484a57bc302 526 uint32_t result;
AnnaBridge 153:b484a57bc302 527
AnnaBridge 153:b484a57bc302 528 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 529 return(result);
AnnaBridge 153:b484a57bc302 530 }
AnnaBridge 153:b484a57bc302 531
AnnaBridge 153:b484a57bc302 532
AnnaBridge 153:b484a57bc302 533 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 534 /**
AnnaBridge 153:b484a57bc302 535 \brief Get Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 536 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 537 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 538 */
AnnaBridge 153:b484a57bc302 539 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 153:b484a57bc302 540 {
AnnaBridge 153:b484a57bc302 541 uint32_t result;
AnnaBridge 153:b484a57bc302 542
AnnaBridge 153:b484a57bc302 543 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 544 return(result);
AnnaBridge 153:b484a57bc302 545 }
AnnaBridge 153:b484a57bc302 546 #endif
AnnaBridge 153:b484a57bc302 547
AnnaBridge 153:b484a57bc302 548
AnnaBridge 153:b484a57bc302 549 /**
AnnaBridge 153:b484a57bc302 550 \brief Set Fault Mask
AnnaBridge 153:b484a57bc302 551 \details Assigns the given value to the Fault Mask register.
AnnaBridge 153:b484a57bc302 552 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 553 */
AnnaBridge 153:b484a57bc302 554 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 555 {
AnnaBridge 153:b484a57bc302 556 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 557 }
AnnaBridge 153:b484a57bc302 558
AnnaBridge 153:b484a57bc302 559
AnnaBridge 153:b484a57bc302 560 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 561 /**
AnnaBridge 153:b484a57bc302 562 \brief Set Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 563 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 564 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 565 */
AnnaBridge 153:b484a57bc302 566 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 567 {
AnnaBridge 153:b484a57bc302 568 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 569 }
AnnaBridge 153:b484a57bc302 570 #endif
AnnaBridge 153:b484a57bc302 571
AnnaBridge 153:b484a57bc302 572 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 573 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 574 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 575
AnnaBridge 153:b484a57bc302 576
AnnaBridge 153:b484a57bc302 577 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 578 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 579
AnnaBridge 153:b484a57bc302 580 /**
AnnaBridge 153:b484a57bc302 581 \brief Get Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 582 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 583 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 584 */
AnnaBridge 153:b484a57bc302 585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 153:b484a57bc302 586 {
AnnaBridge 153:b484a57bc302 587 register uint32_t result;
AnnaBridge 153:b484a57bc302 588
AnnaBridge 153:b484a57bc302 589 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 590 return(result);
AnnaBridge 153:b484a57bc302 591 }
AnnaBridge 153:b484a57bc302 592
AnnaBridge 153:b484a57bc302 593
AnnaBridge 153:b484a57bc302 594 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 595 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 596 /**
AnnaBridge 153:b484a57bc302 597 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 598 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 599 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 600 */
AnnaBridge 153:b484a57bc302 601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 602 {
AnnaBridge 153:b484a57bc302 603 register uint32_t result;
AnnaBridge 153:b484a57bc302 604
AnnaBridge 153:b484a57bc302 605 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 606 return(result);
AnnaBridge 153:b484a57bc302 607 }
AnnaBridge 153:b484a57bc302 608 #endif
AnnaBridge 153:b484a57bc302 609
AnnaBridge 153:b484a57bc302 610
AnnaBridge 153:b484a57bc302 611 /**
AnnaBridge 153:b484a57bc302 612 \brief Set Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 613 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 614 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 615 */
AnnaBridge 153:b484a57bc302 616 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 617 {
AnnaBridge 153:b484a57bc302 618 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 619 }
AnnaBridge 153:b484a57bc302 620
AnnaBridge 153:b484a57bc302 621
AnnaBridge 153:b484a57bc302 622 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 623 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 624 /**
AnnaBridge 153:b484a57bc302 625 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 626 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 627 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 628 */
AnnaBridge 153:b484a57bc302 629 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 630 {
AnnaBridge 153:b484a57bc302 631 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 632 }
AnnaBridge 153:b484a57bc302 633 #endif
AnnaBridge 153:b484a57bc302 634
AnnaBridge 153:b484a57bc302 635
AnnaBridge 153:b484a57bc302 636 /**
AnnaBridge 153:b484a57bc302 637 \brief Get Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 638 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 639 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 640 */
AnnaBridge 153:b484a57bc302 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 153:b484a57bc302 642 {
AnnaBridge 153:b484a57bc302 643 register uint32_t result;
AnnaBridge 153:b484a57bc302 644
AnnaBridge 153:b484a57bc302 645 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 646
AnnaBridge 153:b484a57bc302 647 return(result);
AnnaBridge 153:b484a57bc302 648 }
AnnaBridge 153:b484a57bc302 649
AnnaBridge 153:b484a57bc302 650
AnnaBridge 153:b484a57bc302 651 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 652 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 653 /**
AnnaBridge 153:b484a57bc302 654 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 655 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 656 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 657 */
AnnaBridge 153:b484a57bc302 658 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 659 {
AnnaBridge 153:b484a57bc302 660 register uint32_t result;
AnnaBridge 153:b484a57bc302 661
AnnaBridge 153:b484a57bc302 662 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 663 return(result);
AnnaBridge 153:b484a57bc302 664 }
AnnaBridge 153:b484a57bc302 665 #endif
AnnaBridge 153:b484a57bc302 666
AnnaBridge 153:b484a57bc302 667
AnnaBridge 153:b484a57bc302 668 /**
AnnaBridge 153:b484a57bc302 669 \brief Set Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 670 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 671 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 672 */
AnnaBridge 153:b484a57bc302 673 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 674 {
AnnaBridge 153:b484a57bc302 675 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 676 }
AnnaBridge 153:b484a57bc302 677
AnnaBridge 153:b484a57bc302 678
AnnaBridge 153:b484a57bc302 679 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 680 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 681 /**
AnnaBridge 153:b484a57bc302 682 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 683 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 684 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 685 */
AnnaBridge 153:b484a57bc302 686 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 687 {
AnnaBridge 153:b484a57bc302 688 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 689 }
AnnaBridge 153:b484a57bc302 690 #endif
AnnaBridge 153:b484a57bc302 691
AnnaBridge 153:b484a57bc302 692 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 693 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 694
AnnaBridge 153:b484a57bc302 695
AnnaBridge 153:b484a57bc302 696 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 697 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 698
AnnaBridge 153:b484a57bc302 699 /**
AnnaBridge 153:b484a57bc302 700 \brief Get FPSCR
AnnaBridge 153:b484a57bc302 701 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 702 \return Floating Point Status/Control register value
AnnaBridge 153:b484a57bc302 703 */
AnnaBridge 153:b484a57bc302 704 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 153:b484a57bc302 705 {
AnnaBridge 153:b484a57bc302 706 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 707 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 708 #if __has_builtin(__builtin_arm_get_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge 160:5571c4ff569f 709 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge 160:5571c4ff569f 710 return __builtin_arm_get_fpscr();
Anna Bridge 160:5571c4ff569f 711 #else
AnnaBridge 153:b484a57bc302 712 uint32_t result;
AnnaBridge 153:b484a57bc302 713
AnnaBridge 153:b484a57bc302 714 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 715 return(result);
Anna Bridge 160:5571c4ff569f 716 #endif
AnnaBridge 153:b484a57bc302 717 #else
Anna Bridge 160:5571c4ff569f 718 return(0U);
AnnaBridge 153:b484a57bc302 719 #endif
AnnaBridge 153:b484a57bc302 720 }
AnnaBridge 153:b484a57bc302 721
AnnaBridge 153:b484a57bc302 722
AnnaBridge 153:b484a57bc302 723 /**
AnnaBridge 153:b484a57bc302 724 \brief Set FPSCR
AnnaBridge 153:b484a57bc302 725 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 726 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 153:b484a57bc302 727 */
AnnaBridge 153:b484a57bc302 728 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 153:b484a57bc302 729 {
AnnaBridge 153:b484a57bc302 730 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 731 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 732 #if __has_builtin(__builtin_arm_set_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge 160:5571c4ff569f 733 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge 160:5571c4ff569f 734 __builtin_arm_set_fpscr(fpscr);
Anna Bridge 160:5571c4ff569f 735 #else
AnnaBridge 153:b484a57bc302 736 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
Anna Bridge 160:5571c4ff569f 737 #endif
AnnaBridge 153:b484a57bc302 738 #else
AnnaBridge 153:b484a57bc302 739 (void)fpscr;
AnnaBridge 153:b484a57bc302 740 #endif
AnnaBridge 153:b484a57bc302 741 }
AnnaBridge 153:b484a57bc302 742
AnnaBridge 153:b484a57bc302 743 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 744 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 745
AnnaBridge 153:b484a57bc302 746
AnnaBridge 153:b484a57bc302 747
AnnaBridge 153:b484a57bc302 748 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 153:b484a57bc302 749
AnnaBridge 153:b484a57bc302 750
AnnaBridge 153:b484a57bc302 751 /* ########################## Core Instruction Access ######################### */
AnnaBridge 153:b484a57bc302 752 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 153:b484a57bc302 753 Access to dedicated instructions
AnnaBridge 153:b484a57bc302 754 @{
AnnaBridge 153:b484a57bc302 755 */
AnnaBridge 153:b484a57bc302 756
AnnaBridge 153:b484a57bc302 757 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 153:b484a57bc302 758 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 153:b484a57bc302 759 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 153:b484a57bc302 760 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 153:b484a57bc302 761 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 153:b484a57bc302 762 #define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge 153:b484a57bc302 763 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 153:b484a57bc302 764 #else
AnnaBridge 153:b484a57bc302 765 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 153:b484a57bc302 766 #define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge 153:b484a57bc302 767 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 153:b484a57bc302 768 #endif
AnnaBridge 153:b484a57bc302 769
AnnaBridge 153:b484a57bc302 770 /**
AnnaBridge 153:b484a57bc302 771 \brief No Operation
AnnaBridge 153:b484a57bc302 772 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 153:b484a57bc302 773 */
AnnaBridge 153:b484a57bc302 774 //__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
AnnaBridge 153:b484a57bc302 775 //{
AnnaBridge 153:b484a57bc302 776 // __ASM volatile ("nop");
AnnaBridge 153:b484a57bc302 777 //}
AnnaBridge 153:b484a57bc302 778 #define __NOP() __ASM volatile ("nop") /* This implementation generates debug information */
AnnaBridge 153:b484a57bc302 779
AnnaBridge 153:b484a57bc302 780 /**
AnnaBridge 153:b484a57bc302 781 \brief Wait For Interrupt
AnnaBridge 153:b484a57bc302 782 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 783 */
AnnaBridge 153:b484a57bc302 784 //__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
AnnaBridge 153:b484a57bc302 785 //{
AnnaBridge 153:b484a57bc302 786 // __ASM volatile ("wfi");
AnnaBridge 153:b484a57bc302 787 //}
AnnaBridge 153:b484a57bc302 788 #define __WFI() __ASM volatile ("wfi") /* This implementation generates debug information */
AnnaBridge 153:b484a57bc302 789
AnnaBridge 153:b484a57bc302 790
AnnaBridge 153:b484a57bc302 791 /**
AnnaBridge 153:b484a57bc302 792 \brief Wait For Event
AnnaBridge 153:b484a57bc302 793 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 153:b484a57bc302 794 a low-power state until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 795 */
AnnaBridge 153:b484a57bc302 796 //__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
AnnaBridge 153:b484a57bc302 797 //{
AnnaBridge 153:b484a57bc302 798 // __ASM volatile ("wfe");
AnnaBridge 153:b484a57bc302 799 //}
AnnaBridge 153:b484a57bc302 800 #define __WFE() __ASM volatile ("wfe") /* This implementation generates debug information */
AnnaBridge 153:b484a57bc302 801
AnnaBridge 153:b484a57bc302 802
AnnaBridge 153:b484a57bc302 803 /**
AnnaBridge 153:b484a57bc302 804 \brief Send Event
AnnaBridge 153:b484a57bc302 805 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 153:b484a57bc302 806 */
AnnaBridge 153:b484a57bc302 807 //__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
AnnaBridge 153:b484a57bc302 808 //{
AnnaBridge 153:b484a57bc302 809 // __ASM volatile ("sev");
AnnaBridge 153:b484a57bc302 810 //}
AnnaBridge 153:b484a57bc302 811 #define __SEV() __ASM volatile ("sev") /* This implementation generates debug information */
AnnaBridge 153:b484a57bc302 812
AnnaBridge 153:b484a57bc302 813
AnnaBridge 153:b484a57bc302 814 /**
AnnaBridge 153:b484a57bc302 815 \brief Instruction Synchronization Barrier
AnnaBridge 153:b484a57bc302 816 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 153:b484a57bc302 817 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 153:b484a57bc302 818 after the instruction has been completed.
AnnaBridge 153:b484a57bc302 819 */
AnnaBridge 153:b484a57bc302 820 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
AnnaBridge 153:b484a57bc302 821 {
AnnaBridge 153:b484a57bc302 822 __ASM volatile ("isb 0xF":::"memory");
AnnaBridge 153:b484a57bc302 823 }
AnnaBridge 153:b484a57bc302 824
AnnaBridge 153:b484a57bc302 825
AnnaBridge 153:b484a57bc302 826 /**
AnnaBridge 153:b484a57bc302 827 \brief Data Synchronization Barrier
AnnaBridge 153:b484a57bc302 828 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 153:b484a57bc302 829 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 153:b484a57bc302 830 */
AnnaBridge 153:b484a57bc302 831 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
AnnaBridge 153:b484a57bc302 832 {
AnnaBridge 153:b484a57bc302 833 __ASM volatile ("dsb 0xF":::"memory");
AnnaBridge 153:b484a57bc302 834 }
AnnaBridge 153:b484a57bc302 835
AnnaBridge 153:b484a57bc302 836
AnnaBridge 153:b484a57bc302 837 /**
AnnaBridge 153:b484a57bc302 838 \brief Data Memory Barrier
AnnaBridge 153:b484a57bc302 839 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 153:b484a57bc302 840 and after the instruction, without ensuring their completion.
AnnaBridge 153:b484a57bc302 841 */
AnnaBridge 153:b484a57bc302 842 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
AnnaBridge 153:b484a57bc302 843 {
AnnaBridge 153:b484a57bc302 844 __ASM volatile ("dmb 0xF":::"memory");
AnnaBridge 153:b484a57bc302 845 }
AnnaBridge 153:b484a57bc302 846
AnnaBridge 153:b484a57bc302 847
AnnaBridge 153:b484a57bc302 848 /**
AnnaBridge 153:b484a57bc302 849 \brief Reverse byte order (32 bit)
Anna Bridge 160:5571c4ff569f 850 \details Reverses the byte order in unsigned integer value.
AnnaBridge 153:b484a57bc302 851 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 852 \return Reversed value
AnnaBridge 153:b484a57bc302 853 */
AnnaBridge 153:b484a57bc302 854 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
AnnaBridge 153:b484a57bc302 855 {
AnnaBridge 153:b484a57bc302 856 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge 153:b484a57bc302 857 return __builtin_bswap32(value);
AnnaBridge 153:b484a57bc302 858 #else
AnnaBridge 153:b484a57bc302 859 uint32_t result;
AnnaBridge 153:b484a57bc302 860
AnnaBridge 153:b484a57bc302 861 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 862 return(result);
AnnaBridge 153:b484a57bc302 863 #endif
AnnaBridge 153:b484a57bc302 864 }
AnnaBridge 153:b484a57bc302 865
AnnaBridge 153:b484a57bc302 866
AnnaBridge 153:b484a57bc302 867 /**
AnnaBridge 153:b484a57bc302 868 \brief Reverse byte order (16 bit)
Anna Bridge 160:5571c4ff569f 869 \details Reverses the byte order in unsigned short value.
AnnaBridge 153:b484a57bc302 870 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 871 \return Reversed value
AnnaBridge 153:b484a57bc302 872 */
Anna Bridge 160:5571c4ff569f 873 __attribute__((always_inline)) __STATIC_INLINE uint16_t __REV16(uint16_t value)
AnnaBridge 153:b484a57bc302 874 {
Anna Bridge 160:5571c4ff569f 875 uint16_t result;
AnnaBridge 153:b484a57bc302 876
AnnaBridge 153:b484a57bc302 877 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 878 return(result);
AnnaBridge 153:b484a57bc302 879 }
AnnaBridge 153:b484a57bc302 880
AnnaBridge 153:b484a57bc302 881
AnnaBridge 153:b484a57bc302 882 /**
AnnaBridge 153:b484a57bc302 883 \brief Reverse byte order in signed short value
AnnaBridge 153:b484a57bc302 884 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 153:b484a57bc302 885 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 886 \return Reversed value
AnnaBridge 153:b484a57bc302 887 */
Anna Bridge 160:5571c4ff569f 888 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 153:b484a57bc302 889 {
AnnaBridge 153:b484a57bc302 890 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Anna Bridge 160:5571c4ff569f 891 return (int16_t)__builtin_bswap16(value);
AnnaBridge 153:b484a57bc302 892 #else
Anna Bridge 160:5571c4ff569f 893 int16_t result;
AnnaBridge 153:b484a57bc302 894
AnnaBridge 153:b484a57bc302 895 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge 160:5571c4ff569f 896 return result;
AnnaBridge 153:b484a57bc302 897 #endif
AnnaBridge 153:b484a57bc302 898 }
AnnaBridge 153:b484a57bc302 899
AnnaBridge 153:b484a57bc302 900
AnnaBridge 153:b484a57bc302 901 /**
AnnaBridge 153:b484a57bc302 902 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 153:b484a57bc302 903 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 153:b484a57bc302 904 \param [in] op1 Value to rotate
AnnaBridge 153:b484a57bc302 905 \param [in] op2 Number of Bits to rotate
AnnaBridge 153:b484a57bc302 906 \return Rotated value
AnnaBridge 153:b484a57bc302 907 */
AnnaBridge 153:b484a57bc302 908 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 909 {
AnnaBridge 153:b484a57bc302 910 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 153:b484a57bc302 911 }
AnnaBridge 153:b484a57bc302 912
AnnaBridge 153:b484a57bc302 913
AnnaBridge 153:b484a57bc302 914 /**
AnnaBridge 153:b484a57bc302 915 \brief Breakpoint
AnnaBridge 153:b484a57bc302 916 \details Causes the processor to enter Debug state.
AnnaBridge 153:b484a57bc302 917 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 153:b484a57bc302 918 \param [in] value is ignored by the processor.
AnnaBridge 153:b484a57bc302 919 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 153:b484a57bc302 920 */
AnnaBridge 153:b484a57bc302 921 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 153:b484a57bc302 922
AnnaBridge 153:b484a57bc302 923
AnnaBridge 153:b484a57bc302 924 /**
AnnaBridge 153:b484a57bc302 925 \brief Reverse bit order of value
AnnaBridge 153:b484a57bc302 926 \details Reverses the bit order of the given value.
AnnaBridge 153:b484a57bc302 927 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 928 \return Reversed value
AnnaBridge 153:b484a57bc302 929 */
AnnaBridge 153:b484a57bc302 930 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 153:b484a57bc302 931 {
AnnaBridge 153:b484a57bc302 932 uint32_t result;
AnnaBridge 153:b484a57bc302 933
AnnaBridge 153:b484a57bc302 934 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 935 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 936 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 937 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 153:b484a57bc302 938 #else
Anna Bridge 160:5571c4ff569f 939 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge 153:b484a57bc302 940
AnnaBridge 153:b484a57bc302 941 result = value; /* r will be reversed bits of v; first get LSB of v */
Anna Bridge 160:5571c4ff569f 942 for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge 153:b484a57bc302 943 {
AnnaBridge 153:b484a57bc302 944 result <<= 1U;
AnnaBridge 153:b484a57bc302 945 result |= value & 1U;
AnnaBridge 153:b484a57bc302 946 s--;
AnnaBridge 153:b484a57bc302 947 }
AnnaBridge 153:b484a57bc302 948 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 153:b484a57bc302 949 #endif
Anna Bridge 160:5571c4ff569f 950 return result;
AnnaBridge 153:b484a57bc302 951 }
AnnaBridge 153:b484a57bc302 952
AnnaBridge 153:b484a57bc302 953
AnnaBridge 153:b484a57bc302 954 /**
AnnaBridge 153:b484a57bc302 955 \brief Count leading zeros
AnnaBridge 153:b484a57bc302 956 \details Counts the number of leading zeros of a data value.
AnnaBridge 153:b484a57bc302 957 \param [in] value Value to count the leading zeros
AnnaBridge 153:b484a57bc302 958 \return number of leading zeros in value
AnnaBridge 153:b484a57bc302 959 */
AnnaBridge 153:b484a57bc302 960 #define __CLZ __builtin_clz
AnnaBridge 153:b484a57bc302 961
AnnaBridge 153:b484a57bc302 962
AnnaBridge 153:b484a57bc302 963 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 964 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 965 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 966 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 967 /**
AnnaBridge 153:b484a57bc302 968 \brief LDR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 969 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 970 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 971 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 972 */
AnnaBridge 153:b484a57bc302 973 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge 153:b484a57bc302 974 {
AnnaBridge 153:b484a57bc302 975 uint32_t result;
AnnaBridge 153:b484a57bc302 976
AnnaBridge 153:b484a57bc302 977 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 153:b484a57bc302 978 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 153:b484a57bc302 979 #else
AnnaBridge 153:b484a57bc302 980 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 153:b484a57bc302 981 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 153:b484a57bc302 982 */
AnnaBridge 153:b484a57bc302 983 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 153:b484a57bc302 984 #endif
AnnaBridge 153:b484a57bc302 985 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 986 }
AnnaBridge 153:b484a57bc302 987
AnnaBridge 153:b484a57bc302 988
AnnaBridge 153:b484a57bc302 989 /**
AnnaBridge 153:b484a57bc302 990 \brief LDR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 991 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 992 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 993 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 994 */
AnnaBridge 153:b484a57bc302 995 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge 153:b484a57bc302 996 {
AnnaBridge 153:b484a57bc302 997 uint32_t result;
AnnaBridge 153:b484a57bc302 998
AnnaBridge 153:b484a57bc302 999 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 153:b484a57bc302 1000 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 153:b484a57bc302 1001 #else
AnnaBridge 153:b484a57bc302 1002 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 153:b484a57bc302 1003 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 153:b484a57bc302 1004 */
AnnaBridge 153:b484a57bc302 1005 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 153:b484a57bc302 1006 #endif
AnnaBridge 153:b484a57bc302 1007 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1008 }
AnnaBridge 153:b484a57bc302 1009
AnnaBridge 153:b484a57bc302 1010
AnnaBridge 153:b484a57bc302 1011 /**
AnnaBridge 153:b484a57bc302 1012 \brief LDR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1013 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1014 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1015 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1016 */
AnnaBridge 153:b484a57bc302 1017 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge 153:b484a57bc302 1018 {
AnnaBridge 153:b484a57bc302 1019 uint32_t result;
AnnaBridge 153:b484a57bc302 1020
AnnaBridge 153:b484a57bc302 1021 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 153:b484a57bc302 1022 return(result);
AnnaBridge 153:b484a57bc302 1023 }
AnnaBridge 153:b484a57bc302 1024
AnnaBridge 153:b484a57bc302 1025
AnnaBridge 153:b484a57bc302 1026 /**
AnnaBridge 153:b484a57bc302 1027 \brief STR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1028 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1029 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1030 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1031 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1032 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1033 */
AnnaBridge 153:b484a57bc302 1034 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge 153:b484a57bc302 1035 {
AnnaBridge 153:b484a57bc302 1036 uint32_t result;
AnnaBridge 153:b484a57bc302 1037
AnnaBridge 153:b484a57bc302 1038 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1039 return(result);
AnnaBridge 153:b484a57bc302 1040 }
AnnaBridge 153:b484a57bc302 1041
AnnaBridge 153:b484a57bc302 1042
AnnaBridge 153:b484a57bc302 1043 /**
AnnaBridge 153:b484a57bc302 1044 \brief STR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1045 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1046 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1047 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1048 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1049 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1050 */
AnnaBridge 153:b484a57bc302 1051 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge 153:b484a57bc302 1052 {
AnnaBridge 153:b484a57bc302 1053 uint32_t result;
AnnaBridge 153:b484a57bc302 1054
AnnaBridge 153:b484a57bc302 1055 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1056 return(result);
AnnaBridge 153:b484a57bc302 1057 }
AnnaBridge 153:b484a57bc302 1058
AnnaBridge 153:b484a57bc302 1059
AnnaBridge 153:b484a57bc302 1060 /**
AnnaBridge 153:b484a57bc302 1061 \brief STR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1062 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1063 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1064 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1065 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1066 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1067 */
AnnaBridge 153:b484a57bc302 1068 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge 153:b484a57bc302 1069 {
AnnaBridge 153:b484a57bc302 1070 uint32_t result;
AnnaBridge 153:b484a57bc302 1071
AnnaBridge 153:b484a57bc302 1072 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge 153:b484a57bc302 1073 return(result);
AnnaBridge 153:b484a57bc302 1074 }
AnnaBridge 153:b484a57bc302 1075
AnnaBridge 153:b484a57bc302 1076
AnnaBridge 153:b484a57bc302 1077 /**
AnnaBridge 153:b484a57bc302 1078 \brief Remove the exclusive lock
AnnaBridge 153:b484a57bc302 1079 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 153:b484a57bc302 1080 */
AnnaBridge 153:b484a57bc302 1081 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
AnnaBridge 153:b484a57bc302 1082 {
AnnaBridge 153:b484a57bc302 1083 __ASM volatile ("clrex" ::: "memory");
AnnaBridge 153:b484a57bc302 1084 }
AnnaBridge 153:b484a57bc302 1085
AnnaBridge 153:b484a57bc302 1086 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 1087 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 1088 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1089 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1090
AnnaBridge 153:b484a57bc302 1091
AnnaBridge 153:b484a57bc302 1092 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 1093 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 1094 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 1095 /**
AnnaBridge 153:b484a57bc302 1096 \brief Signed Saturate
AnnaBridge 153:b484a57bc302 1097 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1098 \param [in] ARG1 Value to be saturated
Anna Bridge 160:5571c4ff569f 1099 \param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge 153:b484a57bc302 1100 \return Saturated value
AnnaBridge 153:b484a57bc302 1101 */
AnnaBridge 153:b484a57bc302 1102 #define __SSAT(ARG1,ARG2) \
Anna Bridge 160:5571c4ff569f 1103 __extension__ \
AnnaBridge 153:b484a57bc302 1104 ({ \
AnnaBridge 153:b484a57bc302 1105 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1106 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1107 __RES; \
AnnaBridge 153:b484a57bc302 1108 })
AnnaBridge 153:b484a57bc302 1109
AnnaBridge 153:b484a57bc302 1110
AnnaBridge 153:b484a57bc302 1111 /**
AnnaBridge 153:b484a57bc302 1112 \brief Unsigned Saturate
AnnaBridge 153:b484a57bc302 1113 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1114 \param [in] ARG1 Value to be saturated
Anna Bridge 160:5571c4ff569f 1115 \param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge 153:b484a57bc302 1116 \return Saturated value
AnnaBridge 153:b484a57bc302 1117 */
AnnaBridge 153:b484a57bc302 1118 #define __USAT(ARG1,ARG2) \
Anna Bridge 160:5571c4ff569f 1119 __extension__ \
AnnaBridge 153:b484a57bc302 1120 ({ \
AnnaBridge 153:b484a57bc302 1121 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1122 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1123 __RES; \
AnnaBridge 153:b484a57bc302 1124 })
AnnaBridge 153:b484a57bc302 1125
AnnaBridge 153:b484a57bc302 1126
AnnaBridge 153:b484a57bc302 1127 /**
AnnaBridge 153:b484a57bc302 1128 \brief Rotate Right with Extend (32 bit)
AnnaBridge 153:b484a57bc302 1129 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 153:b484a57bc302 1130 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 153:b484a57bc302 1131 \param [in] value Value to rotate
AnnaBridge 153:b484a57bc302 1132 \return Rotated value
AnnaBridge 153:b484a57bc302 1133 */
AnnaBridge 153:b484a57bc302 1134 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 153:b484a57bc302 1135 {
AnnaBridge 153:b484a57bc302 1136 uint32_t result;
AnnaBridge 153:b484a57bc302 1137
AnnaBridge 153:b484a57bc302 1138 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 1139 return(result);
AnnaBridge 153:b484a57bc302 1140 }
AnnaBridge 153:b484a57bc302 1141
AnnaBridge 153:b484a57bc302 1142
AnnaBridge 153:b484a57bc302 1143 /**
AnnaBridge 153:b484a57bc302 1144 \brief LDRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 1145 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1146 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1147 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1148 */
AnnaBridge 153:b484a57bc302 1149 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1150 {
AnnaBridge 153:b484a57bc302 1151 uint32_t result;
AnnaBridge 153:b484a57bc302 1152
AnnaBridge 153:b484a57bc302 1153 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 153:b484a57bc302 1154 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1155 #else
AnnaBridge 153:b484a57bc302 1156 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 153:b484a57bc302 1157 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 153:b484a57bc302 1158 */
AnnaBridge 153:b484a57bc302 1159 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 153:b484a57bc302 1160 #endif
AnnaBridge 153:b484a57bc302 1161 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1162 }
AnnaBridge 153:b484a57bc302 1163
AnnaBridge 153:b484a57bc302 1164
AnnaBridge 153:b484a57bc302 1165 /**
AnnaBridge 153:b484a57bc302 1166 \brief LDRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 1167 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1168 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1169 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1170 */
AnnaBridge 153:b484a57bc302 1171 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1172 {
AnnaBridge 153:b484a57bc302 1173 uint32_t result;
AnnaBridge 153:b484a57bc302 1174
AnnaBridge 153:b484a57bc302 1175 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 153:b484a57bc302 1176 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1177 #else
AnnaBridge 153:b484a57bc302 1178 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 153:b484a57bc302 1179 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 153:b484a57bc302 1180 */
AnnaBridge 153:b484a57bc302 1181 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 153:b484a57bc302 1182 #endif
AnnaBridge 153:b484a57bc302 1183 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1184 }
AnnaBridge 153:b484a57bc302 1185
AnnaBridge 153:b484a57bc302 1186
AnnaBridge 153:b484a57bc302 1187 /**
AnnaBridge 153:b484a57bc302 1188 \brief LDRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1189 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1190 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1191 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1192 */
AnnaBridge 153:b484a57bc302 1193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1194 {
AnnaBridge 153:b484a57bc302 1195 uint32_t result;
AnnaBridge 153:b484a57bc302 1196
AnnaBridge 153:b484a57bc302 1197 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1198 return(result);
AnnaBridge 153:b484a57bc302 1199 }
AnnaBridge 153:b484a57bc302 1200
AnnaBridge 153:b484a57bc302 1201
AnnaBridge 153:b484a57bc302 1202 /**
AnnaBridge 153:b484a57bc302 1203 \brief STRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 1204 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1205 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1206 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1207 */
AnnaBridge 153:b484a57bc302 1208 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1209 {
AnnaBridge 153:b484a57bc302 1210 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1211 }
AnnaBridge 153:b484a57bc302 1212
AnnaBridge 153:b484a57bc302 1213
AnnaBridge 153:b484a57bc302 1214 /**
AnnaBridge 153:b484a57bc302 1215 \brief STRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 1216 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1217 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1218 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1219 */
AnnaBridge 153:b484a57bc302 1220 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1221 {
AnnaBridge 153:b484a57bc302 1222 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1223 }
AnnaBridge 153:b484a57bc302 1224
AnnaBridge 153:b484a57bc302 1225
AnnaBridge 153:b484a57bc302 1226 /**
AnnaBridge 153:b484a57bc302 1227 \brief STRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1228 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1229 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1230 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1231 */
AnnaBridge 153:b484a57bc302 1232 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1233 {
AnnaBridge 153:b484a57bc302 1234 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 153:b484a57bc302 1235 }
AnnaBridge 153:b484a57bc302 1236
Anna Bridge 160:5571c4ff569f 1237 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1238 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1239 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge 160:5571c4ff569f 1240
Anna Bridge 160:5571c4ff569f 1241 /**
Anna Bridge 160:5571c4ff569f 1242 \brief Signed Saturate
Anna Bridge 160:5571c4ff569f 1243 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1244 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1245 \param [in] sat Bit position to saturate to (1..32)
Anna Bridge 160:5571c4ff569f 1246 \return Saturated value
Anna Bridge 160:5571c4ff569f 1247 */
Anna Bridge 160:5571c4ff569f 1248 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1249 {
Anna Bridge 160:5571c4ff569f 1250 if ((sat >= 1U) && (sat <= 32U)) {
Anna Bridge 160:5571c4ff569f 1251 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge 160:5571c4ff569f 1252 const int32_t min = -1 - max ;
Anna Bridge 160:5571c4ff569f 1253 if (val > max) {
Anna Bridge 160:5571c4ff569f 1254 return max;
Anna Bridge 160:5571c4ff569f 1255 } else if (val < min) {
Anna Bridge 160:5571c4ff569f 1256 return min;
Anna Bridge 160:5571c4ff569f 1257 }
Anna Bridge 160:5571c4ff569f 1258 }
Anna Bridge 160:5571c4ff569f 1259 return val;
Anna Bridge 160:5571c4ff569f 1260 }
Anna Bridge 160:5571c4ff569f 1261
Anna Bridge 160:5571c4ff569f 1262 /**
Anna Bridge 160:5571c4ff569f 1263 \brief Unsigned Saturate
Anna Bridge 160:5571c4ff569f 1264 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1265 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1266 \param [in] sat Bit position to saturate to (0..31)
Anna Bridge 160:5571c4ff569f 1267 \return Saturated value
Anna Bridge 160:5571c4ff569f 1268 */
Anna Bridge 160:5571c4ff569f 1269 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1270 {
Anna Bridge 160:5571c4ff569f 1271 if (sat <= 31U) {
Anna Bridge 160:5571c4ff569f 1272 const uint32_t max = ((1U << sat) - 1U);
Anna Bridge 160:5571c4ff569f 1273 if (val > (int32_t)max) {
Anna Bridge 160:5571c4ff569f 1274 return max;
Anna Bridge 160:5571c4ff569f 1275 } else if (val < 0) {
Anna Bridge 160:5571c4ff569f 1276 return 0U;
Anna Bridge 160:5571c4ff569f 1277 }
Anna Bridge 160:5571c4ff569f 1278 }
Anna Bridge 160:5571c4ff569f 1279 return (uint32_t)val;
Anna Bridge 160:5571c4ff569f 1280 }
Anna Bridge 160:5571c4ff569f 1281
AnnaBridge 153:b484a57bc302 1282 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 1283 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 1284 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1285
AnnaBridge 153:b484a57bc302 1286
AnnaBridge 153:b484a57bc302 1287 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1288 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 1289 /**
AnnaBridge 153:b484a57bc302 1290 \brief Load-Acquire (8 bit)
AnnaBridge 153:b484a57bc302 1291 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1292 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1293 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1294 */
AnnaBridge 153:b484a57bc302 1295 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1296 {
AnnaBridge 153:b484a57bc302 1297 uint32_t result;
AnnaBridge 153:b484a57bc302 1298
AnnaBridge 153:b484a57bc302 1299 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1300 return ((uint8_t) result);
AnnaBridge 153:b484a57bc302 1301 }
AnnaBridge 153:b484a57bc302 1302
AnnaBridge 153:b484a57bc302 1303
AnnaBridge 153:b484a57bc302 1304 /**
AnnaBridge 153:b484a57bc302 1305 \brief Load-Acquire (16 bit)
AnnaBridge 153:b484a57bc302 1306 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1307 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1308 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1309 */
AnnaBridge 153:b484a57bc302 1310 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1311 {
AnnaBridge 153:b484a57bc302 1312 uint32_t result;
AnnaBridge 153:b484a57bc302 1313
AnnaBridge 153:b484a57bc302 1314 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1315 return ((uint16_t) result);
AnnaBridge 153:b484a57bc302 1316 }
AnnaBridge 153:b484a57bc302 1317
AnnaBridge 153:b484a57bc302 1318
AnnaBridge 153:b484a57bc302 1319 /**
AnnaBridge 153:b484a57bc302 1320 \brief Load-Acquire (32 bit)
AnnaBridge 153:b484a57bc302 1321 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1322 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1323 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1324 */
AnnaBridge 153:b484a57bc302 1325 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1326 {
AnnaBridge 153:b484a57bc302 1327 uint32_t result;
AnnaBridge 153:b484a57bc302 1328
AnnaBridge 153:b484a57bc302 1329 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1330 return(result);
AnnaBridge 153:b484a57bc302 1331 }
AnnaBridge 153:b484a57bc302 1332
AnnaBridge 153:b484a57bc302 1333
AnnaBridge 153:b484a57bc302 1334 /**
AnnaBridge 153:b484a57bc302 1335 \brief Store-Release (8 bit)
AnnaBridge 153:b484a57bc302 1336 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1337 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1338 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1339 */
AnnaBridge 153:b484a57bc302 1340 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1341 {
AnnaBridge 153:b484a57bc302 1342 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1343 }
AnnaBridge 153:b484a57bc302 1344
AnnaBridge 153:b484a57bc302 1345
AnnaBridge 153:b484a57bc302 1346 /**
AnnaBridge 153:b484a57bc302 1347 \brief Store-Release (16 bit)
AnnaBridge 153:b484a57bc302 1348 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1349 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1350 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1351 */
AnnaBridge 153:b484a57bc302 1352 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1353 {
AnnaBridge 153:b484a57bc302 1354 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1355 }
AnnaBridge 153:b484a57bc302 1356
AnnaBridge 153:b484a57bc302 1357
AnnaBridge 153:b484a57bc302 1358 /**
AnnaBridge 153:b484a57bc302 1359 \brief Store-Release (32 bit)
AnnaBridge 153:b484a57bc302 1360 \details Executes a STL instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1361 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1362 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1363 */
AnnaBridge 153:b484a57bc302 1364 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1365 {
AnnaBridge 153:b484a57bc302 1366 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1367 }
AnnaBridge 153:b484a57bc302 1368
AnnaBridge 153:b484a57bc302 1369
AnnaBridge 153:b484a57bc302 1370 /**
AnnaBridge 153:b484a57bc302 1371 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1372 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1373 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1374 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1375 */
AnnaBridge 153:b484a57bc302 1376 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1377 {
AnnaBridge 153:b484a57bc302 1378 uint32_t result;
AnnaBridge 153:b484a57bc302 1379
AnnaBridge 153:b484a57bc302 1380 __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1381 return ((uint8_t) result);
AnnaBridge 153:b484a57bc302 1382 }
AnnaBridge 153:b484a57bc302 1383
AnnaBridge 153:b484a57bc302 1384
AnnaBridge 153:b484a57bc302 1385 /**
AnnaBridge 153:b484a57bc302 1386 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1387 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1388 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1389 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1390 */
AnnaBridge 153:b484a57bc302 1391 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1392 {
AnnaBridge 153:b484a57bc302 1393 uint32_t result;
AnnaBridge 153:b484a57bc302 1394
AnnaBridge 153:b484a57bc302 1395 __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1396 return ((uint16_t) result);
AnnaBridge 153:b484a57bc302 1397 }
AnnaBridge 153:b484a57bc302 1398
AnnaBridge 153:b484a57bc302 1399
AnnaBridge 153:b484a57bc302 1400 /**
AnnaBridge 153:b484a57bc302 1401 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1402 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1403 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1404 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1405 */
AnnaBridge 153:b484a57bc302 1406 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1407 {
AnnaBridge 153:b484a57bc302 1408 uint32_t result;
AnnaBridge 153:b484a57bc302 1409
AnnaBridge 153:b484a57bc302 1410 __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1411 return(result);
AnnaBridge 153:b484a57bc302 1412 }
AnnaBridge 153:b484a57bc302 1413
AnnaBridge 153:b484a57bc302 1414
AnnaBridge 153:b484a57bc302 1415 /**
AnnaBridge 153:b484a57bc302 1416 \brief Store-Release Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1417 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1418 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1419 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1420 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1421 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1422 */
AnnaBridge 153:b484a57bc302 1423 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1424 {
AnnaBridge 153:b484a57bc302 1425 uint32_t result;
AnnaBridge 153:b484a57bc302 1426
AnnaBridge 153:b484a57bc302 1427 __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1428 return(result);
AnnaBridge 153:b484a57bc302 1429 }
AnnaBridge 153:b484a57bc302 1430
AnnaBridge 153:b484a57bc302 1431
AnnaBridge 153:b484a57bc302 1432 /**
AnnaBridge 153:b484a57bc302 1433 \brief Store-Release Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1434 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1435 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1436 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1437 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1438 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1439 */
AnnaBridge 153:b484a57bc302 1440 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1441 {
AnnaBridge 153:b484a57bc302 1442 uint32_t result;
AnnaBridge 153:b484a57bc302 1443
AnnaBridge 153:b484a57bc302 1444 __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1445 return(result);
AnnaBridge 153:b484a57bc302 1446 }
AnnaBridge 153:b484a57bc302 1447
AnnaBridge 153:b484a57bc302 1448
AnnaBridge 153:b484a57bc302 1449 /**
AnnaBridge 153:b484a57bc302 1450 \brief Store-Release Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1451 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1452 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1453 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1454 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1455 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1456 */
AnnaBridge 153:b484a57bc302 1457 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1458 {
AnnaBridge 153:b484a57bc302 1459 uint32_t result;
AnnaBridge 153:b484a57bc302 1460
AnnaBridge 153:b484a57bc302 1461 __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1462 return(result);
AnnaBridge 153:b484a57bc302 1463 }
AnnaBridge 153:b484a57bc302 1464
AnnaBridge 153:b484a57bc302 1465 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1466 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1467
AnnaBridge 153:b484a57bc302 1468 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 153:b484a57bc302 1469
AnnaBridge 153:b484a57bc302 1470
AnnaBridge 153:b484a57bc302 1471 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 153:b484a57bc302 1472 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 153:b484a57bc302 1473 Access to dedicated SIMD instructions
AnnaBridge 153:b484a57bc302 1474 @{
AnnaBridge 153:b484a57bc302 1475 */
AnnaBridge 153:b484a57bc302 1476
AnnaBridge 153:b484a57bc302 1477 #if (__ARM_FEATURE_DSP == 1) /* ToDo ARMCLANG: This should be ARCH >= ARMv7-M + SIMD */
AnnaBridge 153:b484a57bc302 1478
AnnaBridge 153:b484a57bc302 1479 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1480 {
AnnaBridge 153:b484a57bc302 1481 uint32_t result;
AnnaBridge 153:b484a57bc302 1482
AnnaBridge 153:b484a57bc302 1483 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1484 return(result);
AnnaBridge 153:b484a57bc302 1485 }
AnnaBridge 153:b484a57bc302 1486
AnnaBridge 153:b484a57bc302 1487 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1488 {
AnnaBridge 153:b484a57bc302 1489 uint32_t result;
AnnaBridge 153:b484a57bc302 1490
AnnaBridge 153:b484a57bc302 1491 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1492 return(result);
AnnaBridge 153:b484a57bc302 1493 }
AnnaBridge 153:b484a57bc302 1494
AnnaBridge 153:b484a57bc302 1495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1496 {
AnnaBridge 153:b484a57bc302 1497 uint32_t result;
AnnaBridge 153:b484a57bc302 1498
AnnaBridge 153:b484a57bc302 1499 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1500 return(result);
AnnaBridge 153:b484a57bc302 1501 }
AnnaBridge 153:b484a57bc302 1502
AnnaBridge 153:b484a57bc302 1503 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1504 {
AnnaBridge 153:b484a57bc302 1505 uint32_t result;
AnnaBridge 153:b484a57bc302 1506
AnnaBridge 153:b484a57bc302 1507 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1508 return(result);
AnnaBridge 153:b484a57bc302 1509 }
AnnaBridge 153:b484a57bc302 1510
AnnaBridge 153:b484a57bc302 1511 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1512 {
AnnaBridge 153:b484a57bc302 1513 uint32_t result;
AnnaBridge 153:b484a57bc302 1514
AnnaBridge 153:b484a57bc302 1515 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1516 return(result);
AnnaBridge 153:b484a57bc302 1517 }
AnnaBridge 153:b484a57bc302 1518
AnnaBridge 153:b484a57bc302 1519 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1520 {
AnnaBridge 153:b484a57bc302 1521 uint32_t result;
AnnaBridge 153:b484a57bc302 1522
AnnaBridge 153:b484a57bc302 1523 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1524 return(result);
AnnaBridge 153:b484a57bc302 1525 }
AnnaBridge 153:b484a57bc302 1526
AnnaBridge 153:b484a57bc302 1527
AnnaBridge 153:b484a57bc302 1528 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1529 {
AnnaBridge 153:b484a57bc302 1530 uint32_t result;
AnnaBridge 153:b484a57bc302 1531
AnnaBridge 153:b484a57bc302 1532 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1533 return(result);
AnnaBridge 153:b484a57bc302 1534 }
AnnaBridge 153:b484a57bc302 1535
AnnaBridge 153:b484a57bc302 1536 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1537 {
AnnaBridge 153:b484a57bc302 1538 uint32_t result;
AnnaBridge 153:b484a57bc302 1539
AnnaBridge 153:b484a57bc302 1540 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1541 return(result);
AnnaBridge 153:b484a57bc302 1542 }
AnnaBridge 153:b484a57bc302 1543
AnnaBridge 153:b484a57bc302 1544 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1545 {
AnnaBridge 153:b484a57bc302 1546 uint32_t result;
AnnaBridge 153:b484a57bc302 1547
AnnaBridge 153:b484a57bc302 1548 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1549 return(result);
AnnaBridge 153:b484a57bc302 1550 }
AnnaBridge 153:b484a57bc302 1551
AnnaBridge 153:b484a57bc302 1552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1553 {
AnnaBridge 153:b484a57bc302 1554 uint32_t result;
AnnaBridge 153:b484a57bc302 1555
AnnaBridge 153:b484a57bc302 1556 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1557 return(result);
AnnaBridge 153:b484a57bc302 1558 }
AnnaBridge 153:b484a57bc302 1559
AnnaBridge 153:b484a57bc302 1560 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1561 {
AnnaBridge 153:b484a57bc302 1562 uint32_t result;
AnnaBridge 153:b484a57bc302 1563
AnnaBridge 153:b484a57bc302 1564 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1565 return(result);
AnnaBridge 153:b484a57bc302 1566 }
AnnaBridge 153:b484a57bc302 1567
AnnaBridge 153:b484a57bc302 1568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1569 {
AnnaBridge 153:b484a57bc302 1570 uint32_t result;
AnnaBridge 153:b484a57bc302 1571
AnnaBridge 153:b484a57bc302 1572 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1573 return(result);
AnnaBridge 153:b484a57bc302 1574 }
AnnaBridge 153:b484a57bc302 1575
AnnaBridge 153:b484a57bc302 1576
AnnaBridge 153:b484a57bc302 1577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1578 {
AnnaBridge 153:b484a57bc302 1579 uint32_t result;
AnnaBridge 153:b484a57bc302 1580
AnnaBridge 153:b484a57bc302 1581 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1582 return(result);
AnnaBridge 153:b484a57bc302 1583 }
AnnaBridge 153:b484a57bc302 1584
AnnaBridge 153:b484a57bc302 1585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1586 {
AnnaBridge 153:b484a57bc302 1587 uint32_t result;
AnnaBridge 153:b484a57bc302 1588
AnnaBridge 153:b484a57bc302 1589 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1590 return(result);
AnnaBridge 153:b484a57bc302 1591 }
AnnaBridge 153:b484a57bc302 1592
AnnaBridge 153:b484a57bc302 1593 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1594 {
AnnaBridge 153:b484a57bc302 1595 uint32_t result;
AnnaBridge 153:b484a57bc302 1596
AnnaBridge 153:b484a57bc302 1597 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1598 return(result);
AnnaBridge 153:b484a57bc302 1599 }
AnnaBridge 153:b484a57bc302 1600
AnnaBridge 153:b484a57bc302 1601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1602 {
AnnaBridge 153:b484a57bc302 1603 uint32_t result;
AnnaBridge 153:b484a57bc302 1604
AnnaBridge 153:b484a57bc302 1605 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1606 return(result);
AnnaBridge 153:b484a57bc302 1607 }
AnnaBridge 153:b484a57bc302 1608
AnnaBridge 153:b484a57bc302 1609 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1610 {
AnnaBridge 153:b484a57bc302 1611 uint32_t result;
AnnaBridge 153:b484a57bc302 1612
AnnaBridge 153:b484a57bc302 1613 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1614 return(result);
AnnaBridge 153:b484a57bc302 1615 }
AnnaBridge 153:b484a57bc302 1616
AnnaBridge 153:b484a57bc302 1617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1618 {
AnnaBridge 153:b484a57bc302 1619 uint32_t result;
AnnaBridge 153:b484a57bc302 1620
AnnaBridge 153:b484a57bc302 1621 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1622 return(result);
AnnaBridge 153:b484a57bc302 1623 }
AnnaBridge 153:b484a57bc302 1624
AnnaBridge 153:b484a57bc302 1625 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1626 {
AnnaBridge 153:b484a57bc302 1627 uint32_t result;
AnnaBridge 153:b484a57bc302 1628
AnnaBridge 153:b484a57bc302 1629 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1630 return(result);
AnnaBridge 153:b484a57bc302 1631 }
AnnaBridge 153:b484a57bc302 1632
AnnaBridge 153:b484a57bc302 1633 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1634 {
AnnaBridge 153:b484a57bc302 1635 uint32_t result;
AnnaBridge 153:b484a57bc302 1636
AnnaBridge 153:b484a57bc302 1637 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1638 return(result);
AnnaBridge 153:b484a57bc302 1639 }
AnnaBridge 153:b484a57bc302 1640
AnnaBridge 153:b484a57bc302 1641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1642 {
AnnaBridge 153:b484a57bc302 1643 uint32_t result;
AnnaBridge 153:b484a57bc302 1644
AnnaBridge 153:b484a57bc302 1645 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1646 return(result);
AnnaBridge 153:b484a57bc302 1647 }
AnnaBridge 153:b484a57bc302 1648
AnnaBridge 153:b484a57bc302 1649 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1650 {
AnnaBridge 153:b484a57bc302 1651 uint32_t result;
AnnaBridge 153:b484a57bc302 1652
AnnaBridge 153:b484a57bc302 1653 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1654 return(result);
AnnaBridge 153:b484a57bc302 1655 }
AnnaBridge 153:b484a57bc302 1656
AnnaBridge 153:b484a57bc302 1657 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1658 {
AnnaBridge 153:b484a57bc302 1659 uint32_t result;
AnnaBridge 153:b484a57bc302 1660
AnnaBridge 153:b484a57bc302 1661 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1662 return(result);
AnnaBridge 153:b484a57bc302 1663 }
AnnaBridge 153:b484a57bc302 1664
AnnaBridge 153:b484a57bc302 1665 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1666 {
AnnaBridge 153:b484a57bc302 1667 uint32_t result;
AnnaBridge 153:b484a57bc302 1668
AnnaBridge 153:b484a57bc302 1669 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1670 return(result);
AnnaBridge 153:b484a57bc302 1671 }
AnnaBridge 153:b484a57bc302 1672
AnnaBridge 153:b484a57bc302 1673 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1674 {
AnnaBridge 153:b484a57bc302 1675 uint32_t result;
AnnaBridge 153:b484a57bc302 1676
AnnaBridge 153:b484a57bc302 1677 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1678 return(result);
AnnaBridge 153:b484a57bc302 1679 }
AnnaBridge 153:b484a57bc302 1680
AnnaBridge 153:b484a57bc302 1681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1682 {
AnnaBridge 153:b484a57bc302 1683 uint32_t result;
AnnaBridge 153:b484a57bc302 1684
AnnaBridge 153:b484a57bc302 1685 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1686 return(result);
AnnaBridge 153:b484a57bc302 1687 }
AnnaBridge 153:b484a57bc302 1688
AnnaBridge 153:b484a57bc302 1689 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1690 {
AnnaBridge 153:b484a57bc302 1691 uint32_t result;
AnnaBridge 153:b484a57bc302 1692
AnnaBridge 153:b484a57bc302 1693 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1694 return(result);
AnnaBridge 153:b484a57bc302 1695 }
AnnaBridge 153:b484a57bc302 1696
AnnaBridge 153:b484a57bc302 1697 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1698 {
AnnaBridge 153:b484a57bc302 1699 uint32_t result;
AnnaBridge 153:b484a57bc302 1700
AnnaBridge 153:b484a57bc302 1701 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1702 return(result);
AnnaBridge 153:b484a57bc302 1703 }
AnnaBridge 153:b484a57bc302 1704
AnnaBridge 153:b484a57bc302 1705 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1706 {
AnnaBridge 153:b484a57bc302 1707 uint32_t result;
AnnaBridge 153:b484a57bc302 1708
AnnaBridge 153:b484a57bc302 1709 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1710 return(result);
AnnaBridge 153:b484a57bc302 1711 }
AnnaBridge 153:b484a57bc302 1712
AnnaBridge 153:b484a57bc302 1713 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1714 {
AnnaBridge 153:b484a57bc302 1715 uint32_t result;
AnnaBridge 153:b484a57bc302 1716
AnnaBridge 153:b484a57bc302 1717 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1718 return(result);
AnnaBridge 153:b484a57bc302 1719 }
AnnaBridge 153:b484a57bc302 1720
AnnaBridge 153:b484a57bc302 1721 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1722 {
AnnaBridge 153:b484a57bc302 1723 uint32_t result;
AnnaBridge 153:b484a57bc302 1724
AnnaBridge 153:b484a57bc302 1725 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1726 return(result);
AnnaBridge 153:b484a57bc302 1727 }
AnnaBridge 153:b484a57bc302 1728
AnnaBridge 153:b484a57bc302 1729 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1730 {
AnnaBridge 153:b484a57bc302 1731 uint32_t result;
AnnaBridge 153:b484a57bc302 1732
AnnaBridge 153:b484a57bc302 1733 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1734 return(result);
AnnaBridge 153:b484a57bc302 1735 }
AnnaBridge 153:b484a57bc302 1736
AnnaBridge 153:b484a57bc302 1737 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1738 {
AnnaBridge 153:b484a57bc302 1739 uint32_t result;
AnnaBridge 153:b484a57bc302 1740
AnnaBridge 153:b484a57bc302 1741 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1742 return(result);
AnnaBridge 153:b484a57bc302 1743 }
AnnaBridge 153:b484a57bc302 1744
AnnaBridge 153:b484a57bc302 1745 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1746 {
AnnaBridge 153:b484a57bc302 1747 uint32_t result;
AnnaBridge 153:b484a57bc302 1748
AnnaBridge 153:b484a57bc302 1749 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1750 return(result);
AnnaBridge 153:b484a57bc302 1751 }
AnnaBridge 153:b484a57bc302 1752
AnnaBridge 153:b484a57bc302 1753 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1754 {
AnnaBridge 153:b484a57bc302 1755 uint32_t result;
AnnaBridge 153:b484a57bc302 1756
AnnaBridge 153:b484a57bc302 1757 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1758 return(result);
AnnaBridge 153:b484a57bc302 1759 }
AnnaBridge 153:b484a57bc302 1760
AnnaBridge 153:b484a57bc302 1761 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1762 {
AnnaBridge 153:b484a57bc302 1763 uint32_t result;
AnnaBridge 153:b484a57bc302 1764
AnnaBridge 153:b484a57bc302 1765 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1766 return(result);
AnnaBridge 153:b484a57bc302 1767 }
AnnaBridge 153:b484a57bc302 1768
AnnaBridge 153:b484a57bc302 1769 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1770 {
AnnaBridge 153:b484a57bc302 1771 uint32_t result;
AnnaBridge 153:b484a57bc302 1772
AnnaBridge 153:b484a57bc302 1773 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1774 return(result);
AnnaBridge 153:b484a57bc302 1775 }
AnnaBridge 153:b484a57bc302 1776
AnnaBridge 153:b484a57bc302 1777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1778 {
AnnaBridge 153:b484a57bc302 1779 uint32_t result;
AnnaBridge 153:b484a57bc302 1780
AnnaBridge 153:b484a57bc302 1781 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1782 return(result);
AnnaBridge 153:b484a57bc302 1783 }
AnnaBridge 153:b484a57bc302 1784
AnnaBridge 153:b484a57bc302 1785 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1786 ({ \
AnnaBridge 153:b484a57bc302 1787 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1788 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1789 __RES; \
AnnaBridge 153:b484a57bc302 1790 })
AnnaBridge 153:b484a57bc302 1791
AnnaBridge 153:b484a57bc302 1792 #define __USAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1793 ({ \
AnnaBridge 153:b484a57bc302 1794 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1795 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1796 __RES; \
AnnaBridge 153:b484a57bc302 1797 })
AnnaBridge 153:b484a57bc302 1798
AnnaBridge 153:b484a57bc302 1799 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1800 {
AnnaBridge 153:b484a57bc302 1801 uint32_t result;
AnnaBridge 153:b484a57bc302 1802
AnnaBridge 153:b484a57bc302 1803 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1804 return(result);
AnnaBridge 153:b484a57bc302 1805 }
AnnaBridge 153:b484a57bc302 1806
AnnaBridge 153:b484a57bc302 1807 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1808 {
AnnaBridge 153:b484a57bc302 1809 uint32_t result;
AnnaBridge 153:b484a57bc302 1810
AnnaBridge 153:b484a57bc302 1811 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1812 return(result);
AnnaBridge 153:b484a57bc302 1813 }
AnnaBridge 153:b484a57bc302 1814
AnnaBridge 153:b484a57bc302 1815 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1816 {
AnnaBridge 153:b484a57bc302 1817 uint32_t result;
AnnaBridge 153:b484a57bc302 1818
AnnaBridge 153:b484a57bc302 1819 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1820 return(result);
AnnaBridge 153:b484a57bc302 1821 }
AnnaBridge 153:b484a57bc302 1822
AnnaBridge 153:b484a57bc302 1823 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1824 {
AnnaBridge 153:b484a57bc302 1825 uint32_t result;
AnnaBridge 153:b484a57bc302 1826
AnnaBridge 153:b484a57bc302 1827 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1828 return(result);
AnnaBridge 153:b484a57bc302 1829 }
AnnaBridge 153:b484a57bc302 1830
AnnaBridge 153:b484a57bc302 1831 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1832 {
AnnaBridge 153:b484a57bc302 1833 uint32_t result;
AnnaBridge 153:b484a57bc302 1834
AnnaBridge 153:b484a57bc302 1835 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1836 return(result);
AnnaBridge 153:b484a57bc302 1837 }
AnnaBridge 153:b484a57bc302 1838
AnnaBridge 153:b484a57bc302 1839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1840 {
AnnaBridge 153:b484a57bc302 1841 uint32_t result;
AnnaBridge 153:b484a57bc302 1842
AnnaBridge 153:b484a57bc302 1843 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1844 return(result);
AnnaBridge 153:b484a57bc302 1845 }
AnnaBridge 153:b484a57bc302 1846
AnnaBridge 153:b484a57bc302 1847 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1848 {
AnnaBridge 153:b484a57bc302 1849 uint32_t result;
AnnaBridge 153:b484a57bc302 1850
AnnaBridge 153:b484a57bc302 1851 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1852 return(result);
AnnaBridge 153:b484a57bc302 1853 }
AnnaBridge 153:b484a57bc302 1854
AnnaBridge 153:b484a57bc302 1855 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1856 {
AnnaBridge 153:b484a57bc302 1857 uint32_t result;
AnnaBridge 153:b484a57bc302 1858
AnnaBridge 153:b484a57bc302 1859 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1860 return(result);
AnnaBridge 153:b484a57bc302 1861 }
AnnaBridge 153:b484a57bc302 1862
AnnaBridge 153:b484a57bc302 1863 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1864 {
AnnaBridge 153:b484a57bc302 1865 union llreg_u{
AnnaBridge 153:b484a57bc302 1866 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1867 uint64_t w64;
AnnaBridge 153:b484a57bc302 1868 } llr;
AnnaBridge 153:b484a57bc302 1869 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1870
AnnaBridge 153:b484a57bc302 1871 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1872 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1873 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1874 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1875 #endif
AnnaBridge 153:b484a57bc302 1876
AnnaBridge 153:b484a57bc302 1877 return(llr.w64);
AnnaBridge 153:b484a57bc302 1878 }
AnnaBridge 153:b484a57bc302 1879
AnnaBridge 153:b484a57bc302 1880 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1881 {
AnnaBridge 153:b484a57bc302 1882 union llreg_u{
AnnaBridge 153:b484a57bc302 1883 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1884 uint64_t w64;
AnnaBridge 153:b484a57bc302 1885 } llr;
AnnaBridge 153:b484a57bc302 1886 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1887
AnnaBridge 153:b484a57bc302 1888 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1889 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1890 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1891 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1892 #endif
AnnaBridge 153:b484a57bc302 1893
AnnaBridge 153:b484a57bc302 1894 return(llr.w64);
AnnaBridge 153:b484a57bc302 1895 }
AnnaBridge 153:b484a57bc302 1896
AnnaBridge 153:b484a57bc302 1897 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1898 {
AnnaBridge 153:b484a57bc302 1899 uint32_t result;
AnnaBridge 153:b484a57bc302 1900
AnnaBridge 153:b484a57bc302 1901 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1902 return(result);
AnnaBridge 153:b484a57bc302 1903 }
AnnaBridge 153:b484a57bc302 1904
AnnaBridge 153:b484a57bc302 1905 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1906 {
AnnaBridge 153:b484a57bc302 1907 uint32_t result;
AnnaBridge 153:b484a57bc302 1908
AnnaBridge 153:b484a57bc302 1909 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1910 return(result);
AnnaBridge 153:b484a57bc302 1911 }
AnnaBridge 153:b484a57bc302 1912
AnnaBridge 153:b484a57bc302 1913 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1914 {
AnnaBridge 153:b484a57bc302 1915 uint32_t result;
AnnaBridge 153:b484a57bc302 1916
AnnaBridge 153:b484a57bc302 1917 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1918 return(result);
AnnaBridge 153:b484a57bc302 1919 }
AnnaBridge 153:b484a57bc302 1920
AnnaBridge 153:b484a57bc302 1921 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1922 {
AnnaBridge 153:b484a57bc302 1923 uint32_t result;
AnnaBridge 153:b484a57bc302 1924
AnnaBridge 153:b484a57bc302 1925 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1926 return(result);
AnnaBridge 153:b484a57bc302 1927 }
AnnaBridge 153:b484a57bc302 1928
AnnaBridge 153:b484a57bc302 1929 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1930 {
AnnaBridge 153:b484a57bc302 1931 union llreg_u{
AnnaBridge 153:b484a57bc302 1932 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1933 uint64_t w64;
AnnaBridge 153:b484a57bc302 1934 } llr;
AnnaBridge 153:b484a57bc302 1935 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1936
AnnaBridge 153:b484a57bc302 1937 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1938 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1939 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1940 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1941 #endif
AnnaBridge 153:b484a57bc302 1942
AnnaBridge 153:b484a57bc302 1943 return(llr.w64);
AnnaBridge 153:b484a57bc302 1944 }
AnnaBridge 153:b484a57bc302 1945
AnnaBridge 153:b484a57bc302 1946 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1947 {
AnnaBridge 153:b484a57bc302 1948 union llreg_u{
AnnaBridge 153:b484a57bc302 1949 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1950 uint64_t w64;
AnnaBridge 153:b484a57bc302 1951 } llr;
AnnaBridge 153:b484a57bc302 1952 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1953
AnnaBridge 153:b484a57bc302 1954 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1955 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1956 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1957 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1958 #endif
AnnaBridge 153:b484a57bc302 1959
AnnaBridge 153:b484a57bc302 1960 return(llr.w64);
AnnaBridge 153:b484a57bc302 1961 }
AnnaBridge 153:b484a57bc302 1962
AnnaBridge 153:b484a57bc302 1963 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1964 {
AnnaBridge 153:b484a57bc302 1965 uint32_t result;
AnnaBridge 153:b484a57bc302 1966
AnnaBridge 153:b484a57bc302 1967 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1968 return(result);
AnnaBridge 153:b484a57bc302 1969 }
AnnaBridge 153:b484a57bc302 1970
AnnaBridge 153:b484a57bc302 1971 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1972 {
AnnaBridge 153:b484a57bc302 1973 int32_t result;
AnnaBridge 153:b484a57bc302 1974
AnnaBridge 153:b484a57bc302 1975 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1976 return(result);
AnnaBridge 153:b484a57bc302 1977 }
AnnaBridge 153:b484a57bc302 1978
AnnaBridge 153:b484a57bc302 1979 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1980 {
AnnaBridge 153:b484a57bc302 1981 int32_t result;
AnnaBridge 153:b484a57bc302 1982
AnnaBridge 153:b484a57bc302 1983 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1984 return(result);
AnnaBridge 153:b484a57bc302 1985 }
AnnaBridge 153:b484a57bc302 1986
AnnaBridge 153:b484a57bc302 1987 #if 0
AnnaBridge 153:b484a57bc302 1988 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1989 ({ \
AnnaBridge 153:b484a57bc302 1990 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1991 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 1992 __RES; \
AnnaBridge 153:b484a57bc302 1993 })
AnnaBridge 153:b484a57bc302 1994
AnnaBridge 153:b484a57bc302 1995 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1996 ({ \
AnnaBridge 153:b484a57bc302 1997 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1998 if (ARG3 == 0) \
AnnaBridge 153:b484a57bc302 1999 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 153:b484a57bc302 2000 else \
AnnaBridge 153:b484a57bc302 2001 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 2002 __RES; \
AnnaBridge 153:b484a57bc302 2003 })
AnnaBridge 153:b484a57bc302 2004 #endif
AnnaBridge 153:b484a57bc302 2005
AnnaBridge 153:b484a57bc302 2006 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 153:b484a57bc302 2007 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 153:b484a57bc302 2008
AnnaBridge 153:b484a57bc302 2009 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 153:b484a57bc302 2010 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 153:b484a57bc302 2011
AnnaBridge 153:b484a57bc302 2012 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 153:b484a57bc302 2013 {
AnnaBridge 153:b484a57bc302 2014 int32_t result;
AnnaBridge 153:b484a57bc302 2015
AnnaBridge 153:b484a57bc302 2016 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 2017 return(result);
AnnaBridge 153:b484a57bc302 2018 }
AnnaBridge 153:b484a57bc302 2019
AnnaBridge 153:b484a57bc302 2020 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 153:b484a57bc302 2021 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 153:b484a57bc302 2022
AnnaBridge 153:b484a57bc302 2023
AnnaBridge 153:b484a57bc302 2024 #pragma GCC diagnostic pop
AnnaBridge 153:b484a57bc302 2025
AnnaBridge 153:b484a57bc302 2026 #endif /* __CMSIS_GCC_H */