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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

hal/qspi_api.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Child:
172:65be27845400
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1
AnnaBridge 171:3a7713b1edbc 2 /** \addtogroup hal */
AnnaBridge 171:3a7713b1edbc 3 /** @{*/
AnnaBridge 171:3a7713b1edbc 4 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 5 * Copyright (c) 2017 ARM Limited
AnnaBridge 171:3a7713b1edbc 6 *
AnnaBridge 171:3a7713b1edbc 7 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 171:3a7713b1edbc 8 * you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 9 * You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 14 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 16 * See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 17 * limitations under the License.
AnnaBridge 171:3a7713b1edbc 18 */
AnnaBridge 171:3a7713b1edbc 19 #ifndef MBED_QSPI_API_H
AnnaBridge 171:3a7713b1edbc 20 #define MBED_QSPI_API_H
AnnaBridge 171:3a7713b1edbc 21
AnnaBridge 171:3a7713b1edbc 22 #include "device.h"
AnnaBridge 171:3a7713b1edbc 23 #include <stdbool.h>
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25 #if DEVICE_QSPI
AnnaBridge 171:3a7713b1edbc 26
AnnaBridge 171:3a7713b1edbc 27 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 28 extern "C" {
AnnaBridge 171:3a7713b1edbc 29 #endif
AnnaBridge 171:3a7713b1edbc 30
AnnaBridge 171:3a7713b1edbc 31 /**
AnnaBridge 171:3a7713b1edbc 32 * \defgroup hal_qspi QSPI HAL
AnnaBridge 171:3a7713b1edbc 33 * @{
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /** QSPI HAL object
AnnaBridge 171:3a7713b1edbc 37 */
AnnaBridge 171:3a7713b1edbc 38 typedef struct qspi_s qspi_t;
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /** QSPI Bus width
AnnaBridge 171:3a7713b1edbc 41 *
AnnaBridge 171:3a7713b1edbc 42 * Some parts of commands provide variable bus width
AnnaBridge 171:3a7713b1edbc 43 */
AnnaBridge 171:3a7713b1edbc 44 typedef enum qspi_bus_width {
AnnaBridge 171:3a7713b1edbc 45 QSPI_CFG_BUS_SINGLE,
AnnaBridge 171:3a7713b1edbc 46 QSPI_CFG_BUS_DUAL,
AnnaBridge 171:3a7713b1edbc 47 QSPI_CFG_BUS_QUAD,
AnnaBridge 171:3a7713b1edbc 48 } qspi_bus_width_t;
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 /** Address size in bits
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52 typedef enum qspi_address_size {
AnnaBridge 171:3a7713b1edbc 53 QSPI_CFG_ADDR_SIZE_8,
AnnaBridge 171:3a7713b1edbc 54 QSPI_CFG_ADDR_SIZE_16,
AnnaBridge 171:3a7713b1edbc 55 QSPI_CFG_ADDR_SIZE_24,
AnnaBridge 171:3a7713b1edbc 56 QSPI_CFG_ADDR_SIZE_32,
AnnaBridge 171:3a7713b1edbc 57 } qspi_address_size_t;
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /** Alternative size in bits
AnnaBridge 171:3a7713b1edbc 60 */
AnnaBridge 171:3a7713b1edbc 61 typedef enum qspi_alt_size {
AnnaBridge 171:3a7713b1edbc 62 QSPI_CFG_ALT_SIZE_8,
AnnaBridge 171:3a7713b1edbc 63 QSPI_CFG_ALT_SIZE_16,
AnnaBridge 171:3a7713b1edbc 64 QSPI_CFG_ALT_SIZE_24,
AnnaBridge 171:3a7713b1edbc 65 QSPI_CFG_ALT_SIZE_32,
AnnaBridge 171:3a7713b1edbc 66 } qspi_alt_size_t;
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 /** QSPI command
AnnaBridge 171:3a7713b1edbc 69 *
AnnaBridge 171:3a7713b1edbc 70 * Defines a frame format. It consists of instruction, address, alternative, dummy count and data
AnnaBridge 171:3a7713b1edbc 71 */
AnnaBridge 171:3a7713b1edbc 72 typedef struct qspi_command {
AnnaBridge 171:3a7713b1edbc 73 struct {
AnnaBridge 171:3a7713b1edbc 74 qspi_bus_width_t bus_width; /**< Bus width for the instruction >*/
AnnaBridge 171:3a7713b1edbc 75 uint8_t value; /**< Instruction value >*/
AnnaBridge 171:3a7713b1edbc 76 bool disabled; /**< Instruction phase skipped if disabled is set to true >*/
AnnaBridge 171:3a7713b1edbc 77 } instruction;
AnnaBridge 171:3a7713b1edbc 78 struct {
AnnaBridge 171:3a7713b1edbc 79 qspi_bus_width_t bus_width; /**< Bus width for the address >*/
AnnaBridge 171:3a7713b1edbc 80 qspi_address_size_t size; /**< Address size >*/
AnnaBridge 171:3a7713b1edbc 81 uint32_t value; /**< Address value >*/
AnnaBridge 171:3a7713b1edbc 82 bool disabled; /**< Address phase skipped if disabled is set to true >*/
AnnaBridge 171:3a7713b1edbc 83 } address;
AnnaBridge 171:3a7713b1edbc 84 struct {
AnnaBridge 171:3a7713b1edbc 85 qspi_bus_width_t bus_width; /**< Bus width for alternative >*/
AnnaBridge 171:3a7713b1edbc 86 qspi_alt_size_t size; /**< Alternative size >*/
AnnaBridge 171:3a7713b1edbc 87 uint32_t value; /**< Alternative value >*/
AnnaBridge 171:3a7713b1edbc 88 bool disabled; /**< Alternative phase skipped if disabled is set to true >*/
AnnaBridge 171:3a7713b1edbc 89 } alt;
AnnaBridge 171:3a7713b1edbc 90 uint8_t dummy_count; /**< Dummy cycles count >*/
AnnaBridge 171:3a7713b1edbc 91 struct {
AnnaBridge 171:3a7713b1edbc 92 qspi_bus_width_t bus_width; /**< Bus width for data >*/
AnnaBridge 171:3a7713b1edbc 93 } data;
AnnaBridge 171:3a7713b1edbc 94 } qspi_command_t;
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96 /** QSPI return status
AnnaBridge 171:3a7713b1edbc 97 */
AnnaBridge 171:3a7713b1edbc 98 typedef enum qspi_status {
AnnaBridge 171:3a7713b1edbc 99 QSPI_STATUS_ERROR = -1, /**< Generic error >*/
AnnaBridge 171:3a7713b1edbc 100 QSPI_STATUS_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/
AnnaBridge 171:3a7713b1edbc 101 QSPI_STATUS_OK = 0, /**< Function executed sucessfully >*/
AnnaBridge 171:3a7713b1edbc 102 } qspi_status_t;
AnnaBridge 171:3a7713b1edbc 103
AnnaBridge 171:3a7713b1edbc 104 /** Initialize QSPI peripheral.
AnnaBridge 171:3a7713b1edbc 105 *
AnnaBridge 171:3a7713b1edbc 106 * It should initialize QSPI pins (io0-io3, sclk and ssel), set frequency, clock polarity and phase mode. The clock for the peripheral should be enabled
AnnaBridge 171:3a7713b1edbc 107 *
AnnaBridge 171:3a7713b1edbc 108 * @param obj QSPI object
AnnaBridge 171:3a7713b1edbc 109 * @param io0 Data pin 0
AnnaBridge 171:3a7713b1edbc 110 * @param io1 Data pin 1
AnnaBridge 171:3a7713b1edbc 111 * @param io2 Data pin 2
AnnaBridge 171:3a7713b1edbc 112 * @param io3 Data pin 3
AnnaBridge 171:3a7713b1edbc 113 * @param sclk The clock pin
AnnaBridge 171:3a7713b1edbc 114 * @param ssel The chip select pin
AnnaBridge 171:3a7713b1edbc 115 * @param hz The bus frequency
AnnaBridge 171:3a7713b1edbc 116 * @param mode Clock polarity and phase mode (0 - 3)
AnnaBridge 171:3a7713b1edbc 117 * @return QSPI_STATUS_OK if initialisation successfully executed
AnnaBridge 171:3a7713b1edbc 118 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 119 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 120 */
AnnaBridge 171:3a7713b1edbc 121 qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode);
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 /** Deinitilize QSPI peripheral
AnnaBridge 171:3a7713b1edbc 124 *
AnnaBridge 171:3a7713b1edbc 125 * It should release pins that are associated with the QSPI object, and disable clocks for QSPI peripheral module that was associated with the object
AnnaBridge 171:3a7713b1edbc 126 *
AnnaBridge 171:3a7713b1edbc 127 * @param obj QSPI object
AnnaBridge 171:3a7713b1edbc 128 * @return QSPI_STATUS_OK if deinitialisation successfully executed
AnnaBridge 171:3a7713b1edbc 129 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 130 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 131 */
AnnaBridge 171:3a7713b1edbc 132 qspi_status_t qspi_free(qspi_t *obj);
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 /** Set the QSPI baud rate
AnnaBridge 171:3a7713b1edbc 135 *
AnnaBridge 171:3a7713b1edbc 136 * Actual frequency may differ from the desired frequency due to available dividers and the bus clock
AnnaBridge 171:3a7713b1edbc 137 * Configures the QSPI peripheral's baud rate
AnnaBridge 171:3a7713b1edbc 138 * @param obj The SPI object to configure
AnnaBridge 171:3a7713b1edbc 139 * @param hz The baud rate in Hz
AnnaBridge 171:3a7713b1edbc 140 * @return QSPI_STATUS_OK if frequency was set
AnnaBridge 171:3a7713b1edbc 141 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 142 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 143 */
AnnaBridge 171:3a7713b1edbc 144 qspi_status_t qspi_frequency(qspi_t *obj, int hz);
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 /** Send a command and block of data
AnnaBridge 171:3a7713b1edbc 147 *
AnnaBridge 171:3a7713b1edbc 148 * @param obj QSPI object
AnnaBridge 171:3a7713b1edbc 149 * @param command QSPI command
AnnaBridge 171:3a7713b1edbc 150 * @param data TX buffer
AnnaBridge 171:3a7713b1edbc 151 * @param[in,out] length in - TX buffer length in bytes, out - number of bytes written
AnnaBridge 171:3a7713b1edbc 152 * @return QSPI_STATUS_OK if the data has been succesfully sent
AnnaBridge 171:3a7713b1edbc 153 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 154 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156 qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length);
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /** Send a command (and optionally data) and get the response. Can be used to send/receive device specific commands
AnnaBridge 171:3a7713b1edbc 159 *
AnnaBridge 171:3a7713b1edbc 160 * @param obj QSPI object
AnnaBridge 171:3a7713b1edbc 161 * @param command QSPI command
AnnaBridge 171:3a7713b1edbc 162 * @param tx_data TX buffer
AnnaBridge 171:3a7713b1edbc 163 * @param tx_size TX buffer length in bytes
AnnaBridge 171:3a7713b1edbc 164 * @param rx_data RX buffer
AnnaBridge 171:3a7713b1edbc 165 * @param rx_size RX buffer length in bytes
AnnaBridge 171:3a7713b1edbc 166 * @return QSPI_STATUS_OK if the data has been succesfully sent
AnnaBridge 171:3a7713b1edbc 167 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 168 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 169 */
AnnaBridge 171:3a7713b1edbc 170 qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size);
AnnaBridge 171:3a7713b1edbc 171
AnnaBridge 171:3a7713b1edbc 172 /** Receive a command and block of data
AnnaBridge 171:3a7713b1edbc 173 *
AnnaBridge 171:3a7713b1edbc 174 * @param obj QSPI object
AnnaBridge 171:3a7713b1edbc 175 * @param command QSPI command
AnnaBridge 171:3a7713b1edbc 176 * @param data RX buffer
AnnaBridge 171:3a7713b1edbc 177 * @param[in,out] length in - RX buffer length in bytes, out - number of bytes read
AnnaBridge 171:3a7713b1edbc 178 * @return QSPI_STATUS_OK if data has been succesfully received
AnnaBridge 171:3a7713b1edbc 179 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
AnnaBridge 171:3a7713b1edbc 180 QSPI_STATUS_ERROR otherwise
AnnaBridge 171:3a7713b1edbc 181 */
AnnaBridge 171:3a7713b1edbc 182 qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data, size_t *length);
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /**@}*/
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 187 }
AnnaBridge 171:3a7713b1edbc 188 #endif
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 #endif
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 #endif
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /** @}*/