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mbed 2

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TARGET_SAMR21G18A/TOOLCHAIN_ARM_STD/ins_mtb.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 * \file
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * \brief Instance description for MTB
AnnaBridge 171:3a7713b1edbc 5 *
AnnaBridge 171:3a7713b1edbc 6 * Copyright (c) 2015 Atmel Corporation. All rights reserved.
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * \asf_license_start
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * \page License
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without
AnnaBridge 171:3a7713b1edbc 13 * modification, are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 19 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 20 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * 3. The name of Atmel may not be used to endorse or promote products derived
AnnaBridge 171:3a7713b1edbc 23 * from this software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 24 *
AnnaBridge 171:3a7713b1edbc 25 * 4. This software may only be redistributed and used in connection with an
AnnaBridge 171:3a7713b1edbc 26 * Atmel microcontroller product.
AnnaBridge 171:3a7713b1edbc 27 *
AnnaBridge 171:3a7713b1edbc 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
AnnaBridge 171:3a7713b1edbc 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
AnnaBridge 171:3a7713b1edbc 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
AnnaBridge 171:3a7713b1edbc 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
AnnaBridge 171:3a7713b1edbc 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
AnnaBridge 171:3a7713b1edbc 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
AnnaBridge 171:3a7713b1edbc 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 171:3a7713b1edbc 38 * POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 39 *
AnnaBridge 171:3a7713b1edbc 40 * \asf_license_stop
AnnaBridge 171:3a7713b1edbc 41 *
AnnaBridge 171:3a7713b1edbc 42 */
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 #ifndef _SAMR21_MTB_INSTANCE_
AnnaBridge 171:3a7713b1edbc 45 #define _SAMR21_MTB_INSTANCE_
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /* ========== Register definition for MTB peripheral ========== */
AnnaBridge 171:3a7713b1edbc 48 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
AnnaBridge 171:3a7713b1edbc 49 #define REG_MTB_POSITION (0x41006000U) /**< \brief (MTB) MTB Position */
AnnaBridge 171:3a7713b1edbc 50 #define REG_MTB_MASTER (0x41006004U) /**< \brief (MTB) MTB Master */
AnnaBridge 171:3a7713b1edbc 51 #define REG_MTB_FLOW (0x41006008U) /**< \brief (MTB) MTB Flow */
AnnaBridge 171:3a7713b1edbc 52 #define REG_MTB_BASE (0x4100600CU) /**< \brief (MTB) MTB Base */
AnnaBridge 171:3a7713b1edbc 53 #define REG_MTB_ITCTRL (0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
AnnaBridge 171:3a7713b1edbc 54 #define REG_MTB_CLAIMSET (0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
AnnaBridge 171:3a7713b1edbc 55 #define REG_MTB_CLAIMCLR (0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
AnnaBridge 171:3a7713b1edbc 56 #define REG_MTB_LOCKACCESS (0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
AnnaBridge 171:3a7713b1edbc 57 #define REG_MTB_LOCKSTATUS (0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
AnnaBridge 171:3a7713b1edbc 58 #define REG_MTB_AUTHSTATUS (0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
AnnaBridge 171:3a7713b1edbc 59 #define REG_MTB_DEVARCH (0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
AnnaBridge 171:3a7713b1edbc 60 #define REG_MTB_DEVID (0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
AnnaBridge 171:3a7713b1edbc 61 #define REG_MTB_DEVTYPE (0x41006FCCU) /**< \brief (MTB) MTB Device Type */
AnnaBridge 171:3a7713b1edbc 62 #define REG_MTB_PID4 (0x41006FD0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 63 #define REG_MTB_PID5 (0x41006FD4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 64 #define REG_MTB_PID6 (0x41006FD8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 65 #define REG_MTB_PID7 (0x41006FDCU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 66 #define REG_MTB_PID0 (0x41006FE0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 67 #define REG_MTB_PID1 (0x41006FE4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 68 #define REG_MTB_PID2 (0x41006FE8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 69 #define REG_MTB_PID3 (0x41006FECU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 70 #define REG_MTB_CID0 (0x41006FF0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 71 #define REG_MTB_CID1 (0x41006FF4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 72 #define REG_MTB_CID2 (0x41006FF8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 73 #define REG_MTB_CID3 (0x41006FFCU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 74 #else
AnnaBridge 171:3a7713b1edbc 75 #define REG_MTB_POSITION (*(RwReg *)0x41006000U) /**< \brief (MTB) MTB Position */
AnnaBridge 171:3a7713b1edbc 76 #define REG_MTB_MASTER (*(RwReg *)0x41006004U) /**< \brief (MTB) MTB Master */
AnnaBridge 171:3a7713b1edbc 77 #define REG_MTB_FLOW (*(RwReg *)0x41006008U) /**< \brief (MTB) MTB Flow */
AnnaBridge 171:3a7713b1edbc 78 #define REG_MTB_BASE (*(RoReg *)0x4100600CU) /**< \brief (MTB) MTB Base */
AnnaBridge 171:3a7713b1edbc 79 #define REG_MTB_ITCTRL (*(RwReg *)0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
AnnaBridge 171:3a7713b1edbc 80 #define REG_MTB_CLAIMSET (*(RwReg *)0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
AnnaBridge 171:3a7713b1edbc 81 #define REG_MTB_CLAIMCLR (*(RwReg *)0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
AnnaBridge 171:3a7713b1edbc 82 #define REG_MTB_LOCKACCESS (*(RwReg *)0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
AnnaBridge 171:3a7713b1edbc 83 #define REG_MTB_LOCKSTATUS (*(RoReg *)0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
AnnaBridge 171:3a7713b1edbc 84 #define REG_MTB_AUTHSTATUS (*(RoReg *)0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
AnnaBridge 171:3a7713b1edbc 85 #define REG_MTB_DEVARCH (*(RoReg *)0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
AnnaBridge 171:3a7713b1edbc 86 #define REG_MTB_DEVID (*(RoReg *)0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
AnnaBridge 171:3a7713b1edbc 87 #define REG_MTB_DEVTYPE (*(RoReg *)0x41006FCCU) /**< \brief (MTB) MTB Device Type */
AnnaBridge 171:3a7713b1edbc 88 #define REG_MTB_PID4 (*(RoReg *)0x41006FD0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 89 #define REG_MTB_PID5 (*(RoReg *)0x41006FD4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 90 #define REG_MTB_PID6 (*(RoReg *)0x41006FD8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 91 #define REG_MTB_PID7 (*(RoReg *)0x41006FDCU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 92 #define REG_MTB_PID0 (*(RoReg *)0x41006FE0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 93 #define REG_MTB_PID1 (*(RoReg *)0x41006FE4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 94 #define REG_MTB_PID2 (*(RoReg *)0x41006FE8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 95 #define REG_MTB_PID3 (*(RoReg *)0x41006FECU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 96 #define REG_MTB_CID0 (*(RoReg *)0x41006FF0U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 97 #define REG_MTB_CID1 (*(RoReg *)0x41006FF4U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 98 #define REG_MTB_CID2 (*(RoReg *)0x41006FF8U) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 99 #define REG_MTB_CID3 (*(RoReg *)0x41006FFCU) /**< \brief (MTB) CoreSight */
AnnaBridge 171:3a7713b1edbc 100 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
AnnaBridge 171:3a7713b1edbc 101
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 #endif /* _SAMR21_MTB_INSTANCE_ */