mbed - The official Mbed 2 C/C++ SDK provides the softwa…

Users » mbed_official » Code » mbed

mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_SAMR21G18A/TOOLCHAIN_ARM_STD/clock_feature.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_SAMD21G18A/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/system/clock/TARGET_SAMD21/clock_feature.h@111:4336505e4b1c

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	111:4336505e4b1c	1	/**
Kojto	111:4336505e4b1c	2	* \file
Kojto	111:4336505e4b1c	3	*
Kojto	111:4336505e4b1c	4	* \brief SAM Clock Driver
Kojto	111:4336505e4b1c	5	*
Kojto	111:4336505e4b1c	6	* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
Kojto	111:4336505e4b1c	7	*
Kojto	111:4336505e4b1c	8	* \asf_license_start
Kojto	111:4336505e4b1c	9	*
Kojto	111:4336505e4b1c	10	* \page License
Kojto	111:4336505e4b1c	11	*
Kojto	111:4336505e4b1c	12	* Redistribution and use in source and binary forms, with or without
Kojto	111:4336505e4b1c	13	* modification, are permitted provided that the following conditions are met:
Kojto	111:4336505e4b1c	14	*
Kojto	111:4336505e4b1c	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	111:4336505e4b1c	16	* this list of conditions and the following disclaimer.
Kojto	111:4336505e4b1c	17	*
Kojto	111:4336505e4b1c	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	111:4336505e4b1c	19	* this list of conditions and the following disclaimer in the documentation
Kojto	111:4336505e4b1c	20	* and/or other materials provided with the distribution.
Kojto	111:4336505e4b1c	21	*
Kojto	111:4336505e4b1c	22	* 3. The name of Atmel may not be used to endorse or promote products derived
Kojto	111:4336505e4b1c	23	* from this software without specific prior written permission.
Kojto	111:4336505e4b1c	24	*
Kojto	111:4336505e4b1c	25	* 4. This software may only be redistributed and used in connection with an
Kojto	111:4336505e4b1c	26	* Atmel microcontroller product.
Kojto	111:4336505e4b1c	27	*
Kojto	111:4336505e4b1c	28	* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
Kojto	111:4336505e4b1c	29	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
Kojto	111:4336505e4b1c	30	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
Kojto	111:4336505e4b1c	31	* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
Kojto	111:4336505e4b1c	32	* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	111:4336505e4b1c	33	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
Kojto	111:4336505e4b1c	34	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Kojto	111:4336505e4b1c	35	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
Kojto	111:4336505e4b1c	36	* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Kojto	111:4336505e4b1c	37	* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto	111:4336505e4b1c	38	* POSSIBILITY OF SUCH DAMAGE.
Kojto	111:4336505e4b1c	39	*
Kojto	111:4336505e4b1c	40	* \asf_license_stop
Kojto	111:4336505e4b1c	41	*
Kojto	111:4336505e4b1c	42	*/
Kojto	111:4336505e4b1c	43	/*
Kojto	111:4336505e4b1c	44	* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
Kojto	111:4336505e4b1c	45	*/
Kojto	111:4336505e4b1c	46	#ifndef SYSTEM_CLOCK_FEATURE_H_INCLUDED
Kojto	111:4336505e4b1c	47	#define SYSTEM_CLOCK_FEATURE_H_INCLUDED
Kojto	111:4336505e4b1c	48
Kojto	111:4336505e4b1c	49	#ifdef __cplusplus
Kojto	111:4336505e4b1c	50	extern "C" {
Kojto	111:4336505e4b1c	51	#endif
Kojto	111:4336505e4b1c	52
Kojto	111:4336505e4b1c	53	/**
Kojto	111:4336505e4b1c	54	* \defgroup asfdoc_sam0_system_clock_group SAM System Clock Management Driver (SYSTEM CLOCK)
Kojto	111:4336505e4b1c	55	*
Kojto	111:4336505e4b1c	56	* This driver for Atmel® \| SMART ARM®-based microcontrollers provides an interface for the configuration
Kojto	111:4336505e4b1c	57	* and management of the device's clocking related functions. This includes
Kojto	111:4336505e4b1c	58	* the various clock sources, bus clocks, and generic clocks within the device,
Kojto	111:4336505e4b1c	59	* with functions to manage the enabling, disabling, source selection, and
Kojto	111:4336505e4b1c	60	* prescaling of clocks to various internal peripherals.
Kojto	111:4336505e4b1c	61	*
Kojto	111:4336505e4b1c	62	* The following peripherals are used by this module:
Kojto	111:4336505e4b1c	63	*
Kojto	111:4336505e4b1c	64	* - GCLK (Generic Clock Management)
Kojto	111:4336505e4b1c	65	* - PM (Power Management)
Kojto	111:4336505e4b1c	66	* - SYSCTRL (Clock Source Control)
Kojto	111:4336505e4b1c	67	*
Kojto	111:4336505e4b1c	68	* The following devices can use this module:
Kojto	111:4336505e4b1c	69	* - Atmel \| SMART SAM D20/D21
Kojto	111:4336505e4b1c	70	* - Atmel \| SMART SAM R21
Kojto	111:4336505e4b1c	71	* - Atmel \| SMART SAM D10/D11
Kojto	111:4336505e4b1c	72	* - Atmel \| SMART SAM DA0/DA1
Kojto	111:4336505e4b1c	73	*
Kojto	111:4336505e4b1c	74	* The outline of this documentation is as follows:
Kojto	111:4336505e4b1c	75	* - \ref asfdoc_sam0_system_clock_prerequisites
Kojto	111:4336505e4b1c	76	* - \ref asfdoc_sam0_system_clock_module_overview
Kojto	111:4336505e4b1c	77	* - \ref asfdoc_sam0_system_clock_special_considerations
Kojto	111:4336505e4b1c	78	* - \ref asfdoc_sam0_system_clock_extra_info
Kojto	111:4336505e4b1c	79	* - \ref asfdoc_sam0_system_clock_examples
Kojto	111:4336505e4b1c	80	* - \ref asfdoc_sam0_system_clock_api_overview
Kojto	111:4336505e4b1c	81	*
Kojto	111:4336505e4b1c	82	*
Kojto	111:4336505e4b1c	83	* \section asfdoc_sam0_system_clock_prerequisites Prerequisites
Kojto	111:4336505e4b1c	84	*
Kojto	111:4336505e4b1c	85	* There are no prerequisites for this module.
Kojto	111:4336505e4b1c	86	*
Kojto	111:4336505e4b1c	87	*
Kojto	111:4336505e4b1c	88	* \section asfdoc_sam0_system_clock_module_overview Module Overview
Kojto	111:4336505e4b1c	89	* The SAM devices contain a sophisticated clocking system, which is designed
Kojto	111:4336505e4b1c	90	* to give the maximum flexibility to the user application. This system allows
Kojto	111:4336505e4b1c	91	* a system designer to tune the performance and power consumption of the device
Kojto	111:4336505e4b1c	92	* in a dynamic manner, to achieve the best trade-off between the two for a
Kojto	111:4336505e4b1c	93	* particular application.
Kojto	111:4336505e4b1c	94	*
Kojto	111:4336505e4b1c	95	* This driver provides a set of functions for the configuration and management
Kojto	111:4336505e4b1c	96	* of the various clock related functionality within the device.
Kojto	111:4336505e4b1c	97	*
Kojto	111:4336505e4b1c	98	* \subsection asfdoc_sam0_system_clock_module_features Driver Feature Macro Definition
Kojto	111:4336505e4b1c	99	* <table>
Kojto	111:4336505e4b1c	100	* <tr>
Kojto	111:4336505e4b1c	101	* <th>Driver Feature Macro</th>
Kojto	111:4336505e4b1c	102	* <th>Supported devices</th>
Kojto	111:4336505e4b1c	103	* </tr>
Kojto	111:4336505e4b1c	104	* <tr>
Kojto	111:4336505e4b1c	105	* <td>FEATURE_SYSTEM_CLOCK_DPLL</td>
Kojto	111:4336505e4b1c	106	* <td>SAMD21, SAMR21, SAMD10, SAMD11, SAMDAx</td>
Kojto	111:4336505e4b1c	107	* </tr>
Kojto	111:4336505e4b1c	108	* </table>
Kojto	111:4336505e4b1c	109	* \note The specific features are only available in the driver when the
Kojto	111:4336505e4b1c	110	* selected device supports those features.
Kojto	111:4336505e4b1c	111	*
Kojto	111:4336505e4b1c	112	* \subsection asfdoc_sam0_system_clock_module_overview_clock_sources Clock Sources
Kojto	111:4336505e4b1c	113	* The SAM devices have a number of master clock source modules, each of
Kojto	111:4336505e4b1c	114	* which being capable of producing a stabilized output frequency, which can then
Kojto	111:4336505e4b1c	115	* be fed into the various peripherals and modules within the device.
Kojto	111:4336505e4b1c	116	*
Kojto	111:4336505e4b1c	117	* Possible clock source modules include internal R/C oscillators, internal
Kojto	111:4336505e4b1c	118	* DFLL modules, as well as external crystal oscillators and/or clock inputs.
Kojto	111:4336505e4b1c	119	*
Kojto	111:4336505e4b1c	120	* \subsection asfdoc_sam0_system_clock_module_overview_cpu_clock CPU / Bus Clocks
Kojto	111:4336505e4b1c	121	* The CPU and AHB/APBx buses are clocked by the same physical clock source
Kojto	111:4336505e4b1c	122	* (referred in this module as the Main Clock), however the APBx buses may
Kojto	111:4336505e4b1c	123	* have additional prescaler division ratios set to give each peripheral bus a
Kojto	111:4336505e4b1c	124	* different clock speed.
Kojto	111:4336505e4b1c	125	*
Kojto	111:4336505e4b1c	126	* The general main clock tree for the CPU and associated buses is shown in
Kojto	111:4336505e4b1c	127	* \ref asfdoc_sam0_system_clock_module_clock_tree "the figure below".
Kojto	111:4336505e4b1c	128	*
Kojto	111:4336505e4b1c	129	* \anchor asfdoc_sam0_system_clock_module_clock_tree
Kojto	111:4336505e4b1c	130	* \dot
Kojto	111:4336505e4b1c	131	* digraph overview {
Kojto	111:4336505e4b1c	132	* rankdir=LR;
Kojto	111:4336505e4b1c	133	* clk_src [label="Clock Sources", shape=none, height=0];
Kojto	111:4336505e4b1c	134	* node [label="CPU Bus" shape=ellipse] cpu_bus;
Kojto	111:4336505e4b1c	135	* node [label="AHB Bus" shape=ellipse] ahb_bus;
Kojto	111:4336505e4b1c	136	* node [label="APBA Bus" shape=ellipse] apb_a_bus;
Kojto	111:4336505e4b1c	137	* node [label="APBB Bus" shape=ellipse] apb_b_bus;
Kojto	111:4336505e4b1c	138	* node [label="APBC Bus" shape=ellipse] apb_c_bus;
Kojto	111:4336505e4b1c	139	* node [label="Main Bus\nPrescaler" shape=square] main_prescaler;
Kojto	111:4336505e4b1c	140	* node [label="APBA Bus\nPrescaler" shape=square] apb_a_prescaler;
Kojto	111:4336505e4b1c	141	* node [label="APBB Bus\nPrescaler" shape=square] apb_b_prescaler;
Kojto	111:4336505e4b1c	142	* node [label="APBC Bus\nPrescaler" shape=square] apb_c_prescaler;
Kojto	111:4336505e4b1c	143	* node [label="", shape=polygon, sides=4, distortion=0.6, orientation=90, style=filled, fillcolor=black, height=0.9, width=0.2] main_clock_mux;
Kojto	111:4336505e4b1c	144	*
Kojto	111:4336505e4b1c	145	* clk_src -> main_clock_mux;
Kojto	111:4336505e4b1c	146	* main_clock_mux -> main_prescaler;
Kojto	111:4336505e4b1c	147	* main_prescaler -> cpu_bus;
Kojto	111:4336505e4b1c	148	* main_prescaler -> ahb_bus;
Kojto	111:4336505e4b1c	149	* main_prescaler -> apb_a_prescaler;
Kojto	111:4336505e4b1c	150	* main_prescaler -> apb_b_prescaler;
Kojto	111:4336505e4b1c	151	* main_prescaler -> apb_c_prescaler;
Kojto	111:4336505e4b1c	152	* apb_a_prescaler -> apb_a_bus;
Kojto	111:4336505e4b1c	153	* apb_b_prescaler -> apb_b_bus;
Kojto	111:4336505e4b1c	154	* apb_c_prescaler -> apb_c_bus;
Kojto	111:4336505e4b1c	155	* }
Kojto	111:4336505e4b1c	156	* \enddot
Kojto	111:4336505e4b1c	157	*
Kojto	111:4336505e4b1c	158	* \subsection asfdoc_sam0_system_clock_module_overview_clock_masking Clock Masking
Kojto	111:4336505e4b1c	159	* To save power, the input clock to one or more peripherals on the AHB and APBx
Kojto	111:4336505e4b1c	160	* buses can be masked away - when masked, no clock is passed into the module.
Kojto	111:4336505e4b1c	161	* Disabling of clocks of unused modules will prevent all access to the masked
Kojto	111:4336505e4b1c	162	* module, but will reduce the overall device power consumption.
Kojto	111:4336505e4b1c	163	*
Kojto	111:4336505e4b1c	164	* \subsection asfdoc_sam0_system_clock_module_overview_gclk Generic Clocks
Kojto	111:4336505e4b1c	165	* Within the SAM devices there are a number of Generic Clocks; these are used to
Kojto	111:4336505e4b1c	166	* provide clocks to the various peripheral clock domains in the device in a
Kojto	111:4336505e4b1c	167	* standardized manner. One or more master source clocks can be selected as the
Kojto	111:4336505e4b1c	168	* input clock to a Generic Clock Generator, which can prescale down the input
Kojto	111:4336505e4b1c	169	* frequency to a slower rate for use in a peripheral.
Kojto	111:4336505e4b1c	170	*
Kojto	111:4336505e4b1c	171	* Additionally, a number of individually selectable Generic Clock Channels are
Kojto	111:4336505e4b1c	172	* provided, which multiplex and gate the various generator outputs for one or
Kojto	111:4336505e4b1c	173	* more peripherals within the device. This setup allows for a single common
Kojto	111:4336505e4b1c	174	* generator to feed one or more channels, which can then be enabled or disabled
Kojto	111:4336505e4b1c	175	* individually as required.
Kojto	111:4336505e4b1c	176	*
Kojto	111:4336505e4b1c	177	* \anchor asfdoc_sam0_system_clock_module_chain_overview
Kojto	111:4336505e4b1c	178	* \dot
Kojto	111:4336505e4b1c	179	* digraph overview {
Kojto	111:4336505e4b1c	180	* rankdir=LR;
Kojto	111:4336505e4b1c	181	* node [label="Clock\nSource a" shape=square] system_clock_source;
Kojto	111:4336505e4b1c	182	* node [label="Generator 1" shape=square] clock_gen;
Kojto	111:4336505e4b1c	183	* node [label="Channel x" shape=square] clock_chan0;
Kojto	111:4336505e4b1c	184	* node [label="Channel y" shape=square] clock_chan1;
Kojto	111:4336505e4b1c	185	* node [label="Peripheral x" shape=ellipse style=filled fillcolor=lightgray] peripheral0;
Kojto	111:4336505e4b1c	186	* node [label="Peripheral y" shape=ellipse style=filled fillcolor=lightgray] peripheral1;
Kojto	111:4336505e4b1c	187	*
Kojto	111:4336505e4b1c	188	* system_clock_source -> clock_gen;
Kojto	111:4336505e4b1c	189	* clock_gen -> clock_chan0;
Kojto	111:4336505e4b1c	190	* clock_chan0 -> peripheral0;
Kojto	111:4336505e4b1c	191	* clock_gen -> clock_chan1;
Kojto	111:4336505e4b1c	192	* clock_chan1 -> peripheral1;
Kojto	111:4336505e4b1c	193	* }
Kojto	111:4336505e4b1c	194	* \enddot
Kojto	111:4336505e4b1c	195	*
Kojto	111:4336505e4b1c	196	* \subsubsection asfdoc_sam0_system_clock_module_chain_example Clock Chain Example
Kojto	111:4336505e4b1c	197	* An example setup of a complete clock chain within the device is shown in
Kojto	111:4336505e4b1c	198	* \ref asfdoc_sam0_system_clock_module_chain_example_fig "the figure below".
Kojto	111:4336505e4b1c	199	*
Kojto	111:4336505e4b1c	200	* \anchor asfdoc_sam0_system_clock_module_chain_example_fig
Kojto	111:4336505e4b1c	201	* \dot
Kojto	111:4336505e4b1c	202	* digraph overview {
Kojto	111:4336505e4b1c	203	* rankdir=LR;
Kojto	111:4336505e4b1c	204	* node [label="External\nOscillator" shape=square] system_clock_source0;
Kojto	111:4336505e4b1c	205	* node [label="Generator 0" shape=square] clock_gen0;
Kojto	111:4336505e4b1c	206	* node [label="Channel x" shape=square] clock_chan0;
Kojto	111:4336505e4b1c	207	* node [label="Core CPU" shape=ellipse style=filled fillcolor=lightgray] peripheral0;
Kojto	111:4336505e4b1c	208	*
Kojto	111:4336505e4b1c	209	* system_clock_source0 -> clock_gen0;
Kojto	111:4336505e4b1c	210	* clock_gen0 -> clock_chan0;
Kojto	111:4336505e4b1c	211	* clock_chan0 -> peripheral0;
Kojto	111:4336505e4b1c	212	* node [label="8MHz R/C\nOscillator (OSC8M)" shape=square fillcolor=white] system_clock_source1;
Kojto	111:4336505e4b1c	213	* node [label="Generator 1" shape=square] clock_gen1;
Kojto	111:4336505e4b1c	214	* node [label="Channel y" shape=square] clock_chan1;
Kojto	111:4336505e4b1c	215	* node [label="Channel z" shape=square] clock_chan2;
Kojto	111:4336505e4b1c	216	* node [label="SERCOM\nModule" shape=ellipse style=filled fillcolor=lightgray] peripheral1;
Kojto	111:4336505e4b1c	217	* node [label="Timer\nModule" shape=ellipse style=filled fillcolor=lightgray] peripheral2;
Kojto	111:4336505e4b1c	218	*
Kojto	111:4336505e4b1c	219	* system_clock_source1 -> clock_gen1;
Kojto	111:4336505e4b1c	220	* clock_gen1 -> clock_chan1;
Kojto	111:4336505e4b1c	221	* clock_gen1 -> clock_chan2;
Kojto	111:4336505e4b1c	222	* clock_chan1 -> peripheral1;
Kojto	111:4336505e4b1c	223	* clock_chan2 -> peripheral2;
Kojto	111:4336505e4b1c	224	* }
Kojto	111:4336505e4b1c	225	* \enddot
Kojto	111:4336505e4b1c	226	*
Kojto	111:4336505e4b1c	227	* \subsubsection asfdoc_sam0_system_clock_module_overview_gclk_generators Generic Clock Generators
Kojto	111:4336505e4b1c	228	* Each Generic Clock generator within the device can source its input clock
Kojto	111:4336505e4b1c	229	* from one of the provided Source Clocks, and prescale the output for one or
Kojto	111:4336505e4b1c	230	* more Generic Clock Channels in a one-to-many relationship. The generators
Kojto	111:4336505e4b1c	231	* thus allow for several clocks to be generated of different frequencies,
Kojto	111:4336505e4b1c	232	* power usages, and accuracies, which can be turned on and off individually to
Kojto	111:4336505e4b1c	233	* disable the clocks to multiple peripherals as a group.
Kojto	111:4336505e4b1c	234	*
Kojto	111:4336505e4b1c	235	* \subsubsection asfdoc_sam0_system_clock_module_overview_gclk_channels Generic Clock Channels
Kojto	111:4336505e4b1c	236	* To connect a Generic Clock Generator to a peripheral within the
Kojto	111:4336505e4b1c	237	* device, a Generic Clock Channel is used. Each peripheral or
Kojto	111:4336505e4b1c	238	* peripheral group has an associated Generic Clock Channel, which serves as the
Kojto	111:4336505e4b1c	239	* clock input for the peripheral(s). To supply a clock to the peripheral
Kojto	111:4336505e4b1c	240	* module(s), the associated channel must be connected to a running Generic
Kojto	111:4336505e4b1c	241	* Clock Generator and the channel enabled.
Kojto	111:4336505e4b1c	242	*
Kojto	111:4336505e4b1c	243	* \section asfdoc_sam0_system_clock_special_considerations Special Considerations
Kojto	111:4336505e4b1c	244	*
Kojto	111:4336505e4b1c	245	* There are no special considerations for this module.
Kojto	111:4336505e4b1c	246	*
Kojto	111:4336505e4b1c	247	*
Kojto	111:4336505e4b1c	248	* \section asfdoc_sam0_system_clock_extra_info Extra Information
Kojto	111:4336505e4b1c	249	*
Kojto	111:4336505e4b1c	250	* For extra information, see \ref asfdoc_sam0_system_clock_extra. This includes:
Kojto	111:4336505e4b1c	251	* - \ref asfdoc_sam0_system_clock_extra_acronyms
Kojto	111:4336505e4b1c	252	* - \ref asfdoc_sam0_system_clock_extra_dependencies
Kojto	111:4336505e4b1c	253	* - \ref asfdoc_sam0_system_clock_extra_errata
Kojto	111:4336505e4b1c	254	* - \ref asfdoc_sam0_system_clock_extra_history
Kojto	111:4336505e4b1c	255	*
Kojto	111:4336505e4b1c	256	*
Kojto	111:4336505e4b1c	257	* \section asfdoc_sam0_system_clock_examples Examples
Kojto	111:4336505e4b1c	258	*
Kojto	111:4336505e4b1c	259	* For a list of examples related to this driver, see
Kojto	111:4336505e4b1c	260	* \ref asfdoc_sam0_system_clock_exqsg.
Kojto	111:4336505e4b1c	261	*
Kojto	111:4336505e4b1c	262	*
Kojto	111:4336505e4b1c	263	* \section asfdoc_sam0_system_clock_api_overview API Overview
Kojto	111:4336505e4b1c	264	* @{
Kojto	111:4336505e4b1c	265	*/
Kojto	111:4336505e4b1c	266
Kojto	111:4336505e4b1c	267	#include <compiler.h>
Kojto	111:4336505e4b1c	268	#include <gclk.h>
Kojto	111:4336505e4b1c	269
Kojto	111:4336505e4b1c	270	/**
Kojto	111:4336505e4b1c	271	* \name Driver Feature Definition
Kojto	111:4336505e4b1c	272	* Define system clock features set according to different device family.
Kojto	111:4336505e4b1c	273	* @{
Kojto	111:4336505e4b1c	274	*/
Kojto	111:4336505e4b1c	275	#if (SAMD21) \|\| (SAMR21) \|\| (SAMD11) \|\| (SAMD10) \|\| (SAMDA1) \|\| defined(__DOXYGEN__)
Kojto	111:4336505e4b1c	276	/** Digital Phase Locked Loop (DPLL) feature support. */
Kojto	111:4336505e4b1c	277	# define FEATURE_SYSTEM_CLOCK_DPLL
Kojto	111:4336505e4b1c	278	#endif
Kojto	111:4336505e4b1c	279	/@}/
Kojto	111:4336505e4b1c	280
Kojto	111:4336505e4b1c	281	/**
Kojto	111:4336505e4b1c	282	* \brief Available start-up times for the XOSC32K.
Kojto	111:4336505e4b1c	283	*
Kojto	111:4336505e4b1c	284	* Available external 32KHz oscillator start-up times, as a number of external
Kojto	111:4336505e4b1c	285	* clock cycles.
Kojto	111:4336505e4b1c	286	*/
Kojto	111:4336505e4b1c	287	enum system_xosc32k_startup {
Kojto	111:4336505e4b1c	288	/** Wait zero clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	289	SYSTEM_XOSC32K_STARTUP_0,
Kojto	111:4336505e4b1c	290	/** Wait 32 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	291	SYSTEM_XOSC32K_STARTUP_32,
Kojto	111:4336505e4b1c	292	/** Wait 2048 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	293	SYSTEM_XOSC32K_STARTUP_2048,
Kojto	111:4336505e4b1c	294	/** Wait 4096 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	295	SYSTEM_XOSC32K_STARTUP_4096,
Kojto	111:4336505e4b1c	296	/** Wait 16384 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	297	SYSTEM_XOSC32K_STARTUP_16384,
Kojto	111:4336505e4b1c	298	/** Wait 32768 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	299	SYSTEM_XOSC32K_STARTUP_32768,
Kojto	111:4336505e4b1c	300	/** Wait 65536 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	301	SYSTEM_XOSC32K_STARTUP_65536,
Kojto	111:4336505e4b1c	302	/** Wait 131072 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	303	SYSTEM_XOSC32K_STARTUP_131072,
Kojto	111:4336505e4b1c	304	};
Kojto	111:4336505e4b1c	305
Kojto	111:4336505e4b1c	306	/**
Kojto	111:4336505e4b1c	307	* \brief Available start-up times for the XOSC.
Kojto	111:4336505e4b1c	308	*
Kojto	111:4336505e4b1c	309	* Available external oscillator start-up times, as a number of external clock
Kojto	111:4336505e4b1c	310	* cycles.
Kojto	111:4336505e4b1c	311	*/
Kojto	111:4336505e4b1c	312	enum system_xosc_startup {
Kojto	111:4336505e4b1c	313	/** Wait one clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	314	SYSTEM_XOSC_STARTUP_1,
Kojto	111:4336505e4b1c	315	/** Wait two clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	316	SYSTEM_XOSC_STARTUP_2,
Kojto	111:4336505e4b1c	317	/** Wait four clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	318	SYSTEM_XOSC_STARTUP_4,
Kojto	111:4336505e4b1c	319	/** Wait eight clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	320	SYSTEM_XOSC_STARTUP_8,
Kojto	111:4336505e4b1c	321	/** Wait 16 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	322	SYSTEM_XOSC_STARTUP_16,
Kojto	111:4336505e4b1c	323	/** Wait 32 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	324	SYSTEM_XOSC_STARTUP_32,
Kojto	111:4336505e4b1c	325	/** Wait 64 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	326	SYSTEM_XOSC_STARTUP_64,
Kojto	111:4336505e4b1c	327	/** Wait 128 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	328	SYSTEM_XOSC_STARTUP_128,
Kojto	111:4336505e4b1c	329	/** Wait 256 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	330	SYSTEM_XOSC_STARTUP_256,
Kojto	111:4336505e4b1c	331	/** Wait 512 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	332	SYSTEM_XOSC_STARTUP_512,
Kojto	111:4336505e4b1c	333	/** Wait 1024 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	334	SYSTEM_XOSC_STARTUP_1024,
Kojto	111:4336505e4b1c	335	/** Wait 2048 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	336	SYSTEM_XOSC_STARTUP_2048,
Kojto	111:4336505e4b1c	337	/** Wait 4096 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	338	SYSTEM_XOSC_STARTUP_4096,
Kojto	111:4336505e4b1c	339	/** Wait 8192 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	340	SYSTEM_XOSC_STARTUP_8192,
Kojto	111:4336505e4b1c	341	/** Wait 16384 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	342	SYSTEM_XOSC_STARTUP_16384,
Kojto	111:4336505e4b1c	343	/** Wait 32768 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	344	SYSTEM_XOSC_STARTUP_32768,
Kojto	111:4336505e4b1c	345	};
Kojto	111:4336505e4b1c	346
Kojto	111:4336505e4b1c	347	/**
Kojto	111:4336505e4b1c	348	* \brief Available start-up times for the OSC32K.
Kojto	111:4336505e4b1c	349	*
Kojto	111:4336505e4b1c	350	* Available internal 32KHz oscillator start-up times, as a number of internal
Kojto	111:4336505e4b1c	351	* OSC32K clock cycles.
Kojto	111:4336505e4b1c	352	*/
Kojto	111:4336505e4b1c	353	enum system_osc32k_startup {
Kojto	111:4336505e4b1c	354	/** Wait three clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	355	SYSTEM_OSC32K_STARTUP_3,
Kojto	111:4336505e4b1c	356	/** Wait four clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	357	SYSTEM_OSC32K_STARTUP_4,
Kojto	111:4336505e4b1c	358	/** Wait six clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	359	SYSTEM_OSC32K_STARTUP_6,
Kojto	111:4336505e4b1c	360	/** Wait ten clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	361	SYSTEM_OSC32K_STARTUP_10,
Kojto	111:4336505e4b1c	362	/** Wait 18 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	363	SYSTEM_OSC32K_STARTUP_18,
Kojto	111:4336505e4b1c	364	/** Wait 34 clock cycles until the clock source is considered stable */
Kojto	111:4336505e4b1c	365	SYSTEM_OSC32K_STARTUP_34,
Kojto	111:4336505e4b1c	366	/** Wait 66 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	367	SYSTEM_OSC32K_STARTUP_66,
Kojto	111:4336505e4b1c	368	/** Wait 130 clock cycles until the clock source is considered stable. */
Kojto	111:4336505e4b1c	369	SYSTEM_OSC32K_STARTUP_130,
Kojto	111:4336505e4b1c	370	};
Kojto	111:4336505e4b1c	371
Kojto	111:4336505e4b1c	372	/**
Kojto	111:4336505e4b1c	373	* \brief Division prescalers for the internal 8MHz system clock.
Kojto	111:4336505e4b1c	374	*
Kojto	111:4336505e4b1c	375	* Available prescalers for the internal 8MHz (nominal) system clock.
Kojto	111:4336505e4b1c	376	*/
Kojto	111:4336505e4b1c	377	enum system_osc8m_div {
Kojto	111:4336505e4b1c	378	/** Do not divide the 8MHz RC oscillator output. */
Kojto	111:4336505e4b1c	379	SYSTEM_OSC8M_DIV_1,
Kojto	111:4336505e4b1c	380	/** Divide the 8MHz RC oscillator output by two. */
Kojto	111:4336505e4b1c	381	SYSTEM_OSC8M_DIV_2,
Kojto	111:4336505e4b1c	382	/** Divide the 8MHz RC oscillator output by four. */
Kojto	111:4336505e4b1c	383	SYSTEM_OSC8M_DIV_4,
Kojto	111:4336505e4b1c	384	/** Divide the 8MHz RC oscillator output by eight. */
Kojto	111:4336505e4b1c	385	SYSTEM_OSC8M_DIV_8,
Kojto	111:4336505e4b1c	386	};
Kojto	111:4336505e4b1c	387
Kojto	111:4336505e4b1c	388	/**
Kojto	111:4336505e4b1c	389	* \brief Frequency range for the internal 8MHz RC oscillator.
Kojto	111:4336505e4b1c	390	*
Kojto	111:4336505e4b1c	391	* Internal 8MHz RC oscillator frequency range setting
Kojto	111:4336505e4b1c	392	*/
Kojto	111:4336505e4b1c	393	enum system_osc8m_frequency_range {
Kojto	111:4336505e4b1c	394	/** Frequency range 4MHz to 6MHz. */
Kojto	111:4336505e4b1c	395	SYSTEM_OSC8M_FREQUENCY_RANGE_4_TO_6,
Kojto	111:4336505e4b1c	396	/** Frequency range 6MHz to 8MHz. */
Kojto	111:4336505e4b1c	397	SYSTEM_OSC8M_FREQUENCY_RANGE_6_TO_8,
Kojto	111:4336505e4b1c	398	/** Frequency range 8MHz to 11MHz. */
Kojto	111:4336505e4b1c	399	SYSTEM_OSC8M_FREQUENCY_RANGE_8_TO_11,
Kojto	111:4336505e4b1c	400	/** Frequency range 11MHz to 15MHz. */
Kojto	111:4336505e4b1c	401	SYSTEM_OSC8M_FREQUENCY_RANGE_11_TO_15,
Kojto	111:4336505e4b1c	402	};
Kojto	111:4336505e4b1c	403
Kojto	111:4336505e4b1c	404	/**
Kojto	111:4336505e4b1c	405	* \brief Main CPU and APB/AHB bus clock source prescaler values.
Kojto	111:4336505e4b1c	406	*
Kojto	111:4336505e4b1c	407	* Available division ratios for the CPU and APB/AHB bus clocks.
Kojto	111:4336505e4b1c	408	*/
Kojto	111:4336505e4b1c	409	enum system_main_clock_div {
Kojto	111:4336505e4b1c	410	/** Divide Main clock by one. */
Kojto	111:4336505e4b1c	411	SYSTEM_MAIN_CLOCK_DIV_1,
Kojto	111:4336505e4b1c	412	/** Divide Main clock by two. */
Kojto	111:4336505e4b1c	413	SYSTEM_MAIN_CLOCK_DIV_2,
Kojto	111:4336505e4b1c	414	/** Divide Main clock by four. */
Kojto	111:4336505e4b1c	415	SYSTEM_MAIN_CLOCK_DIV_4,
Kojto	111:4336505e4b1c	416	/** Divide Main clock by eight. */
Kojto	111:4336505e4b1c	417	SYSTEM_MAIN_CLOCK_DIV_8,
Kojto	111:4336505e4b1c	418	/** Divide Main clock by 16. */
Kojto	111:4336505e4b1c	419	SYSTEM_MAIN_CLOCK_DIV_16,
Kojto	111:4336505e4b1c	420	/** Divide Main clock by 32. */
Kojto	111:4336505e4b1c	421	SYSTEM_MAIN_CLOCK_DIV_32,
Kojto	111:4336505e4b1c	422	/** Divide Main clock by 64. */
Kojto	111:4336505e4b1c	423	SYSTEM_MAIN_CLOCK_DIV_64,
Kojto	111:4336505e4b1c	424	/** Divide Main clock by 128. */
Kojto	111:4336505e4b1c	425	SYSTEM_MAIN_CLOCK_DIV_128,
Kojto	111:4336505e4b1c	426	};
Kojto	111:4336505e4b1c	427
Kojto	111:4336505e4b1c	428	/**
Kojto	111:4336505e4b1c	429	* \brief External clock source types.
Kojto	111:4336505e4b1c	430	*
Kojto	111:4336505e4b1c	431	* Available external clock source types.
Kojto	111:4336505e4b1c	432	*/
Kojto	111:4336505e4b1c	433	enum system_clock_external {
Kojto	111:4336505e4b1c	434	/** The external clock source is a crystal oscillator. */
Kojto	111:4336505e4b1c	435	SYSTEM_CLOCK_EXTERNAL_CRYSTAL,
Kojto	111:4336505e4b1c	436	/** The connected clock source is an external logic level clock signal. */
Kojto	111:4336505e4b1c	437	SYSTEM_CLOCK_EXTERNAL_CLOCK,
Kojto	111:4336505e4b1c	438	};
Kojto	111:4336505e4b1c	439
Kojto	111:4336505e4b1c	440	/**
Kojto	111:4336505e4b1c	441	* \brief Operating modes of the DFLL clock source.
Kojto	111:4336505e4b1c	442	*
Kojto	111:4336505e4b1c	443	* Available operating modes of the DFLL clock source module.
Kojto	111:4336505e4b1c	444	*/
Kojto	111:4336505e4b1c	445	enum system_clock_dfll_loop_mode {
Kojto	111:4336505e4b1c	446	/** The DFLL is operating in open loop mode with no feedback. */
Kojto	111:4336505e4b1c	447	SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN,
Kojto	111:4336505e4b1c	448	/** The DFLL is operating in closed loop mode with frequency feedback from
Kojto	111:4336505e4b1c	449	* a low frequency reference clock.
Kojto	111:4336505e4b1c	450	*/
Kojto	111:4336505e4b1c	451	SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED = SYSCTRL_DFLLCTRL_MODE,
Kojto	111:4336505e4b1c	452
Kojto	111:4336505e4b1c	453	#ifdef SYSCTRL_DFLLCTRL_USBCRM
Kojto	111:4336505e4b1c	454	/** The DFLL is operating in USB recovery mode with frequency feedback
Kojto	111:4336505e4b1c	455	* from USB SOF.
Kojto	111:4336505e4b1c	456	*/
Kojto	111:4336505e4b1c	457	SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY = SYSCTRL_DFLLCTRL_USBCRM,
Kojto	111:4336505e4b1c	458	#endif
Kojto	111:4336505e4b1c	459	};
Kojto	111:4336505e4b1c	460
Kojto	111:4336505e4b1c	461	/**
Kojto	111:4336505e4b1c	462	* \brief Locking behavior for the DFLL during device wake-up.
Kojto	111:4336505e4b1c	463	*
Kojto	111:4336505e4b1c	464	* DFLL lock behavior modes on device wake-up from sleep.
Kojto	111:4336505e4b1c	465	*/
Kojto	111:4336505e4b1c	466	enum system_clock_dfll_wakeup_lock {
Kojto	111:4336505e4b1c	467	/** Keep DFLL lock when the device wakes from sleep. */
Kojto	111:4336505e4b1c	468	SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP,
Kojto	111:4336505e4b1c	469	/** Lose DFLL lock when the devices wakes from sleep. */
Kojto	111:4336505e4b1c	470	SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_LOSE = SYSCTRL_DFLLCTRL_LLAW,
Kojto	111:4336505e4b1c	471	};
Kojto	111:4336505e4b1c	472
Kojto	111:4336505e4b1c	473	/**
Kojto	111:4336505e4b1c	474	* \brief Fine tracking behavior for the DFLL once a lock has been acquired.
Kojto	111:4336505e4b1c	475	*
Kojto	111:4336505e4b1c	476	* DFLL fine tracking behavior modes after a lock has been acquired.
Kojto	111:4336505e4b1c	477	*/
Kojto	111:4336505e4b1c	478	enum system_clock_dfll_stable_tracking {
Kojto	111:4336505e4b1c	479	/** Keep tracking after the DFLL has gotten a fine lock. */
Kojto	111:4336505e4b1c	480	SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK,
Kojto	111:4336505e4b1c	481	/** Stop tracking after the DFLL has gotten a fine lock. */
Kojto	111:4336505e4b1c	482	SYSTEM_CLOCK_DFLL_STABLE_TRACKING_FIX_AFTER_LOCK = SYSCTRL_DFLLCTRL_STABLE,
Kojto	111:4336505e4b1c	483	};
Kojto	111:4336505e4b1c	484
Kojto	111:4336505e4b1c	485	/**
Kojto	111:4336505e4b1c	486	* \brief Chill-cycle behavior of the DFLL module.
Kojto	111:4336505e4b1c	487	*
Kojto	111:4336505e4b1c	488	* DFLL chill-cycle behavior modes of the DFLL module. A chill cycle is a period
Kojto	111:4336505e4b1c	489	* of time when the DFLL output frequency is not measured by the unit, to allow
Kojto	111:4336505e4b1c	490	* the output to stabilize after a change in the input clock source.
Kojto	111:4336505e4b1c	491	*/
Kojto	111:4336505e4b1c	492	enum system_clock_dfll_chill_cycle {
Kojto	111:4336505e4b1c	493	/** Enable a chill cycle, where the DFLL output frequency is not measured. */
Kojto	111:4336505e4b1c	494	SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE,
Kojto	111:4336505e4b1c	495	/** Disable a chill cycle, where the DFLL output frequency is not measured. */
Kojto	111:4336505e4b1c	496	SYSTEM_CLOCK_DFLL_CHILL_CYCLE_DISABLE = SYSCTRL_DFLLCTRL_CCDIS,
Kojto	111:4336505e4b1c	497	};
Kojto	111:4336505e4b1c	498
Kojto	111:4336505e4b1c	499	/**
Kojto	111:4336505e4b1c	500	* \brief QuickLock settings for the DFLL module.
Kojto	111:4336505e4b1c	501	*
Kojto	111:4336505e4b1c	502	* DFLL QuickLock settings for the DFLL module, to allow for a faster lock of
Kojto	111:4336505e4b1c	503	* the DFLL output frequency at the expense of accuracy.
Kojto	111:4336505e4b1c	504	*/
Kojto	111:4336505e4b1c	505	enum system_clock_dfll_quick_lock {
Kojto	111:4336505e4b1c	506	/** Enable the QuickLock feature for looser lock requirements on the DFLL. */
Kojto	111:4336505e4b1c	507	SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE,
Kojto	111:4336505e4b1c	508	/** Disable the QuickLock feature for strict lock requirements on the DFLL. */
Kojto	111:4336505e4b1c	509	SYSTEM_CLOCK_DFLL_QUICK_LOCK_DISABLE = SYSCTRL_DFLLCTRL_QLDIS,
Kojto	111:4336505e4b1c	510	};
Kojto	111:4336505e4b1c	511
Kojto	111:4336505e4b1c	512	/**
Kojto	111:4336505e4b1c	513	* \brief Available clock sources in the system.
Kojto	111:4336505e4b1c	514	*
Kojto	111:4336505e4b1c	515	* Clock sources available to the GCLK generators.
Kojto	111:4336505e4b1c	516	*/
Kojto	111:4336505e4b1c	517	enum system_clock_source {
Kojto	111:4336505e4b1c	518	/** Internal 8MHz RC oscillator. */
Kojto	111:4336505e4b1c	519	SYSTEM_CLOCK_SOURCE_OSC8M = GCLK_SOURCE_OSC8M,
Kojto	111:4336505e4b1c	520	/** Internal 32KHz RC oscillator. */
Kojto	111:4336505e4b1c	521	SYSTEM_CLOCK_SOURCE_OSC32K = GCLK_SOURCE_OSC32K,
Kojto	111:4336505e4b1c	522	/** External oscillator. */
Kojto	111:4336505e4b1c	523	SYSTEM_CLOCK_SOURCE_XOSC = GCLK_SOURCE_XOSC ,
Kojto	111:4336505e4b1c	524	/** External 32KHz oscillator. */
Kojto	111:4336505e4b1c	525	SYSTEM_CLOCK_SOURCE_XOSC32K = GCLK_SOURCE_XOSC32K,
Kojto	111:4336505e4b1c	526	/** Digital Frequency Locked Loop (DFLL). */
Kojto	111:4336505e4b1c	527	SYSTEM_CLOCK_SOURCE_DFLL = GCLK_SOURCE_DFLL48M,
Kojto	111:4336505e4b1c	528	/** Internal Ultra Low Power 32KHz oscillator. */
Kojto	111:4336505e4b1c	529	SYSTEM_CLOCK_SOURCE_ULP32K = GCLK_SOURCE_OSCULP32K,
Kojto	111:4336505e4b1c	530	/** Generator input pad. */
Kojto	111:4336505e4b1c	531	SYSTEM_CLOCK_SOURCE_GCLKIN = GCLK_SOURCE_GCLKIN,
Kojto	111:4336505e4b1c	532	/** Generic clock generator one output. */
Kojto	111:4336505e4b1c	533	SYSTEM_CLOCK_SOURCE_GCLKGEN1 = GCLK_SOURCE_GCLKGEN1,
Kojto	111:4336505e4b1c	534	#ifdef FEATURE_SYSTEM_CLOCK_DPLL
Kojto	111:4336505e4b1c	535	/** Digital Phase Locked Loop (DPLL).
Kojto	111:4336505e4b1c	536	* Check \c FEATURE_SYSTEM_CLOCK_DPLL for which device support it.
Kojto	111:4336505e4b1c	537	*/
Kojto	111:4336505e4b1c	538	SYSTEM_CLOCK_SOURCE_DPLL = GCLK_SOURCE_FDPLL,
Kojto	111:4336505e4b1c	539	#endif
Kojto	111:4336505e4b1c	540	};
Kojto	111:4336505e4b1c	541
Kojto	111:4336505e4b1c	542	/**
Kojto	111:4336505e4b1c	543	* \brief List of APB peripheral buses.
Kojto	111:4336505e4b1c	544	*
Kojto	111:4336505e4b1c	545	* Available bus clock domains on the APB bus.
Kojto	111:4336505e4b1c	546	*/
Kojto	111:4336505e4b1c	547	enum system_clock_apb_bus {
Kojto	111:4336505e4b1c	548	/** Peripheral bus A on the APB bus. */
Kojto	111:4336505e4b1c	549	SYSTEM_CLOCK_APB_APBA,
Kojto	111:4336505e4b1c	550	/** Peripheral bus B on the APB bus. */
Kojto	111:4336505e4b1c	551	SYSTEM_CLOCK_APB_APBB,
Kojto	111:4336505e4b1c	552	/** Peripheral bus C on the APB bus. */
Kojto	111:4336505e4b1c	553	SYSTEM_CLOCK_APB_APBC,
Kojto	111:4336505e4b1c	554	};
Kojto	111:4336505e4b1c	555
Kojto	111:4336505e4b1c	556	/**
Kojto	111:4336505e4b1c	557	* \brief Configuration structure for XOSC.
Kojto	111:4336505e4b1c	558	*
Kojto	111:4336505e4b1c	559	* External oscillator clock configuration structure.
Kojto	111:4336505e4b1c	560	*/
Kojto	111:4336505e4b1c	561	struct system_clock_source_xosc_config {
Kojto	111:4336505e4b1c	562	/** External clock type. */
Kojto	111:4336505e4b1c	563	enum system_clock_external external_clock;
Kojto	111:4336505e4b1c	564	/** Crystal oscillator start-up time. */
Kojto	111:4336505e4b1c	565	enum system_xosc_startup startup_time;
Kojto	111:4336505e4b1c	566	/** Enable automatic amplitude gain control. */
Kojto	111:4336505e4b1c	567	bool auto_gain_control;
Kojto	111:4336505e4b1c	568	/** External clock/crystal frequency. */
Kojto	111:4336505e4b1c	569	uint32_t frequency;
Kojto	111:4336505e4b1c	570	/** Keep the XOSC enabled in standby sleep mode. */
Kojto	111:4336505e4b1c	571	bool run_in_standby;
Kojto	111:4336505e4b1c	572	/** Run On Demand. If this is set the XOSC won't run
Kojto	111:4336505e4b1c	573	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	574	bool on_demand;
Kojto	111:4336505e4b1c	575	};
Kojto	111:4336505e4b1c	576
Kojto	111:4336505e4b1c	577	/**
Kojto	111:4336505e4b1c	578	* \brief Configuration structure for XOSC32K.
Kojto	111:4336505e4b1c	579	*
Kojto	111:4336505e4b1c	580	* External 32KHz oscillator clock configuration structure.
Kojto	111:4336505e4b1c	581	*/
Kojto	111:4336505e4b1c	582	struct system_clock_source_xosc32k_config {
Kojto	111:4336505e4b1c	583	/** External clock type. */
Kojto	111:4336505e4b1c	584	enum system_clock_external external_clock;
Kojto	111:4336505e4b1c	585	/** Crystal oscillator start-up time. */
Kojto	111:4336505e4b1c	586	enum system_xosc32k_startup startup_time;
Kojto	111:4336505e4b1c	587	/** Enable automatic amplitude control. */
Kojto	111:4336505e4b1c	588	bool auto_gain_control;
Kojto	111:4336505e4b1c	589	/** Enable 1KHz output. */
Kojto	111:4336505e4b1c	590	bool enable_1khz_output;
Kojto	111:4336505e4b1c	591	/** Enable 32KHz output. */
Kojto	111:4336505e4b1c	592	bool enable_32khz_output;
Kojto	111:4336505e4b1c	593	/** External clock/crystal frequency. */
Kojto	111:4336505e4b1c	594	uint32_t frequency;
Kojto	111:4336505e4b1c	595	/** Keep the XOSC32K enabled in standby sleep mode. */
Kojto	111:4336505e4b1c	596	bool run_in_standby;
Kojto	111:4336505e4b1c	597	/** Run On Demand. If this is set the XOSC32K won't run
Kojto	111:4336505e4b1c	598	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	599	bool on_demand;
Kojto	111:4336505e4b1c	600	/** Lock configuration after it has been written,
Kojto	111:4336505e4b1c	601	* a device reset will release the lock. */
Kojto	111:4336505e4b1c	602	bool write_once;
Kojto	111:4336505e4b1c	603	};
Kojto	111:4336505e4b1c	604
Kojto	111:4336505e4b1c	605	/**
Kojto	111:4336505e4b1c	606	* \brief Configuration structure for OSC8M.
Kojto	111:4336505e4b1c	607	*
Kojto	111:4336505e4b1c	608	* Internal 8MHz (nominal) oscillator configuration structure.
Kojto	111:4336505e4b1c	609	*/
Kojto	111:4336505e4b1c	610	struct system_clock_source_osc8m_config {
Kojto	111:4336505e4b1c	611	/** Internal 8MHz RC oscillator prescaler. */
Kojto	111:4336505e4b1c	612	enum system_osc8m_div prescaler;
Kojto	111:4336505e4b1c	613	/** Keep the OSC8M enabled in standby sleep mode. */
Kojto	111:4336505e4b1c	614	bool run_in_standby;
Kojto	111:4336505e4b1c	615	/** Run On Demand. If this is set the OSC8M won't run
Kojto	111:4336505e4b1c	616	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	617	bool on_demand;
Kojto	111:4336505e4b1c	618	};
Kojto	111:4336505e4b1c	619
Kojto	111:4336505e4b1c	620	/**
Kojto	111:4336505e4b1c	621	* \brief Configuration structure for OSC32K.
Kojto	111:4336505e4b1c	622	*
Kojto	111:4336505e4b1c	623	* Internal 32KHz (nominal) oscillator configuration structure.
Kojto	111:4336505e4b1c	624	*/
Kojto	111:4336505e4b1c	625	struct system_clock_source_osc32k_config {
Kojto	111:4336505e4b1c	626	/** Startup time. */
Kojto	111:4336505e4b1c	627	enum system_osc32k_startup startup_time;
Kojto	111:4336505e4b1c	628	/** Enable 1KHz output. */
Kojto	111:4336505e4b1c	629	bool enable_1khz_output;
Kojto	111:4336505e4b1c	630	/** Enable 32KHz output. */
Kojto	111:4336505e4b1c	631	bool enable_32khz_output;
Kojto	111:4336505e4b1c	632	/** Keep the OSC32K enabled in standby sleep mode. */
Kojto	111:4336505e4b1c	633	bool run_in_standby;
Kojto	111:4336505e4b1c	634	/** Run On Demand. If this is set the OSC32K won't run
Kojto	111:4336505e4b1c	635	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	636	bool on_demand;
Kojto	111:4336505e4b1c	637	/** Lock configuration after it has been written,
Kojto	111:4336505e4b1c	638	* a device reset will release the lock. */
Kojto	111:4336505e4b1c	639	bool write_once;
Kojto	111:4336505e4b1c	640	};
Kojto	111:4336505e4b1c	641
Kojto	111:4336505e4b1c	642	/**
Kojto	111:4336505e4b1c	643	* \brief Configuration structure for DFLL.
Kojto	111:4336505e4b1c	644	*
Kojto	111:4336505e4b1c	645	* DFLL oscillator configuration structure.
Kojto	111:4336505e4b1c	646	*/
Kojto	111:4336505e4b1c	647	struct system_clock_source_dfll_config {
Kojto	111:4336505e4b1c	648	/** Loop mode. */
Kojto	111:4336505e4b1c	649	enum system_clock_dfll_loop_mode loop_mode;
Kojto	111:4336505e4b1c	650	/** Run On Demand. If this is set the DFLL won't run
Kojto	111:4336505e4b1c	651	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	652	bool on_demand;
Kojto	111:4336505e4b1c	653	/** Enable Quick Lock. */
Kojto	111:4336505e4b1c	654	enum system_clock_dfll_quick_lock quick_lock;
Kojto	111:4336505e4b1c	655	/** Enable Chill Cycle. */
Kojto	111:4336505e4b1c	656	enum system_clock_dfll_chill_cycle chill_cycle;
Kojto	111:4336505e4b1c	657	/** DFLL lock state on wakeup. */
Kojto	111:4336505e4b1c	658	enum system_clock_dfll_wakeup_lock wakeup_lock;
Kojto	111:4336505e4b1c	659	/** DFLL tracking after fine lock. */
Kojto	111:4336505e4b1c	660	enum system_clock_dfll_stable_tracking stable_tracking;
Kojto	111:4336505e4b1c	661	/** Coarse calibration value (Open loop mode). */
Kojto	111:4336505e4b1c	662	uint8_t coarse_value;
Kojto	111:4336505e4b1c	663	/** Fine calibration value (Open loop mode). */
Kojto	111:4336505e4b1c	664	uint16_t fine_value;
Kojto	111:4336505e4b1c	665	/** Coarse adjustment maximum step size (Closed loop mode). */
Kojto	111:4336505e4b1c	666	uint8_t coarse_max_step;
Kojto	111:4336505e4b1c	667	/** Fine adjustment maximum step size (Closed loop mode). */
Kojto	111:4336505e4b1c	668	uint16_t fine_max_step;
Kojto	111:4336505e4b1c	669	/** DFLL multiply factor (Closed loop mode. */
Kojto	111:4336505e4b1c	670	uint16_t multiply_factor;
Kojto	111:4336505e4b1c	671	};
Kojto	111:4336505e4b1c	672
Kojto	111:4336505e4b1c	673	/**
Kojto	111:4336505e4b1c	674	* \name External Oscillator Management
Kojto	111:4336505e4b1c	675	* @{
Kojto	111:4336505e4b1c	676	*/
Kojto	111:4336505e4b1c	677
Kojto	111:4336505e4b1c	678	/**
Kojto	111:4336505e4b1c	679	* \brief Retrieve the default configuration for XOSC.
Kojto	111:4336505e4b1c	680	*
Kojto	111:4336505e4b1c	681	* Fills a configuration structure with the default configuration for an
Kojto	111:4336505e4b1c	682	* external oscillator module:
Kojto	111:4336505e4b1c	683	* - External Crystal
Kojto	111:4336505e4b1c	684	* - Start-up time of 16384 external clock cycles
Kojto	111:4336505e4b1c	685	* - Automatic crystal gain control mode enabled
Kojto	111:4336505e4b1c	686	* - Frequency of 12MHz
Kojto	111:4336505e4b1c	687	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	688	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	689	*
Kojto	111:4336505e4b1c	690	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	691	*/
Kojto	111:4336505e4b1c	692	static inline void system_clock_source_xosc_get_config_defaults(
Kojto	111:4336505e4b1c	693	struct system_clock_source_xosc_config *const config)
Kojto	111:4336505e4b1c	694	{
Kojto	111:4336505e4b1c	695	Assert(config);
Kojto	111:4336505e4b1c	696
Kojto	111:4336505e4b1c	697	config->external_clock = SYSTEM_CLOCK_EXTERNAL_CRYSTAL;
Kojto	111:4336505e4b1c	698	config->startup_time = SYSTEM_XOSC_STARTUP_16384;
Kojto	111:4336505e4b1c	699	config->auto_gain_control = true;
Kojto	111:4336505e4b1c	700	config->frequency = 12000000UL;
Kojto	111:4336505e4b1c	701	config->run_in_standby = false;
Kojto	111:4336505e4b1c	702	config->on_demand = true;
Kojto	111:4336505e4b1c	703	}
Kojto	111:4336505e4b1c	704
Kojto	111:4336505e4b1c	705	void system_clock_source_xosc_set_config(
Kojto	111:4336505e4b1c	706	struct system_clock_source_xosc_config *const config);
Kojto	111:4336505e4b1c	707
Kojto	111:4336505e4b1c	708	/**
Kojto	111:4336505e4b1c	709	* @}
Kojto	111:4336505e4b1c	710	*/
Kojto	111:4336505e4b1c	711
Kojto	111:4336505e4b1c	712
Kojto	111:4336505e4b1c	713	/**
Kojto	111:4336505e4b1c	714	* \name External 32KHz Oscillator Management
Kojto	111:4336505e4b1c	715	* @{
Kojto	111:4336505e4b1c	716	*/
Kojto	111:4336505e4b1c	717
Kojto	111:4336505e4b1c	718	/**
Kojto	111:4336505e4b1c	719	* \brief Retrieve the default configuration for XOSC32K.
Kojto	111:4336505e4b1c	720	*
Kojto	111:4336505e4b1c	721	* Fills a configuration structure with the default configuration for an
Kojto	111:4336505e4b1c	722	* external 32KHz oscillator module:
Kojto	111:4336505e4b1c	723	* - External Crystal
Kojto	111:4336505e4b1c	724	* - Start-up time of 16384 external clock cycles
Kojto	111:4336505e4b1c	725	* - Automatic crystal gain control mode disabled
Kojto	111:4336505e4b1c	726	* - Frequency of 32.768KHz
Kojto	111:4336505e4b1c	727	* - 1KHz clock output disabled
Kojto	111:4336505e4b1c	728	* - 32KHz clock output enabled
Kojto	111:4336505e4b1c	729	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	730	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	731	* - Don't lock registers after configuration has been written
Kojto	111:4336505e4b1c	732	*
Kojto	111:4336505e4b1c	733	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	734	*/
Kojto	111:4336505e4b1c	735	static inline void system_clock_source_xosc32k_get_config_defaults(
Kojto	111:4336505e4b1c	736	struct system_clock_source_xosc32k_config *const config)
Kojto	111:4336505e4b1c	737	{
Kojto	111:4336505e4b1c	738	Assert(config);
Kojto	111:4336505e4b1c	739
Kojto	111:4336505e4b1c	740	config->external_clock = SYSTEM_CLOCK_EXTERNAL_CRYSTAL;
Kojto	111:4336505e4b1c	741	config->startup_time = SYSTEM_XOSC32K_STARTUP_16384;
Kojto	111:4336505e4b1c	742	config->auto_gain_control = false;
Kojto	111:4336505e4b1c	743	config->frequency = 32768UL;
Kojto	111:4336505e4b1c	744	config->enable_1khz_output = false;
Kojto	111:4336505e4b1c	745	config->enable_32khz_output = true;
Kojto	111:4336505e4b1c	746	config->run_in_standby = false;
Kojto	111:4336505e4b1c	747	config->on_demand = true;
Kojto	111:4336505e4b1c	748	config->write_once = false;
Kojto	111:4336505e4b1c	749	}
Kojto	111:4336505e4b1c	750
Kojto	111:4336505e4b1c	751	void system_clock_source_xosc32k_set_config(
Kojto	111:4336505e4b1c	752	struct system_clock_source_xosc32k_config *const config);
Kojto	111:4336505e4b1c	753	/**
Kojto	111:4336505e4b1c	754	* @}
Kojto	111:4336505e4b1c	755	*/
Kojto	111:4336505e4b1c	756
Kojto	111:4336505e4b1c	757
Kojto	111:4336505e4b1c	758	/**
Kojto	111:4336505e4b1c	759	* \name Internal 32KHz Oscillator Management
Kojto	111:4336505e4b1c	760	* @{
Kojto	111:4336505e4b1c	761	*/
Kojto	111:4336505e4b1c	762
Kojto	111:4336505e4b1c	763	/**
Kojto	111:4336505e4b1c	764	* \brief Retrieve the default configuration for OSC32K.
Kojto	111:4336505e4b1c	765	*
Kojto	111:4336505e4b1c	766	* Fills a configuration structure with the default configuration for an
Kojto	111:4336505e4b1c	767	* internal 32KHz oscillator module:
Kojto	111:4336505e4b1c	768	* - 1KHz clock output enabled
Kojto	111:4336505e4b1c	769	* - 32KHz clock output enabled
Kojto	111:4336505e4b1c	770	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	771	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	772	* - Set startup time to 130 cycles
Kojto	111:4336505e4b1c	773	* - Don't lock registers after configuration has been written
Kojto	111:4336505e4b1c	774	*
Kojto	111:4336505e4b1c	775	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	776	*/
Kojto	111:4336505e4b1c	777	static inline void system_clock_source_osc32k_get_config_defaults(
Kojto	111:4336505e4b1c	778	struct system_clock_source_osc32k_config *const config)
Kojto	111:4336505e4b1c	779	{
Kojto	111:4336505e4b1c	780	Assert(config);
Kojto	111:4336505e4b1c	781
Kojto	111:4336505e4b1c	782	config->enable_1khz_output = true;
Kojto	111:4336505e4b1c	783	config->enable_32khz_output = true;
Kojto	111:4336505e4b1c	784	config->run_in_standby = false;
Kojto	111:4336505e4b1c	785	config->on_demand = true;
Kojto	111:4336505e4b1c	786	config->startup_time = SYSTEM_OSC32K_STARTUP_130;
Kojto	111:4336505e4b1c	787	config->write_once = false;
Kojto	111:4336505e4b1c	788	}
Kojto	111:4336505e4b1c	789
Kojto	111:4336505e4b1c	790	void system_clock_source_osc32k_set_config(
Kojto	111:4336505e4b1c	791	struct system_clock_source_osc32k_config *const config);
Kojto	111:4336505e4b1c	792
Kojto	111:4336505e4b1c	793	/**
Kojto	111:4336505e4b1c	794	* @}
Kojto	111:4336505e4b1c	795	*/
Kojto	111:4336505e4b1c	796
Kojto	111:4336505e4b1c	797
Kojto	111:4336505e4b1c	798	/**
Kojto	111:4336505e4b1c	799	* \name Internal 8MHz Oscillator Management
Kojto	111:4336505e4b1c	800	* @{
Kojto	111:4336505e4b1c	801	*/
Kojto	111:4336505e4b1c	802
Kojto	111:4336505e4b1c	803	/**
Kojto	111:4336505e4b1c	804	* \brief Retrieve the default configuration for OSC8M.
Kojto	111:4336505e4b1c	805	*
Kojto	111:4336505e4b1c	806	* Fills a configuration structure with the default configuration for an
Kojto	111:4336505e4b1c	807	* internal 8MHz (nominal) oscillator module:
Kojto	111:4336505e4b1c	808	* - Clock output frequency divided by a factor of eight
Kojto	111:4336505e4b1c	809	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	810	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	811	*
Kojto	111:4336505e4b1c	812	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	813	*/
Kojto	111:4336505e4b1c	814	static inline void system_clock_source_osc8m_get_config_defaults(
Kojto	111:4336505e4b1c	815	struct system_clock_source_osc8m_config *const config)
Kojto	111:4336505e4b1c	816	{
Kojto	111:4336505e4b1c	817	Assert(config);
Kojto	111:4336505e4b1c	818
Kojto	111:4336505e4b1c	819	config->prescaler = SYSTEM_OSC8M_DIV_8;
Kojto	111:4336505e4b1c	820	config->run_in_standby = false;
Kojto	111:4336505e4b1c	821	config->on_demand = true;
Kojto	111:4336505e4b1c	822	}
Kojto	111:4336505e4b1c	823
Kojto	111:4336505e4b1c	824	void system_clock_source_osc8m_set_config(
Kojto	111:4336505e4b1c	825	struct system_clock_source_osc8m_config *const config);
Kojto	111:4336505e4b1c	826
Kojto	111:4336505e4b1c	827	/**
Kojto	111:4336505e4b1c	828	* @}
Kojto	111:4336505e4b1c	829	*/
Kojto	111:4336505e4b1c	830
Kojto	111:4336505e4b1c	831
Kojto	111:4336505e4b1c	832	/**
Kojto	111:4336505e4b1c	833	* \name Internal DFLL Management
Kojto	111:4336505e4b1c	834	* @{
Kojto	111:4336505e4b1c	835	*/
Kojto	111:4336505e4b1c	836
Kojto	111:4336505e4b1c	837	/**
Kojto	111:4336505e4b1c	838	* \brief Retrieve the default configuration for DFLL.
Kojto	111:4336505e4b1c	839	*
Kojto	111:4336505e4b1c	840	* Fills a configuration structure with the default configuration for a
Kojto	111:4336505e4b1c	841	* DFLL oscillator module:
Kojto	111:4336505e4b1c	842	* - Open loop mode
Kojto	111:4336505e4b1c	843	* - QuickLock mode enabled
Kojto	111:4336505e4b1c	844	* - Chill cycle enabled
Kojto	111:4336505e4b1c	845	* - Output frequency lock maintained during device wake-up
Kojto	111:4336505e4b1c	846	* - Continuous tracking of the output frequency
Kojto	111:4336505e4b1c	847	* - Default tracking values at the mid-points for both coarse and fine
Kojto	111:4336505e4b1c	848	* tracking parameters
Kojto	111:4336505e4b1c	849	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	850	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	851	*
Kojto	111:4336505e4b1c	852	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	853	*/
Kojto	111:4336505e4b1c	854	static inline void system_clock_source_dfll_get_config_defaults(
Kojto	111:4336505e4b1c	855	struct system_clock_source_dfll_config *const config)
Kojto	111:4336505e4b1c	856	{
Kojto	111:4336505e4b1c	857	Assert(config);
Kojto	111:4336505e4b1c	858
Kojto	111:4336505e4b1c	859	config->loop_mode = SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN;
Kojto	111:4336505e4b1c	860	config->quick_lock = SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE;
Kojto	111:4336505e4b1c	861	config->chill_cycle = SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE;
Kojto	111:4336505e4b1c	862	config->wakeup_lock = SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP;
Kojto	111:4336505e4b1c	863	config->stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK;
Kojto	111:4336505e4b1c	864	config->on_demand = true;
Kojto	111:4336505e4b1c	865
Kojto	111:4336505e4b1c	866	/* Open loop mode calibration value */
Kojto	111:4336505e4b1c	867	config->coarse_value = 0x1f / 4; /* Midpoint */
Kojto	111:4336505e4b1c	868	config->fine_value = 0xff / 4; /* Midpoint */
Kojto	111:4336505e4b1c	869
Kojto	111:4336505e4b1c	870	/* Closed loop mode */
Kojto	111:4336505e4b1c	871	config->coarse_max_step = 1;
Kojto	111:4336505e4b1c	872	config->fine_max_step = 1;
Kojto	111:4336505e4b1c	873	config->multiply_factor = 6; /* Multiply 8MHz by 6 to get 48MHz */
Kojto	111:4336505e4b1c	874	}
Kojto	111:4336505e4b1c	875
Kojto	111:4336505e4b1c	876	void system_clock_source_dfll_set_config(
Kojto	111:4336505e4b1c	877	struct system_clock_source_dfll_config *const config);
Kojto	111:4336505e4b1c	878
Kojto	111:4336505e4b1c	879	/**
Kojto	111:4336505e4b1c	880	* @}
Kojto	111:4336505e4b1c	881	*/
Kojto	111:4336505e4b1c	882
Kojto	111:4336505e4b1c	883	/**
Kojto	111:4336505e4b1c	884	* \name Clock Source Management
Kojto	111:4336505e4b1c	885	* @{
Kojto	111:4336505e4b1c	886	*/
Kojto	111:4336505e4b1c	887	enum status_code system_clock_source_write_calibration(
Kojto	111:4336505e4b1c	888	const enum system_clock_source system_clock_source,
Kojto	111:4336505e4b1c	889	const uint16_t calibration_value,
Kojto	111:4336505e4b1c	890	const uint8_t freq_range);
Kojto	111:4336505e4b1c	891
Kojto	111:4336505e4b1c	892	enum status_code system_clock_source_enable(
Kojto	111:4336505e4b1c	893	const enum system_clock_source system_clock_source);
Kojto	111:4336505e4b1c	894
Kojto	111:4336505e4b1c	895	enum status_code system_clock_source_disable(
Kojto	111:4336505e4b1c	896	const enum system_clock_source clk_source);
Kojto	111:4336505e4b1c	897
Kojto	111:4336505e4b1c	898	bool system_clock_source_is_ready(
Kojto	111:4336505e4b1c	899	const enum system_clock_source clk_source);
Kojto	111:4336505e4b1c	900
Kojto	111:4336505e4b1c	901	uint32_t system_clock_source_get_hz(
Kojto	111:4336505e4b1c	902	const enum system_clock_source clk_source);
Kojto	111:4336505e4b1c	903
Kojto	111:4336505e4b1c	904	/**
Kojto	111:4336505e4b1c	905	* @}
Kojto	111:4336505e4b1c	906	*/
Kojto	111:4336505e4b1c	907
Kojto	111:4336505e4b1c	908	/**
Kojto	111:4336505e4b1c	909	* \name Main Clock Management
Kojto	111:4336505e4b1c	910	* @{
Kojto	111:4336505e4b1c	911	*/
Kojto	111:4336505e4b1c	912
Kojto	111:4336505e4b1c	913	/**
Kojto	111:4336505e4b1c	914	* \brief Set main CPU clock divider.
Kojto	111:4336505e4b1c	915	*
Kojto	111:4336505e4b1c	916	* Sets the clock divider used on the main clock to provide the CPU clock.
Kojto	111:4336505e4b1c	917	*
Kojto	111:4336505e4b1c	918	* \param[in] divider CPU clock divider to set
Kojto	111:4336505e4b1c	919	*/
Kojto	111:4336505e4b1c	920	static inline void system_cpu_clock_set_divider(
Kojto	111:4336505e4b1c	921	const enum system_main_clock_div divider)
Kojto	111:4336505e4b1c	922	{
Kojto	111:4336505e4b1c	923	Assert(((uint32_t)divider & PM_CPUSEL_CPUDIV_Msk) == divider);
Kojto	111:4336505e4b1c	924	PM->CPUSEL.reg = (uint32_t)divider;
Kojto	111:4336505e4b1c	925	}
Kojto	111:4336505e4b1c	926
Kojto	111:4336505e4b1c	927	/**
Kojto	111:4336505e4b1c	928	* \brief Retrieves the current frequency of the CPU core.
Kojto	111:4336505e4b1c	929	*
Kojto	111:4336505e4b1c	930	* Retrieves the operating frequency of the CPU core, obtained from the main
Kojto	111:4336505e4b1c	931	* generic clock and the set CPU bus divider.
Kojto	111:4336505e4b1c	932	*
Kojto	111:4336505e4b1c	933	* \return Current CPU frequency in Hz.
Kojto	111:4336505e4b1c	934	*/
Kojto	111:4336505e4b1c	935	static inline uint32_t system_cpu_clock_get_hz(void)
Kojto	111:4336505e4b1c	936	{
Kojto	111:4336505e4b1c	937	return (system_gclk_gen_get_hz(GCLK_GENERATOR_0) >> PM->CPUSEL.reg);
Kojto	111:4336505e4b1c	938	}
Kojto	111:4336505e4b1c	939
Kojto	111:4336505e4b1c	940	/**
Kojto	111:4336505e4b1c	941	* \brief Set APBx clock divider.
Kojto	111:4336505e4b1c	942	*
Kojto	111:4336505e4b1c	943	* Set the clock divider used on the main clock to provide the clock for the
Kojto	111:4336505e4b1c	944	* given APBx bus.
Kojto	111:4336505e4b1c	945	*
Kojto	111:4336505e4b1c	946	* \param[in] divider APBx bus divider to set
Kojto	111:4336505e4b1c	947	* \param[in] bus APBx bus to set divider
Kojto	111:4336505e4b1c	948	*
Kojto	111:4336505e4b1c	949	* \returns Status of the clock division change operation.
Kojto	111:4336505e4b1c	950	*
Kojto	111:4336505e4b1c	951	* \retval STATUS_ERR_INVALID_ARG Invalid bus ID was given
Kojto	111:4336505e4b1c	952	* \retval STATUS_OK The APBx clock was set successfully
Kojto	111:4336505e4b1c	953	*/
Kojto	111:4336505e4b1c	954	static inline enum status_code system_apb_clock_set_divider(
Kojto	111:4336505e4b1c	955	const enum system_clock_apb_bus bus,
Kojto	111:4336505e4b1c	956	const enum system_main_clock_div divider)
Kojto	111:4336505e4b1c	957	{
Kojto	111:4336505e4b1c	958	switch (bus) {
Kojto	111:4336505e4b1c	959	case SYSTEM_CLOCK_APB_APBA:
Kojto	111:4336505e4b1c	960	PM->APBASEL.reg = (uint32_t)divider;
Kojto	111:4336505e4b1c	961	break;
Kojto	111:4336505e4b1c	962	case SYSTEM_CLOCK_APB_APBB:
Kojto	111:4336505e4b1c	963	PM->APBBSEL.reg = (uint32_t)divider;
Kojto	111:4336505e4b1c	964	break;
Kojto	111:4336505e4b1c	965	case SYSTEM_CLOCK_APB_APBC:
Kojto	111:4336505e4b1c	966	PM->APBCSEL.reg = (uint32_t)divider;
Kojto	111:4336505e4b1c	967	break;
Kojto	111:4336505e4b1c	968	default:
Kojto	111:4336505e4b1c	969	Assert(false);
Kojto	111:4336505e4b1c	970	return STATUS_ERR_INVALID_ARG;
Kojto	111:4336505e4b1c	971	}
Kojto	111:4336505e4b1c	972
Kojto	111:4336505e4b1c	973	return STATUS_OK;
Kojto	111:4336505e4b1c	974	}
Kojto	111:4336505e4b1c	975
Kojto	111:4336505e4b1c	976	/**
Kojto	111:4336505e4b1c	977	* \brief Retrieves the current frequency of a ABPx.
Kojto	111:4336505e4b1c	978	*
Kojto	111:4336505e4b1c	979	* Retrieves the operating frequency of an APBx bus, obtained from the main
Kojto	111:4336505e4b1c	980	* generic clock and the set APBx bus divider.
Kojto	111:4336505e4b1c	981	*
Kojto	111:4336505e4b1c	982	* \return Current APBx bus frequency in Hz.
Kojto	111:4336505e4b1c	983	*/
Kojto	111:4336505e4b1c	984	static inline uint32_t system_apb_clock_get_hz(
Kojto	111:4336505e4b1c	985	const enum system_clock_apb_bus bus)
Kojto	111:4336505e4b1c	986	{
Kojto	111:4336505e4b1c	987	uint16_t bus_divider = 0;
Kojto	111:4336505e4b1c	988
Kojto	111:4336505e4b1c	989	switch (bus) {
Kojto	111:4336505e4b1c	990	case SYSTEM_CLOCK_APB_APBA:
Kojto	111:4336505e4b1c	991	bus_divider = PM->APBASEL.reg;
Kojto	111:4336505e4b1c	992	break;
Kojto	111:4336505e4b1c	993	case SYSTEM_CLOCK_APB_APBB:
Kojto	111:4336505e4b1c	994	bus_divider = PM->APBBSEL.reg;
Kojto	111:4336505e4b1c	995	break;
Kojto	111:4336505e4b1c	996	case SYSTEM_CLOCK_APB_APBC:
Kojto	111:4336505e4b1c	997	bus_divider = PM->APBCSEL.reg;
Kojto	111:4336505e4b1c	998	break;
Kojto	111:4336505e4b1c	999	default:
Kojto	111:4336505e4b1c	1000	Assert(false);
Kojto	111:4336505e4b1c	1001	return 0;
Kojto	111:4336505e4b1c	1002	}
Kojto	111:4336505e4b1c	1003
Kojto	111:4336505e4b1c	1004	return (system_gclk_gen_get_hz(GCLK_GENERATOR_0) >> bus_divider);
Kojto	111:4336505e4b1c	1005	}
Kojto	111:4336505e4b1c	1006
Kojto	111:4336505e4b1c	1007
Kojto	111:4336505e4b1c	1008	/**
Kojto	111:4336505e4b1c	1009	* @}
Kojto	111:4336505e4b1c	1010	*/
Kojto	111:4336505e4b1c	1011
Kojto	111:4336505e4b1c	1012	/**
Kojto	111:4336505e4b1c	1013	* \name Bus Clock Masking
Kojto	111:4336505e4b1c	1014	* @{
Kojto	111:4336505e4b1c	1015	*/
Kojto	111:4336505e4b1c	1016
Kojto	111:4336505e4b1c	1017	/**
Kojto	111:4336505e4b1c	1018	* \brief Set bits in the clock mask for the AHB bus.
Kojto	111:4336505e4b1c	1019	*
Kojto	111:4336505e4b1c	1020	* This function will set bits in the clock mask for the AHB bus.
Kojto	111:4336505e4b1c	1021	* Any bits set to 1 will enable that clock, 0 bits in the mask
Kojto	111:4336505e4b1c	1022	* will be ignored.
Kojto	111:4336505e4b1c	1023	*
Kojto	111:4336505e4b1c	1024	* \param[in] ahb_mask AHB clock mask to enable
Kojto	111:4336505e4b1c	1025	*/
Kojto	111:4336505e4b1c	1026	static inline void system_ahb_clock_set_mask(
Kojto	111:4336505e4b1c	1027	const uint32_t ahb_mask)
Kojto	111:4336505e4b1c	1028	{
Kojto	111:4336505e4b1c	1029	PM->AHBMASK.reg \|= ahb_mask;
Kojto	111:4336505e4b1c	1030	}
Kojto	111:4336505e4b1c	1031
Kojto	111:4336505e4b1c	1032	/**
Kojto	111:4336505e4b1c	1033	* \brief Clear bits in the clock mask for the AHB bus.
Kojto	111:4336505e4b1c	1034	*
Kojto	111:4336505e4b1c	1035	* This function will clear bits in the clock mask for the AHB bus.
Kojto	111:4336505e4b1c	1036	* Any bits set to 1 will disable that clock, 0 bits in the mask
Kojto	111:4336505e4b1c	1037	* will be ignored.
Kojto	111:4336505e4b1c	1038	*
Kojto	111:4336505e4b1c	1039	* \param[in] ahb_mask AHB clock mask to disable
Kojto	111:4336505e4b1c	1040	*/
Kojto	111:4336505e4b1c	1041	static inline void system_ahb_clock_clear_mask(
Kojto	111:4336505e4b1c	1042	const uint32_t ahb_mask)
Kojto	111:4336505e4b1c	1043	{
Kojto	111:4336505e4b1c	1044	PM->AHBMASK.reg &= ~ahb_mask;
Kojto	111:4336505e4b1c	1045	}
Kojto	111:4336505e4b1c	1046
Kojto	111:4336505e4b1c	1047	/**
Kojto	111:4336505e4b1c	1048	* \brief Set bits in the clock mask for an APBx bus.
Kojto	111:4336505e4b1c	1049	*
Kojto	111:4336505e4b1c	1050	* This function will set bits in the clock mask for an APBx bus.
Kojto	111:4336505e4b1c	1051	* Any bits set to 1 will enable the corresponding module clock, zero bits in
Kojto	111:4336505e4b1c	1052	* the mask will be ignored.
Kojto	111:4336505e4b1c	1053	*
Kojto	111:4336505e4b1c	1054	* \param[in] mask APBx clock mask, a \c SYSTEM_CLOCK_APB_APBx constant from
Kojto	111:4336505e4b1c	1055	* the device header files
Kojto	111:4336505e4b1c	1056	* \param[in] bus Bus to set clock mask bits for, a mask of \c PM_APBxMASK_*
Kojto	111:4336505e4b1c	1057	* constants from the device header files
Kojto	111:4336505e4b1c	1058	*
Kojto	111:4336505e4b1c	1059	* \returns Status indicating the result of the clock mask change operation.
Kojto	111:4336505e4b1c	1060	*
Kojto	111:4336505e4b1c	1061	* \retval STATUS_ERR_INVALID_ARG Invalid bus given
Kojto	111:4336505e4b1c	1062	* \retval STATUS_OK The clock mask was set successfully
Kojto	111:4336505e4b1c	1063	*/
Kojto	111:4336505e4b1c	1064	static inline enum status_code system_apb_clock_set_mask(
Kojto	111:4336505e4b1c	1065	const enum system_clock_apb_bus bus,
Kojto	111:4336505e4b1c	1066	const uint32_t mask)
Kojto	111:4336505e4b1c	1067	{
Kojto	111:4336505e4b1c	1068	switch (bus) {
Kojto	111:4336505e4b1c	1069	case SYSTEM_CLOCK_APB_APBA:
Kojto	111:4336505e4b1c	1070	PM->APBAMASK.reg \|= mask;
Kojto	111:4336505e4b1c	1071	break;
Kojto	111:4336505e4b1c	1072
Kojto	111:4336505e4b1c	1073	case SYSTEM_CLOCK_APB_APBB:
Kojto	111:4336505e4b1c	1074	PM->APBBMASK.reg \|= mask;
Kojto	111:4336505e4b1c	1075	break;
Kojto	111:4336505e4b1c	1076
Kojto	111:4336505e4b1c	1077	case SYSTEM_CLOCK_APB_APBC:
Kojto	111:4336505e4b1c	1078	PM->APBCMASK.reg \|= mask;
Kojto	111:4336505e4b1c	1079	break;
Kojto	111:4336505e4b1c	1080
Kojto	111:4336505e4b1c	1081	default:
Kojto	111:4336505e4b1c	1082	Assert(false);
Kojto	111:4336505e4b1c	1083	return STATUS_ERR_INVALID_ARG;
Kojto	111:4336505e4b1c	1084
Kojto	111:4336505e4b1c	1085	}
Kojto	111:4336505e4b1c	1086
Kojto	111:4336505e4b1c	1087	return STATUS_OK;
Kojto	111:4336505e4b1c	1088	}
Kojto	111:4336505e4b1c	1089
Kojto	111:4336505e4b1c	1090	/**
Kojto	111:4336505e4b1c	1091	* \brief Clear bits in the clock mask for an APBx bus.
Kojto	111:4336505e4b1c	1092	*
Kojto	111:4336505e4b1c	1093	* This function will clear bits in the clock mask for an APBx bus.
Kojto	111:4336505e4b1c	1094	* Any bits set to 1 will disable the corresponding module clock, zero bits in
Kojto	111:4336505e4b1c	1095	* the mask will be ignored.
Kojto	111:4336505e4b1c	1096	*
Kojto	111:4336505e4b1c	1097	* \param[in] mask APBx clock mask, a \c SYSTEM_CLOCK_APB_APBx constant from
Kojto	111:4336505e4b1c	1098	* the device header files
Kojto	111:4336505e4b1c	1099	* \param[in] bus Bus to clear clock mask bits
Kojto	111:4336505e4b1c	1100	*
Kojto	111:4336505e4b1c	1101	* \returns Status indicating the result of the clock mask change operation.
Kojto	111:4336505e4b1c	1102	*
Kojto	111:4336505e4b1c	1103	* \retval STATUS_ERR_INVALID_ARG Invalid bus ID was given
Kojto	111:4336505e4b1c	1104	* \retval STATUS_OK The clock mask was changed successfully
Kojto	111:4336505e4b1c	1105	*/
Kojto	111:4336505e4b1c	1106	static inline enum status_code system_apb_clock_clear_mask(
Kojto	111:4336505e4b1c	1107	const enum system_clock_apb_bus bus,
Kojto	111:4336505e4b1c	1108	const uint32_t mask)
Kojto	111:4336505e4b1c	1109	{
Kojto	111:4336505e4b1c	1110	switch (bus) {
Kojto	111:4336505e4b1c	1111	case SYSTEM_CLOCK_APB_APBA:
Kojto	111:4336505e4b1c	1112	PM->APBAMASK.reg &= ~mask;
Kojto	111:4336505e4b1c	1113	break;
Kojto	111:4336505e4b1c	1114
Kojto	111:4336505e4b1c	1115	case SYSTEM_CLOCK_APB_APBB:
Kojto	111:4336505e4b1c	1116	PM->APBBMASK.reg &= ~mask;
Kojto	111:4336505e4b1c	1117	break;
Kojto	111:4336505e4b1c	1118
Kojto	111:4336505e4b1c	1119	case SYSTEM_CLOCK_APB_APBC:
Kojto	111:4336505e4b1c	1120	PM->APBCMASK.reg &= ~mask;
Kojto	111:4336505e4b1c	1121	break;
Kojto	111:4336505e4b1c	1122
Kojto	111:4336505e4b1c	1123	default:
Kojto	111:4336505e4b1c	1124	Assert(false);
Kojto	111:4336505e4b1c	1125	return STATUS_ERR_INVALID_ARG;
Kojto	111:4336505e4b1c	1126	}
Kojto	111:4336505e4b1c	1127
Kojto	111:4336505e4b1c	1128	return STATUS_OK;
Kojto	111:4336505e4b1c	1129	}
Kojto	111:4336505e4b1c	1130
Kojto	111:4336505e4b1c	1131	/**
Kojto	111:4336505e4b1c	1132	* @}
Kojto	111:4336505e4b1c	1133	*/
Kojto	111:4336505e4b1c	1134
Kojto	111:4336505e4b1c	1135	#ifdef FEATURE_SYSTEM_CLOCK_DPLL
Kojto	111:4336505e4b1c	1136	/**
Kojto	111:4336505e4b1c	1137	* \brief Reference clock source of the DPLL module.
Kojto	111:4336505e4b1c	1138	*/
Kojto	111:4336505e4b1c	1139	enum system_clock_source_dpll_reference_clock {
Kojto	111:4336505e4b1c	1140	/** Select XOSC32K as clock reference. */
Kojto	111:4336505e4b1c	1141	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K,
Kojto	111:4336505e4b1c	1142	/** Select XOSC as clock reference. */
Kojto	111:4336505e4b1c	1143	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC,
Kojto	111:4336505e4b1c	1144	/** Select GCLK as clock reference. */
Kojto	111:4336505e4b1c	1145	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK,
Kojto	111:4336505e4b1c	1146	};
Kojto	111:4336505e4b1c	1147
Kojto	111:4336505e4b1c	1148	/**
Kojto	111:4336505e4b1c	1149	* \brief Lock time-out value of the DPLL module.
Kojto	111:4336505e4b1c	1150	*/
Kojto	111:4336505e4b1c	1151	enum system_clock_source_dpll_lock_time {
Kojto	111:4336505e4b1c	1152	/** Set no time-out as default. */
Kojto	111:4336505e4b1c	1153	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT,
Kojto	111:4336505e4b1c	1154	/** Set time-out if no lock within 8ms. */
Kojto	111:4336505e4b1c	1155	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_8MS = 0x04,
Kojto	111:4336505e4b1c	1156	/** Set time-out if no lock within 9ms. */
Kojto	111:4336505e4b1c	1157	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_9MS,
Kojto	111:4336505e4b1c	1158	/** Set time-out if no lock within 10ms. */
Kojto	111:4336505e4b1c	1159	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_10MS,
Kojto	111:4336505e4b1c	1160	/** Set time-out if no lock within 11ms. */
Kojto	111:4336505e4b1c	1161	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_11MS,
Kojto	111:4336505e4b1c	1162	};
Kojto	111:4336505e4b1c	1163
Kojto	111:4336505e4b1c	1164	/**
Kojto	111:4336505e4b1c	1165	* \brief Filter type of the DPLL module.
Kojto	111:4336505e4b1c	1166	*/
Kojto	111:4336505e4b1c	1167	enum system_clock_source_dpll_filter {
Kojto	111:4336505e4b1c	1168	/** Default filter mode. */
Kojto	111:4336505e4b1c	1169	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT,
Kojto	111:4336505e4b1c	1170	/** Low bandwidth filter. */
Kojto	111:4336505e4b1c	1171	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_LOW_BANDWIDTH_FILTER,
Kojto	111:4336505e4b1c	1172	/** High bandwidth filter. */
Kojto	111:4336505e4b1c	1173	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_HIGH_BANDWIDTH_FILTER,
Kojto	111:4336505e4b1c	1174	/** High damping filter. */
Kojto	111:4336505e4b1c	1175	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_HIGH_DAMPING_FILTER,
Kojto	111:4336505e4b1c	1176	};
Kojto	111:4336505e4b1c	1177
Kojto	111:4336505e4b1c	1178	/**
Kojto	111:4336505e4b1c	1179	* \brief Configuration structure for DPLL.
Kojto	111:4336505e4b1c	1180	*
Kojto	111:4336505e4b1c	1181	* DPLL oscillator configuration structure.
Kojto	111:4336505e4b1c	1182	*/
Kojto	111:4336505e4b1c	1183	struct system_clock_source_dpll_config {
Kojto	111:4336505e4b1c	1184	/** Run On Demand. If this is set the DPLL won't run
Kojto	111:4336505e4b1c	1185	* until requested by a peripheral. */
Kojto	111:4336505e4b1c	1186	bool on_demand;
Kojto	111:4336505e4b1c	1187	/** Keep the DPLL enabled in standby sleep mode. */
Kojto	111:4336505e4b1c	1188	bool run_in_standby;
Kojto	111:4336505e4b1c	1189	/** Bypass lock signal. */
Kojto	111:4336505e4b1c	1190	bool lock_bypass;
Kojto	111:4336505e4b1c	1191	/** Wake up fast. If this is set DPLL output clock is enabled after
Kojto	111:4336505e4b1c	1192	* the startup time. */
Kojto	111:4336505e4b1c	1193	bool wake_up_fast;
Kojto	111:4336505e4b1c	1194	/** Enable low power mode. */
Kojto	111:4336505e4b1c	1195	bool low_power_enable;
Kojto	111:4336505e4b1c	1196
Kojto	111:4336505e4b1c	1197	/** Output frequency of the clock. */
Kojto	111:4336505e4b1c	1198	uint32_t output_frequency;
Kojto	111:4336505e4b1c	1199	/** Reference frequency of the clock. */
Kojto	111:4336505e4b1c	1200	uint32_t reference_frequency;
Kojto	111:4336505e4b1c	1201	/** Devider of reference clock. */
Kojto	111:4336505e4b1c	1202	uint16_t reference_divider;
Kojto	111:4336505e4b1c	1203
Kojto	111:4336505e4b1c	1204	/** Filter type of the DPLL module. */
Kojto	111:4336505e4b1c	1205	enum system_clock_source_dpll_filter filter;
Kojto	111:4336505e4b1c	1206	/** Lock time-out value of the DPLL module. */
Kojto	111:4336505e4b1c	1207	enum system_clock_source_dpll_lock_time lock_time;
Kojto	111:4336505e4b1c	1208	/** Reference clock source of the DPLL module. */
Kojto	111:4336505e4b1c	1209	enum system_clock_source_dpll_reference_clock reference_clock;
Kojto	111:4336505e4b1c	1210	};
Kojto	111:4336505e4b1c	1211
Kojto	111:4336505e4b1c	1212	/**
Kojto	111:4336505e4b1c	1213	* \name Internal DPLL Management
Kojto	111:4336505e4b1c	1214	* @{
Kojto	111:4336505e4b1c	1215	*/
Kojto	111:4336505e4b1c	1216
Kojto	111:4336505e4b1c	1217	/**
Kojto	111:4336505e4b1c	1218	* \brief Retrieve the default configuration for DPLL.
Kojto	111:4336505e4b1c	1219	*
Kojto	111:4336505e4b1c	1220	* Fills a configuration structure with the default configuration for a
Kojto	111:4336505e4b1c	1221	* DPLL oscillator module:
Kojto	111:4336505e4b1c	1222	* - Run only when requested by peripheral (on demand)
Kojto	111:4336505e4b1c	1223	* - Don't run in STANDBY sleep mode
Kojto	111:4336505e4b1c	1224	* - Lock bypass disabled
Kojto	111:4336505e4b1c	1225	* - Fast wake up disabled
Kojto	111:4336505e4b1c	1226	* - Low power mode disabled
Kojto	111:4336505e4b1c	1227	* - Output frequency is 48MHz
Kojto	111:4336505e4b1c	1228	* - Reference clock frequency is 32768Hz
Kojto	111:4336505e4b1c	1229	* - Not divide reference clock
Kojto	111:4336505e4b1c	1230	* - Select REF0 as reference clock
Kojto	111:4336505e4b1c	1231	* - Set lock time to default mode
Kojto	111:4336505e4b1c	1232	* - Use default filter
Kojto	111:4336505e4b1c	1233	*
Kojto	111:4336505e4b1c	1234	* \param[out] config Configuration structure to fill with default values
Kojto	111:4336505e4b1c	1235	*/
Kojto	111:4336505e4b1c	1236	static inline void system_clock_source_dpll_get_config_defaults(
Kojto	111:4336505e4b1c	1237	struct system_clock_source_dpll_config *const config)
Kojto	111:4336505e4b1c	1238	{
Kojto	111:4336505e4b1c	1239	config->on_demand = true;
Kojto	111:4336505e4b1c	1240	config->run_in_standby = false;
Kojto	111:4336505e4b1c	1241	config->lock_bypass = false;
Kojto	111:4336505e4b1c	1242	config->wake_up_fast = false;
Kojto	111:4336505e4b1c	1243	config->low_power_enable = false;
Kojto	111:4336505e4b1c	1244
Kojto	111:4336505e4b1c	1245	config->output_frequency = 48000000;
Kojto	111:4336505e4b1c	1246	config->reference_frequency = 32768;
Kojto	111:4336505e4b1c	1247	config->reference_divider = 1;
Kojto	111:4336505e4b1c	1248	config->reference_clock = SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K;
Kojto	111:4336505e4b1c	1249
Kojto	111:4336505e4b1c	1250	config->lock_time = SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT;
Kojto	111:4336505e4b1c	1251	config->filter = SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT;
Kojto	111:4336505e4b1c	1252	};
Kojto	111:4336505e4b1c	1253
Kojto	111:4336505e4b1c	1254	void system_clock_source_dpll_set_config(
Kojto	111:4336505e4b1c	1255	struct system_clock_source_dpll_config *const config);
Kojto	111:4336505e4b1c	1256
Kojto	111:4336505e4b1c	1257	/* @} */
Kojto	111:4336505e4b1c	1258	#endif
Kojto	111:4336505e4b1c	1259
Kojto	111:4336505e4b1c	1260	/**
Kojto	111:4336505e4b1c	1261	* \name System Clock Initialization
Kojto	111:4336505e4b1c	1262	* @{
Kojto	111:4336505e4b1c	1263	*/
Kojto	111:4336505e4b1c	1264
Kojto	111:4336505e4b1c	1265	void system_clock_init(void);
Kojto	111:4336505e4b1c	1266
Kojto	111:4336505e4b1c	1267	/**
Kojto	111:4336505e4b1c	1268	* @}
Kojto	111:4336505e4b1c	1269	*/
Kojto	111:4336505e4b1c	1270
Kojto	111:4336505e4b1c	1271	/**
Kojto	111:4336505e4b1c	1272	* \name System Flash Wait States
Kojto	111:4336505e4b1c	1273	* @{
Kojto	111:4336505e4b1c	1274	*/
Kojto	111:4336505e4b1c	1275
Kojto	111:4336505e4b1c	1276	/**
Kojto	111:4336505e4b1c	1277	* \brief Set flash controller wait states.
Kojto	111:4336505e4b1c	1278	*
Kojto	111:4336505e4b1c	1279	* Will set the number of wait states that are used by the onboard
Kojto	111:4336505e4b1c	1280	* flash memory. The number of wait states depend on both device
Kojto	111:4336505e4b1c	1281	* supply voltage and CPU speed. The required number of wait states
Kojto	111:4336505e4b1c	1282	* can be found in the electrical characteristics of the device.
Kojto	111:4336505e4b1c	1283	*
Kojto	111:4336505e4b1c	1284	* \param[in] wait_states Number of wait states to use for internal flash
Kojto	111:4336505e4b1c	1285	*/
Kojto	111:4336505e4b1c	1286	static inline void system_flash_set_waitstates(uint8_t wait_states)
Kojto	111:4336505e4b1c	1287	{
Kojto	111:4336505e4b1c	1288	Assert(NVMCTRL_CTRLB_RWS((uint32_t)wait_states) ==
Kojto	111:4336505e4b1c	1289	((uint32_t)wait_states << NVMCTRL_CTRLB_RWS_Pos));
Kojto	111:4336505e4b1c	1290
Kojto	111:4336505e4b1c	1291	NVMCTRL->CTRLB.bit.RWS = wait_states;
Kojto	111:4336505e4b1c	1292	}
Kojto	111:4336505e4b1c	1293	/**
Kojto	111:4336505e4b1c	1294	* @}
Kojto	111:4336505e4b1c	1295	*/
Kojto	111:4336505e4b1c	1296
Kojto	111:4336505e4b1c	1297	/**
Kojto	111:4336505e4b1c	1298	* @}
Kojto	111:4336505e4b1c	1299	*/
Kojto	111:4336505e4b1c	1300
Kojto	111:4336505e4b1c	1301	/**
Kojto	111:4336505e4b1c	1302	* \page asfdoc_sam0_system_clock_extra Extra Information for SYSTEM CLOCK Driver
Kojto	111:4336505e4b1c	1303	*
Kojto	111:4336505e4b1c	1304	* \section asfdoc_sam0_system_clock_extra_acronyms Acronyms
Kojto	111:4336505e4b1c	1305	* Below is a table listing the acronyms used in this module, along with their
Kojto	111:4336505e4b1c	1306	* intended meanings.
Kojto	111:4336505e4b1c	1307	*
Kojto	111:4336505e4b1c	1308	* <table>
Kojto	111:4336505e4b1c	1309	* <tr>
Kojto	111:4336505e4b1c	1310	* <th>Acronym</th>
Kojto	111:4336505e4b1c	1311	* <th>Description</th>
Kojto	111:4336505e4b1c	1312	* </tr>
Kojto	111:4336505e4b1c	1313	* <tr>
Kojto	111:4336505e4b1c	1314	* <td>DFLL</td>
Kojto	111:4336505e4b1c	1315	* <td>Digital Frequency Locked Loop</td>
Kojto	111:4336505e4b1c	1316	* </tr>
Kojto	111:4336505e4b1c	1317	* <tr>
Kojto	111:4336505e4b1c	1318	* <td>MUX</td>
Kojto	111:4336505e4b1c	1319	* <td>Multiplexer</td>
Kojto	111:4336505e4b1c	1320	* </tr>
Kojto	111:4336505e4b1c	1321	* <tr>
Kojto	111:4336505e4b1c	1322	* <td>OSC32K</td>
Kojto	111:4336505e4b1c	1323	* <td>Internal 32KHz Oscillator</td>
Kojto	111:4336505e4b1c	1324	* </tr>
Kojto	111:4336505e4b1c	1325	* <tr>
Kojto	111:4336505e4b1c	1326	* <td>OSC8M</td>
Kojto	111:4336505e4b1c	1327	* <td>Internal 8MHz Oscillator</td>
Kojto	111:4336505e4b1c	1328	* </tr>
Kojto	111:4336505e4b1c	1329	* <tr>
Kojto	111:4336505e4b1c	1330	* <td>PLL</td>
Kojto	111:4336505e4b1c	1331	* <td>Phase Locked Loop</td>
Kojto	111:4336505e4b1c	1332	* </tr>
Kojto	111:4336505e4b1c	1333	* <tr>
Kojto	111:4336505e4b1c	1334	* <td>OSC</td>
Kojto	111:4336505e4b1c	1335	* <td>Oscillator</td>
Kojto	111:4336505e4b1c	1336	* </tr>
Kojto	111:4336505e4b1c	1337	* <tr>
Kojto	111:4336505e4b1c	1338	* <td>XOSC</td>
Kojto	111:4336505e4b1c	1339	* <td>External Oscillator</td>
Kojto	111:4336505e4b1c	1340	* </tr>
Kojto	111:4336505e4b1c	1341	* <tr>
Kojto	111:4336505e4b1c	1342	* <td>XOSC32K</td>
Kojto	111:4336505e4b1c	1343	* <td>External 32KHz Oscillator</td>
Kojto	111:4336505e4b1c	1344	* </tr>
Kojto	111:4336505e4b1c	1345	* <tr>
Kojto	111:4336505e4b1c	1346	* <td>AHB</td>
Kojto	111:4336505e4b1c	1347	* <td>Advanced High-performance Bus</td>
Kojto	111:4336505e4b1c	1348	* </tr>
Kojto	111:4336505e4b1c	1349	* <tr>
Kojto	111:4336505e4b1c	1350	* <td>APB</td>
Kojto	111:4336505e4b1c	1351	* <td>Advanced Peripheral Bus</td>
Kojto	111:4336505e4b1c	1352	* </tr>
Kojto	111:4336505e4b1c	1353	* <tr>
Kojto	111:4336505e4b1c	1354	* <td>DPLL</td>
Kojto	111:4336505e4b1c	1355	* <td>Digital Phase Locked Loop</td>
Kojto	111:4336505e4b1c	1356	* </tr>
Kojto	111:4336505e4b1c	1357	* </table>
Kojto	111:4336505e4b1c	1358	*
Kojto	111:4336505e4b1c	1359	*
Kojto	111:4336505e4b1c	1360	* \section asfdoc_sam0_system_clock_extra_dependencies Dependencies
Kojto	111:4336505e4b1c	1361	* This driver has the following dependencies:
Kojto	111:4336505e4b1c	1362	*
Kojto	111:4336505e4b1c	1363	* - None
Kojto	111:4336505e4b1c	1364	*
Kojto	111:4336505e4b1c	1365	*
Kojto	111:4336505e4b1c	1366	* \section asfdoc_sam0_system_clock_extra_errata Errata
Kojto	111:4336505e4b1c	1367	*
Kojto	111:4336505e4b1c	1368	* - This driver implements experimental workaround for errata 9905
Kojto	111:4336505e4b1c	1369	*
Kojto	111:4336505e4b1c	1370	* "The DFLL clock must be requested before being configured otherwise a
Kojto	111:4336505e4b1c	1371	* write access to a DFLL register can freeze the device."
Kojto	111:4336505e4b1c	1372	* This driver will enable and configure the DFLL before the ONDEMAND bit is set.
Kojto	111:4336505e4b1c	1373	*
Kojto	111:4336505e4b1c	1374	*
Kojto	111:4336505e4b1c	1375	* \section asfdoc_sam0_system_clock_extra_history Module History
Kojto	111:4336505e4b1c	1376	* An overview of the module history is presented in the table below, with
Kojto	111:4336505e4b1c	1377	* details on the enhancements and fixes made to the module since its first
Kojto	111:4336505e4b1c	1378	* release. The current version of this corresponds to the newest version in
Kojto	111:4336505e4b1c	1379	* the table.
Kojto	111:4336505e4b1c	1380	*
Kojto	111:4336505e4b1c	1381	* <table>
Kojto	111:4336505e4b1c	1382	* <tr>
Kojto	111:4336505e4b1c	1383	* <th>Changelog</th>
Kojto	111:4336505e4b1c	1384	* </tr>
Kojto	111:4336505e4b1c	1385	* <tr>
Kojto	111:4336505e4b1c	1386	* <td>
Kojto	111:4336505e4b1c	1387	* \li Corrected OSC32K startup time definitions
Kojto	111:4336505e4b1c	1388	* \li Support locking of OSC32K and XOSC32K config register (default: false)
Kojto	111:4336505e4b1c	1389	* \li Added DPLL support, functions added:
Kojto	111:4336505e4b1c	1390	* \c system_clock_source_dpll_get_config_defaults() and
Kojto	111:4336505e4b1c	1391	* \c system_clock_source_dpll_set_config()
Kojto	111:4336505e4b1c	1392	* \li Moved gclk channel locking feature out of the config struct
Kojto	111:4336505e4b1c	1393	* functions added:
Kojto	111:4336505e4b1c	1394	* \c system_gclk_chan_lock(),
Kojto	111:4336505e4b1c	1395	* \c system_gclk_chan_is_locked()
Kojto	111:4336505e4b1c	1396	* \c system_gclk_chan_is_enabled() and
Kojto	111:4336505e4b1c	1397	* \c system_gclk_gen_is_enabled()
Kojto	111:4336505e4b1c	1398	* </td>
Kojto	111:4336505e4b1c	1399	* </tr>
Kojto	111:4336505e4b1c	1400	* <tr>
Kojto	111:4336505e4b1c	1401	* <td>Fixed \c system_gclk_chan_disable() deadlocking if a channel is enabled
Kojto	111:4336505e4b1c	1402	* and configured to a failed/not running clock generator</td>
Kojto	111:4336505e4b1c	1403	* </tr>
Kojto	111:4336505e4b1c	1404	* <tr>
Kojto	111:4336505e4b1c	1405	* <td>
Kojto	111:4336505e4b1c	1406	* \li Changed default value for CONF_CLOCK_DFLL_ON_DEMAND from \c true to \c false
Kojto	111:4336505e4b1c	1407	* \li Fixed system_flash_set_waitstates() failing with an assertion
Kojto	111:4336505e4b1c	1408	* if an odd number of wait states provided
Kojto	111:4336505e4b1c	1409	* </td>
Kojto	111:4336505e4b1c	1410	* </tr>
Kojto	111:4336505e4b1c	1411	* <tr>
Kojto	111:4336505e4b1c	1412	* <td>
Kojto	111:4336505e4b1c	1413	* \li Updated dfll configuration function to implement workaround for
Kojto	111:4336505e4b1c	1414	* errata 9905 in the DFLL module
Kojto	111:4336505e4b1c	1415	* \li Updated \c system_clock_init() to reset interrupt flags before
Kojto	111:4336505e4b1c	1416	* they are used
Kojto	111:4336505e4b1c	1417	* \li Fixed \c system_clock_source_get_hz() to return correcy DFLL
Kojto	111:4336505e4b1c	1418	* frequency number
Kojto	111:4336505e4b1c	1419	* </td>
Kojto	111:4336505e4b1c	1420	* </tr>
Kojto	111:4336505e4b1c	1421	* <tr>
Kojto	111:4336505e4b1c	1422	* <td>\li Fixed \c system_clock_source_is_ready not returning the correct
Kojto	111:4336505e4b1c	1423	* state for \c SYSTEM_CLOCK_SOURCE_OSC8M
Kojto	111:4336505e4b1c	1424	* \li Renamed the various \c system_clock_source_*_get_default_config()
Kojto	111:4336505e4b1c	1425	* functions to \c system_clock_source_*_get_config_defaults() to
Kojto	111:4336505e4b1c	1426	* match the remainder of ASF
Kojto	111:4336505e4b1c	1427	* \li Added OSC8M calibration constant loading from the device signature
Kojto	111:4336505e4b1c	1428	* row when the oscillator is initialized
Kojto	111:4336505e4b1c	1429	* \li Updated default configuration of the XOSC32 to disable Automatic
Kojto	111:4336505e4b1c	1430	* Gain Control due to silicon errata
Kojto	111:4336505e4b1c	1431	* </td>
Kojto	111:4336505e4b1c	1432	* </tr>
Kojto	111:4336505e4b1c	1433	* <tr>
Kojto	111:4336505e4b1c	1434	* <td>Initial Release</td>
Kojto	111:4336505e4b1c	1435	* </tr>
Kojto	111:4336505e4b1c	1436	* </table>
Kojto	111:4336505e4b1c	1437	*/
Kojto	111:4336505e4b1c	1438
Kojto	111:4336505e4b1c	1439	/**
Kojto	111:4336505e4b1c	1440	* \page asfdoc_sam0_system_clock_exqsg Examples for System Clock Driver
Kojto	111:4336505e4b1c	1441	*
Kojto	111:4336505e4b1c	1442	* This is a list of the available Quick Start guides (QSGs) and example
Kojto	111:4336505e4b1c	1443	* applications for \ref asfdoc_sam0_system_clock_group. QSGs are simple
Kojto	111:4336505e4b1c	1444	* examples with step-by-step instructions to configure and use this driver in
Kojto	111:4336505e4b1c	1445	* a selection of use cases. Note that QSGs can be compiled as a standalone
Kojto	111:4336505e4b1c	1446	* application or be added to the user application.
Kojto	111:4336505e4b1c	1447	*
Kojto	111:4336505e4b1c	1448	* - \subpage asfdoc_sam0_system_clock_basic_use_case
Kojto	111:4336505e4b1c	1449	* - \subpage asfdoc_sam0_system_gclk_basic_use_case
Kojto	111:4336505e4b1c	1450	*
Kojto	111:4336505e4b1c	1451	* \page asfdoc_sam0_system_clock_document_revision_history Document Revision History
Kojto	111:4336505e4b1c	1452	*
Kojto	111:4336505e4b1c	1453	* <table>
Kojto	111:4336505e4b1c	1454	* <tr>
Kojto	111:4336505e4b1c	1455	* <th>Doc. Rev.</td>
Kojto	111:4336505e4b1c	1456	* <th>Date</td>
Kojto	111:4336505e4b1c	1457	* <th>Comments</td>
Kojto	111:4336505e4b1c	1458	* </tr>
Kojto	111:4336505e4b1c	1459	* <tr>
Kojto	111:4336505e4b1c	1460	* <td>E</td>
Kojto	111:4336505e4b1c	1461	* <td>04/2015</td>
Kojto	111:4336505e4b1c	1462	* <td>Added support for SAMDAx.</td>
Kojto	111:4336505e4b1c	1463	* </tr>
Kojto	111:4336505e4b1c	1464	* <tr>
Kojto	111:4336505e4b1c	1465	* <td>D</td>
Kojto	111:4336505e4b1c	1466	* <td>12/2014</td>
Kojto	111:4336505e4b1c	1467	* <td>Added support for SAMR21 and SAMD10/D11.</td>
Kojto	111:4336505e4b1c	1468	* </tr>
Kojto	111:4336505e4b1c	1469	* <tr>
Kojto	111:4336505e4b1c	1470	* <td>C</td>
Kojto	111:4336505e4b1c	1471	* <td>01/2014</td>
Kojto	111:4336505e4b1c	1472	* <td>Added support for SAMD21.</td>
Kojto	111:4336505e4b1c	1473	* </tr>
Kojto	111:4336505e4b1c	1474	* <tr>
Kojto	111:4336505e4b1c	1475	* <td>B</td>
Kojto	111:4336505e4b1c	1476	* <td>06/2013</td>
Kojto	111:4336505e4b1c	1477	* <td>Corrected documentation typos. Fixed missing steps in the Basic
Kojto	111:4336505e4b1c	1478	* Use Case Quick Start Guide.</td>
Kojto	111:4336505e4b1c	1479	* </tr>
Kojto	111:4336505e4b1c	1480	* <tr>
Kojto	111:4336505e4b1c	1481	* <td>A</td>
Kojto	111:4336505e4b1c	1482	* <td>06/2013</td>
Kojto	111:4336505e4b1c	1483	* <td>Initial release</td>
Kojto	111:4336505e4b1c	1484	* </tr>
Kojto	111:4336505e4b1c	1485	* </table>
Kojto	111:4336505e4b1c	1486	*/
Kojto	111:4336505e4b1c	1487
Kojto	111:4336505e4b1c	1488	#ifdef __cplusplus
Kojto	111:4336505e4b1c	1489	}
Kojto	111:4336505e4b1c	1490	#endif
Kojto	111:4336505e4b1c	1491
Kojto	111:4336505e4b1c	1492	#endif /* SYSTEM_CLOCK_FEATURE_H_INCLUDED */