mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_RZ_A1H/TOOLCHAIN_GCC_ARM/scif_iobitmask.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_RZ_A1H/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/inc/iobitmasks/scif_iobitmask.h@161:aa5281ff4a02
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 161:aa5281ff4a02 | 1 | /******************************************************************************* |
| AnnaBridge | 161:aa5281ff4a02 | 2 | * DISCLAIMER |
| AnnaBridge | 161:aa5281ff4a02 | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
| AnnaBridge | 161:aa5281ff4a02 | 4 | * intended for use with Renesas products. No other uses are authorized. This |
| AnnaBridge | 161:aa5281ff4a02 | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
| AnnaBridge | 161:aa5281ff4a02 | 6 | * all applicable laws, including copyright laws. |
| AnnaBridge | 161:aa5281ff4a02 | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
| AnnaBridge | 161:aa5281ff4a02 | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
| AnnaBridge | 161:aa5281ff4a02 | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
| AnnaBridge | 161:aa5281ff4a02 | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
| AnnaBridge | 161:aa5281ff4a02 | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
| AnnaBridge | 161:aa5281ff4a02 | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
| AnnaBridge | 161:aa5281ff4a02 | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
| AnnaBridge | 161:aa5281ff4a02 | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
| AnnaBridge | 161:aa5281ff4a02 | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
| AnnaBridge | 161:aa5281ff4a02 | 16 | * Renesas reserves the right, without notice, to make changes to this software |
| AnnaBridge | 161:aa5281ff4a02 | 17 | * and to discontinue the availability of this software. By using this software, |
| AnnaBridge | 161:aa5281ff4a02 | 18 | * you agree to the additional terms and conditions found by accessing the |
| AnnaBridge | 161:aa5281ff4a02 | 19 | * following link: |
| AnnaBridge | 161:aa5281ff4a02 | 20 | * http://www.renesas.com/disclaimer |
| AnnaBridge | 161:aa5281ff4a02 | 21 | * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. |
| AnnaBridge | 161:aa5281ff4a02 | 22 | *******************************************************************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 23 | /******************************************************************************* |
| AnnaBridge | 161:aa5281ff4a02 | 24 | * File Name : scif_iobitmask.h |
| AnnaBridge | 161:aa5281ff4a02 | 25 | * $Rev: 1115 $ |
| AnnaBridge | 161:aa5281ff4a02 | 26 | * $Date:: 2014-07-09 15:35:02 +0900#$ |
| AnnaBridge | 161:aa5281ff4a02 | 27 | * Description : SCIF register define header |
| AnnaBridge | 161:aa5281ff4a02 | 28 | *******************************************************************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 29 | #ifndef SCIF_IOBITMASK_H |
| AnnaBridge | 161:aa5281ff4a02 | 30 | #define SCIF_IOBITMASK_H |
| AnnaBridge | 161:aa5281ff4a02 | 31 | |
| AnnaBridge | 161:aa5281ff4a02 | 32 | |
| AnnaBridge | 161:aa5281ff4a02 | 33 | /* ==== Mask values for IO registers ==== */ |
| AnnaBridge | 161:aa5281ff4a02 | 34 | /* ---- SCIF0 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 35 | #define SCIF0_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 36 | #define SCIF0_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 37 | #define SCIF0_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 38 | #define SCIF0_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 39 | #define SCIF0_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 40 | #define SCIF0_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 41 | |
| AnnaBridge | 161:aa5281ff4a02 | 42 | #define SCIF0_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 43 | |
| AnnaBridge | 161:aa5281ff4a02 | 44 | #define SCIF0_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 45 | #define SCIF0_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 46 | #define SCIF0_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 47 | #define SCIF0_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 48 | #define SCIF0_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 49 | #define SCIF0_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 50 | |
| AnnaBridge | 161:aa5281ff4a02 | 51 | #define SCIF0_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 52 | |
| AnnaBridge | 161:aa5281ff4a02 | 53 | #define SCIF0_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 54 | #define SCIF0_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 55 | #define SCIF0_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 56 | #define SCIF0_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 57 | #define SCIF0_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 58 | #define SCIF0_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 59 | #define SCIF0_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 60 | #define SCIF0_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 61 | #define SCIF0_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 62 | #define SCIF0_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 63 | |
| AnnaBridge | 161:aa5281ff4a02 | 64 | #define SCIF0_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 65 | |
| AnnaBridge | 161:aa5281ff4a02 | 66 | #define SCIF0_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 67 | #define SCIF0_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 68 | #define SCIF0_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 69 | #define SCIF0_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 70 | #define SCIF0_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 71 | #define SCIF0_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 72 | #define SCIF0_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 73 | |
| AnnaBridge | 161:aa5281ff4a02 | 74 | #define SCIF0_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 75 | #define SCIF0_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 76 | |
| AnnaBridge | 161:aa5281ff4a02 | 77 | #define SCIF0_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 78 | #define SCIF0_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 79 | #define SCIF0_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 80 | #define SCIF0_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 81 | #define SCIF0_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 82 | #define SCIF0_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 83 | #define SCIF0_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 84 | #define SCIF0_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 85 | |
| AnnaBridge | 161:aa5281ff4a02 | 86 | #define SCIF0_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 87 | |
| AnnaBridge | 161:aa5281ff4a02 | 88 | #define SCIF0_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 89 | #define SCIF0_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 90 | |
| AnnaBridge | 161:aa5281ff4a02 | 91 | /* ---- SCIF1 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 92 | #define SCIF1_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 93 | #define SCIF1_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 94 | #define SCIF1_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 95 | #define SCIF1_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 96 | #define SCIF1_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 97 | #define SCIF1_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 98 | |
| AnnaBridge | 161:aa5281ff4a02 | 99 | #define SCIF1_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 100 | |
| AnnaBridge | 161:aa5281ff4a02 | 101 | #define SCIF1_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 102 | #define SCIF1_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 103 | #define SCIF1_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 104 | #define SCIF1_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 105 | #define SCIF1_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 106 | #define SCIF1_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 107 | |
| AnnaBridge | 161:aa5281ff4a02 | 108 | #define SCIF1_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 109 | |
| AnnaBridge | 161:aa5281ff4a02 | 110 | #define SCIF1_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 111 | #define SCIF1_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 112 | #define SCIF1_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 113 | #define SCIF1_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 114 | #define SCIF1_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 115 | #define SCIF1_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 116 | #define SCIF1_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 117 | #define SCIF1_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 118 | #define SCIF1_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 119 | #define SCIF1_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 120 | |
| AnnaBridge | 161:aa5281ff4a02 | 121 | #define SCIF1_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 122 | |
| AnnaBridge | 161:aa5281ff4a02 | 123 | #define SCIF1_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 124 | #define SCIF1_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 125 | #define SCIF1_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 126 | #define SCIF1_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 127 | #define SCIF1_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 128 | #define SCIF1_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 129 | #define SCIF1_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 130 | |
| AnnaBridge | 161:aa5281ff4a02 | 131 | #define SCIF1_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 132 | #define SCIF1_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 133 | |
| AnnaBridge | 161:aa5281ff4a02 | 134 | #define SCIF1_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 135 | #define SCIF1_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 136 | #define SCIF1_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 137 | #define SCIF1_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 138 | #define SCIF1_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 139 | #define SCIF1_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 140 | #define SCIF1_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 141 | #define SCIF1_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 142 | |
| AnnaBridge | 161:aa5281ff4a02 | 143 | #define SCIF1_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 144 | |
| AnnaBridge | 161:aa5281ff4a02 | 145 | #define SCIF1_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 146 | #define SCIF1_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 147 | |
| AnnaBridge | 161:aa5281ff4a02 | 148 | /* ---- SCIF2 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 149 | #define SCIF2_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 150 | #define SCIF2_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 151 | #define SCIF2_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 152 | #define SCIF2_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 153 | #define SCIF2_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 154 | #define SCIF2_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 155 | |
| AnnaBridge | 161:aa5281ff4a02 | 156 | #define SCIF2_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 157 | |
| AnnaBridge | 161:aa5281ff4a02 | 158 | #define SCIF2_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 159 | #define SCIF2_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 160 | #define SCIF2_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 161 | #define SCIF2_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 162 | #define SCIF2_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 163 | #define SCIF2_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 164 | |
| AnnaBridge | 161:aa5281ff4a02 | 165 | #define SCIF2_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 166 | |
| AnnaBridge | 161:aa5281ff4a02 | 167 | #define SCIF2_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 168 | #define SCIF2_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 169 | #define SCIF2_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 170 | #define SCIF2_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 171 | #define SCIF2_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 172 | #define SCIF2_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 173 | #define SCIF2_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 174 | #define SCIF2_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 175 | #define SCIF2_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 176 | #define SCIF2_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 177 | |
| AnnaBridge | 161:aa5281ff4a02 | 178 | #define SCIF2_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 179 | |
| AnnaBridge | 161:aa5281ff4a02 | 180 | #define SCIF2_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 181 | #define SCIF2_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 182 | #define SCIF2_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 183 | #define SCIF2_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 184 | #define SCIF2_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 185 | #define SCIF2_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 186 | #define SCIF2_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 187 | |
| AnnaBridge | 161:aa5281ff4a02 | 188 | #define SCIF2_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 189 | #define SCIF2_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 190 | |
| AnnaBridge | 161:aa5281ff4a02 | 191 | #define SCIF2_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 192 | #define SCIF2_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 193 | #define SCIF2_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 194 | #define SCIF2_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 195 | #define SCIF2_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 196 | #define SCIF2_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 197 | #define SCIF2_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 198 | #define SCIF2_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 199 | |
| AnnaBridge | 161:aa5281ff4a02 | 200 | #define SCIF2_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 201 | |
| AnnaBridge | 161:aa5281ff4a02 | 202 | #define SCIF2_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 203 | #define SCIF2_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 204 | |
| AnnaBridge | 161:aa5281ff4a02 | 205 | /* ---- SCIF3 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 206 | #define SCIF3_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 207 | #define SCIF3_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 208 | #define SCIF3_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 209 | #define SCIF3_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 210 | #define SCIF3_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 211 | #define SCIF3_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 212 | |
| AnnaBridge | 161:aa5281ff4a02 | 213 | #define SCIF3_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 214 | |
| AnnaBridge | 161:aa5281ff4a02 | 215 | #define SCIF3_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 216 | #define SCIF3_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 217 | #define SCIF3_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 218 | #define SCIF3_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 219 | #define SCIF3_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 220 | #define SCIF3_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 221 | |
| AnnaBridge | 161:aa5281ff4a02 | 222 | #define SCIF3_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 223 | |
| AnnaBridge | 161:aa5281ff4a02 | 224 | #define SCIF3_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 225 | #define SCIF3_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 226 | #define SCIF3_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 227 | #define SCIF3_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 228 | #define SCIF3_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 229 | #define SCIF3_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 230 | #define SCIF3_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 231 | #define SCIF3_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 232 | #define SCIF3_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 233 | #define SCIF3_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 234 | |
| AnnaBridge | 161:aa5281ff4a02 | 235 | #define SCIF3_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 236 | |
| AnnaBridge | 161:aa5281ff4a02 | 237 | #define SCIF3_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 238 | #define SCIF3_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 239 | #define SCIF3_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 240 | #define SCIF3_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 241 | #define SCIF3_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 242 | #define SCIF3_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 243 | #define SCIF3_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 244 | |
| AnnaBridge | 161:aa5281ff4a02 | 245 | #define SCIF3_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 246 | #define SCIF3_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 247 | |
| AnnaBridge | 161:aa5281ff4a02 | 248 | #define SCIF3_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 249 | #define SCIF3_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 250 | #define SCIF3_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 251 | #define SCIF3_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 252 | #define SCIF3_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 253 | #define SCIF3_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 254 | #define SCIF3_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 255 | #define SCIF3_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 256 | |
| AnnaBridge | 161:aa5281ff4a02 | 257 | #define SCIF3_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 258 | |
| AnnaBridge | 161:aa5281ff4a02 | 259 | #define SCIF3_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 260 | #define SCIF3_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 261 | |
| AnnaBridge | 161:aa5281ff4a02 | 262 | /* ---- SCIF4 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 263 | #define SCIF4_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 264 | #define SCIF4_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 265 | #define SCIF4_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 266 | #define SCIF4_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 267 | #define SCIF4_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 268 | #define SCIF4_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 269 | |
| AnnaBridge | 161:aa5281ff4a02 | 270 | #define SCIF4_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 271 | |
| AnnaBridge | 161:aa5281ff4a02 | 272 | #define SCIF4_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 273 | #define SCIF4_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 274 | #define SCIF4_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 275 | #define SCIF4_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 276 | #define SCIF4_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 277 | #define SCIF4_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 278 | |
| AnnaBridge | 161:aa5281ff4a02 | 279 | #define SCIF4_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 280 | |
| AnnaBridge | 161:aa5281ff4a02 | 281 | #define SCIF4_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 282 | #define SCIF4_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 283 | #define SCIF4_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 284 | #define SCIF4_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 285 | #define SCIF4_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 286 | #define SCIF4_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 287 | #define SCIF4_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 288 | #define SCIF4_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 289 | #define SCIF4_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 290 | #define SCIF4_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 291 | |
| AnnaBridge | 161:aa5281ff4a02 | 292 | #define SCIF4_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 293 | |
| AnnaBridge | 161:aa5281ff4a02 | 294 | #define SCIF4_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 295 | #define SCIF4_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 296 | #define SCIF4_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 297 | #define SCIF4_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 298 | #define SCIF4_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 299 | #define SCIF4_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 300 | #define SCIF4_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 301 | |
| AnnaBridge | 161:aa5281ff4a02 | 302 | #define SCIF4_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 303 | #define SCIF4_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 304 | |
| AnnaBridge | 161:aa5281ff4a02 | 305 | #define SCIF4_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 306 | #define SCIF4_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 307 | #define SCIF4_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 308 | #define SCIF4_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 309 | #define SCIF4_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 310 | #define SCIF4_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 311 | #define SCIF4_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 312 | #define SCIF4_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 313 | |
| AnnaBridge | 161:aa5281ff4a02 | 314 | #define SCIF4_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 315 | |
| AnnaBridge | 161:aa5281ff4a02 | 316 | #define SCIF4_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 317 | #define SCIF4_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 318 | |
| AnnaBridge | 161:aa5281ff4a02 | 319 | /* ---- SCIF5 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 320 | #define SCIF5_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 321 | #define SCIF5_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 322 | #define SCIF5_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 323 | #define SCIF5_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 324 | #define SCIF5_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 325 | #define SCIF5_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 326 | |
| AnnaBridge | 161:aa5281ff4a02 | 327 | #define SCIF5_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 328 | |
| AnnaBridge | 161:aa5281ff4a02 | 329 | #define SCIF5_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 330 | #define SCIF5_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 331 | #define SCIF5_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 332 | #define SCIF5_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 333 | #define SCIF5_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 334 | #define SCIF5_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 335 | |
| AnnaBridge | 161:aa5281ff4a02 | 336 | #define SCIF5_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 337 | |
| AnnaBridge | 161:aa5281ff4a02 | 338 | #define SCIF5_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 339 | #define SCIF5_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 340 | #define SCIF5_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 341 | #define SCIF5_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 342 | #define SCIF5_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 343 | #define SCIF5_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 344 | #define SCIF5_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 345 | #define SCIF5_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 346 | #define SCIF5_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 347 | #define SCIF5_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 348 | |
| AnnaBridge | 161:aa5281ff4a02 | 349 | #define SCIF5_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 350 | |
| AnnaBridge | 161:aa5281ff4a02 | 351 | #define SCIF5_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 352 | #define SCIF5_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 353 | #define SCIF5_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 354 | #define SCIF5_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 355 | #define SCIF5_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 356 | #define SCIF5_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 357 | #define SCIF5_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 358 | |
| AnnaBridge | 161:aa5281ff4a02 | 359 | #define SCIF5_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 360 | #define SCIF5_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 361 | |
| AnnaBridge | 161:aa5281ff4a02 | 362 | #define SCIF5_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 363 | #define SCIF5_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 364 | #define SCIF5_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 365 | #define SCIF5_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 366 | #define SCIF5_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 367 | #define SCIF5_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 368 | #define SCIF5_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 369 | #define SCIF5_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 370 | |
| AnnaBridge | 161:aa5281ff4a02 | 371 | #define SCIF5_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 372 | |
| AnnaBridge | 161:aa5281ff4a02 | 373 | #define SCIF5_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 374 | #define SCIF5_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 375 | |
| AnnaBridge | 161:aa5281ff4a02 | 376 | /* ---- SCIF6 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 377 | #define SCIF6_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 378 | #define SCIF6_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 379 | #define SCIF6_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 380 | #define SCIF6_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 381 | #define SCIF6_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 382 | #define SCIF6_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 383 | |
| AnnaBridge | 161:aa5281ff4a02 | 384 | #define SCIF6_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 385 | |
| AnnaBridge | 161:aa5281ff4a02 | 386 | #define SCIF6_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 387 | #define SCIF6_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 388 | #define SCIF6_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 389 | #define SCIF6_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 390 | #define SCIF6_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 391 | #define SCIF6_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 392 | |
| AnnaBridge | 161:aa5281ff4a02 | 393 | #define SCIF6_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 394 | |
| AnnaBridge | 161:aa5281ff4a02 | 395 | #define SCIF6_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 396 | #define SCIF6_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 397 | #define SCIF6_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 398 | #define SCIF6_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 399 | #define SCIF6_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 400 | #define SCIF6_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 401 | #define SCIF6_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 402 | #define SCIF6_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 403 | #define SCIF6_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 404 | #define SCIF6_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 405 | |
| AnnaBridge | 161:aa5281ff4a02 | 406 | #define SCIF6_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 407 | |
| AnnaBridge | 161:aa5281ff4a02 | 408 | #define SCIF6_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 409 | #define SCIF6_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 410 | #define SCIF6_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 411 | #define SCIF6_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 412 | #define SCIF6_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 413 | #define SCIF6_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 414 | #define SCIF6_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 415 | |
| AnnaBridge | 161:aa5281ff4a02 | 416 | #define SCIF6_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 417 | #define SCIF6_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 418 | |
| AnnaBridge | 161:aa5281ff4a02 | 419 | #define SCIF6_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 420 | #define SCIF6_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 421 | #define SCIF6_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 422 | #define SCIF6_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 423 | #define SCIF6_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 424 | #define SCIF6_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 425 | #define SCIF6_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 426 | #define SCIF6_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 427 | |
| AnnaBridge | 161:aa5281ff4a02 | 428 | #define SCIF6_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 429 | |
| AnnaBridge | 161:aa5281ff4a02 | 430 | #define SCIF6_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 431 | #define SCIF6_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 432 | |
| AnnaBridge | 161:aa5281ff4a02 | 433 | /* ---- SCIF7 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 434 | #define SCIF7_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 435 | #define SCIF7_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 436 | #define SCIF7_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 437 | #define SCIF7_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 438 | #define SCIF7_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 439 | #define SCIF7_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 440 | |
| AnnaBridge | 161:aa5281ff4a02 | 441 | #define SCIF7_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 442 | |
| AnnaBridge | 161:aa5281ff4a02 | 443 | #define SCIF7_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 444 | #define SCIF7_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 445 | #define SCIF7_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 446 | #define SCIF7_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 447 | #define SCIF7_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 448 | #define SCIF7_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 449 | |
| AnnaBridge | 161:aa5281ff4a02 | 450 | #define SCIF7_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 451 | |
| AnnaBridge | 161:aa5281ff4a02 | 452 | #define SCIF7_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 453 | #define SCIF7_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 454 | #define SCIF7_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 455 | #define SCIF7_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 456 | #define SCIF7_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 457 | #define SCIF7_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 458 | #define SCIF7_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 459 | #define SCIF7_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 460 | #define SCIF7_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 461 | #define SCIF7_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 462 | |
| AnnaBridge | 161:aa5281ff4a02 | 463 | #define SCIF7_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 464 | |
| AnnaBridge | 161:aa5281ff4a02 | 465 | #define SCIF7_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 466 | #define SCIF7_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 467 | #define SCIF7_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 468 | #define SCIF7_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 469 | #define SCIF7_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 470 | #define SCIF7_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 471 | #define SCIF7_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 472 | |
| AnnaBridge | 161:aa5281ff4a02 | 473 | #define SCIF7_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 474 | #define SCIF7_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 475 | |
| AnnaBridge | 161:aa5281ff4a02 | 476 | #define SCIF7_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 477 | #define SCIF7_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 478 | #define SCIF7_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 479 | #define SCIF7_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 480 | #define SCIF7_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 481 | #define SCIF7_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 482 | #define SCIF7_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 483 | #define SCIF7_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 484 | |
| AnnaBridge | 161:aa5281ff4a02 | 485 | #define SCIF7_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 486 | |
| AnnaBridge | 161:aa5281ff4a02 | 487 | #define SCIF7_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 488 | #define SCIF7_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 489 | |
| AnnaBridge | 161:aa5281ff4a02 | 490 | /* ---- SCIFn ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 491 | #define SCIFn_SCSMR_CKS (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 492 | #define SCIFn_SCSMR_STOP (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 493 | #define SCIFn_SCSMR_OE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 494 | #define SCIFn_SCSMR_PE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 495 | #define SCIFn_SCSMR_CHR (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 496 | #define SCIFn_SCSMR_CA (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 497 | |
| AnnaBridge | 161:aa5281ff4a02 | 498 | #define SCIFn_SCBRR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 499 | |
| AnnaBridge | 161:aa5281ff4a02 | 500 | #define SCIFn_SCSCR_CKE (0x0003u) |
| AnnaBridge | 161:aa5281ff4a02 | 501 | #define SCIFn_SCSCR_REIE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 502 | #define SCIFn_SCSCR_RE (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 503 | #define SCIFn_SCSCR_TE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 504 | #define SCIFn_SCSCR_RIE (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 505 | #define SCIFn_SCSCR_TIE (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 506 | |
| AnnaBridge | 161:aa5281ff4a02 | 507 | #define SCIFn_SCFTDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 508 | |
| AnnaBridge | 161:aa5281ff4a02 | 509 | #define SCIFn_SCFSR_DR (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 510 | #define SCIFn_SCFSR_RDF (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 511 | #define SCIFn_SCFSR_PER (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 512 | #define SCIFn_SCFSR_FER (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 513 | #define SCIFn_SCFSR_BRK (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 514 | #define SCIFn_SCFSR_TDFE (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 515 | #define SCIFn_SCFSR_TEND (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 516 | #define SCIFn_SCFSR_ER (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 517 | #define SCIFn_SCFSR_FERN (0x0F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 518 | #define SCIFn_SCFSR_PERN (0xF000u) |
| AnnaBridge | 161:aa5281ff4a02 | 519 | |
| AnnaBridge | 161:aa5281ff4a02 | 520 | #define SCIFn_SCFRDR_D (0xFFu) |
| AnnaBridge | 161:aa5281ff4a02 | 521 | |
| AnnaBridge | 161:aa5281ff4a02 | 522 | #define SCIFn_SCFCR_LOOP (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 523 | #define SCIFn_SCFCR_RFRST (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 524 | #define SCIFn_SCFCR_TFRST (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 525 | #define SCIFn_SCFCR_MCE (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 526 | #define SCIFn_SCFCR_TTRG (0x0030u) |
| AnnaBridge | 161:aa5281ff4a02 | 527 | #define SCIFn_SCFCR_RTRG (0x00C0u) |
| AnnaBridge | 161:aa5281ff4a02 | 528 | #define SCIFn_SCFCR_RSTRG (0x0700u) |
| AnnaBridge | 161:aa5281ff4a02 | 529 | |
| AnnaBridge | 161:aa5281ff4a02 | 530 | #define SCIFn_SCFDR_R (0x001Fu) |
| AnnaBridge | 161:aa5281ff4a02 | 531 | #define SCIFn_SCFDR_T (0x1F00u) |
| AnnaBridge | 161:aa5281ff4a02 | 532 | |
| AnnaBridge | 161:aa5281ff4a02 | 533 | #define SCIFn_SCSPTR_SPB2DT (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 534 | #define SCIFn_SCSPTR_SPB2IO (0x0002u) |
| AnnaBridge | 161:aa5281ff4a02 | 535 | #define SCIFn_SCSPTR_SCKDT (0x0004u) |
| AnnaBridge | 161:aa5281ff4a02 | 536 | #define SCIFn_SCSPTR_SCKIO (0x0008u) |
| AnnaBridge | 161:aa5281ff4a02 | 537 | #define SCIFn_SCSPTR_CTSDT (0x0010u) |
| AnnaBridge | 161:aa5281ff4a02 | 538 | #define SCIFn_SCSPTR_CTSIO (0x0020u) |
| AnnaBridge | 161:aa5281ff4a02 | 539 | #define SCIFn_SCSPTR_RTSDT (0x0040u) |
| AnnaBridge | 161:aa5281ff4a02 | 540 | #define SCIFn_SCSPTR_RTSIO (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 541 | |
| AnnaBridge | 161:aa5281ff4a02 | 542 | #define SCIFn_SCLSR_ORER (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 543 | |
| AnnaBridge | 161:aa5281ff4a02 | 544 | #define SCIFn_SCEMR_ABCS (0x0001u) |
| AnnaBridge | 161:aa5281ff4a02 | 545 | #define SCIFn_SCEMR_BGDM (0x0080u) |
| AnnaBridge | 161:aa5281ff4a02 | 546 | |
| AnnaBridge | 161:aa5281ff4a02 | 547 | |
| AnnaBridge | 161:aa5281ff4a02 | 548 | /* ==== Shift values for IO registers ==== */ |
| AnnaBridge | 161:aa5281ff4a02 | 549 | /* ---- SCIF0 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 550 | #define SCIF0_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 551 | #define SCIF0_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 552 | #define SCIF0_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 553 | #define SCIF0_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 554 | #define SCIF0_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 555 | #define SCIF0_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 556 | |
| AnnaBridge | 161:aa5281ff4a02 | 557 | #define SCIF0_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 558 | |
| AnnaBridge | 161:aa5281ff4a02 | 559 | #define SCIF0_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 560 | #define SCIF0_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 561 | #define SCIF0_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 562 | #define SCIF0_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 563 | #define SCIF0_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 564 | #define SCIF0_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 565 | |
| AnnaBridge | 161:aa5281ff4a02 | 566 | #define SCIF0_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 567 | |
| AnnaBridge | 161:aa5281ff4a02 | 568 | #define SCIF0_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 569 | #define SCIF0_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 570 | #define SCIF0_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 571 | #define SCIF0_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 572 | #define SCIF0_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 573 | #define SCIF0_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 574 | #define SCIF0_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 575 | #define SCIF0_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 576 | #define SCIF0_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 577 | #define SCIF0_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 578 | |
| AnnaBridge | 161:aa5281ff4a02 | 579 | #define SCIF0_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 580 | |
| AnnaBridge | 161:aa5281ff4a02 | 581 | #define SCIF0_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 582 | #define SCIF0_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 583 | #define SCIF0_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 584 | #define SCIF0_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 585 | #define SCIF0_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 586 | #define SCIF0_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 587 | #define SCIF0_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 588 | |
| AnnaBridge | 161:aa5281ff4a02 | 589 | #define SCIF0_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 590 | #define SCIF0_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 591 | |
| AnnaBridge | 161:aa5281ff4a02 | 592 | #define SCIF0_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 593 | #define SCIF0_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 594 | #define SCIF0_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 595 | #define SCIF0_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 596 | #define SCIF0_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 597 | #define SCIF0_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 598 | #define SCIF0_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 599 | #define SCIF0_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 600 | |
| AnnaBridge | 161:aa5281ff4a02 | 601 | #define SCIF0_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 602 | |
| AnnaBridge | 161:aa5281ff4a02 | 603 | #define SCIF0_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 604 | #define SCIF0_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 605 | |
| AnnaBridge | 161:aa5281ff4a02 | 606 | /* ---- SCIF1 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 607 | #define SCIF1_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 608 | #define SCIF1_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 609 | #define SCIF1_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 610 | #define SCIF1_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 611 | #define SCIF1_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 612 | #define SCIF1_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 613 | |
| AnnaBridge | 161:aa5281ff4a02 | 614 | #define SCIF1_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 615 | |
| AnnaBridge | 161:aa5281ff4a02 | 616 | #define SCIF1_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 617 | #define SCIF1_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 618 | #define SCIF1_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 619 | #define SCIF1_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 620 | #define SCIF1_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 621 | #define SCIF1_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 622 | |
| AnnaBridge | 161:aa5281ff4a02 | 623 | #define SCIF1_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 624 | |
| AnnaBridge | 161:aa5281ff4a02 | 625 | #define SCIF1_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 626 | #define SCIF1_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 627 | #define SCIF1_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 628 | #define SCIF1_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 629 | #define SCIF1_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 630 | #define SCIF1_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 631 | #define SCIF1_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 632 | #define SCIF1_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 633 | #define SCIF1_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 634 | #define SCIF1_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 635 | |
| AnnaBridge | 161:aa5281ff4a02 | 636 | #define SCIF1_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 637 | |
| AnnaBridge | 161:aa5281ff4a02 | 638 | #define SCIF1_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 639 | #define SCIF1_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 640 | #define SCIF1_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 641 | #define SCIF1_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 642 | #define SCIF1_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 643 | #define SCIF1_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 644 | #define SCIF1_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 645 | |
| AnnaBridge | 161:aa5281ff4a02 | 646 | #define SCIF1_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 647 | #define SCIF1_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 648 | |
| AnnaBridge | 161:aa5281ff4a02 | 649 | #define SCIF1_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 650 | #define SCIF1_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 651 | #define SCIF1_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 652 | #define SCIF1_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 653 | #define SCIF1_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 654 | #define SCIF1_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 655 | #define SCIF1_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 656 | #define SCIF1_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 657 | |
| AnnaBridge | 161:aa5281ff4a02 | 658 | #define SCIF1_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 659 | |
| AnnaBridge | 161:aa5281ff4a02 | 660 | #define SCIF1_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 661 | #define SCIF1_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 662 | |
| AnnaBridge | 161:aa5281ff4a02 | 663 | /* ---- SCIF2 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 664 | #define SCIF2_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 665 | #define SCIF2_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 666 | #define SCIF2_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 667 | #define SCIF2_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 668 | #define SCIF2_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 669 | #define SCIF2_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 670 | |
| AnnaBridge | 161:aa5281ff4a02 | 671 | #define SCIF2_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 672 | |
| AnnaBridge | 161:aa5281ff4a02 | 673 | #define SCIF2_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 674 | #define SCIF2_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 675 | #define SCIF2_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 676 | #define SCIF2_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 677 | #define SCIF2_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 678 | #define SCIF2_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 679 | |
| AnnaBridge | 161:aa5281ff4a02 | 680 | #define SCIF2_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 681 | |
| AnnaBridge | 161:aa5281ff4a02 | 682 | #define SCIF2_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 683 | #define SCIF2_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 684 | #define SCIF2_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 685 | #define SCIF2_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 686 | #define SCIF2_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 687 | #define SCIF2_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 688 | #define SCIF2_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 689 | #define SCIF2_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 690 | #define SCIF2_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 691 | #define SCIF2_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 692 | |
| AnnaBridge | 161:aa5281ff4a02 | 693 | #define SCIF2_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 694 | |
| AnnaBridge | 161:aa5281ff4a02 | 695 | #define SCIF2_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 696 | #define SCIF2_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 697 | #define SCIF2_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 698 | #define SCIF2_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 699 | #define SCIF2_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 700 | #define SCIF2_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 701 | #define SCIF2_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 702 | |
| AnnaBridge | 161:aa5281ff4a02 | 703 | #define SCIF2_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 704 | #define SCIF2_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 705 | |
| AnnaBridge | 161:aa5281ff4a02 | 706 | #define SCIF2_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 707 | #define SCIF2_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 708 | #define SCIF2_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 709 | #define SCIF2_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 710 | #define SCIF2_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 711 | #define SCIF2_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 712 | #define SCIF2_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 713 | #define SCIF2_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 714 | |
| AnnaBridge | 161:aa5281ff4a02 | 715 | #define SCIF2_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 716 | |
| AnnaBridge | 161:aa5281ff4a02 | 717 | #define SCIF2_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 718 | #define SCIF2_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 719 | |
| AnnaBridge | 161:aa5281ff4a02 | 720 | /* ---- SCIF3 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 721 | #define SCIF3_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 722 | #define SCIF3_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 723 | #define SCIF3_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 724 | #define SCIF3_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 725 | #define SCIF3_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 726 | #define SCIF3_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 727 | |
| AnnaBridge | 161:aa5281ff4a02 | 728 | #define SCIF3_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 729 | |
| AnnaBridge | 161:aa5281ff4a02 | 730 | #define SCIF3_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 731 | #define SCIF3_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 732 | #define SCIF3_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 733 | #define SCIF3_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 734 | #define SCIF3_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 735 | #define SCIF3_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 736 | |
| AnnaBridge | 161:aa5281ff4a02 | 737 | #define SCIF3_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 738 | |
| AnnaBridge | 161:aa5281ff4a02 | 739 | #define SCIF3_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 740 | #define SCIF3_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 741 | #define SCIF3_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 742 | #define SCIF3_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 743 | #define SCIF3_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 744 | #define SCIF3_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 745 | #define SCIF3_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 746 | #define SCIF3_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 747 | #define SCIF3_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 748 | #define SCIF3_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 749 | |
| AnnaBridge | 161:aa5281ff4a02 | 750 | #define SCIF3_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 751 | |
| AnnaBridge | 161:aa5281ff4a02 | 752 | #define SCIF3_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 753 | #define SCIF3_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 754 | #define SCIF3_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 755 | #define SCIF3_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 756 | #define SCIF3_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 757 | #define SCIF3_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 758 | #define SCIF3_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 759 | |
| AnnaBridge | 161:aa5281ff4a02 | 760 | #define SCIF3_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 761 | #define SCIF3_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 762 | |
| AnnaBridge | 161:aa5281ff4a02 | 763 | #define SCIF3_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 764 | #define SCIF3_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 765 | #define SCIF3_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 766 | #define SCIF3_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 767 | #define SCIF3_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 768 | #define SCIF3_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 769 | #define SCIF3_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 770 | #define SCIF3_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 771 | |
| AnnaBridge | 161:aa5281ff4a02 | 772 | #define SCIF3_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 773 | |
| AnnaBridge | 161:aa5281ff4a02 | 774 | #define SCIF3_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 775 | #define SCIF3_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 776 | |
| AnnaBridge | 161:aa5281ff4a02 | 777 | /* ---- SCIF4 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 778 | #define SCIF4_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 779 | #define SCIF4_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 780 | #define SCIF4_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 781 | #define SCIF4_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 782 | #define SCIF4_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 783 | #define SCIF4_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 784 | |
| AnnaBridge | 161:aa5281ff4a02 | 785 | #define SCIF4_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 786 | |
| AnnaBridge | 161:aa5281ff4a02 | 787 | #define SCIF4_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 788 | #define SCIF4_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 789 | #define SCIF4_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 790 | #define SCIF4_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 791 | #define SCIF4_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 792 | #define SCIF4_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 793 | |
| AnnaBridge | 161:aa5281ff4a02 | 794 | #define SCIF4_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 795 | |
| AnnaBridge | 161:aa5281ff4a02 | 796 | #define SCIF4_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 797 | #define SCIF4_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 798 | #define SCIF4_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 799 | #define SCIF4_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 800 | #define SCIF4_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 801 | #define SCIF4_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 802 | #define SCIF4_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 803 | #define SCIF4_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 804 | #define SCIF4_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 805 | #define SCIF4_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 806 | |
| AnnaBridge | 161:aa5281ff4a02 | 807 | #define SCIF4_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 808 | |
| AnnaBridge | 161:aa5281ff4a02 | 809 | #define SCIF4_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 810 | #define SCIF4_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 811 | #define SCIF4_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 812 | #define SCIF4_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 813 | #define SCIF4_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 814 | #define SCIF4_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 815 | #define SCIF4_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 816 | |
| AnnaBridge | 161:aa5281ff4a02 | 817 | #define SCIF4_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 818 | #define SCIF4_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 819 | |
| AnnaBridge | 161:aa5281ff4a02 | 820 | #define SCIF4_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 821 | #define SCIF4_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 822 | #define SCIF4_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 823 | #define SCIF4_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 824 | #define SCIF4_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 825 | #define SCIF4_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 826 | #define SCIF4_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 827 | #define SCIF4_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 828 | |
| AnnaBridge | 161:aa5281ff4a02 | 829 | #define SCIF4_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 830 | |
| AnnaBridge | 161:aa5281ff4a02 | 831 | #define SCIF4_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 832 | #define SCIF4_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 833 | |
| AnnaBridge | 161:aa5281ff4a02 | 834 | /* ---- SCIF5 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 835 | #define SCIF5_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 836 | #define SCIF5_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 837 | #define SCIF5_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 838 | #define SCIF5_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 839 | #define SCIF5_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 840 | #define SCIF5_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 841 | |
| AnnaBridge | 161:aa5281ff4a02 | 842 | #define SCIF5_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 843 | |
| AnnaBridge | 161:aa5281ff4a02 | 844 | #define SCIF5_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 845 | #define SCIF5_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 846 | #define SCIF5_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 847 | #define SCIF5_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 848 | #define SCIF5_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 849 | #define SCIF5_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 850 | |
| AnnaBridge | 161:aa5281ff4a02 | 851 | #define SCIF5_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 852 | |
| AnnaBridge | 161:aa5281ff4a02 | 853 | #define SCIF5_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 854 | #define SCIF5_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 855 | #define SCIF5_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 856 | #define SCIF5_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 857 | #define SCIF5_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 858 | #define SCIF5_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 859 | #define SCIF5_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 860 | #define SCIF5_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 861 | #define SCIF5_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 862 | #define SCIF5_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 863 | |
| AnnaBridge | 161:aa5281ff4a02 | 864 | #define SCIF5_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 865 | |
| AnnaBridge | 161:aa5281ff4a02 | 866 | #define SCIF5_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 867 | #define SCIF5_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 868 | #define SCIF5_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 869 | #define SCIF5_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 870 | #define SCIF5_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 871 | #define SCIF5_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 872 | #define SCIF5_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 873 | |
| AnnaBridge | 161:aa5281ff4a02 | 874 | #define SCIF5_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 875 | #define SCIF5_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 876 | |
| AnnaBridge | 161:aa5281ff4a02 | 877 | #define SCIF5_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 878 | #define SCIF5_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 879 | #define SCIF5_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 880 | #define SCIF5_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 881 | #define SCIF5_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 882 | #define SCIF5_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 883 | #define SCIF5_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 884 | #define SCIF5_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 885 | |
| AnnaBridge | 161:aa5281ff4a02 | 886 | #define SCIF5_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 887 | |
| AnnaBridge | 161:aa5281ff4a02 | 888 | #define SCIF5_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 889 | #define SCIF5_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 890 | |
| AnnaBridge | 161:aa5281ff4a02 | 891 | /* ---- SCIF6 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 892 | #define SCIF6_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 893 | #define SCIF6_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 894 | #define SCIF6_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 895 | #define SCIF6_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 896 | #define SCIF6_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 897 | #define SCIF6_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 898 | |
| AnnaBridge | 161:aa5281ff4a02 | 899 | #define SCIF6_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 900 | |
| AnnaBridge | 161:aa5281ff4a02 | 901 | #define SCIF6_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 902 | #define SCIF6_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 903 | #define SCIF6_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 904 | #define SCIF6_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 905 | #define SCIF6_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 906 | #define SCIF6_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 907 | |
| AnnaBridge | 161:aa5281ff4a02 | 908 | #define SCIF6_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 909 | |
| AnnaBridge | 161:aa5281ff4a02 | 910 | #define SCIF6_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 911 | #define SCIF6_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 912 | #define SCIF6_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 913 | #define SCIF6_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 914 | #define SCIF6_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 915 | #define SCIF6_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 916 | #define SCIF6_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 917 | #define SCIF6_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 918 | #define SCIF6_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 919 | #define SCIF6_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 920 | |
| AnnaBridge | 161:aa5281ff4a02 | 921 | #define SCIF6_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 922 | |
| AnnaBridge | 161:aa5281ff4a02 | 923 | #define SCIF6_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 924 | #define SCIF6_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 925 | #define SCIF6_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 926 | #define SCIF6_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 927 | #define SCIF6_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 928 | #define SCIF6_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 929 | #define SCIF6_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 930 | |
| AnnaBridge | 161:aa5281ff4a02 | 931 | #define SCIF6_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 932 | #define SCIF6_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 933 | |
| AnnaBridge | 161:aa5281ff4a02 | 934 | #define SCIF6_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 935 | #define SCIF6_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 936 | #define SCIF6_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 937 | #define SCIF6_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 938 | #define SCIF6_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 939 | #define SCIF6_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 940 | #define SCIF6_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 941 | #define SCIF6_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 942 | |
| AnnaBridge | 161:aa5281ff4a02 | 943 | #define SCIF6_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 944 | |
| AnnaBridge | 161:aa5281ff4a02 | 945 | #define SCIF6_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 946 | #define SCIF6_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 947 | |
| AnnaBridge | 161:aa5281ff4a02 | 948 | /* ---- SCIF7 ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 949 | #define SCIF7_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 950 | #define SCIF7_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 951 | #define SCIF7_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 952 | #define SCIF7_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 953 | #define SCIF7_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 954 | #define SCIF7_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 955 | |
| AnnaBridge | 161:aa5281ff4a02 | 956 | #define SCIF7_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 957 | |
| AnnaBridge | 161:aa5281ff4a02 | 958 | #define SCIF7_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 959 | #define SCIF7_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 960 | #define SCIF7_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 961 | #define SCIF7_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 962 | #define SCIF7_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 963 | #define SCIF7_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 964 | |
| AnnaBridge | 161:aa5281ff4a02 | 965 | #define SCIF7_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 966 | |
| AnnaBridge | 161:aa5281ff4a02 | 967 | #define SCIF7_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 968 | #define SCIF7_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 969 | #define SCIF7_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 970 | #define SCIF7_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 971 | #define SCIF7_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 972 | #define SCIF7_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 973 | #define SCIF7_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 974 | #define SCIF7_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 975 | #define SCIF7_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 976 | #define SCIF7_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 977 | |
| AnnaBridge | 161:aa5281ff4a02 | 978 | #define SCIF7_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 979 | |
| AnnaBridge | 161:aa5281ff4a02 | 980 | #define SCIF7_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 981 | #define SCIF7_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 982 | #define SCIF7_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 983 | #define SCIF7_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 984 | #define SCIF7_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 985 | #define SCIF7_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 986 | #define SCIF7_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 987 | |
| AnnaBridge | 161:aa5281ff4a02 | 988 | #define SCIF7_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 989 | #define SCIF7_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 990 | |
| AnnaBridge | 161:aa5281ff4a02 | 991 | #define SCIF7_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 992 | #define SCIF7_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 993 | #define SCIF7_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 994 | #define SCIF7_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 995 | #define SCIF7_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 996 | #define SCIF7_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 997 | #define SCIF7_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 998 | #define SCIF7_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 999 | |
| AnnaBridge | 161:aa5281ff4a02 | 1000 | #define SCIF7_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1001 | |
| AnnaBridge | 161:aa5281ff4a02 | 1002 | #define SCIF7_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1003 | #define SCIF7_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1004 | |
| AnnaBridge | 161:aa5281ff4a02 | 1005 | /* ---- SCIFn ---- */ |
| AnnaBridge | 161:aa5281ff4a02 | 1006 | #define SCIFn_SCSMR_CKS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1007 | #define SCIFn_SCSMR_STOP_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 1008 | #define SCIFn_SCSMR_OE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 1009 | #define SCIFn_SCSMR_PE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 1010 | #define SCIFn_SCSMR_CHR_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 1011 | #define SCIFn_SCSMR_CA_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1012 | |
| AnnaBridge | 161:aa5281ff4a02 | 1013 | #define SCIFn_SCBRR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1014 | |
| AnnaBridge | 161:aa5281ff4a02 | 1015 | #define SCIFn_SCSCR_CKE_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1016 | #define SCIFn_SCSCR_REIE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 1017 | #define SCIFn_SCSCR_RE_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 1018 | #define SCIFn_SCSCR_TE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 1019 | #define SCIFn_SCSCR_RIE_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 1020 | #define SCIFn_SCSCR_TIE_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1021 | |
| AnnaBridge | 161:aa5281ff4a02 | 1022 | #define SCIFn_SCFTDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1023 | |
| AnnaBridge | 161:aa5281ff4a02 | 1024 | #define SCIFn_SCFSR_DR_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1025 | #define SCIFn_SCFSR_RDF_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 1026 | #define SCIFn_SCFSR_PER_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 1027 | #define SCIFn_SCFSR_FER_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 1028 | #define SCIFn_SCFSR_BRK_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 1029 | #define SCIFn_SCFSR_TDFE_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 1030 | #define SCIFn_SCFSR_TEND_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 1031 | #define SCIFn_SCFSR_ER_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1032 | #define SCIFn_SCFSR_FERN_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 1033 | #define SCIFn_SCFSR_PERN_SHIFT (12u) |
| AnnaBridge | 161:aa5281ff4a02 | 1034 | |
| AnnaBridge | 161:aa5281ff4a02 | 1035 | #define SCIFn_SCFRDR_D_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1036 | |
| AnnaBridge | 161:aa5281ff4a02 | 1037 | #define SCIFn_SCFCR_LOOP_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1038 | #define SCIFn_SCFCR_RFRST_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 1039 | #define SCIFn_SCFCR_TFRST_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 1040 | #define SCIFn_SCFCR_MCE_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 1041 | #define SCIFn_SCFCR_TTRG_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 1042 | #define SCIFn_SCFCR_RTRG_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 1043 | #define SCIFn_SCFCR_RSTRG_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 1044 | |
| AnnaBridge | 161:aa5281ff4a02 | 1045 | #define SCIFn_SCFDR_R_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1046 | #define SCIFn_SCFDR_T_SHIFT (8u) |
| AnnaBridge | 161:aa5281ff4a02 | 1047 | |
| AnnaBridge | 161:aa5281ff4a02 | 1048 | #define SCIFn_SCSPTR_SPB2DT_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1049 | #define SCIFn_SCSPTR_SPB2IO_SHIFT (1u) |
| AnnaBridge | 161:aa5281ff4a02 | 1050 | #define SCIFn_SCSPTR_SCKDT_SHIFT (2u) |
| AnnaBridge | 161:aa5281ff4a02 | 1051 | #define SCIFn_SCSPTR_SCKIO_SHIFT (3u) |
| AnnaBridge | 161:aa5281ff4a02 | 1052 | #define SCIFn_SCSPTR_CTSDT_SHIFT (4u) |
| AnnaBridge | 161:aa5281ff4a02 | 1053 | #define SCIFn_SCSPTR_CTSIO_SHIFT (5u) |
| AnnaBridge | 161:aa5281ff4a02 | 1054 | #define SCIFn_SCSPTR_RTSDT_SHIFT (6u) |
| AnnaBridge | 161:aa5281ff4a02 | 1055 | #define SCIFn_SCSPTR_RTSIO_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1056 | |
| AnnaBridge | 161:aa5281ff4a02 | 1057 | #define SCIFn_SCLSR_ORER_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1058 | |
| AnnaBridge | 161:aa5281ff4a02 | 1059 | #define SCIFn_SCEMR_ABCS_SHIFT (0u) |
| AnnaBridge | 161:aa5281ff4a02 | 1060 | #define SCIFn_SCEMR_BGDM_SHIFT (7u) |
| AnnaBridge | 161:aa5281ff4a02 | 1061 | |
| AnnaBridge | 161:aa5281ff4a02 | 1062 | |
| AnnaBridge | 161:aa5281ff4a02 | 1063 | #endif /* SCIF_IOBITMASK_H */ |
| AnnaBridge | 161:aa5281ff4a02 | 1064 | |
| AnnaBridge | 161:aa5281ff4a02 | 1065 | /* End of File */ |
