mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUMAKER_PFM_M453/TOOLCHAIN_ARM_MICRO/m451_eadc.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 2 | * @file eadc.h |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @version V0.10 |
| AnnaBridge | 171:3a7713b1edbc | 4 | * $Revision: 18 $ |
| AnnaBridge | 171:3a7713b1edbc | 5 | * $Date: 15/08/11 10:26a $ |
| AnnaBridge | 171:3a7713b1edbc | 6 | * @brief M451 series EADC driver header file |
| AnnaBridge | 171:3a7713b1edbc | 7 | * |
| AnnaBridge | 171:3a7713b1edbc | 8 | * @note |
| AnnaBridge | 171:3a7713b1edbc | 9 | * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. |
| AnnaBridge | 171:3a7713b1edbc | 10 | *****************************************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 11 | #ifndef __EADC_H__ |
| AnnaBridge | 171:3a7713b1edbc | 12 | #define __EADC_H__ |
| AnnaBridge | 171:3a7713b1edbc | 13 | |
| AnnaBridge | 171:3a7713b1edbc | 14 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 15 | /* Include related headers */ |
| AnnaBridge | 171:3a7713b1edbc | 16 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 17 | #include "M451Series.h" |
| AnnaBridge | 171:3a7713b1edbc | 18 | |
| AnnaBridge | 171:3a7713b1edbc | 19 | |
| AnnaBridge | 171:3a7713b1edbc | 20 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 21 | extern "C" |
| AnnaBridge | 171:3a7713b1edbc | 22 | { |
| AnnaBridge | 171:3a7713b1edbc | 23 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 24 | |
| AnnaBridge | 171:3a7713b1edbc | 25 | |
| AnnaBridge | 171:3a7713b1edbc | 26 | /** @addtogroup Standard_Driver Standard Driver |
| AnnaBridge | 171:3a7713b1edbc | 27 | @{ |
| AnnaBridge | 171:3a7713b1edbc | 28 | */ |
| AnnaBridge | 171:3a7713b1edbc | 29 | |
| AnnaBridge | 171:3a7713b1edbc | 30 | /** @addtogroup EADC_Driver EADC Driver |
| AnnaBridge | 171:3a7713b1edbc | 31 | @{ |
| AnnaBridge | 171:3a7713b1edbc | 32 | */ |
| AnnaBridge | 171:3a7713b1edbc | 33 | |
| AnnaBridge | 171:3a7713b1edbc | 34 | /** @addtogroup EADC_EXPORTED_CONSTANTS EADC Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 35 | @{ |
| AnnaBridge | 171:3a7713b1edbc | 36 | */ |
| AnnaBridge | 171:3a7713b1edbc | 37 | |
| AnnaBridge | 171:3a7713b1edbc | 38 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 39 | /* EADC_CTL Constant Definitions */ |
| AnnaBridge | 171:3a7713b1edbc | 40 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 41 | #define EADC_CTL_DIFFEN_SINGLE_END (0UL<<EADC_CTL_DIFFEN_Pos) /*!< Single-end input mode */ |
| AnnaBridge | 171:3a7713b1edbc | 42 | #define EADC_CTL_DIFFEN_DIFFERENTIAL (1UL<<EADC_CTL_DIFFEN_Pos) /*!< Differential input mode */ |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | #define EADC_CTL_DMOF_STRAIGHT_BINARY (0UL<<EADC_CTL_DMOF_Pos) /*!< Select the straight binary format as the output format of the conversion result */ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #define EADC_CTL_DMOF_TWOS_COMPLEMENT (1UL<<EADC_CTL_DMOF_Pos) /*!< Select the 2's complement format as the output format of the conversion result */ |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | #define EADC_CTL_SMPTSEL1 (0UL<<EADC_CTL_SMPTSEL_Pos) /*!< 1 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 48 | #define EADC_CTL_SMPTSEL2 (1UL<<EADC_CTL_SMPTSEL_Pos) /*!< 2 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 49 | #define EADC_CTL_SMPTSEL3 (2UL<<EADC_CTL_SMPTSEL_Pos) /*!< 3 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | #define EADC_CTL_SMPTSEL4 (3UL<<EADC_CTL_SMPTSEL_Pos) /*!< 4 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 51 | #define EADC_CTL_SMPTSEL5 (4UL<<EADC_CTL_SMPTSEL_Pos) /*!< 5 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 52 | #define EADC_CTL_SMPTSEL6 (5UL<<EADC_CTL_SMPTSEL_Pos) /*!< 6 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 53 | #define EADC_CTL_SMPTSEL7 (6UL<<EADC_CTL_SMPTSEL_Pos) /*!< 7 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | #define EADC_CTL_SMPTSEL8 (7UL<<EADC_CTL_SMPTSEL_Pos) /*!< 8 ADC clock sampling time */ |
| AnnaBridge | 171:3a7713b1edbc | 55 | |
| AnnaBridge | 171:3a7713b1edbc | 56 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 57 | /* EADC_SCTL Constant Definitions */ |
| AnnaBridge | 171:3a7713b1edbc | 58 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 59 | #define EADC_SCTL_CHSEL(x) ((x) << EADC_SCTL_CHSEL_Pos) /*!< A/D sample module channel selection */ |
| AnnaBridge | 171:3a7713b1edbc | 60 | #define EADC_SCTL_TRGDLYDIV(x) ((x) << EADC_SCTL_TRGDLYDIV_Pos) /*!< A/D sample module start of conversion trigger delay clock divider selection */ |
| AnnaBridge | 171:3a7713b1edbc | 61 | #define EADC_SCTL_TRGDLYCNT(x) ((x) << EADC_SCTL_TRGDLYCNT_Pos) /*!< A/D sample module start of conversion trigger delay time */ |
| AnnaBridge | 171:3a7713b1edbc | 62 | |
| AnnaBridge | 171:3a7713b1edbc | 63 | #define EADC_SOFTWARE_TRIGGER (0UL<<EADC_SCTL_TRGSEL_Pos) /*!< Software trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 64 | #define EADC_FALLING_EDGE_TRIGGER (EADC_SCTL_EXTFEN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos)) /*!< STADC pin falling edge trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 65 | #define EADC_RISING_EDGE_TRIGGER (EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos)) /*!< STADC pin rising edge trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 66 | #define EADC_FALLING_RISING_EDGE_TRIGGER (EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos)) /*!< STADC pin both falling and rising edge trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 67 | #define EADC_ADINT0_TRIGGER (2UL<<EADC_SCTL_TRGSEL_Pos) /*!< ADC ADINT0 interrupt EOC pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 68 | #define EADC_ADINT1_TRIGGER (3UL<<EADC_SCTL_TRGSEL_Pos) /*!< ADC ADINT1 interrupt EOC pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 69 | #define EADC_TIMER0_TRIGGER (4UL<<EADC_SCTL_TRGSEL_Pos) /*!< Timer0 overflow pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 70 | #define EADC_TIMER1_TRIGGER (5UL<<EADC_SCTL_TRGSEL_Pos) /*!< Timer1 overflow pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 71 | #define EADC_TIMER2_TRIGGER (6UL<<EADC_SCTL_TRGSEL_Pos) /*!< Timer2 overflow pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | #define EADC_TIMER3_TRIGGER (7UL<<EADC_SCTL_TRGSEL_Pos) /*!< Timer3 overflow pulse trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 73 | #define EADC_PWM0TG0_TRIGGER (8UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG0 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 74 | #define EADC_PWM0TG1_TRIGGER (9UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG1 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 75 | #define EADC_PWM0TG2_TRIGGER (0xAUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG2 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 76 | #define EADC_PWM0TG3_TRIGGER (0xBUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG3 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 77 | #define EADC_PWM0TG4_TRIGGER (0xCUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG4 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 78 | #define EADC_PWM0TG5_TRIGGER (0xDUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM0TG5 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 79 | #define EADC_PWM1TG0_TRIGGER (0xEUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG0 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 80 | #define EADC_PWM1TG1_TRIGGER (0xFUL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG1 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 81 | #define EADC_PWM1TG2_TRIGGER (0x10UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG2 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 82 | #define EADC_PWM1TG3_TRIGGER (0x11UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG3 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 83 | #define EADC_PWM1TG4_TRIGGER (0x12UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG4 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 84 | #define EADC_PWM1TG5_TRIGGER (0x13UL<<EADC_SCTL_TRGSEL_Pos) /*!< PWM1TG5 trigger */ |
| AnnaBridge | 171:3a7713b1edbc | 85 | |
| AnnaBridge | 171:3a7713b1edbc | 86 | #define EADC_SCTL_TRGDLYDIV_DIVIDER_1 (0<<EADC_SCTL_TRGDLYDIV_Pos) /*!< Trigger delay clock frequency is ADC_CLK/1 */ |
| AnnaBridge | 171:3a7713b1edbc | 87 | #define EADC_SCTL_TRGDLYDIV_DIVIDER_2 (0x1UL<<EADC_SCTL_TRGDLYDIV_Pos) /*!< Trigger delay clock frequency is ADC_CLK/2 */ |
| AnnaBridge | 171:3a7713b1edbc | 88 | #define EADC_SCTL_TRGDLYDIV_DIVIDER_4 (0x2UL<<EADC_SCTL_TRGDLYDIV_Pos) /*!< Trigger delay clock frequency is ADC_CLK/4 */ |
| AnnaBridge | 171:3a7713b1edbc | 89 | #define EADC_SCTL_TRGDLYDIV_DIVIDER_16 (0x3UL<<EADC_SCTL_TRGDLYDIV_Pos) /*!< Trigger delay clock frequency is ADC_CLK/16 */ |
| AnnaBridge | 171:3a7713b1edbc | 90 | |
| AnnaBridge | 171:3a7713b1edbc | 91 | |
| AnnaBridge | 171:3a7713b1edbc | 92 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 93 | /* EADC_CMP Constant Definitions */ |
| AnnaBridge | 171:3a7713b1edbc | 94 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 95 | #define EADC_CMP_CMPCOND_LESS_THAN (0UL<<EADC_CMP_CMPCOND_Pos) /*!< The compare condition is "less than" */ |
| AnnaBridge | 171:3a7713b1edbc | 96 | #define EADC_CMP_CMPCOND_GREATER_OR_EQUAL (1UL<<EADC_CMP_CMPCOND_Pos) /*!< The compare condition is "greater than or equal to" */ |
| AnnaBridge | 171:3a7713b1edbc | 97 | #define EADC_CMP_CMPWEN_ENABLE (EADC_CMP_CMPWEN_Msk) /*!< Compare window mode enable */ |
| AnnaBridge | 171:3a7713b1edbc | 98 | #define EADC_CMP_CMPWEN_DISABLE (~EADC_CMP_CMPWEN_Msk) /*!< Compare window mode disable */ |
| AnnaBridge | 171:3a7713b1edbc | 99 | #define EADC_CMP_ADCMPIE_ENABLE (EADC_CMP_ADCMPIE_Msk) /*!< A/D result compare interrupt enable */ |
| AnnaBridge | 171:3a7713b1edbc | 100 | #define EADC_CMP_ADCMPIE_DISABLE (~EADC_CMP_ADCMPIE_Msk) /*!< A/D result compare interrupt disable */ |
| AnnaBridge | 171:3a7713b1edbc | 101 | |
| AnnaBridge | 171:3a7713b1edbc | 102 | /*@}*/ /* end of group EADC_EXPORTED_CONSTANTS */ |
| AnnaBridge | 171:3a7713b1edbc | 103 | |
| AnnaBridge | 171:3a7713b1edbc | 104 | /** @addtogroup EADC_EXPORTED_FUNCTIONS EADC Exported Functions |
| AnnaBridge | 171:3a7713b1edbc | 105 | @{ |
| AnnaBridge | 171:3a7713b1edbc | 106 | */ |
| AnnaBridge | 171:3a7713b1edbc | 107 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 108 | /* EADC Macro Definitions */ |
| AnnaBridge | 171:3a7713b1edbc | 109 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 110 | |
| AnnaBridge | 171:3a7713b1edbc | 111 | /** |
| AnnaBridge | 171:3a7713b1edbc | 112 | * @brief A/D Converter Control Circuits Reset. |
| AnnaBridge | 171:3a7713b1edbc | 113 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 114 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 115 | * @details ADCRST bit (EADC_CT[1]) remains 1 during ADC reset, when ADC reset end, the ADCRST bit is automatically cleared to 0. |
| AnnaBridge | 171:3a7713b1edbc | 116 | */ |
| AnnaBridge | 171:3a7713b1edbc | 117 | #define EADC_CONV_RESET(eadc) ((eadc)->CTL |= EADC_CTL_ADRST_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 118 | |
| AnnaBridge | 171:3a7713b1edbc | 119 | /** |
| AnnaBridge | 171:3a7713b1edbc | 120 | * @brief Enable PDMA transfer. |
| AnnaBridge | 171:3a7713b1edbc | 121 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 122 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 123 | * @details When A/D conversion is completed, the converted data is loaded into EADC_DATn (n: 0 ~ 18) register, |
| AnnaBridge | 171:3a7713b1edbc | 124 | * user can enable this bit to generate a PDMA data transfer request. |
| AnnaBridge | 171:3a7713b1edbc | 125 | * @note When set PDMAEN bit (EADC_CTL[11]), user must set ADINTENn (EADC_CTL[5:2], n=0~3) = 0 to disable interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 126 | */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | #define EADC_ENABLE_PDMA(eadc) ((eadc)->CTL |= EADC_CTL_PDMAEN_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 128 | |
| AnnaBridge | 171:3a7713b1edbc | 129 | /** |
| AnnaBridge | 171:3a7713b1edbc | 130 | * @brief Disable PDMA transfer. |
| AnnaBridge | 171:3a7713b1edbc | 131 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 132 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 133 | * @details This macro is used to disable PDMA transfer. |
| AnnaBridge | 171:3a7713b1edbc | 134 | */ |
| AnnaBridge | 171:3a7713b1edbc | 135 | #define EADC_DISABLE_PDMA(eadc) ((eadc)->CTL &= (~EADC_CTL_PDMAEN_Msk)) |
| AnnaBridge | 171:3a7713b1edbc | 136 | |
| AnnaBridge | 171:3a7713b1edbc | 137 | /** |
| AnnaBridge | 171:3a7713b1edbc | 138 | * @brief Enable double buffer mode. |
| AnnaBridge | 171:3a7713b1edbc | 139 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 140 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 141 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 142 | * @details The ADC controller supports a double buffer mode in sample module 0~3. |
| AnnaBridge | 171:3a7713b1edbc | 143 | * If user enable DBMEN (EADC_SCTLn[23], n=0~3), the double buffer mode will enable. |
| AnnaBridge | 171:3a7713b1edbc | 144 | */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | #define EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_DBMEN_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 146 | |
| AnnaBridge | 171:3a7713b1edbc | 147 | /** |
| AnnaBridge | 171:3a7713b1edbc | 148 | * @brief Disable double buffer mode. |
| AnnaBridge | 171:3a7713b1edbc | 149 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 150 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 151 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 152 | * @details Sample has one sample result register. |
| AnnaBridge | 171:3a7713b1edbc | 153 | */ |
| AnnaBridge | 171:3a7713b1edbc | 154 | #define EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_DBMEN_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 155 | |
| AnnaBridge | 171:3a7713b1edbc | 156 | /** |
| AnnaBridge | 171:3a7713b1edbc | 157 | * @brief Set ADIFn at A/D end of conversion. |
| AnnaBridge | 171:3a7713b1edbc | 158 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 159 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 15. |
| AnnaBridge | 171:3a7713b1edbc | 160 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 161 | * @details The A/D converter generates ADIFn (EADC_STATUS2[3:0], n=0~3) at the start of conversion. |
| AnnaBridge | 171:3a7713b1edbc | 162 | */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | #define EADC_ENABLE_INT_POSITION(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_INTPOS_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 164 | |
| AnnaBridge | 171:3a7713b1edbc | 165 | /** |
| AnnaBridge | 171:3a7713b1edbc | 166 | * @brief Set ADIFn at A/D start of conversion. |
| AnnaBridge | 171:3a7713b1edbc | 167 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 168 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 15. |
| AnnaBridge | 171:3a7713b1edbc | 169 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 170 | * @details The A/D converter generates ADIFn (EADC_STATUS2[3:0], n=0~3) at the end of conversion. |
| AnnaBridge | 171:3a7713b1edbc | 171 | */ |
| AnnaBridge | 171:3a7713b1edbc | 172 | #define EADC_DISABLE_INT_POSITION(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_INTPOS_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 173 | |
| AnnaBridge | 171:3a7713b1edbc | 174 | /** |
| AnnaBridge | 171:3a7713b1edbc | 175 | * @brief Enable the interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 176 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 177 | * @param[in] u32Mask Decides the combination of interrupt status bits. Each bit corresponds to a interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 178 | * This parameter decides which interrupts will be enabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3. |
| AnnaBridge | 171:3a7713b1edbc | 179 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 180 | * @details The A/D converter generates a conversion end ADIFn (EADC_STATUS2[n]) upon the end of specific sample module A/D conversion. |
| AnnaBridge | 171:3a7713b1edbc | 181 | * If ADCIENn bit (EADC_CTL[n+2]) is set then conversion end interrupt request ADINTn is generated (n=0~3). |
| AnnaBridge | 171:3a7713b1edbc | 182 | */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | #define EADC_ENABLE_INT(eadc, u32Mask) ((eadc)->CTL |= ((u32Mask) << EADC_CTL_ADCIEN0_Pos)) |
| AnnaBridge | 171:3a7713b1edbc | 184 | |
| AnnaBridge | 171:3a7713b1edbc | 185 | /** |
| AnnaBridge | 171:3a7713b1edbc | 186 | * @brief Disable the interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 187 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 188 | * @param[in] u32Mask Decides the combination of interrupt status bits. Each bit corresponds to a interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 189 | * This parameter decides which interrupts will be disabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3. |
| AnnaBridge | 171:3a7713b1edbc | 190 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 191 | * @details Specific sample module A/D ADINT0 interrupt function Disabled. |
| AnnaBridge | 171:3a7713b1edbc | 192 | */ |
| AnnaBridge | 171:3a7713b1edbc | 193 | #define EADC_DISABLE_INT(eadc, u32Mask) ((eadc)->CTL &= ~((u32Mask) << EADC_CTL_ADCIEN0_Pos)) |
| AnnaBridge | 171:3a7713b1edbc | 194 | |
| AnnaBridge | 171:3a7713b1edbc | 195 | /** |
| AnnaBridge | 171:3a7713b1edbc | 196 | * @brief Enable the sample module interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 197 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 198 | * @param[in] u32IntSel Decides which interrupt source will be used, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 199 | * @param[in] u32ModuleMask the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 200 | * This parameter decides which sample module interrupts will be enabled, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 201 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 202 | * @details There are 4 ADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address. |
| AnnaBridge | 171:3a7713b1edbc | 203 | */ |
| AnnaBridge | 171:3a7713b1edbc | 204 | #define EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) ((eadc)->INTSRC[(u32IntSel)] |= (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 205 | |
| AnnaBridge | 171:3a7713b1edbc | 206 | /** |
| AnnaBridge | 171:3a7713b1edbc | 207 | * @brief Disable the sample module interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 208 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 209 | * @param[in] u32IntSel Decides which interrupt source will be used, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 210 | * @param[in] u32ModuleMask the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 211 | * This parameter decides which sample module interrupts will be disabled, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 212 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 213 | * @details There are 4 ADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address. |
| AnnaBridge | 171:3a7713b1edbc | 214 | */ |
| AnnaBridge | 171:3a7713b1edbc | 215 | #define EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) ((eadc)->INTSRC[(u32IntSel)] &= ~(u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 216 | |
| AnnaBridge | 171:3a7713b1edbc | 217 | /** |
| AnnaBridge | 171:3a7713b1edbc | 218 | * @brief Set the input mode output format. |
| AnnaBridge | 171:3a7713b1edbc | 219 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 220 | * @param[in] u32Format Decides the output format. Valid values are: |
| AnnaBridge | 171:3a7713b1edbc | 221 | * - \ref EADC_CTL_DMOF_STRAIGHT_BINARY :Select the straight binary format as the output format of the conversion result. |
| AnnaBridge | 171:3a7713b1edbc | 222 | * - \ref EADC_CTL_DMOF_TWOS_COMPLEMENT :Select the 2's complement format as the output format of the conversion result. |
| AnnaBridge | 171:3a7713b1edbc | 223 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 224 | * @details The macro is used to set A/D input mode output format. |
| AnnaBridge | 171:3a7713b1edbc | 225 | */ |
| AnnaBridge | 171:3a7713b1edbc | 226 | #define EADC_SET_DMOF(eadc, u32Format) ((eadc)->CTL = ((eadc)->CTL & ~EADC_CTL_DMOF_Msk) | (u32Format)) |
| AnnaBridge | 171:3a7713b1edbc | 227 | |
| AnnaBridge | 171:3a7713b1edbc | 228 | /** |
| AnnaBridge | 171:3a7713b1edbc | 229 | * @brief Start the A/D conversion. |
| AnnaBridge | 171:3a7713b1edbc | 230 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 231 | * @param[in] u32ModuleMask The combination of sample module. Each bit corresponds to a sample module. |
| AnnaBridge | 171:3a7713b1edbc | 232 | * This parameter decides which sample module will be conversion, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 233 | * Bit 0 is sample module 0, bit 1 is sample module 1..., bit 18 is sample module 18. |
| AnnaBridge | 171:3a7713b1edbc | 234 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 235 | * @details After write EADC_SWTRG register to start ADC conversion, the EADC_PENDSTS register will show which SAMPLE will conversion. |
| AnnaBridge | 171:3a7713b1edbc | 236 | */ |
| AnnaBridge | 171:3a7713b1edbc | 237 | #define EADC_START_CONV(eadc, u32ModuleMask) ((eadc)->SWTRG = (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 238 | |
| AnnaBridge | 171:3a7713b1edbc | 239 | /** |
| AnnaBridge | 171:3a7713b1edbc | 240 | * @brief Cancel the conversion for sample module. |
| AnnaBridge | 171:3a7713b1edbc | 241 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 242 | * @param[in] u32ModuleMask The combination of sample module. Each bit corresponds to a sample module. |
| AnnaBridge | 171:3a7713b1edbc | 243 | * This parameter decides which sample module will stop the conversion, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 244 | * Bit 0 is sample module 0, bit 1 is sample module 1..., bit 18 is sample module18. |
| AnnaBridge | 171:3a7713b1edbc | 245 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 246 | * @details If user want to disable the conversion of the sample module, user can write EADC_PENDSTS register to clear it. |
| AnnaBridge | 171:3a7713b1edbc | 247 | */ |
| AnnaBridge | 171:3a7713b1edbc | 248 | #define EADC_STOP_CONV(eadc, u32ModuleMask) ((eadc)->PENDSTS = (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 249 | |
| AnnaBridge | 171:3a7713b1edbc | 250 | /** |
| AnnaBridge | 171:3a7713b1edbc | 251 | * @brief Get the conversion pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 252 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 253 | * @return Return the conversion pending sample module. |
| AnnaBridge | 171:3a7713b1edbc | 254 | * @details This STPFn(EADC_PENDSTS[18:0]) bit remains 1 during pending state, when the respective ADC conversion is end, |
| AnnaBridge | 171:3a7713b1edbc | 255 | * the STPFn (n=0~18) bit is automatically cleared to 0. |
| AnnaBridge | 171:3a7713b1edbc | 256 | */ |
| AnnaBridge | 171:3a7713b1edbc | 257 | #define EADC_GET_PENDING_CONV(eadc) ((eadc)->PENDSTS) |
| AnnaBridge | 171:3a7713b1edbc | 258 | |
| AnnaBridge | 171:3a7713b1edbc | 259 | /** |
| AnnaBridge | 171:3a7713b1edbc | 260 | * @brief Get the conversion data of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 261 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 262 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 263 | * @return Return the conversion data of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 264 | * @details This macro is used to read RESULT bit (EADC_DATn[15:0], n=0~18) field to get conversion data. |
| AnnaBridge | 171:3a7713b1edbc | 265 | */ |
| AnnaBridge | 171:3a7713b1edbc | 266 | #define EADC_GET_CONV_DATA(eadc, u32ModuleNum) ((eadc)->DAT[(u32ModuleNum)] & EADC_DAT_RESULT_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 267 | |
| AnnaBridge | 171:3a7713b1edbc | 268 | /** |
| AnnaBridge | 171:3a7713b1edbc | 269 | * @brief Get the data overrun flag of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 270 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 271 | * @param[in] u32ModuleMask The combination of data overrun status bits. Each bit corresponds to a data overrun status, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 272 | * @return Return the data overrun flag of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 273 | * @details This macro is used to read OV bit (EADC_STATUS0[31:16], EADC_STATUS1[18:16]) field to get data overrun status. |
| AnnaBridge | 171:3a7713b1edbc | 274 | */ |
| AnnaBridge | 171:3a7713b1edbc | 275 | #define EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask) ((((eadc)->STATUS0 >> EADC_STATUS0_OV_Pos) | ((eadc)->STATUS1 & EADC_STATUS1_OV_Msk)) & (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 276 | |
| AnnaBridge | 171:3a7713b1edbc | 277 | /** |
| AnnaBridge | 171:3a7713b1edbc | 278 | * @brief Get the data valid flag of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 279 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 280 | * @param[in] u32ModuleMask The combination of data valid status bits. Each bit corresponds to a data valid status, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 281 | * @return Return the data valid flag of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 282 | * @details This macro is used to read VALID bit (EADC_STATUS0[15:0], EADC_STATUS1[1:0]) field to get data overrun status. |
| AnnaBridge | 171:3a7713b1edbc | 283 | */ |
| AnnaBridge | 171:3a7713b1edbc | 284 | #define EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask) ((((eadc)->STATUS0 & EADC_STATUS0_VALID_Msk) | (((eadc)->STATUS1 & EADC_STATUS1_VALID_Msk) << 16)) & (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 285 | |
| AnnaBridge | 171:3a7713b1edbc | 286 | /** |
| AnnaBridge | 171:3a7713b1edbc | 287 | * @brief Get the double data of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 288 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 289 | * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 290 | * @return Return the double data of the user-specified sample module. |
| AnnaBridge | 171:3a7713b1edbc | 291 | * @details This macro is used to read RESULT bit (EADC_DDATn[15:0], n=0~3) field to get conversion data. |
| AnnaBridge | 171:3a7713b1edbc | 292 | */ |
| AnnaBridge | 171:3a7713b1edbc | 293 | #define EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum) ((eadc)->DDAT[(u32ModuleNum)] & EADC_DDAT_RESULT_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 294 | |
| AnnaBridge | 171:3a7713b1edbc | 295 | /** |
| AnnaBridge | 171:3a7713b1edbc | 296 | * @brief Get the user-specified interrupt flags. |
| AnnaBridge | 171:3a7713b1edbc | 297 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 298 | * @param[in] u32Mask The combination of interrupt status bits. Each bit corresponds to a interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 299 | * Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. |
| AnnaBridge | 171:3a7713b1edbc | 300 | * Bit 4 is ADCMPF0, bit 5 is ADCMPF1..., bit 7 is ADCMPF3. |
| AnnaBridge | 171:3a7713b1edbc | 301 | * @return Return the user-specified interrupt flags. |
| AnnaBridge | 171:3a7713b1edbc | 302 | * @details This macro is used to get the user-specified interrupt flags. |
| AnnaBridge | 171:3a7713b1edbc | 303 | */ |
| AnnaBridge | 171:3a7713b1edbc | 304 | #define EADC_GET_INT_FLAG(eadc, u32Mask) ((eadc)->STATUS2 & (u32Mask)) |
| AnnaBridge | 171:3a7713b1edbc | 305 | |
| AnnaBridge | 171:3a7713b1edbc | 306 | /** |
| AnnaBridge | 171:3a7713b1edbc | 307 | * @brief Get the user-specified sample module overrun flags. |
| AnnaBridge | 171:3a7713b1edbc | 308 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 309 | * @param[in] u32ModuleMask The combination of sample module overrun status bits. Each bit corresponds to a sample module overrun status, valid range are between 1~0x7FFFF. |
| AnnaBridge | 171:3a7713b1edbc | 310 | * @return Return the user-specified sample module overrun flags. |
| AnnaBridge | 171:3a7713b1edbc | 311 | * @details This macro is used to get the user-specified sample module overrun flags. |
| AnnaBridge | 171:3a7713b1edbc | 312 | */ |
| AnnaBridge | 171:3a7713b1edbc | 313 | #define EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask) ((eadc)->OVSTS & (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 314 | |
| AnnaBridge | 171:3a7713b1edbc | 315 | /** |
| AnnaBridge | 171:3a7713b1edbc | 316 | * @brief Clear the selected interrupt status bits. |
| AnnaBridge | 171:3a7713b1edbc | 317 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 318 | * @param[in] u32Mask The combination of compare interrupt status bits. Each bit corresponds to a compare interrupt status. |
| AnnaBridge | 171:3a7713b1edbc | 319 | * Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. |
| AnnaBridge | 171:3a7713b1edbc | 320 | * Bit 4 is ADCMPF0, bit 5 is ADCMPF1..., bit 7 is ADCMPF3. |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 322 | * @details This macro is used to clear clear the selected interrupt status bits. |
| AnnaBridge | 171:3a7713b1edbc | 323 | */ |
| AnnaBridge | 171:3a7713b1edbc | 324 | #define EADC_CLR_INT_FLAG(eadc, u32Mask) ((eadc)->STATUS2 = (u32Mask)) |
| AnnaBridge | 171:3a7713b1edbc | 325 | |
| AnnaBridge | 171:3a7713b1edbc | 326 | /** |
| AnnaBridge | 171:3a7713b1edbc | 327 | * @brief Clear the selected sample module overrun status bits. |
| AnnaBridge | 171:3a7713b1edbc | 328 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 329 | * @param[in] u32ModuleMask The combination of sample module overrun status bits. Each bit corresponds to a sample module overrun status. |
| AnnaBridge | 171:3a7713b1edbc | 330 | * Bit 0 is SPOVF0, bit 1 is SPOVF1..., bit 18 is SPOVF18. |
| AnnaBridge | 171:3a7713b1edbc | 331 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 332 | * @details This macro is used to clear the selected sample module overrun status bits. |
| AnnaBridge | 171:3a7713b1edbc | 333 | */ |
| AnnaBridge | 171:3a7713b1edbc | 334 | #define EADC_CLR_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask) ((eadc)->OVSTS = (u32ModuleMask)) |
| AnnaBridge | 171:3a7713b1edbc | 335 | |
| AnnaBridge | 171:3a7713b1edbc | 336 | /** |
| AnnaBridge | 171:3a7713b1edbc | 337 | * @brief Check all sample module A/D result data register overrun flags. |
| AnnaBridge | 171:3a7713b1edbc | 338 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 339 | * @retval 0 None of sample module data register overrun flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 340 | * @retval 1 Any one of sample module data register overrun flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 341 | * @details The AOV bit (EADC_STATUS2[27]) will keep 1 when any one of sample module data register overrun flag OVn (EADC_DATn[16]) is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 342 | */ |
| AnnaBridge | 171:3a7713b1edbc | 343 | #define EADC_IS_DATA_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_AOV_Msk) >> EADC_STATUS2_AOV_Pos) |
| AnnaBridge | 171:3a7713b1edbc | 344 | |
| AnnaBridge | 171:3a7713b1edbc | 345 | /** |
| AnnaBridge | 171:3a7713b1edbc | 346 | * @brief Check all sample module A/D result data register valid flags. |
| AnnaBridge | 171:3a7713b1edbc | 347 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 348 | * @retval 0 None of sample module data register valid flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 349 | * @retval 1 Any one of sample module data register valid flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 350 | * @details The AVALID bit (EADC_STATUS2[26]) will keep 1 when any one of sample module data register valid flag VALIDn (EADC_DATn[17]) is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 351 | */ |
| AnnaBridge | 171:3a7713b1edbc | 352 | #define EADC_IS_DATA_VALID(eadc) (((eadc)->STATUS2 & EADC_STATUS2_AVALID_Msk) >> EADC_STATUS2_AVALID_Pos) |
| AnnaBridge | 171:3a7713b1edbc | 353 | |
| AnnaBridge | 171:3a7713b1edbc | 354 | /** |
| AnnaBridge | 171:3a7713b1edbc | 355 | * @brief Check all A/D sample module start of conversion overrun flags. |
| AnnaBridge | 171:3a7713b1edbc | 356 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 357 | * @retval 0 None of sample module event overrun flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 358 | * @retval 1 Any one of sample module event overrun flag is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 359 | * @details The STOVF bit (EADC_STATUS2[25]) will keep 1 when any one of sample module event overrun flag SPOVFn (EADC_OVSTS[n]) is set to 1. |
| AnnaBridge | 171:3a7713b1edbc | 360 | */ |
| AnnaBridge | 171:3a7713b1edbc | 361 | #define EADC_IS_SAMPLE_MODULE_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_STOVF_Msk) >> EADC_STATUS2_STOVF_Pos) |
| AnnaBridge | 171:3a7713b1edbc | 362 | |
| AnnaBridge | 171:3a7713b1edbc | 363 | /** |
| AnnaBridge | 171:3a7713b1edbc | 364 | * @brief Check all A/D interrupt flag overrun bits. |
| AnnaBridge | 171:3a7713b1edbc | 365 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 366 | * @retval 0 None of ADINT interrupt flag is overwritten to 1. |
| AnnaBridge | 171:3a7713b1edbc | 367 | * @retval 1 Any one of ADINT interrupt flag is overwritten to 1. |
| AnnaBridge | 171:3a7713b1edbc | 368 | * @details The ADOVIF bit (EADC_STATUS2[24]) will keep 1 when any one of ADINT interrupt flag ADOVIFn (EADC_STATUS2[11:8]) is overwritten to 1. |
| AnnaBridge | 171:3a7713b1edbc | 369 | */ |
| AnnaBridge | 171:3a7713b1edbc | 370 | #define EADC_IS_INT_FLAG_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_ADOVIF_Msk) >> EADC_STATUS2_ADOVIF_Pos) |
| AnnaBridge | 171:3a7713b1edbc | 371 | |
| AnnaBridge | 171:3a7713b1edbc | 372 | /** |
| AnnaBridge | 171:3a7713b1edbc | 373 | * @brief Get the busy state of EADC. |
| AnnaBridge | 171:3a7713b1edbc | 374 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 375 | * @retval 0 Idle state. |
| AnnaBridge | 171:3a7713b1edbc | 376 | * @retval 1 Busy state. |
| AnnaBridge | 171:3a7713b1edbc | 377 | * @details This macro is used to read BUSY bit (EADC_STATUS2[23]) to get busy state. |
| AnnaBridge | 171:3a7713b1edbc | 378 | */ |
| AnnaBridge | 171:3a7713b1edbc | 379 | #define EADC_IS_BUSY(eadc) (((eadc)->STATUS2 & EADC_STATUS2_BUSY_Msk) >> EADC_STATUS2_BUSY_Pos) |
| AnnaBridge | 171:3a7713b1edbc | 380 | |
| AnnaBridge | 171:3a7713b1edbc | 381 | /** |
| AnnaBridge | 171:3a7713b1edbc | 382 | * @brief Configure the comparator 0 and enable it. |
| AnnaBridge | 171:3a7713b1edbc | 383 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 384 | * @param[in] u32ModuleNum specifies the compare sample module, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 385 | * @param[in] u32Condition specifies the compare condition. Valid values are: |
| AnnaBridge | 171:3a7713b1edbc | 386 | * - \ref EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" |
| AnnaBridge | 171:3a7713b1edbc | 387 | * - \ref EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value |
| AnnaBridge | 171:3a7713b1edbc | 388 | * @param[in] u16CMPData specifies the compare value, valid range are between 0~0xFFF. |
| AnnaBridge | 171:3a7713b1edbc | 389 | * @param[in] u32MatchCount specifies the match count setting, valid range are between 0~0xF. |
| AnnaBridge | 171:3a7713b1edbc | 390 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 391 | * @details For example, ADC_ENABLE_CMP0(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_CMPWEN_DISABLE, EADC_CMP_ADCMPIE_ENABLE); |
| AnnaBridge | 171:3a7713b1edbc | 392 | * Means EADC will assert comparator 0 flag if sample module 5 conversion result is greater or |
| AnnaBridge | 171:3a7713b1edbc | 393 | * equal to 0x800 for 10 times continuously, and a compare interrupt request is generated. |
| AnnaBridge | 171:3a7713b1edbc | 394 | */ |
| AnnaBridge | 171:3a7713b1edbc | 395 | #define EADC_ENABLE_CMP0(eadc,\ |
| AnnaBridge | 171:3a7713b1edbc | 396 | u32ModuleNum,\ |
| AnnaBridge | 171:3a7713b1edbc | 397 | u32Condition,\ |
| AnnaBridge | 171:3a7713b1edbc | 398 | u16CMPData,\ |
| AnnaBridge | 171:3a7713b1edbc | 399 | u32MatchCount) ((eadc)->CMP[0] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 400 | (u32Condition) |\ |
| AnnaBridge | 171:3a7713b1edbc | 401 | ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \ |
| AnnaBridge | 171:3a7713b1edbc | 402 | (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 403 | EADC_CMP_ADCMPEN_Msk)) |
| AnnaBridge | 171:3a7713b1edbc | 404 | |
| AnnaBridge | 171:3a7713b1edbc | 405 | /** |
| AnnaBridge | 171:3a7713b1edbc | 406 | * @brief Configure the comparator 1 and enable it. |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @param[in] u32ModuleNum specifies the compare sample module, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @param[in] u32Condition specifies the compare condition. Valid values are: |
| AnnaBridge | 171:3a7713b1edbc | 410 | * - \ref EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" |
| AnnaBridge | 171:3a7713b1edbc | 411 | * - \ref EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value |
| AnnaBridge | 171:3a7713b1edbc | 412 | * @param[in] u16CMPData specifies the compare value, valid range are between 0~0xFFF. |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @param[in] u32MatchCount specifies the match count setting, valid range are between 0~0xF. |
| AnnaBridge | 171:3a7713b1edbc | 414 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 415 | * @details For example, ADC_ENABLE_CMP1(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_ADCMPIE_ENABLE); |
| AnnaBridge | 171:3a7713b1edbc | 416 | * Means EADC will assert comparator 1 flag if sample module 5 conversion result is greater or |
| AnnaBridge | 171:3a7713b1edbc | 417 | * equal to 0x800 for 10 times continuously, and a compare interrupt request is generated. |
| AnnaBridge | 171:3a7713b1edbc | 418 | */ |
| AnnaBridge | 171:3a7713b1edbc | 419 | #define EADC_ENABLE_CMP1(eadc,\ |
| AnnaBridge | 171:3a7713b1edbc | 420 | u32ModuleNum,\ |
| AnnaBridge | 171:3a7713b1edbc | 421 | u32Condition,\ |
| AnnaBridge | 171:3a7713b1edbc | 422 | u16CMPData,\ |
| AnnaBridge | 171:3a7713b1edbc | 423 | u32MatchCount) ((eadc)->CMP[1] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 424 | (u32Condition) |\ |
| AnnaBridge | 171:3a7713b1edbc | 425 | ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \ |
| AnnaBridge | 171:3a7713b1edbc | 426 | (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 427 | EADC_CMP_ADCMPEN_Msk)) |
| AnnaBridge | 171:3a7713b1edbc | 428 | |
| AnnaBridge | 171:3a7713b1edbc | 429 | /** |
| AnnaBridge | 171:3a7713b1edbc | 430 | * @brief Configure the comparator 2 and enable it. |
| AnnaBridge | 171:3a7713b1edbc | 431 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 432 | * @param[in] u32ModuleNum specifies the compare sample module, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 433 | * @param[in] u32Condition specifies the compare condition. Valid values are: |
| AnnaBridge | 171:3a7713b1edbc | 434 | * - \ref EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" |
| AnnaBridge | 171:3a7713b1edbc | 435 | * - \ref EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value |
| AnnaBridge | 171:3a7713b1edbc | 436 | * @param[in] u16CMPData specifies the compare value, valid range are between 0~0xFFF. |
| AnnaBridge | 171:3a7713b1edbc | 437 | * @param[in] u32MatchCount specifies the match count setting, valid range are between 0~0xF. |
| AnnaBridge | 171:3a7713b1edbc | 438 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 439 | * @details For example, ADC_ENABLE_CMP2(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_CMPWEN_DISABLE, EADC_CMP_ADCMPIE_ENABLE); |
| AnnaBridge | 171:3a7713b1edbc | 440 | * Means EADC will assert comparator 2 flag if sample module 5 conversion result is greater or |
| AnnaBridge | 171:3a7713b1edbc | 441 | * equal to 0x800 for 10 times continuously, and a compare interrupt request is generated. |
| AnnaBridge | 171:3a7713b1edbc | 442 | */ |
| AnnaBridge | 171:3a7713b1edbc | 443 | #define EADC_ENABLE_CMP2(eadc,\ |
| AnnaBridge | 171:3a7713b1edbc | 444 | u32ModuleNum,\ |
| AnnaBridge | 171:3a7713b1edbc | 445 | u32Condition,\ |
| AnnaBridge | 171:3a7713b1edbc | 446 | u16CMPData,\ |
| AnnaBridge | 171:3a7713b1edbc | 447 | u32MatchCount) ((eadc)->CMP[2] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 448 | (u32Condition) |\ |
| AnnaBridge | 171:3a7713b1edbc | 449 | ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \ |
| AnnaBridge | 171:3a7713b1edbc | 450 | (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 451 | EADC_CMP_ADCMPEN_Msk)) |
| AnnaBridge | 171:3a7713b1edbc | 452 | |
| AnnaBridge | 171:3a7713b1edbc | 453 | /** |
| AnnaBridge | 171:3a7713b1edbc | 454 | * @brief Configure the comparator 3 and enable it. |
| AnnaBridge | 171:3a7713b1edbc | 455 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 456 | * @param[in] u32ModuleNum specifies the compare sample module, valid value are from 0 to 18. |
| AnnaBridge | 171:3a7713b1edbc | 457 | * @param[in] u32Condition specifies the compare condition. Valid values are: |
| AnnaBridge | 171:3a7713b1edbc | 458 | * - \ref EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" |
| AnnaBridge | 171:3a7713b1edbc | 459 | * - \ref EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value |
| AnnaBridge | 171:3a7713b1edbc | 460 | * @param[in] u16CMPData specifies the compare value, valid range are between 0~0xFFF. |
| AnnaBridge | 171:3a7713b1edbc | 461 | * @param[in] u32MatchCount specifies the match count setting, valid range are between 1~0xF. |
| AnnaBridge | 171:3a7713b1edbc | 462 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 463 | * @details For example, ADC_ENABLE_CMP3(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_ADCMPIE_ENABLE); |
| AnnaBridge | 171:3a7713b1edbc | 464 | * Means EADC will assert comparator 3 flag if sample module 5 conversion result is greater or |
| AnnaBridge | 171:3a7713b1edbc | 465 | * equal to 0x800 for 10 times continuously, and a compare interrupt request is generated. |
| AnnaBridge | 171:3a7713b1edbc | 466 | */ |
| AnnaBridge | 171:3a7713b1edbc | 467 | #define EADC_ENABLE_CMP3(eadc,\ |
| AnnaBridge | 171:3a7713b1edbc | 468 | u32ModuleNum,\ |
| AnnaBridge | 171:3a7713b1edbc | 469 | u32Condition,\ |
| AnnaBridge | 171:3a7713b1edbc | 470 | u16CMPData,\ |
| AnnaBridge | 171:3a7713b1edbc | 471 | u32MatchCount) ((eadc)->CMP[3] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 472 | (u32Condition) |\ |
| AnnaBridge | 171:3a7713b1edbc | 473 | ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \ |
| AnnaBridge | 171:3a7713b1edbc | 474 | (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\ |
| AnnaBridge | 171:3a7713b1edbc | 475 | EADC_CMP_ADCMPEN_Msk)) |
| AnnaBridge | 171:3a7713b1edbc | 476 | |
| AnnaBridge | 171:3a7713b1edbc | 477 | /** |
| AnnaBridge | 171:3a7713b1edbc | 478 | * @brief Enable the compare window mode. |
| AnnaBridge | 171:3a7713b1edbc | 479 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 480 | * @param[in] u32CMP Specifies the compare register, valid value are 0 and 2. |
| AnnaBridge | 171:3a7713b1edbc | 481 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 482 | * @details ADCMPF0 (EADC_STATUS2[4]) will be set when both EADC_CMP0 and EADC_CMP1 compared condition matched. |
| AnnaBridge | 171:3a7713b1edbc | 483 | */ |
| AnnaBridge | 171:3a7713b1edbc | 484 | #define EADC_ENABLE_CMP_WINDOW_MODE(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] |= EADC_CMP_CMPWEN_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 485 | |
| AnnaBridge | 171:3a7713b1edbc | 486 | /** |
| AnnaBridge | 171:3a7713b1edbc | 487 | * @brief Disable the compare window mode. |
| AnnaBridge | 171:3a7713b1edbc | 488 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 489 | * @param[in] u32CMP Specifies the compare register, valid value are 0 and 2. |
| AnnaBridge | 171:3a7713b1edbc | 490 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 491 | * @details ADCMPF2 (EADC_STATUS2[6]) will be set when both EADC_CMP2 and EADC_CMP3 compared condition matched. |
| AnnaBridge | 171:3a7713b1edbc | 492 | */ |
| AnnaBridge | 171:3a7713b1edbc | 493 | #define EADC_DISABLE_CMP_WINDOW_MODE(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_CMPWEN_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 494 | |
| AnnaBridge | 171:3a7713b1edbc | 495 | /** |
| AnnaBridge | 171:3a7713b1edbc | 496 | * @brief Enable the compare interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 497 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 498 | * @param[in] u32CMP Specifies the compare register, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 499 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 500 | * @details If the compare function is enabled and the compare condition matches the setting of CMPCOND (EADC_CMPn[2], n=0~3) |
| AnnaBridge | 171:3a7713b1edbc | 501 | * and CMPMCNT (EADC_CMPn[11:8], n=0~3), ADCMPFn (EADC_STATUS2[7:4], n=0~3) will be asserted, in the meanwhile, |
| AnnaBridge | 171:3a7713b1edbc | 502 | * if ADCMPIE is set to 1, a compare interrupt request is generated. |
| AnnaBridge | 171:3a7713b1edbc | 503 | */ |
| AnnaBridge | 171:3a7713b1edbc | 504 | #define EADC_ENABLE_CMP_INT(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] |= EADC_CMP_ADCMPIE_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 505 | |
| AnnaBridge | 171:3a7713b1edbc | 506 | /** |
| AnnaBridge | 171:3a7713b1edbc | 507 | * @brief Disable the compare interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 508 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 509 | * @param[in] u32CMP Specifies the compare register, valid value are from 0 to 3. |
| AnnaBridge | 171:3a7713b1edbc | 510 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 511 | * @details This macro is used to disable the compare interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 512 | */ |
| AnnaBridge | 171:3a7713b1edbc | 513 | #define EADC_DISABLE_CMP_INT(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_ADCMPIE_Msk) |
| AnnaBridge | 171:3a7713b1edbc | 514 | |
| AnnaBridge | 171:3a7713b1edbc | 515 | /** |
| AnnaBridge | 171:3a7713b1edbc | 516 | * @brief Disable comparator 0. |
| AnnaBridge | 171:3a7713b1edbc | 517 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 518 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 519 | * @details This macro is used to disable comparator 0. |
| AnnaBridge | 171:3a7713b1edbc | 520 | */ |
| AnnaBridge | 171:3a7713b1edbc | 521 | #define EADC_DISABLE_CMP0(eadc) ((eadc)->CMP[0] = 0) |
| AnnaBridge | 171:3a7713b1edbc | 522 | |
| AnnaBridge | 171:3a7713b1edbc | 523 | /** |
| AnnaBridge | 171:3a7713b1edbc | 524 | * @brief Disable comparator 1. |
| AnnaBridge | 171:3a7713b1edbc | 525 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 526 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 527 | * @details This macro is used to disable comparator 1. |
| AnnaBridge | 171:3a7713b1edbc | 528 | */ |
| AnnaBridge | 171:3a7713b1edbc | 529 | #define EADC_DISABLE_CMP1(eadc) ((eadc)->CMP[1] = 0) |
| AnnaBridge | 171:3a7713b1edbc | 530 | |
| AnnaBridge | 171:3a7713b1edbc | 531 | /** |
| AnnaBridge | 171:3a7713b1edbc | 532 | * @brief Disable comparator 2. |
| AnnaBridge | 171:3a7713b1edbc | 533 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 534 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 535 | * @details This macro is used to disable comparator 2. |
| AnnaBridge | 171:3a7713b1edbc | 536 | */ |
| AnnaBridge | 171:3a7713b1edbc | 537 | #define EADC_DISABLE_CMP2(eadc) ((eadc)->CMP[2] = 0) |
| AnnaBridge | 171:3a7713b1edbc | 538 | |
| AnnaBridge | 171:3a7713b1edbc | 539 | /** |
| AnnaBridge | 171:3a7713b1edbc | 540 | * @brief Disable comparator 3. |
| AnnaBridge | 171:3a7713b1edbc | 541 | * @param[in] eadc The pointer of the specified EADC module. |
| AnnaBridge | 171:3a7713b1edbc | 542 | * @return None |
| AnnaBridge | 171:3a7713b1edbc | 543 | * @details This macro is used to disable comparator 3. |
| AnnaBridge | 171:3a7713b1edbc | 544 | */ |
| AnnaBridge | 171:3a7713b1edbc | 545 | #define EADC_DISABLE_CMP3(eadc) ((eadc)->CMP[3] = 0) |
| AnnaBridge | 171:3a7713b1edbc | 546 | |
| AnnaBridge | 171:3a7713b1edbc | 547 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 548 | /* Define EADC functions prototype */ |
| AnnaBridge | 171:3a7713b1edbc | 549 | /*---------------------------------------------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 550 | void EADC_Open(EADC_T *eadc, uint32_t u32InputMode); |
| AnnaBridge | 171:3a7713b1edbc | 551 | void EADC_Close(EADC_T *eadc); |
| AnnaBridge | 171:3a7713b1edbc | 552 | void EADC_ConfigSampleModule(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSource, uint32_t u32Channel); |
| AnnaBridge | 171:3a7713b1edbc | 553 | void EADC_SetTriggerDelayTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider); |
| AnnaBridge | 171:3a7713b1edbc | 554 | void EADC_SetInternalSampleTime(EADC_T *eadc, uint32_t u32SampleTime); |
| AnnaBridge | 171:3a7713b1edbc | 555 | void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime); |
| AnnaBridge | 171:3a7713b1edbc | 556 | |
| AnnaBridge | 171:3a7713b1edbc | 557 | /*@}*/ /* end of group EADC_EXPORTED_FUNCTIONS */ |
| AnnaBridge | 171:3a7713b1edbc | 558 | |
| AnnaBridge | 171:3a7713b1edbc | 559 | /*@}*/ /* end of group EADC_Driver */ |
| AnnaBridge | 171:3a7713b1edbc | 560 | |
| AnnaBridge | 171:3a7713b1edbc | 561 | /*@}*/ /* end of group Standard_Driver */ |
| AnnaBridge | 171:3a7713b1edbc | 562 | |
| AnnaBridge | 171:3a7713b1edbc | 563 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 564 | } |
| AnnaBridge | 171:3a7713b1edbc | 565 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 566 | |
| AnnaBridge | 171:3a7713b1edbc | 567 | #endif //__EADC_H__ |
| AnnaBridge | 171:3a7713b1edbc | 568 | |
| AnnaBridge | 171:3a7713b1edbc | 569 | /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/ |
