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mbed 2

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Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

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AnnaBridge 171:3a7713b1edbc 1 /******************************************************************************
AnnaBridge 171:3a7713b1edbc 2 * @file dac.h
AnnaBridge 171:3a7713b1edbc 3 * @version V0.10
AnnaBridge 171:3a7713b1edbc 4 * $Revision: 12 $
AnnaBridge 171:3a7713b1edbc 5 * $Date: 15/08/11 10:26a $
AnnaBridge 171:3a7713b1edbc 6 * @brief M451 series DAC driver header file
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * @note
AnnaBridge 171:3a7713b1edbc 9 * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 171:3a7713b1edbc 10 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 11 #ifndef __DAC_H__
AnnaBridge 171:3a7713b1edbc 12 #define __DAC_H__
AnnaBridge 171:3a7713b1edbc 13
AnnaBridge 171:3a7713b1edbc 14 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 15 /* Include related headers */
AnnaBridge 171:3a7713b1edbc 16 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 17 #include "M451Series.h"
AnnaBridge 171:3a7713b1edbc 18
AnnaBridge 171:3a7713b1edbc 19
AnnaBridge 171:3a7713b1edbc 20 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 21 extern "C"
AnnaBridge 171:3a7713b1edbc 22 {
AnnaBridge 171:3a7713b1edbc 23 #endif
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25
AnnaBridge 171:3a7713b1edbc 26 /** @addtogroup Standard_Driver Standard Driver
AnnaBridge 171:3a7713b1edbc 27 @{
AnnaBridge 171:3a7713b1edbc 28 */
AnnaBridge 171:3a7713b1edbc 29
AnnaBridge 171:3a7713b1edbc 30 /** @addtogroup DAC_Driver DAC Driver
AnnaBridge 171:3a7713b1edbc 31 @{
AnnaBridge 171:3a7713b1edbc 32 */
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /** @addtogroup DAC_EXPORTED_CONSTANTS DAC Exported Constants
AnnaBridge 171:3a7713b1edbc 36 @{
AnnaBridge 171:3a7713b1edbc 37 */
AnnaBridge 171:3a7713b1edbc 38
AnnaBridge 171:3a7713b1edbc 39 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 40 /* DAC_CTL Constant Definitions */
AnnaBridge 171:3a7713b1edbc 41 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 42 #define DAC_CTL_LALIGN_RIGHT_ALIGN (0UL<<DAC_CTL_LALIGN_Pos) /*!< Right alignment. */
AnnaBridge 171:3a7713b1edbc 43 #define DAC_CTL_LALIGN_LEFT_ALIGN (1UL<<DAC_CTL_LALIGN_Pos) /*!< Left alignment */
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 #define DAC_WRITE_DAT_TRIGGER (0UL) /*!< Write DAC_DAT trigger */
AnnaBridge 171:3a7713b1edbc 46 #define DAC_SOFTWARE_TRIGGER (0UL|DAC_CTL_TRGEN_Msk) /*!< Software trigger */
AnnaBridge 171:3a7713b1edbc 47 #define DAC_LOW_LEVEL_TRIGGER ((0UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin low level trigger */
AnnaBridge 171:3a7713b1edbc 48 #define DAC_HIGH_LEVEL_TRIGGER ((1UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin high level trigger */
AnnaBridge 171:3a7713b1edbc 49 #define DAC_FALLING_EDGE_TRIGGER ((2UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin falling edge trigger */
AnnaBridge 171:3a7713b1edbc 50 #define DAC_RISING_EDGE_TRIGGER ((3UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin rising edge trigger */
AnnaBridge 171:3a7713b1edbc 51 #define DAC_TIMER0_TRIGGER ((2UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 0 trigger */
AnnaBridge 171:3a7713b1edbc 52 #define DAC_TIMER1_TRIGGER ((3UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 1 trigger */
AnnaBridge 171:3a7713b1edbc 53 #define DAC_TIMER2_TRIGGER ((4UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 2 trigger */
AnnaBridge 171:3a7713b1edbc 54 #define DAC_TIMER3_TRIGGER ((5UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 3 trigger */
AnnaBridge 171:3a7713b1edbc 55 #define DAC_PWM0_TRIGGER ((6UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< PWM0 trigger */
AnnaBridge 171:3a7713b1edbc 56 #define DAC_PWM1_TRIGGER ((7UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< PWM1 trigger */
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 #define DAC_TRIGGER_MODE_DISABLE (0UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode disable */
AnnaBridge 171:3a7713b1edbc 59 #define DAC_TRIGGER_MODE_ENABLE (1UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode enable */
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /*@}*/ /* end of group DAC_EXPORTED_CONSTANTS */
AnnaBridge 171:3a7713b1edbc 63
AnnaBridge 171:3a7713b1edbc 64
AnnaBridge 171:3a7713b1edbc 65 /** @addtogroup DAC_EXPORTED_FUNCTIONS DAC Exported Functions
AnnaBridge 171:3a7713b1edbc 66 @{
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 69 /* DAC Macro Definitions */
AnnaBridge 171:3a7713b1edbc 70 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 /**
AnnaBridge 171:3a7713b1edbc 73 * @brief Start the D/A conversion.
AnnaBridge 171:3a7713b1edbc 74 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 75 * @return None
AnnaBridge 171:3a7713b1edbc 76 * @details User writes SWTRG bit (DAC_SWTRG[0]) to generate one shot pulse and it is cleared to 0 by hardware automatically.
AnnaBridge 171:3a7713b1edbc 77 */
AnnaBridge 171:3a7713b1edbc 78 #define DAC_START_CONV(dac) ((dac)->SWTRG = DAC_SWTRG_SWTRG_Msk)
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /**
AnnaBridge 171:3a7713b1edbc 81 * @brief Enable DAC data left-aligned.
AnnaBridge 171:3a7713b1edbc 82 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 83 * @return None
AnnaBridge 171:3a7713b1edbc 84 * @details User has to load data into DAC_DAT[15:4] bits. DAC_DAT[31:16] and DAC_DAT[3:0] are ignored in DAC conversion.
AnnaBridge 171:3a7713b1edbc 85 */
AnnaBridge 171:3a7713b1edbc 86 #define DAC_ENABLE_LEFT_ALIGN(dac) ((dac)->CTL |= DAC_CTL_LALIGN_Msk)
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 /**
AnnaBridge 171:3a7713b1edbc 89 * @brief Enable DAC data right-aligned.
AnnaBridge 171:3a7713b1edbc 90 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 91 * @return None
AnnaBridge 171:3a7713b1edbc 92 * @details User has to load data into DAC_DAT[11:0] bits, DAC_DAT[31:12] are ignored in DAC conversion.
AnnaBridge 171:3a7713b1edbc 93 */
AnnaBridge 171:3a7713b1edbc 94 #define DAC_ENABLE_RIGHT_ALIGN(dac) ((dac)->CTL &= ~DAC_CTL_LALIGN_Msk)
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96 /**
AnnaBridge 171:3a7713b1edbc 97 * @brief Enable output voltage buffer.
AnnaBridge 171:3a7713b1edbc 98 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 99 * @return None
AnnaBridge 171:3a7713b1edbc 100 * @details The DAC integrates a voltage output buffer that can be used to reduce output impedance and
AnnaBridge 171:3a7713b1edbc 101 * drive external loads directly without having to add an external operational amplifier.
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103 #define DAC_ENABLE_BYPASS_BUFFER(dac) ((dac)->CTL |= DAC_CTL_BYPASS_Msk)
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /**
AnnaBridge 171:3a7713b1edbc 106 * @brief Disable output voltage buffer.
AnnaBridge 171:3a7713b1edbc 107 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 108 * @return None
AnnaBridge 171:3a7713b1edbc 109 * @details This macro is used to disable output voltage buffer.
AnnaBridge 171:3a7713b1edbc 110 */
AnnaBridge 171:3a7713b1edbc 111 #define DAC_DISABLE_BYPASS_BUFFER(dac) ((dac)->CTL &= ~DAC_CTL_BYPASS_Msk)
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 /**
AnnaBridge 171:3a7713b1edbc 114 * @brief Enable the interrupt.
AnnaBridge 171:3a7713b1edbc 115 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 116 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 117 * @return None
AnnaBridge 171:3a7713b1edbc 118 * @details This macro is used to enable DAC interrupt.
AnnaBridge 171:3a7713b1edbc 119 */
AnnaBridge 171:3a7713b1edbc 120 #define DAC_ENABLE_INT(dac, u32Ch) ((dac)->CTL |= DAC_CTL_DACIEN_Msk)
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 /**
AnnaBridge 171:3a7713b1edbc 123 * @brief Disable the interrupt.
AnnaBridge 171:3a7713b1edbc 124 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 125 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 126 * @return None
AnnaBridge 171:3a7713b1edbc 127 * @details This macro is used to disable DAC interrupt.
AnnaBridge 171:3a7713b1edbc 128 */
AnnaBridge 171:3a7713b1edbc 129 #define DAC_DISABLE_INT(dac, u32Ch) ((dac)->CTL &= ~DAC_CTL_DACIEN_Msk)
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 /**
AnnaBridge 171:3a7713b1edbc 132 * @brief Enable DMA under-run interrupt.
AnnaBridge 171:3a7713b1edbc 133 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 134 * @return None
AnnaBridge 171:3a7713b1edbc 135 * @details This macro is used to enable DMA under-run interrupt.
AnnaBridge 171:3a7713b1edbc 136 */
AnnaBridge 171:3a7713b1edbc 137 #define DAC_ENABLE_DMAUDR_INT(dac) ((dac)->CTL |= DAC_CTL_DMAURIEN_Msk)
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 /**
AnnaBridge 171:3a7713b1edbc 140 * @brief Disable DMA under-run interrupt.
AnnaBridge 171:3a7713b1edbc 141 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 142 * @return None
AnnaBridge 171:3a7713b1edbc 143 * @details This macro is used to disable DMA under-run interrupt.
AnnaBridge 171:3a7713b1edbc 144 */
AnnaBridge 171:3a7713b1edbc 145 #define DAC_DISABLE_DMAUDR_INT(dac) ((dac)->CTL &= ~DAC_CTL_DMAURIEN_Msk)
AnnaBridge 171:3a7713b1edbc 146
AnnaBridge 171:3a7713b1edbc 147 /**
AnnaBridge 171:3a7713b1edbc 148 * @brief Enable PDMA mode.
AnnaBridge 171:3a7713b1edbc 149 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 150 * @return None
AnnaBridge 171:3a7713b1edbc 151 * @details DAC DMA request is generated when a hardware trigger event occurs while DMAEN (DAC_CTL[2]) is set.
AnnaBridge 171:3a7713b1edbc 152 */
AnnaBridge 171:3a7713b1edbc 153 #define DAC_ENABLE_PDMA(dac) ((dac)->CTL |= DAC_CTL_DMAEN_Msk)
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 /**
AnnaBridge 171:3a7713b1edbc 156 * @brief Disable PDMA mode.
AnnaBridge 171:3a7713b1edbc 157 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 158 * @return None
AnnaBridge 171:3a7713b1edbc 159 * @details This macro is used to disable DMA mode.
AnnaBridge 171:3a7713b1edbc 160 */
AnnaBridge 171:3a7713b1edbc 161 #define DAC_DISABLE_PDMA(dac) ((dac)->CTL &= ~DAC_CTL_DMAEN_Msk)
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 /**
AnnaBridge 171:3a7713b1edbc 164 * @brief Write data for conversion.
AnnaBridge 171:3a7713b1edbc 165 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 166 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 167 * @param[in] u32Data Decides the data for conversion, valid range are between 0~0xFFF.
AnnaBridge 171:3a7713b1edbc 168 * @return None
AnnaBridge 171:3a7713b1edbc 169 * @details 12 bit left alignment: user has to load data into DAC_DAT[15:4] bits.
AnnaBridge 171:3a7713b1edbc 170 * 12 bit right alignment: user has to load data into DAC_DAT[11:0] bits.
AnnaBridge 171:3a7713b1edbc 171 */
AnnaBridge 171:3a7713b1edbc 172 #define DAC_WRITE_DATA(dac, u32Ch, u32Data) ((dac)->DAT = (u32Data))
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /**
AnnaBridge 171:3a7713b1edbc 175 * @brief Read DAC 12-bit holding data.
AnnaBridge 171:3a7713b1edbc 176 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 177 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 178 * @return Return DAC 12-bit holding data.
AnnaBridge 171:3a7713b1edbc 179 * @details This macro is used to read DAC_DAT register.
AnnaBridge 171:3a7713b1edbc 180 */
AnnaBridge 171:3a7713b1edbc 181 #define DAC_READ_DATA(dac, u32Ch) ((dac)->DAT)
AnnaBridge 171:3a7713b1edbc 182
AnnaBridge 171:3a7713b1edbc 183 /**
AnnaBridge 171:3a7713b1edbc 184 * @brief Get the busy state of DAC.
AnnaBridge 171:3a7713b1edbc 185 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 186 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 187 * @retval 0 Idle state.
AnnaBridge 171:3a7713b1edbc 188 * @retval 1 Busy state.
AnnaBridge 171:3a7713b1edbc 189 * @details This macro is used to read BUSY bit (DAC_STATUS[8]) to get busy state.
AnnaBridge 171:3a7713b1edbc 190 */
AnnaBridge 171:3a7713b1edbc 191 #define DAC_IS_BUSY(dac, u32Ch) (((dac)->STATUS & DAC_STATUS_BUSY_Msk) >> DAC_STATUS_BUSY_Pos)
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 /**
AnnaBridge 171:3a7713b1edbc 194 * @brief Get the interrupt flag.
AnnaBridge 171:3a7713b1edbc 195 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 196 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 197 * @retval 0 DAC is in conversion state.
AnnaBridge 171:3a7713b1edbc 198 * @retval 1 DAC conversion finish.
AnnaBridge 171:3a7713b1edbc 199 * @details This macro is used to read FINISH bit (DAC_STATUS[0]) to get DAC conversion complete finish flag.
AnnaBridge 171:3a7713b1edbc 200 */
AnnaBridge 171:3a7713b1edbc 201 #define DAC_GET_INT_FLAG(dac, u32Ch) ((dac)->STATUS & DAC_STATUS_FINISH_Msk)
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 /**
AnnaBridge 171:3a7713b1edbc 204 * @brief Get the DMA under-run flag.
AnnaBridge 171:3a7713b1edbc 205 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 206 * @retval 0 No DMA under-run error condition occurred.
AnnaBridge 171:3a7713b1edbc 207 * @retval 1 DMA under-run error condition occurred.
AnnaBridge 171:3a7713b1edbc 208 * @details This macro is used to read DMAUDR bit (DAC_STATUS[1]) to get DMA under-run state.
AnnaBridge 171:3a7713b1edbc 209 */
AnnaBridge 171:3a7713b1edbc 210 #define DAC_GET_DMAUDR_FLAG(dac) (((dac)->STATUS & DAC_STATUS_DMAUDR_Msk) >> DAC_STATUS_DMAUDR_Pos)
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 /**
AnnaBridge 171:3a7713b1edbc 213 * @brief This macro clear the interrupt status bit.
AnnaBridge 171:3a7713b1edbc 214 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 215 * @param[in] u32Ch Not used in M451 Series DAC.
AnnaBridge 171:3a7713b1edbc 216 * @return None
AnnaBridge 171:3a7713b1edbc 217 * @details User writes FINISH bit (DAC_STATUS[0]) to clear DAC conversion complete finish flag.
AnnaBridge 171:3a7713b1edbc 218 */
AnnaBridge 171:3a7713b1edbc 219 #define DAC_CLR_INT_FLAG(dac, u32Ch) ((dac)->STATUS = DAC_STATUS_FINISH_Msk)
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /**
AnnaBridge 171:3a7713b1edbc 222 * @brief This macro clear the DMA under-run flag.
AnnaBridge 171:3a7713b1edbc 223 * @param[in] dac Base address of DAC module.
AnnaBridge 171:3a7713b1edbc 224 * @return None
AnnaBridge 171:3a7713b1edbc 225 * @details User writes DMAUDR bit (DAC_STATUS[1]) to clear DMA under-run flag.
AnnaBridge 171:3a7713b1edbc 226 */
AnnaBridge 171:3a7713b1edbc 227 #define DAC_CLR_DMAUDR_FLAG(dac) ((dac)->STATUS = DAC_STATUS_DMAUDR_Msk)
AnnaBridge 171:3a7713b1edbc 228
AnnaBridge 171:3a7713b1edbc 229 void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc);
AnnaBridge 171:3a7713b1edbc 230 void DAC_Close(DAC_T *dac, uint32_t u32Ch);
AnnaBridge 171:3a7713b1edbc 231 float DAC_SetDelayTime(DAC_T *dac, uint32_t u16Delay);
AnnaBridge 171:3a7713b1edbc 232
AnnaBridge 171:3a7713b1edbc 233 /*@}*/ /* end of group DAC_EXPORTED_FUNCTIONS */
AnnaBridge 171:3a7713b1edbc 234
AnnaBridge 171:3a7713b1edbc 235 /*@}*/ /* end of group DAC_Driver */
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /*@}*/ /* end of group Standard_Driver */
AnnaBridge 171:3a7713b1edbc 238
AnnaBridge 171:3a7713b1edbc 239 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 240 }
AnnaBridge 171:3a7713b1edbc 241 #endif
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 #endif //__DAC_H__
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/