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TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_IAR/stm32l4xx_ll_exti.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_DISCO_L475VG_IOT01A/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_exti.h@161:aa5281ff4a02

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/**
AnnaBridge	145:64910690c574	2	******************************************************************************
AnnaBridge	145:64910690c574	3	* @file stm32l4xx_ll_exti.h
AnnaBridge	145:64910690c574	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @brief Header file of EXTI LL module.
AnnaBridge	145:64910690c574	6	******************************************************************************
AnnaBridge	145:64910690c574	7	* @attention
AnnaBridge	145:64910690c574	8	*
AnnaBridge	145:64910690c574	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	145:64910690c574	10	*
AnnaBridge	145:64910690c574	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	145:64910690c574	12	* are permitted provided that the following conditions are met:
AnnaBridge	145:64910690c574	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	145:64910690c574	14	* this list of conditions and the following disclaimer.
AnnaBridge	145:64910690c574	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	145:64910690c574	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	145:64910690c574	17	* and/or other materials provided with the distribution.
AnnaBridge	145:64910690c574	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	145:64910690c574	19	* may be used to endorse or promote products derived from this software
AnnaBridge	145:64910690c574	20	* without specific prior written permission.
AnnaBridge	145:64910690c574	21	*
AnnaBridge	145:64910690c574	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	145:64910690c574	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	145:64910690c574	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	145:64910690c574	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	145:64910690c574	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	145:64910690c574	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	145:64910690c574	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	145:64910690c574	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	145:64910690c574	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	145:64910690c574	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	145:64910690c574	32	*
AnnaBridge	145:64910690c574	33	******************************************************************************
AnnaBridge	145:64910690c574	34	*/
AnnaBridge	145:64910690c574	35
AnnaBridge	145:64910690c574	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	145:64910690c574	37	#ifndef __STM32L4xx_LL_EXTI_H
AnnaBridge	145:64910690c574	38	#define __STM32L4xx_LL_EXTI_H
AnnaBridge	145:64910690c574	39
AnnaBridge	145:64910690c574	40	#ifdef __cplusplus
AnnaBridge	145:64910690c574	41	extern "C" {
AnnaBridge	145:64910690c574	42	#endif
AnnaBridge	145:64910690c574	43
AnnaBridge	145:64910690c574	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	145:64910690c574	45	#include "stm32l4xx.h"
AnnaBridge	145:64910690c574	46
AnnaBridge	145:64910690c574	47	/** @addtogroup STM32L4xx_LL_Driver
AnnaBridge	145:64910690c574	48	* @{
AnnaBridge	145:64910690c574	49	*/
AnnaBridge	145:64910690c574	50
AnnaBridge	145:64910690c574	51	#if defined (EXTI)
AnnaBridge	145:64910690c574	52
AnnaBridge	145:64910690c574	53	/** @defgroup EXTI_LL EXTI
AnnaBridge	145:64910690c574	54	* @{
AnnaBridge	145:64910690c574	55	*/
AnnaBridge	145:64910690c574	56
AnnaBridge	145:64910690c574	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	145:64910690c574	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	59	/* Private constants ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	60	/* Private Macros ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	61	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	62	/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
AnnaBridge	145:64910690c574	63	* @{
AnnaBridge	145:64910690c574	64	*/
AnnaBridge	145:64910690c574	65	/**
AnnaBridge	145:64910690c574	66	* @}
AnnaBridge	145:64910690c574	67	*/
AnnaBridge	145:64910690c574	68	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	69	/* Exported types ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	70	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	71	/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
AnnaBridge	145:64910690c574	72	* @{
AnnaBridge	145:64910690c574	73	*/
AnnaBridge	145:64910690c574	74	typedef struct
AnnaBridge	145:64910690c574	75	{
AnnaBridge	145:64910690c574	76
AnnaBridge	145:64910690c574	77	uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
AnnaBridge	145:64910690c574	78	This parameter can be any combination of @ref EXTI_LL_EC_LINE */
AnnaBridge	145:64910690c574	79
AnnaBridge	145:64910690c574	80	uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
AnnaBridge	145:64910690c574	81	This parameter can be any combination of @ref EXTI_LL_EC_LINE */
AnnaBridge	145:64910690c574	82
AnnaBridge	145:64910690c574	83	FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
AnnaBridge	145:64910690c574	84	This parameter can be set either to ENABLE or DISABLE */
AnnaBridge	145:64910690c574	85
AnnaBridge	145:64910690c574	86	uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
AnnaBridge	145:64910690c574	87	This parameter can be a value of @ref EXTI_LL_EC_MODE. */
AnnaBridge	145:64910690c574	88
AnnaBridge	145:64910690c574	89	uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
AnnaBridge	145:64910690c574	90	This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
AnnaBridge	145:64910690c574	91	} LL_EXTI_InitTypeDef;
AnnaBridge	145:64910690c574	92
AnnaBridge	145:64910690c574	93	/**
AnnaBridge	145:64910690c574	94	* @}
AnnaBridge	145:64910690c574	95	*/
AnnaBridge	145:64910690c574	96	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	97
AnnaBridge	145:64910690c574	98	/* Exported constants --------------------------------------------------------*/
AnnaBridge	145:64910690c574	99	/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
AnnaBridge	145:64910690c574	100	* @{
AnnaBridge	145:64910690c574	101	*/
AnnaBridge	145:64910690c574	102
AnnaBridge	145:64910690c574	103	/** @defgroup EXTI_LL_EC_LINE LINE
AnnaBridge	145:64910690c574	104	* @{
AnnaBridge	145:64910690c574	105	*/
AnnaBridge	145:64910690c574	106	#define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /!< Extended line 0 /
AnnaBridge	145:64910690c574	107	#define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /!< Extended line 1 /
AnnaBridge	145:64910690c574	108	#define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /!< Extended line 2 /
AnnaBridge	145:64910690c574	109	#define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /!< Extended line 3 /
AnnaBridge	145:64910690c574	110	#define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /!< Extended line 4 /
AnnaBridge	145:64910690c574	111	#define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /!< Extended line 5 /
AnnaBridge	145:64910690c574	112	#define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /!< Extended line 6 /
AnnaBridge	145:64910690c574	113	#define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /!< Extended line 7 /
AnnaBridge	145:64910690c574	114	#define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /!< Extended line 8 /
AnnaBridge	145:64910690c574	115	#define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /!< Extended line 9 /
AnnaBridge	145:64910690c574	116	#define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /!< Extended line 10 /
AnnaBridge	145:64910690c574	117	#define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /!< Extended line 11 /
AnnaBridge	145:64910690c574	118	#define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /!< Extended line 12 /
AnnaBridge	145:64910690c574	119	#define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /!< Extended line 13 /
AnnaBridge	145:64910690c574	120	#define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /!< Extended line 14 /
AnnaBridge	145:64910690c574	121	#define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /!< Extended line 15 /
AnnaBridge	145:64910690c574	122	#if defined(EXTI_IMR1_IM16)
AnnaBridge	145:64910690c574	123	#define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /!< Extended line 16 /
AnnaBridge	145:64910690c574	124	#endif
AnnaBridge	145:64910690c574	125	#define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /!< Extended line 17 /
AnnaBridge	145:64910690c574	126	#if defined(EXTI_IMR1_IM18)
AnnaBridge	145:64910690c574	127	#define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /!< Extended line 18 /
AnnaBridge	145:64910690c574	128	#endif
AnnaBridge	145:64910690c574	129	#define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /!< Extended line 19 /
AnnaBridge	145:64910690c574	130	#if defined(EXTI_IMR1_IM20)
AnnaBridge	145:64910690c574	131	#define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /!< Extended line 20 /
AnnaBridge	145:64910690c574	132	#endif
AnnaBridge	145:64910690c574	133	#if defined(EXTI_IMR1_IM21)
AnnaBridge	145:64910690c574	134	#define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /!< Extended line 21 /
AnnaBridge	145:64910690c574	135	#endif
AnnaBridge	145:64910690c574	136	#if defined(EXTI_IMR1_IM22)
AnnaBridge	145:64910690c574	137	#define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /!< Extended line 22 /
AnnaBridge	145:64910690c574	138	#endif
AnnaBridge	145:64910690c574	139	#define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /!< Extended line 23 /
AnnaBridge	145:64910690c574	140	#if defined(EXTI_IMR1_IM24)
AnnaBridge	145:64910690c574	141	#define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /!< Extended line 24 /
AnnaBridge	145:64910690c574	142	#endif
AnnaBridge	145:64910690c574	143	#if defined(EXTI_IMR1_IM25)
AnnaBridge	145:64910690c574	144	#define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /!< Extended line 25 /
AnnaBridge	145:64910690c574	145	#endif
AnnaBridge	145:64910690c574	146	#if defined(EXTI_IMR1_IM26)
AnnaBridge	145:64910690c574	147	#define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /!< Extended line 26 /
AnnaBridge	145:64910690c574	148	#endif
AnnaBridge	145:64910690c574	149	#if defined(EXTI_IMR1_IM27)
AnnaBridge	145:64910690c574	150	#define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /!< Extended line 27 /
AnnaBridge	145:64910690c574	151	#endif
AnnaBridge	145:64910690c574	152	#if defined(EXTI_IMR1_IM28)
AnnaBridge	145:64910690c574	153	#define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /!< Extended line 28 /
AnnaBridge	145:64910690c574	154	#endif
AnnaBridge	145:64910690c574	155	#if defined(EXTI_IMR1_IM29)
AnnaBridge	145:64910690c574	156	#define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /!< Extended line 29 /
AnnaBridge	145:64910690c574	157	#endif
AnnaBridge	145:64910690c574	158	#if defined(EXTI_IMR1_IM30)
AnnaBridge	145:64910690c574	159	#define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /!< Extended line 30 /
AnnaBridge	145:64910690c574	160	#endif
AnnaBridge	145:64910690c574	161	#if defined(EXTI_IMR1_IM31)
AnnaBridge	145:64910690c574	162	#define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /!< Extended line 31 /
AnnaBridge	145:64910690c574	163	#endif
AnnaBridge	145:64910690c574	164	#define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /!< All Extended line not reserved/
AnnaBridge	145:64910690c574	165
AnnaBridge	145:64910690c574	166	#define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /!< Extended line 32 /
AnnaBridge	145:64910690c574	167	#if defined(EXTI_IMR2_IM33)
AnnaBridge	145:64910690c574	168	#define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /!< Extended line 33 /
AnnaBridge	145:64910690c574	169	#endif
AnnaBridge	145:64910690c574	170	#if defined(EXTI_IMR2_IM34)
AnnaBridge	145:64910690c574	171	#define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /!< Extended line 34 /
AnnaBridge	145:64910690c574	172	#endif
AnnaBridge	145:64910690c574	173	#if defined(EXTI_IMR2_IM35)
AnnaBridge	145:64910690c574	174	#define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /!< Extended line 35 /
AnnaBridge	145:64910690c574	175	#endif
AnnaBridge	145:64910690c574	176	#if defined(EXTI_IMR2_IM36)
AnnaBridge	145:64910690c574	177	#define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /!< Extended line 36 /
AnnaBridge	145:64910690c574	178	#endif
AnnaBridge	145:64910690c574	179	#if defined(EXTI_IMR2_IM37)
AnnaBridge	145:64910690c574	180	#define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /!< Extended line 37 /
AnnaBridge	145:64910690c574	181	#endif
AnnaBridge	145:64910690c574	182	#if defined(EXTI_IMR2_IM38)
AnnaBridge	145:64910690c574	183	#define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /!< Extended line 38 /
AnnaBridge	145:64910690c574	184	#endif
AnnaBridge	145:64910690c574	185	#if defined(EXTI_IMR2_IM39)
AnnaBridge	145:64910690c574	186	#define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /!< Extended line 39 /
AnnaBridge	145:64910690c574	187	#endif
AnnaBridge	161:aa5281ff4a02	188	#if defined(EXTI_IMR2_IM40)
AnnaBridge	161:aa5281ff4a02	189	#define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /!< Extended line 40 /
AnnaBridge	161:aa5281ff4a02	190	#endif
AnnaBridge	145:64910690c574	191	#define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /!< All Extended line not reserved/
AnnaBridge	145:64910690c574	192
AnnaBridge	145:64910690c574	193
AnnaBridge	145:64910690c574	194	#define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /!< All Extended line /
AnnaBridge	145:64910690c574	195
AnnaBridge	145:64910690c574	196	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	197	#define LL_EXTI_LINE_NONE (0x00000000U) /!< None Extended line /
AnnaBridge	145:64910690c574	198	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	199
AnnaBridge	145:64910690c574	200	/**
AnnaBridge	145:64910690c574	201	* @}
AnnaBridge	145:64910690c574	202	*/
AnnaBridge	145:64910690c574	203	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	204
AnnaBridge	145:64910690c574	205	/** @defgroup EXTI_LL_EC_MODE Mode
AnnaBridge	145:64910690c574	206	* @{
AnnaBridge	145:64910690c574	207	*/
AnnaBridge	145:64910690c574	208	#define LL_EXTI_MODE_IT ((uint8_t)0x00U) /!< Interrupt Mode /
AnnaBridge	145:64910690c574	209	#define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /!< Event Mode /
AnnaBridge	145:64910690c574	210	#define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /!< Interrupt & Event Mode /
AnnaBridge	145:64910690c574	211	/**
AnnaBridge	145:64910690c574	212	* @}
AnnaBridge	145:64910690c574	213	*/
AnnaBridge	145:64910690c574	214
AnnaBridge	145:64910690c574	215	/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
AnnaBridge	145:64910690c574	216	* @{
AnnaBridge	145:64910690c574	217	*/
AnnaBridge	145:64910690c574	218	#define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /!< No Trigger Mode /
AnnaBridge	145:64910690c574	219	#define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /!< Trigger Rising Mode /
AnnaBridge	145:64910690c574	220	#define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /!< Trigger Falling Mode /
AnnaBridge	145:64910690c574	221	#define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /!< Trigger Rising & Falling Mode /
AnnaBridge	145:64910690c574	222
AnnaBridge	145:64910690c574	223	/**
AnnaBridge	145:64910690c574	224	* @}
AnnaBridge	145:64910690c574	225	*/
AnnaBridge	145:64910690c574	226
AnnaBridge	145:64910690c574	227
AnnaBridge	145:64910690c574	228	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	229
AnnaBridge	145:64910690c574	230
AnnaBridge	145:64910690c574	231	/**
AnnaBridge	145:64910690c574	232	* @}
AnnaBridge	145:64910690c574	233	*/
AnnaBridge	145:64910690c574	234
AnnaBridge	145:64910690c574	235	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	236	/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
AnnaBridge	145:64910690c574	237	* @{
AnnaBridge	145:64910690c574	238	*/
AnnaBridge	145:64910690c574	239
AnnaBridge	145:64910690c574	240	/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	145:64910690c574	241	* @{
AnnaBridge	145:64910690c574	242	*/
AnnaBridge	145:64910690c574	243
AnnaBridge	145:64910690c574	244	/**
AnnaBridge	145:64910690c574	245	* @brief Write a value in EXTI register
AnnaBridge	145:64910690c574	246	* @param __REG__ Register to be written
AnnaBridge	145:64910690c574	247	* @param __VALUE__ Value to be written in the register
AnnaBridge	145:64910690c574	248	* @retval None
AnnaBridge	145:64910690c574	249	*/
AnnaBridge	145:64910690c574	250	#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
AnnaBridge	145:64910690c574	251
AnnaBridge	145:64910690c574	252	/**
AnnaBridge	145:64910690c574	253	* @brief Read a value in EXTI register
AnnaBridge	145:64910690c574	254	* @param __REG__ Register to be read
AnnaBridge	145:64910690c574	255	* @retval Register value
AnnaBridge	145:64910690c574	256	*/
AnnaBridge	145:64910690c574	257	#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
AnnaBridge	145:64910690c574	258	/**
AnnaBridge	145:64910690c574	259	* @}
AnnaBridge	145:64910690c574	260	*/
AnnaBridge	145:64910690c574	261
AnnaBridge	145:64910690c574	262
AnnaBridge	145:64910690c574	263	/**
AnnaBridge	145:64910690c574	264	* @}
AnnaBridge	145:64910690c574	265	*/
AnnaBridge	145:64910690c574	266
AnnaBridge	145:64910690c574	267
AnnaBridge	145:64910690c574	268
AnnaBridge	145:64910690c574	269	/* Exported functions --------------------------------------------------------*/
AnnaBridge	145:64910690c574	270	/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
AnnaBridge	145:64910690c574	271	* @{
AnnaBridge	145:64910690c574	272	*/
AnnaBridge	145:64910690c574	273	/** @defgroup EXTI_LL_EF_IT_Management IT_Management
AnnaBridge	145:64910690c574	274	* @{
AnnaBridge	145:64910690c574	275	*/
AnnaBridge	145:64910690c574	276
AnnaBridge	145:64910690c574	277	/**
AnnaBridge	145:64910690c574	278	* @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge	145:64910690c574	279	* @note The reset value for the direct or internal lines (see RM)
AnnaBridge	145:64910690c574	280	* is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	281	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	282	* @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
AnnaBridge	145:64910690c574	283	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	284	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	285	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	286	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	287	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	288	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	289	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	290	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	291	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	292	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	293	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	294	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	295	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	296	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	297	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	298	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	299	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	300	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	301	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	302	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	303	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	304	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	305	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	306	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	307	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	308	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	309	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	310	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	311	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	312	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	313	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	314	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	315	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	316	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	317	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	318	* @retval None
AnnaBridge	145:64910690c574	319	*/
AnnaBridge	145:64910690c574	320	__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	321	{
AnnaBridge	145:64910690c574	322	SET_BIT(EXTI->IMR1, ExtiLine);
AnnaBridge	145:64910690c574	323	}
AnnaBridge	145:64910690c574	324	/**
AnnaBridge	145:64910690c574	325	* @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
AnnaBridge	145:64910690c574	326	* @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge	145:64910690c574	327	* 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	328	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	329	* @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
AnnaBridge	145:64910690c574	330	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	331	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	332	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	333	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	334	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	335	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	336	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	337	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	338	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	339	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	340	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	341	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	342	* @retval None
AnnaBridge	145:64910690c574	343	*/
AnnaBridge	145:64910690c574	344	__STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	345	{
AnnaBridge	145:64910690c574	346	SET_BIT(EXTI->IMR2, ExtiLine);
AnnaBridge	145:64910690c574	347	}
AnnaBridge	145:64910690c574	348
AnnaBridge	145:64910690c574	349	/**
AnnaBridge	145:64910690c574	350	* @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge	145:64910690c574	351	* @note The reset value for the direct or internal lines (see RM)
AnnaBridge	145:64910690c574	352	* is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	353	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	354	* @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
AnnaBridge	145:64910690c574	355	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	356	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	357	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	358	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	359	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	360	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	361	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	362	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	363	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	364	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	365	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	366	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	367	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	368	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	369	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	370	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	371	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	372	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	373	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	374	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	375	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	376	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	377	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	378	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	379	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	380	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	381	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	382	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	383	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	384	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	385	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	386	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	387	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	388	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	389	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	390	* @retval None
AnnaBridge	145:64910690c574	391	*/
AnnaBridge	145:64910690c574	392	__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	393	{
AnnaBridge	145:64910690c574	394	CLEAR_BIT(EXTI->IMR1, ExtiLine);
AnnaBridge	145:64910690c574	395	}
AnnaBridge	145:64910690c574	396
AnnaBridge	145:64910690c574	397	/**
AnnaBridge	145:64910690c574	398	* @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
AnnaBridge	145:64910690c574	399	* @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge	145:64910690c574	400	* 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	401	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	402	* @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
AnnaBridge	145:64910690c574	403	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	404	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	405	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	406	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	407	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	408	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	409	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	410	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	411	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	412	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	413	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	414	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	415	* @retval None
AnnaBridge	145:64910690c574	416	*/
AnnaBridge	145:64910690c574	417	__STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	418	{
AnnaBridge	145:64910690c574	419	CLEAR_BIT(EXTI->IMR2, ExtiLine);
AnnaBridge	145:64910690c574	420	}
AnnaBridge	145:64910690c574	421
AnnaBridge	145:64910690c574	422	/**
AnnaBridge	145:64910690c574	423	* @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
AnnaBridge	145:64910690c574	424	* @note The reset value for the direct or internal lines (see RM)
AnnaBridge	145:64910690c574	425	* is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	426	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	427	* @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
AnnaBridge	145:64910690c574	428	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	429	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	430	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	431	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	432	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	433	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	434	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	435	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	436	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	437	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	438	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	439	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	440	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	441	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	442	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	443	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	444	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	445	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	446	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	447	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	448	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	449	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	450	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	451	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	452	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	453	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	454	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	455	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	456	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	457	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	458	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	459	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	460	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	461	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	462	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	463	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	464	*/
AnnaBridge	145:64910690c574	465	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	466	{
AnnaBridge	145:64910690c574	467	return (READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	468	}
AnnaBridge	145:64910690c574	469
AnnaBridge	145:64910690c574	470	/**
AnnaBridge	145:64910690c574	471	* @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
AnnaBridge	145:64910690c574	472	* @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge	145:64910690c574	473	* 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge	145:64910690c574	474	* Bits are set automatically at Power on.
AnnaBridge	145:64910690c574	475	* @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
AnnaBridge	145:64910690c574	476	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	477	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	478	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	479	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	480	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	481	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	482	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	483	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	484	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	485	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	486	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	487	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	488	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	489	*/
AnnaBridge	145:64910690c574	490	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	491	{
AnnaBridge	145:64910690c574	492	return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	493	}
AnnaBridge	145:64910690c574	494
AnnaBridge	145:64910690c574	495	/**
AnnaBridge	145:64910690c574	496	* @}
AnnaBridge	145:64910690c574	497	*/
AnnaBridge	145:64910690c574	498
AnnaBridge	145:64910690c574	499	/** @defgroup EXTI_LL_EF_Event_Management Event_Management
AnnaBridge	145:64910690c574	500	* @{
AnnaBridge	145:64910690c574	501	*/
AnnaBridge	145:64910690c574	502
AnnaBridge	145:64910690c574	503	/**
AnnaBridge	145:64910690c574	504	* @brief Enable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge	145:64910690c574	505	* @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
AnnaBridge	145:64910690c574	506	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	507	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	508	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	509	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	510	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	511	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	512	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	513	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	514	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	515	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	516	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	517	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	518	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	519	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	520	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	521	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	522	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	523	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	524	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	525	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	526	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	527	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	528	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	529	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	530	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	531	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	532	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	533	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	534	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	535	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	536	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	537	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	538	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	539	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	540	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	541	* @retval None
AnnaBridge	145:64910690c574	542	*/
AnnaBridge	145:64910690c574	543	__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	544	{
AnnaBridge	145:64910690c574	545	SET_BIT(EXTI->EMR1, ExtiLine);
AnnaBridge	145:64910690c574	546
AnnaBridge	145:64910690c574	547	}
AnnaBridge	145:64910690c574	548
AnnaBridge	145:64910690c574	549	/**
AnnaBridge	145:64910690c574	550	* @brief Enable ExtiLine Event request for Lines in range 32 to 63
AnnaBridge	145:64910690c574	551	* @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
AnnaBridge	145:64910690c574	552	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	553	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	554	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	555	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	556	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	557	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	558	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	559	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	560	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	561	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	562	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	563	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	564	* @retval None
AnnaBridge	145:64910690c574	565	*/
AnnaBridge	145:64910690c574	566	__STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	567	{
AnnaBridge	145:64910690c574	568	SET_BIT(EXTI->EMR2, ExtiLine);
AnnaBridge	145:64910690c574	569	}
AnnaBridge	145:64910690c574	570
AnnaBridge	145:64910690c574	571	/**
AnnaBridge	145:64910690c574	572	* @brief Disable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge	145:64910690c574	573	* @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
AnnaBridge	145:64910690c574	574	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	575	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	576	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	577	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	578	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	579	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	580	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	581	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	582	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	583	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	584	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	585	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	586	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	587	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	588	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	589	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	590	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	591	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	592	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	593	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	594	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	595	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	596	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	597	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	598	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	599	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	600	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	601	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	602	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	603	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	604	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	605	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	606	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	607	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	608	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	609	* @retval None
AnnaBridge	145:64910690c574	610	*/
AnnaBridge	145:64910690c574	611	__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	612	{
AnnaBridge	145:64910690c574	613	CLEAR_BIT(EXTI->EMR1, ExtiLine);
AnnaBridge	145:64910690c574	614	}
AnnaBridge	145:64910690c574	615
AnnaBridge	145:64910690c574	616	/**
AnnaBridge	145:64910690c574	617	* @brief Disable ExtiLine Event request for Lines in range 32 to 63
AnnaBridge	145:64910690c574	618	* @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
AnnaBridge	145:64910690c574	619	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	620	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	621	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	622	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	623	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	624	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	625	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	626	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	627	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	628	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	629	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	630	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	631	* @retval None
AnnaBridge	145:64910690c574	632	*/
AnnaBridge	145:64910690c574	633	__STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	634	{
AnnaBridge	145:64910690c574	635	CLEAR_BIT(EXTI->EMR2, ExtiLine);
AnnaBridge	145:64910690c574	636	}
AnnaBridge	145:64910690c574	637
AnnaBridge	145:64910690c574	638	/**
AnnaBridge	145:64910690c574	639	* @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
AnnaBridge	145:64910690c574	640	* @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
AnnaBridge	145:64910690c574	641	* @param ExtiLine This parameter can be one of the following values:
AnnaBridge	145:64910690c574	642	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	643	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	644	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	645	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	646	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	647	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	648	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	649	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	650	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	651	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	652	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	653	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	654	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	655	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	656	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	657	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	658	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	659	* @arg @ref LL_EXTI_LINE_17
AnnaBridge	145:64910690c574	660	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	661	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	662	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	663	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	664	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	665	* @arg @ref LL_EXTI_LINE_23
AnnaBridge	145:64910690c574	666	* @arg @ref LL_EXTI_LINE_24
AnnaBridge	145:64910690c574	667	* @arg @ref LL_EXTI_LINE_25
AnnaBridge	145:64910690c574	668	* @arg @ref LL_EXTI_LINE_26
AnnaBridge	145:64910690c574	669	* @arg @ref LL_EXTI_LINE_27
AnnaBridge	145:64910690c574	670	* @arg @ref LL_EXTI_LINE_28
AnnaBridge	145:64910690c574	671	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	672	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	673	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	674	* @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge	145:64910690c574	675	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	676	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	677	*/
AnnaBridge	145:64910690c574	678	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	679	{
AnnaBridge	145:64910690c574	680	return (READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	681
AnnaBridge	145:64910690c574	682	}
AnnaBridge	145:64910690c574	683
AnnaBridge	145:64910690c574	684	/**
AnnaBridge	145:64910690c574	685	* @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
AnnaBridge	145:64910690c574	686	* @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
AnnaBridge	145:64910690c574	687	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	688	* @arg @ref LL_EXTI_LINE_32
AnnaBridge	145:64910690c574	689	* @arg @ref LL_EXTI_LINE_33
AnnaBridge	161:aa5281ff4a02	690	* @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge	145:64910690c574	691	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	692	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	693	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	694	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	161:aa5281ff4a02	695	* @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge	161:aa5281ff4a02	696	* @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge	145:64910690c574	697	* @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge	161:aa5281ff4a02	698	* @note (*): Available in some devices
AnnaBridge	145:64910690c574	699	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	700	*/
AnnaBridge	145:64910690c574	701	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	702	{
AnnaBridge	145:64910690c574	703	return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	704	}
AnnaBridge	145:64910690c574	705
AnnaBridge	145:64910690c574	706	/**
AnnaBridge	145:64910690c574	707	* @}
AnnaBridge	145:64910690c574	708	*/
AnnaBridge	145:64910690c574	709
AnnaBridge	145:64910690c574	710	/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
AnnaBridge	145:64910690c574	711	* @{
AnnaBridge	145:64910690c574	712	*/
AnnaBridge	145:64910690c574	713
AnnaBridge	145:64910690c574	714	/**
AnnaBridge	145:64910690c574	715	* @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge	145:64910690c574	716	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	717	* generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge	145:64910690c574	718	* line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge	145:64910690c574	719	* pending bit is not set.
AnnaBridge	145:64910690c574	720	* Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	721	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	722	* condition.
AnnaBridge	145:64910690c574	723	* @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
AnnaBridge	145:64910690c574	724	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	725	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	726	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	727	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	728	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	729	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	730	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	731	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	732	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	733	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	734	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	735	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	736	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	737	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	738	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	739	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	740	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	741	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	742	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	743	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	744	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	745	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	746	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	747	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	748	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	749	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	750	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	751	* @retval None
AnnaBridge	145:64910690c574	752	*/
AnnaBridge	145:64910690c574	753	__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	754	{
AnnaBridge	145:64910690c574	755	SET_BIT(EXTI->RTSR1, ExtiLine);
AnnaBridge	145:64910690c574	756
AnnaBridge	145:64910690c574	757	}
AnnaBridge	145:64910690c574	758
AnnaBridge	145:64910690c574	759	/**
AnnaBridge	145:64910690c574	760	* @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
AnnaBridge	145:64910690c574	761	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	762	* generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge	145:64910690c574	763	* line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge	145:64910690c574	764	* pending bit is not set.Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	765	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	766	* condition.
AnnaBridge	145:64910690c574	767	* @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
AnnaBridge	145:64910690c574	768	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	769	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	770	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	771	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	772	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	773	* @retval None
AnnaBridge	145:64910690c574	774	*/
AnnaBridge	145:64910690c574	775	__STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	776	{
AnnaBridge	145:64910690c574	777	SET_BIT(EXTI->RTSR2, ExtiLine);
AnnaBridge	145:64910690c574	778	}
AnnaBridge	145:64910690c574	779
AnnaBridge	145:64910690c574	780	/**
AnnaBridge	145:64910690c574	781	* @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge	145:64910690c574	782	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	783	* generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge	145:64910690c574	784	* line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge	145:64910690c574	785	* pending bit is not set.
AnnaBridge	145:64910690c574	786	* Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	787	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	788	* condition.
AnnaBridge	145:64910690c574	789	* @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
AnnaBridge	145:64910690c574	790	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	791	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	792	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	793	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	794	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	795	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	796	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	797	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	798	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	799	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	800	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	801	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	802	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	803	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	804	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	805	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	806	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	807	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	808	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	809	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	810	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	811	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	812	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	813	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	814	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	815	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	816	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	817	* @retval None
AnnaBridge	145:64910690c574	818	*/
AnnaBridge	145:64910690c574	819	__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	820	{
AnnaBridge	145:64910690c574	821	CLEAR_BIT(EXTI->RTSR1, ExtiLine);
AnnaBridge	145:64910690c574	822
AnnaBridge	145:64910690c574	823	}
AnnaBridge	145:64910690c574	824
AnnaBridge	145:64910690c574	825	/**
AnnaBridge	145:64910690c574	826	* @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
AnnaBridge	145:64910690c574	827	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	828	* generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge	145:64910690c574	829	* line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge	145:64910690c574	830	* pending bit is not set.
AnnaBridge	145:64910690c574	831	* Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	832	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	833	* condition.
AnnaBridge	145:64910690c574	834	* @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
AnnaBridge	145:64910690c574	835	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	836	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	837	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	838	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	839	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	840	* @retval None
AnnaBridge	145:64910690c574	841	*/
AnnaBridge	145:64910690c574	842	__STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	843	{
AnnaBridge	145:64910690c574	844	CLEAR_BIT(EXTI->RTSR2, ExtiLine);
AnnaBridge	145:64910690c574	845	}
AnnaBridge	145:64910690c574	846
AnnaBridge	145:64910690c574	847	/**
AnnaBridge	145:64910690c574	848	* @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
AnnaBridge	145:64910690c574	849	* @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
AnnaBridge	145:64910690c574	850	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	851	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	852	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	853	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	854	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	855	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	856	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	857	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	858	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	859	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	860	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	861	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	862	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	863	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	864	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	865	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	866	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	867	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	868	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	869	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	870	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	871	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	872	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	873	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	874	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	875	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	876	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	877	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	878	*/
AnnaBridge	145:64910690c574	879	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	880	{
AnnaBridge	145:64910690c574	881	return (READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	882	}
AnnaBridge	145:64910690c574	883
AnnaBridge	145:64910690c574	884	/**
AnnaBridge	145:64910690c574	885	* @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
AnnaBridge	145:64910690c574	886	* @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
AnnaBridge	145:64910690c574	887	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	888	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	889	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	890	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	891	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	892	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	893	*/
AnnaBridge	145:64910690c574	894	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	895	{
AnnaBridge	145:64910690c574	896	return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	897	}
AnnaBridge	145:64910690c574	898
AnnaBridge	145:64910690c574	899	/**
AnnaBridge	145:64910690c574	900	* @}
AnnaBridge	145:64910690c574	901	*/
AnnaBridge	145:64910690c574	902
AnnaBridge	145:64910690c574	903	/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
AnnaBridge	145:64910690c574	904	* @{
AnnaBridge	145:64910690c574	905	*/
AnnaBridge	145:64910690c574	906
AnnaBridge	145:64910690c574	907	/**
AnnaBridge	145:64910690c574	908	* @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge	145:64910690c574	909	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	910	* generated on these lines. If a falling edge on a configurable interrupt
AnnaBridge	145:64910690c574	911	* line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge	145:64910690c574	912	* pending bit is not set.
AnnaBridge	145:64910690c574	913	* Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	914	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	915	* condition.
AnnaBridge	145:64910690c574	916	* @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
AnnaBridge	145:64910690c574	917	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	918	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	919	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	920	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	921	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	922	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	923	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	924	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	925	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	926	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	927	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	928	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	929	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	930	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	931	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	932	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	933	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	934	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	935	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	936	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	937	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	938	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	939	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	940	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	941	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	942	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	943	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	944	* @retval None
AnnaBridge	145:64910690c574	945	*/
AnnaBridge	145:64910690c574	946	__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	947	{
AnnaBridge	145:64910690c574	948	SET_BIT(EXTI->FTSR1, ExtiLine);
AnnaBridge	145:64910690c574	949	}
AnnaBridge	145:64910690c574	950
AnnaBridge	145:64910690c574	951	/**
AnnaBridge	145:64910690c574	952	* @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
AnnaBridge	145:64910690c574	953	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	954	* generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge	145:64910690c574	955	* line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge	145:64910690c574	956	* pending bit is not set.
AnnaBridge	145:64910690c574	957	* Rising and falling edge triggers can be set for
AnnaBridge	145:64910690c574	958	* the same interrupt line. In this case, both generate a trigger
AnnaBridge	145:64910690c574	959	* condition.
AnnaBridge	145:64910690c574	960	* @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
AnnaBridge	145:64910690c574	961	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	962	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	963	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	964	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	965	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	966	* @retval None
AnnaBridge	145:64910690c574	967	*/
AnnaBridge	145:64910690c574	968	__STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	969	{
AnnaBridge	145:64910690c574	970	SET_BIT(EXTI->FTSR2, ExtiLine);
AnnaBridge	145:64910690c574	971	}
AnnaBridge	145:64910690c574	972
AnnaBridge	145:64910690c574	973	/**
AnnaBridge	145:64910690c574	974	* @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge	145:64910690c574	975	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	976	* generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge	145:64910690c574	977	* line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge	145:64910690c574	978	* pending bit is not set.
AnnaBridge	145:64910690c574	979	* Rising and falling edge triggers can be set for the same interrupt line.
AnnaBridge	145:64910690c574	980	* In this case, both generate a trigger condition.
AnnaBridge	145:64910690c574	981	* @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
AnnaBridge	145:64910690c574	982	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	983	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	984	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	985	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	986	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	987	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	988	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	989	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	990	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	991	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	992	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	993	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	994	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	995	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	996	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	997	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	998	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	999	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1000	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1001	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1002	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1003	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1004	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1005	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1006	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1007	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1008	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1009	* @retval None
AnnaBridge	145:64910690c574	1010	*/
AnnaBridge	145:64910690c574	1011	__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1012	{
AnnaBridge	145:64910690c574	1013	CLEAR_BIT(EXTI->FTSR1, ExtiLine);
AnnaBridge	145:64910690c574	1014	}
AnnaBridge	145:64910690c574	1015
AnnaBridge	145:64910690c574	1016	/**
AnnaBridge	145:64910690c574	1017	* @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1018	* @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge	145:64910690c574	1019	* generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge	145:64910690c574	1020	* line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge	145:64910690c574	1021	* pending bit is not set.
AnnaBridge	145:64910690c574	1022	* Rising and falling edge triggers can be set for the same interrupt line.
AnnaBridge	145:64910690c574	1023	* In this case, both generate a trigger condition.
AnnaBridge	145:64910690c574	1024	* @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
AnnaBridge	145:64910690c574	1025	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1026	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1027	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1028	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1029	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1030	* @retval None
AnnaBridge	145:64910690c574	1031	*/
AnnaBridge	145:64910690c574	1032	__STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1033	{
AnnaBridge	145:64910690c574	1034	CLEAR_BIT(EXTI->FTSR2, ExtiLine);
AnnaBridge	145:64910690c574	1035	}
AnnaBridge	145:64910690c574	1036
AnnaBridge	145:64910690c574	1037	/**
AnnaBridge	145:64910690c574	1038	* @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
AnnaBridge	145:64910690c574	1039	* @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
AnnaBridge	145:64910690c574	1040	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1041	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	1042	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	1043	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	1044	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	1045	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	1046	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	1047	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	1048	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	1049	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	1050	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	1051	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	1052	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	1053	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	1054	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	1055	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	1056	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	1057	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1058	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1059	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1060	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1061	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1062	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1063	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1064	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1065	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1066	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1067	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1068	*/
AnnaBridge	145:64910690c574	1069	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1070	{
AnnaBridge	145:64910690c574	1071	return (READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	1072	}
AnnaBridge	145:64910690c574	1073
AnnaBridge	145:64910690c574	1074	/**
AnnaBridge	145:64910690c574	1075	* @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1076	* @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
AnnaBridge	145:64910690c574	1077	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1078	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1079	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1080	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1081	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1082	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1083	*/
AnnaBridge	145:64910690c574	1084	__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1085	{
AnnaBridge	145:64910690c574	1086	return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	1087	}
AnnaBridge	145:64910690c574	1088
AnnaBridge	145:64910690c574	1089	/**
AnnaBridge	145:64910690c574	1090	* @}
AnnaBridge	145:64910690c574	1091	*/
AnnaBridge	145:64910690c574	1092
AnnaBridge	145:64910690c574	1093	/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
AnnaBridge	145:64910690c574	1094	* @{
AnnaBridge	145:64910690c574	1095	*/
AnnaBridge	145:64910690c574	1096
AnnaBridge	145:64910690c574	1097	/**
AnnaBridge	145:64910690c574	1098	* @brief Generate a software Interrupt Event for Lines in range 0 to 31
AnnaBridge	145:64910690c574	1099	* @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
AnnaBridge	145:64910690c574	1100	* this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
AnnaBridge	145:64910690c574	1101	* resulting in an interrupt request generation.
AnnaBridge	145:64910690c574	1102	* This bit is cleared by clearing the corresponding bit in the EXTI_PR1
AnnaBridge	145:64910690c574	1103	* register (by writing a 1 into the bit)
AnnaBridge	145:64910690c574	1104	* @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
AnnaBridge	145:64910690c574	1105	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1106	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	1107	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	1108	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	1109	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	1110	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	1111	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	1112	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	1113	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	1114	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	1115	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	1116	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	1117	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	1118	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	1119	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	1120	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	1121	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	1122	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1123	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1124	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1125	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1126	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1127	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1128	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1129	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1130	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1131	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1132	* @retval None
AnnaBridge	145:64910690c574	1133	*/
AnnaBridge	145:64910690c574	1134	__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1135	{
AnnaBridge	145:64910690c574	1136	SET_BIT(EXTI->SWIER1, ExtiLine);
AnnaBridge	145:64910690c574	1137	}
AnnaBridge	145:64910690c574	1138
AnnaBridge	145:64910690c574	1139	/**
AnnaBridge	145:64910690c574	1140	* @brief Generate a software Interrupt Event for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1141	* @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to
AnnaBridge	145:64910690c574	1142	* this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
AnnaBridge	145:64910690c574	1143	* resulting in an interrupt request generation.
AnnaBridge	145:64910690c574	1144	* This bit is cleared by clearing the corresponding bit in the EXTI_PR2
AnnaBridge	145:64910690c574	1145	* register (by writing a 1 into the bit)
AnnaBridge	145:64910690c574	1146	* @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
AnnaBridge	145:64910690c574	1147	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1148	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1149	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1150	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1151	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1152	* @retval None
AnnaBridge	145:64910690c574	1153	*/
AnnaBridge	145:64910690c574	1154	__STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1155	{
AnnaBridge	145:64910690c574	1156	SET_BIT(EXTI->SWIER2, ExtiLine);
AnnaBridge	145:64910690c574	1157	}
AnnaBridge	145:64910690c574	1158
AnnaBridge	145:64910690c574	1159	/**
AnnaBridge	145:64910690c574	1160	* @}
AnnaBridge	145:64910690c574	1161	*/
AnnaBridge	145:64910690c574	1162
AnnaBridge	145:64910690c574	1163	/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
AnnaBridge	145:64910690c574	1164	* @{
AnnaBridge	145:64910690c574	1165	*/
AnnaBridge	145:64910690c574	1166
AnnaBridge	145:64910690c574	1167	/**
AnnaBridge	145:64910690c574	1168	* @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
AnnaBridge	145:64910690c574	1169	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1170	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1171	* @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
AnnaBridge	145:64910690c574	1172	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1173	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	1174	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	1175	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	1176	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	1177	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	1178	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	1179	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	1180	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	1181	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	1182	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	1183	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	1184	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	1185	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	1186	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	1187	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	1188	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	1189	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1190	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1191	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1192	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1193	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1194	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1195	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1196	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1197	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1198	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1199	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1200	*/
AnnaBridge	145:64910690c574	1201	__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1202	{
AnnaBridge	145:64910690c574	1203	return (READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	1204	}
AnnaBridge	145:64910690c574	1205
AnnaBridge	145:64910690c574	1206	/**
AnnaBridge	145:64910690c574	1207	* @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1208	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1209	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1210	* @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
AnnaBridge	145:64910690c574	1211	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1212	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1213	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1214	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1215	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1216	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1217	*/
AnnaBridge	145:64910690c574	1218	__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1219	{
AnnaBridge	145:64910690c574	1220	return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine));
AnnaBridge	145:64910690c574	1221	}
AnnaBridge	145:64910690c574	1222
AnnaBridge	145:64910690c574	1223	/**
AnnaBridge	145:64910690c574	1224	* @brief Read ExtLine Combination Flag for Lines in range 0 to 31
AnnaBridge	145:64910690c574	1225	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1226	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1227	* @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
AnnaBridge	145:64910690c574	1228	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1229	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	1230	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	1231	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	1232	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	1233	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	1234	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	1235	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	1236	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	1237	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	1238	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	1239	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	1240	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	1241	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	1242	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	1243	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	1244	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	1245	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1246	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1247	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1248	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1249	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1250	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1251	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1252	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1253	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1254	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1255	* @retval @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1256	*/
AnnaBridge	145:64910690c574	1257	__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1258	{
AnnaBridge	145:64910690c574	1259	return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
AnnaBridge	145:64910690c574	1260	}
AnnaBridge	145:64910690c574	1261
AnnaBridge	145:64910690c574	1262
AnnaBridge	145:64910690c574	1263	/**
AnnaBridge	145:64910690c574	1264	* @brief Read ExtLine Combination Flag for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1265	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1266	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1267	* @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
AnnaBridge	145:64910690c574	1268	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1269	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1270	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1271	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1272	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1273	* @retval @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1274	*/
AnnaBridge	145:64910690c574	1275	__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1276	{
AnnaBridge	145:64910690c574	1277	return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
AnnaBridge	145:64910690c574	1278	}
AnnaBridge	145:64910690c574	1279
AnnaBridge	145:64910690c574	1280	/**
AnnaBridge	145:64910690c574	1281	* @brief Clear ExtLine Flags for Lines in range 0 to 31
AnnaBridge	145:64910690c574	1282	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1283	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1284	* @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
AnnaBridge	145:64910690c574	1285	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1286	* @arg @ref LL_EXTI_LINE_0
AnnaBridge	145:64910690c574	1287	* @arg @ref LL_EXTI_LINE_1
AnnaBridge	145:64910690c574	1288	* @arg @ref LL_EXTI_LINE_2
AnnaBridge	145:64910690c574	1289	* @arg @ref LL_EXTI_LINE_3
AnnaBridge	145:64910690c574	1290	* @arg @ref LL_EXTI_LINE_4
AnnaBridge	145:64910690c574	1291	* @arg @ref LL_EXTI_LINE_5
AnnaBridge	145:64910690c574	1292	* @arg @ref LL_EXTI_LINE_6
AnnaBridge	145:64910690c574	1293	* @arg @ref LL_EXTI_LINE_7
AnnaBridge	145:64910690c574	1294	* @arg @ref LL_EXTI_LINE_8
AnnaBridge	145:64910690c574	1295	* @arg @ref LL_EXTI_LINE_9
AnnaBridge	145:64910690c574	1296	* @arg @ref LL_EXTI_LINE_10
AnnaBridge	145:64910690c574	1297	* @arg @ref LL_EXTI_LINE_11
AnnaBridge	145:64910690c574	1298	* @arg @ref LL_EXTI_LINE_12
AnnaBridge	145:64910690c574	1299	* @arg @ref LL_EXTI_LINE_13
AnnaBridge	145:64910690c574	1300	* @arg @ref LL_EXTI_LINE_14
AnnaBridge	145:64910690c574	1301	* @arg @ref LL_EXTI_LINE_15
AnnaBridge	145:64910690c574	1302	* @arg @ref LL_EXTI_LINE_16
AnnaBridge	145:64910690c574	1303	* @arg @ref LL_EXTI_LINE_18
AnnaBridge	145:64910690c574	1304	* @arg @ref LL_EXTI_LINE_19
AnnaBridge	145:64910690c574	1305	* @arg @ref LL_EXTI_LINE_20
AnnaBridge	145:64910690c574	1306	* @arg @ref LL_EXTI_LINE_21
AnnaBridge	145:64910690c574	1307	* @arg @ref LL_EXTI_LINE_22
AnnaBridge	145:64910690c574	1308	* @arg @ref LL_EXTI_LINE_29
AnnaBridge	145:64910690c574	1309	* @arg @ref LL_EXTI_LINE_30
AnnaBridge	145:64910690c574	1310	* @arg @ref LL_EXTI_LINE_31
AnnaBridge	145:64910690c574	1311	* @note Please check each device line mapping for EXTI Line availability
AnnaBridge	145:64910690c574	1312	* @retval None
AnnaBridge	145:64910690c574	1313	*/
AnnaBridge	145:64910690c574	1314	__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1315	{
AnnaBridge	145:64910690c574	1316	WRITE_REG(EXTI->PR1, ExtiLine);
AnnaBridge	145:64910690c574	1317	}
AnnaBridge	145:64910690c574	1318
AnnaBridge	145:64910690c574	1319	/**
AnnaBridge	145:64910690c574	1320	* @brief Clear ExtLine Flags for Lines in range 32 to 63
AnnaBridge	145:64910690c574	1321	* @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge	145:64910690c574	1322	* line. This bit is cleared by writing a 1 to the bit.
AnnaBridge	145:64910690c574	1323	* @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
AnnaBridge	145:64910690c574	1324	* @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge	145:64910690c574	1325	* @arg @ref LL_EXTI_LINE_35
AnnaBridge	145:64910690c574	1326	* @arg @ref LL_EXTI_LINE_36
AnnaBridge	145:64910690c574	1327	* @arg @ref LL_EXTI_LINE_37
AnnaBridge	145:64910690c574	1328	* @arg @ref LL_EXTI_LINE_38
AnnaBridge	145:64910690c574	1329	* @retval None
AnnaBridge	145:64910690c574	1330	*/
AnnaBridge	145:64910690c574	1331	__STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
AnnaBridge	145:64910690c574	1332	{
AnnaBridge	145:64910690c574	1333	WRITE_REG(EXTI->PR2, ExtiLine);
AnnaBridge	145:64910690c574	1334	}
AnnaBridge	145:64910690c574	1335
AnnaBridge	145:64910690c574	1336	/**
AnnaBridge	145:64910690c574	1337	* @}
AnnaBridge	145:64910690c574	1338	*/
AnnaBridge	145:64910690c574	1339
AnnaBridge	145:64910690c574	1340	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	1341	/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	145:64910690c574	1342	* @{
AnnaBridge	145:64910690c574	1343	*/
AnnaBridge	145:64910690c574	1344
AnnaBridge	145:64910690c574	1345	uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge	145:64910690c574	1346	uint32_t LL_EXTI_DeInit(void);
AnnaBridge	145:64910690c574	1347	void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge	145:64910690c574	1348
AnnaBridge	145:64910690c574	1349
AnnaBridge	145:64910690c574	1350	/**
AnnaBridge	145:64910690c574	1351	* @}
AnnaBridge	145:64910690c574	1352	*/
AnnaBridge	145:64910690c574	1353	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	1354
AnnaBridge	145:64910690c574	1355	/**
AnnaBridge	145:64910690c574	1356	* @}
AnnaBridge	145:64910690c574	1357	*/
AnnaBridge	145:64910690c574	1358
AnnaBridge	145:64910690c574	1359	/**
AnnaBridge	145:64910690c574	1360	* @}
AnnaBridge	145:64910690c574	1361	*/
AnnaBridge	145:64910690c574	1362
AnnaBridge	145:64910690c574	1363	#endif /* EXTI */
AnnaBridge	145:64910690c574	1364
AnnaBridge	145:64910690c574	1365	/**
AnnaBridge	145:64910690c574	1366	* @}
AnnaBridge	145:64910690c574	1367	*/
AnnaBridge	145:64910690c574	1368
AnnaBridge	145:64910690c574	1369	#ifdef __cplusplus
AnnaBridge	145:64910690c574	1370	}
AnnaBridge	145:64910690c574	1371	#endif
AnnaBridge	145:64910690c574	1372
AnnaBridge	145:64910690c574	1373	#endif /* __STM32L4xx_LL_EXTI_H */
AnnaBridge	145:64910690c574	1374
AnnaBridge	145:64910690c574	1375	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/