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TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_IAR/stm32l4xx_ll_dac.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_L475VG_IOT01A/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_dac.h@161:aa5281ff4a02 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 145:64910690c574 1 /**
AnnaBridge 145:64910690c574 2 ******************************************************************************
AnnaBridge 145:64910690c574 3 * @file stm32l4xx_ll_dac.h
AnnaBridge 145:64910690c574 4 * @author MCD Application Team
AnnaBridge 145:64910690c574 5 * @brief Header file of DAC LL module.
AnnaBridge 145:64910690c574 6 ******************************************************************************
AnnaBridge 145:64910690c574 7 * @attention
AnnaBridge 145:64910690c574 8 *
AnnaBridge 145:64910690c574 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 145:64910690c574 10 *
AnnaBridge 145:64910690c574 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 145:64910690c574 12 * are permitted provided that the following conditions are met:
AnnaBridge 145:64910690c574 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 145:64910690c574 14 * this list of conditions and the following disclaimer.
AnnaBridge 145:64910690c574 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 145:64910690c574 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 145:64910690c574 17 * and/or other materials provided with the distribution.
AnnaBridge 145:64910690c574 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 145:64910690c574 19 * may be used to endorse or promote products derived from this software
AnnaBridge 145:64910690c574 20 * without specific prior written permission.
AnnaBridge 145:64910690c574 21 *
AnnaBridge 145:64910690c574 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 145:64910690c574 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 145:64910690c574 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 145:64910690c574 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 145:64910690c574 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 145:64910690c574 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 145:64910690c574 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 145:64910690c574 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 145:64910690c574 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 145:64910690c574 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 145:64910690c574 32 *
AnnaBridge 145:64910690c574 33 ******************************************************************************
AnnaBridge 145:64910690c574 34 */
AnnaBridge 145:64910690c574 35
AnnaBridge 145:64910690c574 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 145:64910690c574 37 #ifndef __STM32L4xx_LL_DAC_H
AnnaBridge 145:64910690c574 38 #define __STM32L4xx_LL_DAC_H
AnnaBridge 145:64910690c574 39
AnnaBridge 145:64910690c574 40 #ifdef __cplusplus
AnnaBridge 145:64910690c574 41 extern "C" {
AnnaBridge 145:64910690c574 42 #endif
AnnaBridge 145:64910690c574 43
AnnaBridge 145:64910690c574 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 145:64910690c574 45 #include "stm32l4xx.h"
AnnaBridge 145:64910690c574 46
AnnaBridge 145:64910690c574 47 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 145:64910690c574 48 * @{
AnnaBridge 145:64910690c574 49 */
AnnaBridge 145:64910690c574 50
AnnaBridge 145:64910690c574 51 #if defined (DAC1)
AnnaBridge 145:64910690c574 52
AnnaBridge 145:64910690c574 53 /** @defgroup DAC_LL DAC
AnnaBridge 145:64910690c574 54 * @{
AnnaBridge 145:64910690c574 55 */
AnnaBridge 145:64910690c574 56
AnnaBridge 145:64910690c574 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 145:64910690c574 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 145:64910690c574 59
AnnaBridge 145:64910690c574 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 145:64910690c574 61 /** @defgroup DAC_LL_Private_Constants DAC Private Constants
AnnaBridge 145:64910690c574 62 * @{
AnnaBridge 145:64910690c574 63 */
AnnaBridge 145:64910690c574 64
AnnaBridge 145:64910690c574 65 /* Internal masks for DAC channels definition */
AnnaBridge 145:64910690c574 66 /* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */
AnnaBridge 145:64910690c574 67 /* - channel bits position into registers CR, MCR, CCR, SHHR, SHRR */
AnnaBridge 145:64910690c574 68 /* - channel bits position into register SWTRIG */
AnnaBridge 145:64910690c574 69 /* - channel register offset of data holding register DHRx */
AnnaBridge 145:64910690c574 70 /* - channel register offset of data output register DORx */
AnnaBridge 145:64910690c574 71 /* - channel register offset of sample-and-hold sample time register SHSRx */
AnnaBridge 145:64910690c574 72
AnnaBridge 145:64910690c574 73 #define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
AnnaBridge 145:64910690c574 74 #define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
AnnaBridge 145:64910690c574 75 #define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)
AnnaBridge 145:64910690c574 76
AnnaBridge 145:64910690c574 77 #define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge 145:64910690c574 78 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 79 #define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge 145:64910690c574 80 #define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 | DAC_SWTR_CH2)
AnnaBridge 145:64910690c574 81 #else
AnnaBridge 145:64910690c574 82 #define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1)
AnnaBridge 145:64910690c574 83 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 84
AnnaBridge 145:64910690c574 85 #define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */
AnnaBridge 145:64910690c574 86 #define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge 145:64910690c574 87 #define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge 145:64910690c574 88 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 89 #define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
AnnaBridge 145:64910690c574 90 #define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge 145:64910690c574 91 #define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge 145:64910690c574 92 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 93 #define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U
AnnaBridge 145:64910690c574 94 #define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U
AnnaBridge 145:64910690c574 95 #define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U
AnnaBridge 145:64910690c574 96 #define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK)
AnnaBridge 145:64910690c574 97
AnnaBridge 145:64910690c574 98 #define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */
AnnaBridge 145:64910690c574 99 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 100 #define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
AnnaBridge 145:64910690c574 101 #define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
AnnaBridge 145:64910690c574 102 #else
AnnaBridge 145:64910690c574 103 #define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET)
AnnaBridge 145:64910690c574 104 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 105
AnnaBridge 145:64910690c574 106 #define DAC_REG_SHSR1_REGOFFSET 0x00000000U /* Register SHSRx channel 1 taken as reference */
AnnaBridge 145:64910690c574 107 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 108 #define DAC_REG_SHSR2_REGOFFSET 0x00001000U /* Register offset of SHSRx channel 1 versus SHSRx channel 2 (shifted left of 12 bits) */
AnnaBridge 145:64910690c574 109 #define DAC_REG_SHSRX_REGOFFSET_MASK (DAC_REG_SHSR1_REGOFFSET | DAC_REG_SHSR2_REGOFFSET)
AnnaBridge 145:64910690c574 110 #else
AnnaBridge 145:64910690c574 111 #define DAC_REG_SHSRX_REGOFFSET_MASK (DAC_REG_SHSR1_REGOFFSET)
AnnaBridge 145:64910690c574 112 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 113
AnnaBridge 145:64910690c574 114 /* DAC registers bits positions */
AnnaBridge 145:64910690c574 115 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 116 #define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */
AnnaBridge 145:64910690c574 117 #define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */
AnnaBridge 145:64910690c574 118 #define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */
AnnaBridge 145:64910690c574 119 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 120
AnnaBridge 145:64910690c574 121 /* Miscellaneous data */
AnnaBridge 145:64910690c574 122 #define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
AnnaBridge 145:64910690c574 123
AnnaBridge 145:64910690c574 124 /**
AnnaBridge 145:64910690c574 125 * @}
AnnaBridge 145:64910690c574 126 */
AnnaBridge 145:64910690c574 127
AnnaBridge 145:64910690c574 128
AnnaBridge 145:64910690c574 129 /* Private macros ------------------------------------------------------------*/
AnnaBridge 145:64910690c574 130 /** @defgroup DAC_LL_Private_Macros DAC Private Macros
AnnaBridge 145:64910690c574 131 * @{
AnnaBridge 145:64910690c574 132 */
AnnaBridge 145:64910690c574 133
AnnaBridge 145:64910690c574 134 /**
AnnaBridge 145:64910690c574 135 * @brief Driver macro reserved for internal use: isolate bits with the
AnnaBridge 145:64910690c574 136 * selected mask and shift them to the register LSB
AnnaBridge 145:64910690c574 137 * (shift mask on register position bit 0).
AnnaBridge 145:64910690c574 138 * @param __BITS__ Bits in register 32 bits
AnnaBridge 145:64910690c574 139 * @param __MASK__ Mask in register 32 bits
AnnaBridge 145:64910690c574 140 * @retval Bits in register 32 bits
AnnaBridge 145:64910690c574 141 */
AnnaBridge 145:64910690c574 142 #define __DAC_MASK_SHIFT(__BITS__, __MASK__) \
AnnaBridge 145:64910690c574 143 (((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
AnnaBridge 145:64910690c574 144
AnnaBridge 145:64910690c574 145 /**
AnnaBridge 145:64910690c574 146 * @brief Driver macro reserved for internal use: set a pointer to
AnnaBridge 145:64910690c574 147 * a register from a register basis from which an offset
AnnaBridge 145:64910690c574 148 * is applied.
AnnaBridge 145:64910690c574 149 * @param __REG__ Register basis from which the offset is applied.
AnnaBridge 145:64910690c574 150 * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
AnnaBridge 145:64910690c574 151 * @retval Pointer to register address
AnnaBridge 145:64910690c574 152 */
AnnaBridge 145:64910690c574 153 #define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
AnnaBridge 145:64910690c574 154 ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
AnnaBridge 145:64910690c574 155
AnnaBridge 145:64910690c574 156 /**
AnnaBridge 145:64910690c574 157 * @}
AnnaBridge 145:64910690c574 158 */
AnnaBridge 145:64910690c574 159
AnnaBridge 145:64910690c574 160
AnnaBridge 145:64910690c574 161 /* Exported types ------------------------------------------------------------*/
AnnaBridge 145:64910690c574 162 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 145:64910690c574 163 /** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
AnnaBridge 145:64910690c574 164 * @{
AnnaBridge 145:64910690c574 165 */
AnnaBridge 145:64910690c574 166
AnnaBridge 145:64910690c574 167 /**
AnnaBridge 145:64910690c574 168 * @brief Structure definition of some features of DAC instance.
AnnaBridge 145:64910690c574 169 */
AnnaBridge 145:64910690c574 170 typedef struct
AnnaBridge 145:64910690c574 171 {
AnnaBridge 145:64910690c574 172 uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge 145:64910690c574 173 This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
AnnaBridge 145:64910690c574 174
AnnaBridge 145:64910690c574 175 This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */
AnnaBridge 145:64910690c574 176
AnnaBridge 145:64910690c574 177 uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge 145:64910690c574 178 This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
AnnaBridge 145:64910690c574 179
AnnaBridge 145:64910690c574 180 This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */
AnnaBridge 145:64910690c574 181
AnnaBridge 145:64910690c574 182 uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge 145:64910690c574 183 If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
AnnaBridge 145:64910690c574 184 If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
AnnaBridge 145:64910690c574 185 @note If waveform automatic generation mode is disabled, this parameter is discarded.
AnnaBridge 145:64910690c574 186
AnnaBridge 145:64910690c574 187 This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */
AnnaBridge 145:64910690c574 188
AnnaBridge 145:64910690c574 189 uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel.
AnnaBridge 145:64910690c574 190 This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
AnnaBridge 145:64910690c574 191
AnnaBridge 145:64910690c574 192 This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */
AnnaBridge 145:64910690c574 193
AnnaBridge 145:64910690c574 194 uint32_t OutputConnection; /*!< Set the output connection for the selected DAC channel.
AnnaBridge 145:64910690c574 195 This parameter can be a value of @ref DAC_LL_EC_OUTPUT_CONNECTION
AnnaBridge 145:64910690c574 196
AnnaBridge 145:64910690c574 197 This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputConnection(). */
AnnaBridge 145:64910690c574 198
AnnaBridge 145:64910690c574 199 uint32_t OutputMode; /*!< Set the output mode normal or sample-and-hold for the selected DAC channel.
AnnaBridge 145:64910690c574 200 This parameter can be a value of @ref DAC_LL_EC_OUTPUT_MODE
AnnaBridge 145:64910690c574 201
AnnaBridge 145:64910690c574 202 This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputMode(). */
AnnaBridge 145:64910690c574 203
AnnaBridge 145:64910690c574 204 } LL_DAC_InitTypeDef;
AnnaBridge 145:64910690c574 205
AnnaBridge 145:64910690c574 206 /**
AnnaBridge 145:64910690c574 207 * @}
AnnaBridge 145:64910690c574 208 */
AnnaBridge 145:64910690c574 209 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 145:64910690c574 210
AnnaBridge 145:64910690c574 211 /* Exported constants --------------------------------------------------------*/
AnnaBridge 145:64910690c574 212 /** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
AnnaBridge 145:64910690c574 213 * @{
AnnaBridge 145:64910690c574 214 */
AnnaBridge 145:64910690c574 215
AnnaBridge 145:64910690c574 216 /** @defgroup DAC_LL_EC_GET_FLAG DAC flags
AnnaBridge 145:64910690c574 217 * @brief Flags defines which can be used with LL_DAC_ReadReg function
AnnaBridge 145:64910690c574 218 * @{
AnnaBridge 145:64910690c574 219 */
AnnaBridge 145:64910690c574 220 /* DAC channel 1 flags */
AnnaBridge 145:64910690c574 221 #define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /*!< DAC channel 1 flag DMA underrun */
AnnaBridge 145:64910690c574 222 #define LL_DAC_FLAG_CAL1 (DAC_SR_CAL_FLAG1) /*!< DAC channel 1 flag offset calibration status */
AnnaBridge 145:64910690c574 223 #define LL_DAC_FLAG_BWST1 (DAC_SR_BWST1) /*!< DAC channel 1 flag busy writing sample time */
AnnaBridge 145:64910690c574 224
AnnaBridge 145:64910690c574 225 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 226 /* DAC channel 2 flags */
AnnaBridge 145:64910690c574 227 #define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /*!< DAC channel 2 flag DMA underrun */
AnnaBridge 145:64910690c574 228 #define LL_DAC_FLAG_CAL2 (DAC_SR_CAL_FLAG2) /*!< DAC channel 2 flag offset calibration status */
AnnaBridge 145:64910690c574 229 #define LL_DAC_FLAG_BWST2 (DAC_SR_BWST2) /*!< DAC channel 2 flag busy writing sample time */
AnnaBridge 145:64910690c574 230 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 231 /**
AnnaBridge 145:64910690c574 232 * @}
AnnaBridge 145:64910690c574 233 */
AnnaBridge 145:64910690c574 234
AnnaBridge 145:64910690c574 235 /** @defgroup DAC_LL_EC_IT DAC interruptions
AnnaBridge 145:64910690c574 236 * @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions
AnnaBridge 145:64910690c574 237 * @{
AnnaBridge 145:64910690c574 238 */
AnnaBridge 145:64910690c574 239 #define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */
AnnaBridge 145:64910690c574 240 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 241 #define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */
AnnaBridge 145:64910690c574 242 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 243 /**
AnnaBridge 145:64910690c574 244 * @}
AnnaBridge 145:64910690c574 245 */
AnnaBridge 145:64910690c574 246
AnnaBridge 145:64910690c574 247 /** @defgroup DAC_LL_EC_CHANNEL DAC channels
AnnaBridge 145:64910690c574 248 * @{
AnnaBridge 145:64910690c574 249 */
AnnaBridge 145:64910690c574 250 #define LL_DAC_CHANNEL_1 (DAC_REG_SHSR1_REGOFFSET | DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */
AnnaBridge 145:64910690c574 251 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 252 #define LL_DAC_CHANNEL_2 (DAC_REG_SHSR2_REGOFFSET | DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */
AnnaBridge 145:64910690c574 253 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 254 /**
AnnaBridge 145:64910690c574 255 * @}
AnnaBridge 145:64910690c574 256 */
AnnaBridge 145:64910690c574 257
AnnaBridge 145:64910690c574 258 /** @defgroup DAC_LL_EC_OPERATING_MODE DAC operating mode
AnnaBridge 145:64910690c574 259 * @{
AnnaBridge 145:64910690c574 260 */
AnnaBridge 145:64910690c574 261 #define LL_DAC_MODE_NORMAL_OPERATION 0x00000000U /*!< DAC channel in mode normal operation */
AnnaBridge 145:64910690c574 262 #define LL_DAC_MODE_CALIBRATION (DAC_CR_CEN1) /*!< DAC channel in mode calibration */
AnnaBridge 145:64910690c574 263 /**
AnnaBridge 145:64910690c574 264 * @}
AnnaBridge 145:64910690c574 265 */
AnnaBridge 145:64910690c574 266
AnnaBridge 145:64910690c574 267 /** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
AnnaBridge 145:64910690c574 268 * @{
AnnaBridge 145:64910690c574 269 */
AnnaBridge 161:aa5281ff4a02 270 #if defined (DAC_CR_TSEL1_3)
AnnaBridge 161:aa5281ff4a02 271 #define LL_DAC_TRIG_EXT_TIM1_TRGO ( DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM1 TRGO. */
AnnaBridge 161:aa5281ff4a02 272 #define LL_DAC_TRIG_EXT_TIM2_TRGO ( DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: TIM2 TRGO. */
AnnaBridge 161:aa5281ff4a02 273 #define LL_DAC_TRIG_EXT_TIM4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM4 TRGO. */
AnnaBridge 161:aa5281ff4a02 274 #define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_2 ) /*!< DAC channel conversion trigger from external IP: TIM4 TRGO. */
AnnaBridge 161:aa5281ff4a02 275 #define LL_DAC_TRIG_EXT_TIM6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM6 TRGO. */
AnnaBridge 161:aa5281ff4a02 276 #define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: TIM7 TRGO. */
AnnaBridge 161:aa5281ff4a02 277 #define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM8 TRGO. */
AnnaBridge 161:aa5281ff4a02 278 #define LL_DAC_TRIG_EXT_TIM15_TRGO (DAC_CR_TSEL1_3 ) /*!< DAC channel conversion trigger from external IP: TIM15 TRGO. */
AnnaBridge 161:aa5281ff4a02 279 #define LL_DAC_TRIG_EXT_LPTIM1_OUT_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: LPTIM1 OUT TRGO. */
AnnaBridge 161:aa5281ff4a02 280 #define LL_DAC_TRIG_EXT_LPTIM2_OUT_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 ) /*!< DAC channel conversion trigger from external IP: LPTIM2 OUT TRGO. */
AnnaBridge 161:aa5281ff4a02 281 #define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: external interrupt line 9. */
AnnaBridge 161:aa5281ff4a02 282 #define LL_DAC_TRIG_SOFTWARE 0x00000000U /*!< DAC channel conversion trigger internal (SW start) */
AnnaBridge 161:aa5281ff4a02 283 #else
AnnaBridge 161:aa5281ff4a02 284 #define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */
AnnaBridge 161:aa5281ff4a02 285 #define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /*!< DAC channel conversion trigger from external IP: TIM2 TRGO. */
AnnaBridge 161:aa5281ff4a02 286 #define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM4 TRGO. */
AnnaBridge 161:aa5281ff4a02 287 #define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM5 TRGO. */
AnnaBridge 161:aa5281ff4a02 288 #define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /*!< DAC channel conversion trigger from external IP: TIM6 TRGO. */
AnnaBridge 161:aa5281ff4a02 289 #define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: TIM7 TRGO. */
AnnaBridge 161:aa5281ff4a02 290 #define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM8 TRGO. */
AnnaBridge 161:aa5281ff4a02 291 #define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: external interrupt line 9. */
AnnaBridge 161:aa5281ff4a02 292 #endif
AnnaBridge 145:64910690c574 293
AnnaBridge 145:64910690c574 294 /**
AnnaBridge 145:64910690c574 295 * @}
AnnaBridge 145:64910690c574 296 */
AnnaBridge 145:64910690c574 297
AnnaBridge 145:64910690c574 298 /** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
AnnaBridge 145:64910690c574 299 * @{
AnnaBridge 145:64910690c574 300 */
AnnaBridge 145:64910690c574 301 #define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /*!< DAC channel wave auto generation mode disabled. */
AnnaBridge 145:64910690c574 302 #define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */
AnnaBridge 145:64910690c574 303 #define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */
AnnaBridge 145:64910690c574 304 /**
AnnaBridge 145:64910690c574 305 * @}
AnnaBridge 145:64910690c574 306 */
AnnaBridge 145:64910690c574 307
AnnaBridge 145:64910690c574 308 /** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
AnnaBridge 145:64910690c574 309 * @{
AnnaBridge 145:64910690c574 310 */
AnnaBridge 145:64910690c574 311 #define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */
AnnaBridge 145:64910690c574 312 #define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 313 #define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 314 #define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 315 #define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 316 #define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 317 #define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 318 #define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 319 #define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 320 #define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 321 #define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 322 #define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */
AnnaBridge 145:64910690c574 323 /**
AnnaBridge 145:64910690c574 324 * @}
AnnaBridge 145:64910690c574 325 */
AnnaBridge 145:64910690c574 326
AnnaBridge 145:64910690c574 327 /** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
AnnaBridge 145:64910690c574 328 * @{
AnnaBridge 145:64910690c574 329 */
AnnaBridge 145:64910690c574 330 #define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 331 #define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 332 #define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 333 #define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 334 #define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 335 #define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 336 #define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 337 #define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 338 #define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 339 #define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 340 #define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 341 #define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */
AnnaBridge 145:64910690c574 342 /**
AnnaBridge 145:64910690c574 343 * @}
AnnaBridge 145:64910690c574 344 */
AnnaBridge 145:64910690c574 345
AnnaBridge 145:64910690c574 346 /** @defgroup DAC_LL_EC_OUTPUT_MODE DAC channel output mode
AnnaBridge 145:64910690c574 347 * @{
AnnaBridge 145:64910690c574 348 */
AnnaBridge 145:64910690c574 349 #define LL_DAC_OUTPUT_MODE_NORMAL 0x00000000U /*!< The selected DAC channel output is on mode normal. */
AnnaBridge 145:64910690c574 350 #define LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD (DAC_MCR_MODE1_2) /*!< The selected DAC channel output is on mode sample-and-hold. Mode sample-and-hold requires an external capacitor, refer to description of function @ref LL_DAC_ConfigOutput() or @ref LL_DAC_SetOutputMode(). */
AnnaBridge 145:64910690c574 351 /**
AnnaBridge 145:64910690c574 352 * @}
AnnaBridge 145:64910690c574 353 */
AnnaBridge 145:64910690c574 354
AnnaBridge 145:64910690c574 355 /** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
AnnaBridge 145:64910690c574 356 * @{
AnnaBridge 145:64910690c574 357 */
AnnaBridge 145:64910690c574 358 #define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */
AnnaBridge 145:64910690c574 359 #define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_MCR_MODE1_1) /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */
AnnaBridge 145:64910690c574 360 /**
AnnaBridge 145:64910690c574 361 * @}
AnnaBridge 145:64910690c574 362 */
AnnaBridge 145:64910690c574 363
AnnaBridge 145:64910690c574 364 /** @defgroup DAC_LL_EC_OUTPUT_CONNECTION DAC channel output connection
AnnaBridge 145:64910690c574 365 * @{
AnnaBridge 145:64910690c574 366 */
AnnaBridge 145:64910690c574 367 #define LL_DAC_OUTPUT_CONNECT_GPIO 0x00000000U /*!< The selected DAC channel output is connected to external pin */
AnnaBridge 145:64910690c574 368 #define LL_DAC_OUTPUT_CONNECT_INTERNAL (DAC_MCR_MODE1_0) /*!< The selected DAC channel output is connected to on-chip peripherals via internal paths. On this STM32 serie, output connection depends on output mode (normal or sample and hold) and output buffer state. Refer to comments of function @ref LL_DAC_SetOutputConnection(). */
AnnaBridge 145:64910690c574 369 /**
AnnaBridge 145:64910690c574 370 * @}
AnnaBridge 145:64910690c574 371 */
AnnaBridge 145:64910690c574 372
AnnaBridge 145:64910690c574 373 /** @defgroup DAC_LL_EC_LEGACY DAC literals legacy naming
AnnaBridge 145:64910690c574 374 * @{
AnnaBridge 145:64910690c574 375 */
AnnaBridge 145:64910690c574 376 #define LL_DAC_TRIGGER_SOFTWARE (LL_DAC_TRIG_SOFTWARE)
AnnaBridge 145:64910690c574 377 #define LL_DAC_TRIGGER_TIM2_TRGO (LL_DAC_TRIG_EXT_TIM2_TRGO)
AnnaBridge 145:64910690c574 378 #define LL_DAC_TRIGGER_TIM4_TRGO (LL_DAC_TRIG_EXT_TIM4_TRGO)
AnnaBridge 145:64910690c574 379 #define LL_DAC_TRIGGER_TIM5_TRGO (LL_DAC_TRIG_EXT_TIM5_TRGO)
AnnaBridge 145:64910690c574 380 #define LL_DAC_TRIGGER_TIM6_TRGO (LL_DAC_TRIG_EXT_TIM6_TRGO)
AnnaBridge 145:64910690c574 381 #define LL_DAC_TRIGGER_TIM7_TRGO (LL_DAC_TRIG_EXT_TIM7_TRGO)
AnnaBridge 145:64910690c574 382 #define LL_DAC_TRIGGER_TIM8_TRGO (LL_DAC_TRIG_EXT_TIM8_TRGO)
AnnaBridge 145:64910690c574 383 #define LL_DAC_TRIGGER_EXT_IT9 (LL_DAC_TRIG_EXT_EXTI_LINE9)
AnnaBridge 145:64910690c574 384
AnnaBridge 145:64910690c574 385 #define LL_DAC_WAVEGENERATION_NONE (LL_DAC_WAVE_AUTO_GENERATION_NONE)
AnnaBridge 145:64910690c574 386 #define LL_DAC_WAVEGENERATION_NOISE (LL_DAC_WAVE_AUTO_GENERATION_NOISE)
AnnaBridge 145:64910690c574 387 #define LL_DAC_WAVEGENERATION_TRIANGLE (LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE)
AnnaBridge 145:64910690c574 388
AnnaBridge 145:64910690c574 389 #define LL_DAC_CONNECT_GPIO (LL_DAC_OUTPUT_CONNECT_GPIO)
AnnaBridge 145:64910690c574 390 #define LL_DAC_CONNECT_INTERNAL (LL_DAC_OUTPUT_CONNECT_INTERNAL)
AnnaBridge 145:64910690c574 391 /**
AnnaBridge 145:64910690c574 392 * @}
AnnaBridge 145:64910690c574 393 */
AnnaBridge 145:64910690c574 394
AnnaBridge 145:64910690c574 395 /** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution
AnnaBridge 145:64910690c574 396 * @{
AnnaBridge 145:64910690c574 397 */
AnnaBridge 145:64910690c574 398 #define LL_DAC_RESOLUTION_12B 0x00000000U /*!< DAC channel resolution 12 bits */
AnnaBridge 145:64910690c574 399 #define LL_DAC_RESOLUTION_8B 0x00000002U /*!< DAC channel resolution 8 bits */
AnnaBridge 145:64910690c574 400 /**
AnnaBridge 145:64910690c574 401 * @}
AnnaBridge 145:64910690c574 402 */
AnnaBridge 145:64910690c574 403
AnnaBridge 145:64910690c574 404 /** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose
AnnaBridge 145:64910690c574 405 * @{
AnnaBridge 145:64910690c574 406 */
AnnaBridge 145:64910690c574 407 /* List of DAC registers intended to be used (most commonly) with */
AnnaBridge 145:64910690c574 408 /* DMA transfer. */
AnnaBridge 145:64910690c574 409 /* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */
AnnaBridge 145:64910690c574 410 #define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits right aligned */
AnnaBridge 145:64910690c574 411 #define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits left aligned */
AnnaBridge 145:64910690c574 412 #define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /*!< DAC channel data holding register 8 bits right aligned */
AnnaBridge 145:64910690c574 413 /**
AnnaBridge 145:64910690c574 414 * @}
AnnaBridge 145:64910690c574 415 */
AnnaBridge 145:64910690c574 416
AnnaBridge 145:64910690c574 417 /** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays
AnnaBridge 145:64910690c574 418 * @note Only DAC IP HW delays are defined in DAC LL driver driver,
AnnaBridge 145:64910690c574 419 * not timeout values.
AnnaBridge 145:64910690c574 420 * For details on delays values, refer to descriptions in source code
AnnaBridge 145:64910690c574 421 * above each literal definition.
AnnaBridge 145:64910690c574 422 * @{
AnnaBridge 145:64910690c574 423 */
AnnaBridge 145:64910690c574 424
AnnaBridge 145:64910690c574 425 /* Delay for DAC channel voltage settling time from DAC channel startup */
AnnaBridge 145:64910690c574 426 /* (transition from disable to enable). */
AnnaBridge 145:64910690c574 427 /* Note: DAC channel startup time depends on board application environment: */
AnnaBridge 145:64910690c574 428 /* impedance connected to DAC channel output. */
AnnaBridge 145:64910690c574 429 /* The delay below is specified under conditions: */
AnnaBridge 145:64910690c574 430 /* - voltage maximum transition (lowest to highest value) */
AnnaBridge 145:64910690c574 431 /* - until voltage reaches final value +-1LSB */
AnnaBridge 145:64910690c574 432 /* - DAC channel output buffer enabled */
AnnaBridge 145:64910690c574 433 /* - load impedance of 5kOhm (min), 50pF (max) */
AnnaBridge 145:64910690c574 434 /* Literal set to maximum value (refer to device datasheet, */
AnnaBridge 145:64910690c574 435 /* parameter "tWAKEUP"). */
AnnaBridge 145:64910690c574 436 /* Unit: us */
AnnaBridge 145:64910690c574 437 #define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 8U /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */
AnnaBridge 145:64910690c574 438
AnnaBridge 145:64910690c574 439
AnnaBridge 145:64910690c574 440 /* Delay for DAC channel voltage settling time. */
AnnaBridge 145:64910690c574 441 /* Note: DAC channel startup time depends on board application environment: */
AnnaBridge 145:64910690c574 442 /* impedance connected to DAC channel output. */
AnnaBridge 145:64910690c574 443 /* The delay below is specified under conditions: */
AnnaBridge 145:64910690c574 444 /* - voltage maximum transition (lowest to highest value) */
AnnaBridge 145:64910690c574 445 /* - until voltage reaches final value +-1LSB */
AnnaBridge 145:64910690c574 446 /* - DAC channel output buffer enabled */
AnnaBridge 145:64910690c574 447 /* - load impedance of 5kOhm min, 50pF max */
AnnaBridge 145:64910690c574 448 /* Literal set to maximum value (refer to device datasheet, */
AnnaBridge 145:64910690c574 449 /* parameter "tSETTLING"). */
AnnaBridge 145:64910690c574 450 /* Unit: us */
AnnaBridge 145:64910690c574 451 #define LL_DAC_DELAY_VOLTAGE_SETTLING_US 2U /*!< Delay for DAC channel voltage settling time */
AnnaBridge 145:64910690c574 452
AnnaBridge 145:64910690c574 453 /**
AnnaBridge 145:64910690c574 454 * @}
AnnaBridge 145:64910690c574 455 */
AnnaBridge 145:64910690c574 456
AnnaBridge 145:64910690c574 457 /**
AnnaBridge 145:64910690c574 458 * @}
AnnaBridge 145:64910690c574 459 */
AnnaBridge 145:64910690c574 460
AnnaBridge 145:64910690c574 461 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 145:64910690c574 462 /** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
AnnaBridge 145:64910690c574 463 * @{
AnnaBridge 145:64910690c574 464 */
AnnaBridge 145:64910690c574 465
AnnaBridge 145:64910690c574 466 /** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
AnnaBridge 145:64910690c574 467 * @{
AnnaBridge 145:64910690c574 468 */
AnnaBridge 145:64910690c574 469
AnnaBridge 145:64910690c574 470 /**
AnnaBridge 145:64910690c574 471 * @brief Write a value in DAC register
AnnaBridge 145:64910690c574 472 * @param __INSTANCE__ DAC Instance
AnnaBridge 145:64910690c574 473 * @param __REG__ Register to be written
AnnaBridge 145:64910690c574 474 * @param __VALUE__ Value to be written in the register
AnnaBridge 145:64910690c574 475 * @retval None
AnnaBridge 145:64910690c574 476 */
AnnaBridge 145:64910690c574 477 #define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 145:64910690c574 478
AnnaBridge 145:64910690c574 479 /**
AnnaBridge 145:64910690c574 480 * @brief Read a value in DAC register
AnnaBridge 145:64910690c574 481 * @param __INSTANCE__ DAC Instance
AnnaBridge 145:64910690c574 482 * @param __REG__ Register to be read
AnnaBridge 145:64910690c574 483 * @retval Register value
AnnaBridge 145:64910690c574 484 */
AnnaBridge 145:64910690c574 485 #define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 145:64910690c574 486
AnnaBridge 145:64910690c574 487 /**
AnnaBridge 145:64910690c574 488 * @}
AnnaBridge 145:64910690c574 489 */
AnnaBridge 145:64910690c574 490
AnnaBridge 145:64910690c574 491 /** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
AnnaBridge 145:64910690c574 492 * @{
AnnaBridge 145:64910690c574 493 */
AnnaBridge 145:64910690c574 494
AnnaBridge 145:64910690c574 495 /**
AnnaBridge 145:64910690c574 496 * @brief Helper macro to get DAC channel number in decimal format
AnnaBridge 145:64910690c574 497 * from literals LL_DAC_CHANNEL_x.
AnnaBridge 145:64910690c574 498 * Example:
AnnaBridge 145:64910690c574 499 * __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
AnnaBridge 145:64910690c574 500 * will return decimal number "1".
AnnaBridge 145:64910690c574 501 * @note The input can be a value from functions where a channel
AnnaBridge 145:64910690c574 502 * number is returned.
AnnaBridge 145:64910690c574 503 * @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge 145:64910690c574 504 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 505 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 506 *
AnnaBridge 145:64910690c574 507 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 508 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 509 * @retval 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge 145:64910690c574 510 */
AnnaBridge 145:64910690c574 511 #define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge 145:64910690c574 512 ((__CHANNEL__) & DAC_SWTR_CHX_MASK)
AnnaBridge 145:64910690c574 513
AnnaBridge 145:64910690c574 514 /**
AnnaBridge 145:64910690c574 515 * @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
AnnaBridge 145:64910690c574 516 * from number in decimal format.
AnnaBridge 145:64910690c574 517 * Example:
AnnaBridge 145:64910690c574 518 * __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
AnnaBridge 145:64910690c574 519 * will return a data equivalent to "LL_DAC_CHANNEL_1".
AnnaBridge 145:64910690c574 520 * @note If the input parameter does not correspond to a DAC channel,
AnnaBridge 145:64910690c574 521 * this macro returns value '0'.
AnnaBridge 145:64910690c574 522 * @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge 145:64910690c574 523 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 524 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 525 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 526 *
AnnaBridge 145:64910690c574 527 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 528 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 529 */
AnnaBridge 145:64910690c574 530 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 531 #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge 145:64910690c574 532 (((__DECIMAL_NB__) == 1U) \
AnnaBridge 145:64910690c574 533 ? ( \
AnnaBridge 145:64910690c574 534 LL_DAC_CHANNEL_1 \
AnnaBridge 145:64910690c574 535 ) \
AnnaBridge 145:64910690c574 536 : \
AnnaBridge 145:64910690c574 537 (((__DECIMAL_NB__) == 2U) \
AnnaBridge 145:64910690c574 538 ? ( \
AnnaBridge 145:64910690c574 539 LL_DAC_CHANNEL_2 \
AnnaBridge 145:64910690c574 540 ) \
AnnaBridge 145:64910690c574 541 : \
AnnaBridge 145:64910690c574 542 ( \
AnnaBridge 145:64910690c574 543 0 \
AnnaBridge 145:64910690c574 544 ) \
AnnaBridge 145:64910690c574 545 ) \
AnnaBridge 145:64910690c574 546 )
AnnaBridge 145:64910690c574 547 #else
AnnaBridge 145:64910690c574 548 #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge 145:64910690c574 549 (((__DECIMAL_NB__) == 1U) \
AnnaBridge 145:64910690c574 550 ? ( \
AnnaBridge 145:64910690c574 551 LL_DAC_CHANNEL_1 \
AnnaBridge 145:64910690c574 552 ) \
AnnaBridge 145:64910690c574 553 : \
AnnaBridge 145:64910690c574 554 ( \
AnnaBridge 145:64910690c574 555 0 \
AnnaBridge 145:64910690c574 556 ) \
AnnaBridge 145:64910690c574 557 )
AnnaBridge 145:64910690c574 558 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 559
AnnaBridge 145:64910690c574 560 /**
AnnaBridge 145:64910690c574 561 * @brief Helper macro to define the DAC conversion data full-scale digital
AnnaBridge 145:64910690c574 562 * value corresponding to the selected DAC resolution.
AnnaBridge 145:64910690c574 563 * @note DAC conversion data full-scale corresponds to voltage range
AnnaBridge 145:64910690c574 564 * determined by analog voltage references Vref+ and Vref-
AnnaBridge 145:64910690c574 565 * (refer to reference manual).
AnnaBridge 145:64910690c574 566 * @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge 145:64910690c574 567 * @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge 145:64910690c574 568 * @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge 145:64910690c574 569 * @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge 145:64910690c574 570 */
AnnaBridge 145:64910690c574 571 #define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge 145:64910690c574 572 ((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U))
AnnaBridge 145:64910690c574 573
AnnaBridge 145:64910690c574 574 /**
AnnaBridge 145:64910690c574 575 * @brief Helper macro to calculate the DAC conversion data (unit: digital
AnnaBridge 145:64910690c574 576 * value) corresponding to a voltage (unit: mVolt).
AnnaBridge 145:64910690c574 577 * @note This helper macro is intended to provide input data in voltage
AnnaBridge 145:64910690c574 578 * rather than digital value,
AnnaBridge 145:64910690c574 579 * to be used with LL DAC functions such as
AnnaBridge 145:64910690c574 580 * @ref LL_DAC_ConvertData12RightAligned().
AnnaBridge 145:64910690c574 581 * @note Analog reference voltage (Vref+) must be either known from
AnnaBridge 145:64910690c574 582 * user board environment or can be calculated using ADC measurement
AnnaBridge 145:64910690c574 583 * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge 145:64910690c574 584 * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge 145:64910690c574 585 * @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel
AnnaBridge 145:64910690c574 586 * (unit: mVolt).
AnnaBridge 145:64910690c574 587 * @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge 145:64910690c574 588 * @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge 145:64910690c574 589 * @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge 145:64910690c574 590 * @retval DAC conversion data (unit: digital value)
AnnaBridge 145:64910690c574 591 */
AnnaBridge 145:64910690c574 592 #define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
AnnaBridge 145:64910690c574 593 __DAC_VOLTAGE__,\
AnnaBridge 145:64910690c574 594 __DAC_RESOLUTION__) \
AnnaBridge 145:64910690c574 595 ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge 145:64910690c574 596 / (__VREFANALOG_VOLTAGE__) \
AnnaBridge 145:64910690c574 597 )
AnnaBridge 145:64910690c574 598
AnnaBridge 145:64910690c574 599 /**
AnnaBridge 145:64910690c574 600 * @}
AnnaBridge 145:64910690c574 601 */
AnnaBridge 145:64910690c574 602
AnnaBridge 145:64910690c574 603 /**
AnnaBridge 145:64910690c574 604 * @}
AnnaBridge 145:64910690c574 605 */
AnnaBridge 145:64910690c574 606
AnnaBridge 145:64910690c574 607
AnnaBridge 145:64910690c574 608 /* Exported functions --------------------------------------------------------*/
AnnaBridge 145:64910690c574 609 /** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
AnnaBridge 145:64910690c574 610 * @{
AnnaBridge 145:64910690c574 611 */
AnnaBridge 145:64910690c574 612 /** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
AnnaBridge 145:64910690c574 613 * @{
AnnaBridge 145:64910690c574 614 */
AnnaBridge 145:64910690c574 615
AnnaBridge 145:64910690c574 616 /**
AnnaBridge 145:64910690c574 617 * @brief Set the operating mode for the selected DAC channel:
AnnaBridge 145:64910690c574 618 * calibration or normal operating mode.
AnnaBridge 145:64910690c574 619 * @rmtoll CR CEN1 LL_DAC_SetMode\n
AnnaBridge 145:64910690c574 620 * CR CEN2 LL_DAC_SetMode
AnnaBridge 145:64910690c574 621 * @param DACx DAC instance
AnnaBridge 145:64910690c574 622 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 623 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 624 *
AnnaBridge 145:64910690c574 625 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 626 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 627 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 628 * @param ChannelMode This parameter can be one of the following values:
AnnaBridge 145:64910690c574 629 * @arg @ref LL_DAC_MODE_NORMAL_OPERATION
AnnaBridge 145:64910690c574 630 * @arg @ref LL_DAC_MODE_CALIBRATION
AnnaBridge 145:64910690c574 631 * @retval None
AnnaBridge 145:64910690c574 632 */
AnnaBridge 145:64910690c574 633 __STATIC_INLINE void LL_DAC_SetMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t ChannelMode)
AnnaBridge 145:64910690c574 634 {
AnnaBridge 145:64910690c574 635 MODIFY_REG(DACx->CR,
AnnaBridge 145:64910690c574 636 DAC_CR_CEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 637 ChannelMode << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 638 }
AnnaBridge 145:64910690c574 639
AnnaBridge 145:64910690c574 640 /**
AnnaBridge 145:64910690c574 641 * @brief Get the operating mode for the selected DAC channel:
AnnaBridge 145:64910690c574 642 * calibration or normal operating mode.
AnnaBridge 145:64910690c574 643 * @rmtoll CR CEN1 LL_DAC_GetMode\n
AnnaBridge 145:64910690c574 644 * CR CEN2 LL_DAC_GetMode
AnnaBridge 145:64910690c574 645 * @param DACx DAC instance
AnnaBridge 145:64910690c574 646 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 647 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 648 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 649 *
AnnaBridge 145:64910690c574 650 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 651 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 652 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 653 * @arg @ref LL_DAC_MODE_NORMAL_OPERATION
AnnaBridge 145:64910690c574 654 * @arg @ref LL_DAC_MODE_CALIBRATION
AnnaBridge 145:64910690c574 655 */
AnnaBridge 145:64910690c574 656 __STATIC_INLINE uint32_t LL_DAC_GetMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 657 {
AnnaBridge 145:64910690c574 658 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_CEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 659 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 660 );
AnnaBridge 145:64910690c574 661 }
AnnaBridge 145:64910690c574 662
AnnaBridge 145:64910690c574 663 /**
AnnaBridge 145:64910690c574 664 * @brief Set the offset trimming value for the selected DAC channel.
AnnaBridge 145:64910690c574 665 * Trimming has an impact when output buffer is enabled
AnnaBridge 145:64910690c574 666 * and is intended to replace factory calibration default values.
AnnaBridge 145:64910690c574 667 * @rmtoll CCR OTRIM1 LL_DAC_SetTrimmingValue\n
AnnaBridge 145:64910690c574 668 * CCR OTRIM2 LL_DAC_SetTrimmingValue
AnnaBridge 145:64910690c574 669 * @param DACx DAC instance
AnnaBridge 145:64910690c574 670 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 671 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 672 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 673 *
AnnaBridge 145:64910690c574 674 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 675 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 676 * @param TrimmingValue Value between Min_Data=0x00 and Max_Data=0x1F
AnnaBridge 145:64910690c574 677 * @retval None
AnnaBridge 145:64910690c574 678 */
AnnaBridge 145:64910690c574 679 __STATIC_INLINE void LL_DAC_SetTrimmingValue(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TrimmingValue)
AnnaBridge 145:64910690c574 680 {
AnnaBridge 145:64910690c574 681 MODIFY_REG(DACx->CCR,
AnnaBridge 145:64910690c574 682 DAC_CCR_OTRIM1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 683 TrimmingValue << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 684 }
AnnaBridge 145:64910690c574 685
AnnaBridge 145:64910690c574 686 /**
AnnaBridge 145:64910690c574 687 * @brief Get the offset trimming value for the selected DAC channel.
AnnaBridge 145:64910690c574 688 * Trimming has an impact when output buffer is enabled
AnnaBridge 145:64910690c574 689 * and is intended to replace factory calibration default values.
AnnaBridge 145:64910690c574 690 * @rmtoll CCR OTRIM1 LL_DAC_GetTrimmingValue\n
AnnaBridge 145:64910690c574 691 * CCR OTRIM2 LL_DAC_GetTrimmingValue
AnnaBridge 145:64910690c574 692 * @param DACx DAC instance
AnnaBridge 145:64910690c574 693 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 694 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 695 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 696 *
AnnaBridge 145:64910690c574 697 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 698 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 699 * @retval TrimmingValue Value between Min_Data=0x00 and Max_Data=0x1F
AnnaBridge 145:64910690c574 700 */
AnnaBridge 145:64910690c574 701 __STATIC_INLINE uint32_t LL_DAC_GetTrimmingValue(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 702 {
AnnaBridge 145:64910690c574 703 return (uint32_t)(READ_BIT(DACx->CCR, DAC_CCR_OTRIM1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 704 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 705 );
AnnaBridge 145:64910690c574 706 }
AnnaBridge 145:64910690c574 707
AnnaBridge 145:64910690c574 708 /**
AnnaBridge 145:64910690c574 709 * @brief Set the conversion trigger source for the selected DAC channel.
AnnaBridge 145:64910690c574 710 * @note For conversion trigger source to be effective, DAC trigger
AnnaBridge 145:64910690c574 711 * must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge 145:64910690c574 712 * @note To set conversion trigger source, DAC channel must be disabled.
AnnaBridge 145:64910690c574 713 * Otherwise, the setting is discarded.
AnnaBridge 145:64910690c574 714 * @note Availability of parameters of trigger sources from timer
AnnaBridge 145:64910690c574 715 * depends on timers availability on the selected device.
AnnaBridge 145:64910690c574 716 * @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n
AnnaBridge 145:64910690c574 717 * CR TSEL2 LL_DAC_SetTriggerSource
AnnaBridge 145:64910690c574 718 * @param DACx DAC instance
AnnaBridge 145:64910690c574 719 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 720 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 721 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 722 *
AnnaBridge 145:64910690c574 723 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 724 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 725 * @param TriggerSource This parameter can be one of the following values:
AnnaBridge 145:64910690c574 726 * @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge 145:64910690c574 727 * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge 145:64910690c574 728 * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge 145:64910690c574 729 * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge 145:64910690c574 730 * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge 145:64910690c574 731 * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge 145:64910690c574 732 * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge 145:64910690c574 733 * @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
AnnaBridge 145:64910690c574 734 * @retval None
AnnaBridge 145:64910690c574 735 */
AnnaBridge 145:64910690c574 736 __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
AnnaBridge 145:64910690c574 737 {
AnnaBridge 145:64910690c574 738 MODIFY_REG(DACx->CR,
AnnaBridge 145:64910690c574 739 DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 740 TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 741 }
AnnaBridge 145:64910690c574 742
AnnaBridge 145:64910690c574 743 /**
AnnaBridge 145:64910690c574 744 * @brief Get the conversion trigger source for the selected DAC channel.
AnnaBridge 145:64910690c574 745 * @note For conversion trigger source to be effective, DAC trigger
AnnaBridge 145:64910690c574 746 * must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge 145:64910690c574 747 * @note Availability of parameters of trigger sources from timer
AnnaBridge 145:64910690c574 748 * depends on timers availability on the selected device.
AnnaBridge 145:64910690c574 749 * @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n
AnnaBridge 145:64910690c574 750 * CR TSEL2 LL_DAC_GetTriggerSource
AnnaBridge 145:64910690c574 751 * @param DACx DAC instance
AnnaBridge 145:64910690c574 752 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 753 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 754 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 755 *
AnnaBridge 145:64910690c574 756 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 757 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 758 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 759 * @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge 145:64910690c574 760 * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge 145:64910690c574 761 * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge 145:64910690c574 762 * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge 145:64910690c574 763 * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge 145:64910690c574 764 * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge 145:64910690c574 765 * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge 145:64910690c574 766 * @arg @ref LL_DAC_TRIGGER_EXT_IT9
AnnaBridge 145:64910690c574 767 */
AnnaBridge 145:64910690c574 768 __STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 769 {
AnnaBridge 145:64910690c574 770 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 771 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 772 );
AnnaBridge 145:64910690c574 773 }
AnnaBridge 145:64910690c574 774
AnnaBridge 145:64910690c574 775 /**
AnnaBridge 145:64910690c574 776 * @brief Set the waveform automatic generation mode
AnnaBridge 145:64910690c574 777 * for the selected DAC channel.
AnnaBridge 145:64910690c574 778 * @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n
AnnaBridge 145:64910690c574 779 * CR WAVE2 LL_DAC_SetWaveAutoGeneration
AnnaBridge 145:64910690c574 780 * @param DACx DAC instance
AnnaBridge 145:64910690c574 781 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 782 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 783 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 784 *
AnnaBridge 145:64910690c574 785 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 786 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 787 * @param WaveAutoGeneration This parameter can be one of the following values:
AnnaBridge 145:64910690c574 788 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge 145:64910690c574 789 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge 145:64910690c574 790 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge 145:64910690c574 791 * @retval None
AnnaBridge 145:64910690c574 792 */
AnnaBridge 145:64910690c574 793 __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
AnnaBridge 145:64910690c574 794 {
AnnaBridge 145:64910690c574 795 MODIFY_REG(DACx->CR,
AnnaBridge 145:64910690c574 796 DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 797 WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 798 }
AnnaBridge 145:64910690c574 799
AnnaBridge 145:64910690c574 800 /**
AnnaBridge 145:64910690c574 801 * @brief Get the waveform automatic generation mode
AnnaBridge 145:64910690c574 802 * for the selected DAC channel.
AnnaBridge 145:64910690c574 803 * @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n
AnnaBridge 145:64910690c574 804 * CR WAVE2 LL_DAC_GetWaveAutoGeneration
AnnaBridge 145:64910690c574 805 * @param DACx DAC instance
AnnaBridge 145:64910690c574 806 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 807 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 808 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 809 *
AnnaBridge 145:64910690c574 810 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 811 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 812 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 813 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge 145:64910690c574 814 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge 145:64910690c574 815 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge 145:64910690c574 816 */
AnnaBridge 145:64910690c574 817 __STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 818 {
AnnaBridge 145:64910690c574 819 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 820 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 821 );
AnnaBridge 145:64910690c574 822 }
AnnaBridge 145:64910690c574 823
AnnaBridge 145:64910690c574 824 /**
AnnaBridge 145:64910690c574 825 * @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge 145:64910690c574 826 * Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge 145:64910690c574 827 * @note For wave generation to be effective, DAC channel
AnnaBridge 145:64910690c574 828 * wave generation mode must be enabled using
AnnaBridge 145:64910690c574 829 * function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge 145:64910690c574 830 * @note This setting can be set when the selected DAC channel is disabled
AnnaBridge 145:64910690c574 831 * (otherwise, the setting operation is ignored).
AnnaBridge 145:64910690c574 832 * @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n
AnnaBridge 145:64910690c574 833 * CR MAMP2 LL_DAC_SetWaveNoiseLFSR
AnnaBridge 145:64910690c574 834 * @param DACx DAC instance
AnnaBridge 145:64910690c574 835 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 836 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 837 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 838 *
AnnaBridge 145:64910690c574 839 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 840 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 841 * @param NoiseLFSRMask This parameter can be one of the following values:
AnnaBridge 145:64910690c574 842 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge 145:64910690c574 843 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge 145:64910690c574 844 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge 145:64910690c574 845 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge 145:64910690c574 846 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge 145:64910690c574 847 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge 145:64910690c574 848 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge 145:64910690c574 849 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge 145:64910690c574 850 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge 145:64910690c574 851 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge 145:64910690c574 852 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge 145:64910690c574 853 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge 145:64910690c574 854 * @retval None
AnnaBridge 145:64910690c574 855 */
AnnaBridge 145:64910690c574 856 __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
AnnaBridge 145:64910690c574 857 {
AnnaBridge 145:64910690c574 858 MODIFY_REG(DACx->CR,
AnnaBridge 145:64910690c574 859 DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 860 NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 861 }
AnnaBridge 145:64910690c574 862
AnnaBridge 145:64910690c574 863 /**
AnnaBridge 145:64910690c574 864 * @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge 145:64910690c574 865 * Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge 145:64910690c574 866 * @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n
AnnaBridge 145:64910690c574 867 * CR MAMP2 LL_DAC_GetWaveNoiseLFSR
AnnaBridge 145:64910690c574 868 * @param DACx DAC instance
AnnaBridge 145:64910690c574 869 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 870 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 871 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 872 *
AnnaBridge 145:64910690c574 873 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 874 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 875 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 876 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge 145:64910690c574 877 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge 145:64910690c574 878 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge 145:64910690c574 879 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge 145:64910690c574 880 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge 145:64910690c574 881 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge 145:64910690c574 882 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge 145:64910690c574 883 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge 145:64910690c574 884 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge 145:64910690c574 885 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge 145:64910690c574 886 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge 145:64910690c574 887 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge 145:64910690c574 888 */
AnnaBridge 145:64910690c574 889 __STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 890 {
AnnaBridge 145:64910690c574 891 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 892 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 893 );
AnnaBridge 145:64910690c574 894 }
AnnaBridge 145:64910690c574 895
AnnaBridge 145:64910690c574 896 /**
AnnaBridge 145:64910690c574 897 * @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge 145:64910690c574 898 * triangle mode and amplitude.
AnnaBridge 145:64910690c574 899 * @note For wave generation to be effective, DAC channel
AnnaBridge 145:64910690c574 900 * wave generation mode must be enabled using
AnnaBridge 145:64910690c574 901 * function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge 145:64910690c574 902 * @note This setting can be set when the selected DAC channel is disabled
AnnaBridge 145:64910690c574 903 * (otherwise, the setting operation is ignored).
AnnaBridge 145:64910690c574 904 * @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n
AnnaBridge 145:64910690c574 905 * CR MAMP2 LL_DAC_SetWaveTriangleAmplitude
AnnaBridge 145:64910690c574 906 * @param DACx DAC instance
AnnaBridge 145:64910690c574 907 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 908 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 909 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 910 *
AnnaBridge 145:64910690c574 911 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 912 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 913 * @param TriangleAmplitude This parameter can be one of the following values:
AnnaBridge 145:64910690c574 914 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge 145:64910690c574 915 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge 145:64910690c574 916 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge 145:64910690c574 917 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge 145:64910690c574 918 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge 145:64910690c574 919 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge 145:64910690c574 920 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge 145:64910690c574 921 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge 145:64910690c574 922 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge 145:64910690c574 923 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge 145:64910690c574 924 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge 145:64910690c574 925 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge 145:64910690c574 926 * @retval None
AnnaBridge 145:64910690c574 927 */
AnnaBridge 145:64910690c574 928 __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
AnnaBridge 145:64910690c574 929 {
AnnaBridge 145:64910690c574 930 MODIFY_REG(DACx->CR,
AnnaBridge 145:64910690c574 931 DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 932 TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 933 }
AnnaBridge 145:64910690c574 934
AnnaBridge 145:64910690c574 935 /**
AnnaBridge 145:64910690c574 936 * @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge 145:64910690c574 937 * triangle mode and amplitude.
AnnaBridge 145:64910690c574 938 * @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n
AnnaBridge 145:64910690c574 939 * CR MAMP2 LL_DAC_GetWaveTriangleAmplitude
AnnaBridge 145:64910690c574 940 * @param DACx DAC instance
AnnaBridge 145:64910690c574 941 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 942 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 943 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 944 *
AnnaBridge 145:64910690c574 945 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 946 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 947 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 948 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge 145:64910690c574 949 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge 145:64910690c574 950 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge 145:64910690c574 951 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge 145:64910690c574 952 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge 145:64910690c574 953 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge 145:64910690c574 954 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge 145:64910690c574 955 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge 145:64910690c574 956 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge 145:64910690c574 957 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge 145:64910690c574 958 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge 145:64910690c574 959 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge 145:64910690c574 960 */
AnnaBridge 145:64910690c574 961 __STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 962 {
AnnaBridge 145:64910690c574 963 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 964 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 965 );
AnnaBridge 145:64910690c574 966 }
AnnaBridge 145:64910690c574 967
AnnaBridge 145:64910690c574 968 /**
AnnaBridge 145:64910690c574 969 * @brief Set the output for the selected DAC channel.
AnnaBridge 145:64910690c574 970 * @note This function set several features:
AnnaBridge 145:64910690c574 971 * - mode normal or sample-and-hold
AnnaBridge 145:64910690c574 972 * - buffer
AnnaBridge 145:64910690c574 973 * - connection to GPIO or internal path.
AnnaBridge 145:64910690c574 974 * These features can also be set individually using
AnnaBridge 145:64910690c574 975 * dedicated functions:
AnnaBridge 145:64910690c574 976 * - @ref LL_DAC_SetOutputBuffer()
AnnaBridge 145:64910690c574 977 * - @ref LL_DAC_SetOutputMode()
AnnaBridge 145:64910690c574 978 * - @ref LL_DAC_SetOutputConnection()
AnnaBridge 145:64910690c574 979 * @note On this STM32 serie, output connection depends on output mode
AnnaBridge 145:64910690c574 980 * (normal or sample and hold) and output buffer state.
AnnaBridge 145:64910690c574 981 * - if output connection is set to internal path and output buffer
AnnaBridge 145:64910690c574 982 * is enabled (whatever output mode):
AnnaBridge 145:64910690c574 983 * output connection is also connected to GPIO pin
AnnaBridge 145:64910690c574 984 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 985 * - if output connection is set to GPIO pin, output buffer
AnnaBridge 145:64910690c574 986 * is disabled, output mode set to sample and hold:
AnnaBridge 145:64910690c574 987 * output connection is also connected to internal path
AnnaBridge 145:64910690c574 988 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 989 * @note Mode sample-and-hold requires an external capacitor
AnnaBridge 145:64910690c574 990 * to be connected between DAC channel output and ground.
AnnaBridge 145:64910690c574 991 * Capacitor value depends on load on DAC channel output and
AnnaBridge 145:64910690c574 992 * sample-and-hold timings configured.
AnnaBridge 145:64910690c574 993 * As indication, capacitor typical value is 100nF
AnnaBridge 145:64910690c574 994 * (refer to device datasheet, parameter "CSH").
AnnaBridge 145:64910690c574 995 * @rmtoll CR MODE1 LL_DAC_ConfigOutput\n
AnnaBridge 145:64910690c574 996 * CR MODE2 LL_DAC_ConfigOutput
AnnaBridge 145:64910690c574 997 * @param DACx DAC instance
AnnaBridge 145:64910690c574 998 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 999 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1000 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1001 *
AnnaBridge 145:64910690c574 1002 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1003 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1004 * @param OutputMode This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1005 * @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
AnnaBridge 145:64910690c574 1006 * @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
AnnaBridge 145:64910690c574 1007 * @param OutputBuffer This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1008 * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge 145:64910690c574 1009 * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge 145:64910690c574 1010 * @param OutputConnection This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1011 * @arg @ref LL_DAC_OUTPUT_CONNECT_GPIO
AnnaBridge 145:64910690c574 1012 * @arg @ref LL_DAC_OUTPUT_CONNECT_INTERNAL
AnnaBridge 145:64910690c574 1013 * @retval None
AnnaBridge 145:64910690c574 1014 */
AnnaBridge 145:64910690c574 1015 __STATIC_INLINE void LL_DAC_ConfigOutput(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputMode, uint32_t OutputBuffer, uint32_t OutputConnection)
AnnaBridge 145:64910690c574 1016 {
AnnaBridge 145:64910690c574 1017 MODIFY_REG(DACx->MCR,
AnnaBridge 145:64910690c574 1018 (DAC_MCR_MODE1_2 | DAC_MCR_MODE1_1 | DAC_MCR_MODE1_0) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1019 (OutputMode | OutputBuffer | OutputConnection) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1020 }
AnnaBridge 145:64910690c574 1021
AnnaBridge 145:64910690c574 1022 /**
AnnaBridge 145:64910690c574 1023 * @brief Set the output mode normal or sample-and-hold
AnnaBridge 145:64910690c574 1024 * for the selected DAC channel.
AnnaBridge 145:64910690c574 1025 * @note Mode sample-and-hold requires an external capacitor
AnnaBridge 145:64910690c574 1026 * to be connected between DAC channel output and ground.
AnnaBridge 145:64910690c574 1027 * Capacitor value depends on load on DAC channel output and
AnnaBridge 145:64910690c574 1028 * sample-and-hold timings configured.
AnnaBridge 145:64910690c574 1029 * As indication, capacitor typical value is 100nF
AnnaBridge 145:64910690c574 1030 * (refer to device datasheet, parameter "CSH").
AnnaBridge 145:64910690c574 1031 * @rmtoll CR MODE1 LL_DAC_SetOutputMode\n
AnnaBridge 145:64910690c574 1032 * CR MODE2 LL_DAC_SetOutputMode
AnnaBridge 145:64910690c574 1033 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1034 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1035 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1036 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1037 *
AnnaBridge 145:64910690c574 1038 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1039 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1040 * @param OutputMode This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1041 * @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
AnnaBridge 145:64910690c574 1042 * @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
AnnaBridge 145:64910690c574 1043 * @retval None
AnnaBridge 145:64910690c574 1044 */
AnnaBridge 145:64910690c574 1045 __STATIC_INLINE void LL_DAC_SetOutputMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputMode)
AnnaBridge 145:64910690c574 1046 {
AnnaBridge 145:64910690c574 1047 MODIFY_REG(DACx->MCR,
AnnaBridge 145:64910690c574 1048 DAC_MCR_MODE1_2 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1049 OutputMode << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1050 }
AnnaBridge 145:64910690c574 1051
AnnaBridge 145:64910690c574 1052 /**
AnnaBridge 145:64910690c574 1053 * @brief Get the output mode normal or sample-and-hold for the selected DAC channel.
AnnaBridge 145:64910690c574 1054 * @rmtoll CR MODE1 LL_DAC_GetOutputMode\n
AnnaBridge 145:64910690c574 1055 * CR MODE2 LL_DAC_GetOutputMode
AnnaBridge 145:64910690c574 1056 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1057 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1058 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1059 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1060 *
AnnaBridge 145:64910690c574 1061 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1062 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1063 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 1064 * @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
AnnaBridge 145:64910690c574 1065 * @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
AnnaBridge 145:64910690c574 1066 */
AnnaBridge 145:64910690c574 1067 __STATIC_INLINE uint32_t LL_DAC_GetOutputMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1068 {
AnnaBridge 145:64910690c574 1069 return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_2 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1070 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 1071 );
AnnaBridge 145:64910690c574 1072 }
AnnaBridge 145:64910690c574 1073
AnnaBridge 145:64910690c574 1074 /**
AnnaBridge 145:64910690c574 1075 * @brief Set the output buffer for the selected DAC channel.
AnnaBridge 145:64910690c574 1076 * @note On this STM32 serie, when buffer is enabled, its offset can be
AnnaBridge 145:64910690c574 1077 * trimmed: factory calibration default values can be
AnnaBridge 145:64910690c574 1078 * replaced by user trimming values, using function
AnnaBridge 145:64910690c574 1079 * @ref LL_DAC_SetTrimmingValue().
AnnaBridge 145:64910690c574 1080 * @rmtoll CR MODE1 LL_DAC_SetOutputBuffer\n
AnnaBridge 145:64910690c574 1081 * CR MODE2 LL_DAC_SetOutputBuffer
AnnaBridge 145:64910690c574 1082 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1083 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1084 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1085 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1086 *
AnnaBridge 145:64910690c574 1087 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1088 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1089 * @param OutputBuffer This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1090 * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge 145:64910690c574 1091 * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge 145:64910690c574 1092 * @retval None
AnnaBridge 145:64910690c574 1093 */
AnnaBridge 145:64910690c574 1094 __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
AnnaBridge 145:64910690c574 1095 {
AnnaBridge 145:64910690c574 1096 MODIFY_REG(DACx->MCR,
AnnaBridge 145:64910690c574 1097 DAC_MCR_MODE1_1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1098 OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1099 }
AnnaBridge 145:64910690c574 1100
AnnaBridge 145:64910690c574 1101 /**
AnnaBridge 145:64910690c574 1102 * @brief Get the output buffer state for the selected DAC channel.
AnnaBridge 145:64910690c574 1103 * @rmtoll CR MODE1 LL_DAC_GetOutputBuffer\n
AnnaBridge 145:64910690c574 1104 * CR MODE2 LL_DAC_GetOutputBuffer
AnnaBridge 145:64910690c574 1105 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1106 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1107 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1108 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1109 *
AnnaBridge 145:64910690c574 1110 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1111 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1112 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 1113 * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge 145:64910690c574 1114 * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge 145:64910690c574 1115 */
AnnaBridge 145:64910690c574 1116 __STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1117 {
AnnaBridge 145:64910690c574 1118 return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1119 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 1120 );
AnnaBridge 145:64910690c574 1121 }
AnnaBridge 145:64910690c574 1122
AnnaBridge 145:64910690c574 1123 /**
AnnaBridge 145:64910690c574 1124 * @brief Set the output connection for the selected DAC channel.
AnnaBridge 145:64910690c574 1125 * @note On this STM32 serie, output connection depends on output mode (normal or
AnnaBridge 145:64910690c574 1126 * sample and hold) and output buffer state.
AnnaBridge 145:64910690c574 1127 * - if output connection is set to internal path and output buffer
AnnaBridge 145:64910690c574 1128 * is enabled (whatever output mode):
AnnaBridge 145:64910690c574 1129 * output connection is also connected to GPIO pin
AnnaBridge 145:64910690c574 1130 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 1131 * - if output connection is set to GPIO pin, output buffer
AnnaBridge 145:64910690c574 1132 * is disabled, output mode set to sample and hold:
AnnaBridge 145:64910690c574 1133 * output connection is also connected to internal path
AnnaBridge 145:64910690c574 1134 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 1135 * @rmtoll CR MODE1 LL_DAC_SetOutputConnection\n
AnnaBridge 145:64910690c574 1136 * CR MODE2 LL_DAC_SetOutputConnection
AnnaBridge 145:64910690c574 1137 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1138 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1139 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1140 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1141 *
AnnaBridge 145:64910690c574 1142 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1143 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1144 * @param OutputConnection This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1145 * @arg @ref LL_DAC_OUTPUT_CONNECT_GPIO
AnnaBridge 145:64910690c574 1146 * @arg @ref LL_DAC_OUTPUT_CONNECT_INTERNAL
AnnaBridge 145:64910690c574 1147 * @retval None
AnnaBridge 145:64910690c574 1148 */
AnnaBridge 145:64910690c574 1149 __STATIC_INLINE void LL_DAC_SetOutputConnection(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputConnection)
AnnaBridge 145:64910690c574 1150 {
AnnaBridge 145:64910690c574 1151 MODIFY_REG(DACx->MCR,
AnnaBridge 145:64910690c574 1152 DAC_MCR_MODE1_0 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1153 OutputConnection << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1154 }
AnnaBridge 145:64910690c574 1155
AnnaBridge 145:64910690c574 1156 /**
AnnaBridge 145:64910690c574 1157 * @brief Get the output connection for the selected DAC channel.
AnnaBridge 145:64910690c574 1158 * @note On this STM32 serie, output connection depends on output mode (normal or
AnnaBridge 145:64910690c574 1159 * sample and hold) and output buffer state.
AnnaBridge 145:64910690c574 1160 * - if output connection is set to internal path and output buffer
AnnaBridge 145:64910690c574 1161 * is enabled (whatever output mode):
AnnaBridge 145:64910690c574 1162 * output connection is also connected to GPIO pin
AnnaBridge 145:64910690c574 1163 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 1164 * - if output connection is set to GPIO pin, output buffer
AnnaBridge 145:64910690c574 1165 * is disabled, output mode set to sample and hold:
AnnaBridge 145:64910690c574 1166 * output connection is also connected to internal path
AnnaBridge 145:64910690c574 1167 * (both connections to GPIO pin and internal path).
AnnaBridge 145:64910690c574 1168 * @rmtoll CR MODE1 LL_DAC_GetOutputConnection\n
AnnaBridge 145:64910690c574 1169 * CR MODE2 LL_DAC_GetOutputConnection
AnnaBridge 145:64910690c574 1170 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1171 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1172 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1173 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1174 *
AnnaBridge 145:64910690c574 1175 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1176 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1177 * @retval Returned value can be one of the following values:
AnnaBridge 145:64910690c574 1178 * @arg @ref LL_DAC_OUTPUT_CONNECT_GPIO
AnnaBridge 145:64910690c574 1179 * @arg @ref LL_DAC_OUTPUT_CONNECT_INTERNAL
AnnaBridge 145:64910690c574 1180 */
AnnaBridge 145:64910690c574 1181 __STATIC_INLINE uint32_t LL_DAC_GetOutputConnection(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1182 {
AnnaBridge 145:64910690c574 1183 return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_0 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1184 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 1185 );
AnnaBridge 145:64910690c574 1186 }
AnnaBridge 145:64910690c574 1187
AnnaBridge 145:64910690c574 1188 /**
AnnaBridge 145:64910690c574 1189 * @brief Set the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1190 * sample time
AnnaBridge 145:64910690c574 1191 * @note Sample time must be set when DAC channel is disabled
AnnaBridge 145:64910690c574 1192 * or during DAC operation when DAC channel flag BWSTx is reset,
AnnaBridge 145:64910690c574 1193 * otherwise the setting is ignored.
AnnaBridge 145:64910690c574 1194 * Check BWSTx flag state using function "LL_DAC_IsActiveFlag_BWSTx()".
AnnaBridge 145:64910690c574 1195 * @rmtoll SHSR1 TSAMPLE1 LL_DAC_SetSampleAndHoldSampleTime\n
AnnaBridge 145:64910690c574 1196 * SHSR2 TSAMPLE2 LL_DAC_SetSampleAndHoldSampleTime
AnnaBridge 145:64910690c574 1197 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1198 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1199 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1200 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1201 *
AnnaBridge 145:64910690c574 1202 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1203 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1204 * @param SampleTime Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge 145:64910690c574 1205 * @retval None
AnnaBridge 145:64910690c574 1206 */
AnnaBridge 145:64910690c574 1207 __STATIC_INLINE void LL_DAC_SetSampleAndHoldSampleTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t SampleTime)
AnnaBridge 145:64910690c574 1208 {
AnnaBridge 145:64910690c574 1209 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->SHSR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_SHSRX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1210
AnnaBridge 145:64910690c574 1211 MODIFY_REG(*preg,
AnnaBridge 145:64910690c574 1212 DAC_SHSR1_TSAMPLE1,
AnnaBridge 145:64910690c574 1213 SampleTime);
AnnaBridge 145:64910690c574 1214 }
AnnaBridge 145:64910690c574 1215
AnnaBridge 145:64910690c574 1216 /**
AnnaBridge 145:64910690c574 1217 * @brief Get the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1218 * sample time
AnnaBridge 145:64910690c574 1219 * @rmtoll SHSR1 TSAMPLE1 LL_DAC_GetSampleAndHoldSampleTime\n
AnnaBridge 145:64910690c574 1220 * SHSR2 TSAMPLE2 LL_DAC_GetSampleAndHoldSampleTime
AnnaBridge 145:64910690c574 1221 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1222 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1223 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1224 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1225 *
AnnaBridge 145:64910690c574 1226 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1227 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1228 * @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge 145:64910690c574 1229 */
AnnaBridge 145:64910690c574 1230 __STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldSampleTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1231 {
AnnaBridge 145:64910690c574 1232 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->SHSR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_SHSRX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1233
AnnaBridge 145:64910690c574 1234 return (uint32_t) READ_BIT(*preg, DAC_SHSR1_TSAMPLE1);
AnnaBridge 145:64910690c574 1235 }
AnnaBridge 145:64910690c574 1236
AnnaBridge 145:64910690c574 1237 /**
AnnaBridge 145:64910690c574 1238 * @brief Set the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1239 * hold time
AnnaBridge 145:64910690c574 1240 * @rmtoll SHHR THOLD1 LL_DAC_SetSampleAndHoldHoldTime\n
AnnaBridge 145:64910690c574 1241 * SHHR THOLD2 LL_DAC_SetSampleAndHoldHoldTime
AnnaBridge 145:64910690c574 1242 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1243 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1244 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1245 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1246 *
AnnaBridge 145:64910690c574 1247 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1248 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1249 * @param HoldTime Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge 145:64910690c574 1250 * @retval None
AnnaBridge 145:64910690c574 1251 */
AnnaBridge 145:64910690c574 1252 __STATIC_INLINE void LL_DAC_SetSampleAndHoldHoldTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t HoldTime)
AnnaBridge 145:64910690c574 1253 {
AnnaBridge 145:64910690c574 1254 MODIFY_REG(DACx->SHHR,
AnnaBridge 145:64910690c574 1255 DAC_SHHR_THOLD1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1256 HoldTime << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1257 }
AnnaBridge 145:64910690c574 1258
AnnaBridge 145:64910690c574 1259 /**
AnnaBridge 145:64910690c574 1260 * @brief Get the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1261 * hold time
AnnaBridge 145:64910690c574 1262 * @rmtoll SHHR THOLD1 LL_DAC_GetSampleAndHoldHoldTime\n
AnnaBridge 145:64910690c574 1263 * SHHR THOLD2 LL_DAC_GetSampleAndHoldHoldTime
AnnaBridge 145:64910690c574 1264 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1265 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1266 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1267 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1268 *
AnnaBridge 145:64910690c574 1269 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1270 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1271 * @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge 145:64910690c574 1272 */
AnnaBridge 145:64910690c574 1273 __STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldHoldTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1274 {
AnnaBridge 145:64910690c574 1275 return (uint32_t)(READ_BIT(DACx->SHHR, DAC_SHHR_THOLD1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1276 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 1277 );
AnnaBridge 145:64910690c574 1278 }
AnnaBridge 145:64910690c574 1279
AnnaBridge 145:64910690c574 1280 /**
AnnaBridge 145:64910690c574 1281 * @brief Set the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1282 * refresh time
AnnaBridge 145:64910690c574 1283 * @rmtoll SHRR TREFRESH1 LL_DAC_SetSampleAndHoldRefreshTime\n
AnnaBridge 145:64910690c574 1284 * SHRR TREFRESH2 LL_DAC_SetSampleAndHoldRefreshTime
AnnaBridge 145:64910690c574 1285 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1286 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1287 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1288 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1289 *
AnnaBridge 145:64910690c574 1290 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1291 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1292 * @param RefreshTime Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 145:64910690c574 1293 * @retval None
AnnaBridge 145:64910690c574 1294 */
AnnaBridge 145:64910690c574 1295 __STATIC_INLINE void LL_DAC_SetSampleAndHoldRefreshTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t RefreshTime)
AnnaBridge 145:64910690c574 1296 {
AnnaBridge 145:64910690c574 1297 MODIFY_REG(DACx->SHRR,
AnnaBridge 145:64910690c574 1298 DAC_SHRR_TREFRESH1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge 145:64910690c574 1299 RefreshTime << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1300 }
AnnaBridge 145:64910690c574 1301
AnnaBridge 145:64910690c574 1302 /**
AnnaBridge 145:64910690c574 1303 * @brief Get the sample-and-hold timing for the selected DAC channel:
AnnaBridge 145:64910690c574 1304 * refresh time
AnnaBridge 145:64910690c574 1305 * @rmtoll SHRR TREFRESH1 LL_DAC_GetSampleAndHoldRefreshTime\n
AnnaBridge 145:64910690c574 1306 * SHRR TREFRESH2 LL_DAC_GetSampleAndHoldRefreshTime
AnnaBridge 145:64910690c574 1307 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1308 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1309 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1310 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1311 *
AnnaBridge 145:64910690c574 1312 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1313 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1314 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 145:64910690c574 1315 */
AnnaBridge 145:64910690c574 1316 __STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldRefreshTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1317 {
AnnaBridge 145:64910690c574 1318 return (uint32_t)(READ_BIT(DACx->SHRR, DAC_SHRR_TREFRESH1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1319 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge 145:64910690c574 1320 );
AnnaBridge 145:64910690c574 1321 }
AnnaBridge 145:64910690c574 1322
AnnaBridge 145:64910690c574 1323 /**
AnnaBridge 145:64910690c574 1324 * @}
AnnaBridge 145:64910690c574 1325 */
AnnaBridge 145:64910690c574 1326
AnnaBridge 145:64910690c574 1327 /** @defgroup DAC_LL_EF_Configuration_Legacy_Functions DAC configuration, legacy functions name
AnnaBridge 145:64910690c574 1328 * @{
AnnaBridge 145:64910690c574 1329 */
AnnaBridge 145:64910690c574 1330 /* Old functions name kept for legacy purpose, to be replaced by the */
AnnaBridge 145:64910690c574 1331 /* current functions name. */
AnnaBridge 145:64910690c574 1332 __STATIC_INLINE void LL_DAC_SetWaveMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveMode)
AnnaBridge 145:64910690c574 1333 {
AnnaBridge 145:64910690c574 1334 LL_DAC_SetWaveAutoGeneration(DACx, DAC_Channel, WaveMode);
AnnaBridge 145:64910690c574 1335 }
AnnaBridge 145:64910690c574 1336 __STATIC_INLINE uint32_t LL_DAC_GetWaveMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1337 {
AnnaBridge 145:64910690c574 1338 return LL_DAC_GetWaveAutoGeneration(DACx, DAC_Channel);
AnnaBridge 145:64910690c574 1339 }
AnnaBridge 145:64910690c574 1340
AnnaBridge 145:64910690c574 1341 /**
AnnaBridge 145:64910690c574 1342 * @}
AnnaBridge 145:64910690c574 1343 */
AnnaBridge 145:64910690c574 1344
AnnaBridge 145:64910690c574 1345 /** @defgroup DAC_LL_EF_DMA_Management DMA Management
AnnaBridge 145:64910690c574 1346 * @{
AnnaBridge 145:64910690c574 1347 */
AnnaBridge 145:64910690c574 1348
AnnaBridge 145:64910690c574 1349 /**
AnnaBridge 145:64910690c574 1350 * @brief Enable DAC DMA transfer request of the selected channel.
AnnaBridge 145:64910690c574 1351 * @note To configure DMA source address (peripheral address),
AnnaBridge 145:64910690c574 1352 * use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge 145:64910690c574 1353 * @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n
AnnaBridge 145:64910690c574 1354 * CR DMAEN2 LL_DAC_EnableDMAReq
AnnaBridge 145:64910690c574 1355 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1356 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1357 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1358 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1359 *
AnnaBridge 145:64910690c574 1360 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1361 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1362 * @retval None
AnnaBridge 145:64910690c574 1363 */
AnnaBridge 145:64910690c574 1364 __STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1365 {
AnnaBridge 145:64910690c574 1366 SET_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1367 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1368 }
AnnaBridge 145:64910690c574 1369
AnnaBridge 145:64910690c574 1370 /**
AnnaBridge 145:64910690c574 1371 * @brief Disable DAC DMA transfer request of the selected channel.
AnnaBridge 145:64910690c574 1372 * @note To configure DMA source address (peripheral address),
AnnaBridge 145:64910690c574 1373 * use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge 145:64910690c574 1374 * @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n
AnnaBridge 145:64910690c574 1375 * CR DMAEN2 LL_DAC_DisableDMAReq
AnnaBridge 145:64910690c574 1376 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1377 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1378 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1379 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1380 *
AnnaBridge 145:64910690c574 1381 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1382 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1383 * @retval None
AnnaBridge 145:64910690c574 1384 */
AnnaBridge 145:64910690c574 1385 __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1386 {
AnnaBridge 145:64910690c574 1387 CLEAR_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1388 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1389 }
AnnaBridge 145:64910690c574 1390
AnnaBridge 145:64910690c574 1391 /**
AnnaBridge 145:64910690c574 1392 * @brief Get DAC DMA transfer request state of the selected channel.
AnnaBridge 145:64910690c574 1393 * (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
AnnaBridge 145:64910690c574 1394 * @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n
AnnaBridge 145:64910690c574 1395 * CR DMAEN2 LL_DAC_IsDMAReqEnabled
AnnaBridge 145:64910690c574 1396 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1397 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1398 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1399 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1400 *
AnnaBridge 145:64910690c574 1401 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1402 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1403 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1404 */
AnnaBridge 145:64910690c574 1405 __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1406 {
AnnaBridge 145:64910690c574 1407 return (READ_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1408 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1409 == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge 145:64910690c574 1410 }
AnnaBridge 145:64910690c574 1411
AnnaBridge 145:64910690c574 1412 /**
AnnaBridge 145:64910690c574 1413 * @brief Function to help to configure DMA transfer to DAC: retrieve the
AnnaBridge 145:64910690c574 1414 * DAC register address from DAC instance and a list of DAC registers
AnnaBridge 145:64910690c574 1415 * intended to be used (most commonly) with DMA transfer.
AnnaBridge 145:64910690c574 1416 * @note These DAC registers are data holding registers:
AnnaBridge 145:64910690c574 1417 * when DAC conversion is requested, DAC generates a DMA transfer
AnnaBridge 145:64910690c574 1418 * request to have data available in DAC data holding registers.
AnnaBridge 145:64910690c574 1419 * @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge 145:64910690c574 1420 * function "LL_DMA_ConfigAddresses()".
AnnaBridge 145:64910690c574 1421 * Example:
AnnaBridge 145:64910690c574 1422 * LL_DMA_ConfigAddresses(DMA1,
AnnaBridge 145:64910690c574 1423 * LL_DMA_CHANNEL_1,
AnnaBridge 145:64910690c574 1424 * (uint32_t)&< array or variable >,
AnnaBridge 145:64910690c574 1425 * LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
AnnaBridge 145:64910690c574 1426 * LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
AnnaBridge 145:64910690c574 1427 * @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge 145:64910690c574 1428 * DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge 145:64910690c574 1429 * DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge 145:64910690c574 1430 * DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge 145:64910690c574 1431 * DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge 145:64910690c574 1432 * DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr
AnnaBridge 145:64910690c574 1433 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1434 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1435 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1436 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1437 *
AnnaBridge 145:64910690c574 1438 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1439 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1440 * @param Register This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1441 * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
AnnaBridge 145:64910690c574 1442 * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
AnnaBridge 145:64910690c574 1443 * @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
AnnaBridge 145:64910690c574 1444 * @retval DAC register address
AnnaBridge 145:64910690c574 1445 */
AnnaBridge 145:64910690c574 1446 __STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
AnnaBridge 145:64910690c574 1447 {
AnnaBridge 145:64910690c574 1448 /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
AnnaBridge 145:64910690c574 1449 /* DAC channel selected. */
AnnaBridge 145:64910690c574 1450 return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register))));
AnnaBridge 145:64910690c574 1451 }
AnnaBridge 145:64910690c574 1452 /**
AnnaBridge 145:64910690c574 1453 * @}
AnnaBridge 145:64910690c574 1454 */
AnnaBridge 145:64910690c574 1455
AnnaBridge 145:64910690c574 1456 /** @defgroup DAC_LL_EF_Operation Operation on DAC channels
AnnaBridge 145:64910690c574 1457 * @{
AnnaBridge 145:64910690c574 1458 */
AnnaBridge 145:64910690c574 1459
AnnaBridge 145:64910690c574 1460 /**
AnnaBridge 145:64910690c574 1461 * @brief Enable DAC selected channel.
AnnaBridge 145:64910690c574 1462 * @rmtoll CR EN1 LL_DAC_Enable\n
AnnaBridge 145:64910690c574 1463 * CR EN2 LL_DAC_Enable
AnnaBridge 145:64910690c574 1464 * @note After enable from off state, DAC channel requires a delay
AnnaBridge 145:64910690c574 1465 * for output voltage to reach accuracy +/- 1 LSB.
AnnaBridge 145:64910690c574 1466 * Refer to device datasheet, parameter "tWAKEUP".
AnnaBridge 145:64910690c574 1467 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1468 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1469 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1470 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1471 *
AnnaBridge 145:64910690c574 1472 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1473 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1474 * @retval None
AnnaBridge 145:64910690c574 1475 */
AnnaBridge 145:64910690c574 1476 __STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1477 {
AnnaBridge 145:64910690c574 1478 SET_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1479 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1480 }
AnnaBridge 145:64910690c574 1481
AnnaBridge 145:64910690c574 1482 /**
AnnaBridge 145:64910690c574 1483 * @brief Disable DAC selected channel.
AnnaBridge 145:64910690c574 1484 * @rmtoll CR EN1 LL_DAC_Disable\n
AnnaBridge 145:64910690c574 1485 * CR EN2 LL_DAC_Disable
AnnaBridge 145:64910690c574 1486 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1487 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1488 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1489 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1490 *
AnnaBridge 145:64910690c574 1491 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1492 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1493 * @retval None
AnnaBridge 145:64910690c574 1494 */
AnnaBridge 145:64910690c574 1495 __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1496 {
AnnaBridge 145:64910690c574 1497 CLEAR_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1498 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1499 }
AnnaBridge 145:64910690c574 1500
AnnaBridge 145:64910690c574 1501 /**
AnnaBridge 145:64910690c574 1502 * @brief Get DAC enable state of the selected channel.
AnnaBridge 145:64910690c574 1503 * (0: DAC channel is disabled, 1: DAC channel is enabled)
AnnaBridge 145:64910690c574 1504 * @rmtoll CR EN1 LL_DAC_IsEnabled\n
AnnaBridge 145:64910690c574 1505 * CR EN2 LL_DAC_IsEnabled
AnnaBridge 145:64910690c574 1506 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1507 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1508 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1509 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1510 *
AnnaBridge 145:64910690c574 1511 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1512 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1513 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1514 */
AnnaBridge 145:64910690c574 1515 __STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1516 {
AnnaBridge 145:64910690c574 1517 return (READ_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1518 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1519 == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge 145:64910690c574 1520 }
AnnaBridge 145:64910690c574 1521
AnnaBridge 145:64910690c574 1522 /**
AnnaBridge 145:64910690c574 1523 * @brief Enable DAC trigger of the selected channel.
AnnaBridge 145:64910690c574 1524 * @note - If DAC trigger is disabled, DAC conversion is performed
AnnaBridge 145:64910690c574 1525 * automatically once the data holding register is updated,
AnnaBridge 145:64910690c574 1526 * using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge 145:64910690c574 1527 * @ref LL_DAC_ConvertData12RightAligned(), ...
AnnaBridge 145:64910690c574 1528 * - If DAC trigger is enabled, DAC conversion is performed
AnnaBridge 145:64910690c574 1529 * only when a hardware of software trigger event is occurring.
AnnaBridge 145:64910690c574 1530 * Select trigger source using
AnnaBridge 145:64910690c574 1531 * function @ref LL_DAC_SetTriggerSource().
AnnaBridge 145:64910690c574 1532 * @rmtoll CR TEN1 LL_DAC_EnableTrigger\n
AnnaBridge 145:64910690c574 1533 * CR TEN2 LL_DAC_EnableTrigger
AnnaBridge 145:64910690c574 1534 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1535 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1536 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1537 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1538 *
AnnaBridge 145:64910690c574 1539 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1540 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1541 * @retval None
AnnaBridge 145:64910690c574 1542 */
AnnaBridge 145:64910690c574 1543 __STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1544 {
AnnaBridge 145:64910690c574 1545 SET_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1546 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1547 }
AnnaBridge 145:64910690c574 1548
AnnaBridge 145:64910690c574 1549 /**
AnnaBridge 145:64910690c574 1550 * @brief Disable DAC trigger of the selected channel.
AnnaBridge 145:64910690c574 1551 * @rmtoll CR TEN1 LL_DAC_DisableTrigger\n
AnnaBridge 145:64910690c574 1552 * CR TEN2 LL_DAC_DisableTrigger
AnnaBridge 145:64910690c574 1553 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1554 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1555 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1556 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1557 *
AnnaBridge 145:64910690c574 1558 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1559 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1560 * @retval None
AnnaBridge 145:64910690c574 1561 */
AnnaBridge 145:64910690c574 1562 __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1563 {
AnnaBridge 145:64910690c574 1564 CLEAR_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1565 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge 145:64910690c574 1566 }
AnnaBridge 145:64910690c574 1567
AnnaBridge 145:64910690c574 1568 /**
AnnaBridge 145:64910690c574 1569 * @brief Get DAC trigger state of the selected channel.
AnnaBridge 145:64910690c574 1570 * (0: DAC trigger is disabled, 1: DAC trigger is enabled)
AnnaBridge 145:64910690c574 1571 * @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n
AnnaBridge 145:64910690c574 1572 * CR TEN2 LL_DAC_IsTriggerEnabled
AnnaBridge 145:64910690c574 1573 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1574 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1575 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1576 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1577 *
AnnaBridge 145:64910690c574 1578 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1579 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1580 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1581 */
AnnaBridge 145:64910690c574 1582 __STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1583 {
AnnaBridge 145:64910690c574 1584 return (READ_BIT(DACx->CR,
AnnaBridge 145:64910690c574 1585 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge 145:64910690c574 1586 == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge 145:64910690c574 1587 }
AnnaBridge 145:64910690c574 1588
AnnaBridge 145:64910690c574 1589 /**
AnnaBridge 145:64910690c574 1590 * @brief Trig DAC conversion by software for the selected DAC channel.
AnnaBridge 145:64910690c574 1591 * @note Preliminarily, DAC trigger must be set to software trigger
AnnaBridge 145:64910690c574 1592 * using function @ref LL_DAC_SetTriggerSource()
AnnaBridge 145:64910690c574 1593 * with parameter "LL_DAC_TRIGGER_SOFTWARE".
AnnaBridge 145:64910690c574 1594 * and DAC trigger must be enabled using
AnnaBridge 145:64910690c574 1595 * function @ref LL_DAC_EnableTrigger().
AnnaBridge 145:64910690c574 1596 * @note For devices featuring DAC with 2 channels: this function
AnnaBridge 145:64910690c574 1597 * can perform a SW start of both DAC channels simultaneously.
AnnaBridge 145:64910690c574 1598 * Two channels can be selected as parameter.
AnnaBridge 145:64910690c574 1599 * Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2)
AnnaBridge 145:64910690c574 1600 * @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n
AnnaBridge 145:64910690c574 1601 * SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
AnnaBridge 145:64910690c574 1602 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1603 * @param DAC_Channel This parameter can a combination of the following values:
AnnaBridge 145:64910690c574 1604 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1605 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1606 *
AnnaBridge 145:64910690c574 1607 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1608 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1609 * @retval None
AnnaBridge 145:64910690c574 1610 */
AnnaBridge 145:64910690c574 1611 __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1612 {
AnnaBridge 145:64910690c574 1613 SET_BIT(DACx->SWTRIGR,
AnnaBridge 145:64910690c574 1614 (DAC_Channel & DAC_SWTR_CHX_MASK));
AnnaBridge 145:64910690c574 1615 }
AnnaBridge 145:64910690c574 1616
AnnaBridge 145:64910690c574 1617 /**
AnnaBridge 145:64910690c574 1618 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1619 * in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge 145:64910690c574 1620 * for the selected DAC channel.
AnnaBridge 145:64910690c574 1621 * @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n
AnnaBridge 145:64910690c574 1622 * DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned
AnnaBridge 145:64910690c574 1623 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1624 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1625 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1626 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1627 *
AnnaBridge 145:64910690c574 1628 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1629 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1630 * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1631 * @retval None
AnnaBridge 145:64910690c574 1632 */
AnnaBridge 145:64910690c574 1633 __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge 145:64910690c574 1634 {
AnnaBridge 145:64910690c574 1635 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1636
AnnaBridge 145:64910690c574 1637 MODIFY_REG(*preg,
AnnaBridge 145:64910690c574 1638 DAC_DHR12R1_DACC1DHR,
AnnaBridge 145:64910690c574 1639 Data);
AnnaBridge 145:64910690c574 1640 }
AnnaBridge 145:64910690c574 1641
AnnaBridge 145:64910690c574 1642 /**
AnnaBridge 145:64910690c574 1643 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1644 * in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge 145:64910690c574 1645 * for the selected DAC channel.
AnnaBridge 145:64910690c574 1646 * @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n
AnnaBridge 145:64910690c574 1647 * DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned
AnnaBridge 145:64910690c574 1648 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1649 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1650 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1651 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1652 *
AnnaBridge 145:64910690c574 1653 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1654 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1655 * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1656 * @retval None
AnnaBridge 145:64910690c574 1657 */
AnnaBridge 145:64910690c574 1658 __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge 145:64910690c574 1659 {
AnnaBridge 145:64910690c574 1660 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1661
AnnaBridge 145:64910690c574 1662 MODIFY_REG(*preg,
AnnaBridge 145:64910690c574 1663 DAC_DHR12L1_DACC1DHR,
AnnaBridge 145:64910690c574 1664 Data);
AnnaBridge 145:64910690c574 1665 }
AnnaBridge 145:64910690c574 1666
AnnaBridge 145:64910690c574 1667 /**
AnnaBridge 145:64910690c574 1668 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1669 * in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge 145:64910690c574 1670 * for the selected DAC channel.
AnnaBridge 145:64910690c574 1671 * @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n
AnnaBridge 145:64910690c574 1672 * DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned
AnnaBridge 145:64910690c574 1673 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1674 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1675 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1676 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1677 *
AnnaBridge 145:64910690c574 1678 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1679 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1680 * @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 145:64910690c574 1681 * @retval None
AnnaBridge 145:64910690c574 1682 */
AnnaBridge 145:64910690c574 1683 __STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge 145:64910690c574 1684 {
AnnaBridge 145:64910690c574 1685 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1686
AnnaBridge 145:64910690c574 1687 MODIFY_REG(*preg,
AnnaBridge 145:64910690c574 1688 DAC_DHR8R1_DACC1DHR,
AnnaBridge 145:64910690c574 1689 Data);
AnnaBridge 145:64910690c574 1690 }
AnnaBridge 145:64910690c574 1691
AnnaBridge 145:64910690c574 1692 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1693 /**
AnnaBridge 145:64910690c574 1694 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1695 * in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge 145:64910690c574 1696 * for both DAC channels.
AnnaBridge 145:64910690c574 1697 * @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n
AnnaBridge 145:64910690c574 1698 * DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned
AnnaBridge 145:64910690c574 1699 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1700 * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1701 * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1702 * @retval None
AnnaBridge 145:64910690c574 1703 */
AnnaBridge 145:64910690c574 1704 __STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge 145:64910690c574 1705 {
AnnaBridge 145:64910690c574 1706 MODIFY_REG(DACx->DHR12RD,
AnnaBridge 145:64910690c574 1707 (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR),
AnnaBridge 145:64910690c574 1708 ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
AnnaBridge 145:64910690c574 1709 }
AnnaBridge 145:64910690c574 1710
AnnaBridge 145:64910690c574 1711 /**
AnnaBridge 145:64910690c574 1712 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1713 * in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge 145:64910690c574 1714 * for both DAC channels.
AnnaBridge 145:64910690c574 1715 * @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n
AnnaBridge 145:64910690c574 1716 * DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned
AnnaBridge 145:64910690c574 1717 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1718 * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1719 * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1720 * @retval None
AnnaBridge 145:64910690c574 1721 */
AnnaBridge 145:64910690c574 1722 __STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge 145:64910690c574 1723 {
AnnaBridge 145:64910690c574 1724 /* Note: Data of DAC channel 2 shift value subtracted of 4 because */
AnnaBridge 145:64910690c574 1725 /* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
AnnaBridge 145:64910690c574 1726 /* the 4 LSB must be taken into account for the shift value. */
AnnaBridge 145:64910690c574 1727 MODIFY_REG(DACx->DHR12LD,
AnnaBridge 145:64910690c574 1728 (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR),
AnnaBridge 145:64910690c574 1729 ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1));
AnnaBridge 145:64910690c574 1730 }
AnnaBridge 145:64910690c574 1731
AnnaBridge 145:64910690c574 1732 /**
AnnaBridge 145:64910690c574 1733 * @brief Set the data to be loaded in the data holding register
AnnaBridge 145:64910690c574 1734 * in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge 145:64910690c574 1735 * for both DAC channels.
AnnaBridge 145:64910690c574 1736 * @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n
AnnaBridge 145:64910690c574 1737 * DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned
AnnaBridge 145:64910690c574 1738 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1739 * @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 145:64910690c574 1740 * @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 145:64910690c574 1741 * @retval None
AnnaBridge 145:64910690c574 1742 */
AnnaBridge 145:64910690c574 1743 __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge 145:64910690c574 1744 {
AnnaBridge 145:64910690c574 1745 MODIFY_REG(DACx->DHR8RD,
AnnaBridge 145:64910690c574 1746 (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR),
AnnaBridge 145:64910690c574 1747 ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
AnnaBridge 145:64910690c574 1748 }
AnnaBridge 145:64910690c574 1749
AnnaBridge 145:64910690c574 1750 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1751 /**
AnnaBridge 145:64910690c574 1752 * @brief Retrieve output data currently generated for the selected DAC channel.
AnnaBridge 145:64910690c574 1753 * @note Whatever alignment and resolution settings
AnnaBridge 145:64910690c574 1754 * (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge 145:64910690c574 1755 * @ref LL_DAC_ConvertData12RightAligned(), ...),
AnnaBridge 145:64910690c574 1756 * output data format is 12 bits right aligned (LSB aligned on bit 0).
AnnaBridge 145:64910690c574 1757 * @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n
AnnaBridge 145:64910690c574 1758 * DOR2 DACC2DOR LL_DAC_RetrieveOutputData
AnnaBridge 145:64910690c574 1759 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1760 * @param DAC_Channel This parameter can be one of the following values:
AnnaBridge 145:64910690c574 1761 * @arg @ref LL_DAC_CHANNEL_1
AnnaBridge 145:64910690c574 1762 * @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge 145:64910690c574 1763 *
AnnaBridge 145:64910690c574 1764 * (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge 145:64910690c574 1765 * Refer to device datasheet for channels availability.
AnnaBridge 145:64910690c574 1766 * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge 145:64910690c574 1767 */
AnnaBridge 145:64910690c574 1768 __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge 145:64910690c574 1769 {
AnnaBridge 145:64910690c574 1770 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK));
AnnaBridge 145:64910690c574 1771
AnnaBridge 145:64910690c574 1772 return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
AnnaBridge 145:64910690c574 1773 }
AnnaBridge 145:64910690c574 1774
AnnaBridge 145:64910690c574 1775 /**
AnnaBridge 145:64910690c574 1776 * @}
AnnaBridge 145:64910690c574 1777 */
AnnaBridge 145:64910690c574 1778
AnnaBridge 145:64910690c574 1779 /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
AnnaBridge 145:64910690c574 1780 * @{
AnnaBridge 145:64910690c574 1781 */
AnnaBridge 145:64910690c574 1782 /**
AnnaBridge 145:64910690c574 1783 * @brief Get DAC calibration offset flag for DAC channel 1
AnnaBridge 145:64910690c574 1784 * @rmtoll SR CAL_FLAG1 LL_DAC_IsActiveFlag_CAL1
AnnaBridge 145:64910690c574 1785 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1786 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1787 */
AnnaBridge 145:64910690c574 1788 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_CAL1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1789 {
AnnaBridge 145:64910690c574 1790 return (READ_BIT(DACx->SR, LL_DAC_FLAG_CAL1) == (LL_DAC_FLAG_CAL1));
AnnaBridge 145:64910690c574 1791 }
AnnaBridge 145:64910690c574 1792
AnnaBridge 145:64910690c574 1793 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1794 /**
AnnaBridge 145:64910690c574 1795 * @brief Get DAC calibration offset flag for DAC channel 2
AnnaBridge 145:64910690c574 1796 * @rmtoll SR CAL_FLAG2 LL_DAC_IsActiveFlag_CAL2
AnnaBridge 145:64910690c574 1797 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1798 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1799 */
AnnaBridge 145:64910690c574 1800 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_CAL2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1801 {
AnnaBridge 145:64910690c574 1802 return (READ_BIT(DACx->SR, LL_DAC_FLAG_CAL2) == (LL_DAC_FLAG_CAL2));
AnnaBridge 145:64910690c574 1803 }
AnnaBridge 145:64910690c574 1804
AnnaBridge 145:64910690c574 1805 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1806 /**
AnnaBridge 145:64910690c574 1807 * @brief Get DAC busy writing sample time flag for DAC channel 1
AnnaBridge 145:64910690c574 1808 * @rmtoll SR BWST1 LL_DAC_IsActiveFlag_BWST1
AnnaBridge 145:64910690c574 1809 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1810 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1811 */
AnnaBridge 145:64910690c574 1812 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_BWST1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1813 {
AnnaBridge 145:64910690c574 1814 return (READ_BIT(DACx->SR, LL_DAC_FLAG_BWST1) == (LL_DAC_FLAG_BWST1));
AnnaBridge 145:64910690c574 1815 }
AnnaBridge 145:64910690c574 1816
AnnaBridge 145:64910690c574 1817 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1818 /**
AnnaBridge 145:64910690c574 1819 * @brief Get DAC busy writing sample time flag for DAC channel 2
AnnaBridge 145:64910690c574 1820 * @rmtoll SR BWST2 LL_DAC_IsActiveFlag_BWST2
AnnaBridge 145:64910690c574 1821 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1822 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1823 */
AnnaBridge 145:64910690c574 1824 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_BWST2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1825 {
AnnaBridge 145:64910690c574 1826 return (READ_BIT(DACx->SR, LL_DAC_FLAG_BWST2) == (LL_DAC_FLAG_BWST2));
AnnaBridge 145:64910690c574 1827 }
AnnaBridge 145:64910690c574 1828
AnnaBridge 145:64910690c574 1829 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1830 /**
AnnaBridge 145:64910690c574 1831 * @brief Get DAC underrun flag for DAC channel 1
AnnaBridge 145:64910690c574 1832 * @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1
AnnaBridge 145:64910690c574 1833 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1834 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1835 */
AnnaBridge 145:64910690c574 1836 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1837 {
AnnaBridge 145:64910690c574 1838 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1));
AnnaBridge 145:64910690c574 1839 }
AnnaBridge 145:64910690c574 1840
AnnaBridge 145:64910690c574 1841 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1842 /**
AnnaBridge 145:64910690c574 1843 * @brief Get DAC underrun flag for DAC channel 2
AnnaBridge 145:64910690c574 1844 * @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2
AnnaBridge 145:64910690c574 1845 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1846 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1847 */
AnnaBridge 145:64910690c574 1848 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1849 {
AnnaBridge 145:64910690c574 1850 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2));
AnnaBridge 145:64910690c574 1851 }
AnnaBridge 145:64910690c574 1852 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1853
AnnaBridge 145:64910690c574 1854 /**
AnnaBridge 145:64910690c574 1855 * @brief Clear DAC underrun flag for DAC channel 1
AnnaBridge 145:64910690c574 1856 * @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1
AnnaBridge 145:64910690c574 1857 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1858 * @retval None
AnnaBridge 145:64910690c574 1859 */
AnnaBridge 145:64910690c574 1860 __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1861 {
AnnaBridge 145:64910690c574 1862 WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
AnnaBridge 145:64910690c574 1863 }
AnnaBridge 145:64910690c574 1864
AnnaBridge 145:64910690c574 1865 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1866 /**
AnnaBridge 145:64910690c574 1867 * @brief Clear DAC underrun flag for DAC channel 2
AnnaBridge 145:64910690c574 1868 * @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2
AnnaBridge 145:64910690c574 1869 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1870 * @retval None
AnnaBridge 145:64910690c574 1871 */
AnnaBridge 145:64910690c574 1872 __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1873 {
AnnaBridge 145:64910690c574 1874 WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
AnnaBridge 145:64910690c574 1875 }
AnnaBridge 145:64910690c574 1876 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1877
AnnaBridge 145:64910690c574 1878 /**
AnnaBridge 145:64910690c574 1879 * @}
AnnaBridge 145:64910690c574 1880 */
AnnaBridge 145:64910690c574 1881
AnnaBridge 145:64910690c574 1882 /** @defgroup DAC_LL_EF_IT_Management IT management
AnnaBridge 145:64910690c574 1883 * @{
AnnaBridge 145:64910690c574 1884 */
AnnaBridge 145:64910690c574 1885
AnnaBridge 145:64910690c574 1886 /**
AnnaBridge 145:64910690c574 1887 * @brief Enable DMA underrun interrupt for DAC channel 1
AnnaBridge 145:64910690c574 1888 * @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1
AnnaBridge 145:64910690c574 1889 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1890 * @retval None
AnnaBridge 145:64910690c574 1891 */
AnnaBridge 145:64910690c574 1892 __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1893 {
AnnaBridge 145:64910690c574 1894 SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge 145:64910690c574 1895 }
AnnaBridge 145:64910690c574 1896
AnnaBridge 145:64910690c574 1897 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1898 /**
AnnaBridge 145:64910690c574 1899 * @brief Enable DMA underrun interrupt for DAC channel 2
AnnaBridge 145:64910690c574 1900 * @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2
AnnaBridge 145:64910690c574 1901 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1902 * @retval None
AnnaBridge 145:64910690c574 1903 */
AnnaBridge 145:64910690c574 1904 __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1905 {
AnnaBridge 145:64910690c574 1906 SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge 145:64910690c574 1907 }
AnnaBridge 145:64910690c574 1908 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1909
AnnaBridge 145:64910690c574 1910 /**
AnnaBridge 145:64910690c574 1911 * @brief Disable DMA underrun interrupt for DAC channel 1
AnnaBridge 145:64910690c574 1912 * @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1
AnnaBridge 145:64910690c574 1913 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1914 * @retval None
AnnaBridge 145:64910690c574 1915 */
AnnaBridge 145:64910690c574 1916 __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1917 {
AnnaBridge 145:64910690c574 1918 CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge 145:64910690c574 1919 }
AnnaBridge 145:64910690c574 1920
AnnaBridge 145:64910690c574 1921 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1922 /**
AnnaBridge 145:64910690c574 1923 * @brief Disable DMA underrun interrupt for DAC channel 2
AnnaBridge 145:64910690c574 1924 * @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2
AnnaBridge 145:64910690c574 1925 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1926 * @retval None
AnnaBridge 145:64910690c574 1927 */
AnnaBridge 145:64910690c574 1928 __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1929 {
AnnaBridge 145:64910690c574 1930 CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge 145:64910690c574 1931 }
AnnaBridge 145:64910690c574 1932 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1933
AnnaBridge 145:64910690c574 1934 /**
AnnaBridge 145:64910690c574 1935 * @brief Get DMA underrun interrupt for DAC channel 1
AnnaBridge 145:64910690c574 1936 * @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1
AnnaBridge 145:64910690c574 1937 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1938 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1939 */
AnnaBridge 145:64910690c574 1940 __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1941 {
AnnaBridge 145:64910690c574 1942 return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1));
AnnaBridge 145:64910690c574 1943 }
AnnaBridge 145:64910690c574 1944
AnnaBridge 145:64910690c574 1945 #if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge 145:64910690c574 1946 /**
AnnaBridge 145:64910690c574 1947 * @brief Get DMA underrun interrupt for DAC channel 2
AnnaBridge 145:64910690c574 1948 * @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2
AnnaBridge 145:64910690c574 1949 * @param DACx DAC instance
AnnaBridge 145:64910690c574 1950 * @retval State of bit (1 or 0).
AnnaBridge 145:64910690c574 1951 */
AnnaBridge 145:64910690c574 1952 __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge 145:64910690c574 1953 {
AnnaBridge 145:64910690c574 1954 return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2));
AnnaBridge 145:64910690c574 1955 }
AnnaBridge 145:64910690c574 1956 #endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge 145:64910690c574 1957
AnnaBridge 145:64910690c574 1958 /**
AnnaBridge 145:64910690c574 1959 * @}
AnnaBridge 145:64910690c574 1960 */
AnnaBridge 145:64910690c574 1961
AnnaBridge 145:64910690c574 1962 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 145:64910690c574 1963 /** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 145:64910690c574 1964 * @{
AnnaBridge 145:64910690c574 1965 */
AnnaBridge 145:64910690c574 1966
AnnaBridge 145:64910690c574 1967 ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx);
AnnaBridge 145:64910690c574 1968 ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge 145:64910690c574 1969 void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge 145:64910690c574 1970
AnnaBridge 145:64910690c574 1971 /**
AnnaBridge 145:64910690c574 1972 * @}
AnnaBridge 145:64910690c574 1973 */
AnnaBridge 145:64910690c574 1974 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 145:64910690c574 1975
AnnaBridge 145:64910690c574 1976 /**
AnnaBridge 145:64910690c574 1977 * @}
AnnaBridge 145:64910690c574 1978 */
AnnaBridge 145:64910690c574 1979
AnnaBridge 145:64910690c574 1980 /**
AnnaBridge 145:64910690c574 1981 * @}
AnnaBridge 145:64910690c574 1982 */
AnnaBridge 145:64910690c574 1983
AnnaBridge 145:64910690c574 1984 #endif /* DAC1 */
AnnaBridge 145:64910690c574 1985
AnnaBridge 145:64910690c574 1986 /**
AnnaBridge 145:64910690c574 1987 * @}
AnnaBridge 145:64910690c574 1988 */
AnnaBridge 145:64910690c574 1989
AnnaBridge 145:64910690c574 1990 #ifdef __cplusplus
AnnaBridge 145:64910690c574 1991 }
AnnaBridge 145:64910690c574 1992 #endif
AnnaBridge 145:64910690c574 1993
AnnaBridge 145:64910690c574 1994 #endif /* __STM32L4xx_LL_DAC_H */
AnnaBridge 145:64910690c574 1995
AnnaBridge 145:64910690c574 1996 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/