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TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_IAR/stm32l4xx_ll_adc.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_DISCO_L496AG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_adc.h@165:d1b4690b3f8b

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	165:d1b4690b3f8b	1	/**
AnnaBridge	165:d1b4690b3f8b	2	******************************************************************************
AnnaBridge	165:d1b4690b3f8b	3	* @file stm32l4xx_ll_adc.h
AnnaBridge	165:d1b4690b3f8b	4	* @author MCD Application Team
AnnaBridge	165:d1b4690b3f8b	5	* @brief Header file of ADC LL module.
AnnaBridge	165:d1b4690b3f8b	6	******************************************************************************
AnnaBridge	165:d1b4690b3f8b	7	* @attention
AnnaBridge	165:d1b4690b3f8b	8	*
AnnaBridge	165:d1b4690b3f8b	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	165:d1b4690b3f8b	10	*
AnnaBridge	165:d1b4690b3f8b	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	165:d1b4690b3f8b	12	* are permitted provided that the following conditions are met:
AnnaBridge	165:d1b4690b3f8b	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	165:d1b4690b3f8b	14	* this list of conditions and the following disclaimer.
AnnaBridge	165:d1b4690b3f8b	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	165:d1b4690b3f8b	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	165:d1b4690b3f8b	17	* and/or other materials provided with the distribution.
AnnaBridge	165:d1b4690b3f8b	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	165:d1b4690b3f8b	19	* may be used to endorse or promote products derived from this software
AnnaBridge	165:d1b4690b3f8b	20	* without specific prior written permission.
AnnaBridge	165:d1b4690b3f8b	21	*
AnnaBridge	165:d1b4690b3f8b	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	165:d1b4690b3f8b	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	165:d1b4690b3f8b	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	165:d1b4690b3f8b	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	165:d1b4690b3f8b	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	165:d1b4690b3f8b	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	165:d1b4690b3f8b	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	165:d1b4690b3f8b	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	165:d1b4690b3f8b	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	165:d1b4690b3f8b	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	165:d1b4690b3f8b	32	*
AnnaBridge	165:d1b4690b3f8b	33	******************************************************************************
AnnaBridge	165:d1b4690b3f8b	34	*/
AnnaBridge	165:d1b4690b3f8b	35
AnnaBridge	165:d1b4690b3f8b	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	37	#ifndef __STM32L4xx_LL_ADC_H
AnnaBridge	165:d1b4690b3f8b	38	#define __STM32L4xx_LL_ADC_H
AnnaBridge	165:d1b4690b3f8b	39
AnnaBridge	165:d1b4690b3f8b	40	#ifdef __cplusplus
AnnaBridge	165:d1b4690b3f8b	41	extern "C" {
AnnaBridge	165:d1b4690b3f8b	42	#endif
AnnaBridge	165:d1b4690b3f8b	43
AnnaBridge	165:d1b4690b3f8b	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	45	#include "stm32l4xx.h"
AnnaBridge	165:d1b4690b3f8b	46
AnnaBridge	165:d1b4690b3f8b	47	/** @addtogroup STM32L4xx_LL_Driver
AnnaBridge	165:d1b4690b3f8b	48	* @{
AnnaBridge	165:d1b4690b3f8b	49	*/
AnnaBridge	165:d1b4690b3f8b	50
AnnaBridge	165:d1b4690b3f8b	51	#if defined (ADC1) \|\| defined (ADC2) \|\| defined (ADC3)
AnnaBridge	165:d1b4690b3f8b	52
AnnaBridge	165:d1b4690b3f8b	53	/** @defgroup ADC_LL ADC
AnnaBridge	165:d1b4690b3f8b	54	* @{
AnnaBridge	165:d1b4690b3f8b	55	*/
AnnaBridge	165:d1b4690b3f8b	56
AnnaBridge	165:d1b4690b3f8b	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	59
AnnaBridge	165:d1b4690b3f8b	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	61	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
AnnaBridge	165:d1b4690b3f8b	62	* @{
AnnaBridge	165:d1b4690b3f8b	63	*/
AnnaBridge	165:d1b4690b3f8b	64
AnnaBridge	165:d1b4690b3f8b	65	/* Internal mask for ADC group regular sequencer: */
AnnaBridge	165:d1b4690b3f8b	66	/* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	67	/* - sequencer register offset */
AnnaBridge	165:d1b4690b3f8b	68	/* - sequencer rank bits position into the selected register */
AnnaBridge	165:d1b4690b3f8b	69
AnnaBridge	165:d1b4690b3f8b	70	/* Internal register offset for ADC group regular sequencer configuration */
AnnaBridge	165:d1b4690b3f8b	71	/* (offset placed into a spare area of literal definition) */
AnnaBridge	165:d1b4690b3f8b	72	#define ADC_SQR1_REGOFFSET (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	73	#define ADC_SQR2_REGOFFSET (0x00000100U)
AnnaBridge	165:d1b4690b3f8b	74	#define ADC_SQR3_REGOFFSET (0x00000200U)
AnnaBridge	165:d1b4690b3f8b	75	#define ADC_SQR4_REGOFFSET (0x00000300U)
AnnaBridge	165:d1b4690b3f8b	76
AnnaBridge	165:d1b4690b3f8b	77	#define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET \| ADC_SQR2_REGOFFSET \| ADC_SQR3_REGOFFSET \| ADC_SQR4_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	78	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	79	#define ADC_SQRX_REGOFFSET_POS (8U) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_SQRX_REGOFFSET_MASK */
AnnaBridge	165:d1b4690b3f8b	80	#endif
AnnaBridge	165:d1b4690b3f8b	81	#define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
AnnaBridge	165:d1b4690b3f8b	82
AnnaBridge	165:d1b4690b3f8b	83	/* Definition of ADC group regular sequencer bits information to be inserted */
AnnaBridge	165:d1b4690b3f8b	84	/* into ADC group regular sequencer ranks literals definition. */
AnnaBridge	165:d1b4690b3f8b	85	#define ADC_REG_RANK_1_SQRX_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ1) */
AnnaBridge	165:d1b4690b3f8b	86	#define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (12U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ2) */
AnnaBridge	165:d1b4690b3f8b	87	#define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (18U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ3) */
AnnaBridge	165:d1b4690b3f8b	88	#define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (24U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ4) */
AnnaBridge	165:d1b4690b3f8b	89	#define ADC_REG_RANK_5_SQRX_BITOFFSET_POS ( 0U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ5) */
AnnaBridge	165:d1b4690b3f8b	90	#define ADC_REG_RANK_6_SQRX_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ6) */
AnnaBridge	165:d1b4690b3f8b	91	#define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (12U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ7) */
AnnaBridge	165:d1b4690b3f8b	92	#define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (18U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ8) */
AnnaBridge	165:d1b4690b3f8b	93	#define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (24U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ9) */
AnnaBridge	165:d1b4690b3f8b	94	#define ADC_REG_RANK_10_SQRX_BITOFFSET_POS ( 0U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ10) */
AnnaBridge	165:d1b4690b3f8b	95	#define ADC_REG_RANK_11_SQRX_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ11) */
AnnaBridge	165:d1b4690b3f8b	96	#define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (12U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ12) */
AnnaBridge	165:d1b4690b3f8b	97	#define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (18U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ13) */
AnnaBridge	165:d1b4690b3f8b	98	#define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (24U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ14) */
AnnaBridge	165:d1b4690b3f8b	99	#define ADC_REG_RANK_15_SQRX_BITOFFSET_POS ( 0U) /* Value equivalent to POSITION_VAL(ADC_SQR4_SQ15) */
AnnaBridge	165:d1b4690b3f8b	100	#define ADC_REG_RANK_16_SQRX_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_SQR4_SQ16) */
AnnaBridge	165:d1b4690b3f8b	101
AnnaBridge	165:d1b4690b3f8b	102
AnnaBridge	165:d1b4690b3f8b	103
AnnaBridge	165:d1b4690b3f8b	104	/* Internal mask for ADC group injected sequencer: */
AnnaBridge	165:d1b4690b3f8b	105	/* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	106	/* - data register offset */
AnnaBridge	165:d1b4690b3f8b	107	/* - sequencer rank bits position into the selected register */
AnnaBridge	165:d1b4690b3f8b	108
AnnaBridge	165:d1b4690b3f8b	109	/* Internal register offset for ADC group injected data register */
AnnaBridge	165:d1b4690b3f8b	110	/* (offset placed into a spare area of literal definition) */
AnnaBridge	165:d1b4690b3f8b	111	#define ADC_JDR1_REGOFFSET (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	112	#define ADC_JDR2_REGOFFSET (0x00000100U)
AnnaBridge	165:d1b4690b3f8b	113	#define ADC_JDR3_REGOFFSET (0x00000200U)
AnnaBridge	165:d1b4690b3f8b	114	#define ADC_JDR4_REGOFFSET (0x00000300U)
AnnaBridge	165:d1b4690b3f8b	115
AnnaBridge	165:d1b4690b3f8b	116	#define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET \| ADC_JDR2_REGOFFSET \| ADC_JDR3_REGOFFSET \| ADC_JDR4_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	117	#define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
AnnaBridge	165:d1b4690b3f8b	118	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	119	#define ADC_JDRX_REGOFFSET_POS (8U) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_JDRX_REGOFFSET_MASK */
AnnaBridge	165:d1b4690b3f8b	120	#endif
AnnaBridge	165:d1b4690b3f8b	121
AnnaBridge	165:d1b4690b3f8b	122	/* Definition of ADC group injected sequencer bits information to be inserted */
AnnaBridge	165:d1b4690b3f8b	123	/* into ADC group injected sequencer ranks literals definition. */
AnnaBridge	165:d1b4690b3f8b	124	#define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS ( 8U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ1) */
AnnaBridge	165:d1b4690b3f8b	125	#define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (14U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ2) */
AnnaBridge	165:d1b4690b3f8b	126	#define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (20U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ3) */
AnnaBridge	165:d1b4690b3f8b	127	#define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (26U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ4) */
AnnaBridge	165:d1b4690b3f8b	128
AnnaBridge	165:d1b4690b3f8b	129
AnnaBridge	165:d1b4690b3f8b	130
AnnaBridge	165:d1b4690b3f8b	131	/* Internal mask for ADC group regular trigger: */
AnnaBridge	165:d1b4690b3f8b	132	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	133	/* - regular trigger source */
AnnaBridge	165:d1b4690b3f8b	134	/* - regular trigger edge */
AnnaBridge	165:d1b4690b3f8b	135	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	165:d1b4690b3f8b	136
AnnaBridge	165:d1b4690b3f8b	137	/* Mask containing trigger source masks for each of possible */
AnnaBridge	165:d1b4690b3f8b	138	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	165:d1b4690b3f8b	139	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	165:d1b4690b3f8b	140	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 0U)) \| \
AnnaBridge	165:d1b4690b3f8b	141	((ADC_CFGR_EXTSEL) << (4U * 1U)) \| \
AnnaBridge	165:d1b4690b3f8b	142	((ADC_CFGR_EXTSEL) << (4U * 2U)) \| \
AnnaBridge	165:d1b4690b3f8b	143	((ADC_CFGR_EXTSEL) << (4U * 3U)) )
AnnaBridge	165:d1b4690b3f8b	144
AnnaBridge	165:d1b4690b3f8b	145	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	165:d1b4690b3f8b	146	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	165:d1b4690b3f8b	147	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	165:d1b4690b3f8b	148	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 0U)) \| \
AnnaBridge	165:d1b4690b3f8b	149	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	165:d1b4690b3f8b	150	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	165:d1b4690b3f8b	151	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	165:d1b4690b3f8b	152
AnnaBridge	165:d1b4690b3f8b	153	/* Definition of ADC group regular trigger bits information. */
AnnaBridge	165:d1b4690b3f8b	154	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR_EXTSEL) */
AnnaBridge	165:d1b4690b3f8b	155	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (10U) /* Value equivalent to POSITION_VAL(ADC_CFGR_EXTEN) */
AnnaBridge	165:d1b4690b3f8b	156
AnnaBridge	165:d1b4690b3f8b	157
AnnaBridge	165:d1b4690b3f8b	158
AnnaBridge	165:d1b4690b3f8b	159	/* Internal mask for ADC group injected trigger: */
AnnaBridge	165:d1b4690b3f8b	160	/* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	161	/* - injected trigger source */
AnnaBridge	165:d1b4690b3f8b	162	/* - injected trigger edge */
AnnaBridge	165:d1b4690b3f8b	163	#define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	165:d1b4690b3f8b	164
AnnaBridge	165:d1b4690b3f8b	165	/* Mask containing trigger source masks for each of possible */
AnnaBridge	165:d1b4690b3f8b	166	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	165:d1b4690b3f8b	167	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	165:d1b4690b3f8b	168	#define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U * 0U)) \| \
AnnaBridge	165:d1b4690b3f8b	169	((ADC_JSQR_JEXTSEL) << (4U * 1U)) \| \
AnnaBridge	165:d1b4690b3f8b	170	((ADC_JSQR_JEXTSEL) << (4U * 2U)) \| \
AnnaBridge	165:d1b4690b3f8b	171	((ADC_JSQR_JEXTSEL) << (4U * 3U)) )
AnnaBridge	165:d1b4690b3f8b	172
AnnaBridge	165:d1b4690b3f8b	173	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	165:d1b4690b3f8b	174	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	165:d1b4690b3f8b	175	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	165:d1b4690b3f8b	176	#define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 0U)) \| \
AnnaBridge	165:d1b4690b3f8b	177	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	165:d1b4690b3f8b	178	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	165:d1b4690b3f8b	179	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	165:d1b4690b3f8b	180
AnnaBridge	165:d1b4690b3f8b	181	/* Definition of ADC group injected trigger bits information. */
AnnaBridge	165:d1b4690b3f8b	182	#define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS ( 2U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JEXTSEL) */
AnnaBridge	165:d1b4690b3f8b	183	#define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JEXTEN) */
AnnaBridge	165:d1b4690b3f8b	184
AnnaBridge	165:d1b4690b3f8b	185
AnnaBridge	165:d1b4690b3f8b	186
AnnaBridge	165:d1b4690b3f8b	187
AnnaBridge	165:d1b4690b3f8b	188
AnnaBridge	165:d1b4690b3f8b	189
AnnaBridge	165:d1b4690b3f8b	190	/* Internal mask for ADC channel: */
AnnaBridge	165:d1b4690b3f8b	191	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	192	/* - channel identifier defined by number */
AnnaBridge	165:d1b4690b3f8b	193	/* - channel identifier defined by bitfield */
AnnaBridge	165:d1b4690b3f8b	194	/* - channel differentiation between external channels (connected to */
AnnaBridge	165:d1b4690b3f8b	195	/* GPIO pins) and internal channels (connected to internal paths) */
AnnaBridge	165:d1b4690b3f8b	196	/* - channel sampling time defined by SMPRx register offset */
AnnaBridge	165:d1b4690b3f8b	197	/* and SMPx bits positions into SMPRx register */
AnnaBridge	165:d1b4690b3f8b	198	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH)
AnnaBridge	165:d1b4690b3f8b	199	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH)
AnnaBridge	165:d1b4690b3f8b	200	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
AnnaBridge	165:d1b4690b3f8b	201	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	165:d1b4690b3f8b	202	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
AnnaBridge	165:d1b4690b3f8b	203	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
AnnaBridge	165:d1b4690b3f8b	204
AnnaBridge	165:d1b4690b3f8b	205	/* Channel differentiation between external and internal channels */
AnnaBridge	165:d1b4690b3f8b	206	#define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000U) /* Marker of internal channel */
AnnaBridge	165:d1b4690b3f8b	207	#define ADC_CHANNEL_ID_INTERNAL_CH_2 (0x00080000U) /* Marker of internal channel for other ADC instances, in case of different ADC internal channels mapped on same channel number on different ADC instances */
AnnaBridge	165:d1b4690b3f8b	208	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2)
AnnaBridge	165:d1b4690b3f8b	209
AnnaBridge	165:d1b4690b3f8b	210	/* Internal register offset for ADC channel sampling time configuration */
AnnaBridge	165:d1b4690b3f8b	211	/* (offset placed into a spare area of literal definition) */
AnnaBridge	165:d1b4690b3f8b	212	#define ADC_SMPR1_REGOFFSET (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	213	#define ADC_SMPR2_REGOFFSET (0x02000000U)
AnnaBridge	165:d1b4690b3f8b	214	#define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET \| ADC_SMPR2_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	215	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	216	#define ADC_SMPRX_REGOFFSET_POS (25U) /* Position of bits ADC_SMPRx_REGOFFSET in ADC_CHANNEL_SMPRX_REGOFFSET_MASK */
AnnaBridge	165:d1b4690b3f8b	217	#endif
AnnaBridge	165:d1b4690b3f8b	218
AnnaBridge	165:d1b4690b3f8b	219	#define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000U)
AnnaBridge	165:d1b4690b3f8b	220	#define ADC_CHANNEL_SMPx_BITOFFSET_POS (20U) /* Value equivalent to POSITION_VAL(ADC_CHANNEL_SMPx_BITOFFSET_MASK) */
AnnaBridge	165:d1b4690b3f8b	221
AnnaBridge	165:d1b4690b3f8b	222	/* Definition of channels ID number information to be inserted into */
AnnaBridge	165:d1b4690b3f8b	223	/* channels literals definition. */
AnnaBridge	165:d1b4690b3f8b	224	#define ADC_CHANNEL_0_NUMBER (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	225	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	226	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR_AWD1CH_1 )
AnnaBridge	165:d1b4690b3f8b	227	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	228	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR_AWD1CH_2 )
AnnaBridge	165:d1b4690b3f8b	229	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	230	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 )
AnnaBridge	165:d1b4690b3f8b	231	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	232	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR_AWD1CH_3 )
AnnaBridge	165:d1b4690b3f8b	233	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	234	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_1 )
AnnaBridge	165:d1b4690b3f8b	235	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	236	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 )
AnnaBridge	165:d1b4690b3f8b	237	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	238	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 )
AnnaBridge	165:d1b4690b3f8b	239	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	240	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4 )
AnnaBridge	165:d1b4690b3f8b	241	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 \| ADC_CFGR_AWD1CH_0)
AnnaBridge	165:d1b4690b3f8b	242	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 \| ADC_CFGR_AWD1CH_1 )
AnnaBridge	165:d1b4690b3f8b	243
AnnaBridge	165:d1b4690b3f8b	244	/* Definition of channels ID bitfield information to be inserted into */
AnnaBridge	165:d1b4690b3f8b	245	/* channels literals definition. */
AnnaBridge	165:d1b4690b3f8b	246	#define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
AnnaBridge	165:d1b4690b3f8b	247	#define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1)
AnnaBridge	165:d1b4690b3f8b	248	#define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2)
AnnaBridge	165:d1b4690b3f8b	249	#define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3)
AnnaBridge	165:d1b4690b3f8b	250	#define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4)
AnnaBridge	165:d1b4690b3f8b	251	#define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5)
AnnaBridge	165:d1b4690b3f8b	252	#define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6)
AnnaBridge	165:d1b4690b3f8b	253	#define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7)
AnnaBridge	165:d1b4690b3f8b	254	#define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8)
AnnaBridge	165:d1b4690b3f8b	255	#define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9)
AnnaBridge	165:d1b4690b3f8b	256	#define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10)
AnnaBridge	165:d1b4690b3f8b	257	#define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11)
AnnaBridge	165:d1b4690b3f8b	258	#define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12)
AnnaBridge	165:d1b4690b3f8b	259	#define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13)
AnnaBridge	165:d1b4690b3f8b	260	#define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14)
AnnaBridge	165:d1b4690b3f8b	261	#define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15)
AnnaBridge	165:d1b4690b3f8b	262	#define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16)
AnnaBridge	165:d1b4690b3f8b	263	#define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17)
AnnaBridge	165:d1b4690b3f8b	264	#define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18)
AnnaBridge	165:d1b4690b3f8b	265
AnnaBridge	165:d1b4690b3f8b	266	/* Definition of channels sampling time information to be inserted into */
AnnaBridge	165:d1b4690b3f8b	267	/* channels literals definition. */
AnnaBridge	165:d1b4690b3f8b	268	#define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET \| (( 0U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP0) */
AnnaBridge	165:d1b4690b3f8b	269	#define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET \| (( 3U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP1) */
AnnaBridge	165:d1b4690b3f8b	270	#define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET \| (( 6U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP2) */
AnnaBridge	165:d1b4690b3f8b	271	#define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET \| (( 9U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP3) */
AnnaBridge	165:d1b4690b3f8b	272	#define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET \| ((12U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP4) */
AnnaBridge	165:d1b4690b3f8b	273	#define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET \| ((15U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP5) */
AnnaBridge	165:d1b4690b3f8b	274	#define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET \| ((18U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP6) */
AnnaBridge	165:d1b4690b3f8b	275	#define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET \| ((21U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP7) */
AnnaBridge	165:d1b4690b3f8b	276	#define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET \| ((24U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP8) */
AnnaBridge	165:d1b4690b3f8b	277	#define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET \| ((27U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP9) */
AnnaBridge	165:d1b4690b3f8b	278	#define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET \| (( 0U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP10) */
AnnaBridge	165:d1b4690b3f8b	279	#define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET \| (( 3U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP11) */
AnnaBridge	165:d1b4690b3f8b	280	#define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET \| (( 6U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP12) */
AnnaBridge	165:d1b4690b3f8b	281	#define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET \| (( 9U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP13) */
AnnaBridge	165:d1b4690b3f8b	282	#define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET \| ((12U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP14) */
AnnaBridge	165:d1b4690b3f8b	283	#define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET \| ((15U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP15) */
AnnaBridge	165:d1b4690b3f8b	284	#define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET \| ((18U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP16) */
AnnaBridge	165:d1b4690b3f8b	285	#define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET \| ((21U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP17) */
AnnaBridge	165:d1b4690b3f8b	286	#define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET \| ((24U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP18) */
AnnaBridge	165:d1b4690b3f8b	287
AnnaBridge	165:d1b4690b3f8b	288
AnnaBridge	165:d1b4690b3f8b	289	/* Internal mask for ADC mode single or differential ended: */
AnnaBridge	165:d1b4690b3f8b	290	/* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */
AnnaBridge	165:d1b4690b3f8b	291	/* the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	292	/* (concatenation of multiple bits used in different registers) */
AnnaBridge	165:d1b4690b3f8b	293	/* - ADC calibration: calibration start, calibration factor get or set */
AnnaBridge	165:d1b4690b3f8b	294	/* - ADC channels: set each ADC channel ending mode */
AnnaBridge	165:d1b4690b3f8b	295	#define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF)
AnnaBridge	165:d1b4690b3f8b	296	#define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D \| ADC_CALFACT_CALFACT_S)
AnnaBridge	165:d1b4690b3f8b	297	#define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFSEL_DIFSEL */
AnnaBridge	165:d1b4690b3f8b	298	#define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_5) /* Bit chosen to perform of shift when single mode is selected, shift value out of channels bits range. */
AnnaBridge	165:d1b4690b3f8b	299	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	300	#define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000U) /* Selection of 1 bit to discriminate differential mode: mask of bit */
AnnaBridge	165:d1b4690b3f8b	301	#define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16U) /* Selection of 1 bit to discriminate differential mode: position of bit */
AnnaBridge	165:d1b4690b3f8b	302	#define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4U) /* Shift of bit ADC_SINGLEDIFF_CALIB_F_BIT_D to position to perform a shift of 4 ranks */
AnnaBridge	165:d1b4690b3f8b	303	#endif
AnnaBridge	165:d1b4690b3f8b	304
AnnaBridge	165:d1b4690b3f8b	305	/* Internal mask for ADC analog watchdog: */
AnnaBridge	165:d1b4690b3f8b	306	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
AnnaBridge	165:d1b4690b3f8b	307	/* (concatenation of multiple bits used in different analog watchdogs, */
AnnaBridge	165:d1b4690b3f8b	308	/* (feature of several watchdogs not available on all STM32 families)). */
AnnaBridge	165:d1b4690b3f8b	309	/* - analog watchdog 1: monitored channel defined by number, */
AnnaBridge	165:d1b4690b3f8b	310	/* selection of ADC group (ADC groups regular and-or injected). */
AnnaBridge	165:d1b4690b3f8b	311	/* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */
AnnaBridge	165:d1b4690b3f8b	312	/* selection on groups. */
AnnaBridge	165:d1b4690b3f8b	313
AnnaBridge	165:d1b4690b3f8b	314	/* Internal register offset for ADC analog watchdog channel configuration */
AnnaBridge	165:d1b4690b3f8b	315	#define ADC_AWD_CR1_REGOFFSET (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	316	#define ADC_AWD_CR2_REGOFFSET (0x00100000U)
AnnaBridge	165:d1b4690b3f8b	317	#define ADC_AWD_CR3_REGOFFSET (0x00200000U)
AnnaBridge	165:d1b4690b3f8b	318
AnnaBridge	165:d1b4690b3f8b	319	/* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */
AnnaBridge	165:d1b4690b3f8b	320	/* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */
AnnaBridge	165:d1b4690b3f8b	321	#define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
AnnaBridge	165:d1b4690b3f8b	322	#define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024U)
AnnaBridge	165:d1b4690b3f8b	323
AnnaBridge	165:d1b4690b3f8b	324	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET \| ADC_AWD_CR2_REGOFFSET \| ADC_AWD_CR3_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	325
AnnaBridge	165:d1b4690b3f8b	326	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL)
AnnaBridge	165:d1b4690b3f8b	327	#define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH)
AnnaBridge	165:d1b4690b3f8b	328	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR23_CHANNEL_MASK)
AnnaBridge	165:d1b4690b3f8b	329
AnnaBridge	165:d1b4690b3f8b	330	#define ADC_AWD_CRX_REGOFFSET_POS (20U) /* Position of bits ADC_AWD_CRx_REGOFFSET in ADC_AWD_CRX_REGOFFSET_MASK */
AnnaBridge	165:d1b4690b3f8b	331
AnnaBridge	165:d1b4690b3f8b	332	/* Internal register offset for ADC analog watchdog threshold configuration */
AnnaBridge	165:d1b4690b3f8b	333	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	334	#define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	335	#define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	336	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET \| ADC_AWD_TR2_REGOFFSET \| ADC_AWD_TR3_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	337	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	338	#define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC_SQRx_REGOFFSET in ADC_AWD_TRX_REGOFFSET_MASK */
AnnaBridge	165:d1b4690b3f8b	339	#define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000U) /* Selection of 1 bit to discriminate threshold high: mask of bit */
AnnaBridge	165:d1b4690b3f8b	340	#define ADC_AWD_TRX_BIT_HIGH_POS (16U) /* Selection of 1 bit to discriminate threshold high: position of bit */
AnnaBridge	165:d1b4690b3f8b	341	#define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4U) /* Shift of bit ADC_AWD_TRX_BIT_HIGH to position to perform a shift of 4 ranks */
AnnaBridge	165:d1b4690b3f8b	342	#endif
AnnaBridge	165:d1b4690b3f8b	343
AnnaBridge	165:d1b4690b3f8b	344	/* Internal mask for ADC offset: */
AnnaBridge	165:d1b4690b3f8b	345	/* Internal register offset for ADC offset number configuration */
AnnaBridge	165:d1b4690b3f8b	346	#define ADC_OFR1_REGOFFSET (0x00000000U)
AnnaBridge	165:d1b4690b3f8b	347	#define ADC_OFR2_REGOFFSET (0x00000001U)
AnnaBridge	165:d1b4690b3f8b	348	#define ADC_OFR3_REGOFFSET (0x00000002U)
AnnaBridge	165:d1b4690b3f8b	349	#define ADC_OFR4_REGOFFSET (0x00000003U)
AnnaBridge	165:d1b4690b3f8b	350	#define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET \| ADC_OFR2_REGOFFSET \| ADC_OFR3_REGOFFSET \| ADC_OFR4_REGOFFSET)
AnnaBridge	165:d1b4690b3f8b	351
AnnaBridge	165:d1b4690b3f8b	352
AnnaBridge	165:d1b4690b3f8b	353	/* ADC registers bits positions */
AnnaBridge	165:d1b4690b3f8b	354	#define ADC_CFGR_RES_BITOFFSET_POS ( 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR_RES) */
AnnaBridge	165:d1b4690b3f8b	355	#define ADC_CFGR_AWD1SGL_BITOFFSET_POS (22U) /* Value equivalent to POSITION_VAL(ADC_CFGR_AWD1SGL) */
AnnaBridge	165:d1b4690b3f8b	356	#define ADC_CFGR_AWD1EN_BITOFFSET_POS (23U) /* Value equivalent to POSITION_VAL(ADC_CFGR_AWD1EN) */
AnnaBridge	165:d1b4690b3f8b	357	#define ADC_CFGR_JAWD1EN_BITOFFSET_POS (24U) /* Value equivalent to POSITION_VAL(ADC_CFGR_JAWD1EN) */
AnnaBridge	165:d1b4690b3f8b	358	#define ADC_TR1_HT1_BITOFFSET_POS (16U) /* Value equivalent to POSITION_VAL(ADC_TR1_HT1) */
AnnaBridge	165:d1b4690b3f8b	359
AnnaBridge	165:d1b4690b3f8b	360
AnnaBridge	165:d1b4690b3f8b	361	/* ADC registers bits groups */
AnnaBridge	165:d1b4690b3f8b	362	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_JADSTP \| ADC_CR_ADSTP \| ADC_CR_JADSTART \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
AnnaBridge	165:d1b4690b3f8b	363
AnnaBridge	165:d1b4690b3f8b	364
AnnaBridge	165:d1b4690b3f8b	365	/* ADC internal channels related definitions */
AnnaBridge	165:d1b4690b3f8b	366	/* Internal voltage reference VrefInt */
AnnaBridge	165:d1b4690b3f8b	367	#define VREFINT_CAL_ADDR ((uint16_t) (0x1FFF75AAU)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	165:d1b4690b3f8b	368	#define VREFINT_CAL_VREF ( 3000U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
AnnaBridge	165:d1b4690b3f8b	369	/* Temperature sensor */
AnnaBridge	165:d1b4690b3f8b	370	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) (0x1FFF75A8U)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32L4, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	165:d1b4690b3f8b	371	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) (0x1FFF75CAU)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32L4, temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	165:d1b4690b3f8b	372	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	165:d1b4690b3f8b	373	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 110) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	165:d1b4690b3f8b	374	#define TEMPSENSOR_CAL_VREFANALOG ( 3000U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
AnnaBridge	165:d1b4690b3f8b	375
AnnaBridge	165:d1b4690b3f8b	376
AnnaBridge	165:d1b4690b3f8b	377	/**
AnnaBridge	165:d1b4690b3f8b	378	* @}
AnnaBridge	165:d1b4690b3f8b	379	*/
AnnaBridge	165:d1b4690b3f8b	380
AnnaBridge	165:d1b4690b3f8b	381
AnnaBridge	165:d1b4690b3f8b	382	/* Private macros ------------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	383	/** @defgroup ADC_LL_Private_Macros ADC Private Macros
AnnaBridge	165:d1b4690b3f8b	384	* @{
AnnaBridge	165:d1b4690b3f8b	385	*/
AnnaBridge	165:d1b4690b3f8b	386
AnnaBridge	165:d1b4690b3f8b	387	/**
AnnaBridge	165:d1b4690b3f8b	388	* @brief Driver macro reserved for internal use: isolate bits with the
AnnaBridge	165:d1b4690b3f8b	389	* selected mask and shift them to the register LSB
AnnaBridge	165:d1b4690b3f8b	390	* (shift mask on register position bit 0).
AnnaBridge	165:d1b4690b3f8b	391	* @param __BITS__ Bits in register 32 bits
AnnaBridge	165:d1b4690b3f8b	392	* @param __MASK__ Mask in register 32 bits
AnnaBridge	165:d1b4690b3f8b	393	* @retval Bits in register 32 bits
AnnaBridge	165:d1b4690b3f8b	394	*/
AnnaBridge	165:d1b4690b3f8b	395	#define __ADC_MASK_SHIFT(__BITS__, __MASK__) \
AnnaBridge	165:d1b4690b3f8b	396	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
AnnaBridge	165:d1b4690b3f8b	397
AnnaBridge	165:d1b4690b3f8b	398	/**
AnnaBridge	165:d1b4690b3f8b	399	* @brief Driver macro reserved for internal use: set a pointer to
AnnaBridge	165:d1b4690b3f8b	400	* a register from a register basis from which an offset
AnnaBridge	165:d1b4690b3f8b	401	* is applied.
AnnaBridge	165:d1b4690b3f8b	402	* @param __REG__ Register basis from which the offset is applied.
AnnaBridge	165:d1b4690b3f8b	403	* @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
AnnaBridge	165:d1b4690b3f8b	404	* @retval Pointer to register address
AnnaBridge	165:d1b4690b3f8b	405	*/
AnnaBridge	165:d1b4690b3f8b	406	#define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
AnnaBridge	165:d1b4690b3f8b	407	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
AnnaBridge	165:d1b4690b3f8b	408
AnnaBridge	165:d1b4690b3f8b	409	/**
AnnaBridge	165:d1b4690b3f8b	410	* @}
AnnaBridge	165:d1b4690b3f8b	411	*/
AnnaBridge	165:d1b4690b3f8b	412
AnnaBridge	165:d1b4690b3f8b	413
AnnaBridge	165:d1b4690b3f8b	414	/* Exported types ------------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	415	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	165:d1b4690b3f8b	416	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
AnnaBridge	165:d1b4690b3f8b	417	* @{
AnnaBridge	165:d1b4690b3f8b	418	*/
AnnaBridge	165:d1b4690b3f8b	419
AnnaBridge	165:d1b4690b3f8b	420	/**
AnnaBridge	165:d1b4690b3f8b	421	* @brief Structure definition of some features of ADC common parameters
AnnaBridge	165:d1b4690b3f8b	422	* and multimode
AnnaBridge	165:d1b4690b3f8b	423	* (all ADC instances belonging to the same ADC common instance).
AnnaBridge	165:d1b4690b3f8b	424	* @note The setting of these parameters by function @ref LL_ADC_CommonInit()
AnnaBridge	165:d1b4690b3f8b	425	* is conditioned to ADC instances state (all ADC instances
AnnaBridge	165:d1b4690b3f8b	426	* sharing the same ADC common instance):
AnnaBridge	165:d1b4690b3f8b	427	* All ADC instances sharing the same ADC common instance must be
AnnaBridge	165:d1b4690b3f8b	428	* disabled.
AnnaBridge	165:d1b4690b3f8b	429	*/
AnnaBridge	165:d1b4690b3f8b	430	typedef struct
AnnaBridge	165:d1b4690b3f8b	431	{
AnnaBridge	165:d1b4690b3f8b	432	uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	165:d1b4690b3f8b	433	This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
AnnaBridge	165:d1b4690b3f8b	434	@note On this STM32 serie, if ADC group injected is used, some
AnnaBridge	165:d1b4690b3f8b	435	clock ratio constraints between ADC clock and AHB clock
AnnaBridge	165:d1b4690b3f8b	436	must be respected. Refer to reference manual.
AnnaBridge	165:d1b4690b3f8b	437
AnnaBridge	165:d1b4690b3f8b	438	This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
AnnaBridge	165:d1b4690b3f8b	439
AnnaBridge	165:d1b4690b3f8b	440	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	441	uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independent mode or multimode (for devices with several ADC instances).
AnnaBridge	165:d1b4690b3f8b	442	This parameter can be a value of @ref ADC_LL_EC_MULTI_MODE
AnnaBridge	165:d1b4690b3f8b	443
AnnaBridge	165:d1b4690b3f8b	444	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultimode(). */
AnnaBridge	165:d1b4690b3f8b	445
AnnaBridge	165:d1b4690b3f8b	446	uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfer or transfer by DMA.
AnnaBridge	165:d1b4690b3f8b	447	This parameter can be a value of @ref ADC_LL_EC_MULTI_DMA_TRANSFER
AnnaBridge	165:d1b4690b3f8b	448
AnnaBridge	165:d1b4690b3f8b	449	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultiDMATransfer(). */
AnnaBridge	165:d1b4690b3f8b	450
AnnaBridge	165:d1b4690b3f8b	451	uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases.
AnnaBridge	165:d1b4690b3f8b	452	This parameter can be a value of @ref ADC_LL_EC_MULTI_TWOSMP_DELAY
AnnaBridge	165:d1b4690b3f8b	453
AnnaBridge	165:d1b4690b3f8b	454	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultiTwoSamplingDelay(). */
AnnaBridge	165:d1b4690b3f8b	455	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	165:d1b4690b3f8b	456
AnnaBridge	165:d1b4690b3f8b	457	} LL_ADC_CommonInitTypeDef;
AnnaBridge	165:d1b4690b3f8b	458
AnnaBridge	165:d1b4690b3f8b	459	/**
AnnaBridge	165:d1b4690b3f8b	460	* @brief Structure definition of some features of ADC instance.
AnnaBridge	165:d1b4690b3f8b	461	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	165:d1b4690b3f8b	462	* Affects both group regular and group injected (availability
AnnaBridge	165:d1b4690b3f8b	463	* of ADC group injected depends on STM32 families).
AnnaBridge	165:d1b4690b3f8b	464	* Refer to corresponding unitary functions into
AnnaBridge	165:d1b4690b3f8b	465	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	165:d1b4690b3f8b	466	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	165:d1b4690b3f8b	467	* is conditioned to ADC state:
AnnaBridge	165:d1b4690b3f8b	468	* ADC instance must be disabled.
AnnaBridge	165:d1b4690b3f8b	469	* This condition is applied to all ADC features, for efficiency
AnnaBridge	165:d1b4690b3f8b	470	* and compatibility over all STM32 families. However, the different
AnnaBridge	165:d1b4690b3f8b	471	* features can be set under different ADC state conditions
AnnaBridge	165:d1b4690b3f8b	472	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	165:d1b4690b3f8b	473	* ADC enabled with conversion on going, ...)
AnnaBridge	165:d1b4690b3f8b	474	* Each feature can be updated afterwards with a unitary function
AnnaBridge	165:d1b4690b3f8b	475	* and potentially with ADC in a different state than disabled,
AnnaBridge	165:d1b4690b3f8b	476	* refer to description of each function for setting
AnnaBridge	165:d1b4690b3f8b	477	* conditioned to ADC state.
AnnaBridge	165:d1b4690b3f8b	478	*/
AnnaBridge	165:d1b4690b3f8b	479	typedef struct
AnnaBridge	165:d1b4690b3f8b	480	{
AnnaBridge	165:d1b4690b3f8b	481	uint32_t Resolution; /*!< Set ADC resolution.
AnnaBridge	165:d1b4690b3f8b	482	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
AnnaBridge	165:d1b4690b3f8b	483
AnnaBridge	165:d1b4690b3f8b	484	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
AnnaBridge	165:d1b4690b3f8b	485
AnnaBridge	165:d1b4690b3f8b	486	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
AnnaBridge	165:d1b4690b3f8b	487	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
AnnaBridge	165:d1b4690b3f8b	488
AnnaBridge	165:d1b4690b3f8b	489	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
AnnaBridge	165:d1b4690b3f8b	490
AnnaBridge	165:d1b4690b3f8b	491	uint32_t LowPowerMode; /*!< Set ADC low power mode.
AnnaBridge	165:d1b4690b3f8b	492	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
AnnaBridge	165:d1b4690b3f8b	493
AnnaBridge	165:d1b4690b3f8b	494	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
AnnaBridge	165:d1b4690b3f8b	495
AnnaBridge	165:d1b4690b3f8b	496	} LL_ADC_InitTypeDef;
AnnaBridge	165:d1b4690b3f8b	497
AnnaBridge	165:d1b4690b3f8b	498	/**
AnnaBridge	165:d1b4690b3f8b	499	* @brief Structure definition of some features of ADC group regular.
AnnaBridge	165:d1b4690b3f8b	500	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	165:d1b4690b3f8b	501	* Refer to corresponding unitary functions into
AnnaBridge	165:d1b4690b3f8b	502	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	165:d1b4690b3f8b	503	* (functions with prefix "REG").
AnnaBridge	165:d1b4690b3f8b	504	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
AnnaBridge	165:d1b4690b3f8b	505	* is conditioned to ADC state:
AnnaBridge	165:d1b4690b3f8b	506	* ADC instance must be disabled.
AnnaBridge	165:d1b4690b3f8b	507	* This condition is applied to all ADC features, for efficiency
AnnaBridge	165:d1b4690b3f8b	508	* and compatibility over all STM32 families. However, the different
AnnaBridge	165:d1b4690b3f8b	509	* features can be set under different ADC state conditions
AnnaBridge	165:d1b4690b3f8b	510	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	165:d1b4690b3f8b	511	* ADC enabled with conversion on going, ...)
AnnaBridge	165:d1b4690b3f8b	512	* Each feature can be updated afterwards with a unitary function
AnnaBridge	165:d1b4690b3f8b	513	* and potentially with ADC in a different state than disabled,
AnnaBridge	165:d1b4690b3f8b	514	* refer to description of each function for setting
AnnaBridge	165:d1b4690b3f8b	515	* conditioned to ADC state.
AnnaBridge	165:d1b4690b3f8b	516	*/
AnnaBridge	165:d1b4690b3f8b	517	typedef struct
AnnaBridge	165:d1b4690b3f8b	518	{
AnnaBridge	165:d1b4690b3f8b	519	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	165:d1b4690b3f8b	520	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
AnnaBridge	165:d1b4690b3f8b	521	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	165:d1b4690b3f8b	522	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	165:d1b4690b3f8b	523	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	165:d1b4690b3f8b	524
AnnaBridge	165:d1b4690b3f8b	525	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
AnnaBridge	165:d1b4690b3f8b	526
AnnaBridge	165:d1b4690b3f8b	527	uint32_t SequencerLength; /*!< Set ADC group regular sequencer length.
AnnaBridge	165:d1b4690b3f8b	528	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_SCAN_LENGTH
AnnaBridge	165:d1b4690b3f8b	529
AnnaBridge	165:d1b4690b3f8b	530	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerLength(). */
AnnaBridge	165:d1b4690b3f8b	531
AnnaBridge	165:d1b4690b3f8b	532	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	165:d1b4690b3f8b	533	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
AnnaBridge	165:d1b4690b3f8b	534	@note This parameter has an effect only if group regular sequencer is enabled
AnnaBridge	165:d1b4690b3f8b	535	(scan length of 2 ranks or more).
AnnaBridge	165:d1b4690b3f8b	536
AnnaBridge	165:d1b4690b3f8b	537	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
AnnaBridge	165:d1b4690b3f8b	538
AnnaBridge	165:d1b4690b3f8b	539	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
AnnaBridge	165:d1b4690b3f8b	540	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
AnnaBridge	165:d1b4690b3f8b	541	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	542
AnnaBridge	165:d1b4690b3f8b	543	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
AnnaBridge	165:d1b4690b3f8b	544
AnnaBridge	165:d1b4690b3f8b	545	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
AnnaBridge	165:d1b4690b3f8b	546	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
AnnaBridge	165:d1b4690b3f8b	547
AnnaBridge	165:d1b4690b3f8b	548	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
AnnaBridge	165:d1b4690b3f8b	549
AnnaBridge	165:d1b4690b3f8b	550	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
AnnaBridge	165:d1b4690b3f8b	551	data preserved or overwritten.
AnnaBridge	165:d1b4690b3f8b	552	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
AnnaBridge	165:d1b4690b3f8b	553
AnnaBridge	165:d1b4690b3f8b	554	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
AnnaBridge	165:d1b4690b3f8b	555
AnnaBridge	165:d1b4690b3f8b	556	} LL_ADC_REG_InitTypeDef;
AnnaBridge	165:d1b4690b3f8b	557
AnnaBridge	165:d1b4690b3f8b	558	/**
AnnaBridge	165:d1b4690b3f8b	559	* @brief Structure definition of some features of ADC group injected.
AnnaBridge	165:d1b4690b3f8b	560	* @note These parameters have an impact on ADC scope: ADC group injected.
AnnaBridge	165:d1b4690b3f8b	561	* Refer to corresponding unitary functions into
AnnaBridge	165:d1b4690b3f8b	562	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	165:d1b4690b3f8b	563	* (functions with prefix "INJ").
AnnaBridge	165:d1b4690b3f8b	564	* @note The setting of these parameters by function @ref LL_ADC_INJ_Init()
AnnaBridge	165:d1b4690b3f8b	565	* is conditioned to ADC state:
AnnaBridge	165:d1b4690b3f8b	566	* ADC instance must be disabled.
AnnaBridge	165:d1b4690b3f8b	567	* This condition is applied to all ADC features, for efficiency
AnnaBridge	165:d1b4690b3f8b	568	* and compatibility over all STM32 families. However, the different
AnnaBridge	165:d1b4690b3f8b	569	* features can be set under different ADC state conditions
AnnaBridge	165:d1b4690b3f8b	570	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	165:d1b4690b3f8b	571	* ADC enabled with conversion on going, ...)
AnnaBridge	165:d1b4690b3f8b	572	* Each feature can be updated afterwards with a unitary function
AnnaBridge	165:d1b4690b3f8b	573	* and potentially with ADC in a different state than disabled,
AnnaBridge	165:d1b4690b3f8b	574	* refer to description of each function for setting
AnnaBridge	165:d1b4690b3f8b	575	* conditioned to ADC state.
AnnaBridge	165:d1b4690b3f8b	576	*/
AnnaBridge	165:d1b4690b3f8b	577	typedef struct
AnnaBridge	165:d1b4690b3f8b	578	{
AnnaBridge	165:d1b4690b3f8b	579	uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	165:d1b4690b3f8b	580	This parameter can be a value of @ref ADC_LL_EC_INJ_TRIGGER_SOURCE
AnnaBridge	165:d1b4690b3f8b	581	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	165:d1b4690b3f8b	582	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	165:d1b4690b3f8b	583	In case of need to modify trigger edge, use function @ref LL_ADC_INJ_SetTriggerEdge().
AnnaBridge	165:d1b4690b3f8b	584
AnnaBridge	165:d1b4690b3f8b	585	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetTriggerSource(). */
AnnaBridge	165:d1b4690b3f8b	586
AnnaBridge	165:d1b4690b3f8b	587	uint32_t SequencerLength; /*!< Set ADC group injected sequencer length.
AnnaBridge	165:d1b4690b3f8b	588	This parameter can be a value of @ref ADC_LL_EC_INJ_SEQ_SCAN_LENGTH
AnnaBridge	165:d1b4690b3f8b	589
AnnaBridge	165:d1b4690b3f8b	590	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetSequencerLength(). */
AnnaBridge	165:d1b4690b3f8b	591
AnnaBridge	165:d1b4690b3f8b	592	uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	165:d1b4690b3f8b	593	This parameter can be a value of @ref ADC_LL_EC_INJ_SEQ_DISCONT_MODE
AnnaBridge	165:d1b4690b3f8b	594	@note This parameter has an effect only if group injected sequencer is enabled
AnnaBridge	165:d1b4690b3f8b	595	(scan length of 2 ranks or more).
AnnaBridge	165:d1b4690b3f8b	596
AnnaBridge	165:d1b4690b3f8b	597	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetSequencerDiscont(). */
AnnaBridge	165:d1b4690b3f8b	598
AnnaBridge	165:d1b4690b3f8b	599	uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent or from ADC group regular.
AnnaBridge	165:d1b4690b3f8b	600	This parameter can be a value of @ref ADC_LL_EC_INJ_TRIG_AUTO
AnnaBridge	165:d1b4690b3f8b	601	Note: This parameter must be set to set to independent trigger if injected trigger source is set to an external trigger.
AnnaBridge	165:d1b4690b3f8b	602
AnnaBridge	165:d1b4690b3f8b	603	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetTrigAuto(). */
AnnaBridge	165:d1b4690b3f8b	604
AnnaBridge	165:d1b4690b3f8b	605	} LL_ADC_INJ_InitTypeDef;
AnnaBridge	165:d1b4690b3f8b	606
AnnaBridge	165:d1b4690b3f8b	607	/**
AnnaBridge	165:d1b4690b3f8b	608	* @}
AnnaBridge	165:d1b4690b3f8b	609	*/
AnnaBridge	165:d1b4690b3f8b	610	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	165:d1b4690b3f8b	611
AnnaBridge	165:d1b4690b3f8b	612	/* Exported constants --------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	613	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
AnnaBridge	165:d1b4690b3f8b	614	* @{
AnnaBridge	165:d1b4690b3f8b	615	*/
AnnaBridge	165:d1b4690b3f8b	616
AnnaBridge	165:d1b4690b3f8b	617	/** @defgroup ADC_LL_EC_FLAG ADC flags
AnnaBridge	165:d1b4690b3f8b	618	* @brief Flags defines which can be used with LL_ADC_ReadReg function
AnnaBridge	165:d1b4690b3f8b	619	* @{
AnnaBridge	165:d1b4690b3f8b	620	*/
AnnaBridge	165:d1b4690b3f8b	621	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
AnnaBridge	165:d1b4690b3f8b	622	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	623	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	624	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
AnnaBridge	165:d1b4690b3f8b	625	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
AnnaBridge	165:d1b4690b3f8b	626	#define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /!< ADC flag ADC group injected end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	627	#define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /!< ADC flag ADC group injected end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	628	#define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /!< ADC flag ADC group injected contexts queue overflow /
AnnaBridge	165:d1b4690b3f8b	629	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /!< ADC flag ADC analog watchdog 1 /
AnnaBridge	165:d1b4690b3f8b	630	#define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /!< ADC flag ADC analog watchdog 2 /
AnnaBridge	165:d1b4690b3f8b	631	#define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /!< ADC flag ADC analog watchdog 3 /
AnnaBridge	165:d1b4690b3f8b	632	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	633	#define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /!< ADC flag ADC multimode master instance ready /
AnnaBridge	165:d1b4690b3f8b	634	#define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /!< ADC flag ADC multimode slave instance ready /
AnnaBridge	165:d1b4690b3f8b	635	#define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /!< ADC flag ADC multimode master group regular end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	636	#define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /!< ADC flag ADC multimode slave group regular end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	637	#define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /!< ADC flag ADC multimode master group regular end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	638	#define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /!< ADC flag ADC multimode slave group regular end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	639	#define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /!< ADC flag ADC multimode master group regular overrun /
AnnaBridge	165:d1b4690b3f8b	640	#define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /!< ADC flag ADC multimode slave group regular overrun /
AnnaBridge	165:d1b4690b3f8b	641	#define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /!< ADC flag ADC multimode master group regular end of sampling phase /
AnnaBridge	165:d1b4690b3f8b	642	#define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /!< ADC flag ADC multimode slave group regular end of sampling phase /
AnnaBridge	165:d1b4690b3f8b	643	#define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /!< ADC flag ADC multimode master group injected end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	644	#define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /!< ADC flag ADC multimode slave group injected end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	645	#define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /!< ADC flag ADC multimode master group injected end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	646	#define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /!< ADC flag ADC multimode slave group injected end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	647	#define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /!< ADC flag ADC multimode master group injected contexts queue overflow /
AnnaBridge	165:d1b4690b3f8b	648	#define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /!< ADC flag ADC multimode slave group injected contexts queue overflow /
AnnaBridge	165:d1b4690b3f8b	649	#define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /!< ADC flag ADC multimode master analog watchdog 1 of the ADC master /
AnnaBridge	165:d1b4690b3f8b	650	#define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /!< ADC flag ADC multimode slave analog watchdog 1 of the ADC slave /
AnnaBridge	165:d1b4690b3f8b	651	#define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /!< ADC flag ADC multimode master analog watchdog 2 of the ADC master /
AnnaBridge	165:d1b4690b3f8b	652	#define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /!< ADC flag ADC multimode slave analog watchdog 2 of the ADC slave /
AnnaBridge	165:d1b4690b3f8b	653	#define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /!< ADC flag ADC multimode master analog watchdog 3 of the ADC master /
AnnaBridge	165:d1b4690b3f8b	654	#define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /!< ADC flag ADC multimode slave analog watchdog 3 of the ADC slave /
AnnaBridge	165:d1b4690b3f8b	655	#endif
AnnaBridge	165:d1b4690b3f8b	656	/**
AnnaBridge	165:d1b4690b3f8b	657	* @}
AnnaBridge	165:d1b4690b3f8b	658	*/
AnnaBridge	165:d1b4690b3f8b	659
AnnaBridge	165:d1b4690b3f8b	660	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
AnnaBridge	165:d1b4690b3f8b	661	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
AnnaBridge	165:d1b4690b3f8b	662	* @{
AnnaBridge	165:d1b4690b3f8b	663	*/
AnnaBridge	165:d1b4690b3f8b	664	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
AnnaBridge	165:d1b4690b3f8b	665	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	666	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	667	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
AnnaBridge	165:d1b4690b3f8b	668	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
AnnaBridge	165:d1b4690b3f8b	669	#define LL_ADC_IT_JEOC ADC_IER_JEOCIE /!< ADC interruption ADC group injected end of unitary conversion /
AnnaBridge	165:d1b4690b3f8b	670	#define LL_ADC_IT_JEOS ADC_IER_JEOSIE /!< ADC interruption ADC group injected end of sequence conversions /
AnnaBridge	165:d1b4690b3f8b	671	#define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /!< ADC interruption ADC group injected contexts queue overflow /
AnnaBridge	165:d1b4690b3f8b	672	#define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /!< ADC interruption ADC analog watchdog 1 /
AnnaBridge	165:d1b4690b3f8b	673	#define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /!< ADC interruption ADC analog watchdog 2 /
AnnaBridge	165:d1b4690b3f8b	674	#define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /!< ADC interruption ADC analog watchdog 3 /
AnnaBridge	165:d1b4690b3f8b	675	/**
AnnaBridge	165:d1b4690b3f8b	676	* @}
AnnaBridge	165:d1b4690b3f8b	677	*/
AnnaBridge	165:d1b4690b3f8b	678
AnnaBridge	165:d1b4690b3f8b	679	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
AnnaBridge	165:d1b4690b3f8b	680	* @{
AnnaBridge	165:d1b4690b3f8b	681	*/
AnnaBridge	165:d1b4690b3f8b	682	/* List of ADC registers intended to be used (most commonly) with */
AnnaBridge	165:d1b4690b3f8b	683	/* DMA transfer. */
AnnaBridge	165:d1b4690b3f8b	684	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
AnnaBridge	165:d1b4690b3f8b	685	#define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
AnnaBridge	165:d1b4690b3f8b	686	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	687	#define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001U) /* ADC group regular conversion data register (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 devices with several ADC instances). Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadMultiConversionData32() */
AnnaBridge	165:d1b4690b3f8b	688	#endif
AnnaBridge	165:d1b4690b3f8b	689	/**
AnnaBridge	165:d1b4690b3f8b	690	* @}
AnnaBridge	165:d1b4690b3f8b	691	*/
AnnaBridge	165:d1b4690b3f8b	692
AnnaBridge	165:d1b4690b3f8b	693	/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
AnnaBridge	165:d1b4690b3f8b	694	* @{
AnnaBridge	165:d1b4690b3f8b	695	*/
AnnaBridge	165:d1b4690b3f8b	696	#define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /!< ADC synchronous clock derived from AHB clock without prescaler /
AnnaBridge	165:d1b4690b3f8b	697	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /!< ADC synchronous clock derived from AHB clock with prescaler division by 2 /
AnnaBridge	165:d1b4690b3f8b	698	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 \| ADC_CCR_CKMODE_0) /!< ADC synchronous clock derived from AHB clock with prescaler division by 4 /
AnnaBridge	165:d1b4690b3f8b	699	#define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000U) /!< ADC asynchronous clock without prescaler /
AnnaBridge	165:d1b4690b3f8b	700	#define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 2 /
AnnaBridge	165:d1b4690b3f8b	701	#define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 4 /
AnnaBridge	165:d1b4690b3f8b	702	#define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 6 /
AnnaBridge	165:d1b4690b3f8b	703	#define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /!< ADC asynchronous clock with prescaler division by 8 /
AnnaBridge	165:d1b4690b3f8b	704	#define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 10 /
AnnaBridge	165:d1b4690b3f8b	705	#define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 12 /
AnnaBridge	165:d1b4690b3f8b	706	#define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 16 /
AnnaBridge	165:d1b4690b3f8b	707	#define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /!< ADC asynchronous clock with prescaler division by 32 /
AnnaBridge	165:d1b4690b3f8b	708	#define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 64 /
AnnaBridge	165:d1b4690b3f8b	709	#define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1) /!< ADC asynchronous clock with prescaler division by 128 /
AnnaBridge	165:d1b4690b3f8b	710	#define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 256 /
AnnaBridge	165:d1b4690b3f8b	711	/**
AnnaBridge	165:d1b4690b3f8b	712	* @}
AnnaBridge	165:d1b4690b3f8b	713	*/
AnnaBridge	165:d1b4690b3f8b	714
AnnaBridge	165:d1b4690b3f8b	715	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
AnnaBridge	165:d1b4690b3f8b	716	* @{
AnnaBridge	165:d1b4690b3f8b	717	*/
AnnaBridge	165:d1b4690b3f8b	718	/* Note: Other measurement paths to internal channels may be available */
AnnaBridge	165:d1b4690b3f8b	719	/* (connections to other peripherals). */
AnnaBridge	165:d1b4690b3f8b	720	/* If they are not listed below, they do not require any specific */
AnnaBridge	165:d1b4690b3f8b	721	/* path enable. In this case, Access to measurement path is done */
AnnaBridge	165:d1b4690b3f8b	722	/* only by selecting the corresponding ADC internal channel. */
AnnaBridge	165:d1b4690b3f8b	723	#define LL_ADC_PATH_INTERNAL_NONE (0x00000000U)/!< ADC measurement pathes all disabled /
AnnaBridge	165:d1b4690b3f8b	724	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
AnnaBridge	165:d1b4690b3f8b	725	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
AnnaBridge	165:d1b4690b3f8b	726	#define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATEN) /!< ADC measurement path to internal channel Vbat /
AnnaBridge	165:d1b4690b3f8b	727	/**
AnnaBridge	165:d1b4690b3f8b	728	* @}
AnnaBridge	165:d1b4690b3f8b	729	*/
AnnaBridge	165:d1b4690b3f8b	730
AnnaBridge	165:d1b4690b3f8b	731	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
AnnaBridge	165:d1b4690b3f8b	732	* @{
AnnaBridge	165:d1b4690b3f8b	733	*/
AnnaBridge	165:d1b4690b3f8b	734	#define LL_ADC_RESOLUTION_12B (0x00000000U) /!< ADC resolution 12 bits /
AnnaBridge	165:d1b4690b3f8b	735	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /!< ADC resolution 10 bits /
AnnaBridge	165:d1b4690b3f8b	736	#define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /!< ADC resolution 8 bits /
AnnaBridge	165:d1b4690b3f8b	737	#define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 \| ADC_CFGR_RES_0) /!< ADC resolution 6 bits /
AnnaBridge	165:d1b4690b3f8b	738	/**
AnnaBridge	165:d1b4690b3f8b	739	* @}
AnnaBridge	165:d1b4690b3f8b	740	*/
AnnaBridge	165:d1b4690b3f8b	741
AnnaBridge	165:d1b4690b3f8b	742	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
AnnaBridge	165:d1b4690b3f8b	743	* @{
AnnaBridge	165:d1b4690b3f8b	744	*/
AnnaBridge	165:d1b4690b3f8b	745	#define LL_ADC_DATA_ALIGN_RIGHT (0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
AnnaBridge	165:d1b4690b3f8b	746	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
AnnaBridge	165:d1b4690b3f8b	747	/**
AnnaBridge	165:d1b4690b3f8b	748	* @}
AnnaBridge	165:d1b4690b3f8b	749	*/
AnnaBridge	165:d1b4690b3f8b	750
AnnaBridge	165:d1b4690b3f8b	751	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
AnnaBridge	165:d1b4690b3f8b	752	* @{
AnnaBridge	165:d1b4690b3f8b	753	*/
AnnaBridge	165:d1b4690b3f8b	754	#define LL_ADC_LP_MODE_NONE (0x00000000U) /!< No ADC low power mode activated /
AnnaBridge	165:d1b4690b3f8b	755	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	165:d1b4690b3f8b	756	/**
AnnaBridge	165:d1b4690b3f8b	757	* @}
AnnaBridge	165:d1b4690b3f8b	758	*/
AnnaBridge	165:d1b4690b3f8b	759
AnnaBridge	165:d1b4690b3f8b	760	/** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number
AnnaBridge	165:d1b4690b3f8b	761	* @{
AnnaBridge	165:d1b4690b3f8b	762	*/
AnnaBridge	165:d1b4690b3f8b	763	#define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /!< ADC offset number 1: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
AnnaBridge	165:d1b4690b3f8b	764	#define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /!< ADC offset number 2: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
AnnaBridge	165:d1b4690b3f8b	765	#define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /!< ADC offset number 3: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
AnnaBridge	165:d1b4690b3f8b	766	#define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /!< ADC offset number 4: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
AnnaBridge	165:d1b4690b3f8b	767	/**
AnnaBridge	165:d1b4690b3f8b	768	* @}
AnnaBridge	165:d1b4690b3f8b	769	*/
AnnaBridge	165:d1b4690b3f8b	770
AnnaBridge	165:d1b4690b3f8b	771	/** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state
AnnaBridge	165:d1b4690b3f8b	772	* @{
AnnaBridge	165:d1b4690b3f8b	773	*/
AnnaBridge	165:d1b4690b3f8b	774	#define LL_ADC_OFFSET_DISABLE (0x00000000U)/!< ADC offset disabled (among ADC selected offset number 1, 2, 3 or 4) /
AnnaBridge	165:d1b4690b3f8b	775	#define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /!< ADC offset enabled (among ADC selected offset number 1, 2, 3 or 4) /
AnnaBridge	165:d1b4690b3f8b	776	/**
AnnaBridge	165:d1b4690b3f8b	777	* @}
AnnaBridge	165:d1b4690b3f8b	778	*/
AnnaBridge	165:d1b4690b3f8b	779
AnnaBridge	165:d1b4690b3f8b	780	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
AnnaBridge	165:d1b4690b3f8b	781	* @{
AnnaBridge	165:d1b4690b3f8b	782	*/
AnnaBridge	165:d1b4690b3f8b	783	#define LL_ADC_GROUP_REGULAR (0x00000001U) /!< ADC group regular (available on all STM32 devices) /
AnnaBridge	165:d1b4690b3f8b	784	#define LL_ADC_GROUP_INJECTED (0x00000002U) /!< ADC group injected (not available on all STM32 devices)/
AnnaBridge	165:d1b4690b3f8b	785	#define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003U) /!< ADC both groups regular and injected /
AnnaBridge	165:d1b4690b3f8b	786	/**
AnnaBridge	165:d1b4690b3f8b	787	* @}
AnnaBridge	165:d1b4690b3f8b	788	*/
AnnaBridge	165:d1b4690b3f8b	789
AnnaBridge	165:d1b4690b3f8b	790	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
AnnaBridge	165:d1b4690b3f8b	791	* @{
AnnaBridge	165:d1b4690b3f8b	792	*/
AnnaBridge	165:d1b4690b3f8b	793	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_SMP \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
AnnaBridge	165:d1b4690b3f8b	794	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_SMP \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
AnnaBridge	165:d1b4690b3f8b	795	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_SMP \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
AnnaBridge	165:d1b4690b3f8b	796	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_SMP \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
AnnaBridge	165:d1b4690b3f8b	797	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_SMP \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
AnnaBridge	165:d1b4690b3f8b	798	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_SMP \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
AnnaBridge	165:d1b4690b3f8b	799	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_SMP \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
AnnaBridge	165:d1b4690b3f8b	800	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_SMP \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
AnnaBridge	165:d1b4690b3f8b	801	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_SMP \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
AnnaBridge	165:d1b4690b3f8b	802	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_SMP \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
AnnaBridge	165:d1b4690b3f8b	803	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_SMP \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
AnnaBridge	165:d1b4690b3f8b	804	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_SMP \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
AnnaBridge	165:d1b4690b3f8b	805	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_SMP \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
AnnaBridge	165:d1b4690b3f8b	806	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_SMP \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
AnnaBridge	165:d1b4690b3f8b	807	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_SMP \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
AnnaBridge	165:d1b4690b3f8b	808	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_SMP \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
AnnaBridge	165:d1b4690b3f8b	809	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_SMP \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
AnnaBridge	165:d1b4690b3f8b	810	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_SMP \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
AnnaBridge	165:d1b4690b3f8b	811	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_SMP \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
AnnaBridge	165:d1b4690b3f8b	812	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_0 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. On STM32L4, ADC channel available only on ADC instance: ADC1. /
AnnaBridge	165:d1b4690b3f8b	813	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. On STM32L4, ADC channel available only on ADC instances: ADC1, ADC3. /
AnnaBridge	165:d1b4690b3f8b	814	#define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda. On STM32L4, ADC channel available only on ADC instances: ADC1, ADC3. /
AnnaBridge	165:d1b4690b3f8b	815	#if defined(ADC1) && !defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	816	#define LL_ADC_CHANNEL_DAC1CH1 (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC1. This channel is shared with ADC internal channel connected to temperature sensor, selection is done using function @ref LL_ADC_SetCommonPathInternalCh(). /
AnnaBridge	165:d1b4690b3f8b	817	#define LL_ADC_CHANNEL_DAC1CH2 (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC1. This channel is shared with ADC internal channel connected to Vbat, selection is done using function @ref LL_ADC_SetCommonPathInternalCh(). /
AnnaBridge	165:d1b4690b3f8b	818	#elif defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	819	#define LL_ADC_CHANNEL_DAC1CH1_ADC2 (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC2 /
AnnaBridge	165:d1b4690b3f8b	820	#define LL_ADC_CHANNEL_DAC1CH2_ADC2 (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC2 /
AnnaBridge	165:d1b4690b3f8b	821	#if defined(ADC3)
AnnaBridge	165:d1b4690b3f8b	822	#define LL_ADC_CHANNEL_DAC1CH1_ADC3 (LL_ADC_CHANNEL_14 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC3 /
AnnaBridge	165:d1b4690b3f8b	823	#define LL_ADC_CHANNEL_DAC1CH2_ADC3 (LL_ADC_CHANNEL_15 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC3 /
AnnaBridge	165:d1b4690b3f8b	824	#endif
AnnaBridge	165:d1b4690b3f8b	825	#endif
AnnaBridge	165:d1b4690b3f8b	826	/**
AnnaBridge	165:d1b4690b3f8b	827	* @}
AnnaBridge	165:d1b4690b3f8b	828	*/
AnnaBridge	165:d1b4690b3f8b	829
AnnaBridge	165:d1b4690b3f8b	830	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
AnnaBridge	165:d1b4690b3f8b	831	* @{
AnnaBridge	165:d1b4690b3f8b	832	*/
AnnaBridge	165:d1b4690b3f8b	833	#define LL_ADC_REG_TRIG_SOFTWARE (0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
AnnaBridge	165:d1b4690b3f8b	834	#define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	835	#define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 TRGO2. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	836	#define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	837	#define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	838	#define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 3 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	839	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	840	#define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	841	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	842	#define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	843	#define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM4 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	844	#define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM4 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	845	#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	846	#define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM8 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	847	#define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM8 TRGO2. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	848	#define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	849	#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: external interrupt line 11. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	850	/**
AnnaBridge	165:d1b4690b3f8b	851	* @}
AnnaBridge	165:d1b4690b3f8b	852	*/
AnnaBridge	165:d1b4690b3f8b	853
AnnaBridge	165:d1b4690b3f8b	854	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
AnnaBridge	165:d1b4690b3f8b	855	* @{
AnnaBridge	165:d1b4690b3f8b	856	*/
AnnaBridge	165:d1b4690b3f8b	857	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
AnnaBridge	165:d1b4690b3f8b	858	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
AnnaBridge	165:d1b4690b3f8b	859	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 \| ADC_CFGR_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
AnnaBridge	165:d1b4690b3f8b	860	/**
AnnaBridge	165:d1b4690b3f8b	861	* @}
AnnaBridge	165:d1b4690b3f8b	862	*/
AnnaBridge	165:d1b4690b3f8b	863
AnnaBridge	165:d1b4690b3f8b	864	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
AnnaBridge	165:d1b4690b3f8b	865	* @{
AnnaBridge	165:d1b4690b3f8b	866	*/
AnnaBridge	165:d1b4690b3f8b	867	#define LL_ADC_REG_CONV_SINGLE (0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
AnnaBridge	165:d1b4690b3f8b	868	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
AnnaBridge	165:d1b4690b3f8b	869	/**
AnnaBridge	165:d1b4690b3f8b	870	* @}
AnnaBridge	165:d1b4690b3f8b	871	*/
AnnaBridge	165:d1b4690b3f8b	872
AnnaBridge	165:d1b4690b3f8b	873	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
AnnaBridge	165:d1b4690b3f8b	874	* @{
AnnaBridge	165:d1b4690b3f8b	875	*/
AnnaBridge	165:d1b4690b3f8b	876	#define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000U) /!< ADC conversions are not transferred by DMA /
AnnaBridge	165:d1b4690b3f8b	877	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
AnnaBridge	165:d1b4690b3f8b	878	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG \| ADC_CFGR_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
AnnaBridge	165:d1b4690b3f8b	879	/**
AnnaBridge	165:d1b4690b3f8b	880	* @}
AnnaBridge	165:d1b4690b3f8b	881	*/
AnnaBridge	165:d1b4690b3f8b	882
AnnaBridge	165:d1b4690b3f8b	883	#if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
AnnaBridge	165:d1b4690b3f8b	884	/** @defgroup ADC_LL_EC_REG_DFSDM_TRANSFER ADC group regular - DFSDM transfer of ADC conversion data
AnnaBridge	165:d1b4690b3f8b	885	* @{
AnnaBridge	165:d1b4690b3f8b	886	*/
AnnaBridge	165:d1b4690b3f8b	887	#define LL_ADC_REG_DFSDM_TRANSFER_NONE (0x00000000U) /!< ADC conversions are not transferred by DFSDM. /
AnnaBridge	165:d1b4690b3f8b	888	#define LL_ADC_REG_DFSDM_TRANSFER_ENABLE (ADC_CFGR_DFSDMCFG) /!< ADC conversion data are transfered to DFSDM for post processing. The ADC conversion data format must be 16-bit signed and right aligned, refer to reference manual. DFSDM transfer cannot be used if DMA transfer is enabled. /
AnnaBridge	165:d1b4690b3f8b	889	/**
AnnaBridge	165:d1b4690b3f8b	890	* @}
AnnaBridge	165:d1b4690b3f8b	891	*/
AnnaBridge	165:d1b4690b3f8b	892	#endif
AnnaBridge	165:d1b4690b3f8b	893
AnnaBridge	165:d1b4690b3f8b	894	#if defined(ADC_SMPR1_SMPPLUS)
AnnaBridge	165:d1b4690b3f8b	895	/** @defgroup ADC_LL_EC_SAMPLINGTIME_COMMON_CONFIG ADC instance - ADC sampling time common configuration
AnnaBridge	165:d1b4690b3f8b	896	* @{
AnnaBridge	165:d1b4690b3f8b	897	*/
AnnaBridge	165:d1b4690b3f8b	898	#define LL_ADC_SAMPLINGTIME_COMMON_DEFAULT (0x00000000U) /!< ADC sampling time let to default settings. /
AnnaBridge	165:d1b4690b3f8b	899	#define LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 (ADC_SMPR1_SMPPLUS) /!< ADC additional sampling time 3.5 ADC clock cycles replacing 2.5 ADC clock cycles (this applies to all channels mapped with selection sampling time 2.5 ADC clock cycles, whatever channels mapped on ADC groups regular or injected). /
AnnaBridge	165:d1b4690b3f8b	900	/**
AnnaBridge	165:d1b4690b3f8b	901	* @}
AnnaBridge	165:d1b4690b3f8b	902	*/
AnnaBridge	165:d1b4690b3f8b	903	#endif
AnnaBridge	165:d1b4690b3f8b	904
AnnaBridge	165:d1b4690b3f8b	905	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
AnnaBridge	165:d1b4690b3f8b	906	* @{
AnnaBridge	165:d1b4690b3f8b	907	*/
AnnaBridge	165:d1b4690b3f8b	908	#define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000U) /!< ADC group regular behavior in case of overrun: data preserved /
AnnaBridge	165:d1b4690b3f8b	909	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
AnnaBridge	165:d1b4690b3f8b	910	/**
AnnaBridge	165:d1b4690b3f8b	911	* @}
AnnaBridge	165:d1b4690b3f8b	912	*/
AnnaBridge	165:d1b4690b3f8b	913
AnnaBridge	165:d1b4690b3f8b	914	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length
AnnaBridge	165:d1b4690b3f8b	915	* @{
AnnaBridge	165:d1b4690b3f8b	916	*/
AnnaBridge	165:d1b4690b3f8b	917	#define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000U) /!< ADC group regular sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) /
AnnaBridge	165:d1b4690b3f8b	918	#define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 2 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	919	#define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 3 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	920	#define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 4 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	921	#define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 ) /!< ADC group regular sequencer enable with 5 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	922	#define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 6 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	923	#define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 7 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	924	#define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 8 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	925	#define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 ) /!< ADC group regular sequencer enable with 9 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	926	#define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 10 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	927	#define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 11 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	928	#define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 12 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	929	#define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 ) /!< ADC group regular sequencer enable with 13 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	930	#define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 14 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	931	#define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 15 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	932	#define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 16 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	933	/**
AnnaBridge	165:d1b4690b3f8b	934	* @}
AnnaBridge	165:d1b4690b3f8b	935	*/
AnnaBridge	165:d1b4690b3f8b	936
AnnaBridge	165:d1b4690b3f8b	937	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
AnnaBridge	165:d1b4690b3f8b	938	* @{
AnnaBridge	165:d1b4690b3f8b	939	*/
AnnaBridge	165:d1b4690b3f8b	940	#define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
AnnaBridge	165:d1b4690b3f8b	941	#define LL_ADC_REG_SEQ_DISCONT_1RANK ( ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	165:d1b4690b3f8b	942	#define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enabled with sequence interruption every 2 ranks /
AnnaBridge	165:d1b4690b3f8b	943	#define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 3 ranks /
AnnaBridge	165:d1b4690b3f8b	944	#define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 4 ranks /
AnnaBridge	165:d1b4690b3f8b	945	#define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 5 ranks /
AnnaBridge	165:d1b4690b3f8b	946	#define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 6 ranks /
AnnaBridge	165:d1b4690b3f8b	947	#define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 7 ranks /
AnnaBridge	165:d1b4690b3f8b	948	#define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 8 ranks /
AnnaBridge	165:d1b4690b3f8b	949	/**
AnnaBridge	165:d1b4690b3f8b	950	* @}
AnnaBridge	165:d1b4690b3f8b	951	*/
AnnaBridge	165:d1b4690b3f8b	952
AnnaBridge	165:d1b4690b3f8b	953	/** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks
AnnaBridge	165:d1b4690b3f8b	954	* @{
AnnaBridge	165:d1b4690b3f8b	955	*/
AnnaBridge	165:d1b4690b3f8b	956	#define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_1_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 1 /
AnnaBridge	165:d1b4690b3f8b	957	#define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_2_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 2 /
AnnaBridge	165:d1b4690b3f8b	958	#define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_3_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 3 /
AnnaBridge	165:d1b4690b3f8b	959	#define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_4_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 4 /
AnnaBridge	165:d1b4690b3f8b	960	#define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_5_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 5 /
AnnaBridge	165:d1b4690b3f8b	961	#define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_6_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 6 /
AnnaBridge	165:d1b4690b3f8b	962	#define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_7_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 7 /
AnnaBridge	165:d1b4690b3f8b	963	#define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_8_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 8 /
AnnaBridge	165:d1b4690b3f8b	964	#define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_9_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 9 /
AnnaBridge	165:d1b4690b3f8b	965	#define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_10_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 10 /
AnnaBridge	165:d1b4690b3f8b	966	#define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_11_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 11 /
AnnaBridge	165:d1b4690b3f8b	967	#define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_12_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 12 /
AnnaBridge	165:d1b4690b3f8b	968	#define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_13_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 13 /
AnnaBridge	165:d1b4690b3f8b	969	#define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_14_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 14 /
AnnaBridge	165:d1b4690b3f8b	970	#define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET \| ADC_REG_RANK_15_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 15 /
AnnaBridge	165:d1b4690b3f8b	971	#define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET \| ADC_REG_RANK_16_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 16 /
AnnaBridge	165:d1b4690b3f8b	972	/**
AnnaBridge	165:d1b4690b3f8b	973	* @}
AnnaBridge	165:d1b4690b3f8b	974	*/
AnnaBridge	165:d1b4690b3f8b	975
AnnaBridge	165:d1b4690b3f8b	976	/** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source
AnnaBridge	165:d1b4690b3f8b	977	* @{
AnnaBridge	165:d1b4690b3f8b	978	*/
AnnaBridge	165:d1b4690b3f8b	979	#define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000U) /!< ADC group injected conversion trigger internal: SW start.. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	980	#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	981	#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 TRGO2. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	982	#define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	983	#define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	984	#define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM2 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	985	#define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	986	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	987	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 3 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	988	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	989	#define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM4 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	990	#define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	991	#define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	992	#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	993	#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 TRGO2. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	994	#define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	995	#define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: external interrupt line 15. Trigger edge set to rising edge (default setting). /
AnnaBridge	165:d1b4690b3f8b	996	/**
AnnaBridge	165:d1b4690b3f8b	997	* @}
AnnaBridge	165:d1b4690b3f8b	998	*/
AnnaBridge	165:d1b4690b3f8b	999
AnnaBridge	165:d1b4690b3f8b	1000	/** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge
AnnaBridge	165:d1b4690b3f8b	1001	* @{
AnnaBridge	165:d1b4690b3f8b	1002	*/
AnnaBridge	165:d1b4690b3f8b	1003	#define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /!< ADC group injected conversion trigger polarity set to rising edge /
AnnaBridge	165:d1b4690b3f8b	1004	#define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /!< ADC group injected conversion trigger polarity set to falling edge /
AnnaBridge	165:d1b4690b3f8b	1005	#define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 \| ADC_JSQR_JEXTEN_0) /!< ADC group injected conversion trigger polarity set to both rising and falling edges /
AnnaBridge	165:d1b4690b3f8b	1006	/**
AnnaBridge	165:d1b4690b3f8b	1007	* @}
AnnaBridge	165:d1b4690b3f8b	1008	*/
AnnaBridge	165:d1b4690b3f8b	1009
AnnaBridge	165:d1b4690b3f8b	1010	/** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode
AnnaBridge	165:d1b4690b3f8b	1011	* @{
AnnaBridge	165:d1b4690b3f8b	1012	*/
AnnaBridge	165:d1b4690b3f8b	1013	#define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000U) /!< ADC group injected conversion trigger independent. Setting mandatory if ADC group injected injected trigger source is set to an external trigger. /
AnnaBridge	165:d1b4690b3f8b	1014	#define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /!< ADC group injected conversion trigger from ADC group regular. Setting compliant only with group injected trigger source set to SW start, without any further action on ADC group injected conversion start or stop: in this case, ADC group injected is controlled only from ADC group regular. /
AnnaBridge	165:d1b4690b3f8b	1015	/**
AnnaBridge	165:d1b4690b3f8b	1016	* @}
AnnaBridge	165:d1b4690b3f8b	1017	*/
AnnaBridge	165:d1b4690b3f8b	1018
AnnaBridge	165:d1b4690b3f8b	1019	/** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode
AnnaBridge	165:d1b4690b3f8b	1020	* @{
AnnaBridge	165:d1b4690b3f8b	1021	*/
AnnaBridge	165:d1b4690b3f8b	1022	#define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000U) /* Group injected sequence context queue is enabled and can contain up to 2 contexts. When all contexts have been processed, the queue maintains the last context active perpetually. */
AnnaBridge	165:d1b4690b3f8b	1023	#define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence context queue is enabled and can contain up to 2 contexts. When all contexts have been processed, the queue is empty and injected group triggers are disabled. */
AnnaBridge	165:d1b4690b3f8b	1024	#define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence context queue is disabled: only 1 sequence can be configured and is active perpetually. */
AnnaBridge	165:d1b4690b3f8b	1025	/**
AnnaBridge	165:d1b4690b3f8b	1026	* @}
AnnaBridge	165:d1b4690b3f8b	1027	*/
AnnaBridge	165:d1b4690b3f8b	1028
AnnaBridge	165:d1b4690b3f8b	1029	/** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length
AnnaBridge	165:d1b4690b3f8b	1030	* @{
AnnaBridge	165:d1b4690b3f8b	1031	*/
AnnaBridge	165:d1b4690b3f8b	1032	#define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000U) /!< ADC group injected sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) /
AnnaBridge	165:d1b4690b3f8b	1033	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /!< ADC group injected sequencer enable with 2 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	1034	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /!< ADC group injected sequencer enable with 3 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	1035	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 \| ADC_JSQR_JL_0) /!< ADC group injected sequencer enable with 4 ranks in the sequence /
AnnaBridge	165:d1b4690b3f8b	1036	/**
AnnaBridge	165:d1b4690b3f8b	1037	* @}
AnnaBridge	165:d1b4690b3f8b	1038	*/
AnnaBridge	165:d1b4690b3f8b	1039
AnnaBridge	165:d1b4690b3f8b	1040	/** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode
AnnaBridge	165:d1b4690b3f8b	1041	* @{
AnnaBridge	165:d1b4690b3f8b	1042	*/
AnnaBridge	165:d1b4690b3f8b	1043	#define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000U) /!< ADC group injected sequencer discontinuous mode disable /
AnnaBridge	165:d1b4690b3f8b	1044	#define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /!< ADC group injected sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	165:d1b4690b3f8b	1045	/**
AnnaBridge	165:d1b4690b3f8b	1046	* @}
AnnaBridge	165:d1b4690b3f8b	1047	*/
AnnaBridge	165:d1b4690b3f8b	1048
AnnaBridge	165:d1b4690b3f8b	1049	/** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks
AnnaBridge	165:d1b4690b3f8b	1050	* @{
AnnaBridge	165:d1b4690b3f8b	1051	*/
AnnaBridge	165:d1b4690b3f8b	1052	#define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET \| ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 1 /
AnnaBridge	165:d1b4690b3f8b	1053	#define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET \| ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 2 /
AnnaBridge	165:d1b4690b3f8b	1054	#define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET \| ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 3 /
AnnaBridge	165:d1b4690b3f8b	1055	#define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET \| ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 4 /
AnnaBridge	165:d1b4690b3f8b	1056	/**
AnnaBridge	165:d1b4690b3f8b	1057	* @}
AnnaBridge	165:d1b4690b3f8b	1058	*/
AnnaBridge	165:d1b4690b3f8b	1059
AnnaBridge	165:d1b4690b3f8b	1060	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
AnnaBridge	165:d1b4690b3f8b	1061	* @{
AnnaBridge	165:d1b4690b3f8b	1062	*/
AnnaBridge	165:d1b4690b3f8b	1063	#define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000U) /!< Sampling time 2.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1064	#define LL_ADC_SAMPLINGTIME_6CYCLES_5 ( ADC_SMPR2_SMP10_0) /!< Sampling time 6.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1065	#define LL_ADC_SAMPLINGTIME_12CYCLES_5 ( ADC_SMPR2_SMP10_1 ) /!< Sampling time 12.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1066	#define LL_ADC_SAMPLINGTIME_24CYCLES_5 ( ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0) /!< Sampling time 24.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1067	#define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2 ) /!< Sampling time 47.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1068	#define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_0) /!< Sampling time 92.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1069	#define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1 ) /!< Sampling time 247.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1070	#define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0) /!< Sampling time 640.5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1071	/**
AnnaBridge	165:d1b4690b3f8b	1072	* @}
AnnaBridge	165:d1b4690b3f8b	1073	*/
AnnaBridge	165:d1b4690b3f8b	1074
AnnaBridge	165:d1b4690b3f8b	1075	/** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending
AnnaBridge	165:d1b4690b3f8b	1076	* @{
AnnaBridge	165:d1b4690b3f8b	1077	*/
AnnaBridge	165:d1b4690b3f8b	1078	#define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /!< ADC channel ending set to single ended (literal also used to set calibration mode) /
AnnaBridge	165:d1b4690b3f8b	1079	#define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF \| ADC_CALFACT_CALFACT_D) /!< ADC channel ending set to differential (literal also used to set calibration mode) /
AnnaBridge	165:d1b4690b3f8b	1080	#define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED \| LL_ADC_DIFFERENTIAL_ENDED) /!< ADC channel ending set to both single ended and differential (literal used only to set calibration factors) /
AnnaBridge	165:d1b4690b3f8b	1081	/**
AnnaBridge	165:d1b4690b3f8b	1082	* @}
AnnaBridge	165:d1b4690b3f8b	1083	*/
AnnaBridge	165:d1b4690b3f8b	1084
AnnaBridge	165:d1b4690b3f8b	1085	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
AnnaBridge	165:d1b4690b3f8b	1086	* @{
AnnaBridge	165:d1b4690b3f8b	1087	*/
AnnaBridge	165:d1b4690b3f8b	1088	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
AnnaBridge	165:d1b4690b3f8b	1089	#define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK \| ADC_AWD_CR2_REGOFFSET) /!< ADC analog watchdog number 2 /
AnnaBridge	165:d1b4690b3f8b	1090	#define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK \| ADC_AWD_CR3_REGOFFSET) /!< ADC analog watchdog number 3 /
AnnaBridge	165:d1b4690b3f8b	1091	/**
AnnaBridge	165:d1b4690b3f8b	1092	* @}
AnnaBridge	165:d1b4690b3f8b	1093	*/
AnnaBridge	165:d1b4690b3f8b	1094
AnnaBridge	165:d1b4690b3f8b	1095	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
AnnaBridge	165:d1b4690b3f8b	1096	* @{
AnnaBridge	165:d1b4690b3f8b	1097	*/
AnnaBridge	165:d1b4690b3f8b	1098	#define LL_ADC_AWD_DISABLE (0x00000000U) /!< ADC analog watchdog monitoring disabled /
AnnaBridge	165:d1b4690b3f8b	1099	#define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_AWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1100	#define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_JAWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1101	#define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1102	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1103	#define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1104	#define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1105	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1106	#define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1107	#define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1108	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1109	#define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1110	#define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1111	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1112	#define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1113	#define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1114	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1115	#define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1116	#define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1117	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1118	#define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1119	#define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1120	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1121	#define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1122	#define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1123	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1124	#define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1125	#define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1126	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1127	#define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1128	#define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1129	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1130	#define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1131	#define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1132	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1133	#define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1134	#define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1135	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1136	#define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1137	#define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1138	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1139	#define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1140	#define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1141	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1142	#define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1143	#define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1144	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1145	#define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1146	#define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1147	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1148	#define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1149	#define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1150	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1151	#define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1152	#define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1153	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1154	#define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1155	#define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1156	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1157	#define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1158	#define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1159	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1160	#define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1161	#define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1162	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1163	#define LL_ADC_AWD_CH_TEMPSENSOR_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1164	#define LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1165	#define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1166	#define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1167	#define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda /
AnnaBridge	165:d1b4690b3f8b	1168	#if defined(ADC1) && !defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	1169	#define LL_ADC_AWD_CH_DAC1CH1_REG ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1170	#define LL_ADC_AWD_CH_DAC1CH1_INJ ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1171	#define LL_ADC_AWD_CH_DAC1CH1_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1172	#define LL_ADC_AWD_CH_DAC1CH2_REG ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1173	#define LL_ADC_AWD_CH_DAC1CH2_INJ ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1174	#define LL_ADC_AWD_CH_DAC1CH2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1175	#elif defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	1176	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1177	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1178	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1179	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1180	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1181	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1182	#if defined(ADC3)
AnnaBridge	165:d1b4690b3f8b	1183	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_REG ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1184	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1185	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1186	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_REG ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group regular only /
AnnaBridge	165:d1b4690b3f8b	1187	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group injected only /
AnnaBridge	165:d1b4690b3f8b	1188	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by either group regular or injected /
AnnaBridge	165:d1b4690b3f8b	1189	#endif
AnnaBridge	165:d1b4690b3f8b	1190	#endif
AnnaBridge	165:d1b4690b3f8b	1191	/**
AnnaBridge	165:d1b4690b3f8b	1192	* @}
AnnaBridge	165:d1b4690b3f8b	1193	*/
AnnaBridge	165:d1b4690b3f8b	1194
AnnaBridge	165:d1b4690b3f8b	1195	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
AnnaBridge	165:d1b4690b3f8b	1196	* @{
AnnaBridge	165:d1b4690b3f8b	1197	*/
AnnaBridge	165:d1b4690b3f8b	1198	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1 ) /!< ADC analog watchdog threshold high /
AnnaBridge	165:d1b4690b3f8b	1199	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR1_LT1) /!< ADC analog watchdog threshold low /
AnnaBridge	165:d1b4690b3f8b	1200	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 \| ADC_TR1_LT1) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
AnnaBridge	165:d1b4690b3f8b	1201	/**
AnnaBridge	165:d1b4690b3f8b	1202	* @}
AnnaBridge	165:d1b4690b3f8b	1203	*/
AnnaBridge	165:d1b4690b3f8b	1204
AnnaBridge	165:d1b4690b3f8b	1205	/** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
AnnaBridge	165:d1b4690b3f8b	1206	* @{
AnnaBridge	165:d1b4690b3f8b	1207	*/
AnnaBridge	165:d1b4690b3f8b	1208	#define LL_ADC_OVS_DISABLE (0x00000000U) /!< ADC oversampling disabled. /
AnnaBridge	165:d1b4690b3f8b	1209	#define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of ADC group regular. If group injected interrupts group regular: when ADC group injected is triggered, the oversampling on ADC group regular is temporary stopped and continued afterwards. /
AnnaBridge	165:d1b4690b3f8b	1210	#define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM \| ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of ADC group regular. If group injected interrupts group regular: when ADC group injected is triggered, the oversampling on ADC group regular is resumed from start (oversampler buffer reset). /
AnnaBridge	165:d1b4690b3f8b	1211	#define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /!< ADC oversampling on conversions of ADC group injected. /
AnnaBridge	165:d1b4690b3f8b	1212	#define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of both ADC groups regular and injected. If group injected interrupting group regular: when ADC group injected is triggered, the oversampling on ADC group regular is resumed from start (oversampler buffer reset). /
AnnaBridge	165:d1b4690b3f8b	1213	/**
AnnaBridge	165:d1b4690b3f8b	1214	* @}
AnnaBridge	165:d1b4690b3f8b	1215	*/
AnnaBridge	165:d1b4690b3f8b	1216
AnnaBridge	165:d1b4690b3f8b	1217	/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
AnnaBridge	165:d1b4690b3f8b	1218	* @{
AnnaBridge	165:d1b4690b3f8b	1219	*/
AnnaBridge	165:d1b4690b3f8b	1220	#define LL_ADC_OVS_REG_CONT (0x00000000U) /!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) /
AnnaBridge	165:d1b4690b3f8b	1221	#define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) /
AnnaBridge	165:d1b4690b3f8b	1222	/**
AnnaBridge	165:d1b4690b3f8b	1223	* @}
AnnaBridge	165:d1b4690b3f8b	1224	*/
AnnaBridge	165:d1b4690b3f8b	1225
AnnaBridge	165:d1b4690b3f8b	1226	/** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
AnnaBridge	165:d1b4690b3f8b	1227	* @{
AnnaBridge	165:d1b4690b3f8b	1228	*/
AnnaBridge	165:d1b4690b3f8b	1229	#define LL_ADC_OVS_RATIO_2 (0x00000000U) /!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1230	#define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1231	#define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1232	#define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1233	#define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) /!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1234	#define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1235	#define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1236	#define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	165:d1b4690b3f8b	1237	/**
AnnaBridge	165:d1b4690b3f8b	1238	* @}
AnnaBridge	165:d1b4690b3f8b	1239	*/
AnnaBridge	165:d1b4690b3f8b	1240
AnnaBridge	165:d1b4690b3f8b	1241	/** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
AnnaBridge	165:d1b4690b3f8b	1242	* @{
AnnaBridge	165:d1b4690b3f8b	1243	*/
AnnaBridge	165:d1b4690b3f8b	1244	#define LL_ADC_OVS_SHIFT_NONE (0x00000000U) /!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1245	#define LL_ADC_OVS_SHIFT_RIGHT_1 ( ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1246	#define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1247	#define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1248	#define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 ) /!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1249	#define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1250	#define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1251	#define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1252	#define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 ) /!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) /
AnnaBridge	165:d1b4690b3f8b	1253	/**
AnnaBridge	165:d1b4690b3f8b	1254	* @}
AnnaBridge	165:d1b4690b3f8b	1255	*/
AnnaBridge	165:d1b4690b3f8b	1256
AnnaBridge	165:d1b4690b3f8b	1257	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	1258	/** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode
AnnaBridge	165:d1b4690b3f8b	1259	* @{
AnnaBridge	165:d1b4690b3f8b	1260	*/
AnnaBridge	165:d1b4690b3f8b	1261	#define LL_ADC_MULTI_INDEPENDENT (0x00000000U) /!< ADC dual mode disabled (ADC independent mode) /
AnnaBridge	165:d1b4690b3f8b	1262	#define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1 ) /!< ADC dual mode enabled: group regular simultaneous /
AnnaBridge	165:d1b4690b3f8b	1263	#define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular interleaved /
AnnaBridge	165:d1b4690b3f8b	1264	#define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: group injected simultaneous /
AnnaBridge	165:d1b4690b3f8b	1265	#define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (not internal SW start) /
AnnaBridge	165:d1b4690b3f8b	1266	#define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular simultaneous + group injected simultaneous /
AnnaBridge	165:d1b4690b3f8b	1267	#define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1 ) /!< ADC dual mode enabled: Combined group regular simultaneous + group injected alternate trigger /
AnnaBridge	165:d1b4690b3f8b	1268	#define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular interleaved + group injected simultaneous /
AnnaBridge	165:d1b4690b3f8b	1269	/**
AnnaBridge	165:d1b4690b3f8b	1270	* @}
AnnaBridge	165:d1b4690b3f8b	1271	*/
AnnaBridge	165:d1b4690b3f8b	1272
AnnaBridge	165:d1b4690b3f8b	1273	/** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer
AnnaBridge	165:d1b4690b3f8b	1274	* @{
AnnaBridge	165:d1b4690b3f8b	1275	*/
AnnaBridge	165:d1b4690b3f8b	1276	#define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000U) /!< ADC multimode group regular conversions are transferred by DMA: each ADC uses its own DMA channel, with its individual DMA transfer settings /
AnnaBridge	165:d1b4690b3f8b	1277	#define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B ( ADC_CCR_MDMA_1 ) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. Setting for ADC resolution of 12 and 10 bits /
AnnaBridge	165:d1b4690b3f8b	1278	#define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ( ADC_CCR_MDMA_1 \| ADC_CCR_MDMA_0) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. Setting for ADC resolution of 8 and 6 bits /
AnnaBridge	165:d1b4690b3f8b	1279	#define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG \| ADC_CCR_MDMA_1 ) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. Setting for ADC resolution of 12 and 10 bits /
AnnaBridge	165:d1b4690b3f8b	1280	#define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG \| ADC_CCR_MDMA_1 \| ADC_CCR_MDMA_0) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. Setting for ADC resolution of 8 and 6 bits /
AnnaBridge	165:d1b4690b3f8b	1281	/**
AnnaBridge	165:d1b4690b3f8b	1282	* @}
AnnaBridge	165:d1b4690b3f8b	1283	*/
AnnaBridge	165:d1b4690b3f8b	1284
AnnaBridge	165:d1b4690b3f8b	1285	/** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases
AnnaBridge	165:d1b4690b3f8b	1286	* @{
AnnaBridge	165:d1b4690b3f8b	1287	*/
AnnaBridge	165:d1b4690b3f8b	1288	#define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE (0x00000000U) /!< ADC multimode delay between two sampling phases: 1 ADC clock cycle /
AnnaBridge	165:d1b4690b3f8b	1289	#define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES ( ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 2 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1290	#define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ( ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 3 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1291	#define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES ( ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 4 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1292	#define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES ( ADC_CCR_DELAY_2 ) /!< ADC multimode delay between two sampling phases: 5 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1293	#define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 6 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1294	#define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 7 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1295	#define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 8 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1296	#define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 ) /!< ADC multimode delay between two sampling phases: 9 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1297	#define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 10 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1298	#define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 11 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1299	#define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 12 ADC clock cycles /
AnnaBridge	165:d1b4690b3f8b	1300	/**
AnnaBridge	165:d1b4690b3f8b	1301	* @}
AnnaBridge	165:d1b4690b3f8b	1302	*/
AnnaBridge	165:d1b4690b3f8b	1303
AnnaBridge	165:d1b4690b3f8b	1304	/** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave
AnnaBridge	165:d1b4690b3f8b	1305	* @{
AnnaBridge	165:d1b4690b3f8b	1306	*/
AnnaBridge	165:d1b4690b3f8b	1307	#define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /!< In multimode, selection among several ADC instances: ADC master /
AnnaBridge	165:d1b4690b3f8b	1308	#define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /!< In multimode, selection among several ADC instances: ADC slave /
AnnaBridge	165:d1b4690b3f8b	1309	#define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV \| ADC_CDR_RDATA_MST) /!< In multimode, selection among several ADC instances: both ADC master and ADC slave /
AnnaBridge	165:d1b4690b3f8b	1310	/**
AnnaBridge	165:d1b4690b3f8b	1311	* @}
AnnaBridge	165:d1b4690b3f8b	1312	*/
AnnaBridge	165:d1b4690b3f8b	1313
AnnaBridge	165:d1b4690b3f8b	1314	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	165:d1b4690b3f8b	1315
AnnaBridge	165:d1b4690b3f8b	1316	/** @defgroup ADC_LL_EC_LEGACY ADC literals legacy naming
AnnaBridge	165:d1b4690b3f8b	1317	* @{
AnnaBridge	165:d1b4690b3f8b	1318	*/
AnnaBridge	165:d1b4690b3f8b	1319	#define LL_ADC_REG_TRIG_SW_START (LL_ADC_REG_TRIG_SOFTWARE)
AnnaBridge	165:d1b4690b3f8b	1320	#define LL_ADC_REG_TRIG_EXT_TIM1_CC1 (LL_ADC_REG_TRIG_EXT_TIM1_CH1)
AnnaBridge	165:d1b4690b3f8b	1321	#define LL_ADC_REG_TRIG_EXT_TIM1_CC2 (LL_ADC_REG_TRIG_EXT_TIM1_CH2)
AnnaBridge	165:d1b4690b3f8b	1322	#define LL_ADC_REG_TRIG_EXT_TIM1_CC3 (LL_ADC_REG_TRIG_EXT_TIM1_CH3)
AnnaBridge	165:d1b4690b3f8b	1323	#define LL_ADC_REG_TRIG_EXT_TIM2_CC2 (LL_ADC_REG_TRIG_EXT_TIM2_CH2)
AnnaBridge	165:d1b4690b3f8b	1324	#define LL_ADC_REG_TRIG_EXT_TIM3_CC4 (LL_ADC_REG_TRIG_EXT_TIM3_CH4)
AnnaBridge	165:d1b4690b3f8b	1325	#define LL_ADC_REG_TRIG_EXT_TIM4_CC4 (LL_ADC_REG_TRIG_EXT_TIM4_CH4)
AnnaBridge	165:d1b4690b3f8b	1326
AnnaBridge	165:d1b4690b3f8b	1327	#define LL_ADC_INJ_TRIG_SW_START (LL_ADC_INJ_TRIG_SOFTWARE)
AnnaBridge	165:d1b4690b3f8b	1328	#define LL_ADC_INJ_TRIG_EXT_TIM1_CC4 (LL_ADC_INJ_TRIG_EXT_TIM1_CH4)
AnnaBridge	165:d1b4690b3f8b	1329	#define LL_ADC_INJ_TRIG_EXT_TIM2_CC1 (LL_ADC_INJ_TRIG_EXT_TIM2_CH1)
AnnaBridge	165:d1b4690b3f8b	1330	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC1 (LL_ADC_INJ_TRIG_EXT_TIM3_CH1)
AnnaBridge	165:d1b4690b3f8b	1331	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC3 (LL_ADC_INJ_TRIG_EXT_TIM3_CH3)
AnnaBridge	165:d1b4690b3f8b	1332	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC4 (LL_ADC_INJ_TRIG_EXT_TIM3_CH4)
AnnaBridge	165:d1b4690b3f8b	1333	#define LL_ADC_INJ_TRIG_EXT_TIM8_CC4 (LL_ADC_INJ_TRIG_EXT_TIM8_CH4)
AnnaBridge	165:d1b4690b3f8b	1334
AnnaBridge	165:d1b4690b3f8b	1335	#define LL_ADC_OVS_DATA_SHIFT_NONE (LL_ADC_OVS_SHIFT_NONE)
AnnaBridge	165:d1b4690b3f8b	1336	#define LL_ADC_OVS_DATA_SHIFT_1 (LL_ADC_OVS_SHIFT_RIGHT_1)
AnnaBridge	165:d1b4690b3f8b	1337	#define LL_ADC_OVS_DATA_SHIFT_2 (LL_ADC_OVS_SHIFT_RIGHT_2)
AnnaBridge	165:d1b4690b3f8b	1338	#define LL_ADC_OVS_DATA_SHIFT_3 (LL_ADC_OVS_SHIFT_RIGHT_3)
AnnaBridge	165:d1b4690b3f8b	1339	#define LL_ADC_OVS_DATA_SHIFT_4 (LL_ADC_OVS_SHIFT_RIGHT_4)
AnnaBridge	165:d1b4690b3f8b	1340	#define LL_ADC_OVS_DATA_SHIFT_5 (LL_ADC_OVS_SHIFT_RIGHT_5)
AnnaBridge	165:d1b4690b3f8b	1341	#define LL_ADC_OVS_DATA_SHIFT_6 (LL_ADC_OVS_SHIFT_RIGHT_6)
AnnaBridge	165:d1b4690b3f8b	1342	#define LL_ADC_OVS_DATA_SHIFT_7 (LL_ADC_OVS_SHIFT_RIGHT_7)
AnnaBridge	165:d1b4690b3f8b	1343	#define LL_ADC_OVS_DATA_SHIFT_8 (LL_ADC_OVS_SHIFT_RIGHT_8)
AnnaBridge	165:d1b4690b3f8b	1344
AnnaBridge	165:d1b4690b3f8b	1345	/**
AnnaBridge	165:d1b4690b3f8b	1346	* @}
AnnaBridge	165:d1b4690b3f8b	1347	*/
AnnaBridge	165:d1b4690b3f8b	1348
AnnaBridge	165:d1b4690b3f8b	1349
AnnaBridge	165:d1b4690b3f8b	1350	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
AnnaBridge	165:d1b4690b3f8b	1351	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
AnnaBridge	165:d1b4690b3f8b	1352	* not timeout values.
AnnaBridge	165:d1b4690b3f8b	1353	* For details on delays values, refer to descriptions in source code
AnnaBridge	165:d1b4690b3f8b	1354	* above each literal definition.
AnnaBridge	165:d1b4690b3f8b	1355	* @{
AnnaBridge	165:d1b4690b3f8b	1356	*/
AnnaBridge	165:d1b4690b3f8b	1357
AnnaBridge	165:d1b4690b3f8b	1358	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
AnnaBridge	165:d1b4690b3f8b	1359	/* not timeout values. */
AnnaBridge	165:d1b4690b3f8b	1360	/* Timeout values for ADC operations are dependent to device clock */
AnnaBridge	165:d1b4690b3f8b	1361	/* configuration (system clock versus ADC clock), */
AnnaBridge	165:d1b4690b3f8b	1362	/* and therefore must be defined in user application. */
AnnaBridge	165:d1b4690b3f8b	1363	/* Indications for estimation of ADC timeout delays, for this */
AnnaBridge	165:d1b4690b3f8b	1364	/* STM32 serie: */
AnnaBridge	165:d1b4690b3f8b	1365	/* - ADC calibration time: maximum delay is 112/fADC. */
AnnaBridge	165:d1b4690b3f8b	1366	/* (refer to device datasheet, parameter "tCAL") */
AnnaBridge	165:d1b4690b3f8b	1367	/* - ADC enable time: maximum delay is 1 conversion cycle. */
AnnaBridge	165:d1b4690b3f8b	1368	/* (refer to device datasheet, parameter "tSTAB") */
AnnaBridge	165:d1b4690b3f8b	1369	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
AnnaBridge	165:d1b4690b3f8b	1370	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
AnnaBridge	165:d1b4690b3f8b	1371	/* cycles */
AnnaBridge	165:d1b4690b3f8b	1372	/* - ADC conversion time: duration depending on ADC clock and ADC */
AnnaBridge	165:d1b4690b3f8b	1373	/* configuration. */
AnnaBridge	165:d1b4690b3f8b	1374	/* (refer to device reference manual, section "Timing") */
AnnaBridge	165:d1b4690b3f8b	1375
AnnaBridge	165:d1b4690b3f8b	1376	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
AnnaBridge	165:d1b4690b3f8b	1377	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	165:d1b4690b3f8b	1378	/* parameter "tADCVREG_STUP"). */
AnnaBridge	165:d1b4690b3f8b	1379	/* Unit: us */
AnnaBridge	165:d1b4690b3f8b	1380	#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 10U) /!< Delay for ADC stabilization time (ADC voltage regulator start-up time) /
AnnaBridge	165:d1b4690b3f8b	1381
AnnaBridge	165:d1b4690b3f8b	1382	/* Delay for internal voltage reference stabilization time. */
AnnaBridge	165:d1b4690b3f8b	1383	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	165:d1b4690b3f8b	1384	/* parameter "tstart_vrefint"). */
AnnaBridge	165:d1b4690b3f8b	1385	/* Unit: us */
AnnaBridge	165:d1b4690b3f8b	1386	#define LL_ADC_DELAY_VREFINT_STAB_US ( 12U) /!< Delay for internal voltage reference stabilization time /
AnnaBridge	165:d1b4690b3f8b	1387
AnnaBridge	165:d1b4690b3f8b	1388	/* Delay for temperature sensor stabilization time. */
AnnaBridge	165:d1b4690b3f8b	1389	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	165:d1b4690b3f8b	1390	/* parameter "tSTART"). */
AnnaBridge	165:d1b4690b3f8b	1391	/* Unit: us */
AnnaBridge	165:d1b4690b3f8b	1392	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ( 120U) /!< Delay for temperature sensor stabilization time /
AnnaBridge	165:d1b4690b3f8b	1393
AnnaBridge	165:d1b4690b3f8b	1394	/* Delay required between ADC end of calibration and ADC enable. */
AnnaBridge	165:d1b4690b3f8b	1395	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
AnnaBridge	165:d1b4690b3f8b	1396	/* are required between ADC end of calibration and ADC enable. */
AnnaBridge	165:d1b4690b3f8b	1397	/* Wait time can be computed in user application by waiting for the */
AnnaBridge	165:d1b4690b3f8b	1398	/* equivalent number of CPU cycles, by taking into account */
AnnaBridge	165:d1b4690b3f8b	1399	/* ratio of CPU clock versus ADC clock prescalers. */
AnnaBridge	165:d1b4690b3f8b	1400	/* Unit: ADC clock cycles. */
AnnaBridge	165:d1b4690b3f8b	1401	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4U) /!< Delay required between ADC end of calibration and ADC enable /
AnnaBridge	165:d1b4690b3f8b	1402
AnnaBridge	165:d1b4690b3f8b	1403	/**
AnnaBridge	165:d1b4690b3f8b	1404	* @}
AnnaBridge	165:d1b4690b3f8b	1405	*/
AnnaBridge	165:d1b4690b3f8b	1406
AnnaBridge	165:d1b4690b3f8b	1407	/**
AnnaBridge	165:d1b4690b3f8b	1408	* @}
AnnaBridge	165:d1b4690b3f8b	1409	*/
AnnaBridge	165:d1b4690b3f8b	1410
AnnaBridge	165:d1b4690b3f8b	1411
AnnaBridge	165:d1b4690b3f8b	1412	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	1413	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
AnnaBridge	165:d1b4690b3f8b	1414	* @{
AnnaBridge	165:d1b4690b3f8b	1415	*/
AnnaBridge	165:d1b4690b3f8b	1416
AnnaBridge	165:d1b4690b3f8b	1417	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge	165:d1b4690b3f8b	1418	* @{
AnnaBridge	165:d1b4690b3f8b	1419	*/
AnnaBridge	165:d1b4690b3f8b	1420
AnnaBridge	165:d1b4690b3f8b	1421	/**
AnnaBridge	165:d1b4690b3f8b	1422	* @brief Write a value in ADC register
AnnaBridge	165:d1b4690b3f8b	1423	* @param __INSTANCE__ ADC Instance
AnnaBridge	165:d1b4690b3f8b	1424	* @param __REG__ Register to be written
AnnaBridge	165:d1b4690b3f8b	1425	* @param __VALUE__ Value to be written in the register
AnnaBridge	165:d1b4690b3f8b	1426	* @retval None
AnnaBridge	165:d1b4690b3f8b	1427	*/
AnnaBridge	165:d1b4690b3f8b	1428	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	165:d1b4690b3f8b	1429
AnnaBridge	165:d1b4690b3f8b	1430	/**
AnnaBridge	165:d1b4690b3f8b	1431	* @brief Read a value in ADC register
AnnaBridge	165:d1b4690b3f8b	1432	* @param __INSTANCE__ ADC Instance
AnnaBridge	165:d1b4690b3f8b	1433	* @param __REG__ Register to be read
AnnaBridge	165:d1b4690b3f8b	1434	* @retval Register value
AnnaBridge	165:d1b4690b3f8b	1435	*/
AnnaBridge	165:d1b4690b3f8b	1436	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	165:d1b4690b3f8b	1437	/**
AnnaBridge	165:d1b4690b3f8b	1438	* @}
AnnaBridge	165:d1b4690b3f8b	1439	*/
AnnaBridge	165:d1b4690b3f8b	1440
AnnaBridge	165:d1b4690b3f8b	1441	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
AnnaBridge	165:d1b4690b3f8b	1442	* @{
AnnaBridge	165:d1b4690b3f8b	1443	*/
AnnaBridge	165:d1b4690b3f8b	1444
AnnaBridge	165:d1b4690b3f8b	1445	/**
AnnaBridge	165:d1b4690b3f8b	1446	* @brief Helper macro to get ADC channel number in decimal format
AnnaBridge	165:d1b4690b3f8b	1447	* from literals LL_ADC_CHANNEL_x.
AnnaBridge	165:d1b4690b3f8b	1448	* @note Example:
AnnaBridge	165:d1b4690b3f8b	1449	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
AnnaBridge	165:d1b4690b3f8b	1450	* will return decimal number "4".
AnnaBridge	165:d1b4690b3f8b	1451	* @note The input can be a value from functions where a channel
AnnaBridge	165:d1b4690b3f8b	1452	* number is returned, either defined with number
AnnaBridge	165:d1b4690b3f8b	1453	* or with bitfield (only one bit must be set).
AnnaBridge	165:d1b4690b3f8b	1454	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1455	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1456	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	1457	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	1458	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	1459	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	1460	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	1461	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1462	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1463	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1464	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1465	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1466	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1467	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1468	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1469	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1470	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1471	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1472	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1473	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1474	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1475	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1476	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1477	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1478	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1479	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1480	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1481	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1482	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1483	*
AnnaBridge	165:d1b4690b3f8b	1484	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1485	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1486	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1487	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1488	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1489	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	1490	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1491	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1492	* @retval Value between Min_Data=0 and Max_Data=18
AnnaBridge	165:d1b4690b3f8b	1493	*/
AnnaBridge	165:d1b4690b3f8b	1494	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1495	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	165:d1b4690b3f8b	1496	? ( \
AnnaBridge	165:d1b4690b3f8b	1497	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	165:d1b4690b3f8b	1498	) \
AnnaBridge	165:d1b4690b3f8b	1499	: \
AnnaBridge	165:d1b4690b3f8b	1500	( \
AnnaBridge	165:d1b4690b3f8b	1501	POSITION_VAL((__CHANNEL__)) \
AnnaBridge	165:d1b4690b3f8b	1502	) \
AnnaBridge	165:d1b4690b3f8b	1503	)
AnnaBridge	165:d1b4690b3f8b	1504
AnnaBridge	165:d1b4690b3f8b	1505	/**
AnnaBridge	165:d1b4690b3f8b	1506	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
AnnaBridge	165:d1b4690b3f8b	1507	* from number in decimal format.
AnnaBridge	165:d1b4690b3f8b	1508	* @note Example:
AnnaBridge	165:d1b4690b3f8b	1509	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
AnnaBridge	165:d1b4690b3f8b	1510	* will return a data equivalent to "LL_ADC_CHANNEL_4".
AnnaBridge	165:d1b4690b3f8b	1511	* @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18
AnnaBridge	165:d1b4690b3f8b	1512	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1513	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1514	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	1515	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	1516	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	1517	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	1518	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	1519	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1520	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1521	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1522	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1523	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1524	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1525	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1526	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1527	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1528	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1529	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1530	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1531	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1532	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1533	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1534	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1535	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1536	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1537	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1538	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1539	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1540	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1541	*
AnnaBridge	165:d1b4690b3f8b	1542	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1543	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1544	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1545	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1546	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1547	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	1548	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1549	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
AnnaBridge	165:d1b4690b3f8b	1550	* (1, 2, 3, 4) For ADC channel read back from ADC register,
AnnaBridge	165:d1b4690b3f8b	1551	* comparison with internal channel parameter to be done
AnnaBridge	165:d1b4690b3f8b	1552	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	165:d1b4690b3f8b	1553	*/
AnnaBridge	165:d1b4690b3f8b	1554	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	165:d1b4690b3f8b	1555	(((__DECIMAL_NB__) <= 9U) \
AnnaBridge	165:d1b4690b3f8b	1556	? ( \
AnnaBridge	165:d1b4690b3f8b	1557	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	165:d1b4690b3f8b	1558	(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) \| \
AnnaBridge	165:d1b4690b3f8b	1559	(ADC_SMPR1_REGOFFSET \| (((uint32_t) (3U * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) \
AnnaBridge	165:d1b4690b3f8b	1560	) \
AnnaBridge	165:d1b4690b3f8b	1561	: \
AnnaBridge	165:d1b4690b3f8b	1562	( \
AnnaBridge	165:d1b4690b3f8b	1563	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	165:d1b4690b3f8b	1564	(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) \| \
AnnaBridge	165:d1b4690b3f8b	1565	(ADC_SMPR2_REGOFFSET \| (((uint32_t) (3U * ((__DECIMAL_NB__) - 10U))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) \
AnnaBridge	165:d1b4690b3f8b	1566	) \
AnnaBridge	165:d1b4690b3f8b	1567	)
AnnaBridge	165:d1b4690b3f8b	1568
AnnaBridge	165:d1b4690b3f8b	1569	/**
AnnaBridge	165:d1b4690b3f8b	1570	* @brief Helper macro to determine whether the selected channel
AnnaBridge	165:d1b4690b3f8b	1571	* corresponds to literal definitions of driver.
AnnaBridge	165:d1b4690b3f8b	1572	* @note The different literal definitions of ADC channels are:
AnnaBridge	165:d1b4690b3f8b	1573	* - ADC internal channel:
AnnaBridge	165:d1b4690b3f8b	1574	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
AnnaBridge	165:d1b4690b3f8b	1575	* - ADC external channel (channel connected to a GPIO pin):
AnnaBridge	165:d1b4690b3f8b	1576	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
AnnaBridge	165:d1b4690b3f8b	1577	* @note The channel parameter must be a value defined from literal
AnnaBridge	165:d1b4690b3f8b	1578	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	165:d1b4690b3f8b	1579	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	165:d1b4690b3f8b	1580	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
AnnaBridge	165:d1b4690b3f8b	1581	* must not be a value from functions where a channel number is
AnnaBridge	165:d1b4690b3f8b	1582	* returned from ADC registers,
AnnaBridge	165:d1b4690b3f8b	1583	* because internal and external channels share the same channel
AnnaBridge	165:d1b4690b3f8b	1584	* number in ADC registers. The differentiation is made only with
AnnaBridge	165:d1b4690b3f8b	1585	* parameters definitions of driver.
AnnaBridge	165:d1b4690b3f8b	1586	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1587	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1588	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	1589	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	1590	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	1591	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	1592	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	1593	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1594	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1595	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1596	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1597	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1598	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1599	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1600	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1601	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1602	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1603	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1604	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1605	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1606	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1607	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1608	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1609	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1610	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1611	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1612	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1613	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1614	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1615	*
AnnaBridge	165:d1b4690b3f8b	1616	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1617	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1618	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1619	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1620	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1621	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	1622	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1623	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1624	* @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
AnnaBridge	165:d1b4690b3f8b	1625	* Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
AnnaBridge	165:d1b4690b3f8b	1626	*/
AnnaBridge	165:d1b4690b3f8b	1627	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1628	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
AnnaBridge	165:d1b4690b3f8b	1629
AnnaBridge	165:d1b4690b3f8b	1630	/**
AnnaBridge	165:d1b4690b3f8b	1631	* @brief Helper macro to convert a channel defined from parameter
AnnaBridge	165:d1b4690b3f8b	1632	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	165:d1b4690b3f8b	1633	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	165:d1b4690b3f8b	1634	* to its equivalent parameter definition of a ADC external channel
AnnaBridge	165:d1b4690b3f8b	1635	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
AnnaBridge	165:d1b4690b3f8b	1636	* @note The channel parameter can be, additionally to a value
AnnaBridge	165:d1b4690b3f8b	1637	* defined from parameter definition of a ADC internal channel
AnnaBridge	165:d1b4690b3f8b	1638	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	165:d1b4690b3f8b	1639	* a value defined from parameter definition of
AnnaBridge	165:d1b4690b3f8b	1640	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	165:d1b4690b3f8b	1641	* or a value from functions where a channel number is returned
AnnaBridge	165:d1b4690b3f8b	1642	* from ADC registers.
AnnaBridge	165:d1b4690b3f8b	1643	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1644	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1645	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	1646	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	1647	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	1648	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	1649	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	1650	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1651	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1652	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1653	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1654	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1655	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1656	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1657	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1658	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1659	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1660	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1661	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1662	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1663	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1664	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1665	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1666	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1667	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1668	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1669	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1670	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1671	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1672	*
AnnaBridge	165:d1b4690b3f8b	1673	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1674	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1675	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1676	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1677	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1678	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	1679	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1680	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1681	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1682	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1683	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	165:d1b4690b3f8b	1684	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	165:d1b4690b3f8b	1685	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	165:d1b4690b3f8b	1686	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	165:d1b4690b3f8b	1687	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	165:d1b4690b3f8b	1688	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1689	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1690	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1691	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1692	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1693	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1694	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1695	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1696	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1697	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1698	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1699	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1700	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1701	*/
AnnaBridge	165:d1b4690b3f8b	1702	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1703	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	165:d1b4690b3f8b	1704
AnnaBridge	165:d1b4690b3f8b	1705	/**
AnnaBridge	165:d1b4690b3f8b	1706	* @brief Helper macro to determine whether the internal channel
AnnaBridge	165:d1b4690b3f8b	1707	* selected is available on the ADC instance selected.
AnnaBridge	165:d1b4690b3f8b	1708	* @note The channel parameter must be a value defined from parameter
AnnaBridge	165:d1b4690b3f8b	1709	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	165:d1b4690b3f8b	1710	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	165:d1b4690b3f8b	1711	* must not be a value defined from parameter definition of
AnnaBridge	165:d1b4690b3f8b	1712	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	165:d1b4690b3f8b	1713	* or a value from functions where a channel number is
AnnaBridge	165:d1b4690b3f8b	1714	* returned from ADC registers,
AnnaBridge	165:d1b4690b3f8b	1715	* because internal and external channels share the same channel
AnnaBridge	165:d1b4690b3f8b	1716	* number in ADC registers. The differentiation is made only with
AnnaBridge	165:d1b4690b3f8b	1717	* parameters definitions of driver.
AnnaBridge	165:d1b4690b3f8b	1718	* @param __ADC_INSTANCE__ ADC instance
AnnaBridge	165:d1b4690b3f8b	1719	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1720	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1721	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1722	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1723	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1724	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1725	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1726	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1727	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1728	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1729	*
AnnaBridge	165:d1b4690b3f8b	1730	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1731	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1732	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1733	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1734	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1735	* (6) On STM32L4, parameter available on devices with several ADC instances.
AnnaBridge	165:d1b4690b3f8b	1736	* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
AnnaBridge	165:d1b4690b3f8b	1737	* Value "1" if the internal channel selected is available on the ADC instance selected.
AnnaBridge	165:d1b4690b3f8b	1738	*/
AnnaBridge	165:d1b4690b3f8b	1739	#if defined (ADC1) && defined (ADC2) && defined (ADC3)
AnnaBridge	165:d1b4690b3f8b	1740	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1741	(((__ADC_INSTANCE__) == ADC1) \
AnnaBridge	165:d1b4690b3f8b	1742	? ( \
AnnaBridge	165:d1b4690b3f8b	1743	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1744	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	165:d1b4690b3f8b	1745	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \
AnnaBridge	165:d1b4690b3f8b	1746	) \
AnnaBridge	165:d1b4690b3f8b	1747	: \
AnnaBridge	165:d1b4690b3f8b	1748	((__ADC_INSTANCE__) == ADC2) \
AnnaBridge	165:d1b4690b3f8b	1749	? ( \
AnnaBridge	165:d1b4690b3f8b	1750	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1751	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) \|\| \
AnnaBridge	165:d1b4690b3f8b	1752	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) \
AnnaBridge	165:d1b4690b3f8b	1753	) \
AnnaBridge	165:d1b4690b3f8b	1754	: \
AnnaBridge	165:d1b4690b3f8b	1755	((__ADC_INSTANCE__) == ADC3) \
AnnaBridge	165:d1b4690b3f8b	1756	? ( \
AnnaBridge	165:d1b4690b3f8b	1757	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1758	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	165:d1b4690b3f8b	1759	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1760	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC3) \|\| \
AnnaBridge	165:d1b4690b3f8b	1761	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC3) \
AnnaBridge	165:d1b4690b3f8b	1762	) \
AnnaBridge	165:d1b4690b3f8b	1763	: \
AnnaBridge	165:d1b4690b3f8b	1764	(0U) \
AnnaBridge	165:d1b4690b3f8b	1765	)
AnnaBridge	165:d1b4690b3f8b	1766	#elif defined (ADC1) && defined (ADC2)
AnnaBridge	165:d1b4690b3f8b	1767	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1768	(((__ADC_INSTANCE__) == ADC1) \
AnnaBridge	165:d1b4690b3f8b	1769	? ( \
AnnaBridge	165:d1b4690b3f8b	1770	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1771	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	165:d1b4690b3f8b	1772	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \
AnnaBridge	165:d1b4690b3f8b	1773	) \
AnnaBridge	165:d1b4690b3f8b	1774	: \
AnnaBridge	165:d1b4690b3f8b	1775	((__ADC_INSTANCE__) == ADC2) \
AnnaBridge	165:d1b4690b3f8b	1776	? ( \
AnnaBridge	165:d1b4690b3f8b	1777	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1778	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) \|\| \
AnnaBridge	165:d1b4690b3f8b	1779	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) \
AnnaBridge	165:d1b4690b3f8b	1780	) \
AnnaBridge	165:d1b4690b3f8b	1781	: \
AnnaBridge	165:d1b4690b3f8b	1782	(0U) \
AnnaBridge	165:d1b4690b3f8b	1783	)
AnnaBridge	165:d1b4690b3f8b	1784	#elif defined (ADC1)
AnnaBridge	165:d1b4690b3f8b	1785	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	165:d1b4690b3f8b	1786	( \
AnnaBridge	165:d1b4690b3f8b	1787	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1788	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	165:d1b4690b3f8b	1789	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \|\| \
AnnaBridge	165:d1b4690b3f8b	1790	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1) \|\| \
AnnaBridge	165:d1b4690b3f8b	1791	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2) \
AnnaBridge	165:d1b4690b3f8b	1792	)
AnnaBridge	165:d1b4690b3f8b	1793	#endif
AnnaBridge	165:d1b4690b3f8b	1794
AnnaBridge	165:d1b4690b3f8b	1795	/**
AnnaBridge	165:d1b4690b3f8b	1796	* @brief Helper macro to define ADC analog watchdog parameter:
AnnaBridge	165:d1b4690b3f8b	1797	* define a single channel to monitor with analog watchdog
AnnaBridge	165:d1b4690b3f8b	1798	* from sequencer channel and groups definition.
AnnaBridge	165:d1b4690b3f8b	1799	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
AnnaBridge	165:d1b4690b3f8b	1800	* Example:
AnnaBridge	165:d1b4690b3f8b	1801	* LL_ADC_SetAnalogWDMonitChannels(
AnnaBridge	165:d1b4690b3f8b	1802	* ADC1, LL_ADC_AWD1,
AnnaBridge	165:d1b4690b3f8b	1803	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
AnnaBridge	165:d1b4690b3f8b	1804	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1805	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	1806	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	1807	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	1808	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	1809	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	1810	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	1811	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	1812	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	1813	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	1814	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	1815	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	1816	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	1817	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	1818	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	1819	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	1820	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	1821	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	1822	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	1823	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	1824	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	1825	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	1826	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	1827	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	1828	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	1829	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1830	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	1831	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1832	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	1833	*
AnnaBridge	165:d1b4690b3f8b	1834	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1835	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1836	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1837	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1838	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1839	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	1840	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	1841	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
AnnaBridge	165:d1b4690b3f8b	1842	* (1, 2, 3, 4) For ADC channel read back from ADC register,
AnnaBridge	165:d1b4690b3f8b	1843	* comparison with internal channel parameter to be done
AnnaBridge	165:d1b4690b3f8b	1844	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	165:d1b4690b3f8b	1845	* @param __GROUP__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1846	* @arg @ref LL_ADC_GROUP_REGULAR
AnnaBridge	165:d1b4690b3f8b	1847	* @arg @ref LL_ADC_GROUP_INJECTED
AnnaBridge	165:d1b4690b3f8b	1848	* @arg @ref LL_ADC_GROUP_REGULAR_INJECTED
AnnaBridge	165:d1b4690b3f8b	1849	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1850	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	165:d1b4690b3f8b	1851	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
AnnaBridge	165:d1b4690b3f8b	1852	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1853	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1854	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
AnnaBridge	165:d1b4690b3f8b	1855	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1856	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1857	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
AnnaBridge	165:d1b4690b3f8b	1858	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1859	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1860	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
AnnaBridge	165:d1b4690b3f8b	1861	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1862	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1863	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
AnnaBridge	165:d1b4690b3f8b	1864	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1865	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1866	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
AnnaBridge	165:d1b4690b3f8b	1867	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1868	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1869	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
AnnaBridge	165:d1b4690b3f8b	1870	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1871	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1872	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
AnnaBridge	165:d1b4690b3f8b	1873	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1874	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1875	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
AnnaBridge	165:d1b4690b3f8b	1876	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1877	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1878	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
AnnaBridge	165:d1b4690b3f8b	1879	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1880	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1881	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
AnnaBridge	165:d1b4690b3f8b	1882	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1883	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1884	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
AnnaBridge	165:d1b4690b3f8b	1885	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1886	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1887	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
AnnaBridge	165:d1b4690b3f8b	1888	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1889	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1890	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
AnnaBridge	165:d1b4690b3f8b	1891	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1892	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1893	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
AnnaBridge	165:d1b4690b3f8b	1894	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1895	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1896	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
AnnaBridge	165:d1b4690b3f8b	1897	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1898	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1899	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
AnnaBridge	165:d1b4690b3f8b	1900	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1901	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1902	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
AnnaBridge	165:d1b4690b3f8b	1903	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1904	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1905	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
AnnaBridge	165:d1b4690b3f8b	1906	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1907	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1908	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
AnnaBridge	165:d1b4690b3f8b	1909	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
AnnaBridge	165:d1b4690b3f8b	1910	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
AnnaBridge	165:d1b4690b3f8b	1911	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
AnnaBridge	165:d1b4690b3f8b	1912	* @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
AnnaBridge	165:d1b4690b3f8b	1913	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
AnnaBridge	165:d1b4690b3f8b	1914	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(4)
AnnaBridge	165:d1b4690b3f8b	1915	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(4)
AnnaBridge	165:d1b4690b3f8b	1916	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (4)
AnnaBridge	165:d1b4690b3f8b	1917	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(4)
AnnaBridge	165:d1b4690b3f8b	1918	* @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(4)
AnnaBridge	165:d1b4690b3f8b	1919	* @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (4)
AnnaBridge	165:d1b4690b3f8b	1920	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	1921	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_INJ (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	1922	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG_INJ (2)(5)
AnnaBridge	165:d1b4690b3f8b	1923	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	1924	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_INJ (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	1925	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG_INJ (2)(5)
AnnaBridge	165:d1b4690b3f8b	1926	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	1927	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	1928	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)(6)
AnnaBridge	165:d1b4690b3f8b	1929	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	1930	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	1931	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)(6)
AnnaBridge	165:d1b4690b3f8b	1932	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	1933	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	1934	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ (3)(6)
AnnaBridge	165:d1b4690b3f8b	1935	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	1936	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	1937	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ (3)(6)
AnnaBridge	165:d1b4690b3f8b	1938	*
AnnaBridge	165:d1b4690b3f8b	1939	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.\n
AnnaBridge	165:d1b4690b3f8b	1940	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	1941	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	1942	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	1943	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.
AnnaBridge	165:d1b4690b3f8b	1944	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	1945	* (6) On STM32L4, parameter available on devices with several ADC instances.
AnnaBridge	165:d1b4690b3f8b	1946	*/
AnnaBridge	165:d1b4690b3f8b	1947	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
AnnaBridge	165:d1b4690b3f8b	1948	(((__GROUP__) == LL_ADC_GROUP_REGULAR) \
AnnaBridge	165:d1b4690b3f8b	1949	? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) \
AnnaBridge	165:d1b4690b3f8b	1950	: \
AnnaBridge	165:d1b4690b3f8b	1951	((__GROUP__) == LL_ADC_GROUP_INJECTED) \
AnnaBridge	165:d1b4690b3f8b	1952	? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) \
AnnaBridge	165:d1b4690b3f8b	1953	: \
AnnaBridge	165:d1b4690b3f8b	1954	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) \
AnnaBridge	165:d1b4690b3f8b	1955	)
AnnaBridge	165:d1b4690b3f8b	1956
AnnaBridge	165:d1b4690b3f8b	1957	/**
AnnaBridge	165:d1b4690b3f8b	1958	* @brief Helper macro to set the value of ADC analog watchdog threshold high
AnnaBridge	165:d1b4690b3f8b	1959	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	165:d1b4690b3f8b	1960	* different of 12 bits.
AnnaBridge	165:d1b4690b3f8b	1961	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
AnnaBridge	165:d1b4690b3f8b	1962	* or @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	165:d1b4690b3f8b	1963	* Example, with a ADC resolution of 8 bits, to set the value of
AnnaBridge	165:d1b4690b3f8b	1964	* analog watchdog threshold high (on 8 bits):
AnnaBridge	165:d1b4690b3f8b	1965	* LL_ADC_SetAnalogWDThresholds
AnnaBridge	165:d1b4690b3f8b	1966	* (< ADCx param >,
AnnaBridge	165:d1b4690b3f8b	1967	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
AnnaBridge	165:d1b4690b3f8b	1968	* );
AnnaBridge	165:d1b4690b3f8b	1969	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1970	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	1971	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	1972	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	1973	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	1974	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	1975	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	1976	*/
AnnaBridge	165:d1b4690b3f8b	1977	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
AnnaBridge	165:d1b4690b3f8b	1978	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
AnnaBridge	165:d1b4690b3f8b	1979
AnnaBridge	165:d1b4690b3f8b	1980	/**
AnnaBridge	165:d1b4690b3f8b	1981	* @brief Helper macro to get the value of ADC analog watchdog threshold high
AnnaBridge	165:d1b4690b3f8b	1982	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	165:d1b4690b3f8b	1983	* different of 12 bits.
AnnaBridge	165:d1b4690b3f8b	1984	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	165:d1b4690b3f8b	1985	* Example, with a ADC resolution of 8 bits, to get the value of
AnnaBridge	165:d1b4690b3f8b	1986	* analog watchdog threshold high (on 8 bits):
AnnaBridge	165:d1b4690b3f8b	1987	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
AnnaBridge	165:d1b4690b3f8b	1988	* (LL_ADC_RESOLUTION_8B,
AnnaBridge	165:d1b4690b3f8b	1989	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
AnnaBridge	165:d1b4690b3f8b	1990	* );
AnnaBridge	165:d1b4690b3f8b	1991	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	1992	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	1993	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	1994	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	1995	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	1996	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	1997	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	1998	*/
AnnaBridge	165:d1b4690b3f8b	1999	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
AnnaBridge	165:d1b4690b3f8b	2000	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
AnnaBridge	165:d1b4690b3f8b	2001
AnnaBridge	165:d1b4690b3f8b	2002	/**
AnnaBridge	165:d1b4690b3f8b	2003	* @brief Helper macro to get the ADC analog watchdog threshold high
AnnaBridge	165:d1b4690b3f8b	2004	* or low from raw value containing both thresholds concatenated.
AnnaBridge	165:d1b4690b3f8b	2005	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	165:d1b4690b3f8b	2006	* Example, to get analog watchdog threshold high from the register raw value:
AnnaBridge	165:d1b4690b3f8b	2007	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
AnnaBridge	165:d1b4690b3f8b	2008	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2009	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	165:d1b4690b3f8b	2010	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	165:d1b4690b3f8b	2011	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	165:d1b4690b3f8b	2012	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	2013	*/
AnnaBridge	165:d1b4690b3f8b	2014	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	2015	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	165:d1b4690b3f8b	2016	(((__AWD_THRESHOLDS__) >> (((__AWD_THRESHOLD_TYPE__) & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH_SHIFT4)) & LL_ADC_AWD_THRESHOLD_LOW)
AnnaBridge	165:d1b4690b3f8b	2017	#else
AnnaBridge	165:d1b4690b3f8b	2018	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	165:d1b4690b3f8b	2019	(((__AWD_THRESHOLDS__) >> POSITION_VAL((__AWD_THRESHOLD_TYPE__))) & LL_ADC_AWD_THRESHOLD_LOW)
AnnaBridge	165:d1b4690b3f8b	2020	#endif
AnnaBridge	165:d1b4690b3f8b	2021
AnnaBridge	165:d1b4690b3f8b	2022	/**
AnnaBridge	165:d1b4690b3f8b	2023	* @brief Helper macro to set the ADC calibration value with both single ended
AnnaBridge	165:d1b4690b3f8b	2024	* and differential modes calibration factors concatenated.
AnnaBridge	165:d1b4690b3f8b	2025	* @note To be used with function @ref LL_ADC_SetCalibrationFactor().
AnnaBridge	165:d1b4690b3f8b	2026	* Example, to set calibration factors single ended to 0x55
AnnaBridge	165:d1b4690b3f8b	2027	* and differential ended to 0x2A:
AnnaBridge	165:d1b4690b3f8b	2028	* LL_ADC_SetCalibrationFactor(
AnnaBridge	165:d1b4690b3f8b	2029	* ADC1,
AnnaBridge	165:d1b4690b3f8b	2030	* __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A))
AnnaBridge	165:d1b4690b3f8b	2031	* @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	165:d1b4690b3f8b	2032	* @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	165:d1b4690b3f8b	2033	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	165:d1b4690b3f8b	2034	*/
AnnaBridge	165:d1b4690b3f8b	2035	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	2036	#define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIAL__) \
AnnaBridge	165:d1b4690b3f8b	2037	(((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) \| (__CALIB_FACTOR_SINGLE_ENDED__))
AnnaBridge	165:d1b4690b3f8b	2038	#else
AnnaBridge	165:d1b4690b3f8b	2039	#define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIAL__) \
AnnaBridge	165:d1b4690b3f8b	2040	(((__CALIB_FACTOR_DIFFERENTIAL__) << POSITION_VAL(ADC_CALFACT_CALFACT_D)) \| (__CALIB_FACTOR_SINGLE_ENDED__))
AnnaBridge	165:d1b4690b3f8b	2041	#endif
AnnaBridge	165:d1b4690b3f8b	2042
AnnaBridge	165:d1b4690b3f8b	2043	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	2044	/**
AnnaBridge	165:d1b4690b3f8b	2045	* @brief Helper macro to get the ADC multimode conversion data of ADC master
AnnaBridge	165:d1b4690b3f8b	2046	* or ADC slave from raw value with both ADC conversion data concatenated.
AnnaBridge	165:d1b4690b3f8b	2047	* @note This macro is intended to be used when multimode transfer by DMA
AnnaBridge	165:d1b4690b3f8b	2048	* is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer().
AnnaBridge	165:d1b4690b3f8b	2049	* In this case the transferred data need to processed with this macro
AnnaBridge	165:d1b4690b3f8b	2050	* to separate the conversion data of ADC master and ADC slave.
AnnaBridge	165:d1b4690b3f8b	2051	* @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2052	* @arg @ref LL_ADC_MULTI_MASTER
AnnaBridge	165:d1b4690b3f8b	2053	* @arg @ref LL_ADC_MULTI_SLAVE
AnnaBridge	165:d1b4690b3f8b	2054	* @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	2055	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	2056	*/
AnnaBridge	165:d1b4690b3f8b	2057	#define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) \
AnnaBridge	165:d1b4690b3f8b	2058	(((__ADC_MULTI_CONV_DATA__) >> POSITION_VAL((__ADC_MULTI_MASTER_SLAVE__))) & ADC_CDR_RDATA_MST)
AnnaBridge	165:d1b4690b3f8b	2059	#endif
AnnaBridge	165:d1b4690b3f8b	2060
AnnaBridge	165:d1b4690b3f8b	2061	/**
AnnaBridge	165:d1b4690b3f8b	2062	* @brief Helper macro to select the ADC common instance
AnnaBridge	165:d1b4690b3f8b	2063	* to which is belonging the selected ADC instance.
AnnaBridge	165:d1b4690b3f8b	2064	* @note ADC common register instance can be used for:
AnnaBridge	165:d1b4690b3f8b	2065	* - Set parameters common to several ADC instances
AnnaBridge	165:d1b4690b3f8b	2066	* - Multimode (for devices with several ADC instances)
AnnaBridge	165:d1b4690b3f8b	2067	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	165:d1b4690b3f8b	2068	* @param __ADCx__ ADC instance
AnnaBridge	165:d1b4690b3f8b	2069	* @retval ADC common register instance
AnnaBridge	165:d1b4690b3f8b	2070	*/
AnnaBridge	165:d1b4690b3f8b	2071	#if defined(ADC1) && defined(ADC2) && defined(ADC3)
AnnaBridge	165:d1b4690b3f8b	2072	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	165:d1b4690b3f8b	2073	(ADC123_COMMON)
AnnaBridge	165:d1b4690b3f8b	2074	#elif defined(ADC1) && defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	2075	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	165:d1b4690b3f8b	2076	(ADC12_COMMON)
AnnaBridge	165:d1b4690b3f8b	2077	#else
AnnaBridge	165:d1b4690b3f8b	2078	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	165:d1b4690b3f8b	2079	(ADC1_COMMON)
AnnaBridge	165:d1b4690b3f8b	2080	#endif
AnnaBridge	165:d1b4690b3f8b	2081
AnnaBridge	165:d1b4690b3f8b	2082	/**
AnnaBridge	165:d1b4690b3f8b	2083	* @brief Helper macro to check if all ADC instances sharing the same
AnnaBridge	165:d1b4690b3f8b	2084	* ADC common instance are disabled.
AnnaBridge	165:d1b4690b3f8b	2085	* @note This check is required by functions with setting conditioned to
AnnaBridge	165:d1b4690b3f8b	2086	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2087	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	165:d1b4690b3f8b	2088	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	165:d1b4690b3f8b	2089	* @note On devices with only 1 ADC common instance, parameter of this macro
AnnaBridge	165:d1b4690b3f8b	2090	* is useless and can be ignored (parameter kept for compatibility
AnnaBridge	165:d1b4690b3f8b	2091	* with devices featuring several ADC common instances).
AnnaBridge	165:d1b4690b3f8b	2092	* @param __ADCXY_COMMON__ ADC common instance
AnnaBridge	165:d1b4690b3f8b	2093	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	2094	* @retval Value "0" if all ADC instances sharing the same ADC common instance
AnnaBridge	165:d1b4690b3f8b	2095	* are disabled.
AnnaBridge	165:d1b4690b3f8b	2096	* Value "1" if at least one ADC instance sharing the same ADC common instance
AnnaBridge	165:d1b4690b3f8b	2097	* is enabled.
AnnaBridge	165:d1b4690b3f8b	2098	*/
AnnaBridge	165:d1b4690b3f8b	2099	#if defined(ADC1) && defined(ADC2) && defined(ADC3)
AnnaBridge	165:d1b4690b3f8b	2100	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	165:d1b4690b3f8b	2101	(LL_ADC_IsEnabled(ADC1) \| \
AnnaBridge	165:d1b4690b3f8b	2102	LL_ADC_IsEnabled(ADC2) \| \
AnnaBridge	165:d1b4690b3f8b	2103	LL_ADC_IsEnabled(ADC3) )
AnnaBridge	165:d1b4690b3f8b	2104	#elif defined(ADC1) && defined(ADC2)
AnnaBridge	165:d1b4690b3f8b	2105	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	165:d1b4690b3f8b	2106	(LL_ADC_IsEnabled(ADC1) \| \
AnnaBridge	165:d1b4690b3f8b	2107	LL_ADC_IsEnabled(ADC2) )
AnnaBridge	165:d1b4690b3f8b	2108	#else
AnnaBridge	165:d1b4690b3f8b	2109	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	165:d1b4690b3f8b	2110	(LL_ADC_IsEnabled(ADC1))
AnnaBridge	165:d1b4690b3f8b	2111	#endif
AnnaBridge	165:d1b4690b3f8b	2112
AnnaBridge	165:d1b4690b3f8b	2113	/**
AnnaBridge	165:d1b4690b3f8b	2114	* @brief Helper macro to define the ADC conversion data full-scale digital
AnnaBridge	165:d1b4690b3f8b	2115	* value corresponding to the selected ADC resolution.
AnnaBridge	165:d1b4690b3f8b	2116	* @note ADC conversion data full-scale corresponds to voltage range
AnnaBridge	165:d1b4690b3f8b	2117	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	165:d1b4690b3f8b	2118	* (refer to reference manual).
AnnaBridge	165:d1b4690b3f8b	2119	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2120	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2121	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2122	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2123	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2124	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	165:d1b4690b3f8b	2125	*/
AnnaBridge	165:d1b4690b3f8b	2126	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2127	(0xFFFU >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U)))
AnnaBridge	165:d1b4690b3f8b	2128
AnnaBridge	165:d1b4690b3f8b	2129	/**
AnnaBridge	165:d1b4690b3f8b	2130	* @brief Helper macro to convert the ADC conversion data from
AnnaBridge	165:d1b4690b3f8b	2131	* a resolution to another resolution.
AnnaBridge	165:d1b4690b3f8b	2132	* @param __DATA__ ADC conversion data to be converted
AnnaBridge	165:d1b4690b3f8b	2133	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
AnnaBridge	165:d1b4690b3f8b	2134	* This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2135	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2136	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2137	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2138	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2139	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
AnnaBridge	165:d1b4690b3f8b	2140	* This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2141	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2142	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2143	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2144	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2145	* @retval ADC conversion data to the requested resolution
AnnaBridge	165:d1b4690b3f8b	2146	*/
AnnaBridge	165:d1b4690b3f8b	2147	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\
AnnaBridge	165:d1b4690b3f8b	2148	__ADC_RESOLUTION_CURRENT__,\
AnnaBridge	165:d1b4690b3f8b	2149	__ADC_RESOLUTION_TARGET__) \
AnnaBridge	165:d1b4690b3f8b	2150	(((__DATA__) \
AnnaBridge	165:d1b4690b3f8b	2151	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U))) \
AnnaBridge	165:d1b4690b3f8b	2152	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U)) \
AnnaBridge	165:d1b4690b3f8b	2153	)
AnnaBridge	165:d1b4690b3f8b	2154
AnnaBridge	165:d1b4690b3f8b	2155	/**
AnnaBridge	165:d1b4690b3f8b	2156	* @brief Helper macro to calculate the voltage (unit: mVolt)
AnnaBridge	165:d1b4690b3f8b	2157	* corresponding to a ADC conversion data (unit: digital value).
AnnaBridge	165:d1b4690b3f8b	2158	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	165:d1b4690b3f8b	2159	* user board environment or can be calculated using ADC measurement
AnnaBridge	165:d1b4690b3f8b	2160	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	165:d1b4690b3f8b	2161	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2162	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	165:d1b4690b3f8b	2163	* (unit: digital value).
AnnaBridge	165:d1b4690b3f8b	2164	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2165	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2166	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2167	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2168	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2169	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	165:d1b4690b3f8b	2170	*/
AnnaBridge	165:d1b4690b3f8b	2171	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	165:d1b4690b3f8b	2172	__ADC_DATA__,\
AnnaBridge	165:d1b4690b3f8b	2173	__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2174	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
AnnaBridge	165:d1b4690b3f8b	2175	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2176	)
AnnaBridge	165:d1b4690b3f8b	2177
AnnaBridge	165:d1b4690b3f8b	2178	/* Legacy define */
AnnaBridge	165:d1b4690b3f8b	2179	#define __LL_ADC_CALC_DATA_VOLTAGE() __LL_ADC_CALC_DATA_TO_VOLTAGE()
AnnaBridge	165:d1b4690b3f8b	2180
AnnaBridge	165:d1b4690b3f8b	2181	/**
AnnaBridge	165:d1b4690b3f8b	2182	* @brief Helper macro to calculate analog reference voltage (Vref+)
AnnaBridge	165:d1b4690b3f8b	2183	* (unit: mVolt) from ADC conversion data of internal voltage
AnnaBridge	165:d1b4690b3f8b	2184	* reference VrefInt.
AnnaBridge	165:d1b4690b3f8b	2185	* @note Computation is using VrefInt calibration value
AnnaBridge	165:d1b4690b3f8b	2186	* stored in system memory for each device during production.
AnnaBridge	165:d1b4690b3f8b	2187	* @note This voltage depends on user board environment: voltage level
AnnaBridge	165:d1b4690b3f8b	2188	* connected to pin Vref+.
AnnaBridge	165:d1b4690b3f8b	2189	* On devices with small package, the pin Vref+ is not present
AnnaBridge	165:d1b4690b3f8b	2190	* and internally bonded to pin Vdda.
AnnaBridge	165:d1b4690b3f8b	2191	* @note On this STM32 serie, calibration data of internal voltage reference
AnnaBridge	165:d1b4690b3f8b	2192	* VrefInt corresponds to a resolution of 12 bits,
AnnaBridge	165:d1b4690b3f8b	2193	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	165:d1b4690b3f8b	2194	* internal voltage reference VrefInt.
AnnaBridge	165:d1b4690b3f8b	2195	* Otherwise, this macro performs the processing to scale
AnnaBridge	165:d1b4690b3f8b	2196	* ADC conversion data to 12 bits.
AnnaBridge	165:d1b4690b3f8b	2197	* @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	165:d1b4690b3f8b	2198	* of internal voltage reference VrefInt (unit: digital value).
AnnaBridge	165:d1b4690b3f8b	2199	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2200	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2201	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2202	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2203	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2204	* @retval Analog reference voltage (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2205	*/
AnnaBridge	165:d1b4690b3f8b	2206	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
AnnaBridge	165:d1b4690b3f8b	2207	__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2208	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
AnnaBridge	165:d1b4690b3f8b	2209	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
AnnaBridge	165:d1b4690b3f8b	2210	(__ADC_RESOLUTION__), \
AnnaBridge	165:d1b4690b3f8b	2211	LL_ADC_RESOLUTION_12B) \
AnnaBridge	165:d1b4690b3f8b	2212	)
AnnaBridge	165:d1b4690b3f8b	2213
AnnaBridge	165:d1b4690b3f8b	2214	/**
AnnaBridge	165:d1b4690b3f8b	2215	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	165:d1b4690b3f8b	2216	* from ADC conversion data of internal temperature sensor.
AnnaBridge	165:d1b4690b3f8b	2217	* @note Computation is using temperature sensor calibration values
AnnaBridge	165:d1b4690b3f8b	2218	* stored in system memory for each device during production.
AnnaBridge	165:d1b4690b3f8b	2219	* @note Calculation formula:
AnnaBridge	165:d1b4690b3f8b	2220	* Temperature = ((TS_ADC_DATA - TS_CAL1)
AnnaBridge	165:d1b4690b3f8b	2221	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
AnnaBridge	165:d1b4690b3f8b	2222	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
AnnaBridge	165:d1b4690b3f8b	2223	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	165:d1b4690b3f8b	2224	* Avg_Slope = (TS_CAL2 - TS_CAL1)
AnnaBridge	165:d1b4690b3f8b	2225	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
AnnaBridge	165:d1b4690b3f8b	2226	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
AnnaBridge	165:d1b4690b3f8b	2227	* TEMP_DEGC_CAL1 (calibrated in factory)
AnnaBridge	165:d1b4690b3f8b	2228	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
AnnaBridge	165:d1b4690b3f8b	2229	* TEMP_DEGC_CAL2 (calibrated in factory)
AnnaBridge	165:d1b4690b3f8b	2230	* Caution: Calculation relevancy under reserve that calibration
AnnaBridge	165:d1b4690b3f8b	2231	* parameters are correct (address and data).
AnnaBridge	165:d1b4690b3f8b	2232	* To calculate temperature using temperature sensor
AnnaBridge	165:d1b4690b3f8b	2233	* datasheet typical values (generic values less, therefore
AnnaBridge	165:d1b4690b3f8b	2234	* less accurate than calibrated values),
AnnaBridge	165:d1b4690b3f8b	2235	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
AnnaBridge	165:d1b4690b3f8b	2236	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	165:d1b4690b3f8b	2237	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	165:d1b4690b3f8b	2238	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	165:d1b4690b3f8b	2239	* user board environment or can be calculated using ADC measurement
AnnaBridge	165:d1b4690b3f8b	2240	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	165:d1b4690b3f8b	2241	* @note On this STM32 serie, calibration data of temperature sensor
AnnaBridge	165:d1b4690b3f8b	2242	* corresponds to a resolution of 12 bits,
AnnaBridge	165:d1b4690b3f8b	2243	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	165:d1b4690b3f8b	2244	* temperature sensor.
AnnaBridge	165:d1b4690b3f8b	2245	* Otherwise, this macro performs the processing to scale
AnnaBridge	165:d1b4690b3f8b	2246	* ADC conversion data to 12 bits.
AnnaBridge	165:d1b4690b3f8b	2247	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2248	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
AnnaBridge	165:d1b4690b3f8b	2249	* temperature sensor (unit: digital value).
AnnaBridge	165:d1b4690b3f8b	2250	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
AnnaBridge	165:d1b4690b3f8b	2251	* sensor voltage has been measured.
AnnaBridge	165:d1b4690b3f8b	2252	* This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2253	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2254	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2255	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2256	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2257	* @retval Temperature (unit: degree Celsius)
AnnaBridge	165:d1b4690b3f8b	2258	*/
AnnaBridge	165:d1b4690b3f8b	2259	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	165:d1b4690b3f8b	2260	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	165:d1b4690b3f8b	2261	__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2262	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
AnnaBridge	165:d1b4690b3f8b	2263	(__ADC_RESOLUTION__), \
AnnaBridge	165:d1b4690b3f8b	2264	LL_ADC_RESOLUTION_12B) \
AnnaBridge	165:d1b4690b3f8b	2265	* (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	165:d1b4690b3f8b	2266	/ TEMPSENSOR_CAL_VREFANALOG) \
AnnaBridge	165:d1b4690b3f8b	2267	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	165:d1b4690b3f8b	2268	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
AnnaBridge	165:d1b4690b3f8b	2269	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	165:d1b4690b3f8b	2270	) + TEMPSENSOR_CAL1_TEMP \
AnnaBridge	165:d1b4690b3f8b	2271	)
AnnaBridge	165:d1b4690b3f8b	2272
AnnaBridge	165:d1b4690b3f8b	2273	/**
AnnaBridge	165:d1b4690b3f8b	2274	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	165:d1b4690b3f8b	2275	* from ADC conversion data of internal temperature sensor.
AnnaBridge	165:d1b4690b3f8b	2276	* @note Computation is using temperature sensor typical values
AnnaBridge	165:d1b4690b3f8b	2277	* (refer to device datasheet).
AnnaBridge	165:d1b4690b3f8b	2278	* @note Calculation formula:
AnnaBridge	165:d1b4690b3f8b	2279	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
AnnaBridge	165:d1b4690b3f8b	2280	* / Avg_Slope + CALx_TEMP
AnnaBridge	165:d1b4690b3f8b	2281	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	165:d1b4690b3f8b	2282	* (unit: digital value)
AnnaBridge	165:d1b4690b3f8b	2283	* Avg_Slope = temperature sensor slope
AnnaBridge	165:d1b4690b3f8b	2284	* (unit: uV/Degree Celsius)
AnnaBridge	165:d1b4690b3f8b	2285	* TS_TYP_CALx_VOLT = temperature sensor digital value at
AnnaBridge	165:d1b4690b3f8b	2286	* temperature CALx_TEMP (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2287	* Caution: Calculation relevancy under reserve the temperature sensor
AnnaBridge	165:d1b4690b3f8b	2288	* of the current device has characteristics in line with
AnnaBridge	165:d1b4690b3f8b	2289	* datasheet typical values.
AnnaBridge	165:d1b4690b3f8b	2290	* If temperature sensor calibration values are available on
AnnaBridge	165:d1b4690b3f8b	2291	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
AnnaBridge	165:d1b4690b3f8b	2292	* temperature calculation will be more accurate using
AnnaBridge	165:d1b4690b3f8b	2293	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
AnnaBridge	165:d1b4690b3f8b	2294	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	165:d1b4690b3f8b	2295	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	165:d1b4690b3f8b	2296	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	165:d1b4690b3f8b	2297	* user board environment or can be calculated using ADC measurement
AnnaBridge	165:d1b4690b3f8b	2298	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	165:d1b4690b3f8b	2299	* @note ADC measurement data must correspond to a resolution of 12bits
AnnaBridge	165:d1b4690b3f8b	2300	* (full scale digital value 4095). If not the case, the data must be
AnnaBridge	165:d1b4690b3f8b	2301	* preliminarily rescaled to an equivalent resolution of 12 bits.
AnnaBridge	165:d1b4690b3f8b	2302	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
AnnaBridge	165:d1b4690b3f8b	2303	* On STM32L4, refer to device datasheet parameter "Avg_Slope".
AnnaBridge	165:d1b4690b3f8b	2304	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
AnnaBridge	165:d1b4690b3f8b	2305	* On STM32L4, refer to device datasheet parameter "V30" (corresponding to TS_CAL1).
AnnaBridge	165:d1b4690b3f8b	2306	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2307	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
AnnaBridge	165:d1b4690b3f8b	2308	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
AnnaBridge	165:d1b4690b3f8b	2309	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
AnnaBridge	165:d1b4690b3f8b	2310	* This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2311	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2312	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2313	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2314	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2315	* @retval Temperature (unit: degree Celsius)
AnnaBridge	165:d1b4690b3f8b	2316	*/
AnnaBridge	165:d1b4690b3f8b	2317	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
AnnaBridge	165:d1b4690b3f8b	2318	__TEMPSENSOR_TYP_CALX_V__,\
AnnaBridge	165:d1b4690b3f8b	2319	__TEMPSENSOR_CALX_TEMP__,\
AnnaBridge	165:d1b4690b3f8b	2320	__VREFANALOG_VOLTAGE__,\
AnnaBridge	165:d1b4690b3f8b	2321	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	165:d1b4690b3f8b	2322	__ADC_RESOLUTION__) \
AnnaBridge	165:d1b4690b3f8b	2323	((( ( \
AnnaBridge	165:d1b4690b3f8b	2324	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	165:d1b4690b3f8b	2325	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
AnnaBridge	165:d1b4690b3f8b	2326	* 1000) \
AnnaBridge	165:d1b4690b3f8b	2327	- \
AnnaBridge	165:d1b4690b3f8b	2328	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
AnnaBridge	165:d1b4690b3f8b	2329	* 1000) \
AnnaBridge	165:d1b4690b3f8b	2330	) \
AnnaBridge	165:d1b4690b3f8b	2331	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
AnnaBridge	165:d1b4690b3f8b	2332	) + (__TEMPSENSOR_CALX_TEMP__) \
AnnaBridge	165:d1b4690b3f8b	2333	)
AnnaBridge	165:d1b4690b3f8b	2334
AnnaBridge	165:d1b4690b3f8b	2335	/**
AnnaBridge	165:d1b4690b3f8b	2336	* @}
AnnaBridge	165:d1b4690b3f8b	2337	*/
AnnaBridge	165:d1b4690b3f8b	2338
AnnaBridge	165:d1b4690b3f8b	2339	/**
AnnaBridge	165:d1b4690b3f8b	2340	* @}
AnnaBridge	165:d1b4690b3f8b	2341	*/
AnnaBridge	165:d1b4690b3f8b	2342
AnnaBridge	165:d1b4690b3f8b	2343
AnnaBridge	165:d1b4690b3f8b	2344	/* Exported functions --------------------------------------------------------*/
AnnaBridge	165:d1b4690b3f8b	2345	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
AnnaBridge	165:d1b4690b3f8b	2346	* @{
AnnaBridge	165:d1b4690b3f8b	2347	*/
AnnaBridge	165:d1b4690b3f8b	2348
AnnaBridge	165:d1b4690b3f8b	2349	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
AnnaBridge	165:d1b4690b3f8b	2350	* @{
AnnaBridge	165:d1b4690b3f8b	2351	*/
AnnaBridge	165:d1b4690b3f8b	2352	/* Note: LL ADC functions to set DMA transfer are located into sections of */
AnnaBridge	165:d1b4690b3f8b	2353	/* configuration of ADC instance, groups and multimode (if available): */
AnnaBridge	165:d1b4690b3f8b	2354	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
AnnaBridge	165:d1b4690b3f8b	2355
AnnaBridge	165:d1b4690b3f8b	2356	/**
AnnaBridge	165:d1b4690b3f8b	2357	* @brief Function to help to configure DMA transfer from ADC: retrieve the
AnnaBridge	165:d1b4690b3f8b	2358	* ADC register address from ADC instance and a list of ADC registers
AnnaBridge	165:d1b4690b3f8b	2359	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	165:d1b4690b3f8b	2360	* @note These ADC registers are data registers:
AnnaBridge	165:d1b4690b3f8b	2361	* when ADC conversion data is available in ADC data registers,
AnnaBridge	165:d1b4690b3f8b	2362	* ADC generates a DMA transfer request.
AnnaBridge	165:d1b4690b3f8b	2363	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	165:d1b4690b3f8b	2364	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	165:d1b4690b3f8b	2365	* Example:
AnnaBridge	165:d1b4690b3f8b	2366	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	165:d1b4690b3f8b	2367	* LL_DMA_CHANNEL_1,
AnnaBridge	165:d1b4690b3f8b	2368	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
AnnaBridge	165:d1b4690b3f8b	2369	* (uint32_t)&< array or variable >,
AnnaBridge	165:d1b4690b3f8b	2370	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
AnnaBridge	165:d1b4690b3f8b	2371	* @note For devices with several ADC: in multimode, some devices
AnnaBridge	165:d1b4690b3f8b	2372	* use a different data register outside of ADC instance scope
AnnaBridge	165:d1b4690b3f8b	2373	* (common data register). This macro manages this register difference,
AnnaBridge	165:d1b4690b3f8b	2374	* only ADC instance has to be set as parameter.
AnnaBridge	165:d1b4690b3f8b	2375	* @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n
AnnaBridge	165:d1b4690b3f8b	2376	* CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n
AnnaBridge	165:d1b4690b3f8b	2377	* CDR RDATA_SLV LL_ADC_DMA_GetRegAddr
AnnaBridge	165:d1b4690b3f8b	2378	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2379	* @param Register This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2380	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
AnnaBridge	165:d1b4690b3f8b	2381	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1)
AnnaBridge	165:d1b4690b3f8b	2382	*
AnnaBridge	165:d1b4690b3f8b	2383	* (1) Available on devices with several ADC instances.
AnnaBridge	165:d1b4690b3f8b	2384	* @retval ADC register address
AnnaBridge	165:d1b4690b3f8b	2385	*/
AnnaBridge	165:d1b4690b3f8b	2386	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	2387	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	165:d1b4690b3f8b	2388	{
AnnaBridge	165:d1b4690b3f8b	2389	register uint32_t data_reg_addr = 0U;
AnnaBridge	165:d1b4690b3f8b	2390
AnnaBridge	165:d1b4690b3f8b	2391	if (Register == LL_ADC_DMA_REG_REGULAR_DATA)
AnnaBridge	165:d1b4690b3f8b	2392	{
AnnaBridge	165:d1b4690b3f8b	2393	/* Retrieve address of register DR */
AnnaBridge	165:d1b4690b3f8b	2394	data_reg_addr = (uint32_t)&(ADCx->DR);
AnnaBridge	165:d1b4690b3f8b	2395	}
AnnaBridge	165:d1b4690b3f8b	2396	else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */
AnnaBridge	165:d1b4690b3f8b	2397	{
AnnaBridge	165:d1b4690b3f8b	2398	/* Retrieve address of register CDR */
AnnaBridge	165:d1b4690b3f8b	2399	data_reg_addr = (uint32_t)&((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR);
AnnaBridge	165:d1b4690b3f8b	2400	}
AnnaBridge	165:d1b4690b3f8b	2401
AnnaBridge	165:d1b4690b3f8b	2402	return data_reg_addr;
AnnaBridge	165:d1b4690b3f8b	2403	}
AnnaBridge	165:d1b4690b3f8b	2404	#else
AnnaBridge	165:d1b4690b3f8b	2405	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	165:d1b4690b3f8b	2406	{
AnnaBridge	165:d1b4690b3f8b	2407	/* Retrieve address of register DR */
AnnaBridge	165:d1b4690b3f8b	2408	return (uint32_t)&(ADCx->DR);
AnnaBridge	165:d1b4690b3f8b	2409	}
AnnaBridge	165:d1b4690b3f8b	2410	#endif
AnnaBridge	165:d1b4690b3f8b	2411
AnnaBridge	165:d1b4690b3f8b	2412	/**
AnnaBridge	165:d1b4690b3f8b	2413	* @}
AnnaBridge	165:d1b4690b3f8b	2414	*/
AnnaBridge	165:d1b4690b3f8b	2415
AnnaBridge	165:d1b4690b3f8b	2416	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
AnnaBridge	165:d1b4690b3f8b	2417	* @{
AnnaBridge	165:d1b4690b3f8b	2418	*/
AnnaBridge	165:d1b4690b3f8b	2419
AnnaBridge	165:d1b4690b3f8b	2420	/**
AnnaBridge	165:d1b4690b3f8b	2421	* @brief Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	165:d1b4690b3f8b	2422	* @note On this STM32 serie, if ADC group injected is used, some
AnnaBridge	165:d1b4690b3f8b	2423	* clock ratio constraints between ADC clock and AHB clock
AnnaBridge	165:d1b4690b3f8b	2424	* must be respected.
AnnaBridge	165:d1b4690b3f8b	2425	* Refer to reference manual.
AnnaBridge	165:d1b4690b3f8b	2426	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2427	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2428	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	165:d1b4690b3f8b	2429	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	165:d1b4690b3f8b	2430	* ADC instance or by using helper macro helper macro
AnnaBridge	165:d1b4690b3f8b	2431	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	165:d1b4690b3f8b	2432	* @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n
AnnaBridge	165:d1b4690b3f8b	2433	* CCR PRESC LL_ADC_SetCommonClock
AnnaBridge	165:d1b4690b3f8b	2434	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	2435	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	2436	* @param CommonClock This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2437	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
AnnaBridge	165:d1b4690b3f8b	2438	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	165:d1b4690b3f8b	2439	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	165:d1b4690b3f8b	2440	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
AnnaBridge	165:d1b4690b3f8b	2441	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
AnnaBridge	165:d1b4690b3f8b	2442	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
AnnaBridge	165:d1b4690b3f8b	2443	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
AnnaBridge	165:d1b4690b3f8b	2444	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
AnnaBridge	165:d1b4690b3f8b	2445	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
AnnaBridge	165:d1b4690b3f8b	2446	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
AnnaBridge	165:d1b4690b3f8b	2447	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
AnnaBridge	165:d1b4690b3f8b	2448	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
AnnaBridge	165:d1b4690b3f8b	2449	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
AnnaBridge	165:d1b4690b3f8b	2450	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
AnnaBridge	165:d1b4690b3f8b	2451	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
AnnaBridge	165:d1b4690b3f8b	2452	* @retval None
AnnaBridge	165:d1b4690b3f8b	2453	*/
AnnaBridge	165:d1b4690b3f8b	2454	__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
AnnaBridge	165:d1b4690b3f8b	2455	{
AnnaBridge	165:d1b4690b3f8b	2456	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE \| ADC_CCR_PRESC, CommonClock);
AnnaBridge	165:d1b4690b3f8b	2457	}
AnnaBridge	165:d1b4690b3f8b	2458
AnnaBridge	165:d1b4690b3f8b	2459	/**
AnnaBridge	165:d1b4690b3f8b	2460	* @brief Get parameter common to several ADC: Clock source and prescaler.
AnnaBridge	165:d1b4690b3f8b	2461	* @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n
AnnaBridge	165:d1b4690b3f8b	2462	* CCR PRESC LL_ADC_GetCommonClock
AnnaBridge	165:d1b4690b3f8b	2463	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	2464	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	2465	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2466	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
AnnaBridge	165:d1b4690b3f8b	2467	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	165:d1b4690b3f8b	2468	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	165:d1b4690b3f8b	2469	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
AnnaBridge	165:d1b4690b3f8b	2470	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
AnnaBridge	165:d1b4690b3f8b	2471	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
AnnaBridge	165:d1b4690b3f8b	2472	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
AnnaBridge	165:d1b4690b3f8b	2473	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
AnnaBridge	165:d1b4690b3f8b	2474	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
AnnaBridge	165:d1b4690b3f8b	2475	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
AnnaBridge	165:d1b4690b3f8b	2476	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
AnnaBridge	165:d1b4690b3f8b	2477	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
AnnaBridge	165:d1b4690b3f8b	2478	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
AnnaBridge	165:d1b4690b3f8b	2479	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
AnnaBridge	165:d1b4690b3f8b	2480	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
AnnaBridge	165:d1b4690b3f8b	2481	*/
AnnaBridge	165:d1b4690b3f8b	2482	__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	2483	{
AnnaBridge	165:d1b4690b3f8b	2484	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE \| ADC_CCR_PRESC));
AnnaBridge	165:d1b4690b3f8b	2485	}
AnnaBridge	165:d1b4690b3f8b	2486
AnnaBridge	165:d1b4690b3f8b	2487	/**
AnnaBridge	165:d1b4690b3f8b	2488	* @brief Set parameter common to several ADC: measurement path to internal
AnnaBridge	165:d1b4690b3f8b	2489	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	165:d1b4690b3f8b	2490	* @note One or several values can be selected.
AnnaBridge	165:d1b4690b3f8b	2491	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	165:d1b4690b3f8b	2492	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	165:d1b4690b3f8b	2493	* @note Stabilization time of measurement path to internal channel:
AnnaBridge	165:d1b4690b3f8b	2494	* After enabling internal paths, before starting ADC conversion,
AnnaBridge	165:d1b4690b3f8b	2495	* a delay is required for internal voltage reference and
AnnaBridge	165:d1b4690b3f8b	2496	* temperature sensor stabilization time.
AnnaBridge	165:d1b4690b3f8b	2497	* Refer to device datasheet.
AnnaBridge	165:d1b4690b3f8b	2498	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
AnnaBridge	165:d1b4690b3f8b	2499	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
AnnaBridge	165:d1b4690b3f8b	2500	* @note ADC internal channel sampling time constraint:
AnnaBridge	165:d1b4690b3f8b	2501	* For ADC conversion of internal channels,
AnnaBridge	165:d1b4690b3f8b	2502	* a sampling time minimum value is required.
AnnaBridge	165:d1b4690b3f8b	2503	* Refer to device datasheet.
AnnaBridge	165:d1b4690b3f8b	2504	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2505	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2506	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	165:d1b4690b3f8b	2507	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	165:d1b4690b3f8b	2508	* ADC instance or by using helper macro helper macro
AnnaBridge	165:d1b4690b3f8b	2509	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	165:d1b4690b3f8b	2510	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	165:d1b4690b3f8b	2511	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	165:d1b4690b3f8b	2512	* CCR VBATEN LL_ADC_SetCommonPathInternalCh
AnnaBridge	165:d1b4690b3f8b	2513	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	2514	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	2515	* @param PathInternal This parameter can be a combination of the following values:
AnnaBridge	165:d1b4690b3f8b	2516	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	165:d1b4690b3f8b	2517	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	165:d1b4690b3f8b	2518	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	165:d1b4690b3f8b	2519	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT
AnnaBridge	165:d1b4690b3f8b	2520	* @retval None
AnnaBridge	165:d1b4690b3f8b	2521	*/
AnnaBridge	165:d1b4690b3f8b	2522	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
AnnaBridge	165:d1b4690b3f8b	2523	{
AnnaBridge	165:d1b4690b3f8b	2524	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN, PathInternal);
AnnaBridge	165:d1b4690b3f8b	2525	}
AnnaBridge	165:d1b4690b3f8b	2526
AnnaBridge	165:d1b4690b3f8b	2527	/**
AnnaBridge	165:d1b4690b3f8b	2528	* @brief Get parameter common to several ADC: measurement path to internal
AnnaBridge	165:d1b4690b3f8b	2529	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	165:d1b4690b3f8b	2530	* @note One or several values can be selected.
AnnaBridge	165:d1b4690b3f8b	2531	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	165:d1b4690b3f8b	2532	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	165:d1b4690b3f8b	2533	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	165:d1b4690b3f8b	2534	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	165:d1b4690b3f8b	2535	* CCR VBATEN LL_ADC_GetCommonPathInternalCh
AnnaBridge	165:d1b4690b3f8b	2536	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	2537	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	2538	* @retval Returned value can be a combination of the following values:
AnnaBridge	165:d1b4690b3f8b	2539	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	165:d1b4690b3f8b	2540	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	165:d1b4690b3f8b	2541	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	165:d1b4690b3f8b	2542	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT
AnnaBridge	165:d1b4690b3f8b	2543	*/
AnnaBridge	165:d1b4690b3f8b	2544	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	2545	{
AnnaBridge	165:d1b4690b3f8b	2546	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN));
AnnaBridge	165:d1b4690b3f8b	2547	}
AnnaBridge	165:d1b4690b3f8b	2548
AnnaBridge	165:d1b4690b3f8b	2549	/**
AnnaBridge	165:d1b4690b3f8b	2550	* @}
AnnaBridge	165:d1b4690b3f8b	2551	*/
AnnaBridge	165:d1b4690b3f8b	2552
AnnaBridge	165:d1b4690b3f8b	2553	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
AnnaBridge	165:d1b4690b3f8b	2554	* @{
AnnaBridge	165:d1b4690b3f8b	2555	*/
AnnaBridge	165:d1b4690b3f8b	2556
AnnaBridge	165:d1b4690b3f8b	2557	/**
AnnaBridge	165:d1b4690b3f8b	2558	* @brief Set ADC calibration factor in the mode single-ended
AnnaBridge	165:d1b4690b3f8b	2559	* or differential (for devices with differential mode available).
AnnaBridge	165:d1b4690b3f8b	2560	* @note This function is intended to set calibration parameters
AnnaBridge	165:d1b4690b3f8b	2561	* without having to perform a new calibration using
AnnaBridge	165:d1b4690b3f8b	2562	* @ref LL_ADC_StartCalibration().
AnnaBridge	165:d1b4690b3f8b	2563	* @note For devices with differential mode available:
AnnaBridge	165:d1b4690b3f8b	2564	* Calibration of offset is specific to each of
AnnaBridge	165:d1b4690b3f8b	2565	* single-ended and differential modes
AnnaBridge	165:d1b4690b3f8b	2566	* (calibration factor must be specified for each of these
AnnaBridge	165:d1b4690b3f8b	2567	* differential modes, if used afterwards and if the application
AnnaBridge	165:d1b4690b3f8b	2568	* requires their calibration).
AnnaBridge	165:d1b4690b3f8b	2569	* @note In case of setting calibration factors of both modes single ended
AnnaBridge	165:d1b4690b3f8b	2570	* and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED):
AnnaBridge	165:d1b4690b3f8b	2571	* both calibration factors must be concatenated.
AnnaBridge	165:d1b4690b3f8b	2572	* To perform this processing, use helper macro
AnnaBridge	165:d1b4690b3f8b	2573	* @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF().
AnnaBridge	165:d1b4690b3f8b	2574	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2575	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2576	* ADC must be enabled, without calibration on going, without conversion
AnnaBridge	165:d1b4690b3f8b	2577	* on going on group regular.
AnnaBridge	165:d1b4690b3f8b	2578	* @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n
AnnaBridge	165:d1b4690b3f8b	2579	* CALFACT CALFACT_D LL_ADC_SetCalibrationFactor
AnnaBridge	165:d1b4690b3f8b	2580	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2581	* @param SingleDiff This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2582	* @arg @ref LL_ADC_SINGLE_ENDED
AnnaBridge	165:d1b4690b3f8b	2583	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
AnnaBridge	165:d1b4690b3f8b	2584	* @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED
AnnaBridge	165:d1b4690b3f8b	2585	* @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	165:d1b4690b3f8b	2586	* @retval None
AnnaBridge	165:d1b4690b3f8b	2587	*/
AnnaBridge	165:d1b4690b3f8b	2588	__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t CalibrationFactor)
AnnaBridge	165:d1b4690b3f8b	2589	{
AnnaBridge	165:d1b4690b3f8b	2590	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	2591	MODIFY_REG(ADCx->CALFACT,
AnnaBridge	165:d1b4690b3f8b	2592	SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK,
AnnaBridge	165:d1b4690b3f8b	2593	CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4) & ~(SingleDiff & ADC_CALFACT_CALFACT_S)));
AnnaBridge	165:d1b4690b3f8b	2594	#else
AnnaBridge	165:d1b4690b3f8b	2595	MODIFY_REG(ADCx->CALFACT,
AnnaBridge	165:d1b4690b3f8b	2596	SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK,
AnnaBridge	165:d1b4690b3f8b	2597	CalibrationFactor << POSITION_VAL(SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK));
AnnaBridge	165:d1b4690b3f8b	2598	#endif
AnnaBridge	165:d1b4690b3f8b	2599	}
AnnaBridge	165:d1b4690b3f8b	2600
AnnaBridge	165:d1b4690b3f8b	2601	/**
AnnaBridge	165:d1b4690b3f8b	2602	* @brief Get ADC calibration factor in the mode single-ended
AnnaBridge	165:d1b4690b3f8b	2603	* or differential (for devices with differential mode available).
AnnaBridge	165:d1b4690b3f8b	2604	* @note Calibration factors are set by hardware after performing
AnnaBridge	165:d1b4690b3f8b	2605	* a calibration run using function @ref LL_ADC_StartCalibration().
AnnaBridge	165:d1b4690b3f8b	2606	* @note For devices with differential mode available:
AnnaBridge	165:d1b4690b3f8b	2607	* Calibration of offset is specific to each of
AnnaBridge	165:d1b4690b3f8b	2608	* single-ended and differential modes
AnnaBridge	165:d1b4690b3f8b	2609	* @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n
AnnaBridge	165:d1b4690b3f8b	2610	* CALFACT CALFACT_D LL_ADC_GetCalibrationFactor
AnnaBridge	165:d1b4690b3f8b	2611	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2612	* @param SingleDiff This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2613	* @arg @ref LL_ADC_SINGLE_ENDED
AnnaBridge	165:d1b4690b3f8b	2614	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
AnnaBridge	165:d1b4690b3f8b	2615	* @retval Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	165:d1b4690b3f8b	2616	*/
AnnaBridge	165:d1b4690b3f8b	2617	__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff)
AnnaBridge	165:d1b4690b3f8b	2618	{
AnnaBridge	165:d1b4690b3f8b	2619	/* Retrieve bits with position in register depending on parameter */
AnnaBridge	165:d1b4690b3f8b	2620	/* "SingleDiff". */
AnnaBridge	165:d1b4690b3f8b	2621	/* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */
AnnaBridge	165:d1b4690b3f8b	2622	/* containing other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	2623	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	2624	return (uint32_t)(READ_BIT(ADCx->CALFACT, (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4));
AnnaBridge	165:d1b4690b3f8b	2625	#else
AnnaBridge	165:d1b4690b3f8b	2626	return (uint32_t)(READ_BIT(ADCx->CALFACT, (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> POSITION_VAL(SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK));
AnnaBridge	165:d1b4690b3f8b	2627	#endif
AnnaBridge	165:d1b4690b3f8b	2628	}
AnnaBridge	165:d1b4690b3f8b	2629
AnnaBridge	165:d1b4690b3f8b	2630	/**
AnnaBridge	165:d1b4690b3f8b	2631	* @brief Set ADC resolution.
AnnaBridge	165:d1b4690b3f8b	2632	* Refer to reference manual for alignments formats
AnnaBridge	165:d1b4690b3f8b	2633	* dependencies to ADC resolutions.
AnnaBridge	165:d1b4690b3f8b	2634	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2635	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2636	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	2637	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	2638	* @rmtoll CFGR RES LL_ADC_SetResolution
AnnaBridge	165:d1b4690b3f8b	2639	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2640	* @param Resolution This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2641	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2642	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2643	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2644	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2645	* @retval None
AnnaBridge	165:d1b4690b3f8b	2646	*/
AnnaBridge	165:d1b4690b3f8b	2647	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
AnnaBridge	165:d1b4690b3f8b	2648	{
AnnaBridge	165:d1b4690b3f8b	2649	MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
AnnaBridge	165:d1b4690b3f8b	2650	}
AnnaBridge	165:d1b4690b3f8b	2651
AnnaBridge	165:d1b4690b3f8b	2652	/**
AnnaBridge	165:d1b4690b3f8b	2653	* @brief Get ADC resolution.
AnnaBridge	165:d1b4690b3f8b	2654	* Refer to reference manual for alignments formats
AnnaBridge	165:d1b4690b3f8b	2655	* dependencies to ADC resolutions.
AnnaBridge	165:d1b4690b3f8b	2656	* @rmtoll CFGR RES LL_ADC_GetResolution
AnnaBridge	165:d1b4690b3f8b	2657	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2658	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2659	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	165:d1b4690b3f8b	2660	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	165:d1b4690b3f8b	2661	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	165:d1b4690b3f8b	2662	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	165:d1b4690b3f8b	2663	*/
AnnaBridge	165:d1b4690b3f8b	2664	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	2665	{
AnnaBridge	165:d1b4690b3f8b	2666	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
AnnaBridge	165:d1b4690b3f8b	2667	}
AnnaBridge	165:d1b4690b3f8b	2668
AnnaBridge	165:d1b4690b3f8b	2669	/**
AnnaBridge	165:d1b4690b3f8b	2670	* @brief Set ADC conversion data alignment.
AnnaBridge	165:d1b4690b3f8b	2671	* @note Refer to reference manual for alignments formats
AnnaBridge	165:d1b4690b3f8b	2672	* dependencies to ADC resolutions.
AnnaBridge	165:d1b4690b3f8b	2673	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2674	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2675	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	2676	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	2677	* @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment
AnnaBridge	165:d1b4690b3f8b	2678	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2679	* @param DataAlignment This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2680	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	165:d1b4690b3f8b	2681	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	165:d1b4690b3f8b	2682	* @retval None
AnnaBridge	165:d1b4690b3f8b	2683	*/
AnnaBridge	165:d1b4690b3f8b	2684	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
AnnaBridge	165:d1b4690b3f8b	2685	{
AnnaBridge	165:d1b4690b3f8b	2686	MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment);
AnnaBridge	165:d1b4690b3f8b	2687	}
AnnaBridge	165:d1b4690b3f8b	2688
AnnaBridge	165:d1b4690b3f8b	2689	/**
AnnaBridge	165:d1b4690b3f8b	2690	* @brief Get ADC conversion data alignment.
AnnaBridge	165:d1b4690b3f8b	2691	* @note Refer to reference manual for alignments formats
AnnaBridge	165:d1b4690b3f8b	2692	* dependencies to ADC resolutions.
AnnaBridge	165:d1b4690b3f8b	2693	* @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment
AnnaBridge	165:d1b4690b3f8b	2694	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2695	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2696	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	165:d1b4690b3f8b	2697	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	165:d1b4690b3f8b	2698	*/
AnnaBridge	165:d1b4690b3f8b	2699	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	2700	{
AnnaBridge	165:d1b4690b3f8b	2701	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN));
AnnaBridge	165:d1b4690b3f8b	2702	}
AnnaBridge	165:d1b4690b3f8b	2703
AnnaBridge	165:d1b4690b3f8b	2704	/**
AnnaBridge	165:d1b4690b3f8b	2705	* @brief Set ADC low power mode.
AnnaBridge	165:d1b4690b3f8b	2706	* @note Description of ADC low power modes:
AnnaBridge	165:d1b4690b3f8b	2707	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	165:d1b4690b3f8b	2708	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	165:d1b4690b3f8b	2709	* in order to reduce power consumption.
AnnaBridge	165:d1b4690b3f8b	2710	* New ADC conversion starts only when the previous
AnnaBridge	165:d1b4690b3f8b	2711	* unitary conversion data (for ADC group regular)
AnnaBridge	165:d1b4690b3f8b	2712	* or previous sequence conversions data (for ADC group injected)
AnnaBridge	165:d1b4690b3f8b	2713	* has been retrieved by user software.
AnnaBridge	165:d1b4690b3f8b	2714	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	165:d1b4690b3f8b	2715	* other conversion.
AnnaBridge	165:d1b4690b3f8b	2716	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	165:d1b4690b3f8b	2717	* triggers to the speed of the software that reads the data.
AnnaBridge	165:d1b4690b3f8b	2718	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	165:d1b4690b3f8b	2719	* applications.
AnnaBridge	165:d1b4690b3f8b	2720	* How to use this low power mode:
AnnaBridge	165:d1b4690b3f8b	2721	* - Do not use with interruption or DMA since these modes
AnnaBridge	165:d1b4690b3f8b	2722	* have to clear immediately the EOC flag to free the
AnnaBridge	165:d1b4690b3f8b	2723	* IRQ vector sequencer.
AnnaBridge	165:d1b4690b3f8b	2724	* - Do use with polling: 1. Start conversion,
AnnaBridge	165:d1b4690b3f8b	2725	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	165:d1b4690b3f8b	2726	* conversion to ensure that conversion is completed and
AnnaBridge	165:d1b4690b3f8b	2727	* retrieve ADC conversion data. This will trig another
AnnaBridge	165:d1b4690b3f8b	2728	* ADC conversion start.
AnnaBridge	165:d1b4690b3f8b	2729	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	165:d1b4690b3f8b	2730	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	165:d1b4690b3f8b	2731	* the ADC automatically powers-off after a conversion and
AnnaBridge	165:d1b4690b3f8b	2732	* automatically wakes up when a new conversion is triggered
AnnaBridge	165:d1b4690b3f8b	2733	* (with startup time between trigger and start of sampling).
AnnaBridge	165:d1b4690b3f8b	2734	* This feature can be combined with low power mode "auto wait".
AnnaBridge	165:d1b4690b3f8b	2735	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	165:d1b4690b3f8b	2736	* is corresponding to previous ADC conversion start, independently
AnnaBridge	165:d1b4690b3f8b	2737	* of delay during which ADC was idle.
AnnaBridge	165:d1b4690b3f8b	2738	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	165:d1b4690b3f8b	2739	* correspond to the current voltage level on the selected
AnnaBridge	165:d1b4690b3f8b	2740	* ADC channel.
AnnaBridge	165:d1b4690b3f8b	2741	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2742	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2743	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	2744	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	2745	* @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode
AnnaBridge	165:d1b4690b3f8b	2746	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2747	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2748	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	165:d1b4690b3f8b	2749	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	165:d1b4690b3f8b	2750	* @retval None
AnnaBridge	165:d1b4690b3f8b	2751	*/
AnnaBridge	165:d1b4690b3f8b	2752	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
AnnaBridge	165:d1b4690b3f8b	2753	{
AnnaBridge	165:d1b4690b3f8b	2754	MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode);
AnnaBridge	165:d1b4690b3f8b	2755	}
AnnaBridge	165:d1b4690b3f8b	2756
AnnaBridge	165:d1b4690b3f8b	2757	/**
AnnaBridge	165:d1b4690b3f8b	2758	* @brief Get ADC low power mode:
AnnaBridge	165:d1b4690b3f8b	2759	* @note Description of ADC low power modes:
AnnaBridge	165:d1b4690b3f8b	2760	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	165:d1b4690b3f8b	2761	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	165:d1b4690b3f8b	2762	* in order to reduce power consumption.
AnnaBridge	165:d1b4690b3f8b	2763	* New ADC conversion starts only when the previous
AnnaBridge	165:d1b4690b3f8b	2764	* unitary conversion data (for ADC group regular)
AnnaBridge	165:d1b4690b3f8b	2765	* or previous sequence conversions data (for ADC group injected)
AnnaBridge	165:d1b4690b3f8b	2766	* has been retrieved by user software.
AnnaBridge	165:d1b4690b3f8b	2767	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	165:d1b4690b3f8b	2768	* other conversion.
AnnaBridge	165:d1b4690b3f8b	2769	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	165:d1b4690b3f8b	2770	* triggers to the speed of the software that reads the data.
AnnaBridge	165:d1b4690b3f8b	2771	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	165:d1b4690b3f8b	2772	* applications.
AnnaBridge	165:d1b4690b3f8b	2773	* How to use this low power mode:
AnnaBridge	165:d1b4690b3f8b	2774	* - Do not use with interruption or DMA since these modes
AnnaBridge	165:d1b4690b3f8b	2775	* have to clear immediately the EOC flag to free the
AnnaBridge	165:d1b4690b3f8b	2776	* IRQ vector sequencer.
AnnaBridge	165:d1b4690b3f8b	2777	* - Do use with polling: 1. Start conversion,
AnnaBridge	165:d1b4690b3f8b	2778	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	165:d1b4690b3f8b	2779	* conversion to ensure that conversion is completed and
AnnaBridge	165:d1b4690b3f8b	2780	* retrieve ADC conversion data. This will trig another
AnnaBridge	165:d1b4690b3f8b	2781	* ADC conversion start.
AnnaBridge	165:d1b4690b3f8b	2782	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	165:d1b4690b3f8b	2783	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	165:d1b4690b3f8b	2784	* the ADC automatically powers-off after a conversion and
AnnaBridge	165:d1b4690b3f8b	2785	* automatically wakes up when a new conversion is triggered
AnnaBridge	165:d1b4690b3f8b	2786	* (with startup time between trigger and start of sampling).
AnnaBridge	165:d1b4690b3f8b	2787	* This feature can be combined with low power mode "auto wait".
AnnaBridge	165:d1b4690b3f8b	2788	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	165:d1b4690b3f8b	2789	* is corresponding to previous ADC conversion start, independently
AnnaBridge	165:d1b4690b3f8b	2790	* of delay during which ADC was idle.
AnnaBridge	165:d1b4690b3f8b	2791	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	165:d1b4690b3f8b	2792	* correspond to the current voltage level on the selected
AnnaBridge	165:d1b4690b3f8b	2793	* ADC channel.
AnnaBridge	165:d1b4690b3f8b	2794	* @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode
AnnaBridge	165:d1b4690b3f8b	2795	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2796	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2797	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	165:d1b4690b3f8b	2798	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	165:d1b4690b3f8b	2799	*/
AnnaBridge	165:d1b4690b3f8b	2800	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	2801	{
AnnaBridge	165:d1b4690b3f8b	2802	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY));
AnnaBridge	165:d1b4690b3f8b	2803	}
AnnaBridge	165:d1b4690b3f8b	2804
AnnaBridge	165:d1b4690b3f8b	2805	/**
AnnaBridge	165:d1b4690b3f8b	2806	* @brief Set ADC selected offset number 1, 2, 3 or 4.
AnnaBridge	165:d1b4690b3f8b	2807	* @note This function set the 2 items of offset configuration:
AnnaBridge	165:d1b4690b3f8b	2808	* - ADC channel to which the offset programmed will be applied
AnnaBridge	165:d1b4690b3f8b	2809	* (independently of channel mapped on ADC group regular
AnnaBridge	165:d1b4690b3f8b	2810	* or group injected)
AnnaBridge	165:d1b4690b3f8b	2811	* - Offset level (offset to be subtracted from the raw
AnnaBridge	165:d1b4690b3f8b	2812	* converted data).
AnnaBridge	165:d1b4690b3f8b	2813	* @note Caution: Offset format is dependent to ADC resolution:
AnnaBridge	165:d1b4690b3f8b	2814	* offset has to be left-aligned on bit 11, the LSB (right bits)
AnnaBridge	165:d1b4690b3f8b	2815	* are set to 0.
AnnaBridge	165:d1b4690b3f8b	2816	* @note This function enables the offset, by default. It can be forced
AnnaBridge	165:d1b4690b3f8b	2817	* to disable state using function LL_ADC_SetOffsetState().
AnnaBridge	165:d1b4690b3f8b	2818	* @note If a channel is mapped on several offsets numbers, only the offset
AnnaBridge	165:d1b4690b3f8b	2819	* with the lowest value is considered for the subtraction.
AnnaBridge	165:d1b4690b3f8b	2820	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	2821	* ADC state:
AnnaBridge	165:d1b4690b3f8b	2822	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	2823	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	2824	* @note On STM32L4, some fast channels are available: fast analog inputs
AnnaBridge	165:d1b4690b3f8b	2825	* coming from GPIO pads (ADC_IN1..5).
AnnaBridge	165:d1b4690b3f8b	2826	* @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2827	* OFR1 OFFSET1 LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2828	* OFR1 OFFSET1_EN LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2829	* OFR2 OFFSET2_CH LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2830	* OFR2 OFFSET2 LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2831	* OFR2 OFFSET2_EN LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2832	* OFR3 OFFSET3_CH LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2833	* OFR3 OFFSET3 LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2834	* OFR3 OFFSET3_EN LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2835	* OFR4 OFFSET4_CH LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2836	* OFR4 OFFSET4 LL_ADC_SetOffset\n
AnnaBridge	165:d1b4690b3f8b	2837	* OFR4 OFFSET4_EN LL_ADC_SetOffset
AnnaBridge	165:d1b4690b3f8b	2838	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2839	* @param Offsety This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2840	* @arg @ref LL_ADC_OFFSET_1
AnnaBridge	165:d1b4690b3f8b	2841	* @arg @ref LL_ADC_OFFSET_2
AnnaBridge	165:d1b4690b3f8b	2842	* @arg @ref LL_ADC_OFFSET_3
AnnaBridge	165:d1b4690b3f8b	2843	* @arg @ref LL_ADC_OFFSET_4
AnnaBridge	165:d1b4690b3f8b	2844	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2845	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	2846	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	2847	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	2848	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	2849	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	2850	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	2851	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	2852	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	2853	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	2854	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	2855	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	2856	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	2857	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	2858	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	2859	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	2860	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	2861	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	2862	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	2863	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	2864	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	2865	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	2866	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	2867	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	2868	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	2869	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	2870	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	2871	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	2872	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	2873	*
AnnaBridge	165:d1b4690b3f8b	2874	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	2875	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	2876	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	2877	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	2878	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	2879	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	2880	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	2881	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	2882	* @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	2883	* @retval None
AnnaBridge	165:d1b4690b3f8b	2884	*/
AnnaBridge	165:d1b4690b3f8b	2885	__STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32_t OffsetLevel)
AnnaBridge	165:d1b4690b3f8b	2886	{
AnnaBridge	165:d1b4690b3f8b	2887	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
AnnaBridge	165:d1b4690b3f8b	2888
AnnaBridge	165:d1b4690b3f8b	2889	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	2890	ADC_OFR1_OFFSET1_EN \| ADC_OFR1_OFFSET1_CH \| ADC_OFR1_OFFSET1,
AnnaBridge	165:d1b4690b3f8b	2891	ADC_OFR1_OFFSET1_EN \| (Channel & ADC_CHANNEL_ID_NUMBER_MASK) \| OffsetLevel);
AnnaBridge	165:d1b4690b3f8b	2892	}
AnnaBridge	165:d1b4690b3f8b	2893
AnnaBridge	165:d1b4690b3f8b	2894	/**
AnnaBridge	165:d1b4690b3f8b	2895	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
AnnaBridge	165:d1b4690b3f8b	2896	* Channel to which the offset programmed will be applied
AnnaBridge	165:d1b4690b3f8b	2897	* (independently of channel mapped on ADC group regular
AnnaBridge	165:d1b4690b3f8b	2898	* or group injected)
AnnaBridge	165:d1b4690b3f8b	2899	* @note Usage of the returned channel number:
AnnaBridge	165:d1b4690b3f8b	2900	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	165:d1b4690b3f8b	2901	* the returned channel number is only partly formatted on definition
AnnaBridge	165:d1b4690b3f8b	2902	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	165:d1b4690b3f8b	2903	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	165:d1b4690b3f8b	2904	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	2905	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	165:d1b4690b3f8b	2906	* as parameter for another function.
AnnaBridge	165:d1b4690b3f8b	2907	* - To get the channel number in decimal format:
AnnaBridge	165:d1b4690b3f8b	2908	* process the returned value with the helper macro
AnnaBridge	165:d1b4690b3f8b	2909	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	2910	* @note On STM32L4, some fast channels are available: fast analog inputs
AnnaBridge	165:d1b4690b3f8b	2911	* coming from GPIO pads (ADC_IN1..5).
AnnaBridge	165:d1b4690b3f8b	2912	* @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n
AnnaBridge	165:d1b4690b3f8b	2913	* OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n
AnnaBridge	165:d1b4690b3f8b	2914	* OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n
AnnaBridge	165:d1b4690b3f8b	2915	* OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel
AnnaBridge	165:d1b4690b3f8b	2916	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2917	* @param Offsety This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2918	* @arg @ref LL_ADC_OFFSET_1
AnnaBridge	165:d1b4690b3f8b	2919	* @arg @ref LL_ADC_OFFSET_2
AnnaBridge	165:d1b4690b3f8b	2920	* @arg @ref LL_ADC_OFFSET_3
AnnaBridge	165:d1b4690b3f8b	2921	* @arg @ref LL_ADC_OFFSET_4
AnnaBridge	165:d1b4690b3f8b	2922	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2923	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	2924	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	2925	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	2926	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	2927	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	2928	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	2929	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	2930	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	2931	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	2932	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	2933	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	2934	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	2935	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	2936	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	2937	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	2938	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	2939	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	2940	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	2941	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	2942	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	2943	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	2944	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	2945	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	2946	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	2947	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	2948	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	2949	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	2950	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	2951	*
AnnaBridge	165:d1b4690b3f8b	2952	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	2953	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	2954	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	2955	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	2956	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	2957	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	2958	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	2959	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
AnnaBridge	165:d1b4690b3f8b	2960	* (1, 2, 3, 4) For ADC channel read back from ADC register,
AnnaBridge	165:d1b4690b3f8b	2961	* comparison with internal channel parameter to be done
AnnaBridge	165:d1b4690b3f8b	2962	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	165:d1b4690b3f8b	2963	*/
AnnaBridge	165:d1b4690b3f8b	2964	__STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(ADC_TypeDef *ADCx, uint32_t Offsety)
AnnaBridge	165:d1b4690b3f8b	2965	{
AnnaBridge	165:d1b4690b3f8b	2966	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
AnnaBridge	165:d1b4690b3f8b	2967
AnnaBridge	165:d1b4690b3f8b	2968	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH);
AnnaBridge	165:d1b4690b3f8b	2969	}
AnnaBridge	165:d1b4690b3f8b	2970
AnnaBridge	165:d1b4690b3f8b	2971	/**
AnnaBridge	165:d1b4690b3f8b	2972	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
AnnaBridge	165:d1b4690b3f8b	2973	* Offset level (offset to be subtracted from the raw
AnnaBridge	165:d1b4690b3f8b	2974	* converted data).
AnnaBridge	165:d1b4690b3f8b	2975	* @note Caution: Offset format is dependent to ADC resolution:
AnnaBridge	165:d1b4690b3f8b	2976	* offset has to be left-aligned on bit 11, the LSB (right bits)
AnnaBridge	165:d1b4690b3f8b	2977	* are set to 0.
AnnaBridge	165:d1b4690b3f8b	2978	* @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n
AnnaBridge	165:d1b4690b3f8b	2979	* OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n
AnnaBridge	165:d1b4690b3f8b	2980	* OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n
AnnaBridge	165:d1b4690b3f8b	2981	* OFR4 OFFSET4 LL_ADC_GetOffsetLevel
AnnaBridge	165:d1b4690b3f8b	2982	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	2983	* @param Offsety This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	2984	* @arg @ref LL_ADC_OFFSET_1
AnnaBridge	165:d1b4690b3f8b	2985	* @arg @ref LL_ADC_OFFSET_2
AnnaBridge	165:d1b4690b3f8b	2986	* @arg @ref LL_ADC_OFFSET_3
AnnaBridge	165:d1b4690b3f8b	2987	* @arg @ref LL_ADC_OFFSET_4
AnnaBridge	165:d1b4690b3f8b	2988	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	2989	*/
AnnaBridge	165:d1b4690b3f8b	2990	__STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(ADC_TypeDef *ADCx, uint32_t Offsety)
AnnaBridge	165:d1b4690b3f8b	2991	{
AnnaBridge	165:d1b4690b3f8b	2992	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
AnnaBridge	165:d1b4690b3f8b	2993
AnnaBridge	165:d1b4690b3f8b	2994	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1);
AnnaBridge	165:d1b4690b3f8b	2995	}
AnnaBridge	165:d1b4690b3f8b	2996
AnnaBridge	165:d1b4690b3f8b	2997	/**
AnnaBridge	165:d1b4690b3f8b	2998	* @brief Set for the ADC selected offset number 1, 2, 3 or 4:
AnnaBridge	165:d1b4690b3f8b	2999	* force offset state disable or enable
AnnaBridge	165:d1b4690b3f8b	3000	* without modifying offset channel or offset value.
AnnaBridge	165:d1b4690b3f8b	3001	* @note This function should be needed only in case of offset to be
AnnaBridge	165:d1b4690b3f8b	3002	* enabled-disabled dynamically, and should not be needed in other cases:
AnnaBridge	165:d1b4690b3f8b	3003	* function LL_ADC_SetOffset() automatically enables the offset.
AnnaBridge	165:d1b4690b3f8b	3004	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3005	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3006	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3007	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3008	* @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3009	* OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3010	* OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3011	* OFR4 OFFSET4_EN LL_ADC_SetOffsetState
AnnaBridge	165:d1b4690b3f8b	3012	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3013	* @param Offsety This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3014	* @arg @ref LL_ADC_OFFSET_1
AnnaBridge	165:d1b4690b3f8b	3015	* @arg @ref LL_ADC_OFFSET_2
AnnaBridge	165:d1b4690b3f8b	3016	* @arg @ref LL_ADC_OFFSET_3
AnnaBridge	165:d1b4690b3f8b	3017	* @arg @ref LL_ADC_OFFSET_4
AnnaBridge	165:d1b4690b3f8b	3018	* @param OffsetState This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3019	* @arg @ref LL_ADC_OFFSET_DISABLE
AnnaBridge	165:d1b4690b3f8b	3020	* @arg @ref LL_ADC_OFFSET_ENABLE
AnnaBridge	165:d1b4690b3f8b	3021	* @retval None
AnnaBridge	165:d1b4690b3f8b	3022	*/
AnnaBridge	165:d1b4690b3f8b	3023	__STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetState)
AnnaBridge	165:d1b4690b3f8b	3024	{
AnnaBridge	165:d1b4690b3f8b	3025	register uint32_t preg = (uint32_t )((uint32_t)
AnnaBridge	165:d1b4690b3f8b	3026	((uint32_t)(&ADCx->OFR1) + (Offsety*4U)));
AnnaBridge	165:d1b4690b3f8b	3027
AnnaBridge	165:d1b4690b3f8b	3028	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	3029	ADC_OFR1_OFFSET1_EN,
AnnaBridge	165:d1b4690b3f8b	3030	OffsetState);
AnnaBridge	165:d1b4690b3f8b	3031	}
AnnaBridge	165:d1b4690b3f8b	3032
AnnaBridge	165:d1b4690b3f8b	3033	/**
AnnaBridge	165:d1b4690b3f8b	3034	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
AnnaBridge	165:d1b4690b3f8b	3035	* offset state disabled or enabled.
AnnaBridge	165:d1b4690b3f8b	3036	* @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3037	* OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3038	* OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n
AnnaBridge	165:d1b4690b3f8b	3039	* OFR4 OFFSET4_EN LL_ADC_GetOffsetState
AnnaBridge	165:d1b4690b3f8b	3040	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3041	* @param Offsety This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3042	* @arg @ref LL_ADC_OFFSET_1
AnnaBridge	165:d1b4690b3f8b	3043	* @arg @ref LL_ADC_OFFSET_2
AnnaBridge	165:d1b4690b3f8b	3044	* @arg @ref LL_ADC_OFFSET_3
AnnaBridge	165:d1b4690b3f8b	3045	* @arg @ref LL_ADC_OFFSET_4
AnnaBridge	165:d1b4690b3f8b	3046	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3047	* @arg @ref LL_ADC_OFFSET_DISABLE
AnnaBridge	165:d1b4690b3f8b	3048	* @arg @ref LL_ADC_OFFSET_ENABLE
AnnaBridge	165:d1b4690b3f8b	3049	*/
AnnaBridge	165:d1b4690b3f8b	3050	__STATIC_INLINE uint32_t LL_ADC_GetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety)
AnnaBridge	165:d1b4690b3f8b	3051	{
AnnaBridge	165:d1b4690b3f8b	3052	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
AnnaBridge	165:d1b4690b3f8b	3053
AnnaBridge	165:d1b4690b3f8b	3054	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN);
AnnaBridge	165:d1b4690b3f8b	3055	}
AnnaBridge	165:d1b4690b3f8b	3056
AnnaBridge	165:d1b4690b3f8b	3057	#if defined(ADC_SMPR1_SMPPLUS)
AnnaBridge	165:d1b4690b3f8b	3058	/**
AnnaBridge	165:d1b4690b3f8b	3059	* @brief Set ADC sampling time common configuration impacting
AnnaBridge	165:d1b4690b3f8b	3060	* settings of sampling time channel wise.
AnnaBridge	165:d1b4690b3f8b	3061	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3062	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3063	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3064	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3065	* @rmtoll SMPR1 SMPPLUS LL_ADC_SetSamplingTimeCommonConfig
AnnaBridge	165:d1b4690b3f8b	3066	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3067	* @param SamplingTimeCommonConfig This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3068	* @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT
AnnaBridge	165:d1b4690b3f8b	3069	* @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5
AnnaBridge	165:d1b4690b3f8b	3070	* @retval None
AnnaBridge	165:d1b4690b3f8b	3071	*/
AnnaBridge	165:d1b4690b3f8b	3072	__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonConfig(ADC_TypeDef *ADCx, uint32_t SamplingTimeCommonConfig)
AnnaBridge	165:d1b4690b3f8b	3073	{
AnnaBridge	165:d1b4690b3f8b	3074	MODIFY_REG(ADCx->SMPR1, ADC_SMPR1_SMPPLUS, SamplingTimeCommonConfig);
AnnaBridge	165:d1b4690b3f8b	3075	}
AnnaBridge	165:d1b4690b3f8b	3076
AnnaBridge	165:d1b4690b3f8b	3077	/**
AnnaBridge	165:d1b4690b3f8b	3078	* @brief Get ADC sampling time common configuration impacting
AnnaBridge	165:d1b4690b3f8b	3079	* settings of sampling time channel wise.
AnnaBridge	165:d1b4690b3f8b	3080	* @rmtoll SMPR1 SMPPLUS LL_ADC_GetSamplingTimeCommonConfig
AnnaBridge	165:d1b4690b3f8b	3081	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3082	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3083	* @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT
AnnaBridge	165:d1b4690b3f8b	3084	* @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5
AnnaBridge	165:d1b4690b3f8b	3085	*/
AnnaBridge	165:d1b4690b3f8b	3086	__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonConfig(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3087	{
AnnaBridge	165:d1b4690b3f8b	3088	return (uint32_t)(READ_BIT(ADCx->SMPR1, ADC_SMPR1_SMPPLUS));
AnnaBridge	165:d1b4690b3f8b	3089	}
AnnaBridge	165:d1b4690b3f8b	3090	#endif /* ADC_SMPR1_SMPPLUS */
AnnaBridge	165:d1b4690b3f8b	3091
AnnaBridge	165:d1b4690b3f8b	3092	/**
AnnaBridge	165:d1b4690b3f8b	3093	* @}
AnnaBridge	165:d1b4690b3f8b	3094	*/
AnnaBridge	165:d1b4690b3f8b	3095
AnnaBridge	165:d1b4690b3f8b	3096	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
AnnaBridge	165:d1b4690b3f8b	3097	* @{
AnnaBridge	165:d1b4690b3f8b	3098	*/
AnnaBridge	165:d1b4690b3f8b	3099
AnnaBridge	165:d1b4690b3f8b	3100	/**
AnnaBridge	165:d1b4690b3f8b	3101	* @brief Set ADC group regular conversion trigger source:
AnnaBridge	165:d1b4690b3f8b	3102	* internal (SW start) or from external IP (timer event,
AnnaBridge	165:d1b4690b3f8b	3103	* external interrupt line).
AnnaBridge	165:d1b4690b3f8b	3104	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	165:d1b4690b3f8b	3105	* also set trigger polarity to rising edge
AnnaBridge	165:d1b4690b3f8b	3106	* (default setting for compatibility with some ADC on other
AnnaBridge	165:d1b4690b3f8b	3107	* STM32 families having this setting set by HW default value).
AnnaBridge	165:d1b4690b3f8b	3108	* In case of need to modify trigger edge, use
AnnaBridge	165:d1b4690b3f8b	3109	* function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	165:d1b4690b3f8b	3110	* @note Availability of parameters of trigger sources from timer
AnnaBridge	165:d1b4690b3f8b	3111	* depends on timers availability on the selected device.
AnnaBridge	165:d1b4690b3f8b	3112	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3113	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3114	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3115	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3116	* @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n
AnnaBridge	165:d1b4690b3f8b	3117	* CFGR EXTEN LL_ADC_REG_SetTriggerSource
AnnaBridge	165:d1b4690b3f8b	3118	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3119	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3120	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	165:d1b4690b3f8b	3121	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
AnnaBridge	165:d1b4690b3f8b	3122	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
AnnaBridge	165:d1b4690b3f8b	3123	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
AnnaBridge	165:d1b4690b3f8b	3124	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
AnnaBridge	165:d1b4690b3f8b	3125	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
AnnaBridge	165:d1b4690b3f8b	3126	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	165:d1b4690b3f8b	3127	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
AnnaBridge	165:d1b4690b3f8b	3128	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	165:d1b4690b3f8b	3129	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
AnnaBridge	165:d1b4690b3f8b	3130	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
AnnaBridge	165:d1b4690b3f8b	3131	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
AnnaBridge	165:d1b4690b3f8b	3132	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	165:d1b4690b3f8b	3133	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
AnnaBridge	165:d1b4690b3f8b	3134	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
AnnaBridge	165:d1b4690b3f8b	3135	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
AnnaBridge	165:d1b4690b3f8b	3136	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	165:d1b4690b3f8b	3137	* @retval None
AnnaBridge	165:d1b4690b3f8b	3138	*/
AnnaBridge	165:d1b4690b3f8b	3139	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	165:d1b4690b3f8b	3140	{
AnnaBridge	165:d1b4690b3f8b	3141	MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN \| ADC_CFGR_EXTSEL, TriggerSource);
AnnaBridge	165:d1b4690b3f8b	3142	}
AnnaBridge	165:d1b4690b3f8b	3143
AnnaBridge	165:d1b4690b3f8b	3144	/**
AnnaBridge	165:d1b4690b3f8b	3145	* @brief Get ADC group regular conversion trigger source:
AnnaBridge	165:d1b4690b3f8b	3146	* internal (SW start) or from external IP (timer event,
AnnaBridge	165:d1b4690b3f8b	3147	* external interrupt line).
AnnaBridge	165:d1b4690b3f8b	3148	* @note To determine whether group regular trigger source is
AnnaBridge	165:d1b4690b3f8b	3149	* internal (SW start) or external, without detail
AnnaBridge	165:d1b4690b3f8b	3150	* of which peripheral is selected as external trigger,
AnnaBridge	165:d1b4690b3f8b	3151	* (equivalent to
AnnaBridge	165:d1b4690b3f8b	3152	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
AnnaBridge	165:d1b4690b3f8b	3153	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
AnnaBridge	165:d1b4690b3f8b	3154	* @note Availability of parameters of trigger sources from timer
AnnaBridge	165:d1b4690b3f8b	3155	* depends on timers availability on the selected device.
AnnaBridge	165:d1b4690b3f8b	3156	* @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n
AnnaBridge	165:d1b4690b3f8b	3157	* CFGR EXTEN LL_ADC_REG_GetTriggerSource
AnnaBridge	165:d1b4690b3f8b	3158	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3159	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3160	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	165:d1b4690b3f8b	3161	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
AnnaBridge	165:d1b4690b3f8b	3162	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
AnnaBridge	165:d1b4690b3f8b	3163	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
AnnaBridge	165:d1b4690b3f8b	3164	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
AnnaBridge	165:d1b4690b3f8b	3165	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
AnnaBridge	165:d1b4690b3f8b	3166	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	165:d1b4690b3f8b	3167	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
AnnaBridge	165:d1b4690b3f8b	3168	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	165:d1b4690b3f8b	3169	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
AnnaBridge	165:d1b4690b3f8b	3170	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
AnnaBridge	165:d1b4690b3f8b	3171	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
AnnaBridge	165:d1b4690b3f8b	3172	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	165:d1b4690b3f8b	3173	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
AnnaBridge	165:d1b4690b3f8b	3174	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
AnnaBridge	165:d1b4690b3f8b	3175	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
AnnaBridge	165:d1b4690b3f8b	3176	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	165:d1b4690b3f8b	3177	*/
AnnaBridge	165:d1b4690b3f8b	3178	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3179	{
AnnaBridge	165:d1b4690b3f8b	3180	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL \| ADC_CFGR_EXTEN);
AnnaBridge	165:d1b4690b3f8b	3181
AnnaBridge	165:d1b4690b3f8b	3182	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	165:d1b4690b3f8b	3183	/* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */
AnnaBridge	165:d1b4690b3f8b	3184	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	165:d1b4690b3f8b	3185
AnnaBridge	165:d1b4690b3f8b	3186	/* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */
AnnaBridge	165:d1b4690b3f8b	3187	/* to match with triggers literals definition. */
AnnaBridge	165:d1b4690b3f8b	3188	return ((TriggerSource
AnnaBridge	165:d1b4690b3f8b	3189	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL)
AnnaBridge	165:d1b4690b3f8b	3190	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN)
AnnaBridge	165:d1b4690b3f8b	3191	);
AnnaBridge	165:d1b4690b3f8b	3192	}
AnnaBridge	165:d1b4690b3f8b	3193
AnnaBridge	165:d1b4690b3f8b	3194	/**
AnnaBridge	165:d1b4690b3f8b	3195	* @brief Get ADC group regular conversion trigger source internal (SW start)
AnnaBridge	165:d1b4690b3f8b	3196	or external.
AnnaBridge	165:d1b4690b3f8b	3197	* @note In case of group regular trigger source set to external trigger,
AnnaBridge	165:d1b4690b3f8b	3198	* to determine which peripheral is selected as external trigger,
AnnaBridge	165:d1b4690b3f8b	3199	* use function @ref LL_ADC_REG_GetTriggerSource().
AnnaBridge	165:d1b4690b3f8b	3200	* @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart
AnnaBridge	165:d1b4690b3f8b	3201	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3202	* @retval Value "0" if trigger source external trigger
AnnaBridge	165:d1b4690b3f8b	3203	* Value "1" if trigger source SW start.
AnnaBridge	165:d1b4690b3f8b	3204	*/
AnnaBridge	165:d1b4690b3f8b	3205	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3206	{
AnnaBridge	165:d1b4690b3f8b	3207	return (READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN));
AnnaBridge	165:d1b4690b3f8b	3208	}
AnnaBridge	165:d1b4690b3f8b	3209
AnnaBridge	165:d1b4690b3f8b	3210	/**
AnnaBridge	165:d1b4690b3f8b	3211	* @brief Set ADC group regular conversion trigger polarity.
AnnaBridge	165:d1b4690b3f8b	3212	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	165:d1b4690b3f8b	3213	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3214	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3215	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3216	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3217	* @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge
AnnaBridge	165:d1b4690b3f8b	3218	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3219	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3220	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	165:d1b4690b3f8b	3221	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	165:d1b4690b3f8b	3222	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	165:d1b4690b3f8b	3223	* @retval None
AnnaBridge	165:d1b4690b3f8b	3224	*/
AnnaBridge	165:d1b4690b3f8b	3225	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	165:d1b4690b3f8b	3226	{
AnnaBridge	165:d1b4690b3f8b	3227	MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge);
AnnaBridge	165:d1b4690b3f8b	3228	}
AnnaBridge	165:d1b4690b3f8b	3229
AnnaBridge	165:d1b4690b3f8b	3230	/**
AnnaBridge	165:d1b4690b3f8b	3231	* @brief Get ADC group regular conversion trigger polarity.
AnnaBridge	165:d1b4690b3f8b	3232	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	165:d1b4690b3f8b	3233	* @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge
AnnaBridge	165:d1b4690b3f8b	3234	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3235	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3236	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	165:d1b4690b3f8b	3237	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	165:d1b4690b3f8b	3238	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	165:d1b4690b3f8b	3239	*/
AnnaBridge	165:d1b4690b3f8b	3240	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3241	{
AnnaBridge	165:d1b4690b3f8b	3242	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN));
AnnaBridge	165:d1b4690b3f8b	3243	}
AnnaBridge	165:d1b4690b3f8b	3244
AnnaBridge	165:d1b4690b3f8b	3245	/**
AnnaBridge	165:d1b4690b3f8b	3246	* @brief Set ADC group regular sequencer length and scan direction.
AnnaBridge	165:d1b4690b3f8b	3247	* @note Description of ADC group regular sequencer features:
AnnaBridge	165:d1b4690b3f8b	3248	* - For devices with sequencer fully configurable
AnnaBridge	165:d1b4690b3f8b	3249	* (function "LL_ADC_REG_SetSequencerRanks()" available):
AnnaBridge	165:d1b4690b3f8b	3250	* sequencer length and each rank affectation to a channel
AnnaBridge	165:d1b4690b3f8b	3251	* are configurable.
AnnaBridge	165:d1b4690b3f8b	3252	* This function performs configuration of:
AnnaBridge	165:d1b4690b3f8b	3253	* - Sequence length: Number of ranks in the scan sequence.
AnnaBridge	165:d1b4690b3f8b	3254	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	3255	* scan direction is forward (from rank 1 to rank n).
AnnaBridge	165:d1b4690b3f8b	3256	* Sequencer ranks are selected using
AnnaBridge	165:d1b4690b3f8b	3257	* function "LL_ADC_REG_SetSequencerRanks()".
AnnaBridge	165:d1b4690b3f8b	3258	* - For devices with sequencer not fully configurable
AnnaBridge	165:d1b4690b3f8b	3259	* (function "LL_ADC_REG_SetSequencerChannels()" available):
AnnaBridge	165:d1b4690b3f8b	3260	* sequencer length and each rank affectation to a channel
AnnaBridge	165:d1b4690b3f8b	3261	* are defined by channel number.
AnnaBridge	165:d1b4690b3f8b	3262	* This function performs configuration of:
AnnaBridge	165:d1b4690b3f8b	3263	* - Sequence length: Number of ranks in the scan sequence is
AnnaBridge	165:d1b4690b3f8b	3264	* defined by number of channels set in the sequence,
AnnaBridge	165:d1b4690b3f8b	3265	* rank of each channel is fixed by channel HW number.
AnnaBridge	165:d1b4690b3f8b	3266	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	165:d1b4690b3f8b	3267	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	3268	* scan direction is forward (from lowest channel number to
AnnaBridge	165:d1b4690b3f8b	3269	* highest channel number).
AnnaBridge	165:d1b4690b3f8b	3270	* Sequencer ranks are selected using
AnnaBridge	165:d1b4690b3f8b	3271	* function "LL_ADC_REG_SetSequencerChannels()".
AnnaBridge	165:d1b4690b3f8b	3272	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
AnnaBridge	165:d1b4690b3f8b	3273	* ADC conversion on only 1 channel.
AnnaBridge	165:d1b4690b3f8b	3274	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3275	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3276	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3277	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3278	* @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength
AnnaBridge	165:d1b4690b3f8b	3279	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3280	* @param SequencerNbRanks This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3281	* @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
AnnaBridge	165:d1b4690b3f8b	3282	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
AnnaBridge	165:d1b4690b3f8b	3283	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
AnnaBridge	165:d1b4690b3f8b	3284	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
AnnaBridge	165:d1b4690b3f8b	3285	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
AnnaBridge	165:d1b4690b3f8b	3286	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
AnnaBridge	165:d1b4690b3f8b	3287	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
AnnaBridge	165:d1b4690b3f8b	3288	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
AnnaBridge	165:d1b4690b3f8b	3289	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
AnnaBridge	165:d1b4690b3f8b	3290	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
AnnaBridge	165:d1b4690b3f8b	3291	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
AnnaBridge	165:d1b4690b3f8b	3292	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
AnnaBridge	165:d1b4690b3f8b	3293	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
AnnaBridge	165:d1b4690b3f8b	3294	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
AnnaBridge	165:d1b4690b3f8b	3295	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
AnnaBridge	165:d1b4690b3f8b	3296	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
AnnaBridge	165:d1b4690b3f8b	3297	* @retval None
AnnaBridge	165:d1b4690b3f8b	3298	*/
AnnaBridge	165:d1b4690b3f8b	3299	__STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
AnnaBridge	165:d1b4690b3f8b	3300	{
AnnaBridge	165:d1b4690b3f8b	3301	MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks);
AnnaBridge	165:d1b4690b3f8b	3302	}
AnnaBridge	165:d1b4690b3f8b	3303
AnnaBridge	165:d1b4690b3f8b	3304	/**
AnnaBridge	165:d1b4690b3f8b	3305	* @brief Get ADC group regular sequencer length and scan direction.
AnnaBridge	165:d1b4690b3f8b	3306	* @note Description of ADC group regular sequencer features:
AnnaBridge	165:d1b4690b3f8b	3307	* - For devices with sequencer fully configurable
AnnaBridge	165:d1b4690b3f8b	3308	* (function "LL_ADC_REG_SetSequencerRanks()" available):
AnnaBridge	165:d1b4690b3f8b	3309	* sequencer length and each rank affectation to a channel
AnnaBridge	165:d1b4690b3f8b	3310	* are configurable.
AnnaBridge	165:d1b4690b3f8b	3311	* This function retrieves:
AnnaBridge	165:d1b4690b3f8b	3312	* - Sequence length: Number of ranks in the scan sequence.
AnnaBridge	165:d1b4690b3f8b	3313	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	3314	* scan direction is forward (from rank 1 to rank n).
AnnaBridge	165:d1b4690b3f8b	3315	* Sequencer ranks are selected using
AnnaBridge	165:d1b4690b3f8b	3316	* function "LL_ADC_REG_SetSequencerRanks()".
AnnaBridge	165:d1b4690b3f8b	3317	* - For devices with sequencer not fully configurable
AnnaBridge	165:d1b4690b3f8b	3318	* (function "LL_ADC_REG_SetSequencerChannels()" available):
AnnaBridge	165:d1b4690b3f8b	3319	* sequencer length and each rank affectation to a channel
AnnaBridge	165:d1b4690b3f8b	3320	* are defined by channel number.
AnnaBridge	165:d1b4690b3f8b	3321	* This function retrieves:
AnnaBridge	165:d1b4690b3f8b	3322	* - Sequence length: Number of ranks in the scan sequence is
AnnaBridge	165:d1b4690b3f8b	3323	* defined by number of channels set in the sequence,
AnnaBridge	165:d1b4690b3f8b	3324	* rank of each channel is fixed by channel HW number.
AnnaBridge	165:d1b4690b3f8b	3325	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	165:d1b4690b3f8b	3326	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	3327	* scan direction is forward (from lowest channel number to
AnnaBridge	165:d1b4690b3f8b	3328	* highest channel number).
AnnaBridge	165:d1b4690b3f8b	3329	* Sequencer ranks are selected using
AnnaBridge	165:d1b4690b3f8b	3330	* function "LL_ADC_REG_SetSequencerChannels()".
AnnaBridge	165:d1b4690b3f8b	3331	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
AnnaBridge	165:d1b4690b3f8b	3332	* ADC conversion on only 1 channel.
AnnaBridge	165:d1b4690b3f8b	3333	* @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength
AnnaBridge	165:d1b4690b3f8b	3334	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3335	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3336	* @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
AnnaBridge	165:d1b4690b3f8b	3337	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
AnnaBridge	165:d1b4690b3f8b	3338	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
AnnaBridge	165:d1b4690b3f8b	3339	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
AnnaBridge	165:d1b4690b3f8b	3340	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
AnnaBridge	165:d1b4690b3f8b	3341	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
AnnaBridge	165:d1b4690b3f8b	3342	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
AnnaBridge	165:d1b4690b3f8b	3343	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
AnnaBridge	165:d1b4690b3f8b	3344	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
AnnaBridge	165:d1b4690b3f8b	3345	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
AnnaBridge	165:d1b4690b3f8b	3346	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
AnnaBridge	165:d1b4690b3f8b	3347	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
AnnaBridge	165:d1b4690b3f8b	3348	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
AnnaBridge	165:d1b4690b3f8b	3349	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
AnnaBridge	165:d1b4690b3f8b	3350	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
AnnaBridge	165:d1b4690b3f8b	3351	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
AnnaBridge	165:d1b4690b3f8b	3352	*/
AnnaBridge	165:d1b4690b3f8b	3353	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3354	{
AnnaBridge	165:d1b4690b3f8b	3355	return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L));
AnnaBridge	165:d1b4690b3f8b	3356	}
AnnaBridge	165:d1b4690b3f8b	3357
AnnaBridge	165:d1b4690b3f8b	3358	/**
AnnaBridge	165:d1b4690b3f8b	3359	* @brief Set ADC group regular sequencer discontinuous mode:
AnnaBridge	165:d1b4690b3f8b	3360	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	165:d1b4690b3f8b	3361	* number of ranks.
AnnaBridge	165:d1b4690b3f8b	3362	* @note It is not possible to enable both ADC group regular
AnnaBridge	165:d1b4690b3f8b	3363	* continuous mode and sequencer discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	3364	* @note It is not possible to enable both ADC auto-injected mode
AnnaBridge	165:d1b4690b3f8b	3365	* and ADC group regular sequencer discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	3366	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3367	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3368	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3369	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3370	* @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n
AnnaBridge	165:d1b4690b3f8b	3371	* CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont
AnnaBridge	165:d1b4690b3f8b	3372	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3373	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3374	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	165:d1b4690b3f8b	3375	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	165:d1b4690b3f8b	3376	* @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
AnnaBridge	165:d1b4690b3f8b	3377	* @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
AnnaBridge	165:d1b4690b3f8b	3378	* @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
AnnaBridge	165:d1b4690b3f8b	3379	* @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
AnnaBridge	165:d1b4690b3f8b	3380	* @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
AnnaBridge	165:d1b4690b3f8b	3381	* @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
AnnaBridge	165:d1b4690b3f8b	3382	* @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
AnnaBridge	165:d1b4690b3f8b	3383	* @retval None
AnnaBridge	165:d1b4690b3f8b	3384	*/
AnnaBridge	165:d1b4690b3f8b	3385	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	165:d1b4690b3f8b	3386	{
AnnaBridge	165:d1b4690b3f8b	3387	MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN \| ADC_CFGR_DISCNUM, SeqDiscont);
AnnaBridge	165:d1b4690b3f8b	3388	}
AnnaBridge	165:d1b4690b3f8b	3389
AnnaBridge	165:d1b4690b3f8b	3390	/**
AnnaBridge	165:d1b4690b3f8b	3391	* @brief Get ADC group regular sequencer discontinuous mode:
AnnaBridge	165:d1b4690b3f8b	3392	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	165:d1b4690b3f8b	3393	* number of ranks.
AnnaBridge	165:d1b4690b3f8b	3394	* @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n
AnnaBridge	165:d1b4690b3f8b	3395	* CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont
AnnaBridge	165:d1b4690b3f8b	3396	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3397	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3398	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	165:d1b4690b3f8b	3399	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	165:d1b4690b3f8b	3400	* @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
AnnaBridge	165:d1b4690b3f8b	3401	* @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
AnnaBridge	165:d1b4690b3f8b	3402	* @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
AnnaBridge	165:d1b4690b3f8b	3403	* @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
AnnaBridge	165:d1b4690b3f8b	3404	* @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
AnnaBridge	165:d1b4690b3f8b	3405	* @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
AnnaBridge	165:d1b4690b3f8b	3406	* @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
AnnaBridge	165:d1b4690b3f8b	3407	*/
AnnaBridge	165:d1b4690b3f8b	3408	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3409	{
AnnaBridge	165:d1b4690b3f8b	3410	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN \| ADC_CFGR_DISCNUM));
AnnaBridge	165:d1b4690b3f8b	3411	}
AnnaBridge	165:d1b4690b3f8b	3412
AnnaBridge	165:d1b4690b3f8b	3413	/**
AnnaBridge	165:d1b4690b3f8b	3414	* @brief Set ADC group regular sequence: channel on the selected
AnnaBridge	165:d1b4690b3f8b	3415	* scan sequence rank.
AnnaBridge	165:d1b4690b3f8b	3416	* @note This function performs configuration of:
AnnaBridge	165:d1b4690b3f8b	3417	* - Channels ordering into each rank of scan sequence:
AnnaBridge	165:d1b4690b3f8b	3418	* whatever channel can be placed into whatever rank.
AnnaBridge	165:d1b4690b3f8b	3419	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	165:d1b4690b3f8b	3420	* fully configurable: sequencer length and each rank
AnnaBridge	165:d1b4690b3f8b	3421	* affectation to a channel are configurable.
AnnaBridge	165:d1b4690b3f8b	3422	* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
AnnaBridge	165:d1b4690b3f8b	3423	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	165:d1b4690b3f8b	3424	* Refer to device datasheet for channels availability.
AnnaBridge	165:d1b4690b3f8b	3425	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	165:d1b4690b3f8b	3426	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	165:d1b4690b3f8b	3427	* enabled separately.
AnnaBridge	165:d1b4690b3f8b	3428	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	165:d1b4690b3f8b	3429	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3430	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3431	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3432	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3433	* @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3434	* SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3435	* SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3436	* SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3437	* SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3438	* SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3439	* SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3440	* SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3441	* SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3442	* SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3443	* SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3444	* SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3445	* SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3446	* SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3447	* SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3448	* SQR4 SQ16 LL_ADC_REG_SetSequencerRanks
AnnaBridge	165:d1b4690b3f8b	3449	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3450	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3451	* @arg @ref LL_ADC_REG_RANK_1
AnnaBridge	165:d1b4690b3f8b	3452	* @arg @ref LL_ADC_REG_RANK_2
AnnaBridge	165:d1b4690b3f8b	3453	* @arg @ref LL_ADC_REG_RANK_3
AnnaBridge	165:d1b4690b3f8b	3454	* @arg @ref LL_ADC_REG_RANK_4
AnnaBridge	165:d1b4690b3f8b	3455	* @arg @ref LL_ADC_REG_RANK_5
AnnaBridge	165:d1b4690b3f8b	3456	* @arg @ref LL_ADC_REG_RANK_6
AnnaBridge	165:d1b4690b3f8b	3457	* @arg @ref LL_ADC_REG_RANK_7
AnnaBridge	165:d1b4690b3f8b	3458	* @arg @ref LL_ADC_REG_RANK_8
AnnaBridge	165:d1b4690b3f8b	3459	* @arg @ref LL_ADC_REG_RANK_9
AnnaBridge	165:d1b4690b3f8b	3460	* @arg @ref LL_ADC_REG_RANK_10
AnnaBridge	165:d1b4690b3f8b	3461	* @arg @ref LL_ADC_REG_RANK_11
AnnaBridge	165:d1b4690b3f8b	3462	* @arg @ref LL_ADC_REG_RANK_12
AnnaBridge	165:d1b4690b3f8b	3463	* @arg @ref LL_ADC_REG_RANK_13
AnnaBridge	165:d1b4690b3f8b	3464	* @arg @ref LL_ADC_REG_RANK_14
AnnaBridge	165:d1b4690b3f8b	3465	* @arg @ref LL_ADC_REG_RANK_15
AnnaBridge	165:d1b4690b3f8b	3466	* @arg @ref LL_ADC_REG_RANK_16
AnnaBridge	165:d1b4690b3f8b	3467	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3468	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	3469	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	3470	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	3471	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	3472	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	3473	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	3474	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	3475	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	3476	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	3477	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	3478	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	3479	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	3480	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	3481	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	3482	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	3483	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	3484	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	3485	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	3486	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	3487	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	3488	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	3489	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	3490	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	3491	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	3492	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	3493	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	3494	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	3495	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	3496	*
AnnaBridge	165:d1b4690b3f8b	3497	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	3498	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	3499	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	3500	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	3501	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	3502	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	3503	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	3504	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	3505	* @retval None
AnnaBridge	165:d1b4690b3f8b	3506	*/
AnnaBridge	165:d1b4690b3f8b	3507	__STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
AnnaBridge	165:d1b4690b3f8b	3508	{
AnnaBridge	165:d1b4690b3f8b	3509	/* Set bits with content of parameter "Channel" with bits position */
AnnaBridge	165:d1b4690b3f8b	3510	/* in register and register position depending on parameter "Rank". */
AnnaBridge	165:d1b4690b3f8b	3511	/* Parameters "Rank" and "Channel" are used with masks because containing */
AnnaBridge	165:d1b4690b3f8b	3512	/* other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	3513	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	3514	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	3515	#else
AnnaBridge	165:d1b4690b3f8b	3516	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	3517	#endif
AnnaBridge	165:d1b4690b3f8b	3518
AnnaBridge	165:d1b4690b3f8b	3519	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	3520	ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK),
AnnaBridge	165:d1b4690b3f8b	3521	((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_REG_RANK_ID_SQRX_MASK));
AnnaBridge	165:d1b4690b3f8b	3522	}
AnnaBridge	165:d1b4690b3f8b	3523
AnnaBridge	165:d1b4690b3f8b	3524	/**
AnnaBridge	165:d1b4690b3f8b	3525	* @brief Get ADC group regular sequence: channel on the selected
AnnaBridge	165:d1b4690b3f8b	3526	* scan sequence rank.
AnnaBridge	165:d1b4690b3f8b	3527	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	165:d1b4690b3f8b	3528	* fully configurable: sequencer length and each rank
AnnaBridge	165:d1b4690b3f8b	3529	* affectation to a channel are configurable.
AnnaBridge	165:d1b4690b3f8b	3530	* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
AnnaBridge	165:d1b4690b3f8b	3531	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	165:d1b4690b3f8b	3532	* Refer to device datasheet for channels availability.
AnnaBridge	165:d1b4690b3f8b	3533	* @note Usage of the returned channel number:
AnnaBridge	165:d1b4690b3f8b	3534	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	165:d1b4690b3f8b	3535	* the returned channel number is only partly formatted on definition
AnnaBridge	165:d1b4690b3f8b	3536	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	165:d1b4690b3f8b	3537	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	165:d1b4690b3f8b	3538	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	3539	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	165:d1b4690b3f8b	3540	* as parameter for another function.
AnnaBridge	165:d1b4690b3f8b	3541	* - To get the channel number in decimal format:
AnnaBridge	165:d1b4690b3f8b	3542	* process the returned value with the helper macro
AnnaBridge	165:d1b4690b3f8b	3543	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	3544	* @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3545	* SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3546	* SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3547	* SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3548	* SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3549	* SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3550	* SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3551	* SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3552	* SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3553	* SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3554	* SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3555	* SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3556	* SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3557	* SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3558	* SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	3559	* SQR4 SQ16 LL_ADC_REG_GetSequencerRanks
AnnaBridge	165:d1b4690b3f8b	3560	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3561	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3562	* @arg @ref LL_ADC_REG_RANK_1
AnnaBridge	165:d1b4690b3f8b	3563	* @arg @ref LL_ADC_REG_RANK_2
AnnaBridge	165:d1b4690b3f8b	3564	* @arg @ref LL_ADC_REG_RANK_3
AnnaBridge	165:d1b4690b3f8b	3565	* @arg @ref LL_ADC_REG_RANK_4
AnnaBridge	165:d1b4690b3f8b	3566	* @arg @ref LL_ADC_REG_RANK_5
AnnaBridge	165:d1b4690b3f8b	3567	* @arg @ref LL_ADC_REG_RANK_6
AnnaBridge	165:d1b4690b3f8b	3568	* @arg @ref LL_ADC_REG_RANK_7
AnnaBridge	165:d1b4690b3f8b	3569	* @arg @ref LL_ADC_REG_RANK_8
AnnaBridge	165:d1b4690b3f8b	3570	* @arg @ref LL_ADC_REG_RANK_9
AnnaBridge	165:d1b4690b3f8b	3571	* @arg @ref LL_ADC_REG_RANK_10
AnnaBridge	165:d1b4690b3f8b	3572	* @arg @ref LL_ADC_REG_RANK_11
AnnaBridge	165:d1b4690b3f8b	3573	* @arg @ref LL_ADC_REG_RANK_12
AnnaBridge	165:d1b4690b3f8b	3574	* @arg @ref LL_ADC_REG_RANK_13
AnnaBridge	165:d1b4690b3f8b	3575	* @arg @ref LL_ADC_REG_RANK_14
AnnaBridge	165:d1b4690b3f8b	3576	* @arg @ref LL_ADC_REG_RANK_15
AnnaBridge	165:d1b4690b3f8b	3577	* @arg @ref LL_ADC_REG_RANK_16
AnnaBridge	165:d1b4690b3f8b	3578	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3579	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	3580	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	3581	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	3582	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	3583	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	3584	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	3585	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	3586	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	3587	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	3588	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	3589	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	3590	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	3591	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	3592	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	3593	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	3594	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	3595	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	3596	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	3597	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	3598	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	3599	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	3600	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	3601	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	3602	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	3603	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	3604	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	3605	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	3606	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	3607	*
AnnaBridge	165:d1b4690b3f8b	3608	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	3609	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	3610	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	3611	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	3612	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	3613	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	3614	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	3615	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
AnnaBridge	165:d1b4690b3f8b	3616	* (1, 2, 3, 4) For ADC channel read back from ADC register,
AnnaBridge	165:d1b4690b3f8b	3617	* comparison with internal channel parameter to be done
AnnaBridge	165:d1b4690b3f8b	3618	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	165:d1b4690b3f8b	3619	*/
AnnaBridge	165:d1b4690b3f8b	3620	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	3621	{
AnnaBridge	165:d1b4690b3f8b	3622	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	3623	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	3624	#else
AnnaBridge	165:d1b4690b3f8b	3625	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	3626	#endif
AnnaBridge	165:d1b4690b3f8b	3627
AnnaBridge	165:d1b4690b3f8b	3628	return (uint32_t) ((READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	3629	ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK))
AnnaBridge	165:d1b4690b3f8b	3630	>> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS
AnnaBridge	165:d1b4690b3f8b	3631	);
AnnaBridge	165:d1b4690b3f8b	3632	}
AnnaBridge	165:d1b4690b3f8b	3633
AnnaBridge	165:d1b4690b3f8b	3634	/**
AnnaBridge	165:d1b4690b3f8b	3635	* @brief Set ADC continuous conversion mode on ADC group regular.
AnnaBridge	165:d1b4690b3f8b	3636	* @note Description of ADC continuous conversion mode:
AnnaBridge	165:d1b4690b3f8b	3637	* - single mode: one conversion per trigger
AnnaBridge	165:d1b4690b3f8b	3638	* - continuous mode: after the first trigger, following
AnnaBridge	165:d1b4690b3f8b	3639	* conversions launched successively automatically.
AnnaBridge	165:d1b4690b3f8b	3640	* @note It is not possible to enable both ADC group regular
AnnaBridge	165:d1b4690b3f8b	3641	* continuous mode and sequencer discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	3642	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3643	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3644	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3645	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3646	* @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode
AnnaBridge	165:d1b4690b3f8b	3647	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3648	* @param Continuous This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3649	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	165:d1b4690b3f8b	3650	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	165:d1b4690b3f8b	3651	* @retval None
AnnaBridge	165:d1b4690b3f8b	3652	*/
AnnaBridge	165:d1b4690b3f8b	3653	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
AnnaBridge	165:d1b4690b3f8b	3654	{
AnnaBridge	165:d1b4690b3f8b	3655	MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous);
AnnaBridge	165:d1b4690b3f8b	3656	}
AnnaBridge	165:d1b4690b3f8b	3657
AnnaBridge	165:d1b4690b3f8b	3658	/**
AnnaBridge	165:d1b4690b3f8b	3659	* @brief Get ADC continuous conversion mode on ADC group regular.
AnnaBridge	165:d1b4690b3f8b	3660	* @note Description of ADC continuous conversion mode:
AnnaBridge	165:d1b4690b3f8b	3661	* - single mode: one conversion per trigger
AnnaBridge	165:d1b4690b3f8b	3662	* - continuous mode: after the first trigger, following
AnnaBridge	165:d1b4690b3f8b	3663	* conversions launched successively automatically.
AnnaBridge	165:d1b4690b3f8b	3664	* @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode
AnnaBridge	165:d1b4690b3f8b	3665	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3666	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3667	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	165:d1b4690b3f8b	3668	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	165:d1b4690b3f8b	3669	*/
AnnaBridge	165:d1b4690b3f8b	3670	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3671	{
AnnaBridge	165:d1b4690b3f8b	3672	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT));
AnnaBridge	165:d1b4690b3f8b	3673	}
AnnaBridge	165:d1b4690b3f8b	3674
AnnaBridge	165:d1b4690b3f8b	3675	/**
AnnaBridge	165:d1b4690b3f8b	3676	* @brief Set ADC group regular conversion data transfer: no transfer or
AnnaBridge	165:d1b4690b3f8b	3677	* transfer by DMA, and DMA requests mode.
AnnaBridge	165:d1b4690b3f8b	3678	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	165:d1b4690b3f8b	3679	* mode:
AnnaBridge	165:d1b4690b3f8b	3680	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	165:d1b4690b3f8b	3681	* when number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	3682	* ADC conversions) is reached.
AnnaBridge	165:d1b4690b3f8b	3683	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	165:d1b4690b3f8b	3684	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	165:d1b4690b3f8b	3685	* whatever number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	3686	* ADC conversions).
AnnaBridge	165:d1b4690b3f8b	3687	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	165:d1b4690b3f8b	3688	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	165:d1b4690b3f8b	3689	* mode non-circular:
AnnaBridge	165:d1b4690b3f8b	3690	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	165:d1b4690b3f8b	3691	* ADC conversions data ADC will raise an overrun error
AnnaBridge	165:d1b4690b3f8b	3692	* (overrun flag and interruption if enabled).
AnnaBridge	165:d1b4690b3f8b	3693	* @note For devices with several ADC instances: ADC multimode DMA
AnnaBridge	165:d1b4690b3f8b	3694	* settings are available using function @ref LL_ADC_SetMultiDMATransfer().
AnnaBridge	165:d1b4690b3f8b	3695	* @note To configure DMA source address (peripheral address),
AnnaBridge	165:d1b4690b3f8b	3696	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	165:d1b4690b3f8b	3697	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3698	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3699	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3700	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3701	* @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n
AnnaBridge	165:d1b4690b3f8b	3702	* CFGR DMACFG LL_ADC_REG_SetDMATransfer
AnnaBridge	165:d1b4690b3f8b	3703	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3704	* @param DMATransfer This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3705	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	165:d1b4690b3f8b	3706	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	165:d1b4690b3f8b	3707	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	165:d1b4690b3f8b	3708	* @retval None
AnnaBridge	165:d1b4690b3f8b	3709	*/
AnnaBridge	165:d1b4690b3f8b	3710	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
AnnaBridge	165:d1b4690b3f8b	3711	{
AnnaBridge	165:d1b4690b3f8b	3712	MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN \| ADC_CFGR_DMACFG, DMATransfer);
AnnaBridge	165:d1b4690b3f8b	3713	}
AnnaBridge	165:d1b4690b3f8b	3714
AnnaBridge	165:d1b4690b3f8b	3715	/**
AnnaBridge	165:d1b4690b3f8b	3716	* @brief Get ADC group regular conversion data transfer: no transfer or
AnnaBridge	165:d1b4690b3f8b	3717	* transfer by DMA, and DMA requests mode.
AnnaBridge	165:d1b4690b3f8b	3718	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	165:d1b4690b3f8b	3719	* mode:
AnnaBridge	165:d1b4690b3f8b	3720	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	165:d1b4690b3f8b	3721	* when number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	3722	* ADC conversions) is reached.
AnnaBridge	165:d1b4690b3f8b	3723	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	165:d1b4690b3f8b	3724	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	165:d1b4690b3f8b	3725	* whatever number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	3726	* ADC conversions).
AnnaBridge	165:d1b4690b3f8b	3727	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	165:d1b4690b3f8b	3728	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	165:d1b4690b3f8b	3729	* mode non-circular:
AnnaBridge	165:d1b4690b3f8b	3730	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	165:d1b4690b3f8b	3731	* ADC conversions data ADC will raise an overrun error
AnnaBridge	165:d1b4690b3f8b	3732	* (overrun flag and interruption if enabled).
AnnaBridge	165:d1b4690b3f8b	3733	* @note For devices with several ADC instances: ADC multimode DMA
AnnaBridge	165:d1b4690b3f8b	3734	* settings are available using function @ref LL_ADC_GetMultiDMATransfer().
AnnaBridge	165:d1b4690b3f8b	3735	* @note To configure DMA source address (peripheral address),
AnnaBridge	165:d1b4690b3f8b	3736	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	165:d1b4690b3f8b	3737	* @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n
AnnaBridge	165:d1b4690b3f8b	3738	* CFGR DMACFG LL_ADC_REG_GetDMATransfer
AnnaBridge	165:d1b4690b3f8b	3739	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3740	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3741	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	165:d1b4690b3f8b	3742	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	165:d1b4690b3f8b	3743	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	165:d1b4690b3f8b	3744	*/
AnnaBridge	165:d1b4690b3f8b	3745	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3746	{
AnnaBridge	165:d1b4690b3f8b	3747	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN \| ADC_CFGR_DMACFG));
AnnaBridge	165:d1b4690b3f8b	3748	}
AnnaBridge	165:d1b4690b3f8b	3749
AnnaBridge	165:d1b4690b3f8b	3750	#if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
AnnaBridge	165:d1b4690b3f8b	3751	/**
AnnaBridge	165:d1b4690b3f8b	3752	* @brief Set ADC group regular conversion data transfer to DFSDM.
AnnaBridge	165:d1b4690b3f8b	3753	* @note DFSDM transfer cannot be used if DMA transfer is enabled.
AnnaBridge	165:d1b4690b3f8b	3754	* @note To configure DFSDM source address (peripheral address),
AnnaBridge	165:d1b4690b3f8b	3755	* use the same function as for DMA transfer:
AnnaBridge	165:d1b4690b3f8b	3756	* function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	165:d1b4690b3f8b	3757	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3758	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3759	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3760	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3761	* @rmtoll CFGR DFSDMCFG LL_ADC_REG_GetDFSDMTransfer
AnnaBridge	165:d1b4690b3f8b	3762	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3763	* @param DFSDMTransfer This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3764	* @arg @ref LL_ADC_REG_DFSDM_TRANSFER_NONE
AnnaBridge	165:d1b4690b3f8b	3765	* @arg @ref LL_ADC_REG_DFSDM_TRANSFER_ENABLE
AnnaBridge	165:d1b4690b3f8b	3766	* @retval None
AnnaBridge	165:d1b4690b3f8b	3767	*/
AnnaBridge	165:d1b4690b3f8b	3768	__STATIC_INLINE void LL_ADC_REG_SetDFSDMTransfer(ADC_TypeDef *ADCx, uint32_t DFSDMTransfer)
AnnaBridge	165:d1b4690b3f8b	3769	{
AnnaBridge	165:d1b4690b3f8b	3770	MODIFY_REG(ADCx->CFGR, ADC_CFGR_DFSDMCFG, DFSDMTransfer);
AnnaBridge	165:d1b4690b3f8b	3771	}
AnnaBridge	165:d1b4690b3f8b	3772
AnnaBridge	165:d1b4690b3f8b	3773	/**
AnnaBridge	165:d1b4690b3f8b	3774	* @brief Get ADC group regular conversion data transfer to DFSDM.
AnnaBridge	165:d1b4690b3f8b	3775	* @rmtoll CFGR DFSDMCFG LL_ADC_REG_GetDFSDMTransfer
AnnaBridge	165:d1b4690b3f8b	3776	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3777	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3778	* @arg @ref LL_ADC_REG_DFSDM_TRANSFER_NONE
AnnaBridge	165:d1b4690b3f8b	3779	* @arg @ref LL_ADC_REG_DFSDM_TRANSFER_ENABLE
AnnaBridge	165:d1b4690b3f8b	3780	*/
AnnaBridge	165:d1b4690b3f8b	3781	__STATIC_INLINE uint32_t LL_ADC_REG_GetDFSDMTransfer(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3782	{
AnnaBridge	165:d1b4690b3f8b	3783	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DFSDMCFG));
AnnaBridge	165:d1b4690b3f8b	3784	}
AnnaBridge	165:d1b4690b3f8b	3785	#endif
AnnaBridge	165:d1b4690b3f8b	3786
AnnaBridge	165:d1b4690b3f8b	3787	/**
AnnaBridge	165:d1b4690b3f8b	3788	* @brief Set ADC group regular behavior in case of overrun:
AnnaBridge	165:d1b4690b3f8b	3789	* data preserved or overwritten.
AnnaBridge	165:d1b4690b3f8b	3790	* @note Compatibility with devices without feature overrun:
AnnaBridge	165:d1b4690b3f8b	3791	* other devices without this feature have a behavior
AnnaBridge	165:d1b4690b3f8b	3792	* equivalent to data overwritten.
AnnaBridge	165:d1b4690b3f8b	3793	* The default setting of overrun is data preserved.
AnnaBridge	165:d1b4690b3f8b	3794	* Therefore, for compatibility with all devices, parameter
AnnaBridge	165:d1b4690b3f8b	3795	* overrun should be set to data overwritten.
AnnaBridge	165:d1b4690b3f8b	3796	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3797	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3798	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	3799	* on group regular.
AnnaBridge	165:d1b4690b3f8b	3800	* @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun
AnnaBridge	165:d1b4690b3f8b	3801	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3802	* @param Overrun This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3803	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	165:d1b4690b3f8b	3804	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	165:d1b4690b3f8b	3805	* @retval None
AnnaBridge	165:d1b4690b3f8b	3806	*/
AnnaBridge	165:d1b4690b3f8b	3807	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
AnnaBridge	165:d1b4690b3f8b	3808	{
AnnaBridge	165:d1b4690b3f8b	3809	MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun);
AnnaBridge	165:d1b4690b3f8b	3810	}
AnnaBridge	165:d1b4690b3f8b	3811
AnnaBridge	165:d1b4690b3f8b	3812	/**
AnnaBridge	165:d1b4690b3f8b	3813	* @brief Get ADC group regular behavior in case of overrun:
AnnaBridge	165:d1b4690b3f8b	3814	* data preserved or overwritten.
AnnaBridge	165:d1b4690b3f8b	3815	* @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun
AnnaBridge	165:d1b4690b3f8b	3816	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3817	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3818	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	165:d1b4690b3f8b	3819	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	165:d1b4690b3f8b	3820	*/
AnnaBridge	165:d1b4690b3f8b	3821	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3822	{
AnnaBridge	165:d1b4690b3f8b	3823	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD));
AnnaBridge	165:d1b4690b3f8b	3824	}
AnnaBridge	165:d1b4690b3f8b	3825
AnnaBridge	165:d1b4690b3f8b	3826	/**
AnnaBridge	165:d1b4690b3f8b	3827	* @}
AnnaBridge	165:d1b4690b3f8b	3828	*/
AnnaBridge	165:d1b4690b3f8b	3829
AnnaBridge	165:d1b4690b3f8b	3830	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: group injected
AnnaBridge	165:d1b4690b3f8b	3831	* @{
AnnaBridge	165:d1b4690b3f8b	3832	*/
AnnaBridge	165:d1b4690b3f8b	3833
AnnaBridge	165:d1b4690b3f8b	3834	/**
AnnaBridge	165:d1b4690b3f8b	3835	* @brief Set ADC group injected conversion trigger source:
AnnaBridge	165:d1b4690b3f8b	3836	* internal (SW start) or from external IP (timer event,
AnnaBridge	165:d1b4690b3f8b	3837	* external interrupt line).
AnnaBridge	165:d1b4690b3f8b	3838	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	165:d1b4690b3f8b	3839	* also set trigger polarity to rising edge
AnnaBridge	165:d1b4690b3f8b	3840	* (default setting for compatibility with some ADC on other
AnnaBridge	165:d1b4690b3f8b	3841	* STM32 families having this setting set by HW default value).
AnnaBridge	165:d1b4690b3f8b	3842	* In case of need to modify trigger edge, use
AnnaBridge	165:d1b4690b3f8b	3843	* function @ref LL_ADC_INJ_SetTriggerEdge().
AnnaBridge	165:d1b4690b3f8b	3844	* @note Availability of parameters of trigger sources from timer
AnnaBridge	165:d1b4690b3f8b	3845	* depends on timers availability on the selected device.
AnnaBridge	165:d1b4690b3f8b	3846	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3847	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3848	* ADC must not be disabled. Can be enabled with or without conversion
AnnaBridge	165:d1b4690b3f8b	3849	* on going on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3850	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n
AnnaBridge	165:d1b4690b3f8b	3851	* JSQR JEXTEN LL_ADC_INJ_SetTriggerSource
AnnaBridge	165:d1b4690b3f8b	3852	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3853	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3854	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
AnnaBridge	165:d1b4690b3f8b	3855	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
AnnaBridge	165:d1b4690b3f8b	3856	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
AnnaBridge	165:d1b4690b3f8b	3857	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
AnnaBridge	165:d1b4690b3f8b	3858	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
AnnaBridge	165:d1b4690b3f8b	3859	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
AnnaBridge	165:d1b4690b3f8b	3860	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
AnnaBridge	165:d1b4690b3f8b	3861	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
AnnaBridge	165:d1b4690b3f8b	3862	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
AnnaBridge	165:d1b4690b3f8b	3863	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
AnnaBridge	165:d1b4690b3f8b	3864	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
AnnaBridge	165:d1b4690b3f8b	3865	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
AnnaBridge	165:d1b4690b3f8b	3866	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
AnnaBridge	165:d1b4690b3f8b	3867	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
AnnaBridge	165:d1b4690b3f8b	3868	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
AnnaBridge	165:d1b4690b3f8b	3869	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
AnnaBridge	165:d1b4690b3f8b	3870	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
AnnaBridge	165:d1b4690b3f8b	3871	* @retval None
AnnaBridge	165:d1b4690b3f8b	3872	*/
AnnaBridge	165:d1b4690b3f8b	3873	__STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	165:d1b4690b3f8b	3874	{
AnnaBridge	165:d1b4690b3f8b	3875	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL \| ADC_JSQR_JEXTEN, TriggerSource);
AnnaBridge	165:d1b4690b3f8b	3876	}
AnnaBridge	165:d1b4690b3f8b	3877
AnnaBridge	165:d1b4690b3f8b	3878	/**
AnnaBridge	165:d1b4690b3f8b	3879	* @brief Get ADC group injected conversion trigger source:
AnnaBridge	165:d1b4690b3f8b	3880	* internal (SW start) or from external IP (timer event,
AnnaBridge	165:d1b4690b3f8b	3881	* external interrupt line).
AnnaBridge	165:d1b4690b3f8b	3882	* @note To determine whether group injected trigger source is
AnnaBridge	165:d1b4690b3f8b	3883	* internal (SW start) or external, without detail
AnnaBridge	165:d1b4690b3f8b	3884	* of which peripheral is selected as external trigger,
AnnaBridge	165:d1b4690b3f8b	3885	* (equivalent to
AnnaBridge	165:d1b4690b3f8b	3886	* "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)")
AnnaBridge	165:d1b4690b3f8b	3887	* use function @ref LL_ADC_INJ_IsTriggerSourceSWStart.
AnnaBridge	165:d1b4690b3f8b	3888	* @note Availability of parameters of trigger sources from timer
AnnaBridge	165:d1b4690b3f8b	3889	* depends on timers availability on the selected device.
AnnaBridge	165:d1b4690b3f8b	3890	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n
AnnaBridge	165:d1b4690b3f8b	3891	* JSQR JEXTEN LL_ADC_INJ_GetTriggerSource
AnnaBridge	165:d1b4690b3f8b	3892	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3893	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3894	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
AnnaBridge	165:d1b4690b3f8b	3895	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
AnnaBridge	165:d1b4690b3f8b	3896	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
AnnaBridge	165:d1b4690b3f8b	3897	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
AnnaBridge	165:d1b4690b3f8b	3898	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
AnnaBridge	165:d1b4690b3f8b	3899	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
AnnaBridge	165:d1b4690b3f8b	3900	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
AnnaBridge	165:d1b4690b3f8b	3901	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
AnnaBridge	165:d1b4690b3f8b	3902	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
AnnaBridge	165:d1b4690b3f8b	3903	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
AnnaBridge	165:d1b4690b3f8b	3904	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
AnnaBridge	165:d1b4690b3f8b	3905	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
AnnaBridge	165:d1b4690b3f8b	3906	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
AnnaBridge	165:d1b4690b3f8b	3907	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
AnnaBridge	165:d1b4690b3f8b	3908	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
AnnaBridge	165:d1b4690b3f8b	3909	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
AnnaBridge	165:d1b4690b3f8b	3910	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
AnnaBridge	165:d1b4690b3f8b	3911	*/
AnnaBridge	165:d1b4690b3f8b	3912	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3913	{
AnnaBridge	165:d1b4690b3f8b	3914	register uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL \| ADC_JSQR_JEXTEN);
AnnaBridge	165:d1b4690b3f8b	3915
AnnaBridge	165:d1b4690b3f8b	3916	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	165:d1b4690b3f8b	3917	/* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */
AnnaBridge	165:d1b4690b3f8b	3918	register uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	165:d1b4690b3f8b	3919
AnnaBridge	165:d1b4690b3f8b	3920	/* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */
AnnaBridge	165:d1b4690b3f8b	3921	/* to match with triggers literals definition. */
AnnaBridge	165:d1b4690b3f8b	3922	return ((TriggerSource
AnnaBridge	165:d1b4690b3f8b	3923	& (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL)
AnnaBridge	165:d1b4690b3f8b	3924	\| ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN)
AnnaBridge	165:d1b4690b3f8b	3925	);
AnnaBridge	165:d1b4690b3f8b	3926	}
AnnaBridge	165:d1b4690b3f8b	3927
AnnaBridge	165:d1b4690b3f8b	3928	/**
AnnaBridge	165:d1b4690b3f8b	3929	* @brief Get ADC group injected conversion trigger source internal (SW start)
AnnaBridge	165:d1b4690b3f8b	3930	or external
AnnaBridge	165:d1b4690b3f8b	3931	* @note In case of group injected trigger source set to external trigger,
AnnaBridge	165:d1b4690b3f8b	3932	* to determine which peripheral is selected as external trigger,
AnnaBridge	165:d1b4690b3f8b	3933	* use function @ref LL_ADC_INJ_GetTriggerSource.
AnnaBridge	165:d1b4690b3f8b	3934	* @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart
AnnaBridge	165:d1b4690b3f8b	3935	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3936	* @retval Value "0" if trigger source external trigger
AnnaBridge	165:d1b4690b3f8b	3937	* Value "1" if trigger source SW start.
AnnaBridge	165:d1b4690b3f8b	3938	*/
AnnaBridge	165:d1b4690b3f8b	3939	__STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3940	{
AnnaBridge	165:d1b4690b3f8b	3941	return (READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN));
AnnaBridge	165:d1b4690b3f8b	3942	}
AnnaBridge	165:d1b4690b3f8b	3943
AnnaBridge	165:d1b4690b3f8b	3944	/**
AnnaBridge	165:d1b4690b3f8b	3945	* @brief Set ADC group injected conversion trigger polarity.
AnnaBridge	165:d1b4690b3f8b	3946	* Applicable only for trigger source set to external trigger.
AnnaBridge	165:d1b4690b3f8b	3947	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3948	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3949	* ADC must not be disabled. Can be enabled with or without conversion
AnnaBridge	165:d1b4690b3f8b	3950	* on going on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3951	* @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge
AnnaBridge	165:d1b4690b3f8b	3952	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3953	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3954	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
AnnaBridge	165:d1b4690b3f8b	3955	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
AnnaBridge	165:d1b4690b3f8b	3956	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
AnnaBridge	165:d1b4690b3f8b	3957	* @retval None
AnnaBridge	165:d1b4690b3f8b	3958	*/
AnnaBridge	165:d1b4690b3f8b	3959	__STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	165:d1b4690b3f8b	3960	{
AnnaBridge	165:d1b4690b3f8b	3961	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge);
AnnaBridge	165:d1b4690b3f8b	3962	}
AnnaBridge	165:d1b4690b3f8b	3963
AnnaBridge	165:d1b4690b3f8b	3964	/**
AnnaBridge	165:d1b4690b3f8b	3965	* @brief Get ADC group injected conversion trigger polarity.
AnnaBridge	165:d1b4690b3f8b	3966	* Applicable only for trigger source set to external trigger.
AnnaBridge	165:d1b4690b3f8b	3967	* @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge
AnnaBridge	165:d1b4690b3f8b	3968	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3969	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3970	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
AnnaBridge	165:d1b4690b3f8b	3971	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
AnnaBridge	165:d1b4690b3f8b	3972	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
AnnaBridge	165:d1b4690b3f8b	3973	*/
AnnaBridge	165:d1b4690b3f8b	3974	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	3975	{
AnnaBridge	165:d1b4690b3f8b	3976	return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN));
AnnaBridge	165:d1b4690b3f8b	3977	}
AnnaBridge	165:d1b4690b3f8b	3978
AnnaBridge	165:d1b4690b3f8b	3979	/**
AnnaBridge	165:d1b4690b3f8b	3980	* @brief Set ADC group injected sequencer length and scan direction.
AnnaBridge	165:d1b4690b3f8b	3981	* @note This function performs configuration of:
AnnaBridge	165:d1b4690b3f8b	3982	* - Sequence length: Number of ranks in the scan sequence.
AnnaBridge	165:d1b4690b3f8b	3983	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	3984	* scan direction is forward (from rank 1 to rank n).
AnnaBridge	165:d1b4690b3f8b	3985	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
AnnaBridge	165:d1b4690b3f8b	3986	* ADC conversion on only 1 channel.
AnnaBridge	165:d1b4690b3f8b	3987	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	3988	* ADC state:
AnnaBridge	165:d1b4690b3f8b	3989	* ADC must not be disabled. Can be enabled with or without conversion
AnnaBridge	165:d1b4690b3f8b	3990	* on going on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	3991	* @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength
AnnaBridge	165:d1b4690b3f8b	3992	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	3993	* @param SequencerNbRanks This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	3994	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
AnnaBridge	165:d1b4690b3f8b	3995	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
AnnaBridge	165:d1b4690b3f8b	3996	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
AnnaBridge	165:d1b4690b3f8b	3997	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
AnnaBridge	165:d1b4690b3f8b	3998	* @retval None
AnnaBridge	165:d1b4690b3f8b	3999	*/
AnnaBridge	165:d1b4690b3f8b	4000	__STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
AnnaBridge	165:d1b4690b3f8b	4001	{
AnnaBridge	165:d1b4690b3f8b	4002	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks);
AnnaBridge	165:d1b4690b3f8b	4003	}
AnnaBridge	165:d1b4690b3f8b	4004
AnnaBridge	165:d1b4690b3f8b	4005	/**
AnnaBridge	165:d1b4690b3f8b	4006	* @brief Get ADC group injected sequencer length and scan direction.
AnnaBridge	165:d1b4690b3f8b	4007	* @note This function retrieves:
AnnaBridge	165:d1b4690b3f8b	4008	* - Sequence length: Number of ranks in the scan sequence.
AnnaBridge	165:d1b4690b3f8b	4009	* - Sequence direction: Unless specified in parameters, sequencer
AnnaBridge	165:d1b4690b3f8b	4010	* scan direction is forward (from rank 1 to rank n).
AnnaBridge	165:d1b4690b3f8b	4011	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
AnnaBridge	165:d1b4690b3f8b	4012	* ADC conversion on only 1 channel.
AnnaBridge	165:d1b4690b3f8b	4013	* @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength
AnnaBridge	165:d1b4690b3f8b	4014	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4015	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4016	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
AnnaBridge	165:d1b4690b3f8b	4017	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
AnnaBridge	165:d1b4690b3f8b	4018	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
AnnaBridge	165:d1b4690b3f8b	4019	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
AnnaBridge	165:d1b4690b3f8b	4020	*/
AnnaBridge	165:d1b4690b3f8b	4021	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	4022	{
AnnaBridge	165:d1b4690b3f8b	4023	return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL));
AnnaBridge	165:d1b4690b3f8b	4024	}
AnnaBridge	165:d1b4690b3f8b	4025
AnnaBridge	165:d1b4690b3f8b	4026	/**
AnnaBridge	165:d1b4690b3f8b	4027	* @brief Set ADC group injected sequencer discontinuous mode:
AnnaBridge	165:d1b4690b3f8b	4028	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	165:d1b4690b3f8b	4029	* number of ranks.
AnnaBridge	165:d1b4690b3f8b	4030	* @note It is not possible to enable both ADC group injected
AnnaBridge	165:d1b4690b3f8b	4031	* auto-injected mode and sequencer discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	4032	* @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont
AnnaBridge	165:d1b4690b3f8b	4033	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4034	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4035	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
AnnaBridge	165:d1b4690b3f8b	4036	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
AnnaBridge	165:d1b4690b3f8b	4037	* @retval None
AnnaBridge	165:d1b4690b3f8b	4038	*/
AnnaBridge	165:d1b4690b3f8b	4039	__STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	165:d1b4690b3f8b	4040	{
AnnaBridge	165:d1b4690b3f8b	4041	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont);
AnnaBridge	165:d1b4690b3f8b	4042	}
AnnaBridge	165:d1b4690b3f8b	4043
AnnaBridge	165:d1b4690b3f8b	4044	/**
AnnaBridge	165:d1b4690b3f8b	4045	* @brief Get ADC group injected sequencer discontinuous mode:
AnnaBridge	165:d1b4690b3f8b	4046	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	165:d1b4690b3f8b	4047	* number of ranks.
AnnaBridge	165:d1b4690b3f8b	4048	* @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont
AnnaBridge	165:d1b4690b3f8b	4049	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4050	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4051	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
AnnaBridge	165:d1b4690b3f8b	4052	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
AnnaBridge	165:d1b4690b3f8b	4053	*/
AnnaBridge	165:d1b4690b3f8b	4054	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	4055	{
AnnaBridge	165:d1b4690b3f8b	4056	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN));
AnnaBridge	165:d1b4690b3f8b	4057	}
AnnaBridge	165:d1b4690b3f8b	4058
AnnaBridge	165:d1b4690b3f8b	4059	/**
AnnaBridge	165:d1b4690b3f8b	4060	* @brief Set ADC group injected sequence: channel on the selected
AnnaBridge	165:d1b4690b3f8b	4061	* sequence rank.
AnnaBridge	165:d1b4690b3f8b	4062	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	165:d1b4690b3f8b	4063	* Refer to device datasheet for channels availability.
AnnaBridge	165:d1b4690b3f8b	4064	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	165:d1b4690b3f8b	4065	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	165:d1b4690b3f8b	4066	* enabled separately.
AnnaBridge	165:d1b4690b3f8b	4067	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	165:d1b4690b3f8b	4068	* @note On STM32L4, some fast channels are available: fast analog inputs
AnnaBridge	165:d1b4690b3f8b	4069	* coming from GPIO pads (ADC_IN1..5).
AnnaBridge	165:d1b4690b3f8b	4070	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4071	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4072	* ADC must not be disabled. Can be enabled with or without conversion
AnnaBridge	165:d1b4690b3f8b	4073	* on going on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4074	* @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4075	* JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4076	* JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4077	* JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks
AnnaBridge	165:d1b4690b3f8b	4078	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4079	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4080	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	4081	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	4082	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	4083	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	4084	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4085	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4086	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4087	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4088	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4089	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4090	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4091	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4092	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4093	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4094	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4095	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4096	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4097	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4098	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4099	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4100	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4101	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4102	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4103	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4104	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4105	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4106	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4107	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4108	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4109	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4110	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4111	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4112	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4113	*
AnnaBridge	165:d1b4690b3f8b	4114	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4115	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4116	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4117	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4118	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4119	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4120	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4121	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4122	* @retval None
AnnaBridge	165:d1b4690b3f8b	4123	*/
AnnaBridge	165:d1b4690b3f8b	4124	__STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
AnnaBridge	165:d1b4690b3f8b	4125	{
AnnaBridge	165:d1b4690b3f8b	4126	/* Set bits with content of parameter "Channel" with bits position */
AnnaBridge	165:d1b4690b3f8b	4127	/* in register depending on parameter "Rank". */
AnnaBridge	165:d1b4690b3f8b	4128	/* Parameters "Rank" and "Channel" are used with masks because containing */
AnnaBridge	165:d1b4690b3f8b	4129	/* other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	4130	MODIFY_REG(ADCx->JSQR,
AnnaBridge	165:d1b4690b3f8b	4131	(ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK),
AnnaBridge	165:d1b4690b3f8b	4132	((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK));
AnnaBridge	165:d1b4690b3f8b	4133	}
AnnaBridge	165:d1b4690b3f8b	4134
AnnaBridge	165:d1b4690b3f8b	4135	/**
AnnaBridge	165:d1b4690b3f8b	4136	* @brief Get ADC group injected sequence: channel on the selected
AnnaBridge	165:d1b4690b3f8b	4137	* sequence rank.
AnnaBridge	165:d1b4690b3f8b	4138	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	165:d1b4690b3f8b	4139	* Refer to device datasheet for channels availability.
AnnaBridge	165:d1b4690b3f8b	4140	* @note Usage of the returned channel number:
AnnaBridge	165:d1b4690b3f8b	4141	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	165:d1b4690b3f8b	4142	* the returned channel number is only partly formatted on definition
AnnaBridge	165:d1b4690b3f8b	4143	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	165:d1b4690b3f8b	4144	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	165:d1b4690b3f8b	4145	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	4146	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	165:d1b4690b3f8b	4147	* as parameter for another function.
AnnaBridge	165:d1b4690b3f8b	4148	* - To get the channel number in decimal format:
AnnaBridge	165:d1b4690b3f8b	4149	* process the returned value with the helper macro
AnnaBridge	165:d1b4690b3f8b	4150	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	4151	* @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4152	* JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4153	* JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n
AnnaBridge	165:d1b4690b3f8b	4154	* JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks
AnnaBridge	165:d1b4690b3f8b	4155	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4156	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4157	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	4158	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	4159	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	4160	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	4161	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4162	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4163	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4164	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4165	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4166	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4167	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4168	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4169	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4170	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4171	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4172	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4173	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4174	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4175	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4176	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4177	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4178	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4179	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4180	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4181	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4182	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4183	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4184	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4185	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4186	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4187	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4188	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4189	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4190	*
AnnaBridge	165:d1b4690b3f8b	4191	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4192	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4193	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4194	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4195	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4196	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4197	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4198	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
AnnaBridge	165:d1b4690b3f8b	4199	* (1, 2, 3, 4) For ADC channel read back from ADC register,
AnnaBridge	165:d1b4690b3f8b	4200	* comparison with internal channel parameter to be done
AnnaBridge	165:d1b4690b3f8b	4201	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	165:d1b4690b3f8b	4202	*/
AnnaBridge	165:d1b4690b3f8b	4203	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	4204	{
AnnaBridge	165:d1b4690b3f8b	4205	return (uint32_t)((READ_BIT(ADCx->JSQR,
AnnaBridge	165:d1b4690b3f8b	4206	(ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK))
AnnaBridge	165:d1b4690b3f8b	4207	>> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS
AnnaBridge	165:d1b4690b3f8b	4208	);
AnnaBridge	165:d1b4690b3f8b	4209	}
AnnaBridge	165:d1b4690b3f8b	4210
AnnaBridge	165:d1b4690b3f8b	4211	/**
AnnaBridge	165:d1b4690b3f8b	4212	* @brief Set ADC group injected conversion trigger:
AnnaBridge	165:d1b4690b3f8b	4213	* independent or from ADC group regular.
AnnaBridge	165:d1b4690b3f8b	4214	* @note This mode can be used to extend number of data registers
AnnaBridge	165:d1b4690b3f8b	4215	* updated after one ADC conversion trigger and with data
AnnaBridge	165:d1b4690b3f8b	4216	* permanently kept (not erased by successive conversions of scan of
AnnaBridge	165:d1b4690b3f8b	4217	* ADC sequencer ranks), up to 5 data registers:
AnnaBridge	165:d1b4690b3f8b	4218	* 1 data register on ADC group regular, 4 data registers
AnnaBridge	165:d1b4690b3f8b	4219	* on ADC group injected.
AnnaBridge	165:d1b4690b3f8b	4220	* @note If ADC group injected injected trigger source is set to an
AnnaBridge	165:d1b4690b3f8b	4221	* external trigger, this feature must be must be set to
AnnaBridge	165:d1b4690b3f8b	4222	* independent trigger.
AnnaBridge	165:d1b4690b3f8b	4223	* ADC group injected automatic trigger is compliant only with
AnnaBridge	165:d1b4690b3f8b	4224	* group injected trigger source set to SW start, without any
AnnaBridge	165:d1b4690b3f8b	4225	* further action on ADC group injected conversion start or stop:
AnnaBridge	165:d1b4690b3f8b	4226	* in this case, ADC group injected is controlled only
AnnaBridge	165:d1b4690b3f8b	4227	* from ADC group regular.
AnnaBridge	165:d1b4690b3f8b	4228	* @note It is not possible to enable both ADC group injected
AnnaBridge	165:d1b4690b3f8b	4229	* auto-injected mode and sequencer discontinuous mode.
AnnaBridge	165:d1b4690b3f8b	4230	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4231	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4232	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	4233	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4234	* @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto
AnnaBridge	165:d1b4690b3f8b	4235	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4236	* @param TrigAuto This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4237	* @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
AnnaBridge	165:d1b4690b3f8b	4238	* @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
AnnaBridge	165:d1b4690b3f8b	4239	* @retval None
AnnaBridge	165:d1b4690b3f8b	4240	*/
AnnaBridge	165:d1b4690b3f8b	4241	__STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto)
AnnaBridge	165:d1b4690b3f8b	4242	{
AnnaBridge	165:d1b4690b3f8b	4243	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto);
AnnaBridge	165:d1b4690b3f8b	4244	}
AnnaBridge	165:d1b4690b3f8b	4245
AnnaBridge	165:d1b4690b3f8b	4246	/**
AnnaBridge	165:d1b4690b3f8b	4247	* @brief Get ADC group injected conversion trigger:
AnnaBridge	165:d1b4690b3f8b	4248	* independent or from ADC group regular.
AnnaBridge	165:d1b4690b3f8b	4249	* @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto
AnnaBridge	165:d1b4690b3f8b	4250	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4251	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4252	* @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
AnnaBridge	165:d1b4690b3f8b	4253	* @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
AnnaBridge	165:d1b4690b3f8b	4254	*/
AnnaBridge	165:d1b4690b3f8b	4255	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	4256	{
AnnaBridge	165:d1b4690b3f8b	4257	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO));
AnnaBridge	165:d1b4690b3f8b	4258	}
AnnaBridge	165:d1b4690b3f8b	4259
AnnaBridge	165:d1b4690b3f8b	4260	/**
AnnaBridge	165:d1b4690b3f8b	4261	* @brief Set ADC group injected contexts queue mode.
AnnaBridge	165:d1b4690b3f8b	4262	* @note A context is a setting of group injected sequencer:
AnnaBridge	165:d1b4690b3f8b	4263	* - group injected trigger
AnnaBridge	165:d1b4690b3f8b	4264	* - sequencer length
AnnaBridge	165:d1b4690b3f8b	4265	* - sequencer ranks
AnnaBridge	165:d1b4690b3f8b	4266	* If contexts queue is disabled:
AnnaBridge	165:d1b4690b3f8b	4267	* - only 1 sequence can be configured
AnnaBridge	165:d1b4690b3f8b	4268	* and is active perpetually.
AnnaBridge	165:d1b4690b3f8b	4269	* If contexts queue is enabled:
AnnaBridge	165:d1b4690b3f8b	4270	* - up to 2 contexts can be queued
AnnaBridge	165:d1b4690b3f8b	4271	* and are checked in and out as a FIFO stack (first-in, first-out).
AnnaBridge	165:d1b4690b3f8b	4272	* - If a new context is set when queues is full, error is triggered
AnnaBridge	165:d1b4690b3f8b	4273	* by interruption "Injected Queue Overflow".
AnnaBridge	165:d1b4690b3f8b	4274	* - Two behaviors are possible when all contexts have been processed:
AnnaBridge	165:d1b4690b3f8b	4275	* the contexts queue can maintain the last context active perpetually
AnnaBridge	165:d1b4690b3f8b	4276	* or can be empty and injected group triggers are disabled.
AnnaBridge	165:d1b4690b3f8b	4277	* - Triggers can be only external (not internal SW start)
AnnaBridge	165:d1b4690b3f8b	4278	* - Caution: The sequence must be fully configured in one time
AnnaBridge	165:d1b4690b3f8b	4279	* (one write of register JSQR makes a check-in of a new context
AnnaBridge	165:d1b4690b3f8b	4280	* into the queue).
AnnaBridge	165:d1b4690b3f8b	4281	* Therefore functions to set separately injected trigger and
AnnaBridge	165:d1b4690b3f8b	4282	* sequencer channels cannot be used, register JSQR must be set
AnnaBridge	165:d1b4690b3f8b	4283	* using function @ref LL_ADC_INJ_ConfigQueueContext().
AnnaBridge	165:d1b4690b3f8b	4284	* @note This parameter can be modified only when no conversion is on going
AnnaBridge	165:d1b4690b3f8b	4285	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4286	* @note A modification of the context mode (bit JQDIS) causes the contexts
AnnaBridge	165:d1b4690b3f8b	4287	* queue to be flushed and the register JSQR is cleared.
AnnaBridge	165:d1b4690b3f8b	4288	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4289	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4290	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	4291	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4292	* @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n
AnnaBridge	165:d1b4690b3f8b	4293	* CFGR JQDIS LL_ADC_INJ_SetQueueMode
AnnaBridge	165:d1b4690b3f8b	4294	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4295	* @param QueueMode This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4296	* @arg @ref LL_ADC_INJ_QUEUE_DISABLE
AnnaBridge	165:d1b4690b3f8b	4297	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
AnnaBridge	165:d1b4690b3f8b	4298	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
AnnaBridge	165:d1b4690b3f8b	4299	* @retval None
AnnaBridge	165:d1b4690b3f8b	4300	*/
AnnaBridge	165:d1b4690b3f8b	4301	__STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode)
AnnaBridge	165:d1b4690b3f8b	4302	{
AnnaBridge	165:d1b4690b3f8b	4303	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JQDIS, QueueMode);
AnnaBridge	165:d1b4690b3f8b	4304	}
AnnaBridge	165:d1b4690b3f8b	4305
AnnaBridge	165:d1b4690b3f8b	4306	/**
AnnaBridge	165:d1b4690b3f8b	4307	* @brief Get ADC group injected context queue mode.
AnnaBridge	165:d1b4690b3f8b	4308	* @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n
AnnaBridge	165:d1b4690b3f8b	4309	* CFGR JQDIS LL_ADC_INJ_GetQueueMode
AnnaBridge	165:d1b4690b3f8b	4310	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4311	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4312	* @arg @ref LL_ADC_INJ_QUEUE_DISABLE
AnnaBridge	165:d1b4690b3f8b	4313	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
AnnaBridge	165:d1b4690b3f8b	4314	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
AnnaBridge	165:d1b4690b3f8b	4315	*/
AnnaBridge	165:d1b4690b3f8b	4316	__STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	4317	{
AnnaBridge	165:d1b4690b3f8b	4318	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JQDIS));
AnnaBridge	165:d1b4690b3f8b	4319	}
AnnaBridge	165:d1b4690b3f8b	4320
AnnaBridge	165:d1b4690b3f8b	4321	/**
AnnaBridge	165:d1b4690b3f8b	4322	* @brief Set one context on ADC group injected that will be checked in
AnnaBridge	165:d1b4690b3f8b	4323	* contexts queue.
AnnaBridge	165:d1b4690b3f8b	4324	* @note A context is a setting of group injected sequencer:
AnnaBridge	165:d1b4690b3f8b	4325	* - group injected trigger
AnnaBridge	165:d1b4690b3f8b	4326	* - sequencer length
AnnaBridge	165:d1b4690b3f8b	4327	* - sequencer ranks
AnnaBridge	165:d1b4690b3f8b	4328	* This function is intended to be used when contexts queue is enabled,
AnnaBridge	165:d1b4690b3f8b	4329	* because the sequence must be fully configured in one time
AnnaBridge	165:d1b4690b3f8b	4330	* (functions to set separately injected trigger and sequencer channels
AnnaBridge	165:d1b4690b3f8b	4331	* cannot be used):
AnnaBridge	165:d1b4690b3f8b	4332	* Refer to function @ref LL_ADC_INJ_SetQueueMode().
AnnaBridge	165:d1b4690b3f8b	4333	* @note In the contexts queue, only the active context can be read.
AnnaBridge	165:d1b4690b3f8b	4334	* The parameters of this function can be read using functions:
AnnaBridge	165:d1b4690b3f8b	4335	* @arg @ref LL_ADC_INJ_GetTriggerSource()
AnnaBridge	165:d1b4690b3f8b	4336	* @arg @ref LL_ADC_INJ_GetTriggerEdge()
AnnaBridge	165:d1b4690b3f8b	4337	* @arg @ref LL_ADC_INJ_GetSequencerRanks()
AnnaBridge	165:d1b4690b3f8b	4338	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	165:d1b4690b3f8b	4339	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	165:d1b4690b3f8b	4340	* enabled separately.
AnnaBridge	165:d1b4690b3f8b	4341	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	165:d1b4690b3f8b	4342	* @note On STM32L4, some fast channels are available: fast analog inputs
AnnaBridge	165:d1b4690b3f8b	4343	* coming from GPIO pads (ADC_IN1..5).
AnnaBridge	165:d1b4690b3f8b	4344	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4345	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4346	* ADC must not be disabled. Can be enabled with or without conversion
AnnaBridge	165:d1b4690b3f8b	4347	* on going on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4348	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4349	* JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4350	* JSQR JL LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4351	* JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4352	* JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4353	* JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n
AnnaBridge	165:d1b4690b3f8b	4354	* JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext
AnnaBridge	165:d1b4690b3f8b	4355	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4356	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4357	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
AnnaBridge	165:d1b4690b3f8b	4358	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
AnnaBridge	165:d1b4690b3f8b	4359	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
AnnaBridge	165:d1b4690b3f8b	4360	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
AnnaBridge	165:d1b4690b3f8b	4361	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
AnnaBridge	165:d1b4690b3f8b	4362	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
AnnaBridge	165:d1b4690b3f8b	4363	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
AnnaBridge	165:d1b4690b3f8b	4364	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
AnnaBridge	165:d1b4690b3f8b	4365	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
AnnaBridge	165:d1b4690b3f8b	4366	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
AnnaBridge	165:d1b4690b3f8b	4367	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
AnnaBridge	165:d1b4690b3f8b	4368	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
AnnaBridge	165:d1b4690b3f8b	4369	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
AnnaBridge	165:d1b4690b3f8b	4370	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
AnnaBridge	165:d1b4690b3f8b	4371	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
AnnaBridge	165:d1b4690b3f8b	4372	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
AnnaBridge	165:d1b4690b3f8b	4373	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
AnnaBridge	165:d1b4690b3f8b	4374	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4375	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
AnnaBridge	165:d1b4690b3f8b	4376	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
AnnaBridge	165:d1b4690b3f8b	4377	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
AnnaBridge	165:d1b4690b3f8b	4378	*
AnnaBridge	165:d1b4690b3f8b	4379	* Note: This parameter is discarded in case of SW start:
AnnaBridge	165:d1b4690b3f8b	4380	* parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE".
AnnaBridge	165:d1b4690b3f8b	4381	* @param SequencerNbRanks This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4382	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
AnnaBridge	165:d1b4690b3f8b	4383	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
AnnaBridge	165:d1b4690b3f8b	4384	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
AnnaBridge	165:d1b4690b3f8b	4385	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
AnnaBridge	165:d1b4690b3f8b	4386	* @param Rank1_Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4387	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4388	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4389	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4390	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4391	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4392	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4393	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4394	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4395	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4396	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4397	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4398	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4399	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4400	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4401	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4402	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4403	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4404	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4405	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4406	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4407	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4408	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4409	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4410	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4411	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4412	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4413	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4414	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4415	*
AnnaBridge	165:d1b4690b3f8b	4416	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4417	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4418	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4419	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4420	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4421	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4422	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4423	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4424	* @param Rank2_Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4425	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4426	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4427	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4428	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4429	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4430	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4431	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4432	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4433	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4434	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4435	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4436	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4437	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4438	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4439	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4440	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4441	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4442	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4443	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4444	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4445	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4446	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4447	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4448	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4449	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4450	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4451	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4452	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4453	*
AnnaBridge	165:d1b4690b3f8b	4454	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4455	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4456	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4457	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4458	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4459	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4460	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4461	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4462	* @param Rank3_Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4463	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4464	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4465	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4466	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4467	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4468	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4469	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4470	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4471	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4472	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4473	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4474	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4475	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4476	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4477	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4478	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4479	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4480	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4481	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4482	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4483	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4484	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4485	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4486	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4487	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4488	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4489	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4490	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4491	*
AnnaBridge	165:d1b4690b3f8b	4492	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4493	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4494	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4495	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4496	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4497	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4498	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4499	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4500	* @param Rank4_Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4501	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4502	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4503	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4504	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4505	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4506	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4507	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4508	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4509	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4510	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4511	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4512	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4513	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4514	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4515	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4516	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4517	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4518	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4519	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4520	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4521	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4522	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4523	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4524	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4525	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4526	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4527	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4528	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4529	*
AnnaBridge	165:d1b4690b3f8b	4530	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4531	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4532	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4533	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4534	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4535	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4536	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4537	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4538	* @retval None
AnnaBridge	165:d1b4690b3f8b	4539	*/
AnnaBridge	165:d1b4690b3f8b	4540	__STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx,
AnnaBridge	165:d1b4690b3f8b	4541	uint32_t TriggerSource,
AnnaBridge	165:d1b4690b3f8b	4542	uint32_t ExternalTriggerEdge,
AnnaBridge	165:d1b4690b3f8b	4543	uint32_t SequencerNbRanks,
AnnaBridge	165:d1b4690b3f8b	4544	uint32_t Rank1_Channel,
AnnaBridge	165:d1b4690b3f8b	4545	uint32_t Rank2_Channel,
AnnaBridge	165:d1b4690b3f8b	4546	uint32_t Rank3_Channel,
AnnaBridge	165:d1b4690b3f8b	4547	uint32_t Rank4_Channel)
AnnaBridge	165:d1b4690b3f8b	4548	{
AnnaBridge	165:d1b4690b3f8b	4549	/* Set bits with content of parameter "Rankx_Channel" with bits position */
AnnaBridge	165:d1b4690b3f8b	4550	/* in register depending on literal "LL_ADC_INJ_RANK_x". */
AnnaBridge	165:d1b4690b3f8b	4551	/* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */
AnnaBridge	165:d1b4690b3f8b	4552	/* because containing other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	4553	/* If parameter "TriggerSource" is set to SW start, then parameter */
AnnaBridge	165:d1b4690b3f8b	4554	/* "ExternalTriggerEdge" is discarded. */
AnnaBridge	165:d1b4690b3f8b	4555	MODIFY_REG(ADCx->JSQR ,
AnnaBridge	165:d1b4690b3f8b	4556	ADC_JSQR_JEXTSEL \|
AnnaBridge	165:d1b4690b3f8b	4557	ADC_JSQR_JEXTEN \|
AnnaBridge	165:d1b4690b3f8b	4558	ADC_JSQR_JSQ4 \|
AnnaBridge	165:d1b4690b3f8b	4559	ADC_JSQR_JSQ3 \|
AnnaBridge	165:d1b4690b3f8b	4560	ADC_JSQR_JSQ2 \|
AnnaBridge	165:d1b4690b3f8b	4561	ADC_JSQR_JSQ1 \|
AnnaBridge	165:d1b4690b3f8b	4562	ADC_JSQR_JL ,
AnnaBridge	165:d1b4690b3f8b	4563	TriggerSource \|
AnnaBridge	165:d1b4690b3f8b	4564	(ExternalTriggerEdge * ((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE))) \|
AnnaBridge	165:d1b4690b3f8b	4565	(((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) \|
AnnaBridge	165:d1b4690b3f8b	4566	(((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) \|
AnnaBridge	165:d1b4690b3f8b	4567	(((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) \|
AnnaBridge	165:d1b4690b3f8b	4568	(((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) \|
AnnaBridge	165:d1b4690b3f8b	4569	SequencerNbRanks
AnnaBridge	165:d1b4690b3f8b	4570	);
AnnaBridge	165:d1b4690b3f8b	4571	}
AnnaBridge	165:d1b4690b3f8b	4572
AnnaBridge	165:d1b4690b3f8b	4573	/**
AnnaBridge	165:d1b4690b3f8b	4574	* @}
AnnaBridge	165:d1b4690b3f8b	4575	*/
AnnaBridge	165:d1b4690b3f8b	4576
AnnaBridge	165:d1b4690b3f8b	4577	/** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels
AnnaBridge	165:d1b4690b3f8b	4578	* @{
AnnaBridge	165:d1b4690b3f8b	4579	*/
AnnaBridge	165:d1b4690b3f8b	4580
AnnaBridge	165:d1b4690b3f8b	4581	/**
AnnaBridge	165:d1b4690b3f8b	4582	* @brief Set sampling time of the selected ADC channel
AnnaBridge	165:d1b4690b3f8b	4583	* Unit: ADC clock cycles.
AnnaBridge	165:d1b4690b3f8b	4584	* @note On this device, sampling time is on channel scope: independently
AnnaBridge	165:d1b4690b3f8b	4585	* of channel mapped on ADC group regular or injected.
AnnaBridge	165:d1b4690b3f8b	4586	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
AnnaBridge	165:d1b4690b3f8b	4587	* converted:
AnnaBridge	165:d1b4690b3f8b	4588	* sampling time constraints must be respected (sampling time can be
AnnaBridge	165:d1b4690b3f8b	4589	* adjusted in function of ADC clock frequency and sampling time
AnnaBridge	165:d1b4690b3f8b	4590	* setting).
AnnaBridge	165:d1b4690b3f8b	4591	* Refer to device datasheet for timings values (parameters TS_vrefint,
AnnaBridge	165:d1b4690b3f8b	4592	* TS_temp, ...).
AnnaBridge	165:d1b4690b3f8b	4593	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	165:d1b4690b3f8b	4594	* On this STM32 serie, ADC processing time is:
AnnaBridge	165:d1b4690b3f8b	4595	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	165:d1b4690b3f8b	4596	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	165:d1b4690b3f8b	4597	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	165:d1b4690b3f8b	4598	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	165:d1b4690b3f8b	4599	* @note In case of ADC conversion of internal channel (VrefInt,
AnnaBridge	165:d1b4690b3f8b	4600	* temperature sensor, ...), a sampling time minimum value
AnnaBridge	165:d1b4690b3f8b	4601	* is required.
AnnaBridge	165:d1b4690b3f8b	4602	* Refer to device datasheet.
AnnaBridge	165:d1b4690b3f8b	4603	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4604	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4605	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	4606	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4607	* @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4608	* SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4609	* SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4610	* SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4611	* SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4612	* SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4613	* SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4614	* SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4615	* SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4616	* SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4617	* SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4618	* SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4619	* SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4620	* SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4621	* SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4622	* SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4623	* SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4624	* SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4625	* SMPR2 SMP18 LL_ADC_SetChannelSamplingTime
AnnaBridge	165:d1b4690b3f8b	4626	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4627	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4628	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4629	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4630	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4631	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4632	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4633	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4634	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4635	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4636	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4637	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4638	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4639	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4640	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4641	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4642	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4643	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4644	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4645	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4646	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4647	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4648	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4649	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4650	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4651	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4652	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4653	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4654	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4655	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4656	*
AnnaBridge	165:d1b4690b3f8b	4657	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4658	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4659	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4660	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4661	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4662	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4663	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4664	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4665	* @param SamplingTime This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4666	* @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1)
AnnaBridge	165:d1b4690b3f8b	4667	* @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4668	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4669	* @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4670	* @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4671	* @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4672	* @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4673	* @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4674	*
AnnaBridge	165:d1b4690b3f8b	4675	* (1) On some devices, ADC sampling time 2.5 ADC clock cycles
AnnaBridge	165:d1b4690b3f8b	4676	* can be replaced by 3.5 ADC clock cycles.
AnnaBridge	165:d1b4690b3f8b	4677	* Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig().
AnnaBridge	165:d1b4690b3f8b	4678	* @retval None
AnnaBridge	165:d1b4690b3f8b	4679	*/
AnnaBridge	165:d1b4690b3f8b	4680	__STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTime)
AnnaBridge	165:d1b4690b3f8b	4681	{
AnnaBridge	165:d1b4690b3f8b	4682	/* Set bits with content of parameter "SamplingTime" with bits position */
AnnaBridge	165:d1b4690b3f8b	4683	/* in register and register position depending on parameter "Channel". */
AnnaBridge	165:d1b4690b3f8b	4684	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	165:d1b4690b3f8b	4685	/* other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	4686	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	4687	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_SMPRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	4688
AnnaBridge	165:d1b4690b3f8b	4689	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	4690	ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS),
AnnaBridge	165:d1b4690b3f8b	4691	SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	4692	#else
AnnaBridge	165:d1b4690b3f8b	4693	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	4694
AnnaBridge	165:d1b4690b3f8b	4695	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	4696	ADC_SMPR1_SMP0 << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK),
AnnaBridge	165:d1b4690b3f8b	4697	SamplingTime << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	4698	#endif
AnnaBridge	165:d1b4690b3f8b	4699	}
AnnaBridge	165:d1b4690b3f8b	4700
AnnaBridge	165:d1b4690b3f8b	4701	/**
AnnaBridge	165:d1b4690b3f8b	4702	* @brief Get sampling time of the selected ADC channel
AnnaBridge	165:d1b4690b3f8b	4703	* Unit: ADC clock cycles.
AnnaBridge	165:d1b4690b3f8b	4704	* @note On this device, sampling time is on channel scope: independently
AnnaBridge	165:d1b4690b3f8b	4705	* of channel mapped on ADC group regular or injected.
AnnaBridge	165:d1b4690b3f8b	4706	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	165:d1b4690b3f8b	4707	* On this STM32 serie, ADC processing time is:
AnnaBridge	165:d1b4690b3f8b	4708	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	165:d1b4690b3f8b	4709	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	165:d1b4690b3f8b	4710	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	165:d1b4690b3f8b	4711	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	165:d1b4690b3f8b	4712	* @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4713	* SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4714	* SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4715	* SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4716	* SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4717	* SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4718	* SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4719	* SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4720	* SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4721	* SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4722	* SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4723	* SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4724	* SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4725	* SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4726	* SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4727	* SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4728	* SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4729	* SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n
AnnaBridge	165:d1b4690b3f8b	4730	* SMPR2 SMP18 LL_ADC_GetChannelSamplingTime
AnnaBridge	165:d1b4690b3f8b	4731	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4732	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4733	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	165:d1b4690b3f8b	4734	* @arg @ref LL_ADC_CHANNEL_1 (7)
AnnaBridge	165:d1b4690b3f8b	4735	* @arg @ref LL_ADC_CHANNEL_2 (7)
AnnaBridge	165:d1b4690b3f8b	4736	* @arg @ref LL_ADC_CHANNEL_3 (7)
AnnaBridge	165:d1b4690b3f8b	4737	* @arg @ref LL_ADC_CHANNEL_4 (7)
AnnaBridge	165:d1b4690b3f8b	4738	* @arg @ref LL_ADC_CHANNEL_5 (7)
AnnaBridge	165:d1b4690b3f8b	4739	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4740	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4741	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4742	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4743	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4744	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4745	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4746	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4747	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4748	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4749	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	165:d1b4690b3f8b	4750	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	165:d1b4690b3f8b	4751	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	165:d1b4690b3f8b	4752	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
AnnaBridge	165:d1b4690b3f8b	4753	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
AnnaBridge	165:d1b4690b3f8b	4754	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
AnnaBridge	165:d1b4690b3f8b	4755	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
AnnaBridge	165:d1b4690b3f8b	4756	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
AnnaBridge	165:d1b4690b3f8b	4757	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4758	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
AnnaBridge	165:d1b4690b3f8b	4759	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4760	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
AnnaBridge	165:d1b4690b3f8b	4761	*
AnnaBridge	165:d1b4690b3f8b	4762	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	4763	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	4764	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4765	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
AnnaBridge	165:d1b4690b3f8b	4766	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	4767	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
AnnaBridge	165:d1b4690b3f8b	4768	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4769	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
AnnaBridge	165:d1b4690b3f8b	4770	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4771	* @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1)
AnnaBridge	165:d1b4690b3f8b	4772	* @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4773	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4774	* @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4775	* @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4776	* @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4777	* @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4778	* @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5
AnnaBridge	165:d1b4690b3f8b	4779	*
AnnaBridge	165:d1b4690b3f8b	4780	* (1) On some devices, ADC sampling time 2.5 ADC clock cycles
AnnaBridge	165:d1b4690b3f8b	4781	* can be replaced by 3.5 ADC clock cycles.
AnnaBridge	165:d1b4690b3f8b	4782	* Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig().
AnnaBridge	165:d1b4690b3f8b	4783	*/
AnnaBridge	165:d1b4690b3f8b	4784	__STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	165:d1b4690b3f8b	4785	{
AnnaBridge	165:d1b4690b3f8b	4786	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	4787	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_SMPRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	4788
AnnaBridge	165:d1b4690b3f8b	4789	return (uint32_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	4790	ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS))
AnnaBridge	165:d1b4690b3f8b	4791	>> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS)
AnnaBridge	165:d1b4690b3f8b	4792	);
AnnaBridge	165:d1b4690b3f8b	4793	#else
AnnaBridge	165:d1b4690b3f8b	4794	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	4795
AnnaBridge	165:d1b4690b3f8b	4796	return (uint32_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	4797	ADC_SMPR1_SMP0 << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK))
AnnaBridge	165:d1b4690b3f8b	4798	>> __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK)
AnnaBridge	165:d1b4690b3f8b	4799	);
AnnaBridge	165:d1b4690b3f8b	4800	#endif
AnnaBridge	165:d1b4690b3f8b	4801	}
AnnaBridge	165:d1b4690b3f8b	4802
AnnaBridge	165:d1b4690b3f8b	4803	/**
AnnaBridge	165:d1b4690b3f8b	4804	* @brief Set mode single-ended or differential input of the selected
AnnaBridge	165:d1b4690b3f8b	4805	* ADC channel.
AnnaBridge	165:d1b4690b3f8b	4806	* @note Channel ending is on channel scope: independently of channel mapped
AnnaBridge	165:d1b4690b3f8b	4807	* on ADC group regular or injected.
AnnaBridge	165:d1b4690b3f8b	4808	* In differential mode: Differential measurement is carried out
AnnaBridge	165:d1b4690b3f8b	4809	* between the selected channel 'i' (positive input) and
AnnaBridge	165:d1b4690b3f8b	4810	* channel 'i+1' (negative input). Only channel 'i' has to be
AnnaBridge	165:d1b4690b3f8b	4811	* configured, channel 'i+1' is configured automatically.
AnnaBridge	165:d1b4690b3f8b	4812	* @note Refer to Reference Manual to ensure the selected channel is
AnnaBridge	165:d1b4690b3f8b	4813	* available in differential mode.
AnnaBridge	165:d1b4690b3f8b	4814	* For example, internal channels (VrefInt, TempSensor, ...) are
AnnaBridge	165:d1b4690b3f8b	4815	* not available in differential mode.
AnnaBridge	165:d1b4690b3f8b	4816	* @note When configuring a channel 'i' in differential mode,
AnnaBridge	165:d1b4690b3f8b	4817	* the channel 'i+1' is not usable separately.
AnnaBridge	165:d1b4690b3f8b	4818	* @note On STM32L4, channels 16, 17, 18 of ADC1, ADC2, ADC3 (if available)
AnnaBridge	165:d1b4690b3f8b	4819	* are internally fixed to single-ended inputs configuration.
AnnaBridge	165:d1b4690b3f8b	4820	* @note For ADC channels configured in differential mode, both inputs
AnnaBridge	165:d1b4690b3f8b	4821	* should be biased at (Vref+)/2 +/-200mV.
AnnaBridge	165:d1b4690b3f8b	4822	* (Vref+ is the analog voltage reference)
AnnaBridge	165:d1b4690b3f8b	4823	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4824	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4825	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	4826	* @note One or several values can be selected.
AnnaBridge	165:d1b4690b3f8b	4827	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	165:d1b4690b3f8b	4828	* @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff
AnnaBridge	165:d1b4690b3f8b	4829	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4830	* @param Channel This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4831	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	165:d1b4690b3f8b	4832	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	165:d1b4690b3f8b	4833	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	165:d1b4690b3f8b	4834	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	165:d1b4690b3f8b	4835	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	165:d1b4690b3f8b	4836	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4837	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4838	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4839	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4840	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4841	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4842	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4843	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4844	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4845	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4846	* @param SingleDiff This parameter can be a combination of the following values:
AnnaBridge	165:d1b4690b3f8b	4847	* @arg @ref LL_ADC_SINGLE_ENDED
AnnaBridge	165:d1b4690b3f8b	4848	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
AnnaBridge	165:d1b4690b3f8b	4849	* @retval None
AnnaBridge	165:d1b4690b3f8b	4850	*/
AnnaBridge	165:d1b4690b3f8b	4851	__STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff)
AnnaBridge	165:d1b4690b3f8b	4852	{
AnnaBridge	165:d1b4690b3f8b	4853	/* Bits of channels in single or differential mode are set only for */
AnnaBridge	165:d1b4690b3f8b	4854	/* differential mode (for single mode, mask of bits allowed to be set is */
AnnaBridge	165:d1b4690b3f8b	4855	/* shifted out of range of bits of channels in single or differential mode. */
AnnaBridge	165:d1b4690b3f8b	4856	MODIFY_REG(ADCx->DIFSEL,
AnnaBridge	165:d1b4690b3f8b	4857	Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
AnnaBridge	165:d1b4690b3f8b	4858	(Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL << (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK)));
AnnaBridge	165:d1b4690b3f8b	4859	}
AnnaBridge	165:d1b4690b3f8b	4860
AnnaBridge	165:d1b4690b3f8b	4861	/**
AnnaBridge	165:d1b4690b3f8b	4862	* @brief Get mode single-ended or differential input of the selected
AnnaBridge	165:d1b4690b3f8b	4863	* ADC channel.
AnnaBridge	165:d1b4690b3f8b	4864	* @note When configuring a channel 'i' in differential mode,
AnnaBridge	165:d1b4690b3f8b	4865	* the channel 'i+1' is not usable separately.
AnnaBridge	165:d1b4690b3f8b	4866	* Therefore, to ensure a channel is configured in single-ended mode,
AnnaBridge	165:d1b4690b3f8b	4867	* the configuration of channel itself and the channel 'i-1' must be
AnnaBridge	165:d1b4690b3f8b	4868	* read back (to ensure that the selected channel channel has not been
AnnaBridge	165:d1b4690b3f8b	4869	* configured in differential mode by the previous channel).
AnnaBridge	165:d1b4690b3f8b	4870	* @note Refer to Reference Manual to ensure the selected channel is
AnnaBridge	165:d1b4690b3f8b	4871	* available in differential mode.
AnnaBridge	165:d1b4690b3f8b	4872	* For example, internal channels (VrefInt, TempSensor, ...) are
AnnaBridge	165:d1b4690b3f8b	4873	* not available in differential mode.
AnnaBridge	165:d1b4690b3f8b	4874	* @note When configuring a channel 'i' in differential mode,
AnnaBridge	165:d1b4690b3f8b	4875	* the channel 'i+1' is not usable separately.
AnnaBridge	165:d1b4690b3f8b	4876	* @note On STM32L4, channels 16, 17, 18 of ADC1, ADC2, ADC3 (if available)
AnnaBridge	165:d1b4690b3f8b	4877	* are internally fixed to single-ended inputs configuration.
AnnaBridge	165:d1b4690b3f8b	4878	* @note One or several values can be selected. In this case, the value
AnnaBridge	165:d1b4690b3f8b	4879	* returned is null if all channels are in single ended-mode.
AnnaBridge	165:d1b4690b3f8b	4880	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	165:d1b4690b3f8b	4881	* @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff
AnnaBridge	165:d1b4690b3f8b	4882	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4883	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	165:d1b4690b3f8b	4884	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	165:d1b4690b3f8b	4885	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	165:d1b4690b3f8b	4886	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	165:d1b4690b3f8b	4887	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	165:d1b4690b3f8b	4888	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	165:d1b4690b3f8b	4889	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	165:d1b4690b3f8b	4890	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	165:d1b4690b3f8b	4891	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	165:d1b4690b3f8b	4892	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	165:d1b4690b3f8b	4893	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	165:d1b4690b3f8b	4894	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	165:d1b4690b3f8b	4895	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	165:d1b4690b3f8b	4896	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	165:d1b4690b3f8b	4897	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	165:d1b4690b3f8b	4898	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	165:d1b4690b3f8b	4899	* @retval 0: channel in single-ended mode, else: channel in differential mode
AnnaBridge	165:d1b4690b3f8b	4900	*/
AnnaBridge	165:d1b4690b3f8b	4901	__STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	165:d1b4690b3f8b	4902	{
AnnaBridge	165:d1b4690b3f8b	4903	return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK)));
AnnaBridge	165:d1b4690b3f8b	4904	}
AnnaBridge	165:d1b4690b3f8b	4905
AnnaBridge	165:d1b4690b3f8b	4906	/**
AnnaBridge	165:d1b4690b3f8b	4907	* @}
AnnaBridge	165:d1b4690b3f8b	4908	*/
AnnaBridge	165:d1b4690b3f8b	4909
AnnaBridge	165:d1b4690b3f8b	4910	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
AnnaBridge	165:d1b4690b3f8b	4911	* @{
AnnaBridge	165:d1b4690b3f8b	4912	*/
AnnaBridge	165:d1b4690b3f8b	4913
AnnaBridge	165:d1b4690b3f8b	4914	/**
AnnaBridge	165:d1b4690b3f8b	4915	* @brief Set ADC analog watchdog monitored channels:
AnnaBridge	165:d1b4690b3f8b	4916	* a single channel, multiple channels or all channels,
AnnaBridge	165:d1b4690b3f8b	4917	* on ADC groups regular and-or injected.
AnnaBridge	165:d1b4690b3f8b	4918	* @note Once monitored channels are selected, analog watchdog
AnnaBridge	165:d1b4690b3f8b	4919	* is enabled.
AnnaBridge	165:d1b4690b3f8b	4920	* @note In case of need to define a single channel to monitor
AnnaBridge	165:d1b4690b3f8b	4921	* with analog watchdog from sequencer channel definition,
AnnaBridge	165:d1b4690b3f8b	4922	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
AnnaBridge	165:d1b4690b3f8b	4923	* @note On this STM32 serie, there are 2 kinds of analog watchdog
AnnaBridge	165:d1b4690b3f8b	4924	* instance:
AnnaBridge	165:d1b4690b3f8b	4925	* - AWD standard (instance AWD1):
AnnaBridge	165:d1b4690b3f8b	4926	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	165:d1b4690b3f8b	4927	* - groups monitored: ADC groups regular and-or injected.
AnnaBridge	165:d1b4690b3f8b	4928	* - resolution: resolution is not limited (corresponds to
AnnaBridge	165:d1b4690b3f8b	4929	* ADC resolution configured).
AnnaBridge	165:d1b4690b3f8b	4930	* - AWD flexible (instances AWD2, AWD3):
AnnaBridge	165:d1b4690b3f8b	4931	* - channels monitored: flexible on channels monitored, selection is
AnnaBridge	165:d1b4690b3f8b	4932	* channel wise, from from 1 to all channels.
AnnaBridge	165:d1b4690b3f8b	4933	* Specificity of this analog watchdog: Multiple channels can
AnnaBridge	165:d1b4690b3f8b	4934	* be selected. For example:
AnnaBridge	165:d1b4690b3f8b	4935	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
AnnaBridge	165:d1b4690b3f8b	4936	* - groups monitored: not selection possible (monitoring on both
AnnaBridge	165:d1b4690b3f8b	4937	* groups regular and injected).
AnnaBridge	165:d1b4690b3f8b	4938	* Channels selected are monitored on groups regular and injected:
AnnaBridge	165:d1b4690b3f8b	4939	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
AnnaBridge	165:d1b4690b3f8b	4940	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
AnnaBridge	165:d1b4690b3f8b	4941	* - resolution: resolution is limited to 8 bits: if ADC resolution is
AnnaBridge	165:d1b4690b3f8b	4942	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
AnnaBridge	165:d1b4690b3f8b	4943	* the 2 LSB are ignored.
AnnaBridge	165:d1b4690b3f8b	4944	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	4945	* ADC state:
AnnaBridge	165:d1b4690b3f8b	4946	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	4947	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	4948	* @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	4949	* CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	4950	* CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	4951	* CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	4952	* AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	4953	* AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels
AnnaBridge	165:d1b4690b3f8b	4954	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	4955	* @param AWDy This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4956	* @arg @ref LL_ADC_AWD1
AnnaBridge	165:d1b4690b3f8b	4957	* @arg @ref LL_ADC_AWD2
AnnaBridge	165:d1b4690b3f8b	4958	* @arg @ref LL_ADC_AWD3
AnnaBridge	165:d1b4690b3f8b	4959	* @param AWDChannelGroup This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	4960	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	165:d1b4690b3f8b	4961	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
AnnaBridge	165:d1b4690b3f8b	4962	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4963	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4964	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
AnnaBridge	165:d1b4690b3f8b	4965	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4966	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4967	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
AnnaBridge	165:d1b4690b3f8b	4968	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4969	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4970	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
AnnaBridge	165:d1b4690b3f8b	4971	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4972	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4973	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
AnnaBridge	165:d1b4690b3f8b	4974	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4975	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4976	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
AnnaBridge	165:d1b4690b3f8b	4977	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4978	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4979	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
AnnaBridge	165:d1b4690b3f8b	4980	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4981	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4982	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
AnnaBridge	165:d1b4690b3f8b	4983	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4984	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4985	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
AnnaBridge	165:d1b4690b3f8b	4986	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4987	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4988	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
AnnaBridge	165:d1b4690b3f8b	4989	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4990	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4991	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
AnnaBridge	165:d1b4690b3f8b	4992	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4993	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4994	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
AnnaBridge	165:d1b4690b3f8b	4995	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4996	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
AnnaBridge	165:d1b4690b3f8b	4997	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
AnnaBridge	165:d1b4690b3f8b	4998	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
AnnaBridge	165:d1b4690b3f8b	4999	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5000	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
AnnaBridge	165:d1b4690b3f8b	5001	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5002	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5003	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
AnnaBridge	165:d1b4690b3f8b	5004	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5005	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5006	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
AnnaBridge	165:d1b4690b3f8b	5007	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5008	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5009	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
AnnaBridge	165:d1b4690b3f8b	5010	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5011	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5012	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
AnnaBridge	165:d1b4690b3f8b	5013	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5014	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5015	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
AnnaBridge	165:d1b4690b3f8b	5016	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5017	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5018	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
AnnaBridge	165:d1b4690b3f8b	5019	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5020	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5021	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
AnnaBridge	165:d1b4690b3f8b	5022	* @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
AnnaBridge	165:d1b4690b3f8b	5023	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
AnnaBridge	165:d1b4690b3f8b	5024	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(4)
AnnaBridge	165:d1b4690b3f8b	5025	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(4)
AnnaBridge	165:d1b4690b3f8b	5026	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (4)
AnnaBridge	165:d1b4690b3f8b	5027	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(4)
AnnaBridge	165:d1b4690b3f8b	5028	* @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(4)
AnnaBridge	165:d1b4690b3f8b	5029	* @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (4)
AnnaBridge	165:d1b4690b3f8b	5030	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	5031	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_INJ (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	5032	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG_INJ (2)(5)
AnnaBridge	165:d1b4690b3f8b	5033	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	5034	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_INJ (0)(2)(5)
AnnaBridge	165:d1b4690b3f8b	5035	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG_INJ (2)(5)
AnnaBridge	165:d1b4690b3f8b	5036	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	5037	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	5038	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)(6)
AnnaBridge	165:d1b4690b3f8b	5039	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	5040	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)(6)
AnnaBridge	165:d1b4690b3f8b	5041	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)(6)
AnnaBridge	165:d1b4690b3f8b	5042	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	5043	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	5044	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ (3)(6)
AnnaBridge	165:d1b4690b3f8b	5045	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	5046	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ (0)(3)(6)
AnnaBridge	165:d1b4690b3f8b	5047	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ (3)(6)
AnnaBridge	165:d1b4690b3f8b	5048	*
AnnaBridge	165:d1b4690b3f8b	5049	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.\n
AnnaBridge	165:d1b4690b3f8b	5050	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
AnnaBridge	165:d1b4690b3f8b	5051	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
AnnaBridge	165:d1b4690b3f8b	5052	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
AnnaBridge	165:d1b4690b3f8b	5053	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.
AnnaBridge	165:d1b4690b3f8b	5054	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
AnnaBridge	165:d1b4690b3f8b	5055	* (6) On STM32L4, parameter available on devices with several ADC instances.
AnnaBridge	165:d1b4690b3f8b	5056	* @retval None
AnnaBridge	165:d1b4690b3f8b	5057	*/
AnnaBridge	165:d1b4690b3f8b	5058	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDChannelGroup)
AnnaBridge	165:d1b4690b3f8b	5059	{
AnnaBridge	165:d1b4690b3f8b	5060	/* Set bits with content of parameter "AWDChannelGroup" with bits position */
AnnaBridge	165:d1b4690b3f8b	5061	/* in register and register position depending on parameter "AWDy". */
AnnaBridge	165:d1b4690b3f8b	5062	/* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */
AnnaBridge	165:d1b4690b3f8b	5063	/* containing other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	5064	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	5065	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> ADC_AWD_CRX_REGOFFSET_POS)
AnnaBridge	165:d1b4690b3f8b	5066	+ ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL));
AnnaBridge	165:d1b4690b3f8b	5067
AnnaBridge	165:d1b4690b3f8b	5068	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	5069	(AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK),
AnnaBridge	165:d1b4690b3f8b	5070	AWDChannelGroup & AWDy);
AnnaBridge	165:d1b4690b3f8b	5071	#else
AnnaBridge	165:d1b4690b3f8b	5072	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, __ADC_MASK_SHIFT(AWDy, ADC_AWD_CRX_REGOFFSET_MASK)
AnnaBridge	165:d1b4690b3f8b	5073	+ ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL));
AnnaBridge	165:d1b4690b3f8b	5074
AnnaBridge	165:d1b4690b3f8b	5075	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	5076	(AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK),
AnnaBridge	165:d1b4690b3f8b	5077	AWDChannelGroup & AWDy);
AnnaBridge	165:d1b4690b3f8b	5078	#endif
AnnaBridge	165:d1b4690b3f8b	5079	}
AnnaBridge	165:d1b4690b3f8b	5080
AnnaBridge	165:d1b4690b3f8b	5081	/**
AnnaBridge	165:d1b4690b3f8b	5082	* @brief Get ADC analog watchdog monitored channel.
AnnaBridge	165:d1b4690b3f8b	5083	* @note Usage of the returned channel number:
AnnaBridge	165:d1b4690b3f8b	5084	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	165:d1b4690b3f8b	5085	* the returned channel number is only partly formatted on definition
AnnaBridge	165:d1b4690b3f8b	5086	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	165:d1b4690b3f8b	5087	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	165:d1b4690b3f8b	5088	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	5089	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	165:d1b4690b3f8b	5090	* as parameter for another function.
AnnaBridge	165:d1b4690b3f8b	5091	* - To get the channel number in decimal format:
AnnaBridge	165:d1b4690b3f8b	5092	* process the returned value with the helper macro
AnnaBridge	165:d1b4690b3f8b	5093	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	165:d1b4690b3f8b	5094	* Applicable only when the analog watchdog is set to monitor
AnnaBridge	165:d1b4690b3f8b	5095	* one channel.
AnnaBridge	165:d1b4690b3f8b	5096	* @note On this STM32 serie, there are 2 kinds of analog watchdog
AnnaBridge	165:d1b4690b3f8b	5097	* instance:
AnnaBridge	165:d1b4690b3f8b	5098	* - AWD standard (instance AWD1):
AnnaBridge	165:d1b4690b3f8b	5099	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	165:d1b4690b3f8b	5100	* - groups monitored: ADC groups regular and-or injected.
AnnaBridge	165:d1b4690b3f8b	5101	* - resolution: resolution is not limited (corresponds to
AnnaBridge	165:d1b4690b3f8b	5102	* ADC resolution configured).
AnnaBridge	165:d1b4690b3f8b	5103	* - AWD flexible (instances AWD2, AWD3):
AnnaBridge	165:d1b4690b3f8b	5104	* - channels monitored: flexible on channels monitored, selection is
AnnaBridge	165:d1b4690b3f8b	5105	* channel wise, from from 1 to all channels.
AnnaBridge	165:d1b4690b3f8b	5106	* Specificity of this analog watchdog: Multiple channels can
AnnaBridge	165:d1b4690b3f8b	5107	* be selected. For example:
AnnaBridge	165:d1b4690b3f8b	5108	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
AnnaBridge	165:d1b4690b3f8b	5109	* - groups monitored: not selection possible (monitoring on both
AnnaBridge	165:d1b4690b3f8b	5110	* groups regular and injected).
AnnaBridge	165:d1b4690b3f8b	5111	* Channels selected are monitored on groups regular and injected:
AnnaBridge	165:d1b4690b3f8b	5112	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
AnnaBridge	165:d1b4690b3f8b	5113	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
AnnaBridge	165:d1b4690b3f8b	5114	* - resolution: resolution is limited to 8 bits: if ADC resolution is
AnnaBridge	165:d1b4690b3f8b	5115	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
AnnaBridge	165:d1b4690b3f8b	5116	* the 2 LSB are ignored.
AnnaBridge	165:d1b4690b3f8b	5117	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5118	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5119	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5120	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	5121	* @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	5122	* CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	5123	* CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	5124	* CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	5125	* AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	165:d1b4690b3f8b	5126	* AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels
AnnaBridge	165:d1b4690b3f8b	5127	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5128	* @param AWDy This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5129	* @arg @ref LL_ADC_AWD1
AnnaBridge	165:d1b4690b3f8b	5130	* @arg @ref LL_ADC_AWD2 (1)
AnnaBridge	165:d1b4690b3f8b	5131	* @arg @ref LL_ADC_AWD3 (1)
AnnaBridge	165:d1b4690b3f8b	5132	*
AnnaBridge	165:d1b4690b3f8b	5133	* (1) On this AWD number, monitored channel can be retrieved
AnnaBridge	165:d1b4690b3f8b	5134	* if only 1 channel is programmed (or none or all channels).
AnnaBridge	165:d1b4690b3f8b	5135	* This function cannot retrieve monitored channel if
AnnaBridge	165:d1b4690b3f8b	5136	* multiple channels are programmed simultaneously
AnnaBridge	165:d1b4690b3f8b	5137	* by bitfield.
AnnaBridge	165:d1b4690b3f8b	5138	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5139	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	165:d1b4690b3f8b	5140	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
AnnaBridge	165:d1b4690b3f8b	5141	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5142	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5143	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
AnnaBridge	165:d1b4690b3f8b	5144	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5145	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5146	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
AnnaBridge	165:d1b4690b3f8b	5147	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5148	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5149	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
AnnaBridge	165:d1b4690b3f8b	5150	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5151	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5152	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
AnnaBridge	165:d1b4690b3f8b	5153	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5154	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5155	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
AnnaBridge	165:d1b4690b3f8b	5156	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5157	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5158	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
AnnaBridge	165:d1b4690b3f8b	5159	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5160	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5161	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
AnnaBridge	165:d1b4690b3f8b	5162	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5163	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5164	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
AnnaBridge	165:d1b4690b3f8b	5165	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5166	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5167	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
AnnaBridge	165:d1b4690b3f8b	5168	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5169	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5170	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
AnnaBridge	165:d1b4690b3f8b	5171	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5172	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5173	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
AnnaBridge	165:d1b4690b3f8b	5174	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5175	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5176	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
AnnaBridge	165:d1b4690b3f8b	5177	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5178	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5179	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
AnnaBridge	165:d1b4690b3f8b	5180	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5181	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5182	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
AnnaBridge	165:d1b4690b3f8b	5183	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5184	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5185	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
AnnaBridge	165:d1b4690b3f8b	5186	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5187	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5188	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
AnnaBridge	165:d1b4690b3f8b	5189	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5190	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5191	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
AnnaBridge	165:d1b4690b3f8b	5192	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5193	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5194	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
AnnaBridge	165:d1b4690b3f8b	5195	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5196	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5197	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
AnnaBridge	165:d1b4690b3f8b	5198	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
AnnaBridge	165:d1b4690b3f8b	5199	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
AnnaBridge	165:d1b4690b3f8b	5200	*
AnnaBridge	165:d1b4690b3f8b	5201	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.
AnnaBridge	165:d1b4690b3f8b	5202	*/
AnnaBridge	165:d1b4690b3f8b	5203	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy)
AnnaBridge	165:d1b4690b3f8b	5204	{
AnnaBridge	165:d1b4690b3f8b	5205	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> ADC_AWD_CRX_REGOFFSET_POS)
AnnaBridge	165:d1b4690b3f8b	5206	+ ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL));
AnnaBridge	165:d1b4690b3f8b	5207
AnnaBridge	165:d1b4690b3f8b	5208	register uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK);
AnnaBridge	165:d1b4690b3f8b	5209
AnnaBridge	165:d1b4690b3f8b	5210	/* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */
AnnaBridge	165:d1b4690b3f8b	5211	/* (parameter value LL_ADC_AWD_DISABLE). */
AnnaBridge	165:d1b4690b3f8b	5212	/* Else, the selected AWD is enabled and is monitoring a group of channels */
AnnaBridge	165:d1b4690b3f8b	5213	/* or a single channel. */
AnnaBridge	165:d1b4690b3f8b	5214	if(AnalogWDMonitChannels != 0)
AnnaBridge	165:d1b4690b3f8b	5215	{
AnnaBridge	165:d1b4690b3f8b	5216	if(AWDy == LL_ADC_AWD1)
AnnaBridge	165:d1b4690b3f8b	5217	{
AnnaBridge	165:d1b4690b3f8b	5218	if((AnalogWDMonitChannels & ADC_CFGR_AWD1SGL) == 0)
AnnaBridge	165:d1b4690b3f8b	5219	{
AnnaBridge	165:d1b4690b3f8b	5220	/* AWD monitoring a group of channels */
AnnaBridge	165:d1b4690b3f8b	5221	AnalogWDMonitChannels = (( AnalogWDMonitChannels
AnnaBridge	165:d1b4690b3f8b	5222	\| (ADC_AWD_CR23_CHANNEL_MASK)
AnnaBridge	165:d1b4690b3f8b	5223	)
AnnaBridge	165:d1b4690b3f8b	5224	& (~(ADC_CFGR_AWD1CH))
AnnaBridge	165:d1b4690b3f8b	5225	);
AnnaBridge	165:d1b4690b3f8b	5226	}
AnnaBridge	165:d1b4690b3f8b	5227	else
AnnaBridge	165:d1b4690b3f8b	5228	{
AnnaBridge	165:d1b4690b3f8b	5229	/* AWD monitoring a single channel */
AnnaBridge	165:d1b4690b3f8b	5230	AnalogWDMonitChannels = (AnalogWDMonitChannels
AnnaBridge	165:d1b4690b3f8b	5231	\| (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1CH_Pos))
AnnaBridge	165:d1b4690b3f8b	5232	);
AnnaBridge	165:d1b4690b3f8b	5233	}
AnnaBridge	165:d1b4690b3f8b	5234	}
AnnaBridge	165:d1b4690b3f8b	5235	else
AnnaBridge	165:d1b4690b3f8b	5236	{
AnnaBridge	165:d1b4690b3f8b	5237	if((AnalogWDMonitChannels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK)
AnnaBridge	165:d1b4690b3f8b	5238	{
AnnaBridge	165:d1b4690b3f8b	5239	/* AWD monitoring a group of channels */
AnnaBridge	165:d1b4690b3f8b	5240	AnalogWDMonitChannels = ( ADC_AWD_CR23_CHANNEL_MASK
AnnaBridge	165:d1b4690b3f8b	5241	\| ((ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN))
AnnaBridge	165:d1b4690b3f8b	5242	);
AnnaBridge	165:d1b4690b3f8b	5243	}
AnnaBridge	165:d1b4690b3f8b	5244	else
AnnaBridge	165:d1b4690b3f8b	5245	{
AnnaBridge	165:d1b4690b3f8b	5246	/* AWD monitoring a single channel */
AnnaBridge	165:d1b4690b3f8b	5247	/* AWD monitoring a group of channels */
AnnaBridge	165:d1b4690b3f8b	5248	AnalogWDMonitChannels = ( AnalogWDMonitChannels
AnnaBridge	165:d1b4690b3f8b	5249	\| (ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL)
AnnaBridge	165:d1b4690b3f8b	5250	\| (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDMonitChannels) << ADC_CFGR_AWD1CH_Pos)
AnnaBridge	165:d1b4690b3f8b	5251	);
AnnaBridge	165:d1b4690b3f8b	5252	}
AnnaBridge	165:d1b4690b3f8b	5253	}
AnnaBridge	165:d1b4690b3f8b	5254	}
AnnaBridge	165:d1b4690b3f8b	5255
AnnaBridge	165:d1b4690b3f8b	5256	return AnalogWDMonitChannels;
AnnaBridge	165:d1b4690b3f8b	5257
AnnaBridge	165:d1b4690b3f8b	5258	}
AnnaBridge	165:d1b4690b3f8b	5259
AnnaBridge	165:d1b4690b3f8b	5260	/**
AnnaBridge	165:d1b4690b3f8b	5261	* @brief Set ADC analog watchdog thresholds value of both thresholds
AnnaBridge	165:d1b4690b3f8b	5262	* high and low.
AnnaBridge	165:d1b4690b3f8b	5263	* @note If value of only one threshold high or low must be set,
AnnaBridge	165:d1b4690b3f8b	5264	* use function @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	165:d1b4690b3f8b	5265	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	165:d1b4690b3f8b	5266	* analog watchdog thresholds data require a specific shift.
AnnaBridge	165:d1b4690b3f8b	5267	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	165:d1b4690b3f8b	5268	* @note On this STM32 serie, there are 2 kinds of analog watchdog
AnnaBridge	165:d1b4690b3f8b	5269	* instance:
AnnaBridge	165:d1b4690b3f8b	5270	* - AWD standard (instance AWD1):
AnnaBridge	165:d1b4690b3f8b	5271	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	165:d1b4690b3f8b	5272	* - groups monitored: ADC groups regular and-or injected.
AnnaBridge	165:d1b4690b3f8b	5273	* - resolution: resolution is not limited (corresponds to
AnnaBridge	165:d1b4690b3f8b	5274	* ADC resolution configured).
AnnaBridge	165:d1b4690b3f8b	5275	* - AWD flexible (instances AWD2, AWD3):
AnnaBridge	165:d1b4690b3f8b	5276	* - channels monitored: flexible on channels monitored, selection is
AnnaBridge	165:d1b4690b3f8b	5277	* channel wise, from from 1 to all channels.
AnnaBridge	165:d1b4690b3f8b	5278	* Specificity of this analog watchdog: Multiple channels can
AnnaBridge	165:d1b4690b3f8b	5279	* be selected. For example:
AnnaBridge	165:d1b4690b3f8b	5280	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
AnnaBridge	165:d1b4690b3f8b	5281	* - groups monitored: not selection possible (monitoring on both
AnnaBridge	165:d1b4690b3f8b	5282	* groups regular and injected).
AnnaBridge	165:d1b4690b3f8b	5283	* Channels selected are monitored on groups regular and injected:
AnnaBridge	165:d1b4690b3f8b	5284	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
AnnaBridge	165:d1b4690b3f8b	5285	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
AnnaBridge	165:d1b4690b3f8b	5286	* - resolution: resolution is limited to 8 bits: if ADC resolution is
AnnaBridge	165:d1b4690b3f8b	5287	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
AnnaBridge	165:d1b4690b3f8b	5288	* the 2 LSB are ignored.
AnnaBridge	165:d1b4690b3f8b	5289	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5290	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5291	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5292	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	5293	* @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5294	* TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5295	* TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5296	* TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5297	* TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5298	* TR3 LT3 LL_ADC_ConfigAnalogWDThresholds
AnnaBridge	165:d1b4690b3f8b	5299	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5300	* @param AWDy This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5301	* @arg @ref LL_ADC_AWD1
AnnaBridge	165:d1b4690b3f8b	5302	* @arg @ref LL_ADC_AWD2
AnnaBridge	165:d1b4690b3f8b	5303	* @arg @ref LL_ADC_AWD3
AnnaBridge	165:d1b4690b3f8b	5304	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	5305	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	5306	* @retval None
AnnaBridge	165:d1b4690b3f8b	5307	*/
AnnaBridge	165:d1b4690b3f8b	5308	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
AnnaBridge	165:d1b4690b3f8b	5309	{
AnnaBridge	165:d1b4690b3f8b	5310	/* Set bits with content of parameter "AWDThresholdxxxValue" with bits */
AnnaBridge	165:d1b4690b3f8b	5311	/* position in register and register position depending on parameter */
AnnaBridge	165:d1b4690b3f8b	5312	/* "AWDy". */
AnnaBridge	165:d1b4690b3f8b	5313	/* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */
AnnaBridge	165:d1b4690b3f8b	5314	/* containing other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	5315	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	5316	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	5317	#else
AnnaBridge	165:d1b4690b3f8b	5318	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	5319	#endif
AnnaBridge	165:d1b4690b3f8b	5320
AnnaBridge	165:d1b4690b3f8b	5321	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	5322	ADC_TR1_HT1 \| ADC_TR1_LT1,
AnnaBridge	165:d1b4690b3f8b	5323	(AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) \| AWDThresholdLowValue);
AnnaBridge	165:d1b4690b3f8b	5324	}
AnnaBridge	165:d1b4690b3f8b	5325
AnnaBridge	165:d1b4690b3f8b	5326	/**
AnnaBridge	165:d1b4690b3f8b	5327	* @brief Set ADC analog watchdog threshold value of threshold
AnnaBridge	165:d1b4690b3f8b	5328	* high or low.
AnnaBridge	165:d1b4690b3f8b	5329	* @note If values of both thresholds high or low must be set,
AnnaBridge	165:d1b4690b3f8b	5330	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
AnnaBridge	165:d1b4690b3f8b	5331	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	165:d1b4690b3f8b	5332	* analog watchdog thresholds data require a specific shift.
AnnaBridge	165:d1b4690b3f8b	5333	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	165:d1b4690b3f8b	5334	* @note On this STM32 serie, there are 2 kinds of analog watchdog
AnnaBridge	165:d1b4690b3f8b	5335	* instance:
AnnaBridge	165:d1b4690b3f8b	5336	* - AWD standard (instance AWD1):
AnnaBridge	165:d1b4690b3f8b	5337	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	165:d1b4690b3f8b	5338	* - groups monitored: ADC groups regular and-or injected.
AnnaBridge	165:d1b4690b3f8b	5339	* - resolution: resolution is not limited (corresponds to
AnnaBridge	165:d1b4690b3f8b	5340	* ADC resolution configured).
AnnaBridge	165:d1b4690b3f8b	5341	* - AWD flexible (instances AWD2, AWD3):
AnnaBridge	165:d1b4690b3f8b	5342	* - channels monitored: flexible on channels monitored, selection is
AnnaBridge	165:d1b4690b3f8b	5343	* channel wise, from from 1 to all channels.
AnnaBridge	165:d1b4690b3f8b	5344	* Specificity of this analog watchdog: Multiple channels can
AnnaBridge	165:d1b4690b3f8b	5345	* be selected. For example:
AnnaBridge	165:d1b4690b3f8b	5346	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
AnnaBridge	165:d1b4690b3f8b	5347	* - groups monitored: not selection possible (monitoring on both
AnnaBridge	165:d1b4690b3f8b	5348	* groups regular and injected).
AnnaBridge	165:d1b4690b3f8b	5349	* Channels selected are monitored on groups regular and injected:
AnnaBridge	165:d1b4690b3f8b	5350	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
AnnaBridge	165:d1b4690b3f8b	5351	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
AnnaBridge	165:d1b4690b3f8b	5352	* - resolution: resolution is limited to 8 bits: if ADC resolution is
AnnaBridge	165:d1b4690b3f8b	5353	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
AnnaBridge	165:d1b4690b3f8b	5354	* the 2 LSB are ignored.
AnnaBridge	165:d1b4690b3f8b	5355	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5356	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5357	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5358	* on either ADC groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	5359	* @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5360	* TR2 HT2 LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5361	* TR3 HT3 LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5362	* TR1 LT1 LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5363	* TR2 LT2 LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5364	* TR3 LT3 LL_ADC_SetAnalogWDThresholds
AnnaBridge	165:d1b4690b3f8b	5365	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5366	* @param AWDy This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5367	* @arg @ref LL_ADC_AWD1
AnnaBridge	165:d1b4690b3f8b	5368	* @arg @ref LL_ADC_AWD2
AnnaBridge	165:d1b4690b3f8b	5369	* @arg @ref LL_ADC_AWD3
AnnaBridge	165:d1b4690b3f8b	5370	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5371	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	165:d1b4690b3f8b	5372	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	165:d1b4690b3f8b	5373	* @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	5374	* @retval None
AnnaBridge	165:d1b4690b3f8b	5375	*/
AnnaBridge	165:d1b4690b3f8b	5376	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
AnnaBridge	165:d1b4690b3f8b	5377	{
AnnaBridge	165:d1b4690b3f8b	5378	/* Set bits with content of parameter "AWDThresholdValue" with bits */
AnnaBridge	165:d1b4690b3f8b	5379	/* position in register and register position depending on parameters */
AnnaBridge	165:d1b4690b3f8b	5380	/* "AWDThresholdsHighLow" and "AWDy". */
AnnaBridge	165:d1b4690b3f8b	5381	/* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */
AnnaBridge	165:d1b4690b3f8b	5382	/* containing other bits reserved for other purpose. */
AnnaBridge	165:d1b4690b3f8b	5383	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	5384	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	5385
AnnaBridge	165:d1b4690b3f8b	5386	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	5387	AWDThresholdsHighLow,
AnnaBridge	165:d1b4690b3f8b	5388	AWDThresholdValue << ((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH_SHIFT4));
AnnaBridge	165:d1b4690b3f8b	5389	#else
AnnaBridge	165:d1b4690b3f8b	5390	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	5391
AnnaBridge	165:d1b4690b3f8b	5392	MODIFY_REG(*preg,
AnnaBridge	165:d1b4690b3f8b	5393	AWDThresholdsHighLow,
AnnaBridge	165:d1b4690b3f8b	5394	AWDThresholdValue << POSITION_VAL(AWDThresholdsHighLow));
AnnaBridge	165:d1b4690b3f8b	5395	#endif
AnnaBridge	165:d1b4690b3f8b	5396	}
AnnaBridge	165:d1b4690b3f8b	5397
AnnaBridge	165:d1b4690b3f8b	5398	/**
AnnaBridge	165:d1b4690b3f8b	5399	* @brief Get ADC analog watchdog threshold value of threshold high,
AnnaBridge	165:d1b4690b3f8b	5400	* threshold low or raw data with ADC thresholds high and low
AnnaBridge	165:d1b4690b3f8b	5401	* concatenated.
AnnaBridge	165:d1b4690b3f8b	5402	* @note If raw data with ADC thresholds high and low is retrieved,
AnnaBridge	165:d1b4690b3f8b	5403	* the data of each threshold high or low can be isolated
AnnaBridge	165:d1b4690b3f8b	5404	* using helper macro:
AnnaBridge	165:d1b4690b3f8b	5405	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
AnnaBridge	165:d1b4690b3f8b	5406	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	165:d1b4690b3f8b	5407	* analog watchdog thresholds data require a specific shift.
AnnaBridge	165:d1b4690b3f8b	5408	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
AnnaBridge	165:d1b4690b3f8b	5409	* @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5410	* TR2 HT2 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5411	* TR3 HT3 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5412	* TR1 LT1 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5413	* TR2 LT2 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	165:d1b4690b3f8b	5414	* TR3 LT3 LL_ADC_GetAnalogWDThresholds
AnnaBridge	165:d1b4690b3f8b	5415	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5416	* @param AWDy This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5417	* @arg @ref LL_ADC_AWD1
AnnaBridge	165:d1b4690b3f8b	5418	* @arg @ref LL_ADC_AWD2
AnnaBridge	165:d1b4690b3f8b	5419	* @arg @ref LL_ADC_AWD3
AnnaBridge	165:d1b4690b3f8b	5420	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5421	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	165:d1b4690b3f8b	5422	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	165:d1b4690b3f8b	5423	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
AnnaBridge	165:d1b4690b3f8b	5424	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	5425	*/
AnnaBridge	165:d1b4690b3f8b	5426	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdsHighLow)
AnnaBridge	165:d1b4690b3f8b	5427	{
AnnaBridge	165:d1b4690b3f8b	5428	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	5429	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	5430
AnnaBridge	165:d1b4690b3f8b	5431	return (uint32_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	5432	(AWDThresholdsHighLow \| ADC_TR1_LT1))
AnnaBridge	165:d1b4690b3f8b	5433	>> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH_SHIFT4) & ~(AWDThresholdsHighLow & ADC_TR1_LT1))
AnnaBridge	165:d1b4690b3f8b	5434	);
AnnaBridge	165:d1b4690b3f8b	5435	#else
AnnaBridge	165:d1b4690b3f8b	5436	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	5437
AnnaBridge	165:d1b4690b3f8b	5438	return (uint32_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	5439	(AWDThresholdsHighLow \| ADC_TR1_LT1))
AnnaBridge	165:d1b4690b3f8b	5440	>> POSITION_VAL(AWDThresholdsHighLow)
AnnaBridge	165:d1b4690b3f8b	5441	);
AnnaBridge	165:d1b4690b3f8b	5442	#endif
AnnaBridge	165:d1b4690b3f8b	5443	}
AnnaBridge	165:d1b4690b3f8b	5444
AnnaBridge	165:d1b4690b3f8b	5445	/**
AnnaBridge	165:d1b4690b3f8b	5446	* @}
AnnaBridge	165:d1b4690b3f8b	5447	*/
AnnaBridge	165:d1b4690b3f8b	5448
AnnaBridge	165:d1b4690b3f8b	5449	/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
AnnaBridge	165:d1b4690b3f8b	5450	* @{
AnnaBridge	165:d1b4690b3f8b	5451	*/
AnnaBridge	165:d1b4690b3f8b	5452
AnnaBridge	165:d1b4690b3f8b	5453	/**
AnnaBridge	165:d1b4690b3f8b	5454	* @brief Set ADC oversampling scope: ADC groups regular and-or injected
AnnaBridge	165:d1b4690b3f8b	5455	* (availability of ADC group injected depends on STM32 families).
AnnaBridge	165:d1b4690b3f8b	5456	* @note If both groups regular and injected are selected,
AnnaBridge	165:d1b4690b3f8b	5457	* specify behavior of ADC group injected interrupting
AnnaBridge	165:d1b4690b3f8b	5458	* group regular: when ADC group injected is triggered,
AnnaBridge	165:d1b4690b3f8b	5459	* the oversampling on ADC group regular is either
AnnaBridge	165:d1b4690b3f8b	5460	* temporary stopped and continued, or resumed from start
AnnaBridge	165:d1b4690b3f8b	5461	* (oversampler buffer reset).
AnnaBridge	165:d1b4690b3f8b	5462	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5463	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5464	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5465	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	5466	* @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n
AnnaBridge	165:d1b4690b3f8b	5467	* CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n
AnnaBridge	165:d1b4690b3f8b	5468	* CFGR2 ROVSM LL_ADC_SetOverSamplingScope
AnnaBridge	165:d1b4690b3f8b	5469	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5470	* @param OvsScope This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5471	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	165:d1b4690b3f8b	5472	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	165:d1b4690b3f8b	5473	* @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
AnnaBridge	165:d1b4690b3f8b	5474	* @arg @ref LL_ADC_OVS_GRP_INJECTED
AnnaBridge	165:d1b4690b3f8b	5475	* @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
AnnaBridge	165:d1b4690b3f8b	5476	* @retval None
AnnaBridge	165:d1b4690b3f8b	5477	*/
AnnaBridge	165:d1b4690b3f8b	5478	__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
AnnaBridge	165:d1b4690b3f8b	5479	{
AnnaBridge	165:d1b4690b3f8b	5480	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE \| ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSM, OvsScope);
AnnaBridge	165:d1b4690b3f8b	5481	}
AnnaBridge	165:d1b4690b3f8b	5482
AnnaBridge	165:d1b4690b3f8b	5483	/**
AnnaBridge	165:d1b4690b3f8b	5484	* @brief Get ADC oversampling scope: ADC groups regular and-or injected
AnnaBridge	165:d1b4690b3f8b	5485	* (availability of ADC group injected depends on STM32 families).
AnnaBridge	165:d1b4690b3f8b	5486	* @note If both groups regular and injected are selected,
AnnaBridge	165:d1b4690b3f8b	5487	* specify behavior of ADC group injected interrupting
AnnaBridge	165:d1b4690b3f8b	5488	* group regular: when ADC group injected is triggered,
AnnaBridge	165:d1b4690b3f8b	5489	* the oversampling on ADC group regular is either
AnnaBridge	165:d1b4690b3f8b	5490	* temporary stopped and continued, or resumed from start
AnnaBridge	165:d1b4690b3f8b	5491	* (oversampler buffer reset).
AnnaBridge	165:d1b4690b3f8b	5492	* @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n
AnnaBridge	165:d1b4690b3f8b	5493	* CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n
AnnaBridge	165:d1b4690b3f8b	5494	* CFGR2 ROVSM LL_ADC_GetOverSamplingScope
AnnaBridge	165:d1b4690b3f8b	5495	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5496	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5497	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	165:d1b4690b3f8b	5498	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	165:d1b4690b3f8b	5499	* @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
AnnaBridge	165:d1b4690b3f8b	5500	* @arg @ref LL_ADC_OVS_GRP_INJECTED
AnnaBridge	165:d1b4690b3f8b	5501	* @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
AnnaBridge	165:d1b4690b3f8b	5502	*/
AnnaBridge	165:d1b4690b3f8b	5503	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5504	{
AnnaBridge	165:d1b4690b3f8b	5505	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE \| ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSM));
AnnaBridge	165:d1b4690b3f8b	5506	}
AnnaBridge	165:d1b4690b3f8b	5507
AnnaBridge	165:d1b4690b3f8b	5508	/**
AnnaBridge	165:d1b4690b3f8b	5509	* @brief Set ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	165:d1b4690b3f8b	5510	* on the selected ADC group.
AnnaBridge	165:d1b4690b3f8b	5511	* @note Number of oversampled conversions are done either in:
AnnaBridge	165:d1b4690b3f8b	5512	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	165:d1b4690b3f8b	5513	* are done from 1 trigger)
AnnaBridge	165:d1b4690b3f8b	5514	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	165:d1b4690b3f8b	5515	* needs a trigger)
AnnaBridge	165:d1b4690b3f8b	5516	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5517	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5518	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5519	* on group regular.
AnnaBridge	165:d1b4690b3f8b	5520	* @note On this STM32 serie, oversampling discontinuous mode
AnnaBridge	165:d1b4690b3f8b	5521	* (triggered mode) can be used only when oversampling is
AnnaBridge	165:d1b4690b3f8b	5522	* set on group regular only and in resumed mode.
AnnaBridge	165:d1b4690b3f8b	5523	* @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont
AnnaBridge	165:d1b4690b3f8b	5524	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5525	* @param OverSamplingDiscont This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5526	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	165:d1b4690b3f8b	5527	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	165:d1b4690b3f8b	5528	* @retval None
AnnaBridge	165:d1b4690b3f8b	5529	*/
AnnaBridge	165:d1b4690b3f8b	5530	__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
AnnaBridge	165:d1b4690b3f8b	5531	{
AnnaBridge	165:d1b4690b3f8b	5532	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont);
AnnaBridge	165:d1b4690b3f8b	5533	}
AnnaBridge	165:d1b4690b3f8b	5534
AnnaBridge	165:d1b4690b3f8b	5535	/**
AnnaBridge	165:d1b4690b3f8b	5536	* @brief Get ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	165:d1b4690b3f8b	5537	* on the selected ADC group.
AnnaBridge	165:d1b4690b3f8b	5538	* @note Number of oversampled conversions are done either in:
AnnaBridge	165:d1b4690b3f8b	5539	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	165:d1b4690b3f8b	5540	* are done from 1 trigger)
AnnaBridge	165:d1b4690b3f8b	5541	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	165:d1b4690b3f8b	5542	* needs a trigger)
AnnaBridge	165:d1b4690b3f8b	5543	* @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont
AnnaBridge	165:d1b4690b3f8b	5544	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5545	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5546	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	165:d1b4690b3f8b	5547	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	165:d1b4690b3f8b	5548	*/
AnnaBridge	165:d1b4690b3f8b	5549	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5550	{
AnnaBridge	165:d1b4690b3f8b	5551	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS));
AnnaBridge	165:d1b4690b3f8b	5552	}
AnnaBridge	165:d1b4690b3f8b	5553
AnnaBridge	165:d1b4690b3f8b	5554	/**
AnnaBridge	165:d1b4690b3f8b	5555	* @brief Set ADC oversampling
AnnaBridge	165:d1b4690b3f8b	5556	* (impacting both ADC groups regular and injected)
AnnaBridge	165:d1b4690b3f8b	5557	* @note This function set the 2 items of oversampling configuration:
AnnaBridge	165:d1b4690b3f8b	5558	* - ratio
AnnaBridge	165:d1b4690b3f8b	5559	* - shift
AnnaBridge	165:d1b4690b3f8b	5560	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5561	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5562	* ADC must be disabled or enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	5563	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	5564	* @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
AnnaBridge	165:d1b4690b3f8b	5565	* CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
AnnaBridge	165:d1b4690b3f8b	5566	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5567	* @param Ratio This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5568	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	165:d1b4690b3f8b	5569	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	165:d1b4690b3f8b	5570	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	165:d1b4690b3f8b	5571	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	165:d1b4690b3f8b	5572	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	165:d1b4690b3f8b	5573	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	165:d1b4690b3f8b	5574	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	165:d1b4690b3f8b	5575	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	165:d1b4690b3f8b	5576	* @param Shift This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5577	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	165:d1b4690b3f8b	5578	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	165:d1b4690b3f8b	5579	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	165:d1b4690b3f8b	5580	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	165:d1b4690b3f8b	5581	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	165:d1b4690b3f8b	5582	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	165:d1b4690b3f8b	5583	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	165:d1b4690b3f8b	5584	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	165:d1b4690b3f8b	5585	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	165:d1b4690b3f8b	5586	* @retval None
AnnaBridge	165:d1b4690b3f8b	5587	*/
AnnaBridge	165:d1b4690b3f8b	5588	__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
AnnaBridge	165:d1b4690b3f8b	5589	{
AnnaBridge	165:d1b4690b3f8b	5590	MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR), (Shift \| Ratio));
AnnaBridge	165:d1b4690b3f8b	5591	}
AnnaBridge	165:d1b4690b3f8b	5592
AnnaBridge	165:d1b4690b3f8b	5593	/**
AnnaBridge	165:d1b4690b3f8b	5594	* @brief Get ADC oversampling ratio
AnnaBridge	165:d1b4690b3f8b	5595	* (impacting both ADC groups regular and injected)
AnnaBridge	165:d1b4690b3f8b	5596	* @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
AnnaBridge	165:d1b4690b3f8b	5597	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5598	* @retval Ratio This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5599	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	165:d1b4690b3f8b	5600	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	165:d1b4690b3f8b	5601	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	165:d1b4690b3f8b	5602	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	165:d1b4690b3f8b	5603	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	165:d1b4690b3f8b	5604	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	165:d1b4690b3f8b	5605	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	165:d1b4690b3f8b	5606	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	165:d1b4690b3f8b	5607	*/
AnnaBridge	165:d1b4690b3f8b	5608	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5609	{
AnnaBridge	165:d1b4690b3f8b	5610	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
AnnaBridge	165:d1b4690b3f8b	5611	}
AnnaBridge	165:d1b4690b3f8b	5612
AnnaBridge	165:d1b4690b3f8b	5613	/**
AnnaBridge	165:d1b4690b3f8b	5614	* @brief Get ADC oversampling shift
AnnaBridge	165:d1b4690b3f8b	5615	* (impacting both ADC groups regular and injected)
AnnaBridge	165:d1b4690b3f8b	5616	* @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
AnnaBridge	165:d1b4690b3f8b	5617	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5618	* @retval Shift This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5619	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	165:d1b4690b3f8b	5620	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	165:d1b4690b3f8b	5621	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	165:d1b4690b3f8b	5622	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	165:d1b4690b3f8b	5623	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	165:d1b4690b3f8b	5624	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	165:d1b4690b3f8b	5625	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	165:d1b4690b3f8b	5626	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	165:d1b4690b3f8b	5627	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	165:d1b4690b3f8b	5628	*/
AnnaBridge	165:d1b4690b3f8b	5629	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5630	{
AnnaBridge	165:d1b4690b3f8b	5631	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
AnnaBridge	165:d1b4690b3f8b	5632	}
AnnaBridge	165:d1b4690b3f8b	5633
AnnaBridge	165:d1b4690b3f8b	5634	/**
AnnaBridge	165:d1b4690b3f8b	5635	* @}
AnnaBridge	165:d1b4690b3f8b	5636	*/
AnnaBridge	165:d1b4690b3f8b	5637
AnnaBridge	165:d1b4690b3f8b	5638	/** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multimode
AnnaBridge	165:d1b4690b3f8b	5639	* @{
AnnaBridge	165:d1b4690b3f8b	5640	*/
AnnaBridge	165:d1b4690b3f8b	5641
AnnaBridge	165:d1b4690b3f8b	5642	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	5643	/**
AnnaBridge	165:d1b4690b3f8b	5644	* @brief Set ADC multimode configuration to operate in independent mode
AnnaBridge	165:d1b4690b3f8b	5645	* or multimode (for devices with several ADC instances).
AnnaBridge	165:d1b4690b3f8b	5646	* @note If multimode configuration: the selected ADC instance is
AnnaBridge	165:d1b4690b3f8b	5647	* either master or slave depending on hardware.
AnnaBridge	165:d1b4690b3f8b	5648	* Refer to reference manual.
AnnaBridge	165:d1b4690b3f8b	5649	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5650	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5651	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	165:d1b4690b3f8b	5652	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	165:d1b4690b3f8b	5653	* ADC instance or by using helper macro
AnnaBridge	165:d1b4690b3f8b	5654	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	165:d1b4690b3f8b	5655	* @rmtoll CCR DUAL LL_ADC_SetMultimode
AnnaBridge	165:d1b4690b3f8b	5656	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5657	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5658	* @param Multimode This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5659	* @arg @ref LL_ADC_MULTI_INDEPENDENT
AnnaBridge	165:d1b4690b3f8b	5660	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
AnnaBridge	165:d1b4690b3f8b	5661	* @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
AnnaBridge	165:d1b4690b3f8b	5662	* @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
AnnaBridge	165:d1b4690b3f8b	5663	* @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
AnnaBridge	165:d1b4690b3f8b	5664	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
AnnaBridge	165:d1b4690b3f8b	5665	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
AnnaBridge	165:d1b4690b3f8b	5666	* @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
AnnaBridge	165:d1b4690b3f8b	5667	* @retval None
AnnaBridge	165:d1b4690b3f8b	5668	*/
AnnaBridge	165:d1b4690b3f8b	5669	__STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode)
AnnaBridge	165:d1b4690b3f8b	5670	{
AnnaBridge	165:d1b4690b3f8b	5671	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode);
AnnaBridge	165:d1b4690b3f8b	5672	}
AnnaBridge	165:d1b4690b3f8b	5673
AnnaBridge	165:d1b4690b3f8b	5674	/**
AnnaBridge	165:d1b4690b3f8b	5675	* @brief Get ADC multimode configuration to operate in independent mode
AnnaBridge	165:d1b4690b3f8b	5676	* or multimode (for devices with several ADC instances).
AnnaBridge	165:d1b4690b3f8b	5677	* @note If multimode configuration: the selected ADC instance is
AnnaBridge	165:d1b4690b3f8b	5678	* either master or slave depending on hardware.
AnnaBridge	165:d1b4690b3f8b	5679	* Refer to reference manual.
AnnaBridge	165:d1b4690b3f8b	5680	* @rmtoll CCR DUAL LL_ADC_GetMultimode
AnnaBridge	165:d1b4690b3f8b	5681	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5682	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5683	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5684	* @arg @ref LL_ADC_MULTI_INDEPENDENT
AnnaBridge	165:d1b4690b3f8b	5685	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
AnnaBridge	165:d1b4690b3f8b	5686	* @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
AnnaBridge	165:d1b4690b3f8b	5687	* @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
AnnaBridge	165:d1b4690b3f8b	5688	* @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
AnnaBridge	165:d1b4690b3f8b	5689	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
AnnaBridge	165:d1b4690b3f8b	5690	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
AnnaBridge	165:d1b4690b3f8b	5691	* @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
AnnaBridge	165:d1b4690b3f8b	5692	*/
AnnaBridge	165:d1b4690b3f8b	5693	__STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	5694	{
AnnaBridge	165:d1b4690b3f8b	5695	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL));
AnnaBridge	165:d1b4690b3f8b	5696	}
AnnaBridge	165:d1b4690b3f8b	5697
AnnaBridge	165:d1b4690b3f8b	5698	/**
AnnaBridge	165:d1b4690b3f8b	5699	* @brief Set ADC multimode conversion data transfer: no transfer
AnnaBridge	165:d1b4690b3f8b	5700	* or transfer by DMA.
AnnaBridge	165:d1b4690b3f8b	5701	* @note If ADC multimode transfer by DMA is not selected:
AnnaBridge	165:d1b4690b3f8b	5702	* each ADC uses its own DMA channel, with its individual
AnnaBridge	165:d1b4690b3f8b	5703	* DMA transfer settings.
AnnaBridge	165:d1b4690b3f8b	5704	* If ADC multimode transfer by DMA is selected:
AnnaBridge	165:d1b4690b3f8b	5705	* One DMA channel is used for both ADC (DMA of ADC master)
AnnaBridge	165:d1b4690b3f8b	5706	* Specifies the DMA requests mode:
AnnaBridge	165:d1b4690b3f8b	5707	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	165:d1b4690b3f8b	5708	* when number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	5709	* ADC conversions) is reached.
AnnaBridge	165:d1b4690b3f8b	5710	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	165:d1b4690b3f8b	5711	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	165:d1b4690b3f8b	5712	* whatever number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	5713	* ADC conversions).
AnnaBridge	165:d1b4690b3f8b	5714	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	165:d1b4690b3f8b	5715	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	165:d1b4690b3f8b	5716	* mode non-circular:
AnnaBridge	165:d1b4690b3f8b	5717	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	165:d1b4690b3f8b	5718	* ADC conversions data ADC will raise an overrun error
AnnaBridge	165:d1b4690b3f8b	5719	* (overrun flag and interruption if enabled).
AnnaBridge	165:d1b4690b3f8b	5720	* @note How to retrieve multimode conversion data:
AnnaBridge	165:d1b4690b3f8b	5721	* Whatever multimode transfer by DMA setting: using function
AnnaBridge	165:d1b4690b3f8b	5722	* @ref LL_ADC_REG_ReadMultiConversionData32().
AnnaBridge	165:d1b4690b3f8b	5723	* If ADC multimode transfer by DMA is selected: conversion data
AnnaBridge	165:d1b4690b3f8b	5724	* is a raw data with ADC master and slave concatenated.
AnnaBridge	165:d1b4690b3f8b	5725	* A macro is available to get the conversion data of
AnnaBridge	165:d1b4690b3f8b	5726	* ADC master or ADC slave: see helper macro
AnnaBridge	165:d1b4690b3f8b	5727	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
AnnaBridge	165:d1b4690b3f8b	5728	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5729	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5730	* All ADC instances of the ADC common group must be disabled
AnnaBridge	165:d1b4690b3f8b	5731	* or enabled without conversion on going on group regular.
AnnaBridge	165:d1b4690b3f8b	5732	* @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n
AnnaBridge	165:d1b4690b3f8b	5733	* CCR DMACFG LL_ADC_SetMultiDMATransfer
AnnaBridge	165:d1b4690b3f8b	5734	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5735	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5736	* @param MultiDMATransfer This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5737	* @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
AnnaBridge	165:d1b4690b3f8b	5738	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B
AnnaBridge	165:d1b4690b3f8b	5739	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B
AnnaBridge	165:d1b4690b3f8b	5740	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B
AnnaBridge	165:d1b4690b3f8b	5741	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B
AnnaBridge	165:d1b4690b3f8b	5742	* @retval None
AnnaBridge	165:d1b4690b3f8b	5743	*/
AnnaBridge	165:d1b4690b3f8b	5744	__STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMATransfer)
AnnaBridge	165:d1b4690b3f8b	5745	{
AnnaBridge	165:d1b4690b3f8b	5746	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA \| ADC_CCR_DMACFG, MultiDMATransfer);
AnnaBridge	165:d1b4690b3f8b	5747	}
AnnaBridge	165:d1b4690b3f8b	5748
AnnaBridge	165:d1b4690b3f8b	5749	/**
AnnaBridge	165:d1b4690b3f8b	5750	* @brief Get ADC multimode conversion data transfer: no transfer
AnnaBridge	165:d1b4690b3f8b	5751	* or transfer by DMA.
AnnaBridge	165:d1b4690b3f8b	5752	* @note If ADC multimode transfer by DMA is not selected:
AnnaBridge	165:d1b4690b3f8b	5753	* each ADC uses its own DMA channel, with its individual
AnnaBridge	165:d1b4690b3f8b	5754	* DMA transfer settings.
AnnaBridge	165:d1b4690b3f8b	5755	* If ADC multimode transfer by DMA is selected:
AnnaBridge	165:d1b4690b3f8b	5756	* One DMA channel is used for both ADC (DMA of ADC master)
AnnaBridge	165:d1b4690b3f8b	5757	* Specifies the DMA requests mode:
AnnaBridge	165:d1b4690b3f8b	5758	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	165:d1b4690b3f8b	5759	* when number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	5760	* ADC conversions) is reached.
AnnaBridge	165:d1b4690b3f8b	5761	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	165:d1b4690b3f8b	5762	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	165:d1b4690b3f8b	5763	* whatever number of DMA data transfers (number of
AnnaBridge	165:d1b4690b3f8b	5764	* ADC conversions).
AnnaBridge	165:d1b4690b3f8b	5765	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	165:d1b4690b3f8b	5766	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	165:d1b4690b3f8b	5767	* mode non-circular:
AnnaBridge	165:d1b4690b3f8b	5768	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	165:d1b4690b3f8b	5769	* ADC conversions data ADC will raise an overrun error
AnnaBridge	165:d1b4690b3f8b	5770	* (overrun flag and interruption if enabled).
AnnaBridge	165:d1b4690b3f8b	5771	* @note How to retrieve multimode conversion data:
AnnaBridge	165:d1b4690b3f8b	5772	* Whatever multimode transfer by DMA setting: using function
AnnaBridge	165:d1b4690b3f8b	5773	* @ref LL_ADC_REG_ReadMultiConversionData32().
AnnaBridge	165:d1b4690b3f8b	5774	* If ADC multimode transfer by DMA is selected: conversion data
AnnaBridge	165:d1b4690b3f8b	5775	* is a raw data with ADC master and slave concatenated.
AnnaBridge	165:d1b4690b3f8b	5776	* A macro is available to get the conversion data of
AnnaBridge	165:d1b4690b3f8b	5777	* ADC master or ADC slave: see helper macro
AnnaBridge	165:d1b4690b3f8b	5778	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
AnnaBridge	165:d1b4690b3f8b	5779	* @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n
AnnaBridge	165:d1b4690b3f8b	5780	* CCR DMACFG LL_ADC_GetMultiDMATransfer
AnnaBridge	165:d1b4690b3f8b	5781	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5782	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5783	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5784	* @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
AnnaBridge	165:d1b4690b3f8b	5785	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B
AnnaBridge	165:d1b4690b3f8b	5786	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B
AnnaBridge	165:d1b4690b3f8b	5787	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B
AnnaBridge	165:d1b4690b3f8b	5788	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B
AnnaBridge	165:d1b4690b3f8b	5789	*/
AnnaBridge	165:d1b4690b3f8b	5790	__STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	5791	{
AnnaBridge	165:d1b4690b3f8b	5792	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA \| ADC_CCR_DMACFG));
AnnaBridge	165:d1b4690b3f8b	5793	}
AnnaBridge	165:d1b4690b3f8b	5794
AnnaBridge	165:d1b4690b3f8b	5795	/**
AnnaBridge	165:d1b4690b3f8b	5796	* @brief Set ADC multimode delay between 2 sampling phases.
AnnaBridge	165:d1b4690b3f8b	5797	* @note The sampling delay range depends on ADC resolution:
AnnaBridge	165:d1b4690b3f8b	5798	* - ADC resolution 12 bits can have maximum delay of 12 cycles.
AnnaBridge	165:d1b4690b3f8b	5799	* - ADC resolution 10 bits can have maximum delay of 10 cycles.
AnnaBridge	165:d1b4690b3f8b	5800	* - ADC resolution 8 bits can have maximum delay of 8 cycles.
AnnaBridge	165:d1b4690b3f8b	5801	* - ADC resolution 6 bits can have maximum delay of 6 cycles.
AnnaBridge	165:d1b4690b3f8b	5802	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5803	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5804	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	165:d1b4690b3f8b	5805	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	165:d1b4690b3f8b	5806	* ADC instance or by using helper macro helper macro
AnnaBridge	165:d1b4690b3f8b	5807	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	165:d1b4690b3f8b	5808	* @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay
AnnaBridge	165:d1b4690b3f8b	5809	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5810	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5811	* @param MultiTwoSamplingDelay This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5812	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE
AnnaBridge	165:d1b4690b3f8b	5813	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES
AnnaBridge	165:d1b4690b3f8b	5814	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES
AnnaBridge	165:d1b4690b3f8b	5815	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES
AnnaBridge	165:d1b4690b3f8b	5816	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES
AnnaBridge	165:d1b4690b3f8b	5817	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1)
AnnaBridge	165:d1b4690b3f8b	5818	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1)
AnnaBridge	165:d1b4690b3f8b	5819	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5820	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5821	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5822	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3)
AnnaBridge	165:d1b4690b3f8b	5823	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3)
AnnaBridge	165:d1b4690b3f8b	5824	*
AnnaBridge	165:d1b4690b3f8b	5825	* (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n
AnnaBridge	165:d1b4690b3f8b	5826	* (2) Parameter available only if ADC resolution is 12 or 10 bits.\n
AnnaBridge	165:d1b4690b3f8b	5827	* (3) Parameter available only if ADC resolution is 12 bits.
AnnaBridge	165:d1b4690b3f8b	5828	* @retval None
AnnaBridge	165:d1b4690b3f8b	5829	*/
AnnaBridge	165:d1b4690b3f8b	5830	__STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiTwoSamplingDelay)
AnnaBridge	165:d1b4690b3f8b	5831	{
AnnaBridge	165:d1b4690b3f8b	5832	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay);
AnnaBridge	165:d1b4690b3f8b	5833	}
AnnaBridge	165:d1b4690b3f8b	5834
AnnaBridge	165:d1b4690b3f8b	5835	/**
AnnaBridge	165:d1b4690b3f8b	5836	* @brief Get ADC multimode delay between 2 sampling phases.
AnnaBridge	165:d1b4690b3f8b	5837	* @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay
AnnaBridge	165:d1b4690b3f8b	5838	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	5839	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	5840	* @retval Returned value can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	5841	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE
AnnaBridge	165:d1b4690b3f8b	5842	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES
AnnaBridge	165:d1b4690b3f8b	5843	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES
AnnaBridge	165:d1b4690b3f8b	5844	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES
AnnaBridge	165:d1b4690b3f8b	5845	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES
AnnaBridge	165:d1b4690b3f8b	5846	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1)
AnnaBridge	165:d1b4690b3f8b	5847	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1)
AnnaBridge	165:d1b4690b3f8b	5848	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5849	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5850	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2)
AnnaBridge	165:d1b4690b3f8b	5851	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3)
AnnaBridge	165:d1b4690b3f8b	5852	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3)
AnnaBridge	165:d1b4690b3f8b	5853	*
AnnaBridge	165:d1b4690b3f8b	5854	* (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n
AnnaBridge	165:d1b4690b3f8b	5855	* (2) Parameter available only if ADC resolution is 12 or 10 bits.\n
AnnaBridge	165:d1b4690b3f8b	5856	* (3) Parameter available only if ADC resolution is 12 bits.
AnnaBridge	165:d1b4690b3f8b	5857	*/
AnnaBridge	165:d1b4690b3f8b	5858	__STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	5859	{
AnnaBridge	165:d1b4690b3f8b	5860	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY));
AnnaBridge	165:d1b4690b3f8b	5861	}
AnnaBridge	165:d1b4690b3f8b	5862	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	165:d1b4690b3f8b	5863
AnnaBridge	165:d1b4690b3f8b	5864	/**
AnnaBridge	165:d1b4690b3f8b	5865	* @}
AnnaBridge	165:d1b4690b3f8b	5866	*/
AnnaBridge	165:d1b4690b3f8b	5867	/** @defgroup ADC_LL_EF_Configuration_Leg_Functions Configuration of ADC alternate functions name
AnnaBridge	165:d1b4690b3f8b	5868	* @{
AnnaBridge	165:d1b4690b3f8b	5869	*/
AnnaBridge	165:d1b4690b3f8b	5870	/* Old functions name kept for legacy purpose, to be replaced by the */
AnnaBridge	165:d1b4690b3f8b	5871	/* current functions name. */
AnnaBridge	165:d1b4690b3f8b	5872	__STATIC_INLINE void LL_ADC_REG_SetTrigSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	165:d1b4690b3f8b	5873	{
AnnaBridge	165:d1b4690b3f8b	5874	LL_ADC_REG_SetTriggerSource(ADCx, TriggerSource);
AnnaBridge	165:d1b4690b3f8b	5875	}
AnnaBridge	165:d1b4690b3f8b	5876	__STATIC_INLINE void LL_ADC_INJ_SetTrigSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	165:d1b4690b3f8b	5877	{
AnnaBridge	165:d1b4690b3f8b	5878	LL_ADC_INJ_SetTriggerSource(ADCx, TriggerSource);
AnnaBridge	165:d1b4690b3f8b	5879	}
AnnaBridge	165:d1b4690b3f8b	5880
AnnaBridge	165:d1b4690b3f8b	5881	/**
AnnaBridge	165:d1b4690b3f8b	5882	* @}
AnnaBridge	165:d1b4690b3f8b	5883	*/
AnnaBridge	165:d1b4690b3f8b	5884
AnnaBridge	165:d1b4690b3f8b	5885	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
AnnaBridge	165:d1b4690b3f8b	5886	* @{
AnnaBridge	165:d1b4690b3f8b	5887	*/
AnnaBridge	165:d1b4690b3f8b	5888
AnnaBridge	165:d1b4690b3f8b	5889	/**
AnnaBridge	165:d1b4690b3f8b	5890	* @brief Put ADC instance in deep power down state.
AnnaBridge	165:d1b4690b3f8b	5891	* @note In case of ADC calibration necessary: When ADC is in deep-power-down
AnnaBridge	165:d1b4690b3f8b	5892	* state, the internal analog calibration is lost. After exiting from
AnnaBridge	165:d1b4690b3f8b	5893	* deep power down, calibration must be relaunched or calibration factor
AnnaBridge	165:d1b4690b3f8b	5894	* (preliminarily saved) must be set back into calibration register.
AnnaBridge	165:d1b4690b3f8b	5895	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5896	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5897	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	5898	* @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown
AnnaBridge	165:d1b4690b3f8b	5899	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5900	* @retval None
AnnaBridge	165:d1b4690b3f8b	5901	*/
AnnaBridge	165:d1b4690b3f8b	5902	__STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5903	{
AnnaBridge	165:d1b4690b3f8b	5904	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	5905	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	5906	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	5907	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	5908	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	5909	ADC_CR_DEEPPWD);
AnnaBridge	165:d1b4690b3f8b	5910	}
AnnaBridge	165:d1b4690b3f8b	5911
AnnaBridge	165:d1b4690b3f8b	5912	/**
AnnaBridge	165:d1b4690b3f8b	5913	* @brief Disable ADC deep power down mode.
AnnaBridge	165:d1b4690b3f8b	5914	* @note In case of ADC calibration necessary: When ADC is in deep-power-down
AnnaBridge	165:d1b4690b3f8b	5915	* state, the internal analog calibration is lost. After exiting from
AnnaBridge	165:d1b4690b3f8b	5916	* deep power down, calibration must be relaunched or calibration factor
AnnaBridge	165:d1b4690b3f8b	5917	* (preliminarily saved) must be set back into calibration register.
AnnaBridge	165:d1b4690b3f8b	5918	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5919	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5920	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	5921	* @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown
AnnaBridge	165:d1b4690b3f8b	5922	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5923	* @retval None
AnnaBridge	165:d1b4690b3f8b	5924	*/
AnnaBridge	165:d1b4690b3f8b	5925	__STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5926	{
AnnaBridge	165:d1b4690b3f8b	5927	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	5928	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	5929	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	5930	CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD \| ADC_CR_BITS_PROPERTY_RS));
AnnaBridge	165:d1b4690b3f8b	5931	}
AnnaBridge	165:d1b4690b3f8b	5932
AnnaBridge	165:d1b4690b3f8b	5933	/**
AnnaBridge	165:d1b4690b3f8b	5934	* @brief Get the selected ADC instance deep power down state.
AnnaBridge	165:d1b4690b3f8b	5935	* @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled
AnnaBridge	165:d1b4690b3f8b	5936	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5937	* @retval 0: deep power down is disabled, 1: deep power down is enabled.
AnnaBridge	165:d1b4690b3f8b	5938	*/
AnnaBridge	165:d1b4690b3f8b	5939	__STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5940	{
AnnaBridge	165:d1b4690b3f8b	5941	return (READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD));
AnnaBridge	165:d1b4690b3f8b	5942	}
AnnaBridge	165:d1b4690b3f8b	5943
AnnaBridge	165:d1b4690b3f8b	5944	/**
AnnaBridge	165:d1b4690b3f8b	5945	* @brief Enable ADC instance internal voltage regulator.
AnnaBridge	165:d1b4690b3f8b	5946	* @note On this STM32 serie, after ADC internal voltage regulator enable,
AnnaBridge	165:d1b4690b3f8b	5947	* a delay for ADC internal voltage regulator stabilization
AnnaBridge	165:d1b4690b3f8b	5948	* is required before performing a ADC calibration or ADC enable.
AnnaBridge	165:d1b4690b3f8b	5949	* Refer to device datasheet, parameter tADCVREG_STUP.
AnnaBridge	165:d1b4690b3f8b	5950	* Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
AnnaBridge	165:d1b4690b3f8b	5951	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5952	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5953	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	5954	* @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
AnnaBridge	165:d1b4690b3f8b	5955	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5956	* @retval None
AnnaBridge	165:d1b4690b3f8b	5957	*/
AnnaBridge	165:d1b4690b3f8b	5958	__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5959	{
AnnaBridge	165:d1b4690b3f8b	5960	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	5961	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	5962	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	5963	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	5964	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	5965	ADC_CR_ADVREGEN);
AnnaBridge	165:d1b4690b3f8b	5966	}
AnnaBridge	165:d1b4690b3f8b	5967
AnnaBridge	165:d1b4690b3f8b	5968	/**
AnnaBridge	165:d1b4690b3f8b	5969	* @brief Disable ADC internal voltage regulator.
AnnaBridge	165:d1b4690b3f8b	5970	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	5971	* ADC state:
AnnaBridge	165:d1b4690b3f8b	5972	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	5973	* @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
AnnaBridge	165:d1b4690b3f8b	5974	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5975	* @retval None
AnnaBridge	165:d1b4690b3f8b	5976	*/
AnnaBridge	165:d1b4690b3f8b	5977	__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5978	{
AnnaBridge	165:d1b4690b3f8b	5979	CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN \| ADC_CR_BITS_PROPERTY_RS));
AnnaBridge	165:d1b4690b3f8b	5980	}
AnnaBridge	165:d1b4690b3f8b	5981
AnnaBridge	165:d1b4690b3f8b	5982	/**
AnnaBridge	165:d1b4690b3f8b	5983	* @brief Get the selected ADC instance internal voltage regulator state.
AnnaBridge	165:d1b4690b3f8b	5984	* @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
AnnaBridge	165:d1b4690b3f8b	5985	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	5986	* @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
AnnaBridge	165:d1b4690b3f8b	5987	*/
AnnaBridge	165:d1b4690b3f8b	5988	__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	5989	{
AnnaBridge	165:d1b4690b3f8b	5990	return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
AnnaBridge	165:d1b4690b3f8b	5991	}
AnnaBridge	165:d1b4690b3f8b	5992
AnnaBridge	165:d1b4690b3f8b	5993	/**
AnnaBridge	165:d1b4690b3f8b	5994	* @brief Enable the selected ADC instance.
AnnaBridge	165:d1b4690b3f8b	5995	* @note On this STM32 serie, after ADC enable, a delay for
AnnaBridge	165:d1b4690b3f8b	5996	* ADC internal analog stabilization is required before performing a
AnnaBridge	165:d1b4690b3f8b	5997	* ADC conversion start.
AnnaBridge	165:d1b4690b3f8b	5998	* Refer to device datasheet, parameter tSTAB.
AnnaBridge	165:d1b4690b3f8b	5999	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	165:d1b4690b3f8b	6000	* is enabled and when conversion clock is active.
AnnaBridge	165:d1b4690b3f8b	6001	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	165:d1b4690b3f8b	6002	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6003	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6004	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
AnnaBridge	165:d1b4690b3f8b	6005	* @rmtoll CR ADEN LL_ADC_Enable
AnnaBridge	165:d1b4690b3f8b	6006	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6007	* @retval None
AnnaBridge	165:d1b4690b3f8b	6008	*/
AnnaBridge	165:d1b4690b3f8b	6009	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6010	{
AnnaBridge	165:d1b4690b3f8b	6011	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6012	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6013	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6014	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6015	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6016	ADC_CR_ADEN);
AnnaBridge	165:d1b4690b3f8b	6017	}
AnnaBridge	165:d1b4690b3f8b	6018
AnnaBridge	165:d1b4690b3f8b	6019	/**
AnnaBridge	165:d1b4690b3f8b	6020	* @brief Disable the selected ADC instance.
AnnaBridge	165:d1b4690b3f8b	6021	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6022	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6023	* ADC must be not disabled. Must be enabled without conversion on going
AnnaBridge	165:d1b4690b3f8b	6024	* on either groups regular or injected.
AnnaBridge	165:d1b4690b3f8b	6025	* @rmtoll CR ADDIS LL_ADC_Disable
AnnaBridge	165:d1b4690b3f8b	6026	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6027	* @retval None
AnnaBridge	165:d1b4690b3f8b	6028	*/
AnnaBridge	165:d1b4690b3f8b	6029	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6030	{
AnnaBridge	165:d1b4690b3f8b	6031	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6032	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6033	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6034	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6035	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6036	ADC_CR_ADDIS);
AnnaBridge	165:d1b4690b3f8b	6037	}
AnnaBridge	165:d1b4690b3f8b	6038
AnnaBridge	165:d1b4690b3f8b	6039	/**
AnnaBridge	165:d1b4690b3f8b	6040	* @brief Get the selected ADC instance enable state.
AnnaBridge	165:d1b4690b3f8b	6041	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	165:d1b4690b3f8b	6042	* is enabled and when conversion clock is active.
AnnaBridge	165:d1b4690b3f8b	6043	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	165:d1b4690b3f8b	6044	* @rmtoll CR ADEN LL_ADC_IsEnabled
AnnaBridge	165:d1b4690b3f8b	6045	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6046	* @retval 0: ADC is disabled, 1: ADC is enabled.
AnnaBridge	165:d1b4690b3f8b	6047	*/
AnnaBridge	165:d1b4690b3f8b	6048	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6049	{
AnnaBridge	165:d1b4690b3f8b	6050	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
AnnaBridge	165:d1b4690b3f8b	6051	}
AnnaBridge	165:d1b4690b3f8b	6052
AnnaBridge	165:d1b4690b3f8b	6053	/**
AnnaBridge	165:d1b4690b3f8b	6054	* @brief Get the selected ADC instance disable state.
AnnaBridge	165:d1b4690b3f8b	6055	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
AnnaBridge	165:d1b4690b3f8b	6056	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6057	* @retval 0: no ADC disable command on going.
AnnaBridge	165:d1b4690b3f8b	6058	*/
AnnaBridge	165:d1b4690b3f8b	6059	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6060	{
AnnaBridge	165:d1b4690b3f8b	6061	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
AnnaBridge	165:d1b4690b3f8b	6062	}
AnnaBridge	165:d1b4690b3f8b	6063
AnnaBridge	165:d1b4690b3f8b	6064	/**
AnnaBridge	165:d1b4690b3f8b	6065	* @brief Start ADC calibration in the mode single-ended
AnnaBridge	165:d1b4690b3f8b	6066	* or differential (for devices with differential mode available).
AnnaBridge	165:d1b4690b3f8b	6067	* @note On this STM32 serie, a minimum number of ADC clock cycles
AnnaBridge	165:d1b4690b3f8b	6068	* are required between ADC end of calibration and ADC enable.
AnnaBridge	165:d1b4690b3f8b	6069	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
AnnaBridge	165:d1b4690b3f8b	6070	* @note For devices with differential mode available:
AnnaBridge	165:d1b4690b3f8b	6071	* Calibration of offset is specific to each of
AnnaBridge	165:d1b4690b3f8b	6072	* single-ended and differential modes
AnnaBridge	165:d1b4690b3f8b	6073	* (calibration run must be performed for each of these
AnnaBridge	165:d1b4690b3f8b	6074	* differential modes, if used afterwards and if the application
AnnaBridge	165:d1b4690b3f8b	6075	* requires their calibration).
AnnaBridge	165:d1b4690b3f8b	6076	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6077	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6078	* ADC must be ADC disabled.
AnnaBridge	165:d1b4690b3f8b	6079	* @rmtoll CR ADCAL LL_ADC_StartCalibration\n
AnnaBridge	165:d1b4690b3f8b	6080	* CR ADCALDIF LL_ADC_StartCalibration
AnnaBridge	165:d1b4690b3f8b	6081	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6082	* @param SingleDiff This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6083	* @arg @ref LL_ADC_SINGLE_ENDED
AnnaBridge	165:d1b4690b3f8b	6084	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
AnnaBridge	165:d1b4690b3f8b	6085	* @retval None
AnnaBridge	165:d1b4690b3f8b	6086	*/
AnnaBridge	165:d1b4690b3f8b	6087	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff)
AnnaBridge	165:d1b4690b3f8b	6088	{
AnnaBridge	165:d1b4690b3f8b	6089	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6090	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6091	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6092	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6093	ADC_CR_ADCALDIF \| ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6094	ADC_CR_ADCAL \| (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK));
AnnaBridge	165:d1b4690b3f8b	6095	}
AnnaBridge	165:d1b4690b3f8b	6096
AnnaBridge	165:d1b4690b3f8b	6097	/**
AnnaBridge	165:d1b4690b3f8b	6098	* @brief Get ADC calibration state.
AnnaBridge	165:d1b4690b3f8b	6099	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
AnnaBridge	165:d1b4690b3f8b	6100	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6101	* @retval 0: calibration complete, 1: calibration in progress.
AnnaBridge	165:d1b4690b3f8b	6102	*/
AnnaBridge	165:d1b4690b3f8b	6103	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6104	{
AnnaBridge	165:d1b4690b3f8b	6105	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
AnnaBridge	165:d1b4690b3f8b	6106	}
AnnaBridge	165:d1b4690b3f8b	6107
AnnaBridge	165:d1b4690b3f8b	6108	/**
AnnaBridge	165:d1b4690b3f8b	6109	* @}
AnnaBridge	165:d1b4690b3f8b	6110	*/
AnnaBridge	165:d1b4690b3f8b	6111
AnnaBridge	165:d1b4690b3f8b	6112	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
AnnaBridge	165:d1b4690b3f8b	6113	* @{
AnnaBridge	165:d1b4690b3f8b	6114	*/
AnnaBridge	165:d1b4690b3f8b	6115
AnnaBridge	165:d1b4690b3f8b	6116	/**
AnnaBridge	165:d1b4690b3f8b	6117	* @brief Start ADC group regular conversion.
AnnaBridge	165:d1b4690b3f8b	6118	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	165:d1b4690b3f8b	6119	* internal trigger (SW start) and external trigger:
AnnaBridge	165:d1b4690b3f8b	6120	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	165:d1b4690b3f8b	6121	* starts immediately.
AnnaBridge	165:d1b4690b3f8b	6122	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	165:d1b4690b3f8b	6123	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	165:d1b4690b3f8b	6124	* following the ADC start conversion command.
AnnaBridge	165:d1b4690b3f8b	6125	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6126	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6127	* ADC must be enabled without conversion on going on group regular,
AnnaBridge	165:d1b4690b3f8b	6128	* without conversion stop command on going on group regular,
AnnaBridge	165:d1b4690b3f8b	6129	* without ADC disable command on going.
AnnaBridge	165:d1b4690b3f8b	6130	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
AnnaBridge	165:d1b4690b3f8b	6131	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6132	* @retval None
AnnaBridge	165:d1b4690b3f8b	6133	*/
AnnaBridge	165:d1b4690b3f8b	6134	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6135	{
AnnaBridge	165:d1b4690b3f8b	6136	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6137	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6138	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6139	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6140	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6141	ADC_CR_ADSTART);
AnnaBridge	165:d1b4690b3f8b	6142	}
AnnaBridge	165:d1b4690b3f8b	6143
AnnaBridge	165:d1b4690b3f8b	6144	/**
AnnaBridge	165:d1b4690b3f8b	6145	* @brief Stop ADC group regular conversion.
AnnaBridge	165:d1b4690b3f8b	6146	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6147	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6148	* ADC must be enabled with conversion on going on group regular,
AnnaBridge	165:d1b4690b3f8b	6149	* without ADC disable command on going.
AnnaBridge	165:d1b4690b3f8b	6150	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
AnnaBridge	165:d1b4690b3f8b	6151	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6152	* @retval None
AnnaBridge	165:d1b4690b3f8b	6153	*/
AnnaBridge	165:d1b4690b3f8b	6154	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6155	{
AnnaBridge	165:d1b4690b3f8b	6156	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6157	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6158	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6159	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6160	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6161	ADC_CR_ADSTP);
AnnaBridge	165:d1b4690b3f8b	6162	}
AnnaBridge	165:d1b4690b3f8b	6163
AnnaBridge	165:d1b4690b3f8b	6164	/**
AnnaBridge	165:d1b4690b3f8b	6165	* @brief Get ADC group regular conversion state.
AnnaBridge	165:d1b4690b3f8b	6166	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
AnnaBridge	165:d1b4690b3f8b	6167	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6168	* @retval 0: no conversion is on going on ADC group regular.
AnnaBridge	165:d1b4690b3f8b	6169	*/
AnnaBridge	165:d1b4690b3f8b	6170	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6171	{
AnnaBridge	165:d1b4690b3f8b	6172	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
AnnaBridge	165:d1b4690b3f8b	6173	}
AnnaBridge	165:d1b4690b3f8b	6174
AnnaBridge	165:d1b4690b3f8b	6175	/**
AnnaBridge	165:d1b4690b3f8b	6176	* @brief Get ADC group regular command of conversion stop state
AnnaBridge	165:d1b4690b3f8b	6177	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
AnnaBridge	165:d1b4690b3f8b	6178	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6179	* @retval 0: no command of conversion stop is on going on ADC group regular.
AnnaBridge	165:d1b4690b3f8b	6180	*/
AnnaBridge	165:d1b4690b3f8b	6181	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6182	{
AnnaBridge	165:d1b4690b3f8b	6183	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
AnnaBridge	165:d1b4690b3f8b	6184	}
AnnaBridge	165:d1b4690b3f8b	6185
AnnaBridge	165:d1b4690b3f8b	6186	/**
AnnaBridge	165:d1b4690b3f8b	6187	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6188	* all ADC configurations: all ADC resolutions and
AnnaBridge	165:d1b4690b3f8b	6189	* all oversampling increased data width (for devices
AnnaBridge	165:d1b4690b3f8b	6190	* with feature oversampling).
AnnaBridge	165:d1b4690b3f8b	6191	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32
AnnaBridge	165:d1b4690b3f8b	6192	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6193	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	165:d1b4690b3f8b	6194	*/
AnnaBridge	165:d1b4690b3f8b	6195	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6196	{
AnnaBridge	165:d1b4690b3f8b	6197	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
AnnaBridge	165:d1b4690b3f8b	6198	}
AnnaBridge	165:d1b4690b3f8b	6199
AnnaBridge	165:d1b4690b3f8b	6200	/**
AnnaBridge	165:d1b4690b3f8b	6201	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6202	* ADC resolution 12 bits.
AnnaBridge	165:d1b4690b3f8b	6203	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6204	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6205	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6206	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12
AnnaBridge	165:d1b4690b3f8b	6207	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6208	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	6209	*/
AnnaBridge	165:d1b4690b3f8b	6210	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6211	{
AnnaBridge	165:d1b4690b3f8b	6212	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
AnnaBridge	165:d1b4690b3f8b	6213	}
AnnaBridge	165:d1b4690b3f8b	6214
AnnaBridge	165:d1b4690b3f8b	6215	/**
AnnaBridge	165:d1b4690b3f8b	6216	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6217	* ADC resolution 10 bits.
AnnaBridge	165:d1b4690b3f8b	6218	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6219	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6220	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6221	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10
AnnaBridge	165:d1b4690b3f8b	6222	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6223	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	165:d1b4690b3f8b	6224	*/
AnnaBridge	165:d1b4690b3f8b	6225	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6226	{
AnnaBridge	165:d1b4690b3f8b	6227	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
AnnaBridge	165:d1b4690b3f8b	6228	}
AnnaBridge	165:d1b4690b3f8b	6229
AnnaBridge	165:d1b4690b3f8b	6230	/**
AnnaBridge	165:d1b4690b3f8b	6231	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6232	* ADC resolution 8 bits.
AnnaBridge	165:d1b4690b3f8b	6233	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6234	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6235	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6236	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8
AnnaBridge	165:d1b4690b3f8b	6237	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6238	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	165:d1b4690b3f8b	6239	*/
AnnaBridge	165:d1b4690b3f8b	6240	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6241	{
AnnaBridge	165:d1b4690b3f8b	6242	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
AnnaBridge	165:d1b4690b3f8b	6243	}
AnnaBridge	165:d1b4690b3f8b	6244
AnnaBridge	165:d1b4690b3f8b	6245	/**
AnnaBridge	165:d1b4690b3f8b	6246	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6247	* ADC resolution 6 bits.
AnnaBridge	165:d1b4690b3f8b	6248	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6249	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6250	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6251	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6
AnnaBridge	165:d1b4690b3f8b	6252	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6253	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	165:d1b4690b3f8b	6254	*/
AnnaBridge	165:d1b4690b3f8b	6255	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6256	{
AnnaBridge	165:d1b4690b3f8b	6257	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
AnnaBridge	165:d1b4690b3f8b	6258	}
AnnaBridge	165:d1b4690b3f8b	6259
AnnaBridge	165:d1b4690b3f8b	6260	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	6261	/**
AnnaBridge	165:d1b4690b3f8b	6262	* @brief Get ADC multimode conversion data of ADC master, ADC slave
AnnaBridge	165:d1b4690b3f8b	6263	* or raw data with ADC master and slave concatenated.
AnnaBridge	165:d1b4690b3f8b	6264	* @note If raw data with ADC master and slave concatenated is retrieved,
AnnaBridge	165:d1b4690b3f8b	6265	* a macro is available to get the conversion data of
AnnaBridge	165:d1b4690b3f8b	6266	* ADC master or ADC slave: see helper macro
AnnaBridge	165:d1b4690b3f8b	6267	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
AnnaBridge	165:d1b4690b3f8b	6268	* (however this macro is mainly intended for multimode
AnnaBridge	165:d1b4690b3f8b	6269	* transfer by DMA, because this function can do the same
AnnaBridge	165:d1b4690b3f8b	6270	* by getting multimode conversion data of ADC master or ADC slave
AnnaBridge	165:d1b4690b3f8b	6271	* separately).
AnnaBridge	165:d1b4690b3f8b	6272	* @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n
AnnaBridge	165:d1b4690b3f8b	6273	* CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32
AnnaBridge	165:d1b4690b3f8b	6274	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6275	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6276	* @param ConversionData This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6277	* @arg @ref LL_ADC_MULTI_MASTER
AnnaBridge	165:d1b4690b3f8b	6278	* @arg @ref LL_ADC_MULTI_SLAVE
AnnaBridge	165:d1b4690b3f8b	6279	* @arg @ref LL_ADC_MULTI_MASTER_SLAVE
AnnaBridge	165:d1b4690b3f8b	6280	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	165:d1b4690b3f8b	6281	*/
AnnaBridge	165:d1b4690b3f8b	6282	__STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t ConversionData)
AnnaBridge	165:d1b4690b3f8b	6283	{
AnnaBridge	165:d1b4690b3f8b	6284	return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR,
AnnaBridge	165:d1b4690b3f8b	6285	ConversionData)
AnnaBridge	165:d1b4690b3f8b	6286	>> POSITION_VAL(ConversionData)
AnnaBridge	165:d1b4690b3f8b	6287	);
AnnaBridge	165:d1b4690b3f8b	6288	}
AnnaBridge	165:d1b4690b3f8b	6289	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	165:d1b4690b3f8b	6290
AnnaBridge	165:d1b4690b3f8b	6291	/**
AnnaBridge	165:d1b4690b3f8b	6292	* @}
AnnaBridge	165:d1b4690b3f8b	6293	*/
AnnaBridge	165:d1b4690b3f8b	6294
AnnaBridge	165:d1b4690b3f8b	6295	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group injected
AnnaBridge	165:d1b4690b3f8b	6296	* @{
AnnaBridge	165:d1b4690b3f8b	6297	*/
AnnaBridge	165:d1b4690b3f8b	6298
AnnaBridge	165:d1b4690b3f8b	6299	/**
AnnaBridge	165:d1b4690b3f8b	6300	* @brief Start ADC group injected conversion.
AnnaBridge	165:d1b4690b3f8b	6301	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	165:d1b4690b3f8b	6302	* internal trigger (SW start) and external trigger:
AnnaBridge	165:d1b4690b3f8b	6303	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	165:d1b4690b3f8b	6304	* starts immediately.
AnnaBridge	165:d1b4690b3f8b	6305	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	165:d1b4690b3f8b	6306	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	165:d1b4690b3f8b	6307	* following the ADC start conversion command.
AnnaBridge	165:d1b4690b3f8b	6308	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6309	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6310	* ADC must be enabled without conversion on going on group injected,
AnnaBridge	165:d1b4690b3f8b	6311	* without conversion stop command on going on group injected,
AnnaBridge	165:d1b4690b3f8b	6312	* without ADC disable command on going.
AnnaBridge	165:d1b4690b3f8b	6313	* @rmtoll CR JADSTART LL_ADC_INJ_StartConversion
AnnaBridge	165:d1b4690b3f8b	6314	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6315	* @retval None
AnnaBridge	165:d1b4690b3f8b	6316	*/
AnnaBridge	165:d1b4690b3f8b	6317	__STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6318	{
AnnaBridge	165:d1b4690b3f8b	6319	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6320	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6321	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6322	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6323	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6324	ADC_CR_JADSTART);
AnnaBridge	165:d1b4690b3f8b	6325	}
AnnaBridge	165:d1b4690b3f8b	6326
AnnaBridge	165:d1b4690b3f8b	6327	/**
AnnaBridge	165:d1b4690b3f8b	6328	* @brief Stop ADC group injected conversion.
AnnaBridge	165:d1b4690b3f8b	6329	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	165:d1b4690b3f8b	6330	* ADC state:
AnnaBridge	165:d1b4690b3f8b	6331	* ADC must be enabled with conversion on going on group injected,
AnnaBridge	165:d1b4690b3f8b	6332	* without ADC disable command on going.
AnnaBridge	165:d1b4690b3f8b	6333	* @rmtoll CR JADSTP LL_ADC_INJ_StopConversion
AnnaBridge	165:d1b4690b3f8b	6334	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6335	* @retval None
AnnaBridge	165:d1b4690b3f8b	6336	*/
AnnaBridge	165:d1b4690b3f8b	6337	__STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6338	{
AnnaBridge	165:d1b4690b3f8b	6339	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	165:d1b4690b3f8b	6340	/* instead of modifying only the selected bit for this function, */
AnnaBridge	165:d1b4690b3f8b	6341	/* to not interfere with bits with HW property "rs". */
AnnaBridge	165:d1b4690b3f8b	6342	MODIFY_REG(ADCx->CR,
AnnaBridge	165:d1b4690b3f8b	6343	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	165:d1b4690b3f8b	6344	ADC_CR_JADSTP);
AnnaBridge	165:d1b4690b3f8b	6345	}
AnnaBridge	165:d1b4690b3f8b	6346
AnnaBridge	165:d1b4690b3f8b	6347	/**
AnnaBridge	165:d1b4690b3f8b	6348	* @brief Get ADC group injected conversion state.
AnnaBridge	165:d1b4690b3f8b	6349	* @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing
AnnaBridge	165:d1b4690b3f8b	6350	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6351	* @retval 0: no conversion is on going on ADC group injected.
AnnaBridge	165:d1b4690b3f8b	6352	*/
AnnaBridge	165:d1b4690b3f8b	6353	__STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6354	{
AnnaBridge	165:d1b4690b3f8b	6355	return (READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART));
AnnaBridge	165:d1b4690b3f8b	6356	}
AnnaBridge	165:d1b4690b3f8b	6357
AnnaBridge	165:d1b4690b3f8b	6358	/**
AnnaBridge	165:d1b4690b3f8b	6359	* @brief Get ADC group injected command of conversion stop state
AnnaBridge	165:d1b4690b3f8b	6360	* @rmtoll CR JADSTP LL_ADC_INJ_IsStopConversionOngoing
AnnaBridge	165:d1b4690b3f8b	6361	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6362	* @retval 0: no command of conversion stop is on going on ADC group injected.
AnnaBridge	165:d1b4690b3f8b	6363	*/
AnnaBridge	165:d1b4690b3f8b	6364	__STATIC_INLINE uint32_t LL_ADC_INJ_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6365	{
AnnaBridge	165:d1b4690b3f8b	6366	return (READ_BIT(ADCx->CR, ADC_CR_JADSTP) == (ADC_CR_JADSTP));
AnnaBridge	165:d1b4690b3f8b	6367	}
AnnaBridge	165:d1b4690b3f8b	6368
AnnaBridge	165:d1b4690b3f8b	6369	/**
AnnaBridge	165:d1b4690b3f8b	6370	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6371	* all ADC configurations: all ADC resolutions and
AnnaBridge	165:d1b4690b3f8b	6372	* all oversampling increased data width (for devices
AnnaBridge	165:d1b4690b3f8b	6373	* with feature oversampling).
AnnaBridge	165:d1b4690b3f8b	6374	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData32\n
AnnaBridge	165:d1b4690b3f8b	6375	* JDR2 JDATA LL_ADC_INJ_ReadConversionData32\n
AnnaBridge	165:d1b4690b3f8b	6376	* JDR3 JDATA LL_ADC_INJ_ReadConversionData32\n
AnnaBridge	165:d1b4690b3f8b	6377	* JDR4 JDATA LL_ADC_INJ_ReadConversionData32
AnnaBridge	165:d1b4690b3f8b	6378	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6379	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6380	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	6381	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	6382	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	6383	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	6384	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	165:d1b4690b3f8b	6385	*/
AnnaBridge	165:d1b4690b3f8b	6386	__STATIC_INLINE uint32_t LL_ADC_INJ_ReadConversionData32(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	6387	{
AnnaBridge	165:d1b4690b3f8b	6388	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	6389	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK) >> ADC_JDRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	6390	#else
AnnaBridge	165:d1b4690b3f8b	6391	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	6392	#endif
AnnaBridge	165:d1b4690b3f8b	6393
AnnaBridge	165:d1b4690b3f8b	6394	return (uint32_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	6395	ADC_JDR1_JDATA)
AnnaBridge	165:d1b4690b3f8b	6396	);
AnnaBridge	165:d1b4690b3f8b	6397	}
AnnaBridge	165:d1b4690b3f8b	6398
AnnaBridge	165:d1b4690b3f8b	6399	/**
AnnaBridge	165:d1b4690b3f8b	6400	* @brief Get ADC group injected conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6401	* ADC resolution 12 bits.
AnnaBridge	165:d1b4690b3f8b	6402	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6403	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6404	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6405	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData12\n
AnnaBridge	165:d1b4690b3f8b	6406	* JDR2 JDATA LL_ADC_INJ_ReadConversionData12\n
AnnaBridge	165:d1b4690b3f8b	6407	* JDR3 JDATA LL_ADC_INJ_ReadConversionData12\n
AnnaBridge	165:d1b4690b3f8b	6408	* JDR4 JDATA LL_ADC_INJ_ReadConversionData12
AnnaBridge	165:d1b4690b3f8b	6409	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6410	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6411	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	6412	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	6413	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	6414	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	6415	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	165:d1b4690b3f8b	6416	*/
AnnaBridge	165:d1b4690b3f8b	6417	__STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData12(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	6418	{
AnnaBridge	165:d1b4690b3f8b	6419	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	6420	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK) >> ADC_JDRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	6421	#else
AnnaBridge	165:d1b4690b3f8b	6422	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	6423	#endif
AnnaBridge	165:d1b4690b3f8b	6424
AnnaBridge	165:d1b4690b3f8b	6425	return (uint16_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	6426	ADC_JDR1_JDATA)
AnnaBridge	165:d1b4690b3f8b	6427	);
AnnaBridge	165:d1b4690b3f8b	6428	}
AnnaBridge	165:d1b4690b3f8b	6429
AnnaBridge	165:d1b4690b3f8b	6430	/**
AnnaBridge	165:d1b4690b3f8b	6431	* @brief Get ADC group injected conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6432	* ADC resolution 10 bits.
AnnaBridge	165:d1b4690b3f8b	6433	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6434	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6435	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6436	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData10\n
AnnaBridge	165:d1b4690b3f8b	6437	* JDR2 JDATA LL_ADC_INJ_ReadConversionData10\n
AnnaBridge	165:d1b4690b3f8b	6438	* JDR3 JDATA LL_ADC_INJ_ReadConversionData10\n
AnnaBridge	165:d1b4690b3f8b	6439	* JDR4 JDATA LL_ADC_INJ_ReadConversionData10
AnnaBridge	165:d1b4690b3f8b	6440	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6441	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6442	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	6443	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	6444	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	6445	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	6446	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	165:d1b4690b3f8b	6447	*/
AnnaBridge	165:d1b4690b3f8b	6448	__STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData10(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	6449	{
AnnaBridge	165:d1b4690b3f8b	6450	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	6451	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK) >> ADC_JDRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	6452	#else
AnnaBridge	165:d1b4690b3f8b	6453	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	6454	#endif
AnnaBridge	165:d1b4690b3f8b	6455
AnnaBridge	165:d1b4690b3f8b	6456	return (uint16_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	6457	ADC_JDR1_JDATA)
AnnaBridge	165:d1b4690b3f8b	6458	);
AnnaBridge	165:d1b4690b3f8b	6459	}
AnnaBridge	165:d1b4690b3f8b	6460
AnnaBridge	165:d1b4690b3f8b	6461	/**
AnnaBridge	165:d1b4690b3f8b	6462	* @brief Get ADC group injected conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6463	* ADC resolution 8 bits.
AnnaBridge	165:d1b4690b3f8b	6464	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6465	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6466	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6467	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData8\n
AnnaBridge	165:d1b4690b3f8b	6468	* JDR2 JDATA LL_ADC_INJ_ReadConversionData8\n
AnnaBridge	165:d1b4690b3f8b	6469	* JDR3 JDATA LL_ADC_INJ_ReadConversionData8\n
AnnaBridge	165:d1b4690b3f8b	6470	* JDR4 JDATA LL_ADC_INJ_ReadConversionData8
AnnaBridge	165:d1b4690b3f8b	6471	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6472	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6473	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	6474	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	6475	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	6476	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	6477	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	165:d1b4690b3f8b	6478	*/
AnnaBridge	165:d1b4690b3f8b	6479	__STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData8(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	6480	{
AnnaBridge	165:d1b4690b3f8b	6481	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	6482	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK) >> ADC_JDRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	6483	#else
AnnaBridge	165:d1b4690b3f8b	6484	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	6485	#endif
AnnaBridge	165:d1b4690b3f8b	6486
AnnaBridge	165:d1b4690b3f8b	6487	return (uint8_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	6488	ADC_JDR1_JDATA)
AnnaBridge	165:d1b4690b3f8b	6489	);
AnnaBridge	165:d1b4690b3f8b	6490	}
AnnaBridge	165:d1b4690b3f8b	6491
AnnaBridge	165:d1b4690b3f8b	6492	/**
AnnaBridge	165:d1b4690b3f8b	6493	* @brief Get ADC group injected conversion data, range fit for
AnnaBridge	165:d1b4690b3f8b	6494	* ADC resolution 6 bits.
AnnaBridge	165:d1b4690b3f8b	6495	* @note For devices with feature oversampling: Oversampling
AnnaBridge	165:d1b4690b3f8b	6496	* can increase data width, function for extended range
AnnaBridge	165:d1b4690b3f8b	6497	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
AnnaBridge	165:d1b4690b3f8b	6498	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData6\n
AnnaBridge	165:d1b4690b3f8b	6499	* JDR2 JDATA LL_ADC_INJ_ReadConversionData6\n
AnnaBridge	165:d1b4690b3f8b	6500	* JDR3 JDATA LL_ADC_INJ_ReadConversionData6\n
AnnaBridge	165:d1b4690b3f8b	6501	* JDR4 JDATA LL_ADC_INJ_ReadConversionData6
AnnaBridge	165:d1b4690b3f8b	6502	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6503	* @param Rank This parameter can be one of the following values:
AnnaBridge	165:d1b4690b3f8b	6504	* @arg @ref LL_ADC_INJ_RANK_1
AnnaBridge	165:d1b4690b3f8b	6505	* @arg @ref LL_ADC_INJ_RANK_2
AnnaBridge	165:d1b4690b3f8b	6506	* @arg @ref LL_ADC_INJ_RANK_3
AnnaBridge	165:d1b4690b3f8b	6507	* @arg @ref LL_ADC_INJ_RANK_4
AnnaBridge	165:d1b4690b3f8b	6508	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	165:d1b4690b3f8b	6509	*/
AnnaBridge	165:d1b4690b3f8b	6510	__STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData6(ADC_TypeDef *ADCx, uint32_t Rank)
AnnaBridge	165:d1b4690b3f8b	6511	{
AnnaBridge	165:d1b4690b3f8b	6512	#if defined(CORE_CM0PLUS)
AnnaBridge	165:d1b4690b3f8b	6513	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, ((Rank & ADC_INJ_JDRX_REGOFFSET_MASK) >> ADC_JDRX_REGOFFSET_POS));
AnnaBridge	165:d1b4690b3f8b	6514	#else
AnnaBridge	165:d1b4690b3f8b	6515	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
AnnaBridge	165:d1b4690b3f8b	6516	#endif
AnnaBridge	165:d1b4690b3f8b	6517
AnnaBridge	165:d1b4690b3f8b	6518	return (uint8_t)(READ_BIT(*preg,
AnnaBridge	165:d1b4690b3f8b	6519	ADC_JDR1_JDATA)
AnnaBridge	165:d1b4690b3f8b	6520	);
AnnaBridge	165:d1b4690b3f8b	6521	}
AnnaBridge	165:d1b4690b3f8b	6522
AnnaBridge	165:d1b4690b3f8b	6523	/**
AnnaBridge	165:d1b4690b3f8b	6524	* @}
AnnaBridge	165:d1b4690b3f8b	6525	*/
AnnaBridge	165:d1b4690b3f8b	6526
AnnaBridge	165:d1b4690b3f8b	6527	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
AnnaBridge	165:d1b4690b3f8b	6528	* @{
AnnaBridge	165:d1b4690b3f8b	6529	*/
AnnaBridge	165:d1b4690b3f8b	6530
AnnaBridge	165:d1b4690b3f8b	6531	/**
AnnaBridge	165:d1b4690b3f8b	6532	* @brief Get flag ADC ready.
AnnaBridge	165:d1b4690b3f8b	6533	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	165:d1b4690b3f8b	6534	* is enabled and when conversion clock is active.
AnnaBridge	165:d1b4690b3f8b	6535	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	165:d1b4690b3f8b	6536	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
AnnaBridge	165:d1b4690b3f8b	6537	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6538	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6539	*/
AnnaBridge	165:d1b4690b3f8b	6540	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6541	{
AnnaBridge	165:d1b4690b3f8b	6542	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
AnnaBridge	165:d1b4690b3f8b	6543	}
AnnaBridge	165:d1b4690b3f8b	6544
AnnaBridge	165:d1b4690b3f8b	6545	/**
AnnaBridge	165:d1b4690b3f8b	6546	* @brief Get flag ADC group regular end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	6547	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
AnnaBridge	165:d1b4690b3f8b	6548	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6549	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6550	*/
AnnaBridge	165:d1b4690b3f8b	6551	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6552	{
AnnaBridge	165:d1b4690b3f8b	6553	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
AnnaBridge	165:d1b4690b3f8b	6554	}
AnnaBridge	165:d1b4690b3f8b	6555
AnnaBridge	165:d1b4690b3f8b	6556	/**
AnnaBridge	165:d1b4690b3f8b	6557	* @brief Get flag ADC group regular end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	6558	* @rmtoll ISR EOS LL_ADC_IsActiveFlag_EOS
AnnaBridge	165:d1b4690b3f8b	6559	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6560	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6561	*/
AnnaBridge	165:d1b4690b3f8b	6562	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6563	{
AnnaBridge	165:d1b4690b3f8b	6564	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
AnnaBridge	165:d1b4690b3f8b	6565	}
AnnaBridge	165:d1b4690b3f8b	6566
AnnaBridge	165:d1b4690b3f8b	6567	/**
AnnaBridge	165:d1b4690b3f8b	6568	* @brief Get flag ADC group regular overrun.
AnnaBridge	165:d1b4690b3f8b	6569	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
AnnaBridge	165:d1b4690b3f8b	6570	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6571	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6572	*/
AnnaBridge	165:d1b4690b3f8b	6573	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6574	{
AnnaBridge	165:d1b4690b3f8b	6575	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
AnnaBridge	165:d1b4690b3f8b	6576	}
AnnaBridge	165:d1b4690b3f8b	6577
AnnaBridge	165:d1b4690b3f8b	6578	/**
AnnaBridge	165:d1b4690b3f8b	6579	* @brief Get flag ADC group regular end of sampling phase.
AnnaBridge	165:d1b4690b3f8b	6580	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
AnnaBridge	165:d1b4690b3f8b	6581	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6582	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6583	*/
AnnaBridge	165:d1b4690b3f8b	6584	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6585	{
AnnaBridge	165:d1b4690b3f8b	6586	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
AnnaBridge	165:d1b4690b3f8b	6587	}
AnnaBridge	165:d1b4690b3f8b	6588
AnnaBridge	165:d1b4690b3f8b	6589	/**
AnnaBridge	165:d1b4690b3f8b	6590	* @brief Get flag ADC group injected end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	6591	* @rmtoll ISR JEOC LL_ADC_IsActiveFlag_JEOC
AnnaBridge	165:d1b4690b3f8b	6592	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6593	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6594	*/
AnnaBridge	165:d1b4690b3f8b	6595	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6596	{
AnnaBridge	165:d1b4690b3f8b	6597	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOC) == (LL_ADC_FLAG_JEOC));
AnnaBridge	165:d1b4690b3f8b	6598	}
AnnaBridge	165:d1b4690b3f8b	6599
AnnaBridge	165:d1b4690b3f8b	6600	/**
AnnaBridge	165:d1b4690b3f8b	6601	* @brief Get flag ADC group injected end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	6602	* @rmtoll ISR JEOS LL_ADC_IsActiveFlag_JEOS
AnnaBridge	165:d1b4690b3f8b	6603	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6604	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6605	*/
AnnaBridge	165:d1b4690b3f8b	6606	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6607	{
AnnaBridge	165:d1b4690b3f8b	6608	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOS) == (LL_ADC_FLAG_JEOS));
AnnaBridge	165:d1b4690b3f8b	6609	}
AnnaBridge	165:d1b4690b3f8b	6610
AnnaBridge	165:d1b4690b3f8b	6611	/**
AnnaBridge	165:d1b4690b3f8b	6612	* @brief Get flag ADC group injected contexts queue overflow.
AnnaBridge	165:d1b4690b3f8b	6613	* @rmtoll ISR JQOVF LL_ADC_IsActiveFlag_JQOVF
AnnaBridge	165:d1b4690b3f8b	6614	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6615	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6616	*/
AnnaBridge	165:d1b4690b3f8b	6617	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JQOVF(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6618	{
AnnaBridge	165:d1b4690b3f8b	6619	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JQOVF) == (LL_ADC_FLAG_JQOVF));
AnnaBridge	165:d1b4690b3f8b	6620	}
AnnaBridge	165:d1b4690b3f8b	6621
AnnaBridge	165:d1b4690b3f8b	6622	/**
AnnaBridge	165:d1b4690b3f8b	6623	* @brief Get flag ADC analog watchdog 1 flag
AnnaBridge	165:d1b4690b3f8b	6624	* @rmtoll ISR AWD1 LL_ADC_IsActiveFlag_AWD1
AnnaBridge	165:d1b4690b3f8b	6625	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6626	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6627	*/
AnnaBridge	165:d1b4690b3f8b	6628	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6629	{
AnnaBridge	165:d1b4690b3f8b	6630	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
AnnaBridge	165:d1b4690b3f8b	6631	}
AnnaBridge	165:d1b4690b3f8b	6632
AnnaBridge	165:d1b4690b3f8b	6633	/**
AnnaBridge	165:d1b4690b3f8b	6634	* @brief Get flag ADC analog watchdog 2.
AnnaBridge	165:d1b4690b3f8b	6635	* @rmtoll ISR AWD2 LL_ADC_IsActiveFlag_AWD2
AnnaBridge	165:d1b4690b3f8b	6636	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6637	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6638	*/
AnnaBridge	165:d1b4690b3f8b	6639	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD2(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6640	{
AnnaBridge	165:d1b4690b3f8b	6641	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD2) == (LL_ADC_FLAG_AWD2));
AnnaBridge	165:d1b4690b3f8b	6642	}
AnnaBridge	165:d1b4690b3f8b	6643
AnnaBridge	165:d1b4690b3f8b	6644	/**
AnnaBridge	165:d1b4690b3f8b	6645	* @brief Get flag ADC analog watchdog 3.
AnnaBridge	165:d1b4690b3f8b	6646	* @rmtoll ISR AWD3 LL_ADC_IsActiveFlag_AWD3
AnnaBridge	165:d1b4690b3f8b	6647	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6648	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6649	*/
AnnaBridge	165:d1b4690b3f8b	6650	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD3(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6651	{
AnnaBridge	165:d1b4690b3f8b	6652	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD3) == (LL_ADC_FLAG_AWD3));
AnnaBridge	165:d1b4690b3f8b	6653	}
AnnaBridge	165:d1b4690b3f8b	6654
AnnaBridge	165:d1b4690b3f8b	6655	/**
AnnaBridge	165:d1b4690b3f8b	6656	* @brief Clear flag ADC ready.
AnnaBridge	165:d1b4690b3f8b	6657	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	165:d1b4690b3f8b	6658	* is enabled and when conversion clock is active.
AnnaBridge	165:d1b4690b3f8b	6659	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	165:d1b4690b3f8b	6660	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
AnnaBridge	165:d1b4690b3f8b	6661	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6662	* @retval None
AnnaBridge	165:d1b4690b3f8b	6663	*/
AnnaBridge	165:d1b4690b3f8b	6664	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6665	{
AnnaBridge	165:d1b4690b3f8b	6666	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
AnnaBridge	165:d1b4690b3f8b	6667	}
AnnaBridge	165:d1b4690b3f8b	6668
AnnaBridge	165:d1b4690b3f8b	6669	/**
AnnaBridge	165:d1b4690b3f8b	6670	* @brief Clear flag ADC group regular end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	6671	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
AnnaBridge	165:d1b4690b3f8b	6672	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6673	* @retval None
AnnaBridge	165:d1b4690b3f8b	6674	*/
AnnaBridge	165:d1b4690b3f8b	6675	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6676	{
AnnaBridge	165:d1b4690b3f8b	6677	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
AnnaBridge	165:d1b4690b3f8b	6678	}
AnnaBridge	165:d1b4690b3f8b	6679
AnnaBridge	165:d1b4690b3f8b	6680	/**
AnnaBridge	165:d1b4690b3f8b	6681	* @brief Clear flag ADC group regular end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	6682	* @rmtoll ISR EOS LL_ADC_ClearFlag_EOS
AnnaBridge	165:d1b4690b3f8b	6683	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6684	* @retval None
AnnaBridge	165:d1b4690b3f8b	6685	*/
AnnaBridge	165:d1b4690b3f8b	6686	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6687	{
AnnaBridge	165:d1b4690b3f8b	6688	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
AnnaBridge	165:d1b4690b3f8b	6689	}
AnnaBridge	165:d1b4690b3f8b	6690
AnnaBridge	165:d1b4690b3f8b	6691	/**
AnnaBridge	165:d1b4690b3f8b	6692	* @brief Clear flag ADC group regular overrun.
AnnaBridge	165:d1b4690b3f8b	6693	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
AnnaBridge	165:d1b4690b3f8b	6694	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6695	* @retval None
AnnaBridge	165:d1b4690b3f8b	6696	*/
AnnaBridge	165:d1b4690b3f8b	6697	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6698	{
AnnaBridge	165:d1b4690b3f8b	6699	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
AnnaBridge	165:d1b4690b3f8b	6700	}
AnnaBridge	165:d1b4690b3f8b	6701
AnnaBridge	165:d1b4690b3f8b	6702	/**
AnnaBridge	165:d1b4690b3f8b	6703	* @brief Clear flag ADC group regular end of sampling phase.
AnnaBridge	165:d1b4690b3f8b	6704	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
AnnaBridge	165:d1b4690b3f8b	6705	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6706	* @retval None
AnnaBridge	165:d1b4690b3f8b	6707	*/
AnnaBridge	165:d1b4690b3f8b	6708	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6709	{
AnnaBridge	165:d1b4690b3f8b	6710	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
AnnaBridge	165:d1b4690b3f8b	6711	}
AnnaBridge	165:d1b4690b3f8b	6712
AnnaBridge	165:d1b4690b3f8b	6713	/**
AnnaBridge	165:d1b4690b3f8b	6714	* @brief Clear flag ADC group injected end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	6715	* @rmtoll ISR JEOC LL_ADC_ClearFlag_JEOC
AnnaBridge	165:d1b4690b3f8b	6716	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6717	* @retval None
AnnaBridge	165:d1b4690b3f8b	6718	*/
AnnaBridge	165:d1b4690b3f8b	6719	__STATIC_INLINE void LL_ADC_ClearFlag_JEOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6720	{
AnnaBridge	165:d1b4690b3f8b	6721	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOC);
AnnaBridge	165:d1b4690b3f8b	6722	}
AnnaBridge	165:d1b4690b3f8b	6723
AnnaBridge	165:d1b4690b3f8b	6724	/**
AnnaBridge	165:d1b4690b3f8b	6725	* @brief Clear flag ADC group injected end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	6726	* @rmtoll ISR JEOS LL_ADC_ClearFlag_JEOS
AnnaBridge	165:d1b4690b3f8b	6727	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6728	* @retval None
AnnaBridge	165:d1b4690b3f8b	6729	*/
AnnaBridge	165:d1b4690b3f8b	6730	__STATIC_INLINE void LL_ADC_ClearFlag_JEOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6731	{
AnnaBridge	165:d1b4690b3f8b	6732	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOS);
AnnaBridge	165:d1b4690b3f8b	6733	}
AnnaBridge	165:d1b4690b3f8b	6734
AnnaBridge	165:d1b4690b3f8b	6735	/**
AnnaBridge	165:d1b4690b3f8b	6736	* @brief Clear flag ADC group injected contexts queue overflow.
AnnaBridge	165:d1b4690b3f8b	6737	* @rmtoll ISR JQOVF LL_ADC_ClearFlag_JQOVF
AnnaBridge	165:d1b4690b3f8b	6738	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6739	* @retval None
AnnaBridge	165:d1b4690b3f8b	6740	*/
AnnaBridge	165:d1b4690b3f8b	6741	__STATIC_INLINE void LL_ADC_ClearFlag_JQOVF(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6742	{
AnnaBridge	165:d1b4690b3f8b	6743	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JQOVF);
AnnaBridge	165:d1b4690b3f8b	6744	}
AnnaBridge	165:d1b4690b3f8b	6745
AnnaBridge	165:d1b4690b3f8b	6746	/**
AnnaBridge	165:d1b4690b3f8b	6747	* @brief Clear flag ADC analog watchdog 1.
AnnaBridge	165:d1b4690b3f8b	6748	* @rmtoll ISR AWD1 LL_ADC_ClearFlag_AWD1
AnnaBridge	165:d1b4690b3f8b	6749	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6750	* @retval None
AnnaBridge	165:d1b4690b3f8b	6751	*/
AnnaBridge	165:d1b4690b3f8b	6752	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6753	{
AnnaBridge	165:d1b4690b3f8b	6754	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
AnnaBridge	165:d1b4690b3f8b	6755	}
AnnaBridge	165:d1b4690b3f8b	6756
AnnaBridge	165:d1b4690b3f8b	6757	/**
AnnaBridge	165:d1b4690b3f8b	6758	* @brief Clear flag ADC analog watchdog 2.
AnnaBridge	165:d1b4690b3f8b	6759	* @rmtoll ISR AWD2 LL_ADC_ClearFlag_AWD2
AnnaBridge	165:d1b4690b3f8b	6760	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6761	* @retval None
AnnaBridge	165:d1b4690b3f8b	6762	*/
AnnaBridge	165:d1b4690b3f8b	6763	__STATIC_INLINE void LL_ADC_ClearFlag_AWD2(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6764	{
AnnaBridge	165:d1b4690b3f8b	6765	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD2);
AnnaBridge	165:d1b4690b3f8b	6766	}
AnnaBridge	165:d1b4690b3f8b	6767
AnnaBridge	165:d1b4690b3f8b	6768	/**
AnnaBridge	165:d1b4690b3f8b	6769	* @brief Clear flag ADC analog watchdog 3.
AnnaBridge	165:d1b4690b3f8b	6770	* @rmtoll ISR AWD3 LL_ADC_ClearFlag_AWD3
AnnaBridge	165:d1b4690b3f8b	6771	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	6772	* @retval None
AnnaBridge	165:d1b4690b3f8b	6773	*/
AnnaBridge	165:d1b4690b3f8b	6774	__STATIC_INLINE void LL_ADC_ClearFlag_AWD3(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	6775	{
AnnaBridge	165:d1b4690b3f8b	6776	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD3);
AnnaBridge	165:d1b4690b3f8b	6777	}
AnnaBridge	165:d1b4690b3f8b	6778
AnnaBridge	165:d1b4690b3f8b	6779	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	165:d1b4690b3f8b	6780	/**
AnnaBridge	165:d1b4690b3f8b	6781	* @brief Get flag multimode ADC ready of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6782	* @rmtoll CSR ADRDY_MST LL_ADC_IsActiveFlag_MST_ADRDY
AnnaBridge	165:d1b4690b3f8b	6783	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6784	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6785	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6786	*/
AnnaBridge	165:d1b4690b3f8b	6787	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6788	{
AnnaBridge	165:d1b4690b3f8b	6789	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_MST) == (LL_ADC_FLAG_ADRDY_MST));
AnnaBridge	165:d1b4690b3f8b	6790	}
AnnaBridge	165:d1b4690b3f8b	6791
AnnaBridge	165:d1b4690b3f8b	6792	/**
AnnaBridge	165:d1b4690b3f8b	6793	* @brief Get flag multimode ADC ready of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6794	* @rmtoll CSR ADRDY_SLV LL_ADC_IsActiveFlag_SLV_ADRDY
AnnaBridge	165:d1b4690b3f8b	6795	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6796	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6797	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6798	*/
AnnaBridge	165:d1b4690b3f8b	6799	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6800	{
AnnaBridge	165:d1b4690b3f8b	6801	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_SLV) == (LL_ADC_FLAG_ADRDY_SLV));
AnnaBridge	165:d1b4690b3f8b	6802	}
AnnaBridge	165:d1b4690b3f8b	6803
AnnaBridge	165:d1b4690b3f8b	6804	/**
AnnaBridge	165:d1b4690b3f8b	6805	* @brief Get flag multimode ADC group regular end of unitary conversion of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6806	* @rmtoll CSR EOC_MST LL_ADC_IsActiveFlag_MST_EOC
AnnaBridge	165:d1b4690b3f8b	6807	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6808	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6809	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6810	*/
AnnaBridge	165:d1b4690b3f8b	6811	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOC(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6812	{
AnnaBridge	165:d1b4690b3f8b	6813	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV));
AnnaBridge	165:d1b4690b3f8b	6814	}
AnnaBridge	165:d1b4690b3f8b	6815
AnnaBridge	165:d1b4690b3f8b	6816	/**
AnnaBridge	165:d1b4690b3f8b	6817	* @brief Get flag multimode ADC group regular end of unitary conversion of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6818	* @rmtoll CSR EOC_SLV LL_ADC_IsActiveFlag_SLV_EOC
AnnaBridge	165:d1b4690b3f8b	6819	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6820	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6821	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6822	*/
AnnaBridge	165:d1b4690b3f8b	6823	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOC(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6824	{
AnnaBridge	165:d1b4690b3f8b	6825	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV));
AnnaBridge	165:d1b4690b3f8b	6826	}
AnnaBridge	165:d1b4690b3f8b	6827
AnnaBridge	165:d1b4690b3f8b	6828	/**
AnnaBridge	165:d1b4690b3f8b	6829	* @brief Get flag multimode ADC group regular end of sequence conversions of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6830	* @rmtoll CSR EOS_MST LL_ADC_IsActiveFlag_MST_EOS
AnnaBridge	165:d1b4690b3f8b	6831	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6832	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6833	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6834	*/
AnnaBridge	165:d1b4690b3f8b	6835	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOS(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6836	{
AnnaBridge	165:d1b4690b3f8b	6837	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_MST) == (LL_ADC_FLAG_EOS_MST));
AnnaBridge	165:d1b4690b3f8b	6838	}
AnnaBridge	165:d1b4690b3f8b	6839
AnnaBridge	165:d1b4690b3f8b	6840	/**
AnnaBridge	165:d1b4690b3f8b	6841	* @brief Get flag multimode ADC group regular end of sequence conversions of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6842	* @rmtoll CSR EOS_SLV LL_ADC_IsActiveFlag_SLV_EOS
AnnaBridge	165:d1b4690b3f8b	6843	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6844	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6845	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6846	*/
AnnaBridge	165:d1b4690b3f8b	6847	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOS(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6848	{
AnnaBridge	165:d1b4690b3f8b	6849	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_SLV) == (LL_ADC_FLAG_EOS_SLV));
AnnaBridge	165:d1b4690b3f8b	6850	}
AnnaBridge	165:d1b4690b3f8b	6851
AnnaBridge	165:d1b4690b3f8b	6852	/**
AnnaBridge	165:d1b4690b3f8b	6853	* @brief Get flag multimode ADC group regular overrun of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6854	* @rmtoll CSR OVR_MST LL_ADC_IsActiveFlag_MST_OVR
AnnaBridge	165:d1b4690b3f8b	6855	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6856	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6857	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6858	*/
AnnaBridge	165:d1b4690b3f8b	6859	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_OVR(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6860	{
AnnaBridge	165:d1b4690b3f8b	6861	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_MST) == (LL_ADC_FLAG_OVR_MST));
AnnaBridge	165:d1b4690b3f8b	6862	}
AnnaBridge	165:d1b4690b3f8b	6863
AnnaBridge	165:d1b4690b3f8b	6864	/**
AnnaBridge	165:d1b4690b3f8b	6865	* @brief Get flag multimode ADC group regular overrun of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6866	* @rmtoll CSR OVR_SLV LL_ADC_IsActiveFlag_SLV_OVR
AnnaBridge	165:d1b4690b3f8b	6867	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6868	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6869	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6870	*/
AnnaBridge	165:d1b4690b3f8b	6871	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_OVR(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6872	{
AnnaBridge	165:d1b4690b3f8b	6873	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_SLV) == (LL_ADC_FLAG_OVR_SLV));
AnnaBridge	165:d1b4690b3f8b	6874	}
AnnaBridge	165:d1b4690b3f8b	6875
AnnaBridge	165:d1b4690b3f8b	6876	/**
AnnaBridge	165:d1b4690b3f8b	6877	* @brief Get flag multimode ADC group regular end of sampling of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6878	* @rmtoll CSR EOSMP_MST LL_ADC_IsActiveFlag_MST_EOSMP
AnnaBridge	165:d1b4690b3f8b	6879	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6880	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6881	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6882	*/
AnnaBridge	165:d1b4690b3f8b	6883	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6884	{
AnnaBridge	165:d1b4690b3f8b	6885	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_MST) == (LL_ADC_FLAG_EOSMP_MST));
AnnaBridge	165:d1b4690b3f8b	6886	}
AnnaBridge	165:d1b4690b3f8b	6887
AnnaBridge	165:d1b4690b3f8b	6888	/**
AnnaBridge	165:d1b4690b3f8b	6889	* @brief Get flag multimode ADC group regular end of sampling of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6890	* @rmtoll CSR EOSMP_SLV LL_ADC_IsActiveFlag_SLV_EOSMP
AnnaBridge	165:d1b4690b3f8b	6891	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6892	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6893	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6894	*/
AnnaBridge	165:d1b4690b3f8b	6895	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6896	{
AnnaBridge	165:d1b4690b3f8b	6897	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_SLV) == (LL_ADC_FLAG_EOSMP_SLV));
AnnaBridge	165:d1b4690b3f8b	6898	}
AnnaBridge	165:d1b4690b3f8b	6899
AnnaBridge	165:d1b4690b3f8b	6900	/**
AnnaBridge	165:d1b4690b3f8b	6901	* @brief Get flag multimode ADC group injected end of unitary conversion of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6902	* @rmtoll CSR JEOC_MST LL_ADC_IsActiveFlag_MST_JEOC
AnnaBridge	165:d1b4690b3f8b	6903	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6904	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6905	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6906	*/
AnnaBridge	165:d1b4690b3f8b	6907	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOC(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6908	{
AnnaBridge	165:d1b4690b3f8b	6909	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_MST) == (LL_ADC_FLAG_JEOC_MST));
AnnaBridge	165:d1b4690b3f8b	6910	}
AnnaBridge	165:d1b4690b3f8b	6911
AnnaBridge	165:d1b4690b3f8b	6912	/**
AnnaBridge	165:d1b4690b3f8b	6913	* @brief Get flag multimode ADC group injected end of unitary conversion of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6914	* @rmtoll CSR JEOC_SLV LL_ADC_IsActiveFlag_SLV_JEOC
AnnaBridge	165:d1b4690b3f8b	6915	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6916	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6917	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6918	*/
AnnaBridge	165:d1b4690b3f8b	6919	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOC(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6920	{
AnnaBridge	165:d1b4690b3f8b	6921	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_SLV) == (LL_ADC_FLAG_JEOC_SLV));
AnnaBridge	165:d1b4690b3f8b	6922	}
AnnaBridge	165:d1b4690b3f8b	6923
AnnaBridge	165:d1b4690b3f8b	6924	/**
AnnaBridge	165:d1b4690b3f8b	6925	* @brief Get flag multimode ADC group injected end of sequence conversions of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6926	* @rmtoll CSR JEOS_MST LL_ADC_IsActiveFlag_MST_JEOS
AnnaBridge	165:d1b4690b3f8b	6927	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6928	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6929	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6930	*/
AnnaBridge	165:d1b4690b3f8b	6931	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOS(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6932	{
AnnaBridge	165:d1b4690b3f8b	6933	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_MST) == (LL_ADC_FLAG_JEOS_MST));
AnnaBridge	165:d1b4690b3f8b	6934	}
AnnaBridge	165:d1b4690b3f8b	6935
AnnaBridge	165:d1b4690b3f8b	6936	/**
AnnaBridge	165:d1b4690b3f8b	6937	* @brief Get flag multimode ADC group injected end of sequence conversions of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6938	* @rmtoll CSR JEOS_SLV LL_ADC_IsActiveFlag_SLV_JEOS
AnnaBridge	165:d1b4690b3f8b	6939	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6940	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6941	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6942	*/
AnnaBridge	165:d1b4690b3f8b	6943	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOS(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6944	{
AnnaBridge	165:d1b4690b3f8b	6945	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_SLV) == (LL_ADC_FLAG_JEOS_SLV));
AnnaBridge	165:d1b4690b3f8b	6946	}
AnnaBridge	165:d1b4690b3f8b	6947
AnnaBridge	165:d1b4690b3f8b	6948	/**
AnnaBridge	165:d1b4690b3f8b	6949	* @brief Get flag multimode ADC group injected context queue overflow of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6950	* @rmtoll CSR JQOVF_MST LL_ADC_IsActiveFlag_MST_JQOVF
AnnaBridge	165:d1b4690b3f8b	6951	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6952	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6953	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6954	*/
AnnaBridge	165:d1b4690b3f8b	6955	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6956	{
AnnaBridge	165:d1b4690b3f8b	6957	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_MST) == (LL_ADC_FLAG_JQOVF_MST));
AnnaBridge	165:d1b4690b3f8b	6958	}
AnnaBridge	165:d1b4690b3f8b	6959
AnnaBridge	165:d1b4690b3f8b	6960	/**
AnnaBridge	165:d1b4690b3f8b	6961	* @brief Get flag multimode ADC group injected context queue overflow of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6962	* @rmtoll CSR JQOVF_SLV LL_ADC_IsActiveFlag_SLV_JQOVF
AnnaBridge	165:d1b4690b3f8b	6963	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6964	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6965	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6966	*/
AnnaBridge	165:d1b4690b3f8b	6967	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6968	{
AnnaBridge	165:d1b4690b3f8b	6969	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_SLV) == (LL_ADC_FLAG_JQOVF_SLV));
AnnaBridge	165:d1b4690b3f8b	6970	}
AnnaBridge	165:d1b4690b3f8b	6971
AnnaBridge	165:d1b4690b3f8b	6972	/**
AnnaBridge	165:d1b4690b3f8b	6973	* @brief Get flag multimode ADC analog watchdog 1 of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6974	* @rmtoll CSR AWD1_MST LL_ADC_IsActiveFlag_MST_AWD1
AnnaBridge	165:d1b4690b3f8b	6975	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6976	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6977	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6978	*/
AnnaBridge	165:d1b4690b3f8b	6979	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD1(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6980	{
AnnaBridge	165:d1b4690b3f8b	6981	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_MST) == (LL_ADC_FLAG_AWD1_MST));
AnnaBridge	165:d1b4690b3f8b	6982	}
AnnaBridge	165:d1b4690b3f8b	6983
AnnaBridge	165:d1b4690b3f8b	6984	/**
AnnaBridge	165:d1b4690b3f8b	6985	* @brief Get flag multimode analog watchdog 1 of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	6986	* @rmtoll CSR AWD1_SLV LL_ADC_IsActiveFlag_SLV_AWD1
AnnaBridge	165:d1b4690b3f8b	6987	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	6988	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	6989	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	6990	*/
AnnaBridge	165:d1b4690b3f8b	6991	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD1(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	6992	{
AnnaBridge	165:d1b4690b3f8b	6993	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_SLV) == (LL_ADC_FLAG_AWD1_SLV));
AnnaBridge	165:d1b4690b3f8b	6994	}
AnnaBridge	165:d1b4690b3f8b	6995
AnnaBridge	165:d1b4690b3f8b	6996	/**
AnnaBridge	165:d1b4690b3f8b	6997	* @brief Get flag multimode ADC analog watchdog 2 of the ADC master.
AnnaBridge	165:d1b4690b3f8b	6998	* @rmtoll CSR AWD2_MST LL_ADC_IsActiveFlag_MST_AWD2
AnnaBridge	165:d1b4690b3f8b	6999	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	7000	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	7001	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7002	*/
AnnaBridge	165:d1b4690b3f8b	7003	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD2(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	7004	{
AnnaBridge	165:d1b4690b3f8b	7005	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_MST) == (LL_ADC_FLAG_AWD2_MST));
AnnaBridge	165:d1b4690b3f8b	7006	}
AnnaBridge	165:d1b4690b3f8b	7007
AnnaBridge	165:d1b4690b3f8b	7008	/**
AnnaBridge	165:d1b4690b3f8b	7009	* @brief Get flag multimode ADC analog watchdog 2 of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	7010	* @rmtoll CSR AWD2_SLV LL_ADC_IsActiveFlag_SLV_AWD2
AnnaBridge	165:d1b4690b3f8b	7011	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	7012	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	7013	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7014	*/
AnnaBridge	165:d1b4690b3f8b	7015	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD2(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	7016	{
AnnaBridge	165:d1b4690b3f8b	7017	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_SLV) == (LL_ADC_FLAG_AWD2_SLV));
AnnaBridge	165:d1b4690b3f8b	7018	}
AnnaBridge	165:d1b4690b3f8b	7019
AnnaBridge	165:d1b4690b3f8b	7020	/**
AnnaBridge	165:d1b4690b3f8b	7021	* @brief Get flag multimode ADC analog watchdog 3 of the ADC master.
AnnaBridge	165:d1b4690b3f8b	7022	* @rmtoll CSR AWD3_MST LL_ADC_IsActiveFlag_MST_AWD3
AnnaBridge	165:d1b4690b3f8b	7023	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	7024	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	7025	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7026	*/
AnnaBridge	165:d1b4690b3f8b	7027	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD3(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	7028	{
AnnaBridge	165:d1b4690b3f8b	7029	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_MST) == (LL_ADC_FLAG_AWD3_MST));
AnnaBridge	165:d1b4690b3f8b	7030	}
AnnaBridge	165:d1b4690b3f8b	7031
AnnaBridge	165:d1b4690b3f8b	7032	/**
AnnaBridge	165:d1b4690b3f8b	7033	* @brief Get flag multimode ADC analog watchdog 3 of the ADC slave.
AnnaBridge	165:d1b4690b3f8b	7034	* @rmtoll CSR AWD3_SLV LL_ADC_IsActiveFlag_SLV_AWD3
AnnaBridge	165:d1b4690b3f8b	7035	* @param ADCxy_COMMON ADC common instance
AnnaBridge	165:d1b4690b3f8b	7036	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	165:d1b4690b3f8b	7037	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7038	*/
AnnaBridge	165:d1b4690b3f8b	7039	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD3(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	165:d1b4690b3f8b	7040	{
AnnaBridge	165:d1b4690b3f8b	7041	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_SLV) == (LL_ADC_FLAG_AWD3_SLV));
AnnaBridge	165:d1b4690b3f8b	7042	}
AnnaBridge	165:d1b4690b3f8b	7043	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	165:d1b4690b3f8b	7044
AnnaBridge	165:d1b4690b3f8b	7045	/**
AnnaBridge	165:d1b4690b3f8b	7046	* @}
AnnaBridge	165:d1b4690b3f8b	7047	*/
AnnaBridge	165:d1b4690b3f8b	7048
AnnaBridge	165:d1b4690b3f8b	7049	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
AnnaBridge	165:d1b4690b3f8b	7050	* @{
AnnaBridge	165:d1b4690b3f8b	7051	*/
AnnaBridge	165:d1b4690b3f8b	7052
AnnaBridge	165:d1b4690b3f8b	7053	/**
AnnaBridge	165:d1b4690b3f8b	7054	* @brief Enable ADC ready.
AnnaBridge	165:d1b4690b3f8b	7055	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
AnnaBridge	165:d1b4690b3f8b	7056	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7057	* @retval None
AnnaBridge	165:d1b4690b3f8b	7058	*/
AnnaBridge	165:d1b4690b3f8b	7059	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7060	{
AnnaBridge	165:d1b4690b3f8b	7061	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	165:d1b4690b3f8b	7062	}
AnnaBridge	165:d1b4690b3f8b	7063
AnnaBridge	165:d1b4690b3f8b	7064	/**
AnnaBridge	165:d1b4690b3f8b	7065	* @brief Enable interruption ADC group regular end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	7066	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
AnnaBridge	165:d1b4690b3f8b	7067	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7068	* @retval None
AnnaBridge	165:d1b4690b3f8b	7069	*/
AnnaBridge	165:d1b4690b3f8b	7070	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7071	{
AnnaBridge	165:d1b4690b3f8b	7072	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	165:d1b4690b3f8b	7073	}
AnnaBridge	165:d1b4690b3f8b	7074
AnnaBridge	165:d1b4690b3f8b	7075	/**
AnnaBridge	165:d1b4690b3f8b	7076	* @brief Enable interruption ADC group regular end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	7077	* @rmtoll IER EOSIE LL_ADC_EnableIT_EOS
AnnaBridge	165:d1b4690b3f8b	7078	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7079	* @retval None
AnnaBridge	165:d1b4690b3f8b	7080	*/
AnnaBridge	165:d1b4690b3f8b	7081	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7082	{
AnnaBridge	165:d1b4690b3f8b	7083	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	165:d1b4690b3f8b	7084	}
AnnaBridge	165:d1b4690b3f8b	7085
AnnaBridge	165:d1b4690b3f8b	7086	/**
AnnaBridge	165:d1b4690b3f8b	7087	* @brief Enable ADC group regular interruption overrun.
AnnaBridge	165:d1b4690b3f8b	7088	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
AnnaBridge	165:d1b4690b3f8b	7089	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7090	* @retval None
AnnaBridge	165:d1b4690b3f8b	7091	*/
AnnaBridge	165:d1b4690b3f8b	7092	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7093	{
AnnaBridge	165:d1b4690b3f8b	7094	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	165:d1b4690b3f8b	7095	}
AnnaBridge	165:d1b4690b3f8b	7096
AnnaBridge	165:d1b4690b3f8b	7097	/**
AnnaBridge	165:d1b4690b3f8b	7098	* @brief Enable interruption ADC group regular end of sampling.
AnnaBridge	165:d1b4690b3f8b	7099	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
AnnaBridge	165:d1b4690b3f8b	7100	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7101	* @retval None
AnnaBridge	165:d1b4690b3f8b	7102	*/
AnnaBridge	165:d1b4690b3f8b	7103	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7104	{
AnnaBridge	165:d1b4690b3f8b	7105	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	165:d1b4690b3f8b	7106	}
AnnaBridge	165:d1b4690b3f8b	7107
AnnaBridge	165:d1b4690b3f8b	7108	/**
AnnaBridge	165:d1b4690b3f8b	7109	* @brief Enable interruption ADC group injected end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	7110	* @rmtoll IER JEOCIE LL_ADC_EnableIT_JEOC
AnnaBridge	165:d1b4690b3f8b	7111	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7112	* @retval None
AnnaBridge	165:d1b4690b3f8b	7113	*/
AnnaBridge	165:d1b4690b3f8b	7114	__STATIC_INLINE void LL_ADC_EnableIT_JEOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7115	{
AnnaBridge	165:d1b4690b3f8b	7116	SET_BIT(ADCx->IER, LL_ADC_IT_JEOC);
AnnaBridge	165:d1b4690b3f8b	7117	}
AnnaBridge	165:d1b4690b3f8b	7118
AnnaBridge	165:d1b4690b3f8b	7119	/**
AnnaBridge	165:d1b4690b3f8b	7120	* @brief Enable interruption ADC group injected end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	7121	* @rmtoll IER JEOSIE LL_ADC_EnableIT_JEOS
AnnaBridge	165:d1b4690b3f8b	7122	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7123	* @retval None
AnnaBridge	165:d1b4690b3f8b	7124	*/
AnnaBridge	165:d1b4690b3f8b	7125	__STATIC_INLINE void LL_ADC_EnableIT_JEOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7126	{
AnnaBridge	165:d1b4690b3f8b	7127	SET_BIT(ADCx->IER, LL_ADC_IT_JEOS);
AnnaBridge	165:d1b4690b3f8b	7128	}
AnnaBridge	165:d1b4690b3f8b	7129
AnnaBridge	165:d1b4690b3f8b	7130	/**
AnnaBridge	165:d1b4690b3f8b	7131	* @brief Enable interruption ADC group injected context queue overflow.
AnnaBridge	165:d1b4690b3f8b	7132	* @rmtoll IER JQOVFIE LL_ADC_EnableIT_JQOVF
AnnaBridge	165:d1b4690b3f8b	7133	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7134	* @retval None
AnnaBridge	165:d1b4690b3f8b	7135	*/
AnnaBridge	165:d1b4690b3f8b	7136	__STATIC_INLINE void LL_ADC_EnableIT_JQOVF(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7137	{
AnnaBridge	165:d1b4690b3f8b	7138	SET_BIT(ADCx->IER, LL_ADC_IT_JQOVF);
AnnaBridge	165:d1b4690b3f8b	7139	}
AnnaBridge	165:d1b4690b3f8b	7140
AnnaBridge	165:d1b4690b3f8b	7141	/**
AnnaBridge	165:d1b4690b3f8b	7142	* @brief Enable interruption ADC analog watchdog 1.
AnnaBridge	165:d1b4690b3f8b	7143	* @rmtoll IER AWD1IE LL_ADC_EnableIT_AWD1
AnnaBridge	165:d1b4690b3f8b	7144	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7145	* @retval None
AnnaBridge	165:d1b4690b3f8b	7146	*/
AnnaBridge	165:d1b4690b3f8b	7147	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7148	{
AnnaBridge	165:d1b4690b3f8b	7149	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	165:d1b4690b3f8b	7150	}
AnnaBridge	165:d1b4690b3f8b	7151
AnnaBridge	165:d1b4690b3f8b	7152	/**
AnnaBridge	165:d1b4690b3f8b	7153	* @brief Enable interruption ADC analog watchdog 2.
AnnaBridge	165:d1b4690b3f8b	7154	* @rmtoll IER AWD2IE LL_ADC_EnableIT_AWD2
AnnaBridge	165:d1b4690b3f8b	7155	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7156	* @retval None
AnnaBridge	165:d1b4690b3f8b	7157	*/
AnnaBridge	165:d1b4690b3f8b	7158	__STATIC_INLINE void LL_ADC_EnableIT_AWD2(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7159	{
AnnaBridge	165:d1b4690b3f8b	7160	SET_BIT(ADCx->IER, LL_ADC_IT_AWD2);
AnnaBridge	165:d1b4690b3f8b	7161	}
AnnaBridge	165:d1b4690b3f8b	7162
AnnaBridge	165:d1b4690b3f8b	7163	/**
AnnaBridge	165:d1b4690b3f8b	7164	* @brief Enable interruption ADC analog watchdog 3.
AnnaBridge	165:d1b4690b3f8b	7165	* @rmtoll IER AWD3IE LL_ADC_EnableIT_AWD3
AnnaBridge	165:d1b4690b3f8b	7166	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7167	* @retval None
AnnaBridge	165:d1b4690b3f8b	7168	*/
AnnaBridge	165:d1b4690b3f8b	7169	__STATIC_INLINE void LL_ADC_EnableIT_AWD3(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7170	{
AnnaBridge	165:d1b4690b3f8b	7171	SET_BIT(ADCx->IER, LL_ADC_IT_AWD3);
AnnaBridge	165:d1b4690b3f8b	7172	}
AnnaBridge	165:d1b4690b3f8b	7173
AnnaBridge	165:d1b4690b3f8b	7174	/**
AnnaBridge	165:d1b4690b3f8b	7175	* @brief Disable interruption ADC ready.
AnnaBridge	165:d1b4690b3f8b	7176	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
AnnaBridge	165:d1b4690b3f8b	7177	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7178	* @retval None
AnnaBridge	165:d1b4690b3f8b	7179	*/
AnnaBridge	165:d1b4690b3f8b	7180	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7181	{
AnnaBridge	165:d1b4690b3f8b	7182	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	165:d1b4690b3f8b	7183	}
AnnaBridge	165:d1b4690b3f8b	7184
AnnaBridge	165:d1b4690b3f8b	7185	/**
AnnaBridge	165:d1b4690b3f8b	7186	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	7187	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
AnnaBridge	165:d1b4690b3f8b	7188	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7189	* @retval None
AnnaBridge	165:d1b4690b3f8b	7190	*/
AnnaBridge	165:d1b4690b3f8b	7191	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7192	{
AnnaBridge	165:d1b4690b3f8b	7193	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	165:d1b4690b3f8b	7194	}
AnnaBridge	165:d1b4690b3f8b	7195
AnnaBridge	165:d1b4690b3f8b	7196	/**
AnnaBridge	165:d1b4690b3f8b	7197	* @brief Disable interruption ADC group regular end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	7198	* @rmtoll IER EOSIE LL_ADC_DisableIT_EOS
AnnaBridge	165:d1b4690b3f8b	7199	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7200	* @retval None
AnnaBridge	165:d1b4690b3f8b	7201	*/
AnnaBridge	165:d1b4690b3f8b	7202	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7203	{
AnnaBridge	165:d1b4690b3f8b	7204	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	165:d1b4690b3f8b	7205	}
AnnaBridge	165:d1b4690b3f8b	7206
AnnaBridge	165:d1b4690b3f8b	7207	/**
AnnaBridge	165:d1b4690b3f8b	7208	* @brief Disable interruption ADC group regular overrun.
AnnaBridge	165:d1b4690b3f8b	7209	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
AnnaBridge	165:d1b4690b3f8b	7210	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7211	* @retval None
AnnaBridge	165:d1b4690b3f8b	7212	*/
AnnaBridge	165:d1b4690b3f8b	7213	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7214	{
AnnaBridge	165:d1b4690b3f8b	7215	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	165:d1b4690b3f8b	7216	}
AnnaBridge	165:d1b4690b3f8b	7217
AnnaBridge	165:d1b4690b3f8b	7218	/**
AnnaBridge	165:d1b4690b3f8b	7219	* @brief Disable interruption ADC group regular end of sampling.
AnnaBridge	165:d1b4690b3f8b	7220	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
AnnaBridge	165:d1b4690b3f8b	7221	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7222	* @retval None
AnnaBridge	165:d1b4690b3f8b	7223	*/
AnnaBridge	165:d1b4690b3f8b	7224	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7225	{
AnnaBridge	165:d1b4690b3f8b	7226	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	165:d1b4690b3f8b	7227	}
AnnaBridge	165:d1b4690b3f8b	7228
AnnaBridge	165:d1b4690b3f8b	7229	/**
AnnaBridge	165:d1b4690b3f8b	7230	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	165:d1b4690b3f8b	7231	* @rmtoll IER JEOCIE LL_ADC_DisableIT_JEOC
AnnaBridge	165:d1b4690b3f8b	7232	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7233	* @retval None
AnnaBridge	165:d1b4690b3f8b	7234	*/
AnnaBridge	165:d1b4690b3f8b	7235	__STATIC_INLINE void LL_ADC_DisableIT_JEOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7236	{
AnnaBridge	165:d1b4690b3f8b	7237	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOC);
AnnaBridge	165:d1b4690b3f8b	7238	}
AnnaBridge	165:d1b4690b3f8b	7239
AnnaBridge	165:d1b4690b3f8b	7240	/**
AnnaBridge	165:d1b4690b3f8b	7241	* @brief Disable interruption ADC group injected end of sequence conversions.
AnnaBridge	165:d1b4690b3f8b	7242	* @rmtoll IER JEOSIE LL_ADC_DisableIT_JEOS
AnnaBridge	165:d1b4690b3f8b	7243	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7244	* @retval None
AnnaBridge	165:d1b4690b3f8b	7245	*/
AnnaBridge	165:d1b4690b3f8b	7246	__STATIC_INLINE void LL_ADC_DisableIT_JEOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7247	{
AnnaBridge	165:d1b4690b3f8b	7248	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOS);
AnnaBridge	165:d1b4690b3f8b	7249	}
AnnaBridge	165:d1b4690b3f8b	7250
AnnaBridge	165:d1b4690b3f8b	7251	/**
AnnaBridge	165:d1b4690b3f8b	7252	* @brief Disable interruption ADC group injected context queue overflow.
AnnaBridge	165:d1b4690b3f8b	7253	* @rmtoll IER JQOVFIE LL_ADC_DisableIT_JQOVF
AnnaBridge	165:d1b4690b3f8b	7254	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7255	* @retval None
AnnaBridge	165:d1b4690b3f8b	7256	*/
AnnaBridge	165:d1b4690b3f8b	7257	__STATIC_INLINE void LL_ADC_DisableIT_JQOVF(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7258	{
AnnaBridge	165:d1b4690b3f8b	7259	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JQOVF);
AnnaBridge	165:d1b4690b3f8b	7260	}
AnnaBridge	165:d1b4690b3f8b	7261
AnnaBridge	165:d1b4690b3f8b	7262	/**
AnnaBridge	165:d1b4690b3f8b	7263	* @brief Disable interruption ADC analog watchdog 1.
AnnaBridge	165:d1b4690b3f8b	7264	* @rmtoll IER AWD1IE LL_ADC_DisableIT_AWD1
AnnaBridge	165:d1b4690b3f8b	7265	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7266	* @retval None
AnnaBridge	165:d1b4690b3f8b	7267	*/
AnnaBridge	165:d1b4690b3f8b	7268	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7269	{
AnnaBridge	165:d1b4690b3f8b	7270	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	165:d1b4690b3f8b	7271	}
AnnaBridge	165:d1b4690b3f8b	7272
AnnaBridge	165:d1b4690b3f8b	7273	/**
AnnaBridge	165:d1b4690b3f8b	7274	* @brief Disable interruption ADC analog watchdog 2.
AnnaBridge	165:d1b4690b3f8b	7275	* @rmtoll IER AWD2IE LL_ADC_DisableIT_AWD2
AnnaBridge	165:d1b4690b3f8b	7276	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7277	* @retval None
AnnaBridge	165:d1b4690b3f8b	7278	*/
AnnaBridge	165:d1b4690b3f8b	7279	__STATIC_INLINE void LL_ADC_DisableIT_AWD2(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7280	{
AnnaBridge	165:d1b4690b3f8b	7281	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD2);
AnnaBridge	165:d1b4690b3f8b	7282	}
AnnaBridge	165:d1b4690b3f8b	7283
AnnaBridge	165:d1b4690b3f8b	7284	/**
AnnaBridge	165:d1b4690b3f8b	7285	* @brief Disable interruption ADC analog watchdog 3.
AnnaBridge	165:d1b4690b3f8b	7286	* @rmtoll IER AWD3IE LL_ADC_DisableIT_AWD3
AnnaBridge	165:d1b4690b3f8b	7287	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7288	* @retval None
AnnaBridge	165:d1b4690b3f8b	7289	*/
AnnaBridge	165:d1b4690b3f8b	7290	__STATIC_INLINE void LL_ADC_DisableIT_AWD3(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7291	{
AnnaBridge	165:d1b4690b3f8b	7292	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD3);
AnnaBridge	165:d1b4690b3f8b	7293	}
AnnaBridge	165:d1b4690b3f8b	7294
AnnaBridge	165:d1b4690b3f8b	7295	/**
AnnaBridge	165:d1b4690b3f8b	7296	* @brief Get state of interruption ADC ready
AnnaBridge	165:d1b4690b3f8b	7297	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7298	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
AnnaBridge	165:d1b4690b3f8b	7299	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7300	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7301	*/
AnnaBridge	165:d1b4690b3f8b	7302	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7303	{
AnnaBridge	165:d1b4690b3f8b	7304	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
AnnaBridge	165:d1b4690b3f8b	7305	}
AnnaBridge	165:d1b4690b3f8b	7306
AnnaBridge	165:d1b4690b3f8b	7307	/**
AnnaBridge	165:d1b4690b3f8b	7308	* @brief Get state of interruption ADC group regular end of unitary conversion
AnnaBridge	165:d1b4690b3f8b	7309	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7310	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
AnnaBridge	165:d1b4690b3f8b	7311	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7312	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7313	*/
AnnaBridge	165:d1b4690b3f8b	7314	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7315	{
AnnaBridge	165:d1b4690b3f8b	7316	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
AnnaBridge	165:d1b4690b3f8b	7317	}
AnnaBridge	165:d1b4690b3f8b	7318
AnnaBridge	165:d1b4690b3f8b	7319	/**
AnnaBridge	165:d1b4690b3f8b	7320	* @brief Get state of interruption ADC group regular end of sequence conversions
AnnaBridge	165:d1b4690b3f8b	7321	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7322	* @rmtoll IER EOSIE LL_ADC_IsEnabledIT_EOS
AnnaBridge	165:d1b4690b3f8b	7323	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7324	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7325	*/
AnnaBridge	165:d1b4690b3f8b	7326	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7327	{
AnnaBridge	165:d1b4690b3f8b	7328	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
AnnaBridge	165:d1b4690b3f8b	7329	}
AnnaBridge	165:d1b4690b3f8b	7330
AnnaBridge	165:d1b4690b3f8b	7331	/**
AnnaBridge	165:d1b4690b3f8b	7332	* @brief Get state of interruption ADC group regular overrun
AnnaBridge	165:d1b4690b3f8b	7333	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7334	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
AnnaBridge	165:d1b4690b3f8b	7335	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7336	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7337	*/
AnnaBridge	165:d1b4690b3f8b	7338	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7339	{
AnnaBridge	165:d1b4690b3f8b	7340	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
AnnaBridge	165:d1b4690b3f8b	7341	}
AnnaBridge	165:d1b4690b3f8b	7342
AnnaBridge	165:d1b4690b3f8b	7343	/**
AnnaBridge	165:d1b4690b3f8b	7344	* @brief Get state of interruption ADC group regular end of sampling
AnnaBridge	165:d1b4690b3f8b	7345	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7346	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
AnnaBridge	165:d1b4690b3f8b	7347	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7348	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7349	*/
AnnaBridge	165:d1b4690b3f8b	7350	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7351	{
AnnaBridge	165:d1b4690b3f8b	7352	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
AnnaBridge	165:d1b4690b3f8b	7353	}
AnnaBridge	165:d1b4690b3f8b	7354
AnnaBridge	165:d1b4690b3f8b	7355	/**
AnnaBridge	165:d1b4690b3f8b	7356	* @brief Get state of interruption ADC group injected end of unitary conversion
AnnaBridge	165:d1b4690b3f8b	7357	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7358	* @rmtoll IER JEOCIE LL_ADC_IsEnabledIT_JEOC
AnnaBridge	165:d1b4690b3f8b	7359	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7360	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7361	*/
AnnaBridge	165:d1b4690b3f8b	7362	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JEOC(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7363	{
AnnaBridge	165:d1b4690b3f8b	7364	return (READ_BIT(ADCx->IER, LL_ADC_IT_JEOC) == (LL_ADC_IT_JEOC));
AnnaBridge	165:d1b4690b3f8b	7365	}
AnnaBridge	165:d1b4690b3f8b	7366
AnnaBridge	165:d1b4690b3f8b	7367	/**
AnnaBridge	165:d1b4690b3f8b	7368	* @brief Get state of interruption ADC group injected end of sequence conversions
AnnaBridge	165:d1b4690b3f8b	7369	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7370	* @rmtoll IER JEOSIE LL_ADC_IsEnabledIT_JEOS
AnnaBridge	165:d1b4690b3f8b	7371	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7372	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7373	*/
AnnaBridge	165:d1b4690b3f8b	7374	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JEOS(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7375	{
AnnaBridge	165:d1b4690b3f8b	7376	return (READ_BIT(ADCx->IER, LL_ADC_IT_JEOS) == (LL_ADC_IT_JEOS));
AnnaBridge	165:d1b4690b3f8b	7377	}
AnnaBridge	165:d1b4690b3f8b	7378
AnnaBridge	165:d1b4690b3f8b	7379	/**
AnnaBridge	165:d1b4690b3f8b	7380	* @brief Get state of interruption ADC group injected context queue overflow interrupt state
AnnaBridge	165:d1b4690b3f8b	7381	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7382	* @rmtoll IER JQOVFIE LL_ADC_IsEnabledIT_JQOVF
AnnaBridge	165:d1b4690b3f8b	7383	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7384	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7385	*/
AnnaBridge	165:d1b4690b3f8b	7386	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JQOVF(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7387	{
AnnaBridge	165:d1b4690b3f8b	7388	return (READ_BIT(ADCx->IER, LL_ADC_IT_JQOVF) == (LL_ADC_IT_JQOVF));
AnnaBridge	165:d1b4690b3f8b	7389	}
AnnaBridge	165:d1b4690b3f8b	7390
AnnaBridge	165:d1b4690b3f8b	7391	/**
AnnaBridge	165:d1b4690b3f8b	7392	* @brief Get state of interruption ADC analog watchdog 1
AnnaBridge	165:d1b4690b3f8b	7393	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7394	* @rmtoll IER AWD1IE LL_ADC_IsEnabledIT_AWD1
AnnaBridge	165:d1b4690b3f8b	7395	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7396	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7397	*/
AnnaBridge	165:d1b4690b3f8b	7398	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7399	{
AnnaBridge	165:d1b4690b3f8b	7400	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
AnnaBridge	165:d1b4690b3f8b	7401	}
AnnaBridge	165:d1b4690b3f8b	7402
AnnaBridge	165:d1b4690b3f8b	7403	/**
AnnaBridge	165:d1b4690b3f8b	7404	* @brief Get state of interruption Get ADC analog watchdog 2
AnnaBridge	165:d1b4690b3f8b	7405	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7406	* @rmtoll IER AWD2IE LL_ADC_IsEnabledIT_AWD2
AnnaBridge	165:d1b4690b3f8b	7407	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7408	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7409	*/
AnnaBridge	165:d1b4690b3f8b	7410	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD2(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7411	{
AnnaBridge	165:d1b4690b3f8b	7412	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD2) == (LL_ADC_IT_AWD2));
AnnaBridge	165:d1b4690b3f8b	7413	}
AnnaBridge	165:d1b4690b3f8b	7414
AnnaBridge	165:d1b4690b3f8b	7415	/**
AnnaBridge	165:d1b4690b3f8b	7416	* @brief Get state of interruption Get ADC analog watchdog 3
AnnaBridge	165:d1b4690b3f8b	7417	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	165:d1b4690b3f8b	7418	* @rmtoll IER AWD3IE LL_ADC_IsEnabledIT_AWD3
AnnaBridge	165:d1b4690b3f8b	7419	* @param ADCx ADC instance
AnnaBridge	165:d1b4690b3f8b	7420	* @retval State of bit (1 or 0).
AnnaBridge	165:d1b4690b3f8b	7421	*/
AnnaBridge	165:d1b4690b3f8b	7422	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD3(ADC_TypeDef *ADCx)
AnnaBridge	165:d1b4690b3f8b	7423	{
AnnaBridge	165:d1b4690b3f8b	7424	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD3) == (LL_ADC_IT_AWD3));
AnnaBridge	165:d1b4690b3f8b	7425	}
AnnaBridge	165:d1b4690b3f8b	7426
AnnaBridge	165:d1b4690b3f8b	7427	/**
AnnaBridge	165:d1b4690b3f8b	7428	* @}
AnnaBridge	165:d1b4690b3f8b	7429	*/
AnnaBridge	165:d1b4690b3f8b	7430
AnnaBridge	165:d1b4690b3f8b	7431	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	165:d1b4690b3f8b	7432	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	165:d1b4690b3f8b	7433	* @{
AnnaBridge	165:d1b4690b3f8b	7434	*/
AnnaBridge	165:d1b4690b3f8b	7435
AnnaBridge	165:d1b4690b3f8b	7436	/* Initialization of some features of ADC common parameters and multimode */
AnnaBridge	165:d1b4690b3f8b	7437	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
AnnaBridge	165:d1b4690b3f8b	7438	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct);
AnnaBridge	165:d1b4690b3f8b	7439	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
AnnaBridge	165:d1b4690b3f8b	7440
AnnaBridge	165:d1b4690b3f8b	7441	/* De-initialization of ADC instance, ADC group regular and ADC group injected */
AnnaBridge	165:d1b4690b3f8b	7442	/* (availability of ADC group injected depends on STM32 families) */
AnnaBridge	165:d1b4690b3f8b	7443	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
AnnaBridge	165:d1b4690b3f8b	7444
AnnaBridge	165:d1b4690b3f8b	7445	/* Initialization of some features of ADC instance */
AnnaBridge	165:d1b4690b3f8b	7446	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7447	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7448
AnnaBridge	165:d1b4690b3f8b	7449	/* Initialization of some features of ADC instance and ADC group regular */
AnnaBridge	165:d1b4690b3f8b	7450	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7451	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7452
AnnaBridge	165:d1b4690b3f8b	7453	/* Initialization of some features of ADC instance and ADC group injected */
AnnaBridge	165:d1b4690b3f8b	7454	ErrorStatus LL_ADC_INJ_Init(ADC_TypeDef ADCx, LL_ADC_INJ_InitTypeDef ADC_INJ_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7455	void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct);
AnnaBridge	165:d1b4690b3f8b	7456
AnnaBridge	165:d1b4690b3f8b	7457	/**
AnnaBridge	165:d1b4690b3f8b	7458	* @}
AnnaBridge	165:d1b4690b3f8b	7459	*/
AnnaBridge	165:d1b4690b3f8b	7460	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	165:d1b4690b3f8b	7461
AnnaBridge	165:d1b4690b3f8b	7462	/**
AnnaBridge	165:d1b4690b3f8b	7463	* @}
AnnaBridge	165:d1b4690b3f8b	7464	*/
AnnaBridge	165:d1b4690b3f8b	7465
AnnaBridge	165:d1b4690b3f8b	7466	/**
AnnaBridge	165:d1b4690b3f8b	7467	* @}
AnnaBridge	165:d1b4690b3f8b	7468	*/
AnnaBridge	165:d1b4690b3f8b	7469
AnnaBridge	165:d1b4690b3f8b	7470	#endif /* ADC1 \|\| ADC2 \|\| ADC3 */
AnnaBridge	165:d1b4690b3f8b	7471
AnnaBridge	165:d1b4690b3f8b	7472	/**
AnnaBridge	165:d1b4690b3f8b	7473	* @}
AnnaBridge	165:d1b4690b3f8b	7474	*/
AnnaBridge	165:d1b4690b3f8b	7475
AnnaBridge	165:d1b4690b3f8b	7476	#ifdef __cplusplus
AnnaBridge	165:d1b4690b3f8b	7477	}
AnnaBridge	165:d1b4690b3f8b	7478	#endif
AnnaBridge	165:d1b4690b3f8b	7479
AnnaBridge	165:d1b4690b3f8b	7480	#endif /* __STM32L4xx_LL_ADC_H */
AnnaBridge	165:d1b4690b3f8b	7481
AnnaBridge	165:d1b4690b3f8b	7482	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/