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TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_IAR/stm32l4xx_hal_lcd.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_L496AG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_lcd.h@165:d1b4690b3f8b 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /**
AnnaBridge 165:d1b4690b3f8b 2 ******************************************************************************
AnnaBridge 165:d1b4690b3f8b 3 * @file stm32l4xx_hal_lcd.h
AnnaBridge 165:d1b4690b3f8b 4 * @author MCD Application Team
AnnaBridge 165:d1b4690b3f8b 5 * @brief Header file of LCD Controller HAL module.
AnnaBridge 165:d1b4690b3f8b 6 ******************************************************************************
AnnaBridge 165:d1b4690b3f8b 7 * @attention
AnnaBridge 165:d1b4690b3f8b 8 *
AnnaBridge 165:d1b4690b3f8b 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 165:d1b4690b3f8b 10 *
AnnaBridge 165:d1b4690b3f8b 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 165:d1b4690b3f8b 12 * are permitted provided that the following conditions are met:
AnnaBridge 165:d1b4690b3f8b 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 165:d1b4690b3f8b 14 * this list of conditions and the following disclaimer.
AnnaBridge 165:d1b4690b3f8b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 165:d1b4690b3f8b 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 165:d1b4690b3f8b 17 * and/or other materials provided with the distribution.
AnnaBridge 165:d1b4690b3f8b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 165:d1b4690b3f8b 19 * may be used to endorse or promote products derived from this software
AnnaBridge 165:d1b4690b3f8b 20 * without specific prior written permission.
AnnaBridge 165:d1b4690b3f8b 21 *
AnnaBridge 165:d1b4690b3f8b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 165:d1b4690b3f8b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 165:d1b4690b3f8b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 165:d1b4690b3f8b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 165:d1b4690b3f8b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 165:d1b4690b3f8b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 165:d1b4690b3f8b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 165:d1b4690b3f8b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 165:d1b4690b3f8b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 165:d1b4690b3f8b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 165:d1b4690b3f8b 32 *
AnnaBridge 165:d1b4690b3f8b 33 ******************************************************************************
AnnaBridge 165:d1b4690b3f8b 34 */
AnnaBridge 165:d1b4690b3f8b 35
AnnaBridge 165:d1b4690b3f8b 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 37 #ifndef __STM32L4xx_HAL_LCD_H
AnnaBridge 165:d1b4690b3f8b 38 #define __STM32L4xx_HAL_LCD_H
AnnaBridge 165:d1b4690b3f8b 39
AnnaBridge 165:d1b4690b3f8b 40 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 41 extern "C" {
AnnaBridge 165:d1b4690b3f8b 42 #endif
AnnaBridge 165:d1b4690b3f8b 43
AnnaBridge 165:d1b4690b3f8b 44 #if defined(STM32L433xx) || defined(STM32L443xx) || defined(STM32L476xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx)
AnnaBridge 165:d1b4690b3f8b 45
AnnaBridge 165:d1b4690b3f8b 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 47 #include "stm32l4xx_hal_def.h"
AnnaBridge 165:d1b4690b3f8b 48
AnnaBridge 165:d1b4690b3f8b 49 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 165:d1b4690b3f8b 50 * @{
AnnaBridge 165:d1b4690b3f8b 51 */
AnnaBridge 165:d1b4690b3f8b 52
AnnaBridge 165:d1b4690b3f8b 53 /** @addtogroup LCD
AnnaBridge 165:d1b4690b3f8b 54 * @{
AnnaBridge 165:d1b4690b3f8b 55 */
AnnaBridge 165:d1b4690b3f8b 56
AnnaBridge 165:d1b4690b3f8b 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 58 /** @defgroup LCD_Exported_Types LCD Exported Types
AnnaBridge 165:d1b4690b3f8b 59 * @{
AnnaBridge 165:d1b4690b3f8b 60 */
AnnaBridge 165:d1b4690b3f8b 61
AnnaBridge 165:d1b4690b3f8b 62 /**
AnnaBridge 165:d1b4690b3f8b 63 * @brief LCD Init structure definition
AnnaBridge 165:d1b4690b3f8b 64 */
AnnaBridge 165:d1b4690b3f8b 65
AnnaBridge 165:d1b4690b3f8b 66 typedef struct
AnnaBridge 165:d1b4690b3f8b 67 {
AnnaBridge 165:d1b4690b3f8b 68 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
AnnaBridge 165:d1b4690b3f8b 69 This parameter can be one value of @ref LCD_Prescaler */
AnnaBridge 165:d1b4690b3f8b 70 uint32_t Divider; /*!< Configures the LCD Divider.
AnnaBridge 165:d1b4690b3f8b 71 This parameter can be one value of @ref LCD_Divider */
AnnaBridge 165:d1b4690b3f8b 72 uint32_t Duty; /*!< Configures the LCD Duty.
AnnaBridge 165:d1b4690b3f8b 73 This parameter can be one value of @ref LCD_Duty */
AnnaBridge 165:d1b4690b3f8b 74 uint32_t Bias; /*!< Configures the LCD Bias.
AnnaBridge 165:d1b4690b3f8b 75 This parameter can be one value of @ref LCD_Bias */
AnnaBridge 165:d1b4690b3f8b 76 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
AnnaBridge 165:d1b4690b3f8b 77 This parameter can be one value of @ref LCD_Voltage_Source */
AnnaBridge 165:d1b4690b3f8b 78 uint32_t Contrast; /*!< Configures the LCD Contrast.
AnnaBridge 165:d1b4690b3f8b 79 This parameter can be one value of @ref LCD_Contrast */
AnnaBridge 165:d1b4690b3f8b 80 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
AnnaBridge 165:d1b4690b3f8b 81 This parameter can be one value of @ref LCD_DeadTime */
AnnaBridge 165:d1b4690b3f8b 82 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
AnnaBridge 165:d1b4690b3f8b 83 This parameter can be one value of @ref LCD_PulseOnDuration */
AnnaBridge 165:d1b4690b3f8b 84 uint32_t HighDrive; /*!< Enable or disable the low resistance divider.
AnnaBridge 165:d1b4690b3f8b 85 This parameter can be one value of @ref LCD_HighDrive */
AnnaBridge 165:d1b4690b3f8b 86 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
AnnaBridge 165:d1b4690b3f8b 87 This parameter can be one value of @ref LCD_BlinkMode */
AnnaBridge 165:d1b4690b3f8b 88 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
AnnaBridge 165:d1b4690b3f8b 89 This parameter can be one value of @ref LCD_BlinkFrequency */
AnnaBridge 165:d1b4690b3f8b 90 uint32_t MuxSegment; /*!< Enable or disable mux segment.
AnnaBridge 165:d1b4690b3f8b 91 This parameter can be one value of @ref LCD_MuxSegment */
AnnaBridge 165:d1b4690b3f8b 92 } LCD_InitTypeDef;
AnnaBridge 165:d1b4690b3f8b 93
AnnaBridge 165:d1b4690b3f8b 94 /**
AnnaBridge 165:d1b4690b3f8b 95 * @brief HAL LCD State structures definition
AnnaBridge 165:d1b4690b3f8b 96 */
AnnaBridge 165:d1b4690b3f8b 97 typedef enum
AnnaBridge 165:d1b4690b3f8b 98 {
AnnaBridge 165:d1b4690b3f8b 99 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
AnnaBridge 165:d1b4690b3f8b 100 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
AnnaBridge 165:d1b4690b3f8b 101 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
AnnaBridge 165:d1b4690b3f8b 102 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */
AnnaBridge 165:d1b4690b3f8b 103 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */
AnnaBridge 165:d1b4690b3f8b 104 } HAL_LCD_StateTypeDef;
AnnaBridge 165:d1b4690b3f8b 105
AnnaBridge 165:d1b4690b3f8b 106 /**
AnnaBridge 165:d1b4690b3f8b 107 * @brief UART handle Structure definition
AnnaBridge 165:d1b4690b3f8b 108 */
AnnaBridge 165:d1b4690b3f8b 109 typedef struct
AnnaBridge 165:d1b4690b3f8b 110 {
AnnaBridge 165:d1b4690b3f8b 111 LCD_TypeDef *Instance; /* LCD registers base address */
AnnaBridge 165:d1b4690b3f8b 112
AnnaBridge 165:d1b4690b3f8b 113 LCD_InitTypeDef Init; /* LCD communication parameters */
AnnaBridge 165:d1b4690b3f8b 114
AnnaBridge 165:d1b4690b3f8b 115 HAL_LockTypeDef Lock; /* Locking object */
AnnaBridge 165:d1b4690b3f8b 116
AnnaBridge 165:d1b4690b3f8b 117 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
AnnaBridge 165:d1b4690b3f8b 118
AnnaBridge 165:d1b4690b3f8b 119 __IO uint32_t ErrorCode; /* LCD Error code */
AnnaBridge 165:d1b4690b3f8b 120
AnnaBridge 165:d1b4690b3f8b 121 }LCD_HandleTypeDef;
AnnaBridge 165:d1b4690b3f8b 122 /**
AnnaBridge 165:d1b4690b3f8b 123 * @}
AnnaBridge 165:d1b4690b3f8b 124 */
AnnaBridge 165:d1b4690b3f8b 125
AnnaBridge 165:d1b4690b3f8b 126 /* Exported constants --------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 127 /** @defgroup LCD_Exported_Constants LCD Exported Constants
AnnaBridge 165:d1b4690b3f8b 128 * @{
AnnaBridge 165:d1b4690b3f8b 129 */
AnnaBridge 165:d1b4690b3f8b 130
AnnaBridge 165:d1b4690b3f8b 131 /** @defgroup LCD_ErrorCode LCD Error Code
AnnaBridge 165:d1b4690b3f8b 132 * @{
AnnaBridge 165:d1b4690b3f8b 133 */
AnnaBridge 165:d1b4690b3f8b 134 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00) /*!< No error */
AnnaBridge 165:d1b4690b3f8b 135 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01) /*!< Synchro flag timeout error */
AnnaBridge 165:d1b4690b3f8b 136 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02) /*!< Update display request flag timeout error */
AnnaBridge 165:d1b4690b3f8b 137 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04) /*!< Update display done flag timeout error */
AnnaBridge 165:d1b4690b3f8b 138 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08) /*!< LCD enabled status flag timeout error */
AnnaBridge 165:d1b4690b3f8b 139 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10) /*!< LCD Booster ready timeout error */
AnnaBridge 165:d1b4690b3f8b 140 /**
AnnaBridge 165:d1b4690b3f8b 141 * @}
AnnaBridge 165:d1b4690b3f8b 142 */
AnnaBridge 165:d1b4690b3f8b 143
AnnaBridge 165:d1b4690b3f8b 144 /** @defgroup LCD_Prescaler LCD Prescaler
AnnaBridge 165:d1b4690b3f8b 145 * @{
AnnaBridge 165:d1b4690b3f8b 146 */
AnnaBridge 165:d1b4690b3f8b 147 #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
AnnaBridge 165:d1b4690b3f8b 148 #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
AnnaBridge 165:d1b4690b3f8b 149 #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
AnnaBridge 165:d1b4690b3f8b 150 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
AnnaBridge 165:d1b4690b3f8b 151 #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
AnnaBridge 165:d1b4690b3f8b 152 #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
AnnaBridge 165:d1b4690b3f8b 153 #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
AnnaBridge 165:d1b4690b3f8b 154 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
AnnaBridge 165:d1b4690b3f8b 155 #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
AnnaBridge 165:d1b4690b3f8b 156 #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
AnnaBridge 165:d1b4690b3f8b 157 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
AnnaBridge 165:d1b4690b3f8b 158 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
AnnaBridge 165:d1b4690b3f8b 159 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
AnnaBridge 165:d1b4690b3f8b 160 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
AnnaBridge 165:d1b4690b3f8b 161 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
AnnaBridge 165:d1b4690b3f8b 162 #define LCD_PRESCALER_32768 ((uint32_t)0x03C00000) /*!< CLKPS = LCDCLK/32768 */
AnnaBridge 165:d1b4690b3f8b 163 /**
AnnaBridge 165:d1b4690b3f8b 164 * @}
AnnaBridge 165:d1b4690b3f8b 165 */
AnnaBridge 165:d1b4690b3f8b 166
AnnaBridge 165:d1b4690b3f8b 167 /** @defgroup LCD_Divider LCD Divider
AnnaBridge 165:d1b4690b3f8b 168 * @{
AnnaBridge 165:d1b4690b3f8b 169 */
AnnaBridge 165:d1b4690b3f8b 170 #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
AnnaBridge 165:d1b4690b3f8b 171 #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
AnnaBridge 165:d1b4690b3f8b 172 #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
AnnaBridge 165:d1b4690b3f8b 173 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
AnnaBridge 165:d1b4690b3f8b 174 #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
AnnaBridge 165:d1b4690b3f8b 175 #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
AnnaBridge 165:d1b4690b3f8b 176 #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
AnnaBridge 165:d1b4690b3f8b 177 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
AnnaBridge 165:d1b4690b3f8b 178 #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
AnnaBridge 165:d1b4690b3f8b 179 #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
AnnaBridge 165:d1b4690b3f8b 180 #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
AnnaBridge 165:d1b4690b3f8b 181 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
AnnaBridge 165:d1b4690b3f8b 182 #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
AnnaBridge 165:d1b4690b3f8b 183 #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
AnnaBridge 165:d1b4690b3f8b 184 #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
AnnaBridge 165:d1b4690b3f8b 185 #define LCD_DIVIDER_31 ((uint32_t)0x003C0000) /*!< LCD frequency = CLKPS/31 */
AnnaBridge 165:d1b4690b3f8b 186 /**
AnnaBridge 165:d1b4690b3f8b 187 * @}
AnnaBridge 165:d1b4690b3f8b 188 */
AnnaBridge 165:d1b4690b3f8b 189
AnnaBridge 165:d1b4690b3f8b 190
AnnaBridge 165:d1b4690b3f8b 191 /** @defgroup LCD_Duty LCD Duty
AnnaBridge 165:d1b4690b3f8b 192 * @{
AnnaBridge 165:d1b4690b3f8b 193 */
AnnaBridge 165:d1b4690b3f8b 194 #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */
AnnaBridge 165:d1b4690b3f8b 195 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
AnnaBridge 165:d1b4690b3f8b 196 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
AnnaBridge 165:d1b4690b3f8b 197 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
AnnaBridge 165:d1b4690b3f8b 198 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
AnnaBridge 165:d1b4690b3f8b 199 /**
AnnaBridge 165:d1b4690b3f8b 200 * @}
AnnaBridge 165:d1b4690b3f8b 201 */
AnnaBridge 165:d1b4690b3f8b 202
AnnaBridge 165:d1b4690b3f8b 203
AnnaBridge 165:d1b4690b3f8b 204 /** @defgroup LCD_Bias LCD Bias
AnnaBridge 165:d1b4690b3f8b 205 * @{
AnnaBridge 165:d1b4690b3f8b 206 */
AnnaBridge 165:d1b4690b3f8b 207 #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
AnnaBridge 165:d1b4690b3f8b 208 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
AnnaBridge 165:d1b4690b3f8b 209 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
AnnaBridge 165:d1b4690b3f8b 210 /**
AnnaBridge 165:d1b4690b3f8b 211 * @}
AnnaBridge 165:d1b4690b3f8b 212 */
AnnaBridge 165:d1b4690b3f8b 213
AnnaBridge 165:d1b4690b3f8b 214 /** @defgroup LCD_Voltage_Source LCD Voltage Source
AnnaBridge 165:d1b4690b3f8b 215 * @{
AnnaBridge 165:d1b4690b3f8b 216 */
AnnaBridge 165:d1b4690b3f8b 217 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
AnnaBridge 165:d1b4690b3f8b 218 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
AnnaBridge 165:d1b4690b3f8b 219 /**
AnnaBridge 165:d1b4690b3f8b 220 * @}
AnnaBridge 165:d1b4690b3f8b 221 */
AnnaBridge 165:d1b4690b3f8b 222
AnnaBridge 165:d1b4690b3f8b 223 /** @defgroup LCD_Interrupts LCD Interrupts
AnnaBridge 165:d1b4690b3f8b 224 * @{
AnnaBridge 165:d1b4690b3f8b 225 */
AnnaBridge 165:d1b4690b3f8b 226 #define LCD_IT_SOF LCD_FCR_SOFIE
AnnaBridge 165:d1b4690b3f8b 227 #define LCD_IT_UDD LCD_FCR_UDDIE
AnnaBridge 165:d1b4690b3f8b 228 /**
AnnaBridge 165:d1b4690b3f8b 229 * @}
AnnaBridge 165:d1b4690b3f8b 230 */
AnnaBridge 165:d1b4690b3f8b 231
AnnaBridge 165:d1b4690b3f8b 232 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
AnnaBridge 165:d1b4690b3f8b 233 * @{
AnnaBridge 165:d1b4690b3f8b 234 */
AnnaBridge 165:d1b4690b3f8b 235 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
AnnaBridge 165:d1b4690b3f8b 236 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
AnnaBridge 165:d1b4690b3f8b 237 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
AnnaBridge 165:d1b4690b3f8b 238 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
AnnaBridge 165:d1b4690b3f8b 239 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
AnnaBridge 165:d1b4690b3f8b 240 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
AnnaBridge 165:d1b4690b3f8b 241 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
AnnaBridge 165:d1b4690b3f8b 242 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
AnnaBridge 165:d1b4690b3f8b 243 /**
AnnaBridge 165:d1b4690b3f8b 244 * @}
AnnaBridge 165:d1b4690b3f8b 245 */
AnnaBridge 165:d1b4690b3f8b 246
AnnaBridge 165:d1b4690b3f8b 247
AnnaBridge 165:d1b4690b3f8b 248 /** @defgroup LCD_DeadTime LCD Dead Time
AnnaBridge 165:d1b4690b3f8b 249 * @{
AnnaBridge 165:d1b4690b3f8b 250 */
AnnaBridge 165:d1b4690b3f8b 251 #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */
AnnaBridge 165:d1b4690b3f8b 252 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 253 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 254 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 255 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 256 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 257 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 258 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
AnnaBridge 165:d1b4690b3f8b 259 /**
AnnaBridge 165:d1b4690b3f8b 260 * @}
AnnaBridge 165:d1b4690b3f8b 261 */
AnnaBridge 165:d1b4690b3f8b 262
AnnaBridge 165:d1b4690b3f8b 263 /** @defgroup LCD_BlinkMode LCD Blink Mode
AnnaBridge 165:d1b4690b3f8b 264 * @{
AnnaBridge 165:d1b4690b3f8b 265 */
AnnaBridge 165:d1b4690b3f8b 266 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */
AnnaBridge 165:d1b4690b3f8b 267 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
AnnaBridge 165:d1b4690b3f8b 268 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
AnnaBridge 165:d1b4690b3f8b 269 8 pixels according to the programmed duty) */
AnnaBridge 165:d1b4690b3f8b 270 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
AnnaBridge 165:d1b4690b3f8b 271 /**
AnnaBridge 165:d1b4690b3f8b 272 * @}
AnnaBridge 165:d1b4690b3f8b 273 */
AnnaBridge 165:d1b4690b3f8b 274
AnnaBridge 165:d1b4690b3f8b 275 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
AnnaBridge 165:d1b4690b3f8b 276 * @{
AnnaBridge 165:d1b4690b3f8b 277 */
AnnaBridge 165:d1b4690b3f8b 278 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
AnnaBridge 165:d1b4690b3f8b 279 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
AnnaBridge 165:d1b4690b3f8b 280 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
AnnaBridge 165:d1b4690b3f8b 281 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
AnnaBridge 165:d1b4690b3f8b 282 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
AnnaBridge 165:d1b4690b3f8b 283 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
AnnaBridge 165:d1b4690b3f8b 284 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
AnnaBridge 165:d1b4690b3f8b 285 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
AnnaBridge 165:d1b4690b3f8b 286 /**
AnnaBridge 165:d1b4690b3f8b 287 * @}
AnnaBridge 165:d1b4690b3f8b 288 */
AnnaBridge 165:d1b4690b3f8b 289
AnnaBridge 165:d1b4690b3f8b 290 /** @defgroup LCD_Contrast LCD Contrast
AnnaBridge 165:d1b4690b3f8b 291 * @{
AnnaBridge 165:d1b4690b3f8b 292 */
AnnaBridge 165:d1b4690b3f8b 293 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
AnnaBridge 165:d1b4690b3f8b 294 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
AnnaBridge 165:d1b4690b3f8b 295 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
AnnaBridge 165:d1b4690b3f8b 296 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
AnnaBridge 165:d1b4690b3f8b 297 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
AnnaBridge 165:d1b4690b3f8b 298 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.26V */
AnnaBridge 165:d1b4690b3f8b 299 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.40V */
AnnaBridge 165:d1b4690b3f8b 300 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.55V */
AnnaBridge 165:d1b4690b3f8b 301 /**
AnnaBridge 165:d1b4690b3f8b 302 * @}
AnnaBridge 165:d1b4690b3f8b 303 */
AnnaBridge 165:d1b4690b3f8b 304
AnnaBridge 165:d1b4690b3f8b 305 /** @defgroup LCD_RAMRegister LCD RAMRegister
AnnaBridge 165:d1b4690b3f8b 306 * @{
AnnaBridge 165:d1b4690b3f8b 307 */
AnnaBridge 165:d1b4690b3f8b 308 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
AnnaBridge 165:d1b4690b3f8b 309 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
AnnaBridge 165:d1b4690b3f8b 310 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
AnnaBridge 165:d1b4690b3f8b 311 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
AnnaBridge 165:d1b4690b3f8b 312 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
AnnaBridge 165:d1b4690b3f8b 313 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
AnnaBridge 165:d1b4690b3f8b 314 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
AnnaBridge 165:d1b4690b3f8b 315 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
AnnaBridge 165:d1b4690b3f8b 316 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
AnnaBridge 165:d1b4690b3f8b 317 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
AnnaBridge 165:d1b4690b3f8b 318 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
AnnaBridge 165:d1b4690b3f8b 319 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
AnnaBridge 165:d1b4690b3f8b 320 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
AnnaBridge 165:d1b4690b3f8b 321 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
AnnaBridge 165:d1b4690b3f8b 322 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
AnnaBridge 165:d1b4690b3f8b 323 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
AnnaBridge 165:d1b4690b3f8b 324 /**
AnnaBridge 165:d1b4690b3f8b 325 * @}
AnnaBridge 165:d1b4690b3f8b 326 */
AnnaBridge 165:d1b4690b3f8b 327
AnnaBridge 165:d1b4690b3f8b 328 /** @defgroup LCD_HighDrive LCD High Drive
AnnaBridge 165:d1b4690b3f8b 329 * @{
AnnaBridge 165:d1b4690b3f8b 330 */
AnnaBridge 165:d1b4690b3f8b 331
AnnaBridge 165:d1b4690b3f8b 332 #define LCD_HIGHDRIVE_DISABLE ((uint32_t)0x00000000) /*!< High drive disabled */
AnnaBridge 165:d1b4690b3f8b 333 #define LCD_HIGHDRIVE_ENABLE (LCD_FCR_HD) /*!< High drive enabled */
AnnaBridge 165:d1b4690b3f8b 334 /**
AnnaBridge 165:d1b4690b3f8b 335 * @}
AnnaBridge 165:d1b4690b3f8b 336 */
AnnaBridge 165:d1b4690b3f8b 337
AnnaBridge 165:d1b4690b3f8b 338 /** @defgroup LCD_MuxSegment LCD Mux Segment
AnnaBridge 165:d1b4690b3f8b 339 * @{
AnnaBridge 165:d1b4690b3f8b 340 */
AnnaBridge 165:d1b4690b3f8b 341
AnnaBridge 165:d1b4690b3f8b 342 #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000) /*!< SEG pin multiplexing disabled */
AnnaBridge 165:d1b4690b3f8b 343 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */
AnnaBridge 165:d1b4690b3f8b 344 /**
AnnaBridge 165:d1b4690b3f8b 345 * @}
AnnaBridge 165:d1b4690b3f8b 346 */
AnnaBridge 165:d1b4690b3f8b 347
AnnaBridge 165:d1b4690b3f8b 348 /** @defgroup LCD_Flag_Definition LCD Flags Definition
AnnaBridge 165:d1b4690b3f8b 349 * @{
AnnaBridge 165:d1b4690b3f8b 350 */
AnnaBridge 165:d1b4690b3f8b 351 #define LCD_FLAG_ENS LCD_SR_ENS /*!< LCD enabled status */
AnnaBridge 165:d1b4690b3f8b 352 #define LCD_FLAG_SOF LCD_SR_SOF /*!< Start of frame flag */
AnnaBridge 165:d1b4690b3f8b 353 #define LCD_FLAG_UDR LCD_SR_UDR /*!< Update display request */
AnnaBridge 165:d1b4690b3f8b 354 #define LCD_FLAG_UDD LCD_SR_UDD /*!< Update display done */
AnnaBridge 165:d1b4690b3f8b 355 #define LCD_FLAG_RDY LCD_SR_RDY /*!< Ready flag */
AnnaBridge 165:d1b4690b3f8b 356 #define LCD_FLAG_FCRSF LCD_SR_FCRSR /*!< LCD Frame Control Register Synchronization flag */
AnnaBridge 165:d1b4690b3f8b 357 /**
AnnaBridge 165:d1b4690b3f8b 358 * @}
AnnaBridge 165:d1b4690b3f8b 359 */
AnnaBridge 165:d1b4690b3f8b 360
AnnaBridge 165:d1b4690b3f8b 361 /**
AnnaBridge 165:d1b4690b3f8b 362 * @}
AnnaBridge 165:d1b4690b3f8b 363 */
AnnaBridge 165:d1b4690b3f8b 364
AnnaBridge 165:d1b4690b3f8b 365 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 366 /** @defgroup LCD_Exported_Macros LCD Exported Macros
AnnaBridge 165:d1b4690b3f8b 367 * @{
AnnaBridge 165:d1b4690b3f8b 368 */
AnnaBridge 165:d1b4690b3f8b 369
AnnaBridge 165:d1b4690b3f8b 370 /** @brief Reset LCD handle state.
AnnaBridge 165:d1b4690b3f8b 371 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 372 * @retval None
AnnaBridge 165:d1b4690b3f8b 373 */
AnnaBridge 165:d1b4690b3f8b 374 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
AnnaBridge 165:d1b4690b3f8b 375
AnnaBridge 165:d1b4690b3f8b 376 /** @brief Enable the LCD peripheral.
AnnaBridge 165:d1b4690b3f8b 377 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 378 * @retval None
AnnaBridge 165:d1b4690b3f8b 379 */
AnnaBridge 165:d1b4690b3f8b 380 #define __HAL_LCD_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)
AnnaBridge 165:d1b4690b3f8b 381
AnnaBridge 165:d1b4690b3f8b 382 /** @brief Disable the LCD peripheral.
AnnaBridge 165:d1b4690b3f8b 383 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 384 * @retval None
AnnaBridge 165:d1b4690b3f8b 385 */
AnnaBridge 165:d1b4690b3f8b 386 #define __HAL_LCD_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)
AnnaBridge 165:d1b4690b3f8b 387
AnnaBridge 165:d1b4690b3f8b 388 /** @brief Enable the low resistance divider.
AnnaBridge 165:d1b4690b3f8b 389 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 390 * @note Displays with high internal resistance may need a longer drive time to
AnnaBridge 165:d1b4690b3f8b 391 * achieve satisfactory contrast. This function is useful in this case if
AnnaBridge 165:d1b4690b3f8b 392 * some additional power consumption can be tolerated.
AnnaBridge 165:d1b4690b3f8b 393 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
AnnaBridge 165:d1b4690b3f8b 394 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
AnnaBridge 165:d1b4690b3f8b 395 * @retval None
AnnaBridge 165:d1b4690b3f8b 396 */
AnnaBridge 165:d1b4690b3f8b 397 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
AnnaBridge 165:d1b4690b3f8b 398 do { \
AnnaBridge 165:d1b4690b3f8b 399 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
AnnaBridge 165:d1b4690b3f8b 400 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 401 } while(0)
AnnaBridge 165:d1b4690b3f8b 402
AnnaBridge 165:d1b4690b3f8b 403 /** @brief Disable the low resistance divider.
AnnaBridge 165:d1b4690b3f8b 404 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 405 * @retval None
AnnaBridge 165:d1b4690b3f8b 406 */
AnnaBridge 165:d1b4690b3f8b 407 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
AnnaBridge 165:d1b4690b3f8b 408 do { \
AnnaBridge 165:d1b4690b3f8b 409 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
AnnaBridge 165:d1b4690b3f8b 410 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 411 } while(0)
AnnaBridge 165:d1b4690b3f8b 412
AnnaBridge 165:d1b4690b3f8b 413 /** @brief Enable the voltage output buffer for higher driving capability.
AnnaBridge 165:d1b4690b3f8b 414 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 415 * @retval None
AnnaBridge 165:d1b4690b3f8b 416 */
AnnaBridge 165:d1b4690b3f8b 417 #define __HAL_LCD_VOLTAGE_BUFFER_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)
AnnaBridge 165:d1b4690b3f8b 418
AnnaBridge 165:d1b4690b3f8b 419 /** @brief Disable the voltage output buffer for higher driving capability.
AnnaBridge 165:d1b4690b3f8b 420 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 421 * @retval None
AnnaBridge 165:d1b4690b3f8b 422 */
AnnaBridge 165:d1b4690b3f8b 423 #define __HAL_LCD_VOLTAGE_BUFFER_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)
AnnaBridge 165:d1b4690b3f8b 424
AnnaBridge 165:d1b4690b3f8b 425 /**
AnnaBridge 165:d1b4690b3f8b 426 * @brief Configure the LCD pulse on duration.
AnnaBridge 165:d1b4690b3f8b 427 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 428 * @param __DURATION__: specifies the LCD pulse on duration in terms of
AnnaBridge 165:d1b4690b3f8b 429 * CK_PS (prescaled LCD clock period) pulses.
AnnaBridge 165:d1b4690b3f8b 430 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 431 * @arg LCD_PULSEONDURATION_0: 0 pulse
AnnaBridge 165:d1b4690b3f8b 432 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
AnnaBridge 165:d1b4690b3f8b 433 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
AnnaBridge 165:d1b4690b3f8b 434 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
AnnaBridge 165:d1b4690b3f8b 435 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
AnnaBridge 165:d1b4690b3f8b 436 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
AnnaBridge 165:d1b4690b3f8b 437 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
AnnaBridge 165:d1b4690b3f8b 438 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
AnnaBridge 165:d1b4690b3f8b 439 * @retval None
AnnaBridge 165:d1b4690b3f8b 440 */
AnnaBridge 165:d1b4690b3f8b 441 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
AnnaBridge 165:d1b4690b3f8b 442 do { \
AnnaBridge 165:d1b4690b3f8b 443 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
AnnaBridge 165:d1b4690b3f8b 444 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 445 } while(0)
AnnaBridge 165:d1b4690b3f8b 446
AnnaBridge 165:d1b4690b3f8b 447 /**
AnnaBridge 165:d1b4690b3f8b 448 * @brief Configure the LCD dead time.
AnnaBridge 165:d1b4690b3f8b 449 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 450 * @param __DEADTIME__: specifies the LCD dead time.
AnnaBridge 165:d1b4690b3f8b 451 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 452 * @arg LCD_DEADTIME_0: No dead Time
AnnaBridge 165:d1b4690b3f8b 453 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 454 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 455 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 456 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 457 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 458 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 459 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
AnnaBridge 165:d1b4690b3f8b 460 * @retval None
AnnaBridge 165:d1b4690b3f8b 461 */
AnnaBridge 165:d1b4690b3f8b 462 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
AnnaBridge 165:d1b4690b3f8b 463 do { \
AnnaBridge 165:d1b4690b3f8b 464 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
AnnaBridge 165:d1b4690b3f8b 465 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 466 } while(0)
AnnaBridge 165:d1b4690b3f8b 467
AnnaBridge 165:d1b4690b3f8b 468 /**
AnnaBridge 165:d1b4690b3f8b 469 * @brief Configure the LCD contrast.
AnnaBridge 165:d1b4690b3f8b 470 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 471 * @param __CONTRAST__: specifies the LCD Contrast.
AnnaBridge 165:d1b4690b3f8b 472 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 473 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
AnnaBridge 165:d1b4690b3f8b 474 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
AnnaBridge 165:d1b4690b3f8b 475 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
AnnaBridge 165:d1b4690b3f8b 476 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
AnnaBridge 165:d1b4690b3f8b 477 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
AnnaBridge 165:d1b4690b3f8b 478 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
AnnaBridge 165:d1b4690b3f8b 479 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
AnnaBridge 165:d1b4690b3f8b 480 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
AnnaBridge 165:d1b4690b3f8b 481 * @retval None
AnnaBridge 165:d1b4690b3f8b 482 */
AnnaBridge 165:d1b4690b3f8b 483 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
AnnaBridge 165:d1b4690b3f8b 484 do { \
AnnaBridge 165:d1b4690b3f8b 485 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
AnnaBridge 165:d1b4690b3f8b 486 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 487 } while(0)
AnnaBridge 165:d1b4690b3f8b 488
AnnaBridge 165:d1b4690b3f8b 489 /**
AnnaBridge 165:d1b4690b3f8b 490 * @brief Configure the LCD Blink mode and Blink frequency.
AnnaBridge 165:d1b4690b3f8b 491 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 492 * @param __BLINKMODE__: specifies the LCD blink mode.
AnnaBridge 165:d1b4690b3f8b 493 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 494 * @arg LCD_BLINKMODE_OFF: Blink disabled
AnnaBridge 165:d1b4690b3f8b 495 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
AnnaBridge 165:d1b4690b3f8b 496 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
AnnaBridge 165:d1b4690b3f8b 497 * pixels according to the programmed duty)
AnnaBridge 165:d1b4690b3f8b 498 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
AnnaBridge 165:d1b4690b3f8b 499 * (all pixels)
AnnaBridge 165:d1b4690b3f8b 500 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
AnnaBridge 165:d1b4690b3f8b 501 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
AnnaBridge 165:d1b4690b3f8b 502 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
AnnaBridge 165:d1b4690b3f8b 503 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
AnnaBridge 165:d1b4690b3f8b 504 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
AnnaBridge 165:d1b4690b3f8b 505 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
AnnaBridge 165:d1b4690b3f8b 506 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
AnnaBridge 165:d1b4690b3f8b 507 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
AnnaBridge 165:d1b4690b3f8b 508 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
AnnaBridge 165:d1b4690b3f8b 509 * @retval None
AnnaBridge 165:d1b4690b3f8b 510 */
AnnaBridge 165:d1b4690b3f8b 511 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
AnnaBridge 165:d1b4690b3f8b 512 do { \
AnnaBridge 165:d1b4690b3f8b 513 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
AnnaBridge 165:d1b4690b3f8b 514 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 515 } while(0)
AnnaBridge 165:d1b4690b3f8b 516
AnnaBridge 165:d1b4690b3f8b 517 /** @brief Enable the specified LCD interrupt.
AnnaBridge 165:d1b4690b3f8b 518 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 519 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled.
AnnaBridge 165:d1b4690b3f8b 520 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 521 * @arg LCD_IT_SOF: Start of Frame Interrupt
AnnaBridge 165:d1b4690b3f8b 522 * @arg LCD_IT_UDD: Update Display Done Interrupt
AnnaBridge 165:d1b4690b3f8b 523 * @retval None
AnnaBridge 165:d1b4690b3f8b 524 */
AnnaBridge 165:d1b4690b3f8b 525 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
AnnaBridge 165:d1b4690b3f8b 526 do { \
AnnaBridge 165:d1b4690b3f8b 527 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
AnnaBridge 165:d1b4690b3f8b 528 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 529 } while(0)
AnnaBridge 165:d1b4690b3f8b 530
AnnaBridge 165:d1b4690b3f8b 531 /** @brief Disable the specified LCD interrupt.
AnnaBridge 165:d1b4690b3f8b 532 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 533 * @param __INTERRUPT__: specifies the LCD interrupt source to be disabled.
AnnaBridge 165:d1b4690b3f8b 534 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 535 * @arg LCD_IT_SOF: Start of Frame Interrupt
AnnaBridge 165:d1b4690b3f8b 536 * @arg LCD_IT_UDD: Update Display Done Interrupt
AnnaBridge 165:d1b4690b3f8b 537 * @retval None
AnnaBridge 165:d1b4690b3f8b 538 */
AnnaBridge 165:d1b4690b3f8b 539 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
AnnaBridge 165:d1b4690b3f8b 540 do { \
AnnaBridge 165:d1b4690b3f8b 541 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
AnnaBridge 165:d1b4690b3f8b 542 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 165:d1b4690b3f8b 543 } while(0)
AnnaBridge 165:d1b4690b3f8b 544
AnnaBridge 165:d1b4690b3f8b 545 /** @brief Check whether the specified LCD interrupt source is enabled or not.
AnnaBridge 165:d1b4690b3f8b 546 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 547 * @param __IT__: specifies the LCD interrupt source to check.
AnnaBridge 165:d1b4690b3f8b 548 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 549 * @arg LCD_IT_SOF: Start of Frame Interrupt
AnnaBridge 165:d1b4690b3f8b 550 * @arg LCD_IT_UDD: Update Display Done Interrupt.
AnnaBridge 165:d1b4690b3f8b 551 * @note If the device is in STOP mode (PCLK not provided) UDD will not
AnnaBridge 165:d1b4690b3f8b 552 * generate an interrupt even if UDDIE = 1.
AnnaBridge 165:d1b4690b3f8b 553 * If the display is not enabled the UDD interrupt will never occur.
AnnaBridge 165:d1b4690b3f8b 554 * @retval The state of __IT__ (TRUE or FALSE).
AnnaBridge 165:d1b4690b3f8b 555 */
AnnaBridge 165:d1b4690b3f8b 556 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
AnnaBridge 165:d1b4690b3f8b 557
AnnaBridge 165:d1b4690b3f8b 558 /** @brief Check whether the specified LCD flag is set or not.
AnnaBridge 165:d1b4690b3f8b 559 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 560 * @param __FLAG__: specifies the flag to check.
AnnaBridge 165:d1b4690b3f8b 561 * This parameter can be one of the following values:
AnnaBridge 165:d1b4690b3f8b 562 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
AnnaBridge 165:d1b4690b3f8b 563 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
AnnaBridge 165:d1b4690b3f8b 564 * goes from 0 to 1. On deactivation it reflects the real status of
AnnaBridge 165:d1b4690b3f8b 565 * LCD so it becomes 0 at the end of the last displayed frame.
AnnaBridge 165:d1b4690b3f8b 566 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
AnnaBridge 165:d1b4690b3f8b 567 * the beginning of a new frame, at the same time as the display data is
AnnaBridge 165:d1b4690b3f8b 568 * updated.
AnnaBridge 165:d1b4690b3f8b 569 * @arg LCD_FLAG_UDR: Update Display Request flag.
AnnaBridge 165:d1b4690b3f8b 570 * @arg LCD_FLAG_UDD: Update Display Done flag.
AnnaBridge 165:d1b4690b3f8b 571 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
AnnaBridge 165:d1b4690b3f8b 572 * of the step-up converter.
AnnaBridge 165:d1b4690b3f8b 573 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
AnnaBridge 165:d1b4690b3f8b 574 * This flag is set by hardware each time the LCD_FCR register is updated
AnnaBridge 165:d1b4690b3f8b 575 * in the LCDCLK domain.
AnnaBridge 165:d1b4690b3f8b 576 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 165:d1b4690b3f8b 577 */
AnnaBridge 165:d1b4690b3f8b 578 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
AnnaBridge 165:d1b4690b3f8b 579
AnnaBridge 165:d1b4690b3f8b 580 /** @brief Clear the specified LCD pending flag.
AnnaBridge 165:d1b4690b3f8b 581 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 165:d1b4690b3f8b 582 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 165:d1b4690b3f8b 583 * This parameter can be any combination of the following values:
AnnaBridge 165:d1b4690b3f8b 584 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
AnnaBridge 165:d1b4690b3f8b 585 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
AnnaBridge 165:d1b4690b3f8b 586 * @retval None
AnnaBridge 165:d1b4690b3f8b 587 */
AnnaBridge 165:d1b4690b3f8b 588 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->CLR, (__FLAG__))
AnnaBridge 165:d1b4690b3f8b 589
AnnaBridge 165:d1b4690b3f8b 590 /**
AnnaBridge 165:d1b4690b3f8b 591 * @}
AnnaBridge 165:d1b4690b3f8b 592 */
AnnaBridge 165:d1b4690b3f8b 593
AnnaBridge 165:d1b4690b3f8b 594 /* Exported functions ------------------------------------------------------- */
AnnaBridge 165:d1b4690b3f8b 595 /** @addtogroup LCD_Exported_Functions
AnnaBridge 165:d1b4690b3f8b 596 * @{
AnnaBridge 165:d1b4690b3f8b 597 */
AnnaBridge 165:d1b4690b3f8b 598
AnnaBridge 165:d1b4690b3f8b 599 /* Initialization/de-initialization methods **********************************/
AnnaBridge 165:d1b4690b3f8b 600 /** @addtogroup LCD_Exported_Functions_Group1
AnnaBridge 165:d1b4690b3f8b 601 * @{
AnnaBridge 165:d1b4690b3f8b 602 */
AnnaBridge 165:d1b4690b3f8b 603 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 604 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 605 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 606 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 607 /**
AnnaBridge 165:d1b4690b3f8b 608 * @}
AnnaBridge 165:d1b4690b3f8b 609 */
AnnaBridge 165:d1b4690b3f8b 610
AnnaBridge 165:d1b4690b3f8b 611 /* IO operation methods *******************************************************/
AnnaBridge 165:d1b4690b3f8b 612 /** @addtogroup LCD_Exported_Functions_Group2
AnnaBridge 165:d1b4690b3f8b 613 * @{
AnnaBridge 165:d1b4690b3f8b 614 */
AnnaBridge 165:d1b4690b3f8b 615 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
AnnaBridge 165:d1b4690b3f8b 616 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 617 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 618 /**
AnnaBridge 165:d1b4690b3f8b 619 * @}
AnnaBridge 165:d1b4690b3f8b 620 */
AnnaBridge 165:d1b4690b3f8b 621
AnnaBridge 165:d1b4690b3f8b 622 /* Peripheral State methods **************************************************/
AnnaBridge 165:d1b4690b3f8b 623 /** @addtogroup LCD_Exported_Functions_Group3
AnnaBridge 165:d1b4690b3f8b 624 * @{
AnnaBridge 165:d1b4690b3f8b 625 */
AnnaBridge 165:d1b4690b3f8b 626 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 627 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 628 /**
AnnaBridge 165:d1b4690b3f8b 629 * @}
AnnaBridge 165:d1b4690b3f8b 630 */
AnnaBridge 165:d1b4690b3f8b 631
AnnaBridge 165:d1b4690b3f8b 632 /**
AnnaBridge 165:d1b4690b3f8b 633 * @}
AnnaBridge 165:d1b4690b3f8b 634 */
AnnaBridge 165:d1b4690b3f8b 635
AnnaBridge 165:d1b4690b3f8b 636 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 637 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 638 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 639 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 640 /** @defgroup LCD_Private_Macros LCD Private Macros
AnnaBridge 165:d1b4690b3f8b 641 * @{
AnnaBridge 165:d1b4690b3f8b 642 */
AnnaBridge 165:d1b4690b3f8b 643
AnnaBridge 165:d1b4690b3f8b 644 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
AnnaBridge 165:d1b4690b3f8b 645 ((__PRESCALER__) == LCD_PRESCALER_2) || \
AnnaBridge 165:d1b4690b3f8b 646 ((__PRESCALER__) == LCD_PRESCALER_4) || \
AnnaBridge 165:d1b4690b3f8b 647 ((__PRESCALER__) == LCD_PRESCALER_8) || \
AnnaBridge 165:d1b4690b3f8b 648 ((__PRESCALER__) == LCD_PRESCALER_16) || \
AnnaBridge 165:d1b4690b3f8b 649 ((__PRESCALER__) == LCD_PRESCALER_32) || \
AnnaBridge 165:d1b4690b3f8b 650 ((__PRESCALER__) == LCD_PRESCALER_64) || \
AnnaBridge 165:d1b4690b3f8b 651 ((__PRESCALER__) == LCD_PRESCALER_128) || \
AnnaBridge 165:d1b4690b3f8b 652 ((__PRESCALER__) == LCD_PRESCALER_256) || \
AnnaBridge 165:d1b4690b3f8b 653 ((__PRESCALER__) == LCD_PRESCALER_512) || \
AnnaBridge 165:d1b4690b3f8b 654 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
AnnaBridge 165:d1b4690b3f8b 655 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
AnnaBridge 165:d1b4690b3f8b 656 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
AnnaBridge 165:d1b4690b3f8b 657 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
AnnaBridge 165:d1b4690b3f8b 658 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
AnnaBridge 165:d1b4690b3f8b 659 ((__PRESCALER__) == LCD_PRESCALER_32768))
AnnaBridge 165:d1b4690b3f8b 660
AnnaBridge 165:d1b4690b3f8b 661 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
AnnaBridge 165:d1b4690b3f8b 662 ((__DIVIDER__) == LCD_DIVIDER_17) || \
AnnaBridge 165:d1b4690b3f8b 663 ((__DIVIDER__) == LCD_DIVIDER_18) || \
AnnaBridge 165:d1b4690b3f8b 664 ((__DIVIDER__) == LCD_DIVIDER_19) || \
AnnaBridge 165:d1b4690b3f8b 665 ((__DIVIDER__) == LCD_DIVIDER_20) || \
AnnaBridge 165:d1b4690b3f8b 666 ((__DIVIDER__) == LCD_DIVIDER_21) || \
AnnaBridge 165:d1b4690b3f8b 667 ((__DIVIDER__) == LCD_DIVIDER_22) || \
AnnaBridge 165:d1b4690b3f8b 668 ((__DIVIDER__) == LCD_DIVIDER_23) || \
AnnaBridge 165:d1b4690b3f8b 669 ((__DIVIDER__) == LCD_DIVIDER_24) || \
AnnaBridge 165:d1b4690b3f8b 670 ((__DIVIDER__) == LCD_DIVIDER_25) || \
AnnaBridge 165:d1b4690b3f8b 671 ((__DIVIDER__) == LCD_DIVIDER_26) || \
AnnaBridge 165:d1b4690b3f8b 672 ((__DIVIDER__) == LCD_DIVIDER_27) || \
AnnaBridge 165:d1b4690b3f8b 673 ((__DIVIDER__) == LCD_DIVIDER_28) || \
AnnaBridge 165:d1b4690b3f8b 674 ((__DIVIDER__) == LCD_DIVIDER_29) || \
AnnaBridge 165:d1b4690b3f8b 675 ((__DIVIDER__) == LCD_DIVIDER_30) || \
AnnaBridge 165:d1b4690b3f8b 676 ((__DIVIDER__) == LCD_DIVIDER_31))
AnnaBridge 165:d1b4690b3f8b 677
AnnaBridge 165:d1b4690b3f8b 678 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
AnnaBridge 165:d1b4690b3f8b 679 ((__DUTY__) == LCD_DUTY_1_2) || \
AnnaBridge 165:d1b4690b3f8b 680 ((__DUTY__) == LCD_DUTY_1_3) || \
AnnaBridge 165:d1b4690b3f8b 681 ((__DUTY__) == LCD_DUTY_1_4) || \
AnnaBridge 165:d1b4690b3f8b 682 ((__DUTY__) == LCD_DUTY_1_8))
AnnaBridge 165:d1b4690b3f8b 683
AnnaBridge 165:d1b4690b3f8b 684 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
AnnaBridge 165:d1b4690b3f8b 685 ((__BIAS__) == LCD_BIAS_1_2) || \
AnnaBridge 165:d1b4690b3f8b 686 ((__BIAS__) == LCD_BIAS_1_3))
AnnaBridge 165:d1b4690b3f8b 687
AnnaBridge 165:d1b4690b3f8b 688 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
AnnaBridge 165:d1b4690b3f8b 689 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
AnnaBridge 165:d1b4690b3f8b 690
AnnaBridge 165:d1b4690b3f8b 691
AnnaBridge 165:d1b4690b3f8b 692 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
AnnaBridge 165:d1b4690b3f8b 693 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
AnnaBridge 165:d1b4690b3f8b 694 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
AnnaBridge 165:d1b4690b3f8b 695 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
AnnaBridge 165:d1b4690b3f8b 696 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
AnnaBridge 165:d1b4690b3f8b 697 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
AnnaBridge 165:d1b4690b3f8b 698 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
AnnaBridge 165:d1b4690b3f8b 699 ((__DURATION__) == LCD_PULSEONDURATION_7))
AnnaBridge 165:d1b4690b3f8b 700
AnnaBridge 165:d1b4690b3f8b 701 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
AnnaBridge 165:d1b4690b3f8b 702 ((__TIME__) == LCD_DEADTIME_1) || \
AnnaBridge 165:d1b4690b3f8b 703 ((__TIME__) == LCD_DEADTIME_2) || \
AnnaBridge 165:d1b4690b3f8b 704 ((__TIME__) == LCD_DEADTIME_3) || \
AnnaBridge 165:d1b4690b3f8b 705 ((__TIME__) == LCD_DEADTIME_4) || \
AnnaBridge 165:d1b4690b3f8b 706 ((__TIME__) == LCD_DEADTIME_5) || \
AnnaBridge 165:d1b4690b3f8b 707 ((__TIME__) == LCD_DEADTIME_6) || \
AnnaBridge 165:d1b4690b3f8b 708 ((__TIME__) == LCD_DEADTIME_7))
AnnaBridge 165:d1b4690b3f8b 709
AnnaBridge 165:d1b4690b3f8b 710 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
AnnaBridge 165:d1b4690b3f8b 711 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
AnnaBridge 165:d1b4690b3f8b 712 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
AnnaBridge 165:d1b4690b3f8b 713 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
AnnaBridge 165:d1b4690b3f8b 714
AnnaBridge 165:d1b4690b3f8b 715 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
AnnaBridge 165:d1b4690b3f8b 716 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
AnnaBridge 165:d1b4690b3f8b 717 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
AnnaBridge 165:d1b4690b3f8b 718 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
AnnaBridge 165:d1b4690b3f8b 719 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
AnnaBridge 165:d1b4690b3f8b 720 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
AnnaBridge 165:d1b4690b3f8b 721 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
AnnaBridge 165:d1b4690b3f8b 722 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
AnnaBridge 165:d1b4690b3f8b 723
AnnaBridge 165:d1b4690b3f8b 724 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
AnnaBridge 165:d1b4690b3f8b 725 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
AnnaBridge 165:d1b4690b3f8b 726 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
AnnaBridge 165:d1b4690b3f8b 727 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
AnnaBridge 165:d1b4690b3f8b 728 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
AnnaBridge 165:d1b4690b3f8b 729 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
AnnaBridge 165:d1b4690b3f8b 730 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
AnnaBridge 165:d1b4690b3f8b 731 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
AnnaBridge 165:d1b4690b3f8b 732
AnnaBridge 165:d1b4690b3f8b 733 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
AnnaBridge 165:d1b4690b3f8b 734 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
AnnaBridge 165:d1b4690b3f8b 735 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
AnnaBridge 165:d1b4690b3f8b 736 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
AnnaBridge 165:d1b4690b3f8b 737 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
AnnaBridge 165:d1b4690b3f8b 738 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
AnnaBridge 165:d1b4690b3f8b 739 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
AnnaBridge 165:d1b4690b3f8b 740 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
AnnaBridge 165:d1b4690b3f8b 741 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
AnnaBridge 165:d1b4690b3f8b 742 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
AnnaBridge 165:d1b4690b3f8b 743 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
AnnaBridge 165:d1b4690b3f8b 744 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
AnnaBridge 165:d1b4690b3f8b 745 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
AnnaBridge 165:d1b4690b3f8b 746 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
AnnaBridge 165:d1b4690b3f8b 747 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
AnnaBridge 165:d1b4690b3f8b 748 ((__REGISTER__) == LCD_RAM_REGISTER15))
AnnaBridge 165:d1b4690b3f8b 749
AnnaBridge 165:d1b4690b3f8b 750 #define IS_LCD_HIGH_DRIVE(__VALUE__) (((__VALUE__) == LCD_HIGHDRIVE_DISABLE) || \
AnnaBridge 165:d1b4690b3f8b 751 ((__VALUE__) == LCD_HIGHDRIVE_ENABLE))
AnnaBridge 165:d1b4690b3f8b 752
AnnaBridge 165:d1b4690b3f8b 753 #define IS_LCD_MUX_SEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
AnnaBridge 165:d1b4690b3f8b 754 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
AnnaBridge 165:d1b4690b3f8b 755
AnnaBridge 165:d1b4690b3f8b 756 /**
AnnaBridge 165:d1b4690b3f8b 757 * @}
AnnaBridge 165:d1b4690b3f8b 758 */
AnnaBridge 165:d1b4690b3f8b 759
AnnaBridge 165:d1b4690b3f8b 760 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:d1b4690b3f8b 761 /** @addtogroup LCD_Private_Functions
AnnaBridge 165:d1b4690b3f8b 762 * @{
AnnaBridge 165:d1b4690b3f8b 763 */
AnnaBridge 165:d1b4690b3f8b 764
AnnaBridge 165:d1b4690b3f8b 765 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
AnnaBridge 165:d1b4690b3f8b 766
AnnaBridge 165:d1b4690b3f8b 767 /**
AnnaBridge 165:d1b4690b3f8b 768 * @}
AnnaBridge 165:d1b4690b3f8b 769 */
AnnaBridge 165:d1b4690b3f8b 770
AnnaBridge 165:d1b4690b3f8b 771 /**
AnnaBridge 165:d1b4690b3f8b 772 * @}
AnnaBridge 165:d1b4690b3f8b 773 */
AnnaBridge 165:d1b4690b3f8b 774
AnnaBridge 165:d1b4690b3f8b 775 /**
AnnaBridge 165:d1b4690b3f8b 776 * @}
AnnaBridge 165:d1b4690b3f8b 777 */
AnnaBridge 165:d1b4690b3f8b 778
AnnaBridge 165:d1b4690b3f8b 779 #endif /* STM32L433xx || STM32L443xx || STM32L476xx || STM32L486xx || STM32L496xx || STM32L4A6xx */
AnnaBridge 165:d1b4690b3f8b 780
AnnaBridge 165:d1b4690b3f8b 781 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 782 }
AnnaBridge 165:d1b4690b3f8b 783 #endif
AnnaBridge 165:d1b4690b3f8b 784
AnnaBridge 165:d1b4690b3f8b 785 #endif /* __STM32L4xx_HAL_LCD_H */
AnnaBridge 165:d1b4690b3f8b 786
AnnaBridge 165:d1b4690b3f8b 787 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/