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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_ll_system.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_L072CZ_LRWAN1/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_system.h@167:84c0a372a020 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 143:86740a56073b 1 /**
AnnaBridge 143:86740a56073b 2 ******************************************************************************
AnnaBridge 143:86740a56073b 3 * @file stm32l0xx_ll_system.h
AnnaBridge 143:86740a56073b 4 * @author MCD Application Team
AnnaBridge 143:86740a56073b 5 * @brief Header file of SYSTEM LL module.
AnnaBridge 143:86740a56073b 6 @verbatim
AnnaBridge 143:86740a56073b 7 ==============================================================================
AnnaBridge 143:86740a56073b 8 ##### How to use this driver #####
AnnaBridge 143:86740a56073b 9 ==============================================================================
AnnaBridge 143:86740a56073b 10 [..]
AnnaBridge 143:86740a56073b 11 The LL SYSTEM driver contains a set of generic APIs that can be
AnnaBridge 143:86740a56073b 12 used by user:
AnnaBridge 143:86740a56073b 13 (+) Some of the FLASH features need to be handled in the SYSTEM file.
AnnaBridge 143:86740a56073b 14 (+) Access to DBGCMU registers
AnnaBridge 143:86740a56073b 15 (+) Access to SYSCFG registers
AnnaBridge 143:86740a56073b 16
AnnaBridge 143:86740a56073b 17 @endverbatim
AnnaBridge 143:86740a56073b 18 ******************************************************************************
AnnaBridge 143:86740a56073b 19 * @attention
AnnaBridge 143:86740a56073b 20 *
AnnaBridge 143:86740a56073b 21 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 143:86740a56073b 22 *
AnnaBridge 143:86740a56073b 23 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 143:86740a56073b 24 * are permitted provided that the following conditions are met:
AnnaBridge 143:86740a56073b 25 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 143:86740a56073b 26 * this list of conditions and the following disclaimer.
AnnaBridge 143:86740a56073b 27 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 143:86740a56073b 28 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 143:86740a56073b 29 * and/or other materials provided with the distribution.
AnnaBridge 143:86740a56073b 30 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 143:86740a56073b 31 * may be used to endorse or promote products derived from this software
AnnaBridge 143:86740a56073b 32 * without specific prior written permission.
AnnaBridge 143:86740a56073b 33 *
AnnaBridge 143:86740a56073b 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 143:86740a56073b 35 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 143:86740a56073b 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 143:86740a56073b 37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 143:86740a56073b 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 143:86740a56073b 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 143:86740a56073b 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 143:86740a56073b 41 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 143:86740a56073b 42 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 143:86740a56073b 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 143:86740a56073b 44 *
AnnaBridge 143:86740a56073b 45 ******************************************************************************
AnnaBridge 143:86740a56073b 46 */
AnnaBridge 143:86740a56073b 47
AnnaBridge 143:86740a56073b 48 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 143:86740a56073b 49 #ifndef __STM32L0xx_LL_SYSTEM_H
AnnaBridge 143:86740a56073b 50 #define __STM32L0xx_LL_SYSTEM_H
AnnaBridge 143:86740a56073b 51
AnnaBridge 143:86740a56073b 52 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 53 extern "C" {
AnnaBridge 143:86740a56073b 54 #endif
AnnaBridge 143:86740a56073b 55
AnnaBridge 143:86740a56073b 56 /* Includes ------------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 57 #include "stm32l0xx.h"
AnnaBridge 143:86740a56073b 58
AnnaBridge 143:86740a56073b 59 /** @addtogroup STM32L0xx_LL_Driver
AnnaBridge 143:86740a56073b 60 * @{
AnnaBridge 143:86740a56073b 61 */
AnnaBridge 143:86740a56073b 62
AnnaBridge 143:86740a56073b 63 #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU)
AnnaBridge 143:86740a56073b 64
AnnaBridge 143:86740a56073b 65 /** @defgroup SYSTEM_LL SYSTEM
AnnaBridge 143:86740a56073b 66 * @{
AnnaBridge 143:86740a56073b 67 */
AnnaBridge 143:86740a56073b 68
AnnaBridge 143:86740a56073b 69 /* Private types -------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 70 /* Private variables ---------------------------------------------------------*/
AnnaBridge 143:86740a56073b 71
AnnaBridge 143:86740a56073b 72 /* Private constants ---------------------------------------------------------*/
AnnaBridge 143:86740a56073b 73 /** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
AnnaBridge 143:86740a56073b 74 * @{
AnnaBridge 143:86740a56073b 75 */
AnnaBridge 143:86740a56073b 76
AnnaBridge 143:86740a56073b 77 /* Defines used for position in the register */
AnnaBridge 143:86740a56073b 78 #define DBGMCU_REVID_POSITION (uint32_t)16U
AnnaBridge 143:86740a56073b 79
AnnaBridge 143:86740a56073b 80 /**
AnnaBridge 143:86740a56073b 81 * @brief Power-down in Run mode Flash key
AnnaBridge 143:86740a56073b 82 */
AnnaBridge 143:86740a56073b 83 #define FLASH_PDKEY1 ((uint32_t)0x04152637U) /*!< Flash power down key1 */
AnnaBridge 143:86740a56073b 84 #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1
AnnaBridge 143:86740a56073b 85 to unlock the RUN_PD bit in FLASH_ACR */
AnnaBridge 143:86740a56073b 86
AnnaBridge 143:86740a56073b 87 /**
AnnaBridge 143:86740a56073b 88 * @}
AnnaBridge 143:86740a56073b 89 */
AnnaBridge 143:86740a56073b 90
AnnaBridge 143:86740a56073b 91 /* Private macros ------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 92
AnnaBridge 143:86740a56073b 93 /* Exported types ------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 94 /* Exported constants --------------------------------------------------------*/
AnnaBridge 143:86740a56073b 95 /** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
AnnaBridge 143:86740a56073b 96 * @{
AnnaBridge 143:86740a56073b 97 */
AnnaBridge 143:86740a56073b 98
AnnaBridge 143:86740a56073b 99 /** @defgroup SYSTEM_LL_EC_REMAP SYSCFG Memory Remap
AnnaBridge 143:86740a56073b 100 * @{
AnnaBridge 143:86740a56073b 101 */
AnnaBridge 143:86740a56073b 102 #define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000U /*!< Main Flash memory mapped at 0x00000000 */
AnnaBridge 143:86740a56073b 103 #define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_CFGR1_MEM_MODE_0 /*!< System Flash memory mapped at 0x00000000 */
AnnaBridge 143:86740a56073b 104 #define LL_SYSCFG_REMAP_SRAM (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0) /*!< SRAM mapped at 0x00000000 */
AnnaBridge 143:86740a56073b 105
AnnaBridge 143:86740a56073b 106 /**
AnnaBridge 143:86740a56073b 107 * @}
AnnaBridge 143:86740a56073b 108 */
AnnaBridge 143:86740a56073b 109
AnnaBridge 143:86740a56073b 110 #if defined(SYSCFG_CFGR1_UFB)
AnnaBridge 143:86740a56073b 111 /** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG Bank Mode
AnnaBridge 143:86740a56073b 112 * @{
AnnaBridge 143:86740a56073b 113 */
AnnaBridge 143:86740a56073b 114 #define LL_SYSCFG_BANKMODE_BANK1 (uint32_t)0x00000000U /*!< Flash Bank1 mapped at 0x08000000 (and aliased at 0x00000000),
AnnaBridge 143:86740a56073b 115 Flash Bank2 mapped at 0x08018000 (and aliased at 0x00018000),
AnnaBridge 143:86740a56073b 116 Data EEPROM Bank1 mapped at 0x08080000 (and aliased at 0x00080000),
AnnaBridge 143:86740a56073b 117 Data EEPROM Bank2 mapped at 0x08080C00 (and aliased at 0x00080C00) */
AnnaBridge 143:86740a56073b 118 #define LL_SYSCFG_BANKMODE_BANK2 SYSCFG_CFGR1_UFB /*!< Flash Bank2 mapped at 0x08000000 (and aliased at 0x00000000),
AnnaBridge 143:86740a56073b 119 Flash Bank1 mapped at 0x08018000 (and aliased at 0x00018000),
AnnaBridge 143:86740a56073b 120 Data EEPROM Bank2 mapped at 0x08080000 (and aliased at 0x00080000),
AnnaBridge 143:86740a56073b 121 Data EEPROM Bank1 mapped at 0x08080C00 (and aliased at 0x00080C00) */
AnnaBridge 143:86740a56073b 122 /**
AnnaBridge 143:86740a56073b 123 * @}
AnnaBridge 143:86740a56073b 124 */
AnnaBridge 143:86740a56073b 125
AnnaBridge 143:86740a56073b 126 #endif /* SYSCFG_CFGR1_UFB */
AnnaBridge 143:86740a56073b 127
AnnaBridge 143:86740a56073b 128 /** @defgroup SYSTEM_LL_EC_BOOTMODE SYSCFG Boot Mode
AnnaBridge 143:86740a56073b 129 * @{
AnnaBridge 143:86740a56073b 130 */
AnnaBridge 143:86740a56073b 131 #define LL_SYSCFG_BOOTMODE_FLASH (uint32_t)0x00000000U /*!< Main Flash memory boot mode */
AnnaBridge 143:86740a56073b 132 #define LL_SYSCFG_BOOTMODE_SYSTEMFLASH SYSCFG_CFGR1_BOOT_MODE_0 /*!< System Flash memory boot mode */
AnnaBridge 143:86740a56073b 133 #define LL_SYSCFG_BOOTMODE_SRAM (SYSCFG_CFGR1_BOOT_MODE_1 | SYSCFG_CFGR1_BOOT_MODE_0) /*!< SRAM boot mode */
AnnaBridge 143:86740a56073b 134
AnnaBridge 143:86740a56073b 135 /**
AnnaBridge 143:86740a56073b 136 * @}
AnnaBridge 143:86740a56073b 137 */
AnnaBridge 143:86740a56073b 138
AnnaBridge 143:86740a56073b 139 #if defined(SYSCFG_CFGR2_CAPA)
AnnaBridge 143:86740a56073b 140 /** @defgroup SYSTEM_LL_EC_CFGR2 SYSCFG VLCD Rail Connection
AnnaBridge 143:86740a56073b 141 * @{
AnnaBridge 143:86740a56073b 142 */
AnnaBridge 143:86740a56073b 143
AnnaBridge 143:86740a56073b 144 #define LL_SYSCFG_CAPA_VLCD2_PB2 SYSCFG_CFGR2_CAPA_0 /*!< Connect PB2 pin to LCD_VLCD2 rails supply voltage */
AnnaBridge 143:86740a56073b 145 #define LL_SYSCFG_CAPA_VLCD1_PB12 SYSCFG_CFGR2_CAPA_1 /*!< Connect PB12 pin to LCD_VLCD1 rails supply voltage */
AnnaBridge 143:86740a56073b 146 #define LL_SYSCFG_CAPA_VLCD3_PB0 SYSCFG_CFGR2_CAPA_2 /*!< Connect PB0 pin to LCD_VLCD3 rails supply voltage */
AnnaBridge 143:86740a56073b 147 #if defined (SYSCFG_CFGR2_CAPA_3)
AnnaBridge 143:86740a56073b 148 #define LL_SYSCFG_CAPA_VLCD1_PE11 SYSCFG_CFGR2_CAPA_3 /*!< Connect PE11 pin to LCD_VLCD1 rails supply voltage */
AnnaBridge 143:86740a56073b 149 #endif /* SYSCFG_CFGR2_CAPA_3 */
AnnaBridge 143:86740a56073b 150 #if defined (SYSCFG_CFGR2_CAPA_4)
AnnaBridge 143:86740a56073b 151 #define LL_SYSCFG_CAPA_VLCD3_PE12 SYSCFG_CFGR2_CAPA_4 /*!< Connect PE12 pin to LCD_VLCD3 rails supply voltage */
AnnaBridge 143:86740a56073b 152 #endif /* SYSCFG_CFGR2_CAPA_4 */
AnnaBridge 143:86740a56073b 153 /**
AnnaBridge 143:86740a56073b 154 * @}
AnnaBridge 143:86740a56073b 155 */
AnnaBridge 143:86740a56073b 156 #endif /* SYSCFG_CFGR2_CAPA */
AnnaBridge 143:86740a56073b 157
AnnaBridge 143:86740a56073b 158 /** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
AnnaBridge 143:86740a56073b 159 * @{
AnnaBridge 143:86740a56073b 160 */
AnnaBridge 143:86740a56073b 161 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
AnnaBridge 143:86740a56073b 162 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
AnnaBridge 143:86740a56073b 163 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
AnnaBridge 143:86740a56073b 164 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
AnnaBridge 143:86740a56073b 165 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR2_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
AnnaBridge 143:86740a56073b 166 #if defined(SYSCFG_CFGR2_I2C2_FMP)
AnnaBridge 143:86740a56073b 167 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR2_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
AnnaBridge 143:86740a56073b 168 #endif /* SYSCFG_CFGR2_I2C2_FMP */
AnnaBridge 143:86740a56073b 169 #if defined(SYSCFG_CFGR2_I2C3_FMP)
AnnaBridge 143:86740a56073b 170 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR2_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
AnnaBridge 143:86740a56073b 171 #endif /* SYSCFG_CFGR2_I2C3_FMP */
AnnaBridge 143:86740a56073b 172 /**
AnnaBridge 143:86740a56073b 173 * @}
AnnaBridge 143:86740a56073b 174 */
AnnaBridge 143:86740a56073b 175
AnnaBridge 143:86740a56073b 176 /** @defgroup SYSTEM_LL_VREFINT_CONTROL SYSCFG VREFINT Control
AnnaBridge 143:86740a56073b 177 * @{
AnnaBridge 143:86740a56073b 178 */
AnnaBridge 143:86740a56073b 179 #define LL_SYSCFG_VREFINT_CONNECT_NONE (uint32_t)0x00000000U /*!< No pad connected to VREFINT_ADC */
AnnaBridge 143:86740a56073b 180 #define LL_SYSCFG_VREFINT_CONNECT_IO1 SYSCFG_CFGR3_VREF_OUT_0 /*!< PB0 connected to VREFINT_ADC */
AnnaBridge 143:86740a56073b 181 #define LL_SYSCFG_VREFINT_CONNECT_IO2 SYSCFG_CFGR3_VREF_OUT_1 /*!< PB1 connected to VREFINT_ADC */
AnnaBridge 143:86740a56073b 182 #define LL_SYSCFG_VREFINT_CONNECT_IO1_IO2 (SYSCFG_CFGR3_VREF_OUT_0 | SYSCFG_CFGR3_VREF_OUT_1) /*!< PB0 and PB1 connected to VREFINT_ADC */
AnnaBridge 143:86740a56073b 183 /**
AnnaBridge 143:86740a56073b 184 * @}
AnnaBridge 143:86740a56073b 185 */
AnnaBridge 143:86740a56073b 186
AnnaBridge 143:86740a56073b 187 /** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI Port
AnnaBridge 143:86740a56073b 188 * @{
AnnaBridge 143:86740a56073b 189 */
AnnaBridge 143:86740a56073b 190 #define LL_SYSCFG_EXTI_PORTA (uint32_t)0U /*!< EXTI PORT A */
AnnaBridge 143:86740a56073b 191 #define LL_SYSCFG_EXTI_PORTB (uint32_t)1U /*!< EXTI PORT B */
AnnaBridge 143:86740a56073b 192 #define LL_SYSCFG_EXTI_PORTC (uint32_t)2U /*!< EXTI PORT C */
AnnaBridge 143:86740a56073b 193 #if defined(GPIOD_BASE)
AnnaBridge 143:86740a56073b 194 #define LL_SYSCFG_EXTI_PORTD (uint32_t)3U /*!< EXTI PORT D */
AnnaBridge 143:86740a56073b 195 #endif /*GPIOD_BASE*/
AnnaBridge 143:86740a56073b 196 #if defined(GPIOE_BASE)
AnnaBridge 143:86740a56073b 197 #define LL_SYSCFG_EXTI_PORTE (uint32_t)4U /*!< EXTI PORT E */
AnnaBridge 143:86740a56073b 198 #endif /*GPIOE_BASE*/
AnnaBridge 143:86740a56073b 199 #if defined(GPIOH_BASE)
AnnaBridge 143:86740a56073b 200 #define LL_SYSCFG_EXTI_PORTH (uint32_t)5U /*!< EXTI PORT H */
AnnaBridge 143:86740a56073b 201 #endif /*GPIOH_BASE*/
AnnaBridge 143:86740a56073b 202 /**
AnnaBridge 143:86740a56073b 203 * @}
AnnaBridge 143:86740a56073b 204 */
AnnaBridge 143:86740a56073b 205
AnnaBridge 143:86740a56073b 206 /** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI Line
AnnaBridge 143:86740a56073b 207 * @{
AnnaBridge 143:86740a56073b 208 */
AnnaBridge 143:86740a56073b 209 #define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0U << 16U | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
AnnaBridge 143:86740a56073b 210 #define LL_SYSCFG_EXTI_LINE1 (uint32_t)(4U << 16U | 0U) /*!< EXTI_POSITION_4 | EXTICR[0] */
AnnaBridge 143:86740a56073b 211 #define LL_SYSCFG_EXTI_LINE2 (uint32_t)(8U << 16U | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
AnnaBridge 143:86740a56073b 212 #define LL_SYSCFG_EXTI_LINE3 (uint32_t)(12U << 16U | 0U) /*!< EXTI_POSITION_12 | EXTICR[0] */
AnnaBridge 143:86740a56073b 213 #define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0U << 16U | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
AnnaBridge 143:86740a56073b 214 #define LL_SYSCFG_EXTI_LINE5 (uint32_t)(4U << 16U | 1U) /*!< EXTI_POSITION_4 | EXTICR[1] */
AnnaBridge 143:86740a56073b 215 #define LL_SYSCFG_EXTI_LINE6 (uint32_t)(8U << 16U | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
AnnaBridge 143:86740a56073b 216 #define LL_SYSCFG_EXTI_LINE7 (uint32_t)(12U << 16U | 1U) /*!< EXTI_POSITION_12 | EXTICR[1] */
AnnaBridge 143:86740a56073b 217 #define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0U << 16U | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
AnnaBridge 143:86740a56073b 218 #define LL_SYSCFG_EXTI_LINE9 (uint32_t)(4U << 16U | 2U) /*!< EXTI_POSITION_4 | EXTICR[2] */
AnnaBridge 143:86740a56073b 219 #define LL_SYSCFG_EXTI_LINE10 (uint32_t)(8U << 16U | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
AnnaBridge 143:86740a56073b 220 #define LL_SYSCFG_EXTI_LINE11 (uint32_t)(12U << 16U | 2U) /*!< EXTI_POSITION_12 | EXTICR[2] */
AnnaBridge 143:86740a56073b 221 #define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0U << 16U | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
AnnaBridge 143:86740a56073b 222 #define LL_SYSCFG_EXTI_LINE13 (uint32_t)(4U << 16U | 3U) /*!< EXTI_POSITION_4 | EXTICR[3] */
AnnaBridge 143:86740a56073b 223 #define LL_SYSCFG_EXTI_LINE14 (uint32_t)(8U << 16U | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
AnnaBridge 143:86740a56073b 224 #define LL_SYSCFG_EXTI_LINE15 (uint32_t)(12U << 16U | 3U) /*!< EXTI_POSITION_12 | EXTICR[3] */
AnnaBridge 143:86740a56073b 225 /**
AnnaBridge 143:86740a56073b 226 * @}
AnnaBridge 143:86740a56073b 227 */
AnnaBridge 143:86740a56073b 228
AnnaBridge 143:86740a56073b 229
AnnaBridge 143:86740a56073b 230
AnnaBridge 167:84c0a372a020 231 /** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
AnnaBridge 143:86740a56073b 232 * @{
AnnaBridge 143:86740a56073b 233 */
AnnaBridge 167:84c0a372a020 234 #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 235 #if defined(TIM3)
AnnaBridge 167:84c0a372a020 236 #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 237 #endif /*TIM3*/
AnnaBridge 143:86740a56073b 238 #if defined(TIM6)
AnnaBridge 167:84c0a372a020 239 #define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP /*!< TIM6 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 240 #endif /*TIM6*/
AnnaBridge 143:86740a56073b 241 #if defined(TIM7)
AnnaBridge 167:84c0a372a020 242 #define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< TIM7 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 243 #endif /*TIM7*/
AnnaBridge 167:84c0a372a020 244 #define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP /*!< RTC Calendar frozen when core is halted */
AnnaBridge 167:84c0a372a020 245 #define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP /*!< Debug Window Watchdog stopped when Core is halted */
AnnaBridge 167:84c0a372a020 246 #define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP /*!< Debug Independent Watchdog stopped when Core is halted */
AnnaBridge 167:84c0a372a020 247 #define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_STOP /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 143:86740a56073b 248 #if defined(I2C2)
AnnaBridge 167:84c0a372a020 249 #define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_STOP /*!< I2C2 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 143:86740a56073b 250 #endif /*I2C2*/
AnnaBridge 143:86740a56073b 251 #if defined(I2C3)
AnnaBridge 167:84c0a372a020 252 #define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_STOP /*!< I2C3 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 143:86740a56073b 253 #endif /*I2C3*/
AnnaBridge 167:84c0a372a020 254 #define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1_FZ_DBG_LPTIMER_STOP /*!< LPTIM1 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 255 /**
AnnaBridge 143:86740a56073b 256 * @}
AnnaBridge 143:86740a56073b 257 */
AnnaBridge 143:86740a56073b 258
AnnaBridge 167:84c0a372a020 259 /** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
AnnaBridge 143:86740a56073b 260 * @{
AnnaBridge 143:86740a56073b 261 */
AnnaBridge 143:86740a56073b 262 #if defined(TIM22)
AnnaBridge 167:84c0a372a020 263 #define LL_DBGMCU_APB2_GRP1_TIM22_STOP DBGMCU_APB2_FZ_DBG_TIM22_STOP /*!< TIM22 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 264 #endif /*TIM22*/
AnnaBridge 167:84c0a372a020 265 #define LL_DBGMCU_APB2_GRP1_TIM21_STOP DBGMCU_APB2_FZ_DBG_TIM21_STOP /*!< TIM21 counter stopped when core is halted */
AnnaBridge 143:86740a56073b 266 /**
AnnaBridge 143:86740a56073b 267 * @}
AnnaBridge 143:86740a56073b 268 */
AnnaBridge 143:86740a56073b 269
AnnaBridge 143:86740a56073b 270 /** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
AnnaBridge 143:86740a56073b 271 * @{
AnnaBridge 143:86740a56073b 272 */
AnnaBridge 143:86740a56073b 273 #define LL_FLASH_LATENCY_0 ((uint32_t)0x00000000U) /*!< FLASH Zero Latency cycle */
AnnaBridge 143:86740a56073b 274 #define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY /*!< FLASH One Latency cycle */
AnnaBridge 143:86740a56073b 275 /**
AnnaBridge 143:86740a56073b 276 * @}
AnnaBridge 143:86740a56073b 277 */
AnnaBridge 143:86740a56073b 278
AnnaBridge 143:86740a56073b 279 /**
AnnaBridge 143:86740a56073b 280 * @}
AnnaBridge 143:86740a56073b 281 */
AnnaBridge 143:86740a56073b 282
AnnaBridge 143:86740a56073b 283 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 284
AnnaBridge 143:86740a56073b 285 /* Exported functions --------------------------------------------------------*/
AnnaBridge 143:86740a56073b 286 /** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
AnnaBridge 143:86740a56073b 287 * @{
AnnaBridge 143:86740a56073b 288 */
AnnaBridge 143:86740a56073b 289
AnnaBridge 143:86740a56073b 290 /** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG
AnnaBridge 143:86740a56073b 291 * @{
AnnaBridge 143:86740a56073b 292 */
AnnaBridge 143:86740a56073b 293
AnnaBridge 143:86740a56073b 294 /**
AnnaBridge 143:86740a56073b 295 * @brief Set memory mapping at address 0x00000000
AnnaBridge 143:86740a56073b 296 * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_SetRemapMemory
AnnaBridge 143:86740a56073b 297 * @param Memory This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 298 * @arg @ref LL_SYSCFG_REMAP_FLASH
AnnaBridge 143:86740a56073b 299 * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
AnnaBridge 143:86740a56073b 300 * @arg @ref LL_SYSCFG_REMAP_SRAM
AnnaBridge 143:86740a56073b 301 * @retval None
AnnaBridge 143:86740a56073b 302 */
AnnaBridge 143:86740a56073b 303 __STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
AnnaBridge 143:86740a56073b 304 {
AnnaBridge 143:86740a56073b 305 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory);
AnnaBridge 143:86740a56073b 306 }
AnnaBridge 143:86740a56073b 307
AnnaBridge 143:86740a56073b 308 /**
AnnaBridge 143:86740a56073b 309 * @brief Get memory mapping at address 0x00000000
AnnaBridge 143:86740a56073b 310 * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_GetRemapMemory
AnnaBridge 143:86740a56073b 311 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 312 * @arg @ref LL_SYSCFG_REMAP_FLASH
AnnaBridge 143:86740a56073b 313 * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
AnnaBridge 143:86740a56073b 314 * @arg @ref LL_SYSCFG_REMAP_SRAM
AnnaBridge 143:86740a56073b 315 */
AnnaBridge 143:86740a56073b 316 __STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
AnnaBridge 143:86740a56073b 317 {
AnnaBridge 143:86740a56073b 318 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE));
AnnaBridge 143:86740a56073b 319 }
AnnaBridge 143:86740a56073b 320
AnnaBridge 143:86740a56073b 321 #if defined(SYSCFG_CFGR1_UFB)
AnnaBridge 143:86740a56073b 322 /**
AnnaBridge 143:86740a56073b 323 * @brief Select Flash bank mode (Bank flashed at 0x08000000)
AnnaBridge 143:86740a56073b 324 * @rmtoll SYSCFG_CFGR1 UFB LL_SYSCFG_SetFlashBankMode
AnnaBridge 143:86740a56073b 325 * @param Bank This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 326 * @arg @ref LL_SYSCFG_BANKMODE_BANK1
AnnaBridge 143:86740a56073b 327 * @arg @ref LL_SYSCFG_BANKMODE_BANK2
AnnaBridge 143:86740a56073b 328 * @retval None
AnnaBridge 143:86740a56073b 329 */
AnnaBridge 143:86740a56073b 330 __STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank)
AnnaBridge 143:86740a56073b 331 {
AnnaBridge 143:86740a56073b 332 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB, Bank);
AnnaBridge 143:86740a56073b 333 }
AnnaBridge 143:86740a56073b 334
AnnaBridge 143:86740a56073b 335 /**
AnnaBridge 143:86740a56073b 336 * @brief Get Flash bank mode (Bank flashed at 0x08000000)
AnnaBridge 143:86740a56073b 337 * @rmtoll SYSCFG_CFGR1 UFB LL_SYSCFG_GetFlashBankMode
AnnaBridge 143:86740a56073b 338 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 339 * @arg @ref LL_SYSCFG_BANKMODE_BANK1
AnnaBridge 143:86740a56073b 340 * @arg @ref LL_SYSCFG_BANKMODE_BANK2
AnnaBridge 143:86740a56073b 341 */
AnnaBridge 143:86740a56073b 342 __STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void)
AnnaBridge 143:86740a56073b 343 {
AnnaBridge 143:86740a56073b 344 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB));
AnnaBridge 143:86740a56073b 345 }
AnnaBridge 143:86740a56073b 346 #endif /* SYSCFG_CFGR1_UFB */
AnnaBridge 143:86740a56073b 347
AnnaBridge 143:86740a56073b 348 /**
AnnaBridge 143:86740a56073b 349 * @brief Get Boot mode selected by the boot pins status bits
AnnaBridge 143:86740a56073b 350 * @note It indicates the boot mode selected by the boot pins. Bit 9
AnnaBridge 143:86740a56073b 351 * corresponds to the complement of nBOOT1 bit in the FLASH_OPTR register.
AnnaBridge 143:86740a56073b 352 * Its value is defined in the option bytes. Bit 8 corresponds to the
AnnaBridge 143:86740a56073b 353 * value sampled on the BOOT0 pin.
AnnaBridge 143:86740a56073b 354 * @rmtoll SYSCFG_CFGR1 BOOT_MODE LL_SYSCFG_GetBootMode
AnnaBridge 143:86740a56073b 355 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 356 * @arg @ref LL_SYSCFG_BOOTMODE_FLASH
AnnaBridge 143:86740a56073b 357 * @arg @ref LL_SYSCFG_BOOTMODE_SYSTEMFLASH
AnnaBridge 143:86740a56073b 358 * @arg @ref LL_SYSCFG_BOOTMODE_SRAM
AnnaBridge 143:86740a56073b 359 */
AnnaBridge 143:86740a56073b 360 __STATIC_INLINE uint32_t LL_SYSCFG_GetBootMode(void)
AnnaBridge 143:86740a56073b 361 {
AnnaBridge 143:86740a56073b 362 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE));
AnnaBridge 143:86740a56073b 363 }
AnnaBridge 143:86740a56073b 364
AnnaBridge 143:86740a56073b 365 /**
AnnaBridge 143:86740a56073b 366 * @brief Firewall protection enabled
AnnaBridge 143:86740a56073b 367 * @rmtoll SYSCFG_CFGR2 FWDIS LL_SYSCFG_EnableFirewall
AnnaBridge 143:86740a56073b 368 * @retval None
AnnaBridge 143:86740a56073b 369 */
AnnaBridge 143:86740a56073b 370 __STATIC_INLINE void LL_SYSCFG_EnableFirewall(void)
AnnaBridge 143:86740a56073b 371 {
AnnaBridge 143:86740a56073b 372 CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN);
AnnaBridge 143:86740a56073b 373 }
AnnaBridge 143:86740a56073b 374
AnnaBridge 143:86740a56073b 375 /**
AnnaBridge 143:86740a56073b 376 * @brief Check if Firewall protection is enabled or not
AnnaBridge 143:86740a56073b 377 * @rmtoll SYSCFG_CFGR2 FWDIS LL_SYSCFG_IsEnabledFirewall
AnnaBridge 143:86740a56073b 378 * @retval State of bit (1 or 0).
AnnaBridge 143:86740a56073b 379 */
AnnaBridge 143:86740a56073b 380 __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall(void)
AnnaBridge 143:86740a56073b 381 {
AnnaBridge 143:86740a56073b 382 return !(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) == SYSCFG_CFGR2_FWDISEN);
AnnaBridge 143:86740a56073b 383 }
AnnaBridge 143:86740a56073b 384
AnnaBridge 143:86740a56073b 385 #if defined(SYSCFG_CFGR2_CAPA)
AnnaBridge 143:86740a56073b 386 /**
AnnaBridge 143:86740a56073b 387 * @brief Set VLCD rail connection to optional external capacitor
AnnaBridge 143:86740a56073b 388 * @note One to three external capacitors can be connected to pads to do
AnnaBridge 143:86740a56073b 389 * VLCD biasing.
AnnaBridge 143:86740a56073b 390 * - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
AnnaBridge 143:86740a56073b 391 * - LCD_VLCD2 rail can be connected to PB2,
AnnaBridge 143:86740a56073b 392 * - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
AnnaBridge 143:86740a56073b 393 * @rmtoll SYSCFG_CFGR2 CAPA LL_SYSCFG_SetVLCDRailConnection
AnnaBridge 143:86740a56073b 394 * @param IoPinConnect This parameter can be a combination of the following values:
AnnaBridge 143:86740a56073b 395 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
AnnaBridge 143:86740a56073b 396 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
AnnaBridge 143:86740a56073b 397 * @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
AnnaBridge 143:86740a56073b 398 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
AnnaBridge 143:86740a56073b 399 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
AnnaBridge 143:86740a56073b 400 *
AnnaBridge 143:86740a56073b 401 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 402 * @retval None
AnnaBridge 143:86740a56073b 403 */
AnnaBridge 143:86740a56073b 404 __STATIC_INLINE void LL_SYSCFG_SetVLCDRailConnection(uint32_t IoPinConnect)
AnnaBridge 143:86740a56073b 405 {
AnnaBridge 143:86740a56073b 406 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA, IoPinConnect);
AnnaBridge 143:86740a56073b 407 }
AnnaBridge 143:86740a56073b 408
AnnaBridge 143:86740a56073b 409
AnnaBridge 143:86740a56073b 410 /**
AnnaBridge 143:86740a56073b 411 * @brief Get VLCD rail connection configuration
AnnaBridge 143:86740a56073b 412 * @note One to three external capacitors can be connected to pads to do
AnnaBridge 143:86740a56073b 413 * VLCD biasing.
AnnaBridge 143:86740a56073b 414 * - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
AnnaBridge 143:86740a56073b 415 * - LCD_VLCD2 rail can be connected to PB2,
AnnaBridge 143:86740a56073b 416 * - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
AnnaBridge 143:86740a56073b 417 * @rmtoll SYSCFG_CFGR2 CAPA LL_SYSCFG_GetVLCDRailConnection
AnnaBridge 143:86740a56073b 418 * @retval Returned value can be a combination of the following values:
AnnaBridge 143:86740a56073b 419 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
AnnaBridge 143:86740a56073b 420 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
AnnaBridge 143:86740a56073b 421 * @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
AnnaBridge 143:86740a56073b 422 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
AnnaBridge 143:86740a56073b 423 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
AnnaBridge 143:86740a56073b 424 *
AnnaBridge 143:86740a56073b 425 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 426 */
AnnaBridge 143:86740a56073b 427 __STATIC_INLINE uint32_t LL_SYSCFG_GetVLCDRailConnection(void)
AnnaBridge 143:86740a56073b 428 {
AnnaBridge 143:86740a56073b 429 return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA));
AnnaBridge 143:86740a56073b 430 }
AnnaBridge 143:86740a56073b 431 #endif
AnnaBridge 143:86740a56073b 432
AnnaBridge 143:86740a56073b 433 /**
AnnaBridge 143:86740a56073b 434 * @brief Enable the I2C fast mode plus driving capability.
AnnaBridge 143:86740a56073b 435 * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus\n
AnnaBridge 143:86740a56073b 436 * SYSCFG_CFGR2 I2Cx_FMP LL_SYSCFG_EnableFastModePlus
AnnaBridge 143:86740a56073b 437 * @param ConfigFastModePlus This parameter can be a combination of the following values:
AnnaBridge 143:86740a56073b 438 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
AnnaBridge 143:86740a56073b 439 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
AnnaBridge 143:86740a56073b 440 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
AnnaBridge 143:86740a56073b 441 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
AnnaBridge 143:86740a56073b 442 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
AnnaBridge 143:86740a56073b 443 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
AnnaBridge 143:86740a56073b 444 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
AnnaBridge 143:86740a56073b 445 *
AnnaBridge 143:86740a56073b 446 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 447 * @retval None
AnnaBridge 143:86740a56073b 448 */
AnnaBridge 143:86740a56073b 449 __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
AnnaBridge 143:86740a56073b 450 {
AnnaBridge 143:86740a56073b 451 SET_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
AnnaBridge 143:86740a56073b 452 }
AnnaBridge 143:86740a56073b 453
AnnaBridge 143:86740a56073b 454 /**
AnnaBridge 143:86740a56073b 455 * @brief Disable the I2C fast mode plus driving capability.
AnnaBridge 143:86740a56073b 456 * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus\n
AnnaBridge 143:86740a56073b 457 * SYSCFG_CFGR2 I2Cx_FMP LL_SYSCFG_DisableFastModePlus
AnnaBridge 143:86740a56073b 458 * @param ConfigFastModePlus This parameter can be a combination of the following values:
AnnaBridge 143:86740a56073b 459 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
AnnaBridge 143:86740a56073b 460 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
AnnaBridge 143:86740a56073b 461 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
AnnaBridge 143:86740a56073b 462 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
AnnaBridge 143:86740a56073b 463 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
AnnaBridge 143:86740a56073b 464 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
AnnaBridge 143:86740a56073b 465 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
AnnaBridge 143:86740a56073b 466 *
AnnaBridge 143:86740a56073b 467 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 468 * @retval None
AnnaBridge 143:86740a56073b 469 */
AnnaBridge 143:86740a56073b 470 __STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
AnnaBridge 143:86740a56073b 471 {
AnnaBridge 143:86740a56073b 472 CLEAR_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
AnnaBridge 143:86740a56073b 473 }
AnnaBridge 143:86740a56073b 474
AnnaBridge 143:86740a56073b 475 /**
AnnaBridge 143:86740a56073b 476 * @brief Select which pad is connected to VREFINT_ADC
AnnaBridge 143:86740a56073b 477 * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT LL_SYSCFG_VREFINT_SetConnection
AnnaBridge 143:86740a56073b 478 * @param IoPinConnect This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 479 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
AnnaBridge 143:86740a56073b 480 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
AnnaBridge 143:86740a56073b 481 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
AnnaBridge 143:86740a56073b 482 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
AnnaBridge 143:86740a56073b 483 * @retval None
AnnaBridge 143:86740a56073b 484 */
AnnaBridge 143:86740a56073b 485 __STATIC_INLINE void LL_SYSCFG_VREFINT_SetConnection(uint32_t IoPinConnect)
AnnaBridge 143:86740a56073b 486 {
AnnaBridge 143:86740a56073b 487 MODIFY_REG(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT, IoPinConnect);
AnnaBridge 143:86740a56073b 488 }
AnnaBridge 143:86740a56073b 489
AnnaBridge 143:86740a56073b 490 /**
AnnaBridge 143:86740a56073b 491 * @brief Get pad connection to VREFINT_ADC
AnnaBridge 143:86740a56073b 492 * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT LL_SYSCFG_VREFINT_GetConnection
AnnaBridge 143:86740a56073b 493 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 494 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
AnnaBridge 143:86740a56073b 495 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
AnnaBridge 143:86740a56073b 496 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
AnnaBridge 143:86740a56073b 497 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
AnnaBridge 143:86740a56073b 498 */
AnnaBridge 143:86740a56073b 499 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_GetConnection(void)
AnnaBridge 143:86740a56073b 500 {
AnnaBridge 143:86740a56073b 501 return (uint32_t)(READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT));
AnnaBridge 143:86740a56073b 502 }
AnnaBridge 143:86740a56073b 503
AnnaBridge 143:86740a56073b 504 /**
AnnaBridge 143:86740a56073b 505 * @brief Buffer used to generate VREFINT reference for ADC enable
AnnaBridge 143:86740a56073b 506 * @note The VrefInit buffer to ADC through internal path is also
AnnaBridge 143:86740a56073b 507 * enabled using function LL_ADC_SetCommonPathInternalCh()
AnnaBridge 143:86740a56073b 508 * with parameter LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge 143:86740a56073b 509 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC LL_SYSCFG_VREFINT_EnableADC
AnnaBridge 143:86740a56073b 510 * @retval None
AnnaBridge 143:86740a56073b 511 */
AnnaBridge 143:86740a56073b 512 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableADC(void)
AnnaBridge 143:86740a56073b 513 {
AnnaBridge 143:86740a56073b 514 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
AnnaBridge 143:86740a56073b 515 }
AnnaBridge 143:86740a56073b 516
AnnaBridge 143:86740a56073b 517 /**
AnnaBridge 143:86740a56073b 518 * @brief Buffer used to generate VREFINT reference for ADC disable
AnnaBridge 143:86740a56073b 519 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC LL_SYSCFG_VREFINT_DisableADC
AnnaBridge 143:86740a56073b 520 * @retval None
AnnaBridge 143:86740a56073b 521 */
AnnaBridge 143:86740a56073b 522 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableADC(void)
AnnaBridge 143:86740a56073b 523 {
AnnaBridge 143:86740a56073b 524 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
AnnaBridge 143:86740a56073b 525 }
AnnaBridge 143:86740a56073b 526
AnnaBridge 143:86740a56073b 527 /**
AnnaBridge 143:86740a56073b 528 * @brief Buffer used to generate temperature sensor reference for ADC enable
AnnaBridge 143:86740a56073b 529 * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC LL_SYSCFG_TEMPSENSOR_Enable
AnnaBridge 143:86740a56073b 530 * @retval None
AnnaBridge 143:86740a56073b 531 */
AnnaBridge 143:86740a56073b 532 __STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Enable(void)
AnnaBridge 143:86740a56073b 533 {
AnnaBridge 143:86740a56073b 534 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
AnnaBridge 143:86740a56073b 535 }
AnnaBridge 143:86740a56073b 536
AnnaBridge 143:86740a56073b 537 /**
AnnaBridge 143:86740a56073b 538 * @brief Buffer used to generate temperature sensor reference for ADC disable
AnnaBridge 143:86740a56073b 539 * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC LL_SYSCFG_TEMPSENSOR_Disable
AnnaBridge 143:86740a56073b 540 * @retval None
AnnaBridge 143:86740a56073b 541 */
AnnaBridge 143:86740a56073b 542 __STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Disable(void)
AnnaBridge 143:86740a56073b 543 {
AnnaBridge 143:86740a56073b 544 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
AnnaBridge 143:86740a56073b 545 }
AnnaBridge 143:86740a56073b 546
AnnaBridge 143:86740a56073b 547 /**
AnnaBridge 143:86740a56073b 548 * @brief Buffer used to generate VREFINT reference for comparator enable
AnnaBridge 143:86740a56073b 549 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP LL_SYSCFG_VREFINT_EnableCOMP
AnnaBridge 143:86740a56073b 550 * @retval None
AnnaBridge 143:86740a56073b 551 */
AnnaBridge 143:86740a56073b 552 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableCOMP(void)
AnnaBridge 143:86740a56073b 553 {
AnnaBridge 143:86740a56073b 554 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
AnnaBridge 143:86740a56073b 555 }
AnnaBridge 143:86740a56073b 556
AnnaBridge 143:86740a56073b 557 /**
AnnaBridge 143:86740a56073b 558 * @brief Buffer used to generate VREFINT reference for comparator disable
AnnaBridge 143:86740a56073b 559 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP LL_SYSCFG_VREFINT_DisableCOMP
AnnaBridge 143:86740a56073b 560 * @retval None
AnnaBridge 143:86740a56073b 561 */
AnnaBridge 143:86740a56073b 562 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableCOMP(void)
AnnaBridge 143:86740a56073b 563 {
AnnaBridge 143:86740a56073b 564 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
AnnaBridge 143:86740a56073b 565 }
AnnaBridge 143:86740a56073b 566
AnnaBridge 143:86740a56073b 567 #if defined (RCC_HSI48_SUPPORT)
AnnaBridge 143:86740a56073b 568 /**
AnnaBridge 143:86740a56073b 569 * @brief Buffer used to generate VREFINT reference for HSI48 oscillator enable
AnnaBridge 143:86740a56073b 570 * @rmtoll SYSCFG_CFGR3 ENREF_HSI48 LL_SYSCFG_VREFINT_EnableHSI48
AnnaBridge 143:86740a56073b 571 * @retval None
AnnaBridge 143:86740a56073b 572 */
AnnaBridge 143:86740a56073b 573 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableHSI48(void)
AnnaBridge 143:86740a56073b 574 {
AnnaBridge 143:86740a56073b 575 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
AnnaBridge 143:86740a56073b 576 }
AnnaBridge 143:86740a56073b 577
AnnaBridge 143:86740a56073b 578 /**
AnnaBridge 143:86740a56073b 579 * @brief Buffer used to generate VREFINT reference for HSI48 oscillator disable
AnnaBridge 143:86740a56073b 580 * @rmtoll SYSCFG_CFGR3 ENREF_HSI48 LL_SYSCFG_VREFINT_DisableHSI48
AnnaBridge 143:86740a56073b 581 * @retval None
AnnaBridge 143:86740a56073b 582 */
AnnaBridge 143:86740a56073b 583 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableHSI48(void)
AnnaBridge 143:86740a56073b 584 {
AnnaBridge 143:86740a56073b 585 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
AnnaBridge 143:86740a56073b 586 }
AnnaBridge 143:86740a56073b 587 #endif
AnnaBridge 143:86740a56073b 588
AnnaBridge 143:86740a56073b 589 /**
AnnaBridge 143:86740a56073b 590 * @brief Check if VREFINT is ready or not
AnnaBridge 143:86740a56073b 591 * @note When set, it indicates that VREFINT is available for BOR, PVD and LCD
AnnaBridge 143:86740a56073b 592 * @rmtoll SYSCFG_CFGR3 VREFINT_RDYF LL_SYSCFG_VREFINT_IsReady
AnnaBridge 143:86740a56073b 593 * @retval State of bit (1 or 0).
AnnaBridge 143:86740a56073b 594 */
AnnaBridge 143:86740a56073b 595 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsReady(void)
AnnaBridge 143:86740a56073b 596 {
AnnaBridge 143:86740a56073b 597 return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF) == SYSCFG_CFGR3_VREFINT_RDYF);
AnnaBridge 143:86740a56073b 598 }
AnnaBridge 143:86740a56073b 599
AnnaBridge 143:86740a56073b 600 /**
AnnaBridge 143:86740a56073b 601 * @brief Lock the whole content of SYSCFG_CFGR3 register
AnnaBridge 143:86740a56073b 602 * @note After SYSCFG_CFGR3 register lock, only read access available.
AnnaBridge 143:86740a56073b 603 * Only system hardware reset unlocks SYSCFG_CFGR3 register.
AnnaBridge 143:86740a56073b 604 * @rmtoll SYSCFG_CFGR3 REF_LOCK LL_SYSCFG_VREFINT_Lock
AnnaBridge 143:86740a56073b 605 * @retval None
AnnaBridge 143:86740a56073b 606 */
AnnaBridge 143:86740a56073b 607 __STATIC_INLINE void LL_SYSCFG_VREFINT_Lock(void)
AnnaBridge 143:86740a56073b 608 {
AnnaBridge 143:86740a56073b 609 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK);
AnnaBridge 143:86740a56073b 610 }
AnnaBridge 143:86740a56073b 611
AnnaBridge 143:86740a56073b 612 /**
AnnaBridge 143:86740a56073b 613 * @brief Check if SYSCFG_CFGR3 register is locked (only read access) or not
AnnaBridge 143:86740a56073b 614 * @note When set, it indicates that SYSCFG_CFGR3 register is locked, only read access available
AnnaBridge 143:86740a56073b 615 * @rmtoll SYSCFG_CFGR3 REF_LOCK LL_SYSCFG_VREFINT_IsLocked
AnnaBridge 143:86740a56073b 616 * @retval State of bit (1 or 0).
AnnaBridge 143:86740a56073b 617 */
AnnaBridge 143:86740a56073b 618 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsLocked(void)
AnnaBridge 143:86740a56073b 619 {
AnnaBridge 143:86740a56073b 620 return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK) == SYSCFG_CFGR3_REF_LOCK);
AnnaBridge 143:86740a56073b 621 }
AnnaBridge 143:86740a56073b 622
AnnaBridge 143:86740a56073b 623 /**
AnnaBridge 143:86740a56073b 624 * @brief Configure source input for the EXTI external interrupt.
AnnaBridge 143:86740a56073b 625 * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 626 * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 627 * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 628 * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 629 * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 630 * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 631 * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 632 * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 633 * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 634 * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 635 * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 636 * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 637 * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 638 * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 639 * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 640 * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_SetEXTISource
AnnaBridge 143:86740a56073b 641 * @param Port This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 642 * @arg @ref LL_SYSCFG_EXTI_PORTA
AnnaBridge 143:86740a56073b 643 * @arg @ref LL_SYSCFG_EXTI_PORTB
AnnaBridge 143:86740a56073b 644 * @arg @ref LL_SYSCFG_EXTI_PORTC
AnnaBridge 143:86740a56073b 645 * @arg @ref LL_SYSCFG_EXTI_PORTD (*)
AnnaBridge 143:86740a56073b 646 * @arg @ref LL_SYSCFG_EXTI_PORTE (*)
AnnaBridge 143:86740a56073b 647 * @arg @ref LL_SYSCFG_EXTI_PORTH (*)
AnnaBridge 143:86740a56073b 648 *
AnnaBridge 143:86740a56073b 649 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 650 * @param Line This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 651 * @arg @ref LL_SYSCFG_EXTI_LINE0
AnnaBridge 143:86740a56073b 652 * @arg @ref LL_SYSCFG_EXTI_LINE1
AnnaBridge 143:86740a56073b 653 * @arg @ref LL_SYSCFG_EXTI_LINE2
AnnaBridge 143:86740a56073b 654 * @arg @ref LL_SYSCFG_EXTI_LINE3
AnnaBridge 143:86740a56073b 655 * @arg @ref LL_SYSCFG_EXTI_LINE4
AnnaBridge 143:86740a56073b 656 * @arg @ref LL_SYSCFG_EXTI_LINE5
AnnaBridge 143:86740a56073b 657 * @arg @ref LL_SYSCFG_EXTI_LINE6
AnnaBridge 143:86740a56073b 658 * @arg @ref LL_SYSCFG_EXTI_LINE7
AnnaBridge 143:86740a56073b 659 * @arg @ref LL_SYSCFG_EXTI_LINE8
AnnaBridge 143:86740a56073b 660 * @arg @ref LL_SYSCFG_EXTI_LINE9
AnnaBridge 143:86740a56073b 661 * @arg @ref LL_SYSCFG_EXTI_LINE10
AnnaBridge 143:86740a56073b 662 * @arg @ref LL_SYSCFG_EXTI_LINE11
AnnaBridge 143:86740a56073b 663 * @arg @ref LL_SYSCFG_EXTI_LINE12
AnnaBridge 143:86740a56073b 664 * @arg @ref LL_SYSCFG_EXTI_LINE13
AnnaBridge 143:86740a56073b 665 * @arg @ref LL_SYSCFG_EXTI_LINE14
AnnaBridge 143:86740a56073b 666 * @arg @ref LL_SYSCFG_EXTI_LINE15
AnnaBridge 143:86740a56073b 667 * @retval None
AnnaBridge 143:86740a56073b 668 */
AnnaBridge 143:86740a56073b 669 __STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line)
AnnaBridge 143:86740a56073b 670 {
AnnaBridge 143:86740a56073b 671 MODIFY_REG(SYSCFG->EXTICR[Line & 0xFFU], SYSCFG_EXTICR1_EXTI0 << (Line >> 16U), Port << (Line >> 16U));
AnnaBridge 143:86740a56073b 672 }
AnnaBridge 143:86740a56073b 673
AnnaBridge 143:86740a56073b 674 /**
AnnaBridge 143:86740a56073b 675 * @brief Get the configured defined for specific EXTI Line
AnnaBridge 143:86740a56073b 676 * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 677 * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 678 * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 679 * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 680 * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 681 * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 682 * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 683 * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 684 * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 685 * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 686 * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 687 * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 688 * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 689 * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 690 * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_SetEXTISource\n
AnnaBridge 143:86740a56073b 691 * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_SetEXTISource
AnnaBridge 143:86740a56073b 692 * @param Line This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 693 * @arg @ref LL_SYSCFG_EXTI_LINE0
AnnaBridge 143:86740a56073b 694 * @arg @ref LL_SYSCFG_EXTI_LINE1
AnnaBridge 143:86740a56073b 695 * @arg @ref LL_SYSCFG_EXTI_LINE2
AnnaBridge 143:86740a56073b 696 * @arg @ref LL_SYSCFG_EXTI_LINE3
AnnaBridge 143:86740a56073b 697 * @arg @ref LL_SYSCFG_EXTI_LINE4
AnnaBridge 143:86740a56073b 698 * @arg @ref LL_SYSCFG_EXTI_LINE5
AnnaBridge 143:86740a56073b 699 * @arg @ref LL_SYSCFG_EXTI_LINE6
AnnaBridge 143:86740a56073b 700 * @arg @ref LL_SYSCFG_EXTI_LINE7
AnnaBridge 143:86740a56073b 701 * @arg @ref LL_SYSCFG_EXTI_LINE8
AnnaBridge 143:86740a56073b 702 * @arg @ref LL_SYSCFG_EXTI_LINE9
AnnaBridge 143:86740a56073b 703 * @arg @ref LL_SYSCFG_EXTI_LINE10
AnnaBridge 143:86740a56073b 704 * @arg @ref LL_SYSCFG_EXTI_LINE11
AnnaBridge 143:86740a56073b 705 * @arg @ref LL_SYSCFG_EXTI_LINE12
AnnaBridge 143:86740a56073b 706 * @arg @ref LL_SYSCFG_EXTI_LINE13
AnnaBridge 143:86740a56073b 707 * @arg @ref LL_SYSCFG_EXTI_LINE14
AnnaBridge 143:86740a56073b 708 * @arg @ref LL_SYSCFG_EXTI_LINE15
AnnaBridge 143:86740a56073b 709 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 710 * @arg @ref LL_SYSCFG_EXTI_PORTA
AnnaBridge 143:86740a56073b 711 * @arg @ref LL_SYSCFG_EXTI_PORTB
AnnaBridge 143:86740a56073b 712 * @arg @ref LL_SYSCFG_EXTI_PORTC
AnnaBridge 143:86740a56073b 713 * @arg @ref LL_SYSCFG_EXTI_PORTD (*)
AnnaBridge 143:86740a56073b 714 * @arg @ref LL_SYSCFG_EXTI_PORTE (*)
AnnaBridge 143:86740a56073b 715 * @arg @ref LL_SYSCFG_EXTI_PORTH (*)
AnnaBridge 143:86740a56073b 716 *
AnnaBridge 143:86740a56073b 717 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 718 */
AnnaBridge 143:86740a56073b 719 __STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line)
AnnaBridge 143:86740a56073b 720 {
AnnaBridge 143:86740a56073b 721 return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFFU], (SYSCFG_EXTICR1_EXTI0 << (Line >> 16U))) >> (Line >> 16U));
AnnaBridge 143:86740a56073b 722 }
AnnaBridge 143:86740a56073b 723
AnnaBridge 143:86740a56073b 724
AnnaBridge 143:86740a56073b 725 /**
AnnaBridge 143:86740a56073b 726 * @}
AnnaBridge 143:86740a56073b 727 */
AnnaBridge 143:86740a56073b 728
AnnaBridge 143:86740a56073b 729
AnnaBridge 143:86740a56073b 730 /** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
AnnaBridge 143:86740a56073b 731 * @{
AnnaBridge 143:86740a56073b 732 */
AnnaBridge 143:86740a56073b 733
AnnaBridge 143:86740a56073b 734 /**
AnnaBridge 143:86740a56073b 735 * @brief Return the device identifier
AnnaBridge 143:86740a56073b 736 * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID
AnnaBridge 143:86740a56073b 737 * @retval Values between Min_Data=0x00 and Max_Data=0x7FF (ex: L053 -> 0x417, L073 -> 0x447)
AnnaBridge 143:86740a56073b 738 */
AnnaBridge 143:86740a56073b 739 __STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
AnnaBridge 143:86740a56073b 740 {
AnnaBridge 143:86740a56073b 741 return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
AnnaBridge 143:86740a56073b 742 }
AnnaBridge 143:86740a56073b 743
AnnaBridge 143:86740a56073b 744 /**
AnnaBridge 143:86740a56073b 745 * @brief Return the device revision identifier
AnnaBridge 143:86740a56073b 746 * @note This field indicates the revision of the device.
AnnaBridge 143:86740a56073b 747 * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID
AnnaBridge 143:86740a56073b 748 * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 143:86740a56073b 749 */
AnnaBridge 143:86740a56073b 750 __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
AnnaBridge 143:86740a56073b 751 {
AnnaBridge 143:86740a56073b 752 return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_REVID_POSITION);
AnnaBridge 143:86740a56073b 753 }
AnnaBridge 143:86740a56073b 754
AnnaBridge 143:86740a56073b 755 /**
AnnaBridge 143:86740a56073b 756 * @brief Enable the Debug Module during SLEEP mode
AnnaBridge 143:86740a56073b 757 * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode
AnnaBridge 143:86740a56073b 758 * @retval None
AnnaBridge 143:86740a56073b 759 */
AnnaBridge 143:86740a56073b 760 __STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
AnnaBridge 143:86740a56073b 761 {
AnnaBridge 143:86740a56073b 762 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
AnnaBridge 143:86740a56073b 763 }
AnnaBridge 143:86740a56073b 764
AnnaBridge 143:86740a56073b 765 /**
AnnaBridge 143:86740a56073b 766 * @brief Disable the Debug Module during SLEEP mode
AnnaBridge 143:86740a56073b 767 * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode
AnnaBridge 143:86740a56073b 768 * @retval None
AnnaBridge 143:86740a56073b 769 */
AnnaBridge 143:86740a56073b 770 __STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
AnnaBridge 143:86740a56073b 771 {
AnnaBridge 143:86740a56073b 772 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
AnnaBridge 143:86740a56073b 773 }
AnnaBridge 143:86740a56073b 774
AnnaBridge 143:86740a56073b 775 /**
AnnaBridge 143:86740a56073b 776 * @brief Enable the Debug Module during STOP mode
AnnaBridge 143:86740a56073b 777 * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode
AnnaBridge 143:86740a56073b 778 * @retval None
AnnaBridge 143:86740a56073b 779 */
AnnaBridge 143:86740a56073b 780 __STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
AnnaBridge 143:86740a56073b 781 {
AnnaBridge 143:86740a56073b 782 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
AnnaBridge 143:86740a56073b 783 }
AnnaBridge 143:86740a56073b 784
AnnaBridge 143:86740a56073b 785 /**
AnnaBridge 143:86740a56073b 786 * @brief Disable the Debug Module during STOP mode
AnnaBridge 143:86740a56073b 787 * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode
AnnaBridge 143:86740a56073b 788 * @retval None
AnnaBridge 143:86740a56073b 789 */
AnnaBridge 143:86740a56073b 790 __STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
AnnaBridge 143:86740a56073b 791 {
AnnaBridge 143:86740a56073b 792 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
AnnaBridge 143:86740a56073b 793 }
AnnaBridge 143:86740a56073b 794
AnnaBridge 143:86740a56073b 795 /**
AnnaBridge 143:86740a56073b 796 * @brief Enable the Debug Module during STANDBY mode
AnnaBridge 143:86740a56073b 797 * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode
AnnaBridge 143:86740a56073b 798 * @retval None
AnnaBridge 143:86740a56073b 799 */
AnnaBridge 143:86740a56073b 800 __STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
AnnaBridge 143:86740a56073b 801 {
AnnaBridge 143:86740a56073b 802 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
AnnaBridge 143:86740a56073b 803 }
AnnaBridge 143:86740a56073b 804
AnnaBridge 143:86740a56073b 805 /**
AnnaBridge 143:86740a56073b 806 * @brief Disable the Debug Module during STANDBY mode
AnnaBridge 143:86740a56073b 807 * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode
AnnaBridge 143:86740a56073b 808 * @retval None
AnnaBridge 143:86740a56073b 809 */
AnnaBridge 143:86740a56073b 810 __STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
AnnaBridge 143:86740a56073b 811 {
AnnaBridge 143:86740a56073b 812 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
AnnaBridge 143:86740a56073b 813 }
AnnaBridge 143:86740a56073b 814
AnnaBridge 143:86740a56073b 815 /**
AnnaBridge 143:86740a56073b 816 * @brief Freeze APB1 peripherals (group1 peripherals)
AnnaBridge 167:84c0a372a020 817 * @rmtoll APB1FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 818 * APB1FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 819 * APB1FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 820 * APB1FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 821 * APB1FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 822 * APB1FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 823 * APB1FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 824 * APB1FZ DBG_I2C1_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 825 * APB1FZ DBG_I2C2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 826 * APB1FZ DBG_I2C3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 827 * APB1FZ DBG_LPTIMER_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph
AnnaBridge 143:86740a56073b 828 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 167:84c0a372a020 829 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
AnnaBridge 167:84c0a372a020 830 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
AnnaBridge 167:84c0a372a020 831 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
AnnaBridge 167:84c0a372a020 832 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
AnnaBridge 167:84c0a372a020 833 * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
AnnaBridge 167:84c0a372a020 834 * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
AnnaBridge 167:84c0a372a020 835 * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
AnnaBridge 167:84c0a372a020 836 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
AnnaBridge 167:84c0a372a020 837 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
AnnaBridge 167:84c0a372a020 838 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
AnnaBridge 167:84c0a372a020 839 * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
AnnaBridge 143:86740a56073b 840 *
AnnaBridge 143:86740a56073b 841 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 842 * @retval None
AnnaBridge 143:86740a56073b 843 */
AnnaBridge 167:84c0a372a020 844 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
AnnaBridge 143:86740a56073b 845 {
AnnaBridge 143:86740a56073b 846 SET_BIT(DBGMCU->APB1FZ, Periphs);
AnnaBridge 143:86740a56073b 847 }
AnnaBridge 143:86740a56073b 848
AnnaBridge 143:86740a56073b 849 /**
AnnaBridge 143:86740a56073b 850 * @brief Unfreeze APB1 peripherals (group1 peripherals)
AnnaBridge 167:84c0a372a020 851 * @rmtoll APB1FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 852 * APB1FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 853 * APB1FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 854 * APB1FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 855 * APB1FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 856 * APB1FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 857 * APB1FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 858 * APB1FZ DBG_I2C1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 859 * APB1FZ DBG_I2C2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 860 * APB1FZ DBG_I2C3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 861 * APB1FZ DBG_LPTIMER_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph
AnnaBridge 143:86740a56073b 862 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 167:84c0a372a020 863 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
AnnaBridge 167:84c0a372a020 864 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
AnnaBridge 167:84c0a372a020 865 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
AnnaBridge 167:84c0a372a020 866 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
AnnaBridge 167:84c0a372a020 867 * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
AnnaBridge 167:84c0a372a020 868 * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
AnnaBridge 167:84c0a372a020 869 * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
AnnaBridge 167:84c0a372a020 870 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
AnnaBridge 167:84c0a372a020 871 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
AnnaBridge 167:84c0a372a020 872 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
AnnaBridge 167:84c0a372a020 873 * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
AnnaBridge 143:86740a56073b 874 *
AnnaBridge 143:86740a56073b 875 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 876 * @retval None
AnnaBridge 143:86740a56073b 877 */
AnnaBridge 167:84c0a372a020 878 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
AnnaBridge 143:86740a56073b 879 {
AnnaBridge 143:86740a56073b 880 CLEAR_BIT(DBGMCU->APB1FZ, Periphs);
AnnaBridge 143:86740a56073b 881 }
AnnaBridge 143:86740a56073b 882
AnnaBridge 143:86740a56073b 883 /**
AnnaBridge 143:86740a56073b 884 * @brief Freeze APB2 peripherals
AnnaBridge 167:84c0a372a020 885 * @rmtoll APB2FZ DBG_TIM22_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
AnnaBridge 167:84c0a372a020 886 * APB2FZ DBG_TIM21_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph
AnnaBridge 143:86740a56073b 887 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 167:84c0a372a020 888 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
AnnaBridge 167:84c0a372a020 889 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
AnnaBridge 143:86740a56073b 890 *
AnnaBridge 143:86740a56073b 891 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 892 * @retval None
AnnaBridge 143:86740a56073b 893 */
AnnaBridge 167:84c0a372a020 894 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
AnnaBridge 143:86740a56073b 895 {
AnnaBridge 143:86740a56073b 896 SET_BIT(DBGMCU->APB2FZ, Periphs);
AnnaBridge 143:86740a56073b 897 }
AnnaBridge 143:86740a56073b 898
AnnaBridge 143:86740a56073b 899 /**
AnnaBridge 143:86740a56073b 900 * @brief Unfreeze APB2 peripherals
AnnaBridge 167:84c0a372a020 901 * @rmtoll APB2FZ DBG_TIM22_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
AnnaBridge 167:84c0a372a020 902 * APB2FZ DBG_TIM21_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph
AnnaBridge 143:86740a56073b 903 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 167:84c0a372a020 904 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
AnnaBridge 167:84c0a372a020 905 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
AnnaBridge 143:86740a56073b 906 *
AnnaBridge 143:86740a56073b 907 * (*) value not defined in all devices
AnnaBridge 143:86740a56073b 908 * @retval None
AnnaBridge 143:86740a56073b 909 */
AnnaBridge 167:84c0a372a020 910 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
AnnaBridge 143:86740a56073b 911 {
AnnaBridge 143:86740a56073b 912 CLEAR_BIT(DBGMCU->APB2FZ, Periphs);
AnnaBridge 143:86740a56073b 913 }
AnnaBridge 143:86740a56073b 914
AnnaBridge 143:86740a56073b 915 /**
AnnaBridge 143:86740a56073b 916 * @}
AnnaBridge 143:86740a56073b 917 */
AnnaBridge 143:86740a56073b 918
AnnaBridge 143:86740a56073b 919 /** @defgroup SYSTEM_LL_EF_FLASH FLASH
AnnaBridge 143:86740a56073b 920 * @{
AnnaBridge 143:86740a56073b 921 */
AnnaBridge 143:86740a56073b 922
AnnaBridge 143:86740a56073b 923 /**
AnnaBridge 143:86740a56073b 924 * @brief Set FLASH Latency
AnnaBridge 143:86740a56073b 925 * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency
AnnaBridge 143:86740a56073b 926 * @param Latency This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 927 * @arg @ref LL_FLASH_LATENCY_0
AnnaBridge 143:86740a56073b 928 * @arg @ref LL_FLASH_LATENCY_1
AnnaBridge 143:86740a56073b 929 * @retval None
AnnaBridge 143:86740a56073b 930 */
AnnaBridge 143:86740a56073b 931 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
AnnaBridge 143:86740a56073b 932 {
AnnaBridge 143:86740a56073b 933 MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
AnnaBridge 143:86740a56073b 934 }
AnnaBridge 143:86740a56073b 935
AnnaBridge 143:86740a56073b 936 /**
AnnaBridge 143:86740a56073b 937 * @brief Get FLASH Latency
AnnaBridge 143:86740a56073b 938 * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency
AnnaBridge 143:86740a56073b 939 * @retval Returned value can be one of the following values:
AnnaBridge 143:86740a56073b 940 * @arg @ref LL_FLASH_LATENCY_0
AnnaBridge 143:86740a56073b 941 * @arg @ref LL_FLASH_LATENCY_1
AnnaBridge 143:86740a56073b 942 */
AnnaBridge 143:86740a56073b 943 __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
AnnaBridge 143:86740a56073b 944 {
AnnaBridge 143:86740a56073b 945 return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
AnnaBridge 143:86740a56073b 946 }
AnnaBridge 143:86740a56073b 947
AnnaBridge 143:86740a56073b 948 /**
AnnaBridge 143:86740a56073b 949 * @brief Enable Prefetch
AnnaBridge 143:86740a56073b 950 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch
AnnaBridge 143:86740a56073b 951 * @retval None
AnnaBridge 143:86740a56073b 952 */
AnnaBridge 143:86740a56073b 953 __STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
AnnaBridge 143:86740a56073b 954 {
AnnaBridge 143:86740a56073b 955 SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
AnnaBridge 143:86740a56073b 956 }
AnnaBridge 143:86740a56073b 957
AnnaBridge 143:86740a56073b 958 /**
AnnaBridge 143:86740a56073b 959 * @brief Disable Prefetch
AnnaBridge 143:86740a56073b 960 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch
AnnaBridge 143:86740a56073b 961 * @retval None
AnnaBridge 143:86740a56073b 962 */
AnnaBridge 143:86740a56073b 963 __STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
AnnaBridge 143:86740a56073b 964 {
AnnaBridge 143:86740a56073b 965 CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
AnnaBridge 143:86740a56073b 966 }
AnnaBridge 143:86740a56073b 967
AnnaBridge 143:86740a56073b 968 /**
AnnaBridge 143:86740a56073b 969 * @brief Check if Prefetch buffer is enabled
AnnaBridge 143:86740a56073b 970 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled
AnnaBridge 143:86740a56073b 971 * @retval State of bit (1 or 0).
AnnaBridge 143:86740a56073b 972 */
AnnaBridge 143:86740a56073b 973 __STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
AnnaBridge 143:86740a56073b 974 {
AnnaBridge 143:86740a56073b 975 return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN));
AnnaBridge 143:86740a56073b 976 }
AnnaBridge 143:86740a56073b 977
AnnaBridge 143:86740a56073b 978
AnnaBridge 143:86740a56073b 979 /**
AnnaBridge 143:86740a56073b 980 * @brief Enable Flash Power-down mode during run mode or Low-power run mode
AnnaBridge 143:86740a56073b 981 * @note Flash memory can be put in power-down mode only when the code is executed
AnnaBridge 143:86740a56073b 982 * from RAM
AnnaBridge 143:86740a56073b 983 * @note Flash must not be accessed when power down is enabled
AnnaBridge 143:86740a56073b 984 * @note Flash must not be put in power-down while a program or an erase operation
AnnaBridge 143:86740a56073b 985 * is on-going
AnnaBridge 143:86740a56073b 986 * @rmtoll FLASH_ACR RUN_PD LL_FLASH_EnableRunPowerDown\n
AnnaBridge 143:86740a56073b 987 * FLASH_PDKEYR PDKEY1 LL_FLASH_EnableRunPowerDown\n
AnnaBridge 143:86740a56073b 988 * FLASH_PDKEYR PDKEY2 LL_FLASH_EnableRunPowerDown
AnnaBridge 143:86740a56073b 989 * @retval None
AnnaBridge 143:86740a56073b 990 */
AnnaBridge 143:86740a56073b 991 __STATIC_INLINE void LL_FLASH_EnableRunPowerDown(void)
AnnaBridge 143:86740a56073b 992 {
AnnaBridge 143:86740a56073b 993 /* Following values must be written consecutively to unlock the RUN_PD bit in
AnnaBridge 143:86740a56073b 994 FLASH_ACR */
AnnaBridge 143:86740a56073b 995 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
AnnaBridge 143:86740a56073b 996 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
AnnaBridge 143:86740a56073b 997 SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
AnnaBridge 143:86740a56073b 998 }
AnnaBridge 143:86740a56073b 999
AnnaBridge 143:86740a56073b 1000 /**
AnnaBridge 143:86740a56073b 1001 * @brief Disable Flash Power-down mode during run mode or Low-power run mode
AnnaBridge 143:86740a56073b 1002 * @rmtoll FLASH_ACR RUN_PD LL_FLASH_DisableRunPowerDown\n
AnnaBridge 143:86740a56073b 1003 * FLASH_PDKEYR PDKEY1 LL_FLASH_DisableRunPowerDown\n
AnnaBridge 143:86740a56073b 1004 * FLASH_PDKEYR PDKEY2 LL_FLASH_DisableRunPowerDown
AnnaBridge 143:86740a56073b 1005 * @retval None
AnnaBridge 143:86740a56073b 1006 */
AnnaBridge 143:86740a56073b 1007 __STATIC_INLINE void LL_FLASH_DisableRunPowerDown(void)
AnnaBridge 143:86740a56073b 1008 {
AnnaBridge 143:86740a56073b 1009 /* Following values must be written consecutively to unlock the RUN_PD bit in
AnnaBridge 143:86740a56073b 1010 FLASH_ACR */
AnnaBridge 143:86740a56073b 1011 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
AnnaBridge 143:86740a56073b 1012 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
AnnaBridge 143:86740a56073b 1013 CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
AnnaBridge 143:86740a56073b 1014 }
AnnaBridge 143:86740a56073b 1015
AnnaBridge 143:86740a56073b 1016 /**
AnnaBridge 143:86740a56073b 1017 * @brief Enable Flash Power-down mode during Sleep or Low-power sleep mode
AnnaBridge 143:86740a56073b 1018 * @note Flash must not be put in power-down while a program or an erase operation
AnnaBridge 143:86740a56073b 1019 * is on-going
AnnaBridge 143:86740a56073b 1020 * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_EnableSleepPowerDown
AnnaBridge 143:86740a56073b 1021 * @retval None
AnnaBridge 143:86740a56073b 1022 */
AnnaBridge 143:86740a56073b 1023 __STATIC_INLINE void LL_FLASH_EnableSleepPowerDown(void)
AnnaBridge 143:86740a56073b 1024 {
AnnaBridge 143:86740a56073b 1025 SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
AnnaBridge 143:86740a56073b 1026 }
AnnaBridge 143:86740a56073b 1027
AnnaBridge 143:86740a56073b 1028 /**
AnnaBridge 143:86740a56073b 1029 * @brief Disable Flash Power-down mode during Sleep or Low-power sleep mode
AnnaBridge 143:86740a56073b 1030 * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_DisableSleepPowerDown
AnnaBridge 143:86740a56073b 1031 * @retval None
AnnaBridge 143:86740a56073b 1032 */
AnnaBridge 143:86740a56073b 1033 __STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void)
AnnaBridge 143:86740a56073b 1034 {
AnnaBridge 143:86740a56073b 1035 CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
AnnaBridge 143:86740a56073b 1036 }
AnnaBridge 143:86740a56073b 1037
AnnaBridge 143:86740a56073b 1038 /**
AnnaBridge 143:86740a56073b 1039 * @brief Enable buffers used as a cache during read access
AnnaBridge 143:86740a56073b 1040 * @rmtoll FLASH_ACR DISAB_BUF LL_FLASH_EnableBuffers
AnnaBridge 143:86740a56073b 1041 * @retval None
AnnaBridge 143:86740a56073b 1042 */
AnnaBridge 143:86740a56073b 1043 __STATIC_INLINE void LL_FLASH_EnableBuffers(void)
AnnaBridge 143:86740a56073b 1044 {
AnnaBridge 143:86740a56073b 1045 CLEAR_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
AnnaBridge 143:86740a56073b 1046 }
AnnaBridge 143:86740a56073b 1047
AnnaBridge 143:86740a56073b 1048 /**
AnnaBridge 143:86740a56073b 1049 * @brief Disable buffers used as a cache during read access
AnnaBridge 143:86740a56073b 1050 * @note When disabled, every read will access the NVM even for
AnnaBridge 143:86740a56073b 1051 * an address already read (for example, the previous address).
AnnaBridge 143:86740a56073b 1052 * @rmtoll FLASH_ACR DISAB_BUF LL_FLASH_DisableBuffers
AnnaBridge 143:86740a56073b 1053 * @retval None
AnnaBridge 143:86740a56073b 1054 */
AnnaBridge 143:86740a56073b 1055 __STATIC_INLINE void LL_FLASH_DisableBuffers(void)
AnnaBridge 143:86740a56073b 1056 {
AnnaBridge 143:86740a56073b 1057 SET_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
AnnaBridge 143:86740a56073b 1058 }
AnnaBridge 143:86740a56073b 1059
AnnaBridge 143:86740a56073b 1060 /**
AnnaBridge 143:86740a56073b 1061 * @brief Enable pre-read
AnnaBridge 143:86740a56073b 1062 * @note When enabled, the memory interface stores the last address
AnnaBridge 143:86740a56073b 1063 * read as data and tries to read the next one when no other
AnnaBridge 143:86740a56073b 1064 * read or write or prefetch operation is ongoing.
AnnaBridge 143:86740a56073b 1065 * It is automatically disabled every time the buffers are disabled.
AnnaBridge 143:86740a56073b 1066 * @rmtoll FLASH_ACR PRE_READ LL_FLASH_EnablePreRead
AnnaBridge 143:86740a56073b 1067 * @retval None
AnnaBridge 143:86740a56073b 1068 */
AnnaBridge 143:86740a56073b 1069 __STATIC_INLINE void LL_FLASH_EnablePreRead(void)
AnnaBridge 143:86740a56073b 1070 {
AnnaBridge 143:86740a56073b 1071 SET_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
AnnaBridge 143:86740a56073b 1072 }
AnnaBridge 143:86740a56073b 1073
AnnaBridge 143:86740a56073b 1074 /**
AnnaBridge 143:86740a56073b 1075 * @brief Disable pre-read
AnnaBridge 143:86740a56073b 1076 * @rmtoll FLASH_ACR PRE_READ LL_FLASH_DisablePreRead
AnnaBridge 143:86740a56073b 1077 * @retval None
AnnaBridge 143:86740a56073b 1078 */
AnnaBridge 143:86740a56073b 1079 __STATIC_INLINE void LL_FLASH_DisablePreRead(void)
AnnaBridge 143:86740a56073b 1080 {
AnnaBridge 143:86740a56073b 1081 CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
AnnaBridge 143:86740a56073b 1082 }
AnnaBridge 143:86740a56073b 1083
AnnaBridge 143:86740a56073b 1084 /**
AnnaBridge 143:86740a56073b 1085 * @}
AnnaBridge 143:86740a56073b 1086 */
AnnaBridge 143:86740a56073b 1087
AnnaBridge 143:86740a56073b 1088 /**
AnnaBridge 143:86740a56073b 1089 * @}
AnnaBridge 143:86740a56073b 1090 */
AnnaBridge 143:86740a56073b 1091
AnnaBridge 143:86740a56073b 1092 /**
AnnaBridge 143:86740a56073b 1093 * @}
AnnaBridge 143:86740a56073b 1094 */
AnnaBridge 143:86740a56073b 1095
AnnaBridge 143:86740a56073b 1096 #endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */
AnnaBridge 143:86740a56073b 1097
AnnaBridge 143:86740a56073b 1098 /**
AnnaBridge 143:86740a56073b 1099 * @}
AnnaBridge 143:86740a56073b 1100 */
AnnaBridge 143:86740a56073b 1101
AnnaBridge 143:86740a56073b 1102 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 1103 }
AnnaBridge 143:86740a56073b 1104 #endif
AnnaBridge 143:86740a56073b 1105
AnnaBridge 143:86740a56073b 1106 #endif /* __STM32L0xx_LL_SYSTEM_H */
AnnaBridge 143:86740a56073b 1107
AnnaBridge 143:86740a56073b 1108 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/