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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_hal_uart.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_DISCO_L072CZ_LRWAN1/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_uart.h@167:84c0a372a020

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	143:86740a56073b	1	/**
AnnaBridge	143:86740a56073b	2	******************************************************************************
AnnaBridge	143:86740a56073b	3	* @file stm32l0xx_hal_uart.h
AnnaBridge	143:86740a56073b	4	* @author MCD Application Team
AnnaBridge	143:86740a56073b	5	* @brief Header file of UART HAL module.
AnnaBridge	143:86740a56073b	6	******************************************************************************
AnnaBridge	143:86740a56073b	7	* @attention
AnnaBridge	143:86740a56073b	8	*
AnnaBridge	143:86740a56073b	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	143:86740a56073b	10	*
AnnaBridge	143:86740a56073b	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	143:86740a56073b	12	* are permitted provided that the following conditions are met:
AnnaBridge	143:86740a56073b	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	143:86740a56073b	14	* this list of conditions and the following disclaimer.
AnnaBridge	143:86740a56073b	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	143:86740a56073b	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	143:86740a56073b	17	* and/or other materials provided with the distribution.
AnnaBridge	143:86740a56073b	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	143:86740a56073b	19	* may be used to endorse or promote products derived from this software
AnnaBridge	143:86740a56073b	20	* without specific prior written permission.
AnnaBridge	143:86740a56073b	21	*
AnnaBridge	143:86740a56073b	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	143:86740a56073b	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	143:86740a56073b	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	143:86740a56073b	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	143:86740a56073b	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	143:86740a56073b	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	143:86740a56073b	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	143:86740a56073b	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	143:86740a56073b	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	143:86740a56073b	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	143:86740a56073b	32	*
AnnaBridge	167:84c0a372a020	33	******************************************************************************
AnnaBridge	143:86740a56073b	34	*/
AnnaBridge	143:86740a56073b	35
AnnaBridge	143:86740a56073b	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	143:86740a56073b	37	#ifndef __STM32L0xx_HAL_UART_H
AnnaBridge	143:86740a56073b	38	#define __STM32L0xx_HAL_UART_H
AnnaBridge	143:86740a56073b	39
AnnaBridge	143:86740a56073b	40	#ifdef __cplusplus
AnnaBridge	143:86740a56073b	41	extern "C" {
AnnaBridge	143:86740a56073b	42	#endif
AnnaBridge	143:86740a56073b	43
AnnaBridge	143:86740a56073b	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	143:86740a56073b	45	#include "stm32l0xx_hal_def.h"
AnnaBridge	143:86740a56073b	46
AnnaBridge	143:86740a56073b	47	/** @addtogroup STM32L0xx_HAL_Driver
AnnaBridge	143:86740a56073b	48	* @{
AnnaBridge	143:86740a56073b	49	*/
AnnaBridge	143:86740a56073b	50
AnnaBridge	167:84c0a372a020	51	/** @addtogroup UART
AnnaBridge	143:86740a56073b	52	* @{
AnnaBridge	143:86740a56073b	53	*/
AnnaBridge	143:86740a56073b	54
AnnaBridge	167:84c0a372a020	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	167:84c0a372a020	56	/** @defgroup UART_Exported_Types UART Exported Types
AnnaBridge	143:86740a56073b	57	* @{
AnnaBridge	143:86740a56073b	58	*/
AnnaBridge	167:84c0a372a020	59
AnnaBridge	167:84c0a372a020	60	/**
AnnaBridge	167:84c0a372a020	61	* @brief UART Init Structure definition
AnnaBridge	167:84c0a372a020	62	*/
AnnaBridge	143:86740a56073b	63	typedef struct
AnnaBridge	143:86740a56073b	64	{
AnnaBridge	143:86740a56073b	65	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
AnnaBridge	143:86740a56073b	66	The baud rate register is computed using the following formula:
AnnaBridge	143:86740a56073b	67	- If oversampling is 16 or in LIN mode,
AnnaBridge	143:86740a56073b	68	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
AnnaBridge	143:86740a56073b	69	- If oversampling is 8,
AnnaBridge	167:84c0a372a020	70	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
AnnaBridge	143:86740a56073b	71	Baud Rate Register[3] = 0
AnnaBridge	143:86740a56073b	72	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
AnnaBridge	143:86740a56073b	73
AnnaBridge	143:86740a56073b	74	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge	167:84c0a372a020	75	This parameter can be a value of @ref UARTEx_Word_Length. */
AnnaBridge	143:86740a56073b	76
AnnaBridge	143:86740a56073b	77	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge	167:84c0a372a020	78	This parameter can be a value of @ref UART_Stop_Bits. */
AnnaBridge	143:86740a56073b	79
AnnaBridge	143:86740a56073b	80	uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge	143:86740a56073b	81	This parameter can be a value of @ref UART_Parity
AnnaBridge	143:86740a56073b	82	@note When parity is enabled, the computed parity is inserted
AnnaBridge	143:86740a56073b	83	at the MSB position of the transmitted data (9th bit when
AnnaBridge	143:86740a56073b	84	the word length is set to 9 data bits; 8th bit when the
AnnaBridge	143:86740a56073b	85	word length is set to 8 data bits). */
AnnaBridge	143:86740a56073b	86
AnnaBridge	167:84c0a372a020	87	uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
AnnaBridge	167:84c0a372a020	88	This parameter can be a value of @ref UART_Mode. */
AnnaBridge	167:84c0a372a020	89
AnnaBridge	167:84c0a372a020	90	uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
AnnaBridge	143:86740a56073b	91	or disabled.
AnnaBridge	167:84c0a372a020	92	This parameter can be a value of @ref UART_Hardware_Flow_Control. */
AnnaBridge	167:84c0a372a020	93
AnnaBridge	167:84c0a372a020	94	uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
AnnaBridge	167:84c0a372a020	95	This parameter can be a value of @ref UART_Over_Sampling. */
AnnaBridge	167:84c0a372a020	96
AnnaBridge	167:84c0a372a020	97	uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
AnnaBridge	143:86740a56073b	98	Selecting the single sample method increases the receiver tolerance to clock
AnnaBridge	167:84c0a372a020	99	deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
AnnaBridge	143:86740a56073b	100	}UART_InitTypeDef;
AnnaBridge	167:84c0a372a020	101
AnnaBridge	143:86740a56073b	102	/**
AnnaBridge	167:84c0a372a020	103	* @brief UART Advanced Features initalization structure definition
AnnaBridge	143:86740a56073b	104	*/
AnnaBridge	167:84c0a372a020	105	typedef struct
AnnaBridge	143:86740a56073b	106	{
AnnaBridge	143:86740a56073b	107	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
AnnaBridge	143:86740a56073b	108	Advanced Features may be initialized at the same time .
AnnaBridge	167:84c0a372a020	109	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
AnnaBridge	167:84c0a372a020	110
AnnaBridge	143:86740a56073b	111	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
AnnaBridge	167:84c0a372a020	112	This parameter can be a value of @ref UART_Tx_Inv. */
AnnaBridge	167:84c0a372a020	113
AnnaBridge	143:86740a56073b	114	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
AnnaBridge	167:84c0a372a020	115	This parameter can be a value of @ref UART_Rx_Inv. */
AnnaBridge	143:86740a56073b	116
AnnaBridge	143:86740a56073b	117	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
AnnaBridge	143:86740a56073b	118	vs negative/inverted logic).
AnnaBridge	167:84c0a372a020	119	This parameter can be a value of @ref UART_Data_Inv. */
AnnaBridge	167:84c0a372a020	120
AnnaBridge	167:84c0a372a020	121	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
AnnaBridge	167:84c0a372a020	122	This parameter can be a value of @ref UART_Rx_Tx_Swap. */
AnnaBridge	167:84c0a372a020	123
AnnaBridge	167:84c0a372a020	124	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
AnnaBridge	167:84c0a372a020	125	This parameter can be a value of @ref UART_Overrun_Disable. */
AnnaBridge	167:84c0a372a020	126
AnnaBridge	167:84c0a372a020	127	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
AnnaBridge	167:84c0a372a020	128	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
AnnaBridge	167:84c0a372a020	129
AnnaBridge	167:84c0a372a020	130	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
AnnaBridge	167:84c0a372a020	131	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
AnnaBridge	167:84c0a372a020	132
AnnaBridge	167:84c0a372a020	133	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
AnnaBridge	167:84c0a372a020	134	detection is carried out.
AnnaBridge	167:84c0a372a020	135	This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
AnnaBridge	167:84c0a372a020	136
AnnaBridge	167:84c0a372a020	137	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
AnnaBridge	167:84c0a372a020	138	This parameter can be a value of @ref UART_MSB_First. */
AnnaBridge	143:86740a56073b	139	} UART_AdvFeatureInitTypeDef;
AnnaBridge	167:84c0a372a020	140
AnnaBridge	167:84c0a372a020	141
AnnaBridge	143:86740a56073b	142
AnnaBridge	167:84c0a372a020	143	/**
AnnaBridge	167:84c0a372a020	144	* @brief HAL UART State structures definition
AnnaBridge	143:86740a56073b	145	* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge	167:84c0a372a020	146	* - gState contains UART state information related to global Handle management
AnnaBridge	143:86740a56073b	147	* and also information related to Tx operations.
AnnaBridge	143:86740a56073b	148	* gState value coding follow below described bitmap :
AnnaBridge	167:84c0a372a020	149	* b7-b6 Error information
AnnaBridge	143:86740a56073b	150	* 00 : No Error
AnnaBridge	143:86740a56073b	151	* 01 : (Not Used)
AnnaBridge	143:86740a56073b	152	* 10 : Timeout
AnnaBridge	143:86740a56073b	153	* 11 : Error
AnnaBridge	143:86740a56073b	154	* b5 IP initilisation status
AnnaBridge	143:86740a56073b	155	* 0 : Reset (IP not initialized)
AnnaBridge	143:86740a56073b	156	* 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge	143:86740a56073b	157	* b4-b3 (not used)
AnnaBridge	143:86740a56073b	158	* xx : Should be set to 00
AnnaBridge	143:86740a56073b	159	* b2 Intrinsic process state
AnnaBridge	143:86740a56073b	160	* 0 : Ready
AnnaBridge	143:86740a56073b	161	* 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge	143:86740a56073b	162	* b1 (not used)
AnnaBridge	143:86740a56073b	163	* x : Should be set to 0
AnnaBridge	143:86740a56073b	164	* b0 Tx state
AnnaBridge	143:86740a56073b	165	* 0 : Ready (no Tx operation ongoing)
AnnaBridge	143:86740a56073b	166	* 1 : Busy (Tx operation ongoing)
AnnaBridge	143:86740a56073b	167	* - RxState contains information related to Rx operations.
AnnaBridge	143:86740a56073b	168	* RxState value coding follow below described bitmap :
AnnaBridge	143:86740a56073b	169	* b7-b6 (not used)
AnnaBridge	143:86740a56073b	170	* xx : Should be set to 00
AnnaBridge	143:86740a56073b	171	* b5 IP initilisation status
AnnaBridge	143:86740a56073b	172	* 0 : Reset (IP not initialized)
AnnaBridge	143:86740a56073b	173	* 1 : Init done (IP not initialized)
AnnaBridge	143:86740a56073b	174	* b4-b2 (not used)
AnnaBridge	143:86740a56073b	175	* xxx : Should be set to 000
AnnaBridge	143:86740a56073b	176	* b1 Rx state
AnnaBridge	143:86740a56073b	177	* 0 : Ready (no Rx operation ongoing)
AnnaBridge	143:86740a56073b	178	* 1 : Busy (Rx operation ongoing)
AnnaBridge	143:86740a56073b	179	* b0 (not used)
AnnaBridge	143:86740a56073b	180	* x : Should be set to 0.
AnnaBridge	167:84c0a372a020	181	*/
AnnaBridge	143:86740a56073b	182	typedef enum
AnnaBridge	143:86740a56073b	183	{
AnnaBridge	167:84c0a372a020	184	HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
AnnaBridge	143:86740a56073b	185	Value is allowed for gState and RxState */
AnnaBridge	167:84c0a372a020	186	HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge	143:86740a56073b	187	Value is allowed for gState and RxState */
AnnaBridge	167:84c0a372a020	188	HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge	143:86740a56073b	189	Value is allowed for gState only */
AnnaBridge	167:84c0a372a020	190	HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge	143:86740a56073b	191	Value is allowed for gState only */
AnnaBridge	167:84c0a372a020	192	HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge	143:86740a56073b	193	Value is allowed for RxState only */
AnnaBridge	167:84c0a372a020	194	HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge	143:86740a56073b	195	Not to be used for neither gState nor RxState.
AnnaBridge	143:86740a56073b	196	Value is result of combination (Or) between gState and RxState values */
AnnaBridge	167:84c0a372a020	197	HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge	143:86740a56073b	198	Value is allowed for gState only */
AnnaBridge	167:84c0a372a020	199	HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge	143:86740a56073b	200	Value is allowed for gState only */
AnnaBridge	143:86740a56073b	201	}HAL_UART_StateTypeDef;
AnnaBridge	143:86740a56073b	202
AnnaBridge	143:86740a56073b	203	/**
AnnaBridge	167:84c0a372a020	204	* @brief HAL UART Error Code structure definition
AnnaBridge	143:86740a56073b	205	*/
AnnaBridge	167:84c0a372a020	206	typedef enum
AnnaBridge	167:84c0a372a020	207	{
AnnaBridge	167:84c0a372a020	208	HAL_UART_ERROR_NONE = 0x00, /!< No error /
AnnaBridge	167:84c0a372a020	209	HAL_UART_ERROR_PE = 0x01, /!< Parity error /
AnnaBridge	167:84c0a372a020	210	HAL_UART_ERROR_NE = 0x02, /!< Noise error /
AnnaBridge	167:84c0a372a020	211	HAL_UART_ERROR_FE = 0x04, /!< frame error /
AnnaBridge	167:84c0a372a020	212	HAL_UART_ERROR_ORE = 0x08, /!< Overrun error /
AnnaBridge	167:84c0a372a020	213	HAL_UART_ERROR_DMA = 0x10, /!< DMA transfer error /
AnnaBridge	167:84c0a372a020	214	HAL_UART_ERROR_BUSY = 0x20 /!< Busy Error /
AnnaBridge	167:84c0a372a020	215	}HAL_UART_ErrorTypeDef;
AnnaBridge	143:86740a56073b	216
AnnaBridge	143:86740a56073b	217	/**
AnnaBridge	143:86740a56073b	218	* @brief UART clock sources definition
AnnaBridge	143:86740a56073b	219	*/
AnnaBridge	143:86740a56073b	220	typedef enum
AnnaBridge	143:86740a56073b	221	{
AnnaBridge	167:84c0a372a020	222	UART_CLOCKSOURCE_PCLK1 = 0x00, /!< PCLK1 clock source /
AnnaBridge	167:84c0a372a020	223	UART_CLOCKSOURCE_PCLK2 = 0x01, /!< PCLK2 clock source /
AnnaBridge	167:84c0a372a020	224	UART_CLOCKSOURCE_HSI = 0x02, /!< HSI clock source /
AnnaBridge	167:84c0a372a020	225	UART_CLOCKSOURCE_SYSCLK = 0x04, /!< SYSCLK clock source /
AnnaBridge	167:84c0a372a020	226	UART_CLOCKSOURCE_LSE = 0x08, /!< LSE clock source /
AnnaBridge	167:84c0a372a020	227	UART_CLOCKSOURCE_UNDEFINED = 0x10 /!< Undefined clock source /
AnnaBridge	143:86740a56073b	228	}UART_ClockSourceTypeDef;
AnnaBridge	167:84c0a372a020	229
AnnaBridge	143:86740a56073b	230	/**
AnnaBridge	167:84c0a372a020	231	* @brief UART handle Structure definition
AnnaBridge	143:86740a56073b	232	*/
AnnaBridge	143:86740a56073b	233	typedef struct
AnnaBridge	143:86740a56073b	234	{
AnnaBridge	167:84c0a372a020	235	USART_TypeDef Instance; /!< UART registers base address */
AnnaBridge	143:86740a56073b	236
AnnaBridge	167:84c0a372a020	237	UART_InitTypeDef Init; /!< UART communication parameters /
AnnaBridge	143:86740a56073b	238
AnnaBridge	167:84c0a372a020	239	UART_AdvFeatureInitTypeDef AdvancedInit; /!< UART Advanced Features initialization parameters /
AnnaBridge	143:86740a56073b	240
AnnaBridge	167:84c0a372a020	241	uint8_t pTxBuffPtr; /!< Pointer to UART Tx transfer Buffer */
AnnaBridge	143:86740a56073b	242
AnnaBridge	167:84c0a372a020	243	uint16_t TxXferSize; /!< UART Tx Transfer size /
AnnaBridge	143:86740a56073b	244
AnnaBridge	167:84c0a372a020	245	__IO uint16_t TxXferCount; /!< UART Tx Transfer Counter /
AnnaBridge	143:86740a56073b	246
AnnaBridge	167:84c0a372a020	247	uint8_t pRxBuffPtr; /!< Pointer to UART Rx transfer Buffer */
AnnaBridge	143:86740a56073b	248
AnnaBridge	167:84c0a372a020	249	uint16_t RxXferSize; /!< UART Rx Transfer size /
AnnaBridge	143:86740a56073b	250
AnnaBridge	167:84c0a372a020	251	__IO uint16_t RxXferCount; /!< UART Rx Transfer Counter /
AnnaBridge	143:86740a56073b	252
AnnaBridge	167:84c0a372a020	253	uint16_t Mask; /!< UART Rx RDR register mask /
AnnaBridge	143:86740a56073b	254
AnnaBridge	167:84c0a372a020	255	DMA_HandleTypeDef hdmatx; /!< UART Tx DMA Handle parameters */
AnnaBridge	143:86740a56073b	256
AnnaBridge	167:84c0a372a020	257	DMA_HandleTypeDef hdmarx; /!< UART Rx DMA Handle parameters */
AnnaBridge	143:86740a56073b	258
AnnaBridge	167:84c0a372a020	259	HAL_LockTypeDef Lock; /!< Locking object /
AnnaBridge	143:86740a56073b	260
AnnaBridge	167:84c0a372a020	261	__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge	167:84c0a372a020	262	and also related to Tx operations.
AnnaBridge	167:84c0a372a020	263	This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge	143:86740a56073b	264
AnnaBridge	167:84c0a372a020	265	__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge	167:84c0a372a020	266	This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge	143:86740a56073b	267
AnnaBridge	167:84c0a372a020	268	__IO uint32_t ErrorCode; /!< UART Error code /
AnnaBridge	143:86740a56073b	269
AnnaBridge	143:86740a56073b	270	}UART_HandleTypeDef;
AnnaBridge	143:86740a56073b	271
AnnaBridge	143:86740a56073b	272	/**
AnnaBridge	143:86740a56073b	273	* @}
AnnaBridge	143:86740a56073b	274	*/
AnnaBridge	143:86740a56073b	275
AnnaBridge	143:86740a56073b	276	/* Exported constants --------------------------------------------------------*/
AnnaBridge	143:86740a56073b	277	/** @defgroup UART_Exported_Constants UART Exported Constants
AnnaBridge	143:86740a56073b	278	* @{
AnnaBridge	143:86740a56073b	279	*/
AnnaBridge	143:86740a56073b	280
AnnaBridge	167:84c0a372a020	281	/** @defgroup UART_Stop_Bits UART Number of Stop Bits
AnnaBridge	167:84c0a372a020	282	* @{
AnnaBridge	167:84c0a372a020	283	*/
AnnaBridge	167:84c0a372a020	284	#define UART_STOPBITS_1 ((uint32_t)0x00000000U) /!< UART frame with 1 stop bit /
AnnaBridge	167:84c0a372a020	285	#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 \| USART_CR2_STOP_1) /!< UART frame with 1.5 stop bits /
AnnaBridge	167:84c0a372a020	286	#define UART_STOPBITS_2 USART_CR2_STOP_1 /!< UART frame with 2 stop bits /
AnnaBridge	167:84c0a372a020	287	/**
AnnaBridge	167:84c0a372a020	288	* @}
AnnaBridge	167:84c0a372a020	289	*/
AnnaBridge	167:84c0a372a020	290
AnnaBridge	167:84c0a372a020	291	/** @defgroup UART_Parity UART Parity
AnnaBridge	143:86740a56073b	292	* @{
AnnaBridge	143:86740a56073b	293	*/
AnnaBridge	167:84c0a372a020	294	#define UART_PARITY_NONE ((uint32_t)0x00000000U) /!< No parity /
AnnaBridge	167:84c0a372a020	295	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /!< Even parity /
AnnaBridge	167:84c0a372a020	296	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS)) /!< Odd parity /
AnnaBridge	167:84c0a372a020	297	/**
AnnaBridge	167:84c0a372a020	298	* @}
AnnaBridge	167:84c0a372a020	299	*/
AnnaBridge	143:86740a56073b	300
AnnaBridge	167:84c0a372a020	301	/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
AnnaBridge	167:84c0a372a020	302	* @{
AnnaBridge	167:84c0a372a020	303	*/
AnnaBridge	167:84c0a372a020	304	#define UART_HWCONTROL_NONE ((uint32_t)0x00000000U) /!< No hardware control /
AnnaBridge	167:84c0a372a020	305	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /!< Request To Send /
AnnaBridge	167:84c0a372a020	306	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /!< Clear To Send /
AnnaBridge	167:84c0a372a020	307	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE)) /!< Request and Clear To Send /
AnnaBridge	143:86740a56073b	308	/**
AnnaBridge	143:86740a56073b	309	* @}
AnnaBridge	167:84c0a372a020	310	*/
AnnaBridge	143:86740a56073b	311
AnnaBridge	167:84c0a372a020	312	/** @defgroup UART_Mode UART Transfer Mode
AnnaBridge	143:86740a56073b	313	* @{
AnnaBridge	167:84c0a372a020	314	*/
AnnaBridge	167:84c0a372a020	315	#define UART_MODE_RX ((uint32_t)USART_CR1_RE) /!< RX mode /
AnnaBridge	167:84c0a372a020	316	#define UART_MODE_TX ((uint32_t)USART_CR1_TE) /!< TX mode /
AnnaBridge	167:84c0a372a020	317	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE)) /!< RX and TX mode /
AnnaBridge	167:84c0a372a020	318	/**
AnnaBridge	167:84c0a372a020	319	* @}
AnnaBridge	167:84c0a372a020	320	*/
AnnaBridge	167:84c0a372a020	321
AnnaBridge	167:84c0a372a020	322	/** @defgroup UART_State UART State
AnnaBridge	167:84c0a372a020	323	* @{
AnnaBridge	167:84c0a372a020	324	*/
AnnaBridge	167:84c0a372a020	325	#define UART_STATE_DISABLE ((uint32_t)0x00000000U) /!< UART disabled /
AnnaBridge	167:84c0a372a020	326	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /!< UART enabled /
AnnaBridge	143:86740a56073b	327	/**
AnnaBridge	143:86740a56073b	328	* @}
AnnaBridge	167:84c0a372a020	329	*/
AnnaBridge	143:86740a56073b	330
AnnaBridge	167:84c0a372a020	331	/** @defgroup UART_Over_Sampling UART Over Sampling
AnnaBridge	167:84c0a372a020	332	* @{
AnnaBridge	167:84c0a372a020	333	*/
AnnaBridge	167:84c0a372a020	334	#define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U) /!< Oversampling by 16 /
AnnaBridge	167:84c0a372a020	335	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /!< Oversampling by 8 /
AnnaBridge	167:84c0a372a020	336	/**
AnnaBridge	167:84c0a372a020	337	* @}
AnnaBridge	167:84c0a372a020	338	*/
AnnaBridge	167:84c0a372a020	339
AnnaBridge	167:84c0a372a020	340	/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
AnnaBridge	143:86740a56073b	341	* @{
AnnaBridge	167:84c0a372a020	342	*/
AnnaBridge	167:84c0a372a020	343	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U) /!< One-bit sampling disable /
AnnaBridge	167:84c0a372a020	344	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /!< One-bit sampling enable /
AnnaBridge	167:84c0a372a020	345	/**
AnnaBridge	167:84c0a372a020	346	* @}
AnnaBridge	167:84c0a372a020	347	*/
AnnaBridge	167:84c0a372a020	348
AnnaBridge	167:84c0a372a020	349	/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
AnnaBridge	167:84c0a372a020	350	* @{
AnnaBridge	167:84c0a372a020	351	*/
AnnaBridge	167:84c0a372a020	352	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /!< Auto Baud rate detection on start bit /
AnnaBridge	167:84c0a372a020	353	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
AnnaBridge	167:84c0a372a020	354	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /!< Auto Baud rate detection on 0x7F frame detection /
AnnaBridge	167:84c0a372a020	355	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /!< Auto Baud rate detection on 0x55 frame detection /
AnnaBridge	143:86740a56073b	356	/**
AnnaBridge	143:86740a56073b	357	* @}
AnnaBridge	143:86740a56073b	358	*/
AnnaBridge	143:86740a56073b	359
AnnaBridge	167:84c0a372a020	360	/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
AnnaBridge	167:84c0a372a020	361	* @{
AnnaBridge	167:84c0a372a020	362	*/
AnnaBridge	167:84c0a372a020	363	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000U) /!< UART receiver timeout disable /
AnnaBridge	167:84c0a372a020	364	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /!< UART receiver timeout enable /
AnnaBridge	167:84c0a372a020	365	/**
AnnaBridge	167:84c0a372a020	366	* @}
AnnaBridge	167:84c0a372a020	367	*/
AnnaBridge	167:84c0a372a020	368
AnnaBridge	167:84c0a372a020	369	/** @defgroup UART_LIN UART Local Interconnection Network mode
AnnaBridge	167:84c0a372a020	370	* @{
AnnaBridge	167:84c0a372a020	371	*/
AnnaBridge	167:84c0a372a020	372	#define UART_LIN_DISABLE ((uint32_t)0x00000000U) /!< Local Interconnect Network disable /
AnnaBridge	167:84c0a372a020	373	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /!< Local Interconnect Network enable /
AnnaBridge	167:84c0a372a020	374	/**
AnnaBridge	167:84c0a372a020	375	* @}
AnnaBridge	167:84c0a372a020	376	*/
AnnaBridge	167:84c0a372a020	377
AnnaBridge	167:84c0a372a020	378	/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
AnnaBridge	143:86740a56073b	379	* @{
AnnaBridge	167:84c0a372a020	380	*/
AnnaBridge	167:84c0a372a020	381	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U) /!< LIN 10-bit break detection length /
AnnaBridge	167:84c0a372a020	382	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /!< LIN 11-bit break detection length /
AnnaBridge	167:84c0a372a020	383	/**
AnnaBridge	167:84c0a372a020	384	* @}
AnnaBridge	167:84c0a372a020	385	*/
AnnaBridge	167:84c0a372a020	386
AnnaBridge	167:84c0a372a020	387	/** @defgroup UART_DMA_Tx UART DMA Tx
AnnaBridge	167:84c0a372a020	388	* @{
AnnaBridge	167:84c0a372a020	389	*/
AnnaBridge	167:84c0a372a020	390	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000U) /!< UART DMA TX disabled /
AnnaBridge	167:84c0a372a020	391	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /!< UART DMA TX enabled /
AnnaBridge	167:84c0a372a020	392	/**
AnnaBridge	167:84c0a372a020	393	* @}
AnnaBridge	167:84c0a372a020	394	*/
AnnaBridge	167:84c0a372a020	395
AnnaBridge	167:84c0a372a020	396	/** @defgroup UART_DMA_Rx UART DMA Rx
AnnaBridge	167:84c0a372a020	397	* @{
AnnaBridge	167:84c0a372a020	398	*/
AnnaBridge	167:84c0a372a020	399	#define UART_DMA_RX_DISABLE ((uint32_t)0x00000000U) /!< UART DMA RX disabled /
AnnaBridge	167:84c0a372a020	400	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /!< UART DMA RX enabled /
AnnaBridge	143:86740a56073b	401	/**
AnnaBridge	143:86740a56073b	402	* @}
AnnaBridge	143:86740a56073b	403	*/
AnnaBridge	167:84c0a372a020	404
AnnaBridge	167:84c0a372a020	405	/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
AnnaBridge	167:84c0a372a020	406	* @{
AnnaBridge	167:84c0a372a020	407	*/
AnnaBridge	167:84c0a372a020	408	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x00000000U) /!< UART half-duplex disabled /
AnnaBridge	167:84c0a372a020	409	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /!< UART half-duplex enabled /
AnnaBridge	167:84c0a372a020	410	/**
AnnaBridge	167:84c0a372a020	411	* @}
AnnaBridge	167:84c0a372a020	412	*/
AnnaBridge	167:84c0a372a020	413
AnnaBridge	167:84c0a372a020	414	/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
AnnaBridge	167:84c0a372a020	415	* @{
AnnaBridge	167:84c0a372a020	416	*/
AnnaBridge	167:84c0a372a020	417	#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U) /!< UART wake-up on idle line /
AnnaBridge	167:84c0a372a020	418	#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /!< UART wake-up on address mark /
AnnaBridge	167:84c0a372a020	419	/**
AnnaBridge	167:84c0a372a020	420	* @}
AnnaBridge	167:84c0a372a020	421	*/
AnnaBridge	167:84c0a372a020	422
AnnaBridge	167:84c0a372a020	423	/** @defgroup UART_Request_Parameters UART Request Parameters
AnnaBridge	143:86740a56073b	424	* @{
AnnaBridge	167:84c0a372a020	425	*/
AnnaBridge	167:84c0a372a020	426	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
AnnaBridge	167:84c0a372a020	427	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
AnnaBridge	167:84c0a372a020	428	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
AnnaBridge	167:84c0a372a020	429	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
AnnaBridge	167:84c0a372a020	430	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
AnnaBridge	167:84c0a372a020	431	/**
AnnaBridge	167:84c0a372a020	432	* @}
AnnaBridge	167:84c0a372a020	433	*/
AnnaBridge	167:84c0a372a020	434
AnnaBridge	167:84c0a372a020	435	/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
AnnaBridge	167:84c0a372a020	436	* @{
AnnaBridge	167:84c0a372a020	437	*/
AnnaBridge	167:84c0a372a020	438	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000U) /!< No advanced feature initialization /
AnnaBridge	167:84c0a372a020	439	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001U) /!< TX pin active level inversion /
AnnaBridge	167:84c0a372a020	440	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002U) /!< RX pin active level inversion /
AnnaBridge	167:84c0a372a020	441	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004U) /!< Binary data inversion /
AnnaBridge	167:84c0a372a020	442	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008U) /!< TX/RX pins swap /
AnnaBridge	167:84c0a372a020	443	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010U) /!< RX overrun disable /
AnnaBridge	167:84c0a372a020	444	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020U) /!< DMA disable on Reception Error /
AnnaBridge	167:84c0a372a020	445	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040U) /!< Auto Baud rate detection initialization /
AnnaBridge	167:84c0a372a020	446	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080U) /!< Most significant bit sent/received first /
AnnaBridge	143:86740a56073b	447	/**
AnnaBridge	143:86740a56073b	448	* @}
AnnaBridge	143:86740a56073b	449	*/
AnnaBridge	143:86740a56073b	450
AnnaBridge	167:84c0a372a020	451	/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
AnnaBridge	143:86740a56073b	452	* @{
AnnaBridge	143:86740a56073b	453	*/
AnnaBridge	167:84c0a372a020	454	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000U) /!< TX pin active level inversion disable /
AnnaBridge	167:84c0a372a020	455	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /!< TX pin active level inversion enable /
AnnaBridge	143:86740a56073b	456	/**
AnnaBridge	143:86740a56073b	457	* @}
AnnaBridge	167:84c0a372a020	458	*/
AnnaBridge	143:86740a56073b	459
AnnaBridge	167:84c0a372a020	460	/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
AnnaBridge	167:84c0a372a020	461	* @{
AnnaBridge	167:84c0a372a020	462	*/
AnnaBridge	167:84c0a372a020	463	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000U) /!< RX pin active level inversion disable /
AnnaBridge	167:84c0a372a020	464	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /!< RX pin active level inversion enable /
AnnaBridge	167:84c0a372a020	465	/**
AnnaBridge	167:84c0a372a020	466	* @}
AnnaBridge	167:84c0a372a020	467	*/
AnnaBridge	167:84c0a372a020	468
AnnaBridge	167:84c0a372a020	469	/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
AnnaBridge	143:86740a56073b	470	* @{
AnnaBridge	143:86740a56073b	471	*/
AnnaBridge	167:84c0a372a020	472	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000U) /!< Binary data inversion disable /
AnnaBridge	167:84c0a372a020	473	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /!< Binary data inversion enable /
AnnaBridge	143:86740a56073b	474	/**
AnnaBridge	143:86740a56073b	475	* @}
AnnaBridge	167:84c0a372a020	476	*/
AnnaBridge	143:86740a56073b	477
AnnaBridge	167:84c0a372a020	478	/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
AnnaBridge	143:86740a56073b	479	* @{
AnnaBridge	143:86740a56073b	480	*/
AnnaBridge	167:84c0a372a020	481	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000U) /!< TX/RX pins swap disable /
AnnaBridge	167:84c0a372a020	482	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /!< TX/RX pins swap enable /
AnnaBridge	167:84c0a372a020	483	/**
AnnaBridge	167:84c0a372a020	484	* @}
AnnaBridge	167:84c0a372a020	485	*/
AnnaBridge	167:84c0a372a020	486
AnnaBridge	167:84c0a372a020	487	/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
AnnaBridge	167:84c0a372a020	488	* @{
AnnaBridge	167:84c0a372a020	489	*/
AnnaBridge	167:84c0a372a020	490	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000U) /!< RX overrun enable /
AnnaBridge	167:84c0a372a020	491	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /!< RX overrun disable /
AnnaBridge	143:86740a56073b	492	/**
AnnaBridge	143:86740a56073b	493	* @}
AnnaBridge	167:84c0a372a020	494	*/
AnnaBridge	167:84c0a372a020	495
AnnaBridge	167:84c0a372a020	496	/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
AnnaBridge	143:86740a56073b	497	* @{
AnnaBridge	143:86740a56073b	498	*/
AnnaBridge	167:84c0a372a020	499	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000U) /!< RX Auto Baud rate detection enable /
AnnaBridge	167:84c0a372a020	500	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /!< RX Auto Baud rate detection disable /
AnnaBridge	167:84c0a372a020	501	/**
AnnaBridge	167:84c0a372a020	502	* @}
AnnaBridge	167:84c0a372a020	503	*/
AnnaBridge	167:84c0a372a020	504
AnnaBridge	167:84c0a372a020	505	/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
AnnaBridge	167:84c0a372a020	506	* @{
AnnaBridge	167:84c0a372a020	507	*/
AnnaBridge	167:84c0a372a020	508	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000U) /!< DMA enable on Reception Error /
AnnaBridge	167:84c0a372a020	509	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /!< DMA disable on Reception Error /
AnnaBridge	143:86740a56073b	510	/**
AnnaBridge	143:86740a56073b	511	* @}
AnnaBridge	167:84c0a372a020	512	*/
AnnaBridge	143:86740a56073b	513
AnnaBridge	167:84c0a372a020	514	/** @defgroup UART_MSB_First UART Advanced Feature MSB First
AnnaBridge	143:86740a56073b	515	* @{
AnnaBridge	143:86740a56073b	516	*/
AnnaBridge	167:84c0a372a020	517	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000U) /!< Most significant bit sent/received first disable /
AnnaBridge	167:84c0a372a020	518	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /!< Most significant bit sent/received first enable /
AnnaBridge	143:86740a56073b	519	/**
AnnaBridge	143:86740a56073b	520	* @}
AnnaBridge	167:84c0a372a020	521	*/
AnnaBridge	167:84c0a372a020	522
AnnaBridge	167:84c0a372a020	523	/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
AnnaBridge	143:86740a56073b	524	* @{
AnnaBridge	143:86740a56073b	525	*/
AnnaBridge	167:84c0a372a020	526	#define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000U) /!< UART stop mode disable /
AnnaBridge	167:84c0a372a020	527	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /!< UART stop mode enable /
AnnaBridge	167:84c0a372a020	528	/**
AnnaBridge	167:84c0a372a020	529	* @}
AnnaBridge	167:84c0a372a020	530	*/
AnnaBridge	167:84c0a372a020	531
AnnaBridge	167:84c0a372a020	532	/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
AnnaBridge	167:84c0a372a020	533	* @{
AnnaBridge	167:84c0a372a020	534	*/
AnnaBridge	167:84c0a372a020	535	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000U) /!< UART mute mode disable /
AnnaBridge	167:84c0a372a020	536	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /!< UART mute mode enable /
AnnaBridge	143:86740a56073b	537	/**
AnnaBridge	143:86740a56073b	538	* @}
AnnaBridge	143:86740a56073b	539	*/
AnnaBridge	143:86740a56073b	540
AnnaBridge	167:84c0a372a020	541	/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
AnnaBridge	167:84c0a372a020	542	* @{
AnnaBridge	167:84c0a372a020	543	*/
AnnaBridge	167:84c0a372a020	544	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24U) /!< UART address-matching LSB position in CR2 register /
AnnaBridge	167:84c0a372a020	545	/**
AnnaBridge	167:84c0a372a020	546	* @}
AnnaBridge	167:84c0a372a020	547	*/
AnnaBridge	167:84c0a372a020	548
AnnaBridge	167:84c0a372a020	549	/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
AnnaBridge	143:86740a56073b	550	* @{
AnnaBridge	143:86740a56073b	551	*/
AnnaBridge	167:84c0a372a020	552	#define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x00000000U) /!< UART wake-up on address /
AnnaBridge	167:84c0a372a020	553	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /!< UART wake-up on start bit /
AnnaBridge	167:84c0a372a020	554	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /!< UART wake-up on receive data register not empty /
AnnaBridge	167:84c0a372a020	555	/**
AnnaBridge	167:84c0a372a020	556	* @}
AnnaBridge	167:84c0a372a020	557	*/
AnnaBridge	167:84c0a372a020	558
AnnaBridge	167:84c0a372a020	559	/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
AnnaBridge	167:84c0a372a020	560	* @{
AnnaBridge	167:84c0a372a020	561	*/
AnnaBridge	167:84c0a372a020	562	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000U) /!< Driver enable signal is active high /
AnnaBridge	167:84c0a372a020	563	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /!< Driver enable signal is active low /
AnnaBridge	143:86740a56073b	564	/**
AnnaBridge	143:86740a56073b	565	* @}
AnnaBridge	143:86740a56073b	566	*/
AnnaBridge	143:86740a56073b	567
AnnaBridge	167:84c0a372a020	568	/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
AnnaBridge	143:86740a56073b	569	* @{
AnnaBridge	143:86740a56073b	570	*/
AnnaBridge	167:84c0a372a020	571	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21U) /!< UART Driver Enable assertion time LSB position in CR1 register /
AnnaBridge	167:84c0a372a020	572	/**
AnnaBridge	167:84c0a372a020	573	* @}
AnnaBridge	167:84c0a372a020	574	*/
AnnaBridge	167:84c0a372a020	575
AnnaBridge	167:84c0a372a020	576	/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
AnnaBridge	167:84c0a372a020	577	* @{
AnnaBridge	167:84c0a372a020	578	*/
AnnaBridge	167:84c0a372a020	579	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16U) /!< UART Driver Enable de-assertion time LSB position in CR1 register /
AnnaBridge	143:86740a56073b	580	/**
AnnaBridge	143:86740a56073b	581	* @}
AnnaBridge	143:86740a56073b	582	*/
AnnaBridge	143:86740a56073b	583
AnnaBridge	167:84c0a372a020	584	/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
AnnaBridge	167:84c0a372a020	585	* @{
AnnaBridge	167:84c0a372a020	586	*/
AnnaBridge	167:84c0a372a020	587	#define UART_IT_MASK ((uint32_t)0x001FU) /!< UART interruptions flags mask /
AnnaBridge	167:84c0a372a020	588	/**
AnnaBridge	167:84c0a372a020	589	* @}
AnnaBridge	167:84c0a372a020	590	*/
AnnaBridge	167:84c0a372a020	591
AnnaBridge	167:84c0a372a020	592	/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
AnnaBridge	167:84c0a372a020	593	* @{
AnnaBridge	167:84c0a372a020	594	*/
AnnaBridge	167:84c0a372a020	595	#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF /!< UART polling-based communications time-out value /
AnnaBridge	167:84c0a372a020	596	/**
AnnaBridge	167:84c0a372a020	597	* @}
AnnaBridge	167:84c0a372a020	598	*/
AnnaBridge	167:84c0a372a020	599
AnnaBridge	167:84c0a372a020	600	/** @defgroup UART_Flags UART Status Flags
AnnaBridge	143:86740a56073b	601	* Elements values convention: 0xXXXX
AnnaBridge	143:86740a56073b	602	* - 0xXXXX : Flag mask in the ISR register
AnnaBridge	143:86740a56073b	603	* @{
AnnaBridge	143:86740a56073b	604	*/
AnnaBridge	167:84c0a372a020	605	#define UART_FLAG_REACK USART_ISR_REACK /!< UART receive enable acknowledge flag /
AnnaBridge	167:84c0a372a020	606	#define UART_FLAG_TEACK USART_ISR_TEACK /!< UART transmit enable acknowledge flag /
AnnaBridge	167:84c0a372a020	607	#define UART_FLAG_WUF USART_ISR_WUF /!< UART wake-up from stop mode flag /
AnnaBridge	167:84c0a372a020	608	#define UART_FLAG_RWU USART_ISR_RWU /!< UART receiver wake-up from mute mode flag /
AnnaBridge	167:84c0a372a020	609	#define UART_FLAG_SBKF USART_ISR_SBKF /!< UART send break flag /
AnnaBridge	167:84c0a372a020	610	#define UART_FLAG_CMF USART_ISR_CMF /!< UART character match flag /
AnnaBridge	167:84c0a372a020	611	#define UART_FLAG_BUSY USART_ISR_BUSY /!< UART busy flag /
AnnaBridge	167:84c0a372a020	612	#define UART_FLAG_ABRF USART_ISR_ABRF /!< UART auto Baud rate flag /
AnnaBridge	167:84c0a372a020	613	#define UART_FLAG_ABRE USART_ISR_ABRE /!< UART auto Baud rate error /
AnnaBridge	167:84c0a372a020	614	#define UART_FLAG_EOBF USART_ISR_EOBF /!< UART end of block flag /
AnnaBridge	167:84c0a372a020	615	#define UART_FLAG_RTOF USART_ISR_RTOF /!< UART receiver timeout flag /
AnnaBridge	167:84c0a372a020	616	#define UART_FLAG_CTS USART_ISR_CTS /!< UART clear to send flag /
AnnaBridge	167:84c0a372a020	617	#define UART_FLAG_CTSIF USART_ISR_CTSIF /!< UART clear to send interrupt flag /
AnnaBridge	167:84c0a372a020	618	#define UART_FLAG_LBDF USART_ISR_LBDF /!< UART LIN break detection flag /
AnnaBridge	167:84c0a372a020	619	#define UART_FLAG_TXE USART_ISR_TXE /!< UART transmit data register empty /
AnnaBridge	167:84c0a372a020	620	#define UART_FLAG_TC USART_ISR_TC /!< UART transmission complete /
AnnaBridge	167:84c0a372a020	621	#define UART_FLAG_RXNE USART_ISR_RXNE /!< UART read data register not empty /
AnnaBridge	167:84c0a372a020	622	#define UART_FLAG_IDLE USART_ISR_IDLE /!< UART idle flag /
AnnaBridge	167:84c0a372a020	623	#define UART_FLAG_ORE USART_ISR_ORE /!< UART overrun error /
AnnaBridge	167:84c0a372a020	624	#define UART_FLAG_NE USART_ISR_NE /!< UART noise error /
AnnaBridge	167:84c0a372a020	625	#define UART_FLAG_FE USART_ISR_FE /!< UART frame error /
AnnaBridge	167:84c0a372a020	626	#define UART_FLAG_PE USART_ISR_PE /!< UART parity error /
AnnaBridge	143:86740a56073b	627	/**
AnnaBridge	143:86740a56073b	628	* @}
AnnaBridge	167:84c0a372a020	629	*/
AnnaBridge	143:86740a56073b	630
AnnaBridge	167:84c0a372a020	631	/** @defgroup UART_Interrupt_definition UART Interrupts Definition
AnnaBridge	143:86740a56073b	632	* Elements values convention: 000ZZZZZ0XXYYYYYb
AnnaBridge	143:86740a56073b	633	* - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge	143:86740a56073b	634	* - XX : Interrupt source register (2bits)
AnnaBridge	143:86740a56073b	635	* - 01: CR1 register
AnnaBridge	143:86740a56073b	636	* - 10: CR2 register
AnnaBridge	143:86740a56073b	637	* - 11: CR3 register
AnnaBridge	143:86740a56073b	638	* - ZZZZZ : Flag position in the ISR register(5bits)
AnnaBridge	143:86740a56073b	639	* @{
AnnaBridge	143:86740a56073b	640	*/
AnnaBridge	167:84c0a372a020	641	#define UART_IT_PE ((uint32_t)0x0028) /!< UART parity error interruption /
AnnaBridge	167:84c0a372a020	642	#define UART_IT_TXE ((uint32_t)0x0727) /!< UART transmit data register empty interruption /
AnnaBridge	167:84c0a372a020	643	#define UART_IT_TC ((uint32_t)0x0626) /!< UART transmission complete interruption /
AnnaBridge	167:84c0a372a020	644	#define UART_IT_RXNE ((uint32_t)0x0525) /!< UART read data register not empty interruption /
AnnaBridge	167:84c0a372a020	645	#define UART_IT_IDLE ((uint32_t)0x0424) /!< UART idle interruption /
AnnaBridge	167:84c0a372a020	646	#define UART_IT_LBD ((uint32_t)0x0846) /!< UART LIN break detection interruption /
AnnaBridge	167:84c0a372a020	647	#define UART_IT_CTS ((uint32_t)0x096A) /!< UART CTS interruption /
AnnaBridge	167:84c0a372a020	648	#define UART_IT_CM ((uint32_t)0x112E) /!< UART character match interruption /
AnnaBridge	167:84c0a372a020	649	#define UART_IT_WUF ((uint32_t)0x1476) /!< UART wake-up from stop mode interruption /
AnnaBridge	143:86740a56073b	650
AnnaBridge	143:86740a56073b	651	/** Elements values convention: 000000000XXYYYYYb
AnnaBridge	143:86740a56073b	652	* - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge	143:86740a56073b	653	* - XX : Interrupt source register (2bits)
AnnaBridge	143:86740a56073b	654	* - 01: CR1 register
AnnaBridge	143:86740a56073b	655	* - 10: CR2 register
AnnaBridge	143:86740a56073b	656	* - 11: CR3 register
AnnaBridge	143:86740a56073b	657	*/
AnnaBridge	167:84c0a372a020	658	#define UART_IT_ERR ((uint32_t)0x0060) /!< UART error interruption /
AnnaBridge	143:86740a56073b	659
AnnaBridge	143:86740a56073b	660	/** Elements values convention: 0000ZZZZ00000000b
AnnaBridge	143:86740a56073b	661	* - ZZZZ : Flag position in the ISR register(4bits)
AnnaBridge	143:86740a56073b	662	*/
AnnaBridge	167:84c0a372a020	663	#define UART_IT_ORE ((uint32_t)0x0300) /!< UART overrun error interruption /
AnnaBridge	167:84c0a372a020	664	#define UART_IT_NE ((uint32_t)0x0200) /!< UART noise error interruption /
AnnaBridge	167:84c0a372a020	665	#define UART_IT_FE ((uint32_t)0x0100) /!< UART frame error interruption /
AnnaBridge	143:86740a56073b	666	/**
AnnaBridge	143:86740a56073b	667	* @}
AnnaBridge	143:86740a56073b	668	*/
AnnaBridge	143:86740a56073b	669
AnnaBridge	167:84c0a372a020	670	/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
AnnaBridge	143:86740a56073b	671	* @{
AnnaBridge	143:86740a56073b	672	*/
AnnaBridge	167:84c0a372a020	673	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
AnnaBridge	167:84c0a372a020	674	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
AnnaBridge	167:84c0a372a020	675	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
AnnaBridge	167:84c0a372a020	676	#define UART_CLEAR_OREF USART_ICR_ORECF /!< Overrun Error Clear Flag /
AnnaBridge	167:84c0a372a020	677	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
AnnaBridge	167:84c0a372a020	678	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
AnnaBridge	167:84c0a372a020	679	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
AnnaBridge	167:84c0a372a020	680	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
AnnaBridge	167:84c0a372a020	681	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
AnnaBridge	167:84c0a372a020	682	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
AnnaBridge	167:84c0a372a020	683	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
AnnaBridge	143:86740a56073b	684	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
AnnaBridge	143:86740a56073b	685	/**
AnnaBridge	143:86740a56073b	686	* @}
AnnaBridge	143:86740a56073b	687	*/
AnnaBridge	143:86740a56073b	688
AnnaBridge	143:86740a56073b	689
AnnaBridge	143:86740a56073b	690	/**
AnnaBridge	143:86740a56073b	691	* @}
AnnaBridge	143:86740a56073b	692	*/
AnnaBridge	143:86740a56073b	693
AnnaBridge	167:84c0a372a020	694	/* Exported macros -----------------------------------------------------------*/
AnnaBridge	143:86740a56073b	695	/** @defgroup UART_Exported_Macros UART Exported Macros
AnnaBridge	143:86740a56073b	696	* @{
AnnaBridge	143:86740a56073b	697	*/
AnnaBridge	143:86740a56073b	698
AnnaBridge	167:84c0a372a020	699	/** @brief Reset UART handle states.
AnnaBridge	167:84c0a372a020	700	* @param __HANDLE__: UART handle.
AnnaBridge	143:86740a56073b	701	* @retval None
AnnaBridge	143:86740a56073b	702	*/
AnnaBridge	167:84c0a372a020	703	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge	167:84c0a372a020	704	(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge	167:84c0a372a020	705	(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge	167:84c0a372a020	706	} while(0)
AnnaBridge	167:84c0a372a020	707	/** @brief Flush the UART Data registers.
AnnaBridge	143:86740a56073b	708	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	167:84c0a372a020	709	* @retval None
AnnaBridge	143:86740a56073b	710	*/
AnnaBridge	143:86740a56073b	711	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
AnnaBridge	143:86740a56073b	712	do{ \
AnnaBridge	143:86740a56073b	713	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
AnnaBridge	143:86740a56073b	714	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
AnnaBridge	167:84c0a372a020	715	} while(0)
AnnaBridge	143:86740a56073b	716
AnnaBridge	167:84c0a372a020	717	/** @brief Clear the specified UART pending flag.
AnnaBridge	143:86740a56073b	718	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	719	* @param __FLAG__: specifies the flag to check.
AnnaBridge	143:86740a56073b	720	* This parameter can be any combination of the following values:
AnnaBridge	167:84c0a372a020	721	* @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge	167:84c0a372a020	722	* @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge	167:84c0a372a020	723	* @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge	167:84c0a372a020	724	* @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge	167:84c0a372a020	725	* @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge	167:84c0a372a020	726	* @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge	167:84c0a372a020	727	* @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
AnnaBridge	167:84c0a372a020	728	* @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge	167:84c0a372a020	729	* @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
AnnaBridge	167:84c0a372a020	730	* @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
AnnaBridge	167:84c0a372a020	731	* @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge	167:84c0a372a020	732	* @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
AnnaBridge	143:86740a56073b	733	* @retval None
AnnaBridge	143:86740a56073b	734	*/
AnnaBridge	143:86740a56073b	735	#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge	143:86740a56073b	736
AnnaBridge	143:86740a56073b	737	/** @brief Clear the UART PE pending flag.
AnnaBridge	143:86740a56073b	738	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	739	* @retval None
AnnaBridge	143:86740a56073b	740	*/
AnnaBridge	167:84c0a372a020	741	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
AnnaBridge	143:86740a56073b	742
AnnaBridge	143:86740a56073b	743	/** @brief Clear the UART FE pending flag.
AnnaBridge	143:86740a56073b	744	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	745	* @retval None
AnnaBridge	143:86740a56073b	746	*/
AnnaBridge	167:84c0a372a020	747	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
AnnaBridge	143:86740a56073b	748
AnnaBridge	143:86740a56073b	749	/** @brief Clear the UART NE pending flag.
AnnaBridge	143:86740a56073b	750	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	751	* @retval None
AnnaBridge	143:86740a56073b	752	*/
AnnaBridge	167:84c0a372a020	753	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
AnnaBridge	143:86740a56073b	754
AnnaBridge	143:86740a56073b	755	/** @brief Clear the UART ORE pending flag.
AnnaBridge	143:86740a56073b	756	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	757	* @retval None
AnnaBridge	143:86740a56073b	758	*/
AnnaBridge	167:84c0a372a020	759	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
AnnaBridge	143:86740a56073b	760
AnnaBridge	143:86740a56073b	761	/** @brief Clear the UART IDLE pending flag.
AnnaBridge	143:86740a56073b	762	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	763	* @retval None
AnnaBridge	143:86740a56073b	764	*/
AnnaBridge	167:84c0a372a020	765	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
AnnaBridge	143:86740a56073b	766
AnnaBridge	167:84c0a372a020	767	/** @brief Check whether the specified UART flag is set or not.
AnnaBridge	143:86740a56073b	768	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	769	* @param __FLAG__: specifies the flag to check.
AnnaBridge	143:86740a56073b	770	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	771	* @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
AnnaBridge	167:84c0a372a020	772	* @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
AnnaBridge	167:84c0a372a020	773	* @arg @ref UART_FLAG_WUF Wake up from stop mode flag
AnnaBridge	167:84c0a372a020	774	* @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
AnnaBridge	167:84c0a372a020	775	* @arg @ref UART_FLAG_SBKF Send Break flag
AnnaBridge	167:84c0a372a020	776	* @arg @ref UART_FLAG_CMF Character match flag
AnnaBridge	167:84c0a372a020	777	* @arg @ref UART_FLAG_BUSY Busy flag
AnnaBridge	167:84c0a372a020	778	* @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
AnnaBridge	167:84c0a372a020	779	* @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
AnnaBridge	167:84c0a372a020	780	* @arg @ref UART_FLAG_EOBF End of block flag
AnnaBridge	167:84c0a372a020	781	* @arg @ref UART_FLAG_RTOF Receiver timeout flag
AnnaBridge	167:84c0a372a020	782	* @arg @ref UART_FLAG_CTS CTS Change flag
AnnaBridge	167:84c0a372a020	783	* @arg @ref UART_FLAG_LBDF LIN Break detection flag
AnnaBridge	167:84c0a372a020	784	* @arg @ref UART_FLAG_TXE Transmit data register empty flag
AnnaBridge	167:84c0a372a020	785	* @arg @ref UART_FLAG_TC Transmission Complete flag
AnnaBridge	167:84c0a372a020	786	* @arg @ref UART_FLAG_RXNE Receive data register not empty flag
AnnaBridge	167:84c0a372a020	787	* @arg @ref UART_FLAG_IDLE Idle Line detection flag
AnnaBridge	167:84c0a372a020	788	* @arg @ref UART_FLAG_ORE Overrun Error flag
AnnaBridge	167:84c0a372a020	789	* @arg @ref UART_FLAG_NE Noise Error flag
AnnaBridge	167:84c0a372a020	790	* @arg @ref UART_FLAG_FE Framing Error flag
AnnaBridge	167:84c0a372a020	791	* @arg @ref UART_FLAG_PE Parity Error flag
AnnaBridge	143:86740a56073b	792	* @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge	143:86740a56073b	793	*/
AnnaBridge	143:86740a56073b	794	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
AnnaBridge	143:86740a56073b	795
AnnaBridge	167:84c0a372a020	796	/** @brief Enable the specified UART interrupt.
AnnaBridge	143:86740a56073b	797	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	798	* @param __INTERRUPT__: specifies the UART interrupt source to enable.
AnnaBridge	143:86740a56073b	799	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	800	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge	167:84c0a372a020	801	* @arg @ref UART_IT_CM Character match interrupt
AnnaBridge	167:84c0a372a020	802	* @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge	167:84c0a372a020	803	* @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge	167:84c0a372a020	804	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge	167:84c0a372a020	805	* @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge	167:84c0a372a020	806	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge	167:84c0a372a020	807	* @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge	167:84c0a372a020	808	* @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge	167:84c0a372a020	809	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge	143:86740a56073b	810	* @retval None
AnnaBridge	143:86740a56073b	811	*/
AnnaBridge	143:86740a56073b	812	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	167:84c0a372a020	813	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	167:84c0a372a020	814	((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge	143:86740a56073b	815
AnnaBridge	167:84c0a372a020	816
AnnaBridge	167:84c0a372a020	817	/** @brief Disable the specified UART interrupt.
AnnaBridge	143:86740a56073b	818	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	819	* @param __INTERRUPT__: specifies the UART interrupt source to disable.
AnnaBridge	143:86740a56073b	820	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	821	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge	167:84c0a372a020	822	* @arg @ref UART_IT_CM Character match interrupt
AnnaBridge	167:84c0a372a020	823	* @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge	167:84c0a372a020	824	* @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge	167:84c0a372a020	825	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge	167:84c0a372a020	826	* @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge	167:84c0a372a020	827	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge	167:84c0a372a020	828	* @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge	167:84c0a372a020	829	* @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge	167:84c0a372a020	830	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge	143:86740a56073b	831	* @retval None
AnnaBridge	143:86740a56073b	832	*/
AnnaBridge	167:84c0a372a020	833	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	167:84c0a372a020	834	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	167:84c0a372a020	835	((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge	143:86740a56073b	836
AnnaBridge	167:84c0a372a020	837	/** @brief Check whether the specified UART interrupt has occurred or not.
AnnaBridge	143:86740a56073b	838	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	839	* @param __IT__: specifies the UART interrupt to check.
AnnaBridge	143:86740a56073b	840	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	841	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge	167:84c0a372a020	842	* @arg @ref UART_IT_CM Character match interrupt
AnnaBridge	167:84c0a372a020	843	* @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge	167:84c0a372a020	844	* @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge	167:84c0a372a020	845	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge	167:84c0a372a020	846	* @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge	167:84c0a372a020	847	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge	167:84c0a372a020	848	* @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge	167:84c0a372a020	849	* @arg @ref UART_IT_ORE Overrun Error interrupt
AnnaBridge	167:84c0a372a020	850	* @arg @ref UART_IT_NE Noise Error interrupt
AnnaBridge	167:84c0a372a020	851	* @arg @ref UART_IT_FE Framing Error interrupt
AnnaBridge	167:84c0a372a020	852	* @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge	143:86740a56073b	853	* @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge	143:86740a56073b	854	*/
AnnaBridge	143:86740a56073b	855	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U)))
AnnaBridge	143:86740a56073b	856
AnnaBridge	167:84c0a372a020	857	/** @brief Check whether the specified UART interrupt source is enabled or not.
AnnaBridge	143:86740a56073b	858	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	859	* @param __IT__: specifies the UART interrupt source to check.
AnnaBridge	143:86740a56073b	860	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	861	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge	167:84c0a372a020	862	* @arg @ref UART_IT_CM Character match interrupt
AnnaBridge	167:84c0a372a020	863	* @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge	167:84c0a372a020	864	* @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge	167:84c0a372a020	865	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge	167:84c0a372a020	866	* @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge	167:84c0a372a020	867	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge	167:84c0a372a020	868	* @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge	167:84c0a372a020	869	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge	167:84c0a372a020	870	* @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge	143:86740a56073b	871	* @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge	143:86740a56073b	872	*/
AnnaBridge	143:86740a56073b	873	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
AnnaBridge	143:86740a56073b	874	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
AnnaBridge	143:86740a56073b	875
AnnaBridge	167:84c0a372a020	876	/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
AnnaBridge	143:86740a56073b	877	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	878	* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
AnnaBridge	143:86740a56073b	879	* to clear the corresponding interrupt
AnnaBridge	143:86740a56073b	880	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	881	* @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge	167:84c0a372a020	882	* @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge	167:84c0a372a020	883	* @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge	167:84c0a372a020	884	* @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge	167:84c0a372a020	885	* @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge	167:84c0a372a020	886	* @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge	167:84c0a372a020	887	* @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
AnnaBridge	167:84c0a372a020	888	* @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge	167:84c0a372a020	889	* @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
AnnaBridge	167:84c0a372a020	890	* @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
AnnaBridge	167:84c0a372a020	891	* @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge	167:84c0a372a020	892	* @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
AnnaBridge	143:86740a56073b	893	* @retval None
AnnaBridge	143:86740a56073b	894	*/
AnnaBridge	143:86740a56073b	895	#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
AnnaBridge	143:86740a56073b	896
AnnaBridge	143:86740a56073b	897	/** @brief Set a specific UART request flag.
AnnaBridge	143:86740a56073b	898	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	899	* @param __REQ__: specifies the request flag to set
AnnaBridge	143:86740a56073b	900	* This parameter can be one of the following values:
AnnaBridge	167:84c0a372a020	901	* @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
AnnaBridge	167:84c0a372a020	902	* @arg @ref UART_SENDBREAK_REQUEST Send Break Request
AnnaBridge	167:84c0a372a020	903	* @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
AnnaBridge	167:84c0a372a020	904	* @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
AnnaBridge	167:84c0a372a020	905	* @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
AnnaBridge	143:86740a56073b	906	* @retval None
AnnaBridge	143:86740a56073b	907	*/
AnnaBridge	143:86740a56073b	908	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
AnnaBridge	143:86740a56073b	909
AnnaBridge	167:84c0a372a020	910	/** @brief Enable the UART one bit sample method.
AnnaBridge	167:84c0a372a020	911	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	912	* @retval None
AnnaBridge	167:84c0a372a020	913	*/
AnnaBridge	143:86740a56073b	914	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
AnnaBridge	143:86740a56073b	915
AnnaBridge	167:84c0a372a020	916	/** @brief Disable the UART one bit sample method.
AnnaBridge	167:84c0a372a020	917	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	167:84c0a372a020	918	* @retval None
AnnaBridge	167:84c0a372a020	919	*/
AnnaBridge	167:84c0a372a020	920	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
AnnaBridge	167:84c0a372a020	921
AnnaBridge	167:84c0a372a020	922	/** @brief Enable UART.
AnnaBridge	143:86740a56073b	923	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	924	* @retval None
AnnaBridge	143:86740a56073b	925	*/
AnnaBridge	143:86740a56073b	926	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
AnnaBridge	143:86740a56073b	927
AnnaBridge	167:84c0a372a020	928	/** @brief Disable UART.
AnnaBridge	143:86740a56073b	929	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	930	* @retval None
AnnaBridge	143:86740a56073b	931	*/
AnnaBridge	143:86740a56073b	932	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge	143:86740a56073b	933
AnnaBridge	167:84c0a372a020	934	/** @brief Enable CTS flow control.
AnnaBridge	167:84c0a372a020	935	* @note This macro allows to enable CTS hardware flow control for a given UART instance,
AnnaBridge	143:86740a56073b	936	* without need to call HAL_UART_Init() function.
AnnaBridge	143:86740a56073b	937	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	143:86740a56073b	938	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge	143:86740a56073b	939	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	143:86740a56073b	940	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	167:84c0a372a020	941	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	167:84c0a372a020	942	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	143:86740a56073b	943	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	944	* @retval None
AnnaBridge	143:86740a56073b	945	*/
AnnaBridge	143:86740a56073b	946	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
AnnaBridge	143:86740a56073b	947	do{ \
AnnaBridge	143:86740a56073b	948	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge	143:86740a56073b	949	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
AnnaBridge	143:86740a56073b	950	} while(0)
AnnaBridge	143:86740a56073b	951
AnnaBridge	167:84c0a372a020	952	/** @brief Disable CTS flow control.
AnnaBridge	167:84c0a372a020	953	* @note This macro allows to disable CTS hardware flow control for a given UART instance,
AnnaBridge	143:86740a56073b	954	* without need to call HAL_UART_Init() function.
AnnaBridge	143:86740a56073b	955	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	143:86740a56073b	956	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge	143:86740a56073b	957	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	143:86740a56073b	958	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	167:84c0a372a020	959	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	167:84c0a372a020	960	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	143:86740a56073b	961	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	962	* @retval None
AnnaBridge	143:86740a56073b	963	*/
AnnaBridge	143:86740a56073b	964	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
AnnaBridge	143:86740a56073b	965	do{ \
AnnaBridge	143:86740a56073b	966	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge	143:86740a56073b	967	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge	143:86740a56073b	968	} while(0)
AnnaBridge	143:86740a56073b	969
AnnaBridge	167:84c0a372a020	970	/** @brief Enable RTS flow control.
AnnaBridge	167:84c0a372a020	971	* @note This macro allows to enable RTS hardware flow control for a given UART instance,
AnnaBridge	143:86740a56073b	972	* without need to call HAL_UART_Init() function.
AnnaBridge	143:86740a56073b	973	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	143:86740a56073b	974	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge	143:86740a56073b	975	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	143:86740a56073b	976	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	167:84c0a372a020	977	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	167:84c0a372a020	978	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	143:86740a56073b	979	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	980	* @retval None
AnnaBridge	143:86740a56073b	981	*/
AnnaBridge	143:86740a56073b	982	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
AnnaBridge	143:86740a56073b	983	do{ \
AnnaBridge	143:86740a56073b	984	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
AnnaBridge	143:86740a56073b	985	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
AnnaBridge	143:86740a56073b	986	} while(0)
AnnaBridge	143:86740a56073b	987
AnnaBridge	167:84c0a372a020	988	/** @brief Disable RTS flow control.
AnnaBridge	167:84c0a372a020	989	* @note This macro allows to disable RTS hardware flow control for a given UART instance,
AnnaBridge	143:86740a56073b	990	* without need to call HAL_UART_Init() function.
AnnaBridge	143:86740a56073b	991	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	143:86740a56073b	992	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge	143:86740a56073b	993	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	143:86740a56073b	994	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	167:84c0a372a020	995	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	167:84c0a372a020	996	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	143:86740a56073b	997	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	998	* @retval None
AnnaBridge	143:86740a56073b	999	*/
AnnaBridge	143:86740a56073b	1000	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
AnnaBridge	143:86740a56073b	1001	do{ \
AnnaBridge	143:86740a56073b	1002	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
AnnaBridge	143:86740a56073b	1003	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge	143:86740a56073b	1004	} while(0)
AnnaBridge	143:86740a56073b	1005
AnnaBridge	143:86740a56073b	1006	/** @brief macros to enable the UART's one bit sampling method
AnnaBridge	143:86740a56073b	1007	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	1008	* @retval None
AnnaBridge	143:86740a56073b	1009	*/
AnnaBridge	143:86740a56073b	1010	#define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
AnnaBridge	143:86740a56073b	1011
AnnaBridge	143:86740a56073b	1012	/** @brief macros to disable the UART's one bit sampling method
AnnaBridge	143:86740a56073b	1013	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	1014	* @retval None
AnnaBridge	143:86740a56073b	1015	*/
AnnaBridge	143:86740a56073b	1016	#define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
AnnaBridge	143:86740a56073b	1017
AnnaBridge	143:86740a56073b	1018
AnnaBridge	167:84c0a372a020	1019	/**
AnnaBridge	167:84c0a372a020	1020	* @}
AnnaBridge	167:84c0a372a020	1021	*/
AnnaBridge	167:84c0a372a020	1022
AnnaBridge	167:84c0a372a020	1023	/* Private macros --------------------------------------------------------*/
AnnaBridge	167:84c0a372a020	1024	/** @defgroup UART_Private_Macros UART Private Macros
AnnaBridge	167:84c0a372a020	1025	* @{
AnnaBridge	167:84c0a372a020	1026	*/
AnnaBridge	167:84c0a372a020	1027	/** @brief BRR division operation to set BRR register with LPUART.
AnnaBridge	167:84c0a372a020	1028	* @param __PCLK__: LPUART clock.
AnnaBridge	167:84c0a372a020	1029	* @param __BAUD__: Baud rate set by the user.
AnnaBridge	143:86740a56073b	1030	* @retval Division result
AnnaBridge	143:86740a56073b	1031	*/
AnnaBridge	167:84c0a372a020	1032	#define UART_DIV_LPUART(__PCLK__, __BAUD__) ((((uint64_t)(__PCLK__)*256U) + ((__BAUD__)/2U)) / (__BAUD__))
AnnaBridge	167:84c0a372a020	1033
AnnaBridge	167:84c0a372a020	1034	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge	167:84c0a372a020	1035	* @param __PCLK__: UART clock.
AnnaBridge	167:84c0a372a020	1036	* @param __BAUD__: Baud rate set by the user.
AnnaBridge	143:86740a56073b	1037	* @retval Division result
AnnaBridge	143:86740a56073b	1038	*/
AnnaBridge	167:84c0a372a020	1039	#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
AnnaBridge	143:86740a56073b	1040
AnnaBridge	167:84c0a372a020	1041	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
AnnaBridge	167:84c0a372a020	1042	* @param __PCLK__: UART clock.
AnnaBridge	167:84c0a372a020	1043	* @param __BAUD__: Baud rate set by the user.
AnnaBridge	143:86740a56073b	1044	* @retval Division result
AnnaBridge	143:86740a56073b	1045	*/
AnnaBridge	167:84c0a372a020	1046	#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
AnnaBridge	143:86740a56073b	1047
AnnaBridge	143:86740a56073b	1048	/** @brief Check whether or not UART instance is Low Power UART.
AnnaBridge	143:86740a56073b	1049	* @param __HANDLE__: specifies the UART Handle.
AnnaBridge	143:86740a56073b	1050	* @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
AnnaBridge	143:86740a56073b	1051	*/
AnnaBridge	143:86740a56073b	1052	#define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET )
AnnaBridge	143:86740a56073b	1053
AnnaBridge	167:84c0a372a020	1054	/** @brief Check UART Baud rate.
AnnaBridge	167:84c0a372a020	1055	* @param __BAUDRATE__: Baudrate specified by the user.
AnnaBridge	167:84c0a372a020	1056	* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
AnnaBridge	167:84c0a372a020	1057	* divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge	167:84c0a372a020	1058	* @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
AnnaBridge	143:86740a56073b	1059	*/
AnnaBridge	167:84c0a372a020	1060	#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
AnnaBridge	143:86740a56073b	1061
AnnaBridge	143:86740a56073b	1062	/** @brief Check UART byte address
AnnaBridge	143:86740a56073b	1063	* @param ADDRESS: UART 8-bit address for wake-up process scheme
AnnaBridge	167:84c0a372a020	1064	* @retval Test result (TRUE or FALSE).
AnnaBridge	167:84c0a372a020	1065	*/
AnnaBridge	143:86740a56073b	1066	#define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
AnnaBridge	143:86740a56073b	1067
AnnaBridge	143:86740a56073b	1068	/** @brief Check UART 4-bit address
AnnaBridge	143:86740a56073b	1069	* @param ADDRESS: UART 4-bit address for wake-up process scheme
AnnaBridge	167:84c0a372a020	1070	* @retval Test result (TRUE or FALSE).
AnnaBridge	167:84c0a372a020	1071	*/
AnnaBridge	143:86740a56073b	1072	#define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
AnnaBridge	143:86740a56073b	1073
AnnaBridge	167:84c0a372a020	1074	/** @brief Check UART assertion time.
AnnaBridge	167:84c0a372a020	1075	* @param __TIME__: 5-bit value assertion time.
AnnaBridge	167:84c0a372a020	1076	* @retval Test result (TRUE or FALSE).
AnnaBridge	167:84c0a372a020	1077	*/
AnnaBridge	167:84c0a372a020	1078	#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
AnnaBridge	167:84c0a372a020	1079
AnnaBridge	167:84c0a372a020	1080	/** @brief Check UART deassertion time.
AnnaBridge	167:84c0a372a020	1081	* @param __TIME__: 5-bit value deassertion time.
AnnaBridge	167:84c0a372a020	1082	* @retval Test result (TRUE or FALSE).
AnnaBridge	167:84c0a372a020	1083	*/
AnnaBridge	167:84c0a372a020	1084	#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
AnnaBridge	167:84c0a372a020	1085
AnnaBridge	167:84c0a372a020	1086	/**
AnnaBridge	167:84c0a372a020	1087	* @brief Ensure that UART frame number of stop bits is valid.
AnnaBridge	167:84c0a372a020	1088	* @param __STOPBITS__: UART frame number of stop bits.
AnnaBridge	167:84c0a372a020	1089	* @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge	167:84c0a372a020	1090	*/
AnnaBridge	167:84c0a372a020	1091	#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) \|\| \
AnnaBridge	167:84c0a372a020	1092	((__STOPBITS__) == UART_STOPBITS_1_5) \|\| \
AnnaBridge	167:84c0a372a020	1093	((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge	167:84c0a372a020	1094
AnnaBridge	167:84c0a372a020	1095	/**
AnnaBridge	167:84c0a372a020	1096	* @brief Ensure that LPUART frame number of stop bits is valid.
AnnaBridge	167:84c0a372a020	1097	* @param __STOPBITS__: LPUART frame number of stop bits.
AnnaBridge	167:84c0a372a020	1098	* @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge	167:84c0a372a020	1099	*/
AnnaBridge	167:84c0a372a020	1100	#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) \|\| \
AnnaBridge	167:84c0a372a020	1101	((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge	167:84c0a372a020	1102
AnnaBridge	167:84c0a372a020	1103	/**
AnnaBridge	167:84c0a372a020	1104	* @brief Ensure that UART frame parity is valid.
AnnaBridge	167:84c0a372a020	1105	* @param __PARITY__: UART frame parity.
AnnaBridge	167:84c0a372a020	1106	* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
AnnaBridge	167:84c0a372a020	1107	*/
AnnaBridge	167:84c0a372a020	1108	#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) \|\| \
AnnaBridge	167:84c0a372a020	1109	((__PARITY__) == UART_PARITY_EVEN) \|\| \
AnnaBridge	167:84c0a372a020	1110	((__PARITY__) == UART_PARITY_ODD))
AnnaBridge	167:84c0a372a020	1111
AnnaBridge	167:84c0a372a020	1112	/**
AnnaBridge	167:84c0a372a020	1113	* @brief Ensure that UART hardware flow control is valid.
AnnaBridge	167:84c0a372a020	1114	* @param __CONTROL__: UART hardware flow control.
AnnaBridge	167:84c0a372a020	1115	* @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
AnnaBridge	167:84c0a372a020	1116	*/
AnnaBridge	167:84c0a372a020	1117	#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
AnnaBridge	167:84c0a372a020	1118	(((__CONTROL__) == UART_HWCONTROL_NONE) \|\| \
AnnaBridge	167:84c0a372a020	1119	((__CONTROL__) == UART_HWCONTROL_RTS) \|\| \
AnnaBridge	167:84c0a372a020	1120	((__CONTROL__) == UART_HWCONTROL_CTS) \|\| \
AnnaBridge	167:84c0a372a020	1121	((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
AnnaBridge	167:84c0a372a020	1122
AnnaBridge	167:84c0a372a020	1123	/**
AnnaBridge	167:84c0a372a020	1124	* @brief Ensure that UART communication mode is valid.
AnnaBridge	167:84c0a372a020	1125	* @param __MODE__: UART communication mode.
AnnaBridge	167:84c0a372a020	1126	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge	167:84c0a372a020	1127	*/
AnnaBridge	167:84c0a372a020	1128	#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00U) && ((__MODE__) != (uint32_t)0x00U))
AnnaBridge	167:84c0a372a020	1129
AnnaBridge	167:84c0a372a020	1130	/**
AnnaBridge	167:84c0a372a020	1131	* @brief Ensure that UART state is valid.
AnnaBridge	167:84c0a372a020	1132	* @param __STATE__: UART state.
AnnaBridge	167:84c0a372a020	1133	* @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
AnnaBridge	143:86740a56073b	1134	*/
AnnaBridge	167:84c0a372a020	1135	#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1136	((__STATE__) == UART_STATE_ENABLE))
AnnaBridge	167:84c0a372a020	1137
AnnaBridge	167:84c0a372a020	1138	/**
AnnaBridge	167:84c0a372a020	1139	* @brief Ensure that UART oversampling is valid.
AnnaBridge	167:84c0a372a020	1140	* @param __SAMPLING__: UART oversampling.
AnnaBridge	167:84c0a372a020	1141	* @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
AnnaBridge	167:84c0a372a020	1142	*/
AnnaBridge	167:84c0a372a020	1143	#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) \|\| \
AnnaBridge	167:84c0a372a020	1144	((__SAMPLING__) == UART_OVERSAMPLING_8))
AnnaBridge	167:84c0a372a020	1145
AnnaBridge	167:84c0a372a020	1146	/**
AnnaBridge	167:84c0a372a020	1147	* @brief Ensure that UART frame sampling is valid.
AnnaBridge	167:84c0a372a020	1148	* @param __ONEBIT__: UART frame sampling.
AnnaBridge	167:84c0a372a020	1149	* @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
AnnaBridge	167:84c0a372a020	1150	*/
AnnaBridge	167:84c0a372a020	1151	#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1152	((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
AnnaBridge	167:84c0a372a020	1153
AnnaBridge	167:84c0a372a020	1154	/**
AnnaBridge	167:84c0a372a020	1155	* @brief Ensure that UART auto Baud rate detection mode is valid.
AnnaBridge	167:84c0a372a020	1156	* @param __MODE__: UART auto Baud rate detection mode.
AnnaBridge	167:84c0a372a020	1157	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge	167:84c0a372a020	1158	*/
AnnaBridge	167:84c0a372a020	1159	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
AnnaBridge	167:84c0a372a020	1160	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
AnnaBridge	167:84c0a372a020	1161	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
AnnaBridge	167:84c0a372a020	1162	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
AnnaBridge	167:84c0a372a020	1163
AnnaBridge	167:84c0a372a020	1164	/**
AnnaBridge	167:84c0a372a020	1165	* @brief Ensure that UART receiver timeout setting is valid.
AnnaBridge	167:84c0a372a020	1166	* @param __TIMEOUT__: UART receiver timeout setting.
AnnaBridge	167:84c0a372a020	1167	* @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
AnnaBridge	167:84c0a372a020	1168	*/
AnnaBridge	167:84c0a372a020	1169	#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1170	((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
AnnaBridge	167:84c0a372a020	1171
AnnaBridge	167:84c0a372a020	1172	/**
AnnaBridge	167:84c0a372a020	1173	* @brief Ensure that UART LIN state is valid.
AnnaBridge	167:84c0a372a020	1174	* @param __LIN__: UART LIN state.
AnnaBridge	167:84c0a372a020	1175	* @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
AnnaBridge	167:84c0a372a020	1176	*/
AnnaBridge	167:84c0a372a020	1177	#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1178	((__LIN__) == UART_LIN_ENABLE))
AnnaBridge	167:84c0a372a020	1179
AnnaBridge	167:84c0a372a020	1180	/**
AnnaBridge	167:84c0a372a020	1181	* @brief Ensure that UART LIN break detection length is valid.
AnnaBridge	167:84c0a372a020	1182	* @param __LENGTH__: UART LIN break detection length.
AnnaBridge	167:84c0a372a020	1183	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
AnnaBridge	167:84c0a372a020	1184	*/
AnnaBridge	167:84c0a372a020	1185	#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
AnnaBridge	167:84c0a372a020	1186	((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge	167:84c0a372a020	1187
AnnaBridge	167:84c0a372a020	1188	/**
AnnaBridge	167:84c0a372a020	1189	* @brief Ensure that UART DMA TX state is valid.
AnnaBridge	167:84c0a372a020	1190	* @param __DMATX__: UART DMA TX state.
AnnaBridge	167:84c0a372a020	1191	* @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
AnnaBridge	167:84c0a372a020	1192	*/
AnnaBridge	167:84c0a372a020	1193	#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1194	((__DMATX__) == UART_DMA_TX_ENABLE))
AnnaBridge	167:84c0a372a020	1195
AnnaBridge	167:84c0a372a020	1196	/**
AnnaBridge	167:84c0a372a020	1197	* @brief Ensure that UART DMA RX state is valid.
AnnaBridge	167:84c0a372a020	1198	* @param __DMARX__: UART DMA RX state.
AnnaBridge	167:84c0a372a020	1199	* @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
AnnaBridge	167:84c0a372a020	1200	*/
AnnaBridge	167:84c0a372a020	1201	#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1202	((__DMARX__) == UART_DMA_RX_ENABLE))
AnnaBridge	143:86740a56073b	1203
AnnaBridge	167:84c0a372a020	1204	/**
AnnaBridge	167:84c0a372a020	1205	* @brief Ensure that UART half-duplex state is valid.
AnnaBridge	167:84c0a372a020	1206	* @param __HDSEL__: UART half-duplex state.
AnnaBridge	167:84c0a372a020	1207	* @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
AnnaBridge	167:84c0a372a020	1208	*/
AnnaBridge	167:84c0a372a020	1209	#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1210	((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
AnnaBridge	167:84c0a372a020	1211
AnnaBridge	167:84c0a372a020	1212	/**
AnnaBridge	167:84c0a372a020	1213	* @brief Ensure that UART wake-up method is valid.
AnnaBridge	167:84c0a372a020	1214	* @param __WAKEUP__: UART wake-up method .
AnnaBridge	167:84c0a372a020	1215	* @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
AnnaBridge	167:84c0a372a020	1216	*/
AnnaBridge	167:84c0a372a020	1217	#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) \|\| \
AnnaBridge	167:84c0a372a020	1218	((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge	167:84c0a372a020	1219
AnnaBridge	167:84c0a372a020	1220	/**
AnnaBridge	167:84c0a372a020	1221	* @brief Ensure that UART request parameter is valid.
AnnaBridge	167:84c0a372a020	1222	* @param __PARAM__: UART request parameter.
AnnaBridge	167:84c0a372a020	1223	* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
AnnaBridge	167:84c0a372a020	1224	*/
AnnaBridge	167:84c0a372a020	1225	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
AnnaBridge	167:84c0a372a020	1226	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
AnnaBridge	167:84c0a372a020	1227	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
AnnaBridge	167:84c0a372a020	1228	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) \|\| \
AnnaBridge	167:84c0a372a020	1229	((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
AnnaBridge	167:84c0a372a020	1230
AnnaBridge	167:84c0a372a020	1231	/**
AnnaBridge	167:84c0a372a020	1232	* @brief Ensure that UART advanced features initialization is valid.
AnnaBridge	167:84c0a372a020	1233	* @param __INIT__: UART advanced features initialization.
AnnaBridge	167:84c0a372a020	1234	* @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
AnnaBridge	167:84c0a372a020	1235	*/
AnnaBridge	167:84c0a372a020	1236	#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT \| \
AnnaBridge	167:84c0a372a020	1237	UART_ADVFEATURE_TXINVERT_INIT \| \
AnnaBridge	167:84c0a372a020	1238	UART_ADVFEATURE_RXINVERT_INIT \| \
AnnaBridge	167:84c0a372a020	1239	UART_ADVFEATURE_DATAINVERT_INIT \| \
AnnaBridge	167:84c0a372a020	1240	UART_ADVFEATURE_SWAP_INIT \| \
AnnaBridge	167:84c0a372a020	1241	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
AnnaBridge	167:84c0a372a020	1242	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
AnnaBridge	167:84c0a372a020	1243	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
AnnaBridge	167:84c0a372a020	1244	UART_ADVFEATURE_MSBFIRST_INIT))
AnnaBridge	167:84c0a372a020	1245
AnnaBridge	167:84c0a372a020	1246	/**
AnnaBridge	167:84c0a372a020	1247	* @brief Ensure that UART frame TX inversion setting is valid.
AnnaBridge	167:84c0a372a020	1248	* @param __TXINV__: UART frame TX inversion setting.
AnnaBridge	167:84c0a372a020	1249	* @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
AnnaBridge	167:84c0a372a020	1250	*/
AnnaBridge	167:84c0a372a020	1251	#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1252	((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
AnnaBridge	167:84c0a372a020	1253
AnnaBridge	167:84c0a372a020	1254	/**
AnnaBridge	167:84c0a372a020	1255	* @brief Ensure that UART frame RX inversion setting is valid.
AnnaBridge	167:84c0a372a020	1256	* @param __RXINV__: UART frame RX inversion setting.
AnnaBridge	167:84c0a372a020	1257	* @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
AnnaBridge	167:84c0a372a020	1258	*/
AnnaBridge	167:84c0a372a020	1259	#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1260	((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
AnnaBridge	167:84c0a372a020	1261
AnnaBridge	167:84c0a372a020	1262	/**
AnnaBridge	167:84c0a372a020	1263	* @brief Ensure that UART frame data inversion setting is valid.
AnnaBridge	167:84c0a372a020	1264	* @param __DATAINV__: UART frame data inversion setting.
AnnaBridge	167:84c0a372a020	1265	* @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
AnnaBridge	143:86740a56073b	1266	*/
AnnaBridge	167:84c0a372a020	1267	#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1268	((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
AnnaBridge	167:84c0a372a020	1269
AnnaBridge	167:84c0a372a020	1270	/**
AnnaBridge	167:84c0a372a020	1271	* @brief Ensure that UART frame RX/TX pins swap setting is valid.
AnnaBridge	167:84c0a372a020	1272	* @param __SWAP__: UART frame RX/TX pins swap setting.
AnnaBridge	167:84c0a372a020	1273	* @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
AnnaBridge	167:84c0a372a020	1274	*/
AnnaBridge	167:84c0a372a020	1275	#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1276	((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
AnnaBridge	167:84c0a372a020	1277
AnnaBridge	167:84c0a372a020	1278	/**
AnnaBridge	167:84c0a372a020	1279	* @brief Ensure that UART frame overrun setting is valid.
AnnaBridge	167:84c0a372a020	1280	* @param __OVERRUN__: UART frame overrun setting.
AnnaBridge	167:84c0a372a020	1281	* @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
AnnaBridge	167:84c0a372a020	1282	*/
AnnaBridge	167:84c0a372a020	1283	#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
AnnaBridge	167:84c0a372a020	1284	((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
AnnaBridge	167:84c0a372a020	1285
AnnaBridge	167:84c0a372a020	1286	/**
AnnaBridge	167:84c0a372a020	1287	* @brief Ensure that UART auto Baud rate state is valid.
AnnaBridge	167:84c0a372a020	1288	* @param __AUTOBAUDRATE__: UART auto Baud rate state.
AnnaBridge	167:84c0a372a020	1289	* @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
AnnaBridge	167:84c0a372a020	1290	*/
AnnaBridge	167:84c0a372a020	1291	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1292	((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
AnnaBridge	167:84c0a372a020	1293
AnnaBridge	167:84c0a372a020	1294	/**
AnnaBridge	167:84c0a372a020	1295	* @brief Ensure that UART DMA enabling or disabling on error setting is valid.
AnnaBridge	167:84c0a372a020	1296	* @param __DMA__: UART DMA enabling or disabling on error setting.
AnnaBridge	167:84c0a372a020	1297	* @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
AnnaBridge	167:84c0a372a020	1298	*/
AnnaBridge	167:84c0a372a020	1299	#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
AnnaBridge	167:84c0a372a020	1300	((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
AnnaBridge	167:84c0a372a020	1301
AnnaBridge	167:84c0a372a020	1302	/**
AnnaBridge	167:84c0a372a020	1303	* @brief Ensure that UART frame MSB first setting is valid.
AnnaBridge	167:84c0a372a020	1304	* @param __MSBFIRST__: UART frame MSB first setting.
AnnaBridge	167:84c0a372a020	1305	* @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
AnnaBridge	167:84c0a372a020	1306	*/
AnnaBridge	167:84c0a372a020	1307	#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1308	((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
AnnaBridge	167:84c0a372a020	1309
AnnaBridge	167:84c0a372a020	1310	/**
AnnaBridge	167:84c0a372a020	1311	* @brief Ensure that UART stop mode state is valid.
AnnaBridge	167:84c0a372a020	1312	* @param __STOPMODE__: UART stop mode state.
AnnaBridge	167:84c0a372a020	1313	* @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
AnnaBridge	167:84c0a372a020	1314	*/
AnnaBridge	167:84c0a372a020	1315	#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1316	((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
AnnaBridge	167:84c0a372a020	1317
AnnaBridge	167:84c0a372a020	1318	/**
AnnaBridge	167:84c0a372a020	1319	* @brief Ensure that UART mute mode state is valid.
AnnaBridge	167:84c0a372a020	1320	* @param __MUTE__: UART mute mode state.
AnnaBridge	167:84c0a372a020	1321	* @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
AnnaBridge	167:84c0a372a020	1322	*/
AnnaBridge	167:84c0a372a020	1323	#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
AnnaBridge	167:84c0a372a020	1324	((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
AnnaBridge	167:84c0a372a020	1325
AnnaBridge	167:84c0a372a020	1326	/**
AnnaBridge	167:84c0a372a020	1327	* @brief Ensure that UART wake-up selection is valid.
AnnaBridge	167:84c0a372a020	1328	* @param __WAKE__: UART wake-up selection.
AnnaBridge	167:84c0a372a020	1329	* @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
AnnaBridge	167:84c0a372a020	1330	*/
AnnaBridge	167:84c0a372a020	1331	#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) \|\| \
AnnaBridge	167:84c0a372a020	1332	((__WAKE__) == UART_WAKEUP_ON_STARTBIT) \|\| \
AnnaBridge	167:84c0a372a020	1333	((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
AnnaBridge	167:84c0a372a020	1334
AnnaBridge	167:84c0a372a020	1335	/**
AnnaBridge	167:84c0a372a020	1336	* @brief Ensure that UART driver enable polarity is valid.
AnnaBridge	167:84c0a372a020	1337	* @param __POLARITY__: UART driver enable polarity.
AnnaBridge	167:84c0a372a020	1338	* @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
AnnaBridge	167:84c0a372a020	1339	*/
AnnaBridge	167:84c0a372a020	1340	#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) \|\| \
AnnaBridge	167:84c0a372a020	1341	((__POLARITY__) == UART_DE_POLARITY_LOW))
AnnaBridge	143:86740a56073b	1342
AnnaBridge	143:86740a56073b	1343	/**
AnnaBridge	143:86740a56073b	1344	* @}
AnnaBridge	143:86740a56073b	1345	*/
AnnaBridge	167:84c0a372a020	1346
AnnaBridge	167:84c0a372a020	1347	/* Include UART HAL Extended module */
AnnaBridge	143:86740a56073b	1348	#include "stm32l0xx_hal_uart_ex.h"
AnnaBridge	143:86740a56073b	1349
AnnaBridge	143:86740a56073b	1350	/* Exported functions --------------------------------------------------------*/
AnnaBridge	167:84c0a372a020	1351	/** @addtogroup UART_Exported_Functions UART Exported Functions
AnnaBridge	143:86740a56073b	1352	* @{
AnnaBridge	143:86740a56073b	1353	*/
AnnaBridge	167:84c0a372a020	1354
AnnaBridge	167:84c0a372a020	1355	/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge	167:84c0a372a020	1356	* @{
AnnaBridge	167:84c0a372a020	1357	*/
AnnaBridge	167:84c0a372a020	1358
AnnaBridge	167:84c0a372a020	1359	/* Initialization and de-initialization functions ****************************/
AnnaBridge	143:86740a56073b	1360	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1361	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1362	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
AnnaBridge	143:86740a56073b	1363	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
AnnaBridge	143:86740a56073b	1364	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1365	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1366	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1367
AnnaBridge	143:86740a56073b	1368	/**
AnnaBridge	143:86740a56073b	1369	* @}
AnnaBridge	143:86740a56073b	1370	*/
AnnaBridge	143:86740a56073b	1371
AnnaBridge	167:84c0a372a020	1372	/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
AnnaBridge	167:84c0a372a020	1373	* @{
AnnaBridge	167:84c0a372a020	1374	*/
AnnaBridge	167:84c0a372a020	1375
AnnaBridge	143:86740a56073b	1376	/* IO operation functions *****************************************************/
AnnaBridge	143:86740a56073b	1377	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
AnnaBridge	143:86740a56073b	1378	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
AnnaBridge	143:86740a56073b	1379	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	143:86740a56073b	1380	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	143:86740a56073b	1381	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	143:86740a56073b	1382	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	143:86740a56073b	1383	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1384	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1385	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1386	/* Transfer Abort functions */
AnnaBridge	167:84c0a372a020	1387	HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1388	HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1389	HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1390	HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1391	HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1392	HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1393
AnnaBridge	143:86740a56073b	1394	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1395	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1396	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1397	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1398	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1399	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1400	void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1401	void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1402	void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1403
AnnaBridge	143:86740a56073b	1404	/**
AnnaBridge	143:86740a56073b	1405	* @}
AnnaBridge	143:86740a56073b	1406	*/
AnnaBridge	167:84c0a372a020	1407
AnnaBridge	167:84c0a372a020	1408	/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge	167:84c0a372a020	1409	* @{
AnnaBridge	167:84c0a372a020	1410	*/
AnnaBridge	167:84c0a372a020	1411
AnnaBridge	167:84c0a372a020	1412	/* Peripheral Control functions ************************************************/
AnnaBridge	167:84c0a372a020	1413	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1414	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1415	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1416	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1417	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1418	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1419
AnnaBridge	143:86740a56073b	1420	/**
AnnaBridge	143:86740a56073b	1421	* @}
AnnaBridge	143:86740a56073b	1422	*/
AnnaBridge	167:84c0a372a020	1423
AnnaBridge	167:84c0a372a020	1424	/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
AnnaBridge	167:84c0a372a020	1425	* @{
AnnaBridge	167:84c0a372a020	1426	*/
AnnaBridge	167:84c0a372a020	1427
AnnaBridge	167:84c0a372a020	1428	/* Peripheral State and Errors functions **************************************************/
AnnaBridge	167:84c0a372a020	1429	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1430	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1431
AnnaBridge	167:84c0a372a020	1432	/**
AnnaBridge	167:84c0a372a020	1433	* @}
AnnaBridge	167:84c0a372a020	1434	*/
AnnaBridge	167:84c0a372a020	1435
AnnaBridge	143:86740a56073b	1436	/**
AnnaBridge	143:86740a56073b	1437	* @}
AnnaBridge	143:86740a56073b	1438	*/
AnnaBridge	143:86740a56073b	1439
AnnaBridge	167:84c0a372a020	1440	/* Private functions -----------------------------------------------------------*/
AnnaBridge	167:84c0a372a020	1441	/** @addtogroup UART_Private_Functions UART Private Functions
AnnaBridge	143:86740a56073b	1442	* @{
AnnaBridge	143:86740a56073b	1443	*/
AnnaBridge	167:84c0a372a020	1444
AnnaBridge	167:84c0a372a020	1445	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
AnnaBridge	143:86740a56073b	1446	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1447	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
AnnaBridge	143:86740a56073b	1448	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
AnnaBridge	167:84c0a372a020	1449
AnnaBridge	143:86740a56073b	1450	/**
AnnaBridge	143:86740a56073b	1451	* @}
AnnaBridge	143:86740a56073b	1452	*/
AnnaBridge	143:86740a56073b	1453
AnnaBridge	143:86740a56073b	1454	/**
AnnaBridge	143:86740a56073b	1455	* @}
AnnaBridge	143:86740a56073b	1456	*/
AnnaBridge	143:86740a56073b	1457
AnnaBridge	143:86740a56073b	1458	/**
AnnaBridge	143:86740a56073b	1459	* @}
AnnaBridge	167:84c0a372a020	1460	*/
AnnaBridge	167:84c0a372a020	1461
AnnaBridge	143:86740a56073b	1462	#ifdef __cplusplus
AnnaBridge	143:86740a56073b	1463	}
AnnaBridge	143:86740a56073b	1464	#endif
AnnaBridge	143:86740a56073b	1465
AnnaBridge	143:86740a56073b	1466	#endif /* __STM32L0xx_HAL_UART_H */
AnnaBridge	143:86740a56073b	1467
AnnaBridge	143:86740a56073b	1468	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/