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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_hal_lcd.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_L072CZ_LRWAN1/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_lcd.h@167:84c0a372a020 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 143:86740a56073b 1 /**
AnnaBridge 143:86740a56073b 2 ******************************************************************************
AnnaBridge 143:86740a56073b 3 * @file stm32l0xx_hal_lcd.h
AnnaBridge 143:86740a56073b 4 * @author MCD Application Team
AnnaBridge 143:86740a56073b 5 * @brief Header file of LCD Controller HAL module.
AnnaBridge 143:86740a56073b 6 ******************************************************************************
AnnaBridge 143:86740a56073b 7 * @attention
AnnaBridge 143:86740a56073b 8 *
AnnaBridge 143:86740a56073b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 143:86740a56073b 10 *
AnnaBridge 143:86740a56073b 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 143:86740a56073b 12 * are permitted provided that the following conditions are met:
AnnaBridge 143:86740a56073b 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 143:86740a56073b 14 * this list of conditions and the following disclaimer.
AnnaBridge 143:86740a56073b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 143:86740a56073b 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 143:86740a56073b 17 * and/or other materials provided with the distribution.
AnnaBridge 143:86740a56073b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 143:86740a56073b 19 * may be used to endorse or promote products derived from this software
AnnaBridge 143:86740a56073b 20 * without specific prior written permission.
AnnaBridge 143:86740a56073b 21 *
AnnaBridge 143:86740a56073b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 143:86740a56073b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 143:86740a56073b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 143:86740a56073b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 143:86740a56073b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 143:86740a56073b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 143:86740a56073b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 143:86740a56073b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 143:86740a56073b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 143:86740a56073b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 143:86740a56073b 32 *
AnnaBridge 143:86740a56073b 33 ******************************************************************************
AnnaBridge 143:86740a56073b 34 */
AnnaBridge 143:86740a56073b 35
AnnaBridge 143:86740a56073b 36
AnnaBridge 143:86740a56073b 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 143:86740a56073b 38 #ifndef __STM32L0xx_HAL_LCD_H
AnnaBridge 143:86740a56073b 39 #define __STM32L0xx_HAL_LCD_H
AnnaBridge 143:86740a56073b 40
AnnaBridge 143:86740a56073b 41 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 42 extern "C" {
AnnaBridge 143:86740a56073b 43 #endif
AnnaBridge 143:86740a56073b 44
AnnaBridge 167:84c0a372a020 45 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
AnnaBridge 143:86740a56073b 46
AnnaBridge 143:86740a56073b 47 /* Includes ------------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 48 #include "stm32l0xx_hal_def.h"
AnnaBridge 143:86740a56073b 49
AnnaBridge 143:86740a56073b 50 /** @addtogroup STM32L0xx_HAL_Driver
AnnaBridge 143:86740a56073b 51 * @{
AnnaBridge 143:86740a56073b 52 */
AnnaBridge 143:86740a56073b 53
AnnaBridge 143:86740a56073b 54 /** @defgroup LCD LCD
AnnaBridge 143:86740a56073b 55 * @{
AnnaBridge 143:86740a56073b 56 */
AnnaBridge 143:86740a56073b 57
AnnaBridge 143:86740a56073b 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 59 /** @defgroup LCD_Exported_Types LCD Exported Types
AnnaBridge 143:86740a56073b 60 * @{
AnnaBridge 143:86740a56073b 61 */
AnnaBridge 143:86740a56073b 62
AnnaBridge 143:86740a56073b 63 /**
AnnaBridge 143:86740a56073b 64 * @brief LCD Init structure definition
AnnaBridge 143:86740a56073b 65 */
AnnaBridge 143:86740a56073b 66
AnnaBridge 143:86740a56073b 67 typedef struct
AnnaBridge 143:86740a56073b 68 {
AnnaBridge 143:86740a56073b 69 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
AnnaBridge 143:86740a56073b 70 This parameter can be one value of @ref LCD_Prescaler */
AnnaBridge 143:86740a56073b 71 uint32_t Divider; /*!< Configures the LCD Divider.
AnnaBridge 143:86740a56073b 72 This parameter can be one value of @ref LCD_Divider */
AnnaBridge 143:86740a56073b 73 uint32_t Duty; /*!< Configures the LCD Duty.
AnnaBridge 143:86740a56073b 74 This parameter can be one value of @ref LCD_Duty */
AnnaBridge 143:86740a56073b 75 uint32_t Bias; /*!< Configures the LCD Bias.
AnnaBridge 143:86740a56073b 76 This parameter can be one value of @ref LCD_Bias */
AnnaBridge 143:86740a56073b 77 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
AnnaBridge 143:86740a56073b 78 This parameter can be one value of @ref LCD_Voltage_Source */
AnnaBridge 143:86740a56073b 79 uint32_t Contrast; /*!< Configures the LCD Contrast.
AnnaBridge 143:86740a56073b 80 This parameter can be one value of @ref LCD_Contrast */
AnnaBridge 143:86740a56073b 81 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
AnnaBridge 143:86740a56073b 82 This parameter can be one value of @ref LCD_DeadTime */
AnnaBridge 143:86740a56073b 83 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
AnnaBridge 143:86740a56073b 84 This parameter can be one value of @ref LCD_PulseOnDuration */
AnnaBridge 143:86740a56073b 85 uint32_t HighDrive; /*!< Configures the LCD High Drive.
AnnaBridge 143:86740a56073b 86 This parameter can be one value of @ref LCD_HighDrive */
AnnaBridge 143:86740a56073b 87 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
AnnaBridge 143:86740a56073b 88 This parameter can be one value of @ref LCD_BlinkMode */
AnnaBridge 143:86740a56073b 89 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
AnnaBridge 143:86740a56073b 90 This parameter can be one value of @ref LCD_BlinkFrequency */
AnnaBridge 143:86740a56073b 91 uint32_t MuxSegment; /*!< Enable or disable mux segment.
AnnaBridge 143:86740a56073b 92 This parameter can be one value of @ref LCD_MuxSegment */
AnnaBridge 143:86740a56073b 93 }LCD_InitTypeDef;
AnnaBridge 143:86740a56073b 94
AnnaBridge 143:86740a56073b 95 /**
AnnaBridge 143:86740a56073b 96 * @brief HAL LCD State structures definition
AnnaBridge 143:86740a56073b 97 */
AnnaBridge 143:86740a56073b 98 typedef enum
AnnaBridge 143:86740a56073b 99 {
AnnaBridge 143:86740a56073b 100 HAL_LCD_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
AnnaBridge 143:86740a56073b 101 HAL_LCD_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 143:86740a56073b 102 HAL_LCD_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
AnnaBridge 143:86740a56073b 103 HAL_LCD_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 143:86740a56073b 104 HAL_LCD_STATE_ERROR = 0x04U /*!< Error */
AnnaBridge 143:86740a56073b 105 }HAL_LCD_StateTypeDef;
AnnaBridge 143:86740a56073b 106
AnnaBridge 143:86740a56073b 107 /**
AnnaBridge 143:86740a56073b 108 * @brief UART handle Structure definition
AnnaBridge 143:86740a56073b 109 */
AnnaBridge 143:86740a56073b 110 typedef struct
AnnaBridge 143:86740a56073b 111 {
AnnaBridge 143:86740a56073b 112 LCD_TypeDef *Instance; /* LCD registers base address */
AnnaBridge 143:86740a56073b 113
AnnaBridge 143:86740a56073b 114 LCD_InitTypeDef Init; /* LCD communication parameters */
AnnaBridge 143:86740a56073b 115
AnnaBridge 143:86740a56073b 116 HAL_LockTypeDef Lock; /* Locking object */
AnnaBridge 143:86740a56073b 117
AnnaBridge 143:86740a56073b 118 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
AnnaBridge 143:86740a56073b 119
AnnaBridge 143:86740a56073b 120 __IO uint32_t ErrorCode; /* LCD Error code */
AnnaBridge 143:86740a56073b 121
AnnaBridge 143:86740a56073b 122 }LCD_HandleTypeDef;
AnnaBridge 143:86740a56073b 123
AnnaBridge 143:86740a56073b 124 /**
AnnaBridge 143:86740a56073b 125 * @}
AnnaBridge 143:86740a56073b 126 */
AnnaBridge 143:86740a56073b 127
AnnaBridge 143:86740a56073b 128 /* Exported constants --------------------------------------------------------*/
AnnaBridge 143:86740a56073b 129
AnnaBridge 143:86740a56073b 130 /** @defgroup LCD_Exported_Constants LCD Exported Constants
AnnaBridge 143:86740a56073b 131 * @{
AnnaBridge 143:86740a56073b 132 */
AnnaBridge 143:86740a56073b 133
AnnaBridge 143:86740a56073b 134 /** @defgroup LCD_ErrorCode LCD Error Code
AnnaBridge 143:86740a56073b 135 * @{
AnnaBridge 143:86740a56073b 136 */
AnnaBridge 143:86740a56073b 137 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00U) /*!< No error */
AnnaBridge 143:86740a56073b 138 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01U) /*!< Synchro flag timeout error */
AnnaBridge 143:86740a56073b 139 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02U) /*!< Update display request flag timeout error */
AnnaBridge 143:86740a56073b 140 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04U) /*!< Update display done flag timeout error */
AnnaBridge 143:86740a56073b 141 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08U) /*!< LCD enabled status flag timeout error */
AnnaBridge 143:86740a56073b 142 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10U) /*!< LCD Booster ready timeout error */
AnnaBridge 143:86740a56073b 143 /**
AnnaBridge 143:86740a56073b 144 * @}
AnnaBridge 143:86740a56073b 145 */
AnnaBridge 143:86740a56073b 146
AnnaBridge 143:86740a56073b 147 /** @defgroup LCD_Prescaler LCD Prescaler
AnnaBridge 143:86740a56073b 148 * @{
AnnaBridge 143:86740a56073b 149 */
AnnaBridge 143:86740a56073b 150
AnnaBridge 143:86740a56073b 151 #define LCD_PRESCALER_1 ((uint32_t)0x00000000U) /*!< CLKPS = LCDCLK */
AnnaBridge 143:86740a56073b 152 #define LCD_PRESCALER_2 ((uint32_t)0x00400000U) /*!< CLKPS = LCDCLK/2 */
AnnaBridge 143:86740a56073b 153 #define LCD_PRESCALER_4 ((uint32_t)0x00800000U) /*!< CLKPS = LCDCLK/4 */
AnnaBridge 143:86740a56073b 154 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000U) /*!< CLKPS = LCDCLK/8 */
AnnaBridge 143:86740a56073b 155 #define LCD_PRESCALER_16 ((uint32_t)0x01000000U) /*!< CLKPS = LCDCLK/16 */
AnnaBridge 143:86740a56073b 156 #define LCD_PRESCALER_32 ((uint32_t)0x01400000U) /*!< CLKPS = LCDCLK/32 */
AnnaBridge 143:86740a56073b 157 #define LCD_PRESCALER_64 ((uint32_t)0x01800000U) /*!< CLKPS = LCDCLK/64 */
AnnaBridge 143:86740a56073b 158 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000U) /*!< CLKPS = LCDCLK/128 */
AnnaBridge 143:86740a56073b 159 #define LCD_PRESCALER_256 ((uint32_t)0x02000000U) /*!< CLKPS = LCDCLK/256 */
AnnaBridge 143:86740a56073b 160 #define LCD_PRESCALER_512 ((uint32_t)0x02400000U) /*!< CLKPS = LCDCLK/512 */
AnnaBridge 143:86740a56073b 161 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000U) /*!< CLKPS = LCDCLK/1024 */
AnnaBridge 143:86740a56073b 162 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000U) /*!< CLKPS = LCDCLK/2048 */
AnnaBridge 143:86740a56073b 163 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000U) /*!< CLKPS = LCDCLK/4096 */
AnnaBridge 143:86740a56073b 164 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000U) /*!< CLKPS = LCDCLK/8192 */
AnnaBridge 143:86740a56073b 165 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000U) /*!< CLKPS = LCDCLK/16384 */
AnnaBridge 143:86740a56073b 166 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */
AnnaBridge 143:86740a56073b 167
AnnaBridge 143:86740a56073b 168 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
AnnaBridge 143:86740a56073b 169 ((__PRESCALER__) == LCD_PRESCALER_2) || \
AnnaBridge 143:86740a56073b 170 ((__PRESCALER__) == LCD_PRESCALER_4) || \
AnnaBridge 143:86740a56073b 171 ((__PRESCALER__) == LCD_PRESCALER_8) || \
AnnaBridge 143:86740a56073b 172 ((__PRESCALER__) == LCD_PRESCALER_16) || \
AnnaBridge 143:86740a56073b 173 ((__PRESCALER__) == LCD_PRESCALER_32) || \
AnnaBridge 143:86740a56073b 174 ((__PRESCALER__) == LCD_PRESCALER_64) || \
AnnaBridge 143:86740a56073b 175 ((__PRESCALER__) == LCD_PRESCALER_128) || \
AnnaBridge 143:86740a56073b 176 ((__PRESCALER__) == LCD_PRESCALER_256) || \
AnnaBridge 143:86740a56073b 177 ((__PRESCALER__) == LCD_PRESCALER_512) || \
AnnaBridge 143:86740a56073b 178 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
AnnaBridge 143:86740a56073b 179 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
AnnaBridge 143:86740a56073b 180 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
AnnaBridge 143:86740a56073b 181 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
AnnaBridge 143:86740a56073b 182 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
AnnaBridge 143:86740a56073b 183 ((__PRESCALER__) == LCD_PRESCALER_32768))
AnnaBridge 143:86740a56073b 184
AnnaBridge 143:86740a56073b 185 /**
AnnaBridge 143:86740a56073b 186 * @}
AnnaBridge 143:86740a56073b 187 */
AnnaBridge 143:86740a56073b 188
AnnaBridge 143:86740a56073b 189 /** @defgroup LCD_Divider LCD Divider
AnnaBridge 143:86740a56073b 190 * @{
AnnaBridge 143:86740a56073b 191 */
AnnaBridge 143:86740a56073b 192
AnnaBridge 143:86740a56073b 193 #define LCD_DIVIDER_16 ((uint32_t)0x00000000U) /*!< LCD frequency = CLKPS/16 */
AnnaBridge 143:86740a56073b 194 #define LCD_DIVIDER_17 ((uint32_t)0x00040000U) /*!< LCD frequency = CLKPS/17 */
AnnaBridge 143:86740a56073b 195 #define LCD_DIVIDER_18 ((uint32_t)0x00080000U) /*!< LCD frequency = CLKPS/18 */
AnnaBridge 143:86740a56073b 196 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000U) /*!< LCD frequency = CLKPS/19 */
AnnaBridge 143:86740a56073b 197 #define LCD_DIVIDER_20 ((uint32_t)0x00100000U) /*!< LCD frequency = CLKPS/20 */
AnnaBridge 143:86740a56073b 198 #define LCD_DIVIDER_21 ((uint32_t)0x00140000U) /*!< LCD frequency = CLKPS/21 */
AnnaBridge 143:86740a56073b 199 #define LCD_DIVIDER_22 ((uint32_t)0x00180000U) /*!< LCD frequency = CLKPS/22 */
AnnaBridge 143:86740a56073b 200 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000U) /*!< LCD frequency = CLKPS/23 */
AnnaBridge 143:86740a56073b 201 #define LCD_DIVIDER_24 ((uint32_t)0x00200000U) /*!< LCD frequency = CLKPS/24 */
AnnaBridge 143:86740a56073b 202 #define LCD_DIVIDER_25 ((uint32_t)0x00240000U) /*!< LCD frequency = CLKPS/25 */
AnnaBridge 143:86740a56073b 203 #define LCD_DIVIDER_26 ((uint32_t)0x00280000U) /*!< LCD frequency = CLKPS/26 */
AnnaBridge 143:86740a56073b 204 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000U) /*!< LCD frequency = CLKPS/27 */
AnnaBridge 143:86740a56073b 205 #define LCD_DIVIDER_28 ((uint32_t)0x00300000U) /*!< LCD frequency = CLKPS/28 */
AnnaBridge 143:86740a56073b 206 #define LCD_DIVIDER_29 ((uint32_t)0x00340000U) /*!< LCD frequency = CLKPS/29 */
AnnaBridge 143:86740a56073b 207 #define LCD_DIVIDER_30 ((uint32_t)0x00380000U) /*!< LCD frequency = CLKPS/30 */
AnnaBridge 143:86740a56073b 208 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */
AnnaBridge 143:86740a56073b 209
AnnaBridge 143:86740a56073b 210 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
AnnaBridge 143:86740a56073b 211 ((__DIVIDER__) == LCD_DIVIDER_17) || \
AnnaBridge 143:86740a56073b 212 ((__DIVIDER__) == LCD_DIVIDER_18) || \
AnnaBridge 143:86740a56073b 213 ((__DIVIDER__) == LCD_DIVIDER_19) || \
AnnaBridge 143:86740a56073b 214 ((__DIVIDER__) == LCD_DIVIDER_20) || \
AnnaBridge 143:86740a56073b 215 ((__DIVIDER__) == LCD_DIVIDER_21) || \
AnnaBridge 143:86740a56073b 216 ((__DIVIDER__) == LCD_DIVIDER_22) || \
AnnaBridge 143:86740a56073b 217 ((__DIVIDER__) == LCD_DIVIDER_23) || \
AnnaBridge 143:86740a56073b 218 ((__DIVIDER__) == LCD_DIVIDER_24) || \
AnnaBridge 143:86740a56073b 219 ((__DIVIDER__) == LCD_DIVIDER_25) || \
AnnaBridge 143:86740a56073b 220 ((__DIVIDER__) == LCD_DIVIDER_26) || \
AnnaBridge 143:86740a56073b 221 ((__DIVIDER__) == LCD_DIVIDER_27) || \
AnnaBridge 143:86740a56073b 222 ((__DIVIDER__) == LCD_DIVIDER_28) || \
AnnaBridge 143:86740a56073b 223 ((__DIVIDER__) == LCD_DIVIDER_29) || \
AnnaBridge 143:86740a56073b 224 ((__DIVIDER__) == LCD_DIVIDER_30) || \
AnnaBridge 143:86740a56073b 225 ((__DIVIDER__) == LCD_DIVIDER_31))
AnnaBridge 143:86740a56073b 226
AnnaBridge 143:86740a56073b 227 /**
AnnaBridge 143:86740a56073b 228 * @}
AnnaBridge 143:86740a56073b 229 */
AnnaBridge 143:86740a56073b 230
AnnaBridge 143:86740a56073b 231
AnnaBridge 143:86740a56073b 232 /** @defgroup LCD_Duty LCD Duty
AnnaBridge 143:86740a56073b 233 * @{
AnnaBridge 143:86740a56073b 234 */
AnnaBridge 143:86740a56073b 235
AnnaBridge 143:86740a56073b 236 #define LCD_DUTY_STATIC ((uint32_t)0x00000000U) /*!< Static duty */
AnnaBridge 143:86740a56073b 237 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
AnnaBridge 143:86740a56073b 238 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
AnnaBridge 143:86740a56073b 239 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
AnnaBridge 143:86740a56073b 240 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
AnnaBridge 143:86740a56073b 241
AnnaBridge 143:86740a56073b 242 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
AnnaBridge 143:86740a56073b 243 ((__DUTY__) == LCD_DUTY_1_2) || \
AnnaBridge 143:86740a56073b 244 ((__DUTY__) == LCD_DUTY_1_3) || \
AnnaBridge 143:86740a56073b 245 ((__DUTY__) == LCD_DUTY_1_4) || \
AnnaBridge 143:86740a56073b 246 ((__DUTY__) == LCD_DUTY_1_8))
AnnaBridge 143:86740a56073b 247
AnnaBridge 143:86740a56073b 248 /**
AnnaBridge 143:86740a56073b 249 * @}
AnnaBridge 143:86740a56073b 250 */
AnnaBridge 143:86740a56073b 251
AnnaBridge 143:86740a56073b 252
AnnaBridge 143:86740a56073b 253 /** @defgroup LCD_Bias LCD Bias
AnnaBridge 143:86740a56073b 254 * @{
AnnaBridge 143:86740a56073b 255 */
AnnaBridge 143:86740a56073b 256
AnnaBridge 143:86740a56073b 257 #define LCD_BIAS_1_4 ((uint32_t)0x00000000U) /*!< 1/4 Bias */
AnnaBridge 143:86740a56073b 258 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
AnnaBridge 143:86740a56073b 259 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
AnnaBridge 143:86740a56073b 260
AnnaBridge 143:86740a56073b 261 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
AnnaBridge 143:86740a56073b 262 ((__BIAS__) == LCD_BIAS_1_2) || \
AnnaBridge 143:86740a56073b 263 ((__BIAS__) == LCD_BIAS_1_3))
AnnaBridge 143:86740a56073b 264 /**
AnnaBridge 143:86740a56073b 265 * @}
AnnaBridge 143:86740a56073b 266 */
AnnaBridge 143:86740a56073b 267
AnnaBridge 143:86740a56073b 268 /** @defgroup LCD_Voltage_Source LCD Voltage Source
AnnaBridge 143:86740a56073b 269 * @{
AnnaBridge 143:86740a56073b 270 */
AnnaBridge 143:86740a56073b 271
AnnaBridge 143:86740a56073b 272 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000U) /*!< Internal voltage source for the LCD */
AnnaBridge 143:86740a56073b 273 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
AnnaBridge 143:86740a56073b 274
AnnaBridge 143:86740a56073b 275 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
AnnaBridge 143:86740a56073b 276 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
AnnaBridge 143:86740a56073b 277
AnnaBridge 143:86740a56073b 278 /**
AnnaBridge 143:86740a56073b 279 * @}
AnnaBridge 143:86740a56073b 280 */
AnnaBridge 143:86740a56073b 281
AnnaBridge 143:86740a56073b 282 /** @defgroup LCD_Interrupts LCD Interrupts
AnnaBridge 143:86740a56073b 283 * @{
AnnaBridge 143:86740a56073b 284 */
AnnaBridge 143:86740a56073b 285 #define LCD_IT_SOF LCD_FCR_SOFIE
AnnaBridge 143:86740a56073b 286 #define LCD_IT_UDD LCD_FCR_UDDIE
AnnaBridge 143:86740a56073b 287
AnnaBridge 143:86740a56073b 288 /**
AnnaBridge 143:86740a56073b 289 * @}
AnnaBridge 143:86740a56073b 290 */
AnnaBridge 143:86740a56073b 291
AnnaBridge 143:86740a56073b 292 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
AnnaBridge 143:86740a56073b 293 * @{
AnnaBridge 143:86740a56073b 294 */
AnnaBridge 143:86740a56073b 295
AnnaBridge 143:86740a56073b 296 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000U) /*!< Pulse ON duration = 0 pulse */
AnnaBridge 143:86740a56073b 297 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
AnnaBridge 143:86740a56073b 298 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
AnnaBridge 143:86740a56073b 299 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
AnnaBridge 143:86740a56073b 300 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
AnnaBridge 143:86740a56073b 301 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
AnnaBridge 143:86740a56073b 302 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
AnnaBridge 143:86740a56073b 303 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
AnnaBridge 143:86740a56073b 304
AnnaBridge 143:86740a56073b 305 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
AnnaBridge 143:86740a56073b 306 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
AnnaBridge 143:86740a56073b 307 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
AnnaBridge 143:86740a56073b 308 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
AnnaBridge 143:86740a56073b 309 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
AnnaBridge 143:86740a56073b 310 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
AnnaBridge 143:86740a56073b 311 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
AnnaBridge 143:86740a56073b 312 ((__DURATION__) == LCD_PULSEONDURATION_7))
AnnaBridge 143:86740a56073b 313 /**
AnnaBridge 143:86740a56073b 314 * @}
AnnaBridge 143:86740a56073b 315 */
AnnaBridge 143:86740a56073b 316
AnnaBridge 143:86740a56073b 317 /** @defgroup LCD_HighDrive LCD HighDrive
AnnaBridge 143:86740a56073b 318 * @{
AnnaBridge 143:86740a56073b 319 */
AnnaBridge 143:86740a56073b 320
AnnaBridge 143:86740a56073b 321 #define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000U) /*!< Low resistance Drive */
AnnaBridge 143:86740a56073b 322 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */
AnnaBridge 143:86740a56073b 323
AnnaBridge 143:86740a56073b 324 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \
AnnaBridge 143:86740a56073b 325 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
AnnaBridge 143:86740a56073b 326 /**
AnnaBridge 143:86740a56073b 327 * @}
AnnaBridge 143:86740a56073b 328 */
AnnaBridge 143:86740a56073b 329
AnnaBridge 143:86740a56073b 330 /** @defgroup LCD_DeadTime LCD Dead Time
AnnaBridge 143:86740a56073b 331 * @{
AnnaBridge 143:86740a56073b 332 */
AnnaBridge 143:86740a56073b 333
AnnaBridge 143:86740a56073b 334 #define LCD_DEADTIME_0 ((uint32_t)0x00000000U) /*!< No dead Time */
AnnaBridge 143:86740a56073b 335 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 336 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 337 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 338 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 339 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 340 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 341 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
AnnaBridge 143:86740a56073b 342
AnnaBridge 143:86740a56073b 343 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
AnnaBridge 143:86740a56073b 344 ((__TIME__) == LCD_DEADTIME_1) || \
AnnaBridge 143:86740a56073b 345 ((__TIME__) == LCD_DEADTIME_2) || \
AnnaBridge 143:86740a56073b 346 ((__TIME__) == LCD_DEADTIME_3) || \
AnnaBridge 143:86740a56073b 347 ((__TIME__) == LCD_DEADTIME_4) || \
AnnaBridge 143:86740a56073b 348 ((__TIME__) == LCD_DEADTIME_5) || \
AnnaBridge 143:86740a56073b 349 ((__TIME__) == LCD_DEADTIME_6) || \
AnnaBridge 143:86740a56073b 350 ((__TIME__) == LCD_DEADTIME_7))
AnnaBridge 143:86740a56073b 351 /**
AnnaBridge 143:86740a56073b 352 * @}
AnnaBridge 143:86740a56073b 353 */
AnnaBridge 143:86740a56073b 354
AnnaBridge 143:86740a56073b 355 /** @defgroup LCD_BlinkMode LCD Blink Mode
AnnaBridge 143:86740a56073b 356 * @{
AnnaBridge 143:86740a56073b 357 */
AnnaBridge 143:86740a56073b 358
AnnaBridge 143:86740a56073b 359 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000U) /*!< Blink disabled */
AnnaBridge 143:86740a56073b 360 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
AnnaBridge 143:86740a56073b 361 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
AnnaBridge 143:86740a56073b 362 8 pixels according to the programmed duty) */
AnnaBridge 143:86740a56073b 363 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
AnnaBridge 143:86740a56073b 364
AnnaBridge 143:86740a56073b 365 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
AnnaBridge 143:86740a56073b 366 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
AnnaBridge 143:86740a56073b 367 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
AnnaBridge 143:86740a56073b 368 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
AnnaBridge 143:86740a56073b 369 /**
AnnaBridge 143:86740a56073b 370 * @}
AnnaBridge 143:86740a56073b 371 */
AnnaBridge 143:86740a56073b 372
AnnaBridge 143:86740a56073b 373 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
AnnaBridge 143:86740a56073b 374 * @{
AnnaBridge 143:86740a56073b 375 */
AnnaBridge 143:86740a56073b 376
AnnaBridge 143:86740a56073b 377 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000U) /*!< The Blink frequency = fLCD/8 */
AnnaBridge 143:86740a56073b 378 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
AnnaBridge 143:86740a56073b 379 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
AnnaBridge 143:86740a56073b 380 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
AnnaBridge 143:86740a56073b 381 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
AnnaBridge 143:86740a56073b 382 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
AnnaBridge 143:86740a56073b 383 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
AnnaBridge 143:86740a56073b 384 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
AnnaBridge 143:86740a56073b 385
AnnaBridge 143:86740a56073b 386 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
AnnaBridge 143:86740a56073b 387 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
AnnaBridge 143:86740a56073b 388 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
AnnaBridge 143:86740a56073b 389 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
AnnaBridge 143:86740a56073b 390 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
AnnaBridge 143:86740a56073b 391 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
AnnaBridge 143:86740a56073b 392 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
AnnaBridge 143:86740a56073b 393 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
AnnaBridge 143:86740a56073b 394 /**
AnnaBridge 143:86740a56073b 395 * @}
AnnaBridge 143:86740a56073b 396 */
AnnaBridge 143:86740a56073b 397
AnnaBridge 143:86740a56073b 398 /** @defgroup LCD_Contrast LCD Contrast
AnnaBridge 143:86740a56073b 399 * @{
AnnaBridge 143:86740a56073b 400 */
AnnaBridge 143:86740a56073b 401
AnnaBridge 143:86740a56073b 402 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000U) /*!< Maximum Voltage = 2.60V */
AnnaBridge 143:86740a56073b 403 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
AnnaBridge 143:86740a56073b 404 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
AnnaBridge 143:86740a56073b 405 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
AnnaBridge 143:86740a56073b 406 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
AnnaBridge 143:86740a56073b 407 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */
AnnaBridge 143:86740a56073b 408 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */
AnnaBridge 143:86740a56073b 409 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */
AnnaBridge 143:86740a56073b 410
AnnaBridge 143:86740a56073b 411 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
AnnaBridge 143:86740a56073b 412 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
AnnaBridge 143:86740a56073b 413 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
AnnaBridge 143:86740a56073b 414 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
AnnaBridge 143:86740a56073b 415 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
AnnaBridge 143:86740a56073b 416 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
AnnaBridge 143:86740a56073b 417 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
AnnaBridge 143:86740a56073b 418 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
AnnaBridge 143:86740a56073b 419 /**
AnnaBridge 143:86740a56073b 420 * @}
AnnaBridge 143:86740a56073b 421 */
AnnaBridge 143:86740a56073b 422
AnnaBridge 143:86740a56073b 423 /** @defgroup LCD_MuxSegment LCD Mux Segment
AnnaBridge 143:86740a56073b 424 * @{
AnnaBridge 143:86740a56073b 425 */
AnnaBridge 143:86740a56073b 426
AnnaBridge 143:86740a56073b 427 #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000U) /*!< SEG pin multiplexing disabled */
AnnaBridge 143:86740a56073b 428 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */
AnnaBridge 143:86740a56073b 429
AnnaBridge 143:86740a56073b 430 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
AnnaBridge 143:86740a56073b 431 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
AnnaBridge 143:86740a56073b 432 /**
AnnaBridge 143:86740a56073b 433 * @}
AnnaBridge 143:86740a56073b 434 */
AnnaBridge 167:84c0a372a020 435
AnnaBridge 143:86740a56073b 436 /** @defgroup LCD_BUFEN LCD Voltage output buffer enable
AnnaBridge 143:86740a56073b 437 * @{
AnnaBridge 143:86740a56073b 438 */
AnnaBridge 143:86740a56073b 439
AnnaBridge 143:86740a56073b 440 #define LCD_VOLTBUFOUT_DISABLE ((uint32_t)0x00000000U) /*!< Voltage output buffer disabled */
AnnaBridge 143:86740a56073b 441 #define LCD_VOLTBUFOUT_ENABLE (LCD_CR_BUFEN) /*!< BUFEN[1] Voltage output buffer enabled */
AnnaBridge 143:86740a56073b 442
AnnaBridge 143:86740a56073b 443 #define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \
AnnaBridge 143:86740a56073b 444 ((__VALUE__) == LCD_VOLTBUFOUT_DISABLE))
AnnaBridge 143:86740a56073b 445 /**
AnnaBridge 143:86740a56073b 446 * @}
AnnaBridge 143:86740a56073b 447 */
AnnaBridge 143:86740a56073b 448
AnnaBridge 143:86740a56073b 449 /** @defgroup LCD_Flag LCD Flag
AnnaBridge 143:86740a56073b 450 * @{
AnnaBridge 143:86740a56073b 451 */
AnnaBridge 143:86740a56073b 452
AnnaBridge 143:86740a56073b 453 #define LCD_FLAG_ENS LCD_SR_ENS
AnnaBridge 143:86740a56073b 454 #define LCD_FLAG_SOF LCD_SR_SOF
AnnaBridge 143:86740a56073b 455 #define LCD_FLAG_UDR LCD_SR_UDR
AnnaBridge 143:86740a56073b 456 #define LCD_FLAG_UDD LCD_SR_UDD
AnnaBridge 143:86740a56073b 457 #define LCD_FLAG_RDY LCD_SR_RDY
AnnaBridge 143:86740a56073b 458 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
AnnaBridge 143:86740a56073b 459
AnnaBridge 143:86740a56073b 460 /**
AnnaBridge 143:86740a56073b 461 * @}
AnnaBridge 143:86740a56073b 462 */
AnnaBridge 143:86740a56073b 463
AnnaBridge 143:86740a56073b 464 /** @defgroup LCD_RAMRegister LCD RAMRegister
AnnaBridge 143:86740a56073b 465 * @{
AnnaBridge 143:86740a56073b 466 */
AnnaBridge 143:86740a56073b 467
AnnaBridge 143:86740a56073b 468 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000U) /*!< LCD RAM Register 0 */
AnnaBridge 143:86740a56073b 469 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001U) /*!< LCD RAM Register 1 */
AnnaBridge 143:86740a56073b 470 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002U) /*!< LCD RAM Register 2 */
AnnaBridge 143:86740a56073b 471 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003U) /*!< LCD RAM Register 3 */
AnnaBridge 143:86740a56073b 472 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004U) /*!< LCD RAM Register 4 */
AnnaBridge 143:86740a56073b 473 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005U) /*!< LCD RAM Register 5 */
AnnaBridge 143:86740a56073b 474 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006U) /*!< LCD RAM Register 6 */
AnnaBridge 143:86740a56073b 475 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007U) /*!< LCD RAM Register 7 */
AnnaBridge 143:86740a56073b 476 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008U) /*!< LCD RAM Register 8 */
AnnaBridge 143:86740a56073b 477 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009U) /*!< LCD RAM Register 9 */
AnnaBridge 143:86740a56073b 478 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000AU) /*!< LCD RAM Register 10 */
AnnaBridge 143:86740a56073b 479 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000BU) /*!< LCD RAM Register 11 */
AnnaBridge 143:86740a56073b 480 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000CU) /*!< LCD RAM Register 12 */
AnnaBridge 143:86740a56073b 481 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000DU) /*!< LCD RAM Register 13 */
AnnaBridge 143:86740a56073b 482 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000EU) /*!< LCD RAM Register 14 */
AnnaBridge 143:86740a56073b 483 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000FU) /*!< LCD RAM Register 15 */
AnnaBridge 143:86740a56073b 484
AnnaBridge 143:86740a56073b 485 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
AnnaBridge 143:86740a56073b 486 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
AnnaBridge 143:86740a56073b 487 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
AnnaBridge 143:86740a56073b 488 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
AnnaBridge 143:86740a56073b 489 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
AnnaBridge 143:86740a56073b 490 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
AnnaBridge 143:86740a56073b 491 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
AnnaBridge 143:86740a56073b 492 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
AnnaBridge 143:86740a56073b 493 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
AnnaBridge 143:86740a56073b 494 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
AnnaBridge 143:86740a56073b 495 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
AnnaBridge 143:86740a56073b 496 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
AnnaBridge 143:86740a56073b 497 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
AnnaBridge 143:86740a56073b 498 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
AnnaBridge 143:86740a56073b 499 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
AnnaBridge 143:86740a56073b 500 ((__REGISTER__) == LCD_RAM_REGISTER15))
AnnaBridge 143:86740a56073b 501
AnnaBridge 143:86740a56073b 502 /**
AnnaBridge 143:86740a56073b 503 * @}
AnnaBridge 143:86740a56073b 504 */
AnnaBridge 143:86740a56073b 505
AnnaBridge 143:86740a56073b 506 /**
AnnaBridge 143:86740a56073b 507 * @}
AnnaBridge 143:86740a56073b 508 */
AnnaBridge 143:86740a56073b 509
AnnaBridge 143:86740a56073b 510 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 511
AnnaBridge 143:86740a56073b 512 /** @defgroup LCD_Exported_Macros LCD Exported Macros
AnnaBridge 143:86740a56073b 513 * @{
AnnaBridge 143:86740a56073b 514 */
AnnaBridge 143:86740a56073b 515
AnnaBridge 143:86740a56073b 516 /** @brief Reset LCD handle state
AnnaBridge 143:86740a56073b 517 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 518 * @retval None
AnnaBridge 143:86740a56073b 519 */
AnnaBridge 143:86740a56073b 520 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
AnnaBridge 143:86740a56073b 521
AnnaBridge 143:86740a56073b 522 /** @brief macros to enables or disables the LCD
AnnaBridge 143:86740a56073b 523 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 524 * @retval None
AnnaBridge 143:86740a56073b 525 */
AnnaBridge 143:86740a56073b 526 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
AnnaBridge 143:86740a56073b 527 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
AnnaBridge 143:86740a56073b 528
AnnaBridge 143:86740a56073b 529 /** @brief macros to enables or disables the Voltage output buffer
AnnaBridge 143:86740a56073b 530 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 531 * @retval None
AnnaBridge 143:86740a56073b 532 */
AnnaBridge 143:86740a56073b 533 #define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
AnnaBridge 143:86740a56073b 534 #define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
AnnaBridge 143:86740a56073b 535
AnnaBridge 143:86740a56073b 536 /** @brief Macros to enable or disable the low resistance divider. Displays with high
AnnaBridge 143:86740a56073b 537 * internal resistance may need a longer drive time to achieve
AnnaBridge 143:86740a56073b 538 * satisfactory contrast. This function is useful in this case if some
AnnaBridge 143:86740a56073b 539 * additional power consumption can be tolerated.
AnnaBridge 143:86740a56073b 540 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 541 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
AnnaBridge 143:86740a56073b 542 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
AnnaBridge 143:86740a56073b 543 * @retval None
AnnaBridge 143:86740a56073b 544 */
AnnaBridge 143:86740a56073b 545 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
AnnaBridge 143:86740a56073b 546 do{ \
AnnaBridge 143:86740a56073b 547 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
AnnaBridge 143:86740a56073b 548 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 549 }while(0)
AnnaBridge 143:86740a56073b 550
AnnaBridge 143:86740a56073b 551 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
AnnaBridge 143:86740a56073b 552 do{ \
AnnaBridge 143:86740a56073b 553 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
AnnaBridge 143:86740a56073b 554 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 555 }while(0)
AnnaBridge 143:86740a56073b 556
AnnaBridge 143:86740a56073b 557 /**
AnnaBridge 143:86740a56073b 558 * @brief Macro to configure the LCD pulses on duration.
AnnaBridge 143:86740a56073b 559 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 560 * @param __DURATION__: specifies the LCD pulse on duration in terms of
AnnaBridge 143:86740a56073b 561 * CK_PS (prescaled LCD clock period) pulses.
AnnaBridge 143:86740a56073b 562 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 563 * @arg LCD_PULSEONDURATION_0: 0 pulse
AnnaBridge 143:86740a56073b 564 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
AnnaBridge 143:86740a56073b 565 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
AnnaBridge 143:86740a56073b 566 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
AnnaBridge 143:86740a56073b 567 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
AnnaBridge 143:86740a56073b 568 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
AnnaBridge 143:86740a56073b 569 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
AnnaBridge 143:86740a56073b 570 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
AnnaBridge 143:86740a56073b 571 * @retval None
AnnaBridge 143:86740a56073b 572 */
AnnaBridge 143:86740a56073b 573 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
AnnaBridge 143:86740a56073b 574 do{ \
AnnaBridge 143:86740a56073b 575 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
AnnaBridge 143:86740a56073b 576 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 577 }while(0)
AnnaBridge 143:86740a56073b 578
AnnaBridge 143:86740a56073b 579 /**
AnnaBridge 143:86740a56073b 580 * @brief Macro to configure the LCD dead time.
AnnaBridge 143:86740a56073b 581 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 582 * @param __DEADTIME__: specifies the LCD dead time.
AnnaBridge 143:86740a56073b 583 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 584 * @arg LCD_DEADTIME_0: No dead Time
AnnaBridge 143:86740a56073b 585 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
AnnaBridge 143:86740a56073b 586 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
AnnaBridge 143:86740a56073b 587 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
AnnaBridge 143:86740a56073b 588 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
AnnaBridge 143:86740a56073b 589 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
AnnaBridge 143:86740a56073b 590 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
AnnaBridge 143:86740a56073b 591 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
AnnaBridge 143:86740a56073b 592 * @retval None
AnnaBridge 143:86740a56073b 593 */
AnnaBridge 143:86740a56073b 594 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
AnnaBridge 143:86740a56073b 595 do{ \
AnnaBridge 143:86740a56073b 596 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
AnnaBridge 143:86740a56073b 597 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 598 }while(0)
AnnaBridge 143:86740a56073b 599
AnnaBridge 143:86740a56073b 600 /**
AnnaBridge 143:86740a56073b 601 * @brief Macro to configure the LCD Contrast.
AnnaBridge 143:86740a56073b 602 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 603 * @param __CONTRAST__: specifies the LCD Contrast.
AnnaBridge 143:86740a56073b 604 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 605 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
AnnaBridge 143:86740a56073b 606 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
AnnaBridge 143:86740a56073b 607 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
AnnaBridge 143:86740a56073b 608 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
AnnaBridge 143:86740a56073b 609 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
AnnaBridge 143:86740a56073b 610 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
AnnaBridge 143:86740a56073b 611 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
AnnaBridge 143:86740a56073b 612 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
AnnaBridge 143:86740a56073b 613 * @retval None
AnnaBridge 143:86740a56073b 614 */
AnnaBridge 143:86740a56073b 615 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
AnnaBridge 143:86740a56073b 616 do{ \
AnnaBridge 143:86740a56073b 617 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
AnnaBridge 143:86740a56073b 618 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 619 } while(0)
AnnaBridge 143:86740a56073b 620
AnnaBridge 143:86740a56073b 621 /**
AnnaBridge 143:86740a56073b 622 * @brief Macro to configure the LCD Blink mode and Blink frequency.
AnnaBridge 143:86740a56073b 623 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 624 * @param __BLINKMODE__: specifies the LCD blink mode.
AnnaBridge 143:86740a56073b 625 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 626 * @arg LCD_BLINKMODE_OFF: Blink disabled
AnnaBridge 143:86740a56073b 627 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
AnnaBridge 143:86740a56073b 628 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
AnnaBridge 143:86740a56073b 629 * pixels according to the programmed duty)
AnnaBridge 143:86740a56073b 630 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
AnnaBridge 143:86740a56073b 631 * (all pixels)
AnnaBridge 143:86740a56073b 632 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
AnnaBridge 143:86740a56073b 633 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
AnnaBridge 143:86740a56073b 634 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
AnnaBridge 143:86740a56073b 635 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
AnnaBridge 143:86740a56073b 636 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
AnnaBridge 143:86740a56073b 637 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
AnnaBridge 143:86740a56073b 638 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
AnnaBridge 143:86740a56073b 639 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
AnnaBridge 143:86740a56073b 640 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
AnnaBridge 143:86740a56073b 641 * @retval None
AnnaBridge 143:86740a56073b 642 */
AnnaBridge 143:86740a56073b 643 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
AnnaBridge 143:86740a56073b 644 do{ \
AnnaBridge 143:86740a56073b 645 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
AnnaBridge 143:86740a56073b 646 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 647 }while(0)
AnnaBridge 143:86740a56073b 648
AnnaBridge 143:86740a56073b 649 /** @brief Enables or disables the specified LCD interrupt.
AnnaBridge 143:86740a56073b 650 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 651 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
AnnaBridge 143:86740a56073b 652 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 653 * @arg LCD_IT_SOF: Start of Frame Interrupt
AnnaBridge 143:86740a56073b 654 * @arg LCD_IT_UDD: Update Display Done Interrupt
AnnaBridge 143:86740a56073b 655 * @retval None
AnnaBridge 143:86740a56073b 656 */
AnnaBridge 143:86740a56073b 657 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
AnnaBridge 143:86740a56073b 658 do{ \
AnnaBridge 143:86740a56073b 659 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
AnnaBridge 143:86740a56073b 660 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 661 }while(0)
AnnaBridge 143:86740a56073b 662 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
AnnaBridge 143:86740a56073b 663 do{ \
AnnaBridge 143:86740a56073b 664 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
AnnaBridge 143:86740a56073b 665 LCD_WaitForSynchro(__HANDLE__); \
AnnaBridge 143:86740a56073b 666 }while(0)
AnnaBridge 143:86740a56073b 667
AnnaBridge 143:86740a56073b 668 /** @brief Checks whether the specified LCD interrupt is enabled or not.
AnnaBridge 143:86740a56073b 669 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 670 * @param __IT__: specifies the LCD interrupt source to check.
AnnaBridge 143:86740a56073b 671 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 672 * @arg LCD_IT_SOF: Start of Frame Interrupt
AnnaBridge 143:86740a56073b 673 * @arg LCD_IT_UDD: Update Display Done Interrupt.
AnnaBridge 143:86740a56073b 674 * @note If the device is in STOP mode (PCLK not provided) UDD will not
AnnaBridge 143:86740a56073b 675 * generate an interrupt even if UDDIE = 1.
AnnaBridge 143:86740a56073b 676 * If the display is not enabled the UDD interrupt will never occur.
AnnaBridge 143:86740a56073b 677 * @retval The state of __IT__ (TRUE or FALSE).
AnnaBridge 143:86740a56073b 678 */
AnnaBridge 143:86740a56073b 679 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
AnnaBridge 143:86740a56073b 680
AnnaBridge 143:86740a56073b 681 /** @brief Checks whether the specified LCD flag is set or not.
AnnaBridge 143:86740a56073b 682 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 683 * @param __FLAG__: specifies the flag to check.
AnnaBridge 143:86740a56073b 684 * This parameter can be one of the following values:
AnnaBridge 143:86740a56073b 685 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
AnnaBridge 143:86740a56073b 686 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
AnnaBridge 143:86740a56073b 687 * goes from 0 to 1. On deactivation it reflects the real status of
AnnaBridge 143:86740a56073b 688 * LCD so it becomes 0 at the end of the last displayed frame.
AnnaBridge 143:86740a56073b 689 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
AnnaBridge 143:86740a56073b 690 * the beginning of a new frame, at the same time as the display data is
AnnaBridge 143:86740a56073b 691 * updated.
AnnaBridge 143:86740a56073b 692 * @arg LCD_FLAG_UDR: Update Display Request flag.
AnnaBridge 143:86740a56073b 693 * @arg LCD_FLAG_UDD: Update Display Done flag.
AnnaBridge 143:86740a56073b 694 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
AnnaBridge 143:86740a56073b 695 * of the step-up converter.
AnnaBridge 143:86740a56073b 696 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
AnnaBridge 143:86740a56073b 697 * This flag is set by hardware each time the LCD_FCR register is updated
AnnaBridge 143:86740a56073b 698 * in the LCDCLK domain.
AnnaBridge 143:86740a56073b 699 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 143:86740a56073b 700 */
AnnaBridge 143:86740a56073b 701 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
AnnaBridge 143:86740a56073b 702
AnnaBridge 143:86740a56073b 703 /** @brief Clears the specified LCD pending flag.
AnnaBridge 143:86740a56073b 704 * @param __HANDLE__: specifies the LCD Handle.
AnnaBridge 143:86740a56073b 705 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 143:86740a56073b 706 * This parameter can be any combination of the following values:
AnnaBridge 143:86740a56073b 707 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
AnnaBridge 143:86740a56073b 708 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
AnnaBridge 143:86740a56073b 709 * @retval None
AnnaBridge 143:86740a56073b 710 */
AnnaBridge 143:86740a56073b 711 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__))
AnnaBridge 143:86740a56073b 712
AnnaBridge 143:86740a56073b 713 /**
AnnaBridge 143:86740a56073b 714 * @}
AnnaBridge 143:86740a56073b 715 */
AnnaBridge 143:86740a56073b 716
AnnaBridge 143:86740a56073b 717 /* Exported functions ------------------------------------------------------- */
AnnaBridge 143:86740a56073b 718
AnnaBridge 143:86740a56073b 719 /** @defgroup LCD_Exported_Functions LCD Exported Functions
AnnaBridge 143:86740a56073b 720 * @{
AnnaBridge 143:86740a56073b 721 */
AnnaBridge 143:86740a56073b 722
AnnaBridge 143:86740a56073b 723 /** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
AnnaBridge 143:86740a56073b 724 * @{
AnnaBridge 143:86740a56073b 725 */
AnnaBridge 143:86740a56073b 726
AnnaBridge 143:86740a56073b 727 /* Initialization/de-initialization methods **********************************/
AnnaBridge 143:86740a56073b 728 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 729 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 730 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 731 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 732
AnnaBridge 143:86740a56073b 733 /**
AnnaBridge 143:86740a56073b 734 * @}
AnnaBridge 143:86740a56073b 735 */
AnnaBridge 143:86740a56073b 736
AnnaBridge 143:86740a56073b 737 /** @defgroup LCD_Exported_Functions_Group2 IO operation methods
AnnaBridge 143:86740a56073b 738 * @{
AnnaBridge 143:86740a56073b 739 */
AnnaBridge 143:86740a56073b 740
AnnaBridge 143:86740a56073b 741 /* IO operation methods *******************************************************/
AnnaBridge 143:86740a56073b 742 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
AnnaBridge 143:86740a56073b 743 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 744 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 745
AnnaBridge 143:86740a56073b 746 /**
AnnaBridge 143:86740a56073b 747 * @}
AnnaBridge 143:86740a56073b 748 */
AnnaBridge 143:86740a56073b 749
AnnaBridge 143:86740a56073b 750 /** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
AnnaBridge 143:86740a56073b 751 * @{
AnnaBridge 143:86740a56073b 752 */
AnnaBridge 143:86740a56073b 753
AnnaBridge 143:86740a56073b 754 /* Peripheral State methods **************************************************/
AnnaBridge 143:86740a56073b 755 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 756 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 757
AnnaBridge 143:86740a56073b 758 /**
AnnaBridge 143:86740a56073b 759 * @}
AnnaBridge 143:86740a56073b 760 */
AnnaBridge 143:86740a56073b 761
AnnaBridge 143:86740a56073b 762 /**
AnnaBridge 143:86740a56073b 763 * @}
AnnaBridge 143:86740a56073b 764 */
AnnaBridge 143:86740a56073b 765
AnnaBridge 143:86740a56073b 766 /** @addtogroup LCD_Private
AnnaBridge 143:86740a56073b 767 * @{
AnnaBridge 143:86740a56073b 768 */
AnnaBridge 143:86740a56073b 769
AnnaBridge 143:86740a56073b 770 /* Private functions ---------------------------------------------------------*/
AnnaBridge 143:86740a56073b 771 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
AnnaBridge 143:86740a56073b 772
AnnaBridge 143:86740a56073b 773 /**
AnnaBridge 143:86740a56073b 774 * @}
AnnaBridge 143:86740a56073b 775 */
AnnaBridge 143:86740a56073b 776
AnnaBridge 143:86740a56073b 777 /* Define the private group ***********************************/
AnnaBridge 143:86740a56073b 778 /**************************************************************/
AnnaBridge 143:86740a56073b 779 /** @defgroup LCD_Private LCD Private
AnnaBridge 143:86740a56073b 780 * @{
AnnaBridge 143:86740a56073b 781 */
AnnaBridge 143:86740a56073b 782 /**
AnnaBridge 143:86740a56073b 783 * @}
AnnaBridge 143:86740a56073b 784 */
AnnaBridge 143:86740a56073b 785 /**************************************************************/
AnnaBridge 143:86740a56073b 786
AnnaBridge 143:86740a56073b 787 /**
AnnaBridge 143:86740a56073b 788 * @}
AnnaBridge 143:86740a56073b 789 */
AnnaBridge 143:86740a56073b 790
AnnaBridge 143:86740a56073b 791 /**
AnnaBridge 143:86740a56073b 792 * @}
AnnaBridge 143:86740a56073b 793 */
AnnaBridge 143:86740a56073b 794
AnnaBridge 167:84c0a372a020 795 #endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */
AnnaBridge 167:84c0a372a020 796
AnnaBridge 143:86740a56073b 797 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 798 }
AnnaBridge 143:86740a56073b 799 #endif
AnnaBridge 143:86740a56073b 800
AnnaBridge 143:86740a56073b 801 #endif /* __STM32L0xx_HAL_LCD_H */
AnnaBridge 143:86740a56073b 802
AnnaBridge 143:86740a56073b 803 /******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
AnnaBridge 143:86740a56073b 804