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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_hal_i2s.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_L072CZ_LRWAN1/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_i2s.h@167:84c0a372a020
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 143:86740a56073b | 1 | /** |
| AnnaBridge | 143:86740a56073b | 2 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 3 | * @file stm32l0xx_hal_i2s.h |
| AnnaBridge | 143:86740a56073b | 4 | * @author MCD Application Team |
| AnnaBridge | 143:86740a56073b | 5 | * @brief Header file of I2S HAL module. |
| AnnaBridge | 143:86740a56073b | 6 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 7 | * @attention |
| AnnaBridge | 143:86740a56073b | 8 | * |
| AnnaBridge | 143:86740a56073b | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 143:86740a56073b | 10 | * |
| AnnaBridge | 143:86740a56073b | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 143:86740a56073b | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 143:86740a56073b | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 143:86740a56073b | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 143:86740a56073b | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 143:86740a56073b | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 143:86740a56073b | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 143:86740a56073b | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 143:86740a56073b | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 143:86740a56073b | 20 | * without specific prior written permission. |
| AnnaBridge | 143:86740a56073b | 21 | * |
| AnnaBridge | 143:86740a56073b | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 143:86740a56073b | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 143:86740a56073b | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 143:86740a56073b | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 143:86740a56073b | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 143:86740a56073b | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 143:86740a56073b | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 143:86740a56073b | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 143:86740a56073b | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 143:86740a56073b | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 143:86740a56073b | 32 | * |
| AnnaBridge | 143:86740a56073b | 33 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 34 | */ |
| AnnaBridge | 143:86740a56073b | 35 | |
| AnnaBridge | 143:86740a56073b | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 37 | #ifndef __STM32L0xx_HAL_I2S_H |
| AnnaBridge | 143:86740a56073b | 38 | #define __STM32L0xx_HAL_I2S_H |
| AnnaBridge | 143:86740a56073b | 39 | |
| AnnaBridge | 143:86740a56073b | 40 | #ifdef __cplusplus |
| AnnaBridge | 143:86740a56073b | 41 | extern "C" { |
| AnnaBridge | 143:86740a56073b | 42 | #endif |
| AnnaBridge | 143:86740a56073b | 43 | |
| AnnaBridge | 143:86740a56073b | 44 | #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L011xx) && !defined (STM32L021xx) |
| AnnaBridge | 143:86740a56073b | 45 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 46 | #include "stm32l0xx_hal_def.h" |
| AnnaBridge | 143:86740a56073b | 47 | |
| AnnaBridge | 143:86740a56073b | 48 | /** @addtogroup STM32L0xx_HAL_Driver |
| AnnaBridge | 143:86740a56073b | 49 | * @{ |
| AnnaBridge | 143:86740a56073b | 50 | */ |
| AnnaBridge | 143:86740a56073b | 51 | |
| AnnaBridge | 143:86740a56073b | 52 | /** @defgroup I2S I2S |
| AnnaBridge | 143:86740a56073b | 53 | * @{ |
| AnnaBridge | 143:86740a56073b | 54 | */ |
| AnnaBridge | 143:86740a56073b | 55 | |
| AnnaBridge | 143:86740a56073b | 56 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 57 | /** @defgroup I2S_Exported_Types I2S Exported Types |
| AnnaBridge | 143:86740a56073b | 58 | * @{ |
| AnnaBridge | 143:86740a56073b | 59 | */ |
| AnnaBridge | 143:86740a56073b | 60 | |
| AnnaBridge | 143:86740a56073b | 61 | /** |
| AnnaBridge | 143:86740a56073b | 62 | * @brief I2S Init structure definition |
| AnnaBridge | 143:86740a56073b | 63 | */ |
| AnnaBridge | 143:86740a56073b | 64 | typedef struct |
| AnnaBridge | 143:86740a56073b | 65 | { |
| AnnaBridge | 143:86740a56073b | 66 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
| AnnaBridge | 143:86740a56073b | 67 | This parameter can be a value of @ref I2S_Mode */ |
| AnnaBridge | 143:86740a56073b | 68 | |
| AnnaBridge | 143:86740a56073b | 69 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
| AnnaBridge | 143:86740a56073b | 70 | This parameter can be a value of @ref I2S_Standard */ |
| AnnaBridge | 143:86740a56073b | 71 | |
| AnnaBridge | 143:86740a56073b | 72 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
| AnnaBridge | 143:86740a56073b | 73 | This parameter can be a value of @ref I2S_Data_Format */ |
| AnnaBridge | 143:86740a56073b | 74 | |
| AnnaBridge | 143:86740a56073b | 75 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
| AnnaBridge | 143:86740a56073b | 76 | This parameter can be a value of @ref I2S_MCLK_Output */ |
| AnnaBridge | 143:86740a56073b | 77 | |
| AnnaBridge | 143:86740a56073b | 78 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
| AnnaBridge | 143:86740a56073b | 79 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
| AnnaBridge | 143:86740a56073b | 80 | |
| AnnaBridge | 143:86740a56073b | 81 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
| AnnaBridge | 143:86740a56073b | 82 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
| AnnaBridge | 143:86740a56073b | 83 | |
| AnnaBridge | 143:86740a56073b | 84 | }I2S_InitTypeDef; |
| AnnaBridge | 143:86740a56073b | 85 | |
| AnnaBridge | 143:86740a56073b | 86 | /** |
| AnnaBridge | 143:86740a56073b | 87 | * @brief HAL State structures definition |
| AnnaBridge | 143:86740a56073b | 88 | */ |
| AnnaBridge | 143:86740a56073b | 89 | typedef enum |
| AnnaBridge | 143:86740a56073b | 90 | { |
| AnnaBridge | 143:86740a56073b | 91 | HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
| AnnaBridge | 143:86740a56073b | 92 | HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
| AnnaBridge | 143:86740a56073b | 93 | HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ |
| AnnaBridge | 143:86740a56073b | 94 | HAL_I2S_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ |
| AnnaBridge | 143:86740a56073b | 95 | HAL_I2S_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
| AnnaBridge | 143:86740a56073b | 96 | HAL_I2S_STATE_TIMEOUT = 0x03U, /*!< I2S timeout state */ |
| AnnaBridge | 143:86740a56073b | 97 | HAL_I2S_STATE_ERROR = 0x04U /*!< I2S error state */ |
| AnnaBridge | 143:86740a56073b | 98 | }HAL_I2S_StateTypeDef; |
| AnnaBridge | 143:86740a56073b | 99 | |
| AnnaBridge | 143:86740a56073b | 100 | /** |
| AnnaBridge | 143:86740a56073b | 101 | * @brief I2S handle Structure definition |
| AnnaBridge | 143:86740a56073b | 102 | */ |
| AnnaBridge | 143:86740a56073b | 103 | typedef struct |
| AnnaBridge | 143:86740a56073b | 104 | { |
| AnnaBridge | 143:86740a56073b | 105 | SPI_TypeDef *Instance; /* I2S registers base address */ |
| AnnaBridge | 143:86740a56073b | 106 | |
| AnnaBridge | 143:86740a56073b | 107 | I2S_InitTypeDef Init; /* I2S communication parameters */ |
| AnnaBridge | 143:86740a56073b | 108 | |
| AnnaBridge | 143:86740a56073b | 109 | uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
| AnnaBridge | 143:86740a56073b | 110 | |
| AnnaBridge | 143:86740a56073b | 111 | __IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
| AnnaBridge | 143:86740a56073b | 112 | |
| AnnaBridge | 143:86740a56073b | 113 | __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
| AnnaBridge | 143:86740a56073b | 114 | |
| AnnaBridge | 143:86740a56073b | 115 | uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
| AnnaBridge | 143:86740a56073b | 116 | |
| AnnaBridge | 143:86740a56073b | 117 | __IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
| AnnaBridge | 143:86740a56073b | 118 | |
| AnnaBridge | 143:86740a56073b | 119 | __IO uint16_t RxXferCount; /* I2S Rx transfer counter |
| AnnaBridge | 143:86740a56073b | 120 | (This field is initialized at the |
| AnnaBridge | 143:86740a56073b | 121 | same value as transfer size at the |
| AnnaBridge | 143:86740a56073b | 122 | beginning of the transfer and |
| AnnaBridge | 143:86740a56073b | 123 | decremented when a sample is received. |
| AnnaBridge | 143:86740a56073b | 124 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
| AnnaBridge | 143:86740a56073b | 125 | |
| AnnaBridge | 143:86740a56073b | 126 | DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
| AnnaBridge | 143:86740a56073b | 127 | |
| AnnaBridge | 143:86740a56073b | 128 | DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
| AnnaBridge | 143:86740a56073b | 129 | |
| AnnaBridge | 143:86740a56073b | 130 | __IO HAL_LockTypeDef Lock; /* I2S locking object */ |
| AnnaBridge | 143:86740a56073b | 131 | |
| AnnaBridge | 143:86740a56073b | 132 | __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
| AnnaBridge | 143:86740a56073b | 133 | |
| AnnaBridge | 143:86740a56073b | 134 | __IO uint32_t ErrorCode; /* I2S Error code */ |
| AnnaBridge | 143:86740a56073b | 135 | |
| AnnaBridge | 143:86740a56073b | 136 | }I2S_HandleTypeDef; |
| AnnaBridge | 143:86740a56073b | 137 | /** |
| AnnaBridge | 143:86740a56073b | 138 | * @} |
| AnnaBridge | 143:86740a56073b | 139 | */ |
| AnnaBridge | 143:86740a56073b | 140 | |
| AnnaBridge | 143:86740a56073b | 141 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 142 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
| AnnaBridge | 143:86740a56073b | 143 | * @{ |
| AnnaBridge | 143:86740a56073b | 144 | */ |
| AnnaBridge | 143:86740a56073b | 145 | |
| AnnaBridge | 143:86740a56073b | 146 | /** |
| AnnaBridge | 143:86740a56073b | 147 | * @defgroup I2S_ErrorCode I2S Error Code |
| AnnaBridge | 143:86740a56073b | 148 | * @{ |
| AnnaBridge | 143:86740a56073b | 149 | */ |
| AnnaBridge | 143:86740a56073b | 150 | #define HAL_I2S_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
| AnnaBridge | 143:86740a56073b | 151 | #define HAL_I2S_ERROR_UDR ((uint32_t)0x01U) /*!< I2S Underrun error */ |
| AnnaBridge | 143:86740a56073b | 152 | #define HAL_I2S_ERROR_OVR ((uint32_t)0x02U) /*!< I2S Overrun error */ |
| AnnaBridge | 143:86740a56073b | 153 | #define HAL_I2S_ERROR_FRE ((uint32_t)0x04U) /*!< I2S Frame format error */ |
| AnnaBridge | 143:86740a56073b | 154 | #define HAL_I2S_ERROR_DMA ((uint32_t)0x08U) /*!< DMA transfer error */ |
| AnnaBridge | 143:86740a56073b | 155 | /** |
| AnnaBridge | 143:86740a56073b | 156 | * @} |
| AnnaBridge | 143:86740a56073b | 157 | */ |
| AnnaBridge | 143:86740a56073b | 158 | |
| AnnaBridge | 143:86740a56073b | 159 | /** @defgroup I2S_Mode I2S Mode |
| AnnaBridge | 143:86740a56073b | 160 | * @{ |
| AnnaBridge | 143:86740a56073b | 161 | */ |
| AnnaBridge | 143:86740a56073b | 162 | #define I2S_MODE_SLAVE_TX ((uint32_t) 0x00000000U) |
| AnnaBridge | 143:86740a56073b | 163 | #define I2S_MODE_SLAVE_RX ((uint32_t) SPI_I2SCFGR_I2SCFG_0) |
| AnnaBridge | 143:86740a56073b | 164 | #define I2S_MODE_MASTER_TX ((uint32_t) SPI_I2SCFGR_I2SCFG_1) |
| AnnaBridge | 143:86740a56073b | 165 | #define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\ |
| AnnaBridge | 143:86740a56073b | 166 | SPI_I2SCFGR_I2SCFG_1)) |
| AnnaBridge | 143:86740a56073b | 167 | /** |
| AnnaBridge | 143:86740a56073b | 168 | * @} |
| AnnaBridge | 143:86740a56073b | 169 | */ |
| AnnaBridge | 143:86740a56073b | 170 | |
| AnnaBridge | 143:86740a56073b | 171 | /** @defgroup I2S_Standard I2S Standard |
| AnnaBridge | 143:86740a56073b | 172 | * @{ |
| AnnaBridge | 143:86740a56073b | 173 | */ |
| AnnaBridge | 143:86740a56073b | 174 | #define I2S_STANDARD_PHILIPS ((uint32_t) 0x00000000U) |
| AnnaBridge | 143:86740a56073b | 175 | #define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) |
| AnnaBridge | 143:86740a56073b | 176 | #define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) |
| AnnaBridge | 143:86740a56073b | 177 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
| AnnaBridge | 143:86740a56073b | 178 | SPI_I2SCFGR_I2SSTD_1)) |
| AnnaBridge | 143:86740a56073b | 179 | #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
| AnnaBridge | 143:86740a56073b | 180 | SPI_I2SCFGR_I2SSTD_1 |\ |
| AnnaBridge | 143:86740a56073b | 181 | SPI_I2SCFGR_PCMSYNC)) |
| AnnaBridge | 143:86740a56073b | 182 | /** @defgroup I2S_Legacy I2S Legacy |
| AnnaBridge | 143:86740a56073b | 183 | * @{ |
| AnnaBridge | 143:86740a56073b | 184 | */ |
| AnnaBridge | 143:86740a56073b | 185 | #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
| AnnaBridge | 143:86740a56073b | 186 | /** |
| AnnaBridge | 143:86740a56073b | 187 | * @} |
| AnnaBridge | 143:86740a56073b | 188 | */ |
| AnnaBridge | 143:86740a56073b | 189 | |
| AnnaBridge | 143:86740a56073b | 190 | /** |
| AnnaBridge | 143:86740a56073b | 191 | * @} |
| AnnaBridge | 143:86740a56073b | 192 | */ |
| AnnaBridge | 143:86740a56073b | 193 | |
| AnnaBridge | 143:86740a56073b | 194 | /** @defgroup I2S_Data_Format I2S Data Format |
| AnnaBridge | 143:86740a56073b | 195 | * @{ |
| AnnaBridge | 143:86740a56073b | 196 | */ |
| AnnaBridge | 143:86740a56073b | 197 | #define I2S_DATAFORMAT_16B ((uint32_t) 0x00000000U) |
| AnnaBridge | 143:86740a56073b | 198 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) |
| AnnaBridge | 143:86740a56073b | 199 | #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
| AnnaBridge | 143:86740a56073b | 200 | #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
| AnnaBridge | 143:86740a56073b | 201 | /** |
| AnnaBridge | 143:86740a56073b | 202 | * @} |
| AnnaBridge | 143:86740a56073b | 203 | */ |
| AnnaBridge | 143:86740a56073b | 204 | |
| AnnaBridge | 143:86740a56073b | 205 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
| AnnaBridge | 143:86740a56073b | 206 | * @{ |
| AnnaBridge | 143:86740a56073b | 207 | */ |
| AnnaBridge | 143:86740a56073b | 208 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
| AnnaBridge | 143:86740a56073b | 209 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 143:86740a56073b | 210 | /** |
| AnnaBridge | 143:86740a56073b | 211 | * @} |
| AnnaBridge | 143:86740a56073b | 212 | */ |
| AnnaBridge | 143:86740a56073b | 213 | |
| AnnaBridge | 143:86740a56073b | 214 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
| AnnaBridge | 143:86740a56073b | 215 | * @{ |
| AnnaBridge | 143:86740a56073b | 216 | */ |
| AnnaBridge | 143:86740a56073b | 217 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000U) |
| AnnaBridge | 143:86740a56073b | 218 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000U) |
| AnnaBridge | 143:86740a56073b | 219 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000U) |
| AnnaBridge | 143:86740a56073b | 220 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100U) |
| AnnaBridge | 143:86740a56073b | 221 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000U) |
| AnnaBridge | 143:86740a56073b | 222 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050U) |
| AnnaBridge | 143:86740a56073b | 223 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000U) |
| AnnaBridge | 143:86740a56073b | 224 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025U) |
| AnnaBridge | 143:86740a56073b | 225 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000U) |
| AnnaBridge | 143:86740a56073b | 226 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U) |
| AnnaBridge | 143:86740a56073b | 227 | /** |
| AnnaBridge | 143:86740a56073b | 228 | * @} |
| AnnaBridge | 143:86740a56073b | 229 | */ |
| AnnaBridge | 143:86740a56073b | 230 | |
| AnnaBridge | 143:86740a56073b | 231 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
| AnnaBridge | 143:86740a56073b | 232 | * @{ |
| AnnaBridge | 143:86740a56073b | 233 | */ |
| AnnaBridge | 143:86740a56073b | 234 | #define I2S_CPOL_LOW ((uint32_t)0x00000000U) |
| AnnaBridge | 143:86740a56073b | 235 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
| AnnaBridge | 143:86740a56073b | 236 | /** |
| AnnaBridge | 143:86740a56073b | 237 | * @} |
| AnnaBridge | 143:86740a56073b | 238 | */ |
| AnnaBridge | 143:86740a56073b | 239 | |
| AnnaBridge | 143:86740a56073b | 240 | /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition |
| AnnaBridge | 143:86740a56073b | 241 | * @{ |
| AnnaBridge | 143:86740a56073b | 242 | */ |
| AnnaBridge | 143:86740a56073b | 243 | #define I2S_IT_TXE SPI_CR2_TXEIE |
| AnnaBridge | 143:86740a56073b | 244 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
| AnnaBridge | 143:86740a56073b | 245 | #define I2S_IT_ERR SPI_CR2_ERRIE |
| AnnaBridge | 143:86740a56073b | 246 | /** |
| AnnaBridge | 143:86740a56073b | 247 | * @} |
| AnnaBridge | 143:86740a56073b | 248 | */ |
| AnnaBridge | 143:86740a56073b | 249 | |
| AnnaBridge | 143:86740a56073b | 250 | /** @defgroup I2S_Flag_definition I2S Flag definition |
| AnnaBridge | 143:86740a56073b | 251 | * @{ |
| AnnaBridge | 143:86740a56073b | 252 | */ |
| AnnaBridge | 143:86740a56073b | 253 | #define I2S_FLAG_TXE SPI_SR_TXE |
| AnnaBridge | 143:86740a56073b | 254 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
| AnnaBridge | 143:86740a56073b | 255 | |
| AnnaBridge | 143:86740a56073b | 256 | #define I2S_FLAG_UDR SPI_SR_UDR |
| AnnaBridge | 143:86740a56073b | 257 | #define I2S_FLAG_OVR SPI_SR_OVR |
| AnnaBridge | 143:86740a56073b | 258 | #define I2S_FLAG_FRE SPI_SR_FRE |
| AnnaBridge | 143:86740a56073b | 259 | |
| AnnaBridge | 143:86740a56073b | 260 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
| AnnaBridge | 143:86740a56073b | 261 | #define I2S_FLAG_BSY SPI_SR_BSY |
| AnnaBridge | 143:86740a56073b | 262 | /** |
| AnnaBridge | 143:86740a56073b | 263 | * @} |
| AnnaBridge | 143:86740a56073b | 264 | */ |
| AnnaBridge | 143:86740a56073b | 265 | |
| AnnaBridge | 143:86740a56073b | 266 | /** |
| AnnaBridge | 143:86740a56073b | 267 | * @} |
| AnnaBridge | 143:86740a56073b | 268 | */ |
| AnnaBridge | 143:86740a56073b | 269 | |
| AnnaBridge | 143:86740a56073b | 270 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 271 | /** @defgroup I2S_Exported_Macros I2S Exported Macros |
| AnnaBridge | 143:86740a56073b | 272 | * @{ |
| AnnaBridge | 143:86740a56073b | 273 | */ |
| AnnaBridge | 143:86740a56073b | 274 | |
| AnnaBridge | 143:86740a56073b | 275 | /** @brief Reset I2S handle state |
| AnnaBridge | 143:86740a56073b | 276 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 277 | * @retval None |
| AnnaBridge | 143:86740a56073b | 278 | */ |
| AnnaBridge | 143:86740a56073b | 279 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
| AnnaBridge | 143:86740a56073b | 280 | |
| AnnaBridge | 143:86740a56073b | 281 | /** @brief Enable the specified SPI peripheral (in I2S mode). |
| AnnaBridge | 143:86740a56073b | 282 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 283 | * @retval None |
| AnnaBridge | 143:86740a56073b | 284 | */ |
| AnnaBridge | 143:86740a56073b | 285 | #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
| AnnaBridge | 143:86740a56073b | 286 | |
| AnnaBridge | 143:86740a56073b | 287 | /** @brief Disable the specified SPI peripheral (in I2S mode). |
| AnnaBridge | 143:86740a56073b | 288 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 289 | * @retval None |
| AnnaBridge | 143:86740a56073b | 290 | */ |
| AnnaBridge | 143:86740a56073b | 291 | #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
| AnnaBridge | 143:86740a56073b | 292 | |
| AnnaBridge | 143:86740a56073b | 293 | /** @brief Enable the specified I2S interrupts. |
| AnnaBridge | 143:86740a56073b | 294 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 295 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| AnnaBridge | 143:86740a56073b | 296 | * This parameter can be one of the following values: |
| AnnaBridge | 143:86740a56073b | 297 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 298 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 299 | * @arg I2S_IT_ERR: Error interrupt enable |
| AnnaBridge | 143:86740a56073b | 300 | * @retval None |
| AnnaBridge | 143:86740a56073b | 301 | */ |
| AnnaBridge | 143:86740a56073b | 302 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
| AnnaBridge | 143:86740a56073b | 303 | |
| AnnaBridge | 143:86740a56073b | 304 | /** @brief Disable the specified I2S interrupts. |
| AnnaBridge | 143:86740a56073b | 305 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 306 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| AnnaBridge | 143:86740a56073b | 307 | * This parameter can be one of the following values: |
| AnnaBridge | 143:86740a56073b | 308 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 309 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 310 | * @arg I2S_IT_ERR: Error interrupt enable |
| AnnaBridge | 143:86740a56073b | 311 | * @retval None |
| AnnaBridge | 143:86740a56073b | 312 | */ |
| AnnaBridge | 143:86740a56073b | 313 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
| AnnaBridge | 143:86740a56073b | 314 | |
| AnnaBridge | 143:86740a56073b | 315 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
| AnnaBridge | 143:86740a56073b | 316 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 317 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
| AnnaBridge | 143:86740a56073b | 318 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
| AnnaBridge | 143:86740a56073b | 319 | * This parameter can be one of the following values: |
| AnnaBridge | 143:86740a56073b | 320 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 321 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| AnnaBridge | 143:86740a56073b | 322 | * @arg I2S_IT_ERR: Error interrupt enable |
| AnnaBridge | 143:86740a56073b | 323 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 143:86740a56073b | 324 | */ |
| AnnaBridge | 143:86740a56073b | 325 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 143:86740a56073b | 326 | |
| AnnaBridge | 143:86740a56073b | 327 | /** @brief Checks whether the specified I2S flag is set or not. |
| AnnaBridge | 143:86740a56073b | 328 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 329 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 143:86740a56073b | 330 | * This parameter can be one of the following values: |
| AnnaBridge | 143:86740a56073b | 331 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
| AnnaBridge | 143:86740a56073b | 332 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
| AnnaBridge | 143:86740a56073b | 333 | * @arg I2S_FLAG_UDR: Underrun flag |
| AnnaBridge | 143:86740a56073b | 334 | * @arg I2S_FLAG_OVR: Overrun flag |
| AnnaBridge | 143:86740a56073b | 335 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
| AnnaBridge | 143:86740a56073b | 336 | * @arg I2S_FLAG_BSY: Busy flag |
| AnnaBridge | 143:86740a56073b | 337 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 143:86740a56073b | 338 | */ |
| AnnaBridge | 143:86740a56073b | 339 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 143:86740a56073b | 340 | |
| AnnaBridge | 143:86740a56073b | 341 | /** @brief Clears the I2S OVR pending flag. |
| AnnaBridge | 143:86740a56073b | 342 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 343 | * @retval None |
| AnnaBridge | 143:86740a56073b | 344 | */ |
| AnnaBridge | 143:86740a56073b | 345 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ |
| AnnaBridge | 143:86740a56073b | 346 | tmpreg = (__HANDLE__)->Instance->SR;\ |
| AnnaBridge | 143:86740a56073b | 347 | UNUSED(tmpreg);\ |
| AnnaBridge | 143:86740a56073b | 348 | }while(0) |
| AnnaBridge | 143:86740a56073b | 349 | /** @brief Clears the I2S UDR pending flag. |
| AnnaBridge | 143:86740a56073b | 350 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 143:86740a56073b | 351 | * @retval None |
| AnnaBridge | 143:86740a56073b | 352 | */ |
| AnnaBridge | 143:86740a56073b | 353 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) |
| AnnaBridge | 143:86740a56073b | 354 | /** |
| AnnaBridge | 143:86740a56073b | 355 | * @} |
| AnnaBridge | 143:86740a56073b | 356 | */ |
| AnnaBridge | 143:86740a56073b | 357 | |
| AnnaBridge | 143:86740a56073b | 358 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 359 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
| AnnaBridge | 143:86740a56073b | 360 | * @{ |
| AnnaBridge | 143:86740a56073b | 361 | */ |
| AnnaBridge | 143:86740a56073b | 362 | |
| AnnaBridge | 143:86740a56073b | 363 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 143:86740a56073b | 364 | * @{ |
| AnnaBridge | 143:86740a56073b | 365 | */ |
| AnnaBridge | 143:86740a56073b | 366 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 143:86740a56073b | 367 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 368 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 369 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 370 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 371 | /** |
| AnnaBridge | 143:86740a56073b | 372 | * @} |
| AnnaBridge | 143:86740a56073b | 373 | */ |
| AnnaBridge | 143:86740a56073b | 374 | |
| AnnaBridge | 143:86740a56073b | 375 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 143:86740a56073b | 376 | * @{ |
| AnnaBridge | 143:86740a56073b | 377 | */ |
| AnnaBridge | 143:86740a56073b | 378 | /* I/O operation functions ***************************************************/ |
| AnnaBridge | 143:86740a56073b | 379 | /* Blocking mode: Polling */ |
| AnnaBridge | 143:86740a56073b | 380 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 143:86740a56073b | 381 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 143:86740a56073b | 382 | |
| AnnaBridge | 143:86740a56073b | 383 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 143:86740a56073b | 384 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 143:86740a56073b | 385 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 143:86740a56073b | 386 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 387 | |
| AnnaBridge | 143:86740a56073b | 388 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 143:86740a56073b | 389 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 143:86740a56073b | 390 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 143:86740a56073b | 391 | |
| AnnaBridge | 143:86740a56073b | 392 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 393 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 394 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 395 | |
| AnnaBridge | 143:86740a56073b | 396 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| AnnaBridge | 143:86740a56073b | 397 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 398 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 399 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 400 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 401 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 402 | /** |
| AnnaBridge | 143:86740a56073b | 403 | * @} |
| AnnaBridge | 143:86740a56073b | 404 | */ |
| AnnaBridge | 143:86740a56073b | 405 | |
| AnnaBridge | 143:86740a56073b | 406 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral Control and State functions |
| AnnaBridge | 143:86740a56073b | 407 | * @{ |
| AnnaBridge | 143:86740a56073b | 408 | */ |
| AnnaBridge | 143:86740a56073b | 409 | /* Peripheral Control and State functions ************************************/ |
| AnnaBridge | 143:86740a56073b | 410 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 411 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 143:86740a56073b | 412 | /** |
| AnnaBridge | 143:86740a56073b | 413 | * @} |
| AnnaBridge | 143:86740a56073b | 414 | */ |
| AnnaBridge | 143:86740a56073b | 415 | |
| AnnaBridge | 143:86740a56073b | 416 | /** |
| AnnaBridge | 143:86740a56073b | 417 | * @} |
| AnnaBridge | 143:86740a56073b | 418 | */ |
| AnnaBridge | 143:86740a56073b | 419 | |
| AnnaBridge | 143:86740a56073b | 420 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 421 | /** @defgroup I2S_Private I2S Private |
| AnnaBridge | 143:86740a56073b | 422 | * @{ |
| AnnaBridge | 143:86740a56073b | 423 | */ |
| AnnaBridge | 143:86740a56073b | 424 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| AnnaBridge | 143:86740a56073b | 425 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
| AnnaBridge | 143:86740a56073b | 426 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
| AnnaBridge | 143:86740a56073b | 427 | ((MODE) == I2S_MODE_MASTER_RX)) |
| AnnaBridge | 143:86740a56073b | 428 | |
| AnnaBridge | 143:86740a56073b | 429 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
| AnnaBridge | 143:86740a56073b | 430 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
| AnnaBridge | 143:86740a56073b | 431 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
| AnnaBridge | 143:86740a56073b | 432 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
| AnnaBridge | 143:86740a56073b | 433 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
| AnnaBridge | 143:86740a56073b | 434 | |
| AnnaBridge | 143:86740a56073b | 435 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
| AnnaBridge | 143:86740a56073b | 436 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
| AnnaBridge | 143:86740a56073b | 437 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
| AnnaBridge | 143:86740a56073b | 438 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
| AnnaBridge | 143:86740a56073b | 439 | |
| AnnaBridge | 143:86740a56073b | 440 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
| AnnaBridge | 143:86740a56073b | 441 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
| AnnaBridge | 143:86740a56073b | 442 | |
| AnnaBridge | 143:86740a56073b | 443 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
| AnnaBridge | 143:86740a56073b | 444 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
| AnnaBridge | 143:86740a56073b | 445 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
| AnnaBridge | 143:86740a56073b | 446 | |
| AnnaBridge | 143:86740a56073b | 447 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
| AnnaBridge | 143:86740a56073b | 448 | ((CPOL) == I2S_CPOL_HIGH)) |
| AnnaBridge | 143:86740a56073b | 449 | /** |
| AnnaBridge | 143:86740a56073b | 450 | * @} |
| AnnaBridge | 143:86740a56073b | 451 | */ |
| AnnaBridge | 143:86740a56073b | 452 | |
| AnnaBridge | 143:86740a56073b | 453 | /* Define the private group ***********************************/ |
| AnnaBridge | 143:86740a56073b | 454 | /**************************************************************/ |
| AnnaBridge | 143:86740a56073b | 455 | /** @defgroup I2S_Private I2S Private |
| AnnaBridge | 143:86740a56073b | 456 | * @{ |
| AnnaBridge | 143:86740a56073b | 457 | */ |
| AnnaBridge | 143:86740a56073b | 458 | /** |
| AnnaBridge | 143:86740a56073b | 459 | * @} |
| AnnaBridge | 143:86740a56073b | 460 | */ |
| AnnaBridge | 143:86740a56073b | 461 | /**************************************************************/ |
| AnnaBridge | 143:86740a56073b | 462 | |
| AnnaBridge | 143:86740a56073b | 463 | /** |
| AnnaBridge | 143:86740a56073b | 464 | * @} |
| AnnaBridge | 143:86740a56073b | 465 | */ |
| AnnaBridge | 143:86740a56073b | 466 | |
| AnnaBridge | 143:86740a56073b | 467 | /** |
| AnnaBridge | 143:86740a56073b | 468 | * @} |
| AnnaBridge | 143:86740a56073b | 469 | */ |
| AnnaBridge | 143:86740a56073b | 470 | |
| AnnaBridge | 143:86740a56073b | 471 | #endif /* !STM32L031xx && !STM32L041xx && !STM32L011xx && !STM32L021xx */ |
| AnnaBridge | 143:86740a56073b | 472 | |
| AnnaBridge | 143:86740a56073b | 473 | #ifdef __cplusplus |
| AnnaBridge | 143:86740a56073b | 474 | } |
| AnnaBridge | 143:86740a56073b | 475 | #endif |
| AnnaBridge | 143:86740a56073b | 476 | |
| AnnaBridge | 143:86740a56073b | 477 | #endif /* __STM32L0xx_HAL_I2S_H */ |
| AnnaBridge | 143:86740a56073b | 478 | |
| AnnaBridge | 143:86740a56073b | 479 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
