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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_hal_dac.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_L072CZ_LRWAN1/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_dac.h@167:84c0a372a020
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 143:86740a56073b | 1 | /** |
| AnnaBridge | 143:86740a56073b | 2 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 3 | * @file stm32l0xx_hal_dac.h |
| AnnaBridge | 143:86740a56073b | 4 | * @author MCD Application Team |
| AnnaBridge | 143:86740a56073b | 5 | * @brief Header file of DAC HAL module. |
| AnnaBridge | 143:86740a56073b | 6 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 7 | * @attention |
| AnnaBridge | 143:86740a56073b | 8 | * |
| AnnaBridge | 143:86740a56073b | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 143:86740a56073b | 10 | * |
| AnnaBridge | 143:86740a56073b | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 143:86740a56073b | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 143:86740a56073b | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 143:86740a56073b | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 143:86740a56073b | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 143:86740a56073b | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 143:86740a56073b | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 143:86740a56073b | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 143:86740a56073b | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 143:86740a56073b | 20 | * without specific prior written permission. |
| AnnaBridge | 143:86740a56073b | 21 | * |
| AnnaBridge | 143:86740a56073b | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 143:86740a56073b | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 143:86740a56073b | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 143:86740a56073b | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 143:86740a56073b | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 143:86740a56073b | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 143:86740a56073b | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 143:86740a56073b | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 143:86740a56073b | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 143:86740a56073b | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 143:86740a56073b | 32 | * |
| AnnaBridge | 143:86740a56073b | 33 | ****************************************************************************** |
| AnnaBridge | 143:86740a56073b | 34 | */ |
| AnnaBridge | 143:86740a56073b | 35 | |
| AnnaBridge | 143:86740a56073b | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 37 | #ifndef __STM32L0xx_HAL_DAC_H |
| AnnaBridge | 143:86740a56073b | 38 | #define __STM32L0xx_HAL_DAC_H |
| AnnaBridge | 143:86740a56073b | 39 | |
| AnnaBridge | 143:86740a56073b | 40 | #ifdef __cplusplus |
| AnnaBridge | 143:86740a56073b | 41 | extern "C" { |
| AnnaBridge | 143:86740a56073b | 42 | #endif |
| AnnaBridge | 143:86740a56073b | 43 | |
| AnnaBridge | 143:86740a56073b | 44 | #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
| AnnaBridge | 143:86740a56073b | 45 | |
| AnnaBridge | 143:86740a56073b | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 47 | #include "stm32l0xx_hal_def.h" |
| AnnaBridge | 143:86740a56073b | 48 | |
| AnnaBridge | 143:86740a56073b | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
| AnnaBridge | 143:86740a56073b | 50 | * @{ |
| AnnaBridge | 143:86740a56073b | 51 | */ |
| AnnaBridge | 143:86740a56073b | 52 | |
| AnnaBridge | 143:86740a56073b | 53 | /** @defgroup DAC DAC |
| AnnaBridge | 143:86740a56073b | 54 | * @{ |
| AnnaBridge | 143:86740a56073b | 55 | */ |
| AnnaBridge | 143:86740a56073b | 56 | |
| AnnaBridge | 143:86740a56073b | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 58 | |
| AnnaBridge | 143:86740a56073b | 59 | /** @defgroup DAC_Exported_Types DAC Exported Types |
| AnnaBridge | 143:86740a56073b | 60 | * @{ |
| AnnaBridge | 143:86740a56073b | 61 | */ |
| AnnaBridge | 143:86740a56073b | 62 | |
| AnnaBridge | 143:86740a56073b | 63 | /** |
| AnnaBridge | 143:86740a56073b | 64 | * @brief HAL State structures definition |
| AnnaBridge | 143:86740a56073b | 65 | */ |
| AnnaBridge | 143:86740a56073b | 66 | typedef enum |
| AnnaBridge | 143:86740a56073b | 67 | { |
| AnnaBridge | 143:86740a56073b | 68 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
| AnnaBridge | 143:86740a56073b | 69 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
| AnnaBridge | 143:86740a56073b | 70 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
| AnnaBridge | 143:86740a56073b | 71 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
| AnnaBridge | 143:86740a56073b | 72 | HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
| AnnaBridge | 143:86740a56073b | 73 | |
| AnnaBridge | 143:86740a56073b | 74 | }HAL_DAC_StateTypeDef; |
| AnnaBridge | 143:86740a56073b | 75 | |
| AnnaBridge | 143:86740a56073b | 76 | /** |
| AnnaBridge | 143:86740a56073b | 77 | * @brief DAC handle Structure definition |
| AnnaBridge | 143:86740a56073b | 78 | */ |
| AnnaBridge | 143:86740a56073b | 79 | typedef struct |
| AnnaBridge | 143:86740a56073b | 80 | { |
| AnnaBridge | 143:86740a56073b | 81 | DAC_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 143:86740a56073b | 82 | |
| AnnaBridge | 143:86740a56073b | 83 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
| AnnaBridge | 143:86740a56073b | 84 | |
| AnnaBridge | 143:86740a56073b | 85 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
| AnnaBridge | 143:86740a56073b | 86 | |
| AnnaBridge | 143:86740a56073b | 87 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
| AnnaBridge | 143:86740a56073b | 88 | |
| AnnaBridge | 143:86740a56073b | 89 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 90 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
| AnnaBridge | 143:86740a56073b | 91 | #endif |
| AnnaBridge | 143:86740a56073b | 92 | |
| AnnaBridge | 143:86740a56073b | 93 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
| AnnaBridge | 143:86740a56073b | 94 | |
| AnnaBridge | 143:86740a56073b | 95 | }DAC_HandleTypeDef; |
| AnnaBridge | 143:86740a56073b | 96 | |
| AnnaBridge | 143:86740a56073b | 97 | /** |
| AnnaBridge | 143:86740a56073b | 98 | * @brief DAC Configuration regular Channel structure definition |
| AnnaBridge | 143:86740a56073b | 99 | */ |
| AnnaBridge | 143:86740a56073b | 100 | typedef struct |
| AnnaBridge | 143:86740a56073b | 101 | { |
| AnnaBridge | 143:86740a56073b | 102 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
| AnnaBridge | 143:86740a56073b | 103 | This parameter can be a value of @ref DAC_trigger_selection */ |
| AnnaBridge | 143:86740a56073b | 104 | |
| AnnaBridge | 143:86740a56073b | 105 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
| AnnaBridge | 143:86740a56073b | 106 | This parameter can be a value of @ref DAC_output_buffer */ |
| AnnaBridge | 143:86740a56073b | 107 | |
| AnnaBridge | 143:86740a56073b | 108 | }DAC_ChannelConfTypeDef; |
| AnnaBridge | 143:86740a56073b | 109 | |
| AnnaBridge | 143:86740a56073b | 110 | /** |
| AnnaBridge | 143:86740a56073b | 111 | * @} |
| AnnaBridge | 143:86740a56073b | 112 | */ |
| AnnaBridge | 143:86740a56073b | 113 | |
| AnnaBridge | 143:86740a56073b | 114 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 115 | |
| AnnaBridge | 143:86740a56073b | 116 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
| AnnaBridge | 143:86740a56073b | 117 | * @{ |
| AnnaBridge | 143:86740a56073b | 118 | */ |
| AnnaBridge | 143:86740a56073b | 119 | |
| AnnaBridge | 143:86740a56073b | 120 | /** @defgroup DAC_Error_Code DAC Error Code |
| AnnaBridge | 143:86740a56073b | 121 | * @{ |
| AnnaBridge | 143:86740a56073b | 122 | */ |
| AnnaBridge | 143:86740a56073b | 123 | #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
| AnnaBridge | 143:86740a56073b | 124 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */ |
| AnnaBridge | 143:86740a56073b | 125 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 126 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */ |
| AnnaBridge | 143:86740a56073b | 127 | #endif |
| AnnaBridge | 143:86740a56073b | 128 | #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
| AnnaBridge | 143:86740a56073b | 129 | /** |
| AnnaBridge | 143:86740a56073b | 130 | * @} |
| AnnaBridge | 143:86740a56073b | 131 | */ |
| AnnaBridge | 143:86740a56073b | 132 | |
| AnnaBridge | 143:86740a56073b | 133 | /** @defgroup DAC_trigger_selection DAC trigger selection |
| AnnaBridge | 143:86740a56073b | 134 | * @{ |
| AnnaBridge | 143:86740a56073b | 135 | */ |
| AnnaBridge | 143:86740a56073b | 136 | #define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */ |
| AnnaBridge | 143:86740a56073b | 137 | #define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 138 | #define DAC_TRIGGER_T21_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 139 | #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 140 | #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 141 | #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 142 | |
| AnnaBridge | 143:86740a56073b | 143 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 144 | #define DAC_TRIGGER_T3_TRGO ((uint32_t)( DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 145 | #define DAC_TRIGGER_T3_CH3 ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM3 CH3 selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 146 | #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 143:86740a56073b | 147 | #endif |
| AnnaBridge | 143:86740a56073b | 148 | |
| AnnaBridge | 143:86740a56073b | 149 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 150 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
| AnnaBridge | 143:86740a56073b | 151 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 152 | ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 153 | ((TRIGGER) == DAC_TRIGGER_T3_CH3) || \ |
| AnnaBridge | 143:86740a56073b | 154 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 155 | ((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 156 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 157 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
| AnnaBridge | 143:86740a56073b | 158 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
| AnnaBridge | 143:86740a56073b | 159 | #else /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
| AnnaBridge | 143:86740a56073b | 160 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
| AnnaBridge | 143:86740a56073b | 161 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 162 | ((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 163 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
| AnnaBridge | 143:86740a56073b | 164 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
| AnnaBridge | 143:86740a56073b | 165 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
| AnnaBridge | 143:86740a56073b | 166 | #endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
| AnnaBridge | 143:86740a56073b | 167 | /** |
| AnnaBridge | 143:86740a56073b | 168 | * @} |
| AnnaBridge | 143:86740a56073b | 169 | */ |
| AnnaBridge | 143:86740a56073b | 170 | |
| AnnaBridge | 143:86740a56073b | 171 | /** @defgroup DAC_output_buffer DAC output buffer |
| AnnaBridge | 143:86740a56073b | 172 | * @{ |
| AnnaBridge | 143:86740a56073b | 173 | */ |
| AnnaBridge | 143:86740a56073b | 174 | #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 143:86740a56073b | 175 | #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
| AnnaBridge | 143:86740a56073b | 176 | |
| AnnaBridge | 143:86740a56073b | 177 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
| AnnaBridge | 143:86740a56073b | 178 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
| AnnaBridge | 143:86740a56073b | 179 | /** |
| AnnaBridge | 143:86740a56073b | 180 | * @} |
| AnnaBridge | 143:86740a56073b | 181 | */ |
| AnnaBridge | 143:86740a56073b | 182 | |
| AnnaBridge | 143:86740a56073b | 183 | /** @defgroup DAC_Channel_selection DAC Channel selection |
| AnnaBridge | 143:86740a56073b | 184 | * @{ |
| AnnaBridge | 143:86740a56073b | 185 | */ |
| AnnaBridge | 143:86740a56073b | 186 | #define DAC_CHANNEL_1 ((uint32_t)0x00000000U) |
| AnnaBridge | 143:86740a56073b | 187 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 188 | #define DAC_CHANNEL_2 ((uint32_t)0x00000010U) |
| AnnaBridge | 143:86740a56073b | 189 | #endif |
| AnnaBridge | 143:86740a56073b | 190 | |
| AnnaBridge | 143:86740a56073b | 191 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 192 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
| AnnaBridge | 143:86740a56073b | 193 | ((CHANNEL) == DAC_CHANNEL_2)) |
| AnnaBridge | 143:86740a56073b | 194 | #else |
| AnnaBridge | 143:86740a56073b | 195 | #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) |
| AnnaBridge | 143:86740a56073b | 196 | #endif |
| AnnaBridge | 143:86740a56073b | 197 | /** |
| AnnaBridge | 143:86740a56073b | 198 | * @} |
| AnnaBridge | 143:86740a56073b | 199 | */ |
| AnnaBridge | 143:86740a56073b | 200 | |
| AnnaBridge | 143:86740a56073b | 201 | /** @defgroup DAC_data_alignement DAC data alignement |
| AnnaBridge | 143:86740a56073b | 202 | * @{ |
| AnnaBridge | 143:86740a56073b | 203 | */ |
| AnnaBridge | 143:86740a56073b | 204 | #define DAC_ALIGN_12B_R ((uint32_t)0x00000000U) |
| AnnaBridge | 143:86740a56073b | 205 | #define DAC_ALIGN_12B_L ((uint32_t)0x00000004U) |
| AnnaBridge | 143:86740a56073b | 206 | #define DAC_ALIGN_8B_R ((uint32_t)0x00000008U) |
| AnnaBridge | 143:86740a56073b | 207 | |
| AnnaBridge | 143:86740a56073b | 208 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
| AnnaBridge | 143:86740a56073b | 209 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
| AnnaBridge | 143:86740a56073b | 210 | ((ALIGN) == DAC_ALIGN_8B_R)) |
| AnnaBridge | 143:86740a56073b | 211 | /** |
| AnnaBridge | 143:86740a56073b | 212 | * @} |
| AnnaBridge | 143:86740a56073b | 213 | */ |
| AnnaBridge | 143:86740a56073b | 214 | |
| AnnaBridge | 143:86740a56073b | 215 | /** @defgroup DAC_data DAC data |
| AnnaBridge | 143:86740a56073b | 216 | * @{ |
| AnnaBridge | 143:86740a56073b | 217 | */ |
| AnnaBridge | 143:86740a56073b | 218 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
| AnnaBridge | 143:86740a56073b | 219 | /** |
| AnnaBridge | 143:86740a56073b | 220 | * @} |
| AnnaBridge | 143:86740a56073b | 221 | */ |
| AnnaBridge | 143:86740a56073b | 222 | |
| AnnaBridge | 143:86740a56073b | 223 | /** @defgroup DAC_flags_definition DAC flags definition |
| AnnaBridge | 143:86740a56073b | 224 | * @{ |
| AnnaBridge | 143:86740a56073b | 225 | */ |
| AnnaBridge | 143:86740a56073b | 226 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
| AnnaBridge | 143:86740a56073b | 227 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 228 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
| AnnaBridge | 143:86740a56073b | 229 | #endif |
| AnnaBridge | 143:86740a56073b | 230 | |
| AnnaBridge | 143:86740a56073b | 231 | /** |
| AnnaBridge | 143:86740a56073b | 232 | * @} |
| AnnaBridge | 143:86740a56073b | 233 | */ |
| AnnaBridge | 143:86740a56073b | 234 | |
| AnnaBridge | 143:86740a56073b | 235 | /** @defgroup DAC_IT_definition DAC IT definition |
| AnnaBridge | 143:86740a56073b | 236 | * @{ |
| AnnaBridge | 143:86740a56073b | 237 | */ |
| AnnaBridge | 143:86740a56073b | 238 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
| AnnaBridge | 143:86740a56073b | 239 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 143:86740a56073b | 240 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
| AnnaBridge | 143:86740a56073b | 241 | #endif |
| AnnaBridge | 143:86740a56073b | 242 | |
| AnnaBridge | 143:86740a56073b | 243 | /** |
| AnnaBridge | 143:86740a56073b | 244 | * @} |
| AnnaBridge | 143:86740a56073b | 245 | */ |
| AnnaBridge | 143:86740a56073b | 246 | |
| AnnaBridge | 143:86740a56073b | 247 | /** |
| AnnaBridge | 143:86740a56073b | 248 | * @} |
| AnnaBridge | 143:86740a56073b | 249 | */ |
| AnnaBridge | 143:86740a56073b | 250 | |
| AnnaBridge | 143:86740a56073b | 251 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 252 | |
| AnnaBridge | 143:86740a56073b | 253 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
| AnnaBridge | 143:86740a56073b | 254 | * @{ |
| AnnaBridge | 143:86740a56073b | 255 | */ |
| AnnaBridge | 143:86740a56073b | 256 | |
| AnnaBridge | 143:86740a56073b | 257 | /** @brief Reset DAC handle state |
| AnnaBridge | 143:86740a56073b | 258 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 143:86740a56073b | 259 | * @retval None |
| AnnaBridge | 143:86740a56073b | 260 | */ |
| AnnaBridge | 143:86740a56073b | 261 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
| AnnaBridge | 143:86740a56073b | 262 | |
| AnnaBridge | 143:86740a56073b | 263 | /** @brief Enable the DAC channel |
| AnnaBridge | 143:86740a56073b | 264 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 143:86740a56073b | 265 | * @param __DAC_CHANNEL__: specifies the DAC channel |
| AnnaBridge | 143:86740a56073b | 266 | * @retval None |
| AnnaBridge | 143:86740a56073b | 267 | */ |
| AnnaBridge | 143:86740a56073b | 268 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \ |
| AnnaBridge | 143:86740a56073b | 269 | SET_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
| AnnaBridge | 143:86740a56073b | 270 | |
| AnnaBridge | 143:86740a56073b | 271 | /** @brief Disable the DAC channel |
| AnnaBridge | 143:86740a56073b | 272 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 143:86740a56073b | 273 | * @param __DAC_CHANNEL__: specifies the DAC channel. |
| AnnaBridge | 143:86740a56073b | 274 | * @retval None |
| AnnaBridge | 143:86740a56073b | 275 | */ |
| AnnaBridge | 143:86740a56073b | 276 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \ |
| AnnaBridge | 143:86740a56073b | 277 | CLEAR_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
| AnnaBridge | 143:86740a56073b | 278 | |
| AnnaBridge | 143:86740a56073b | 279 | |
| AnnaBridge | 143:86740a56073b | 280 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 167:84c0a372a020 | 281 | SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| AnnaBridge | 143:86740a56073b | 282 | |
| AnnaBridge | 143:86740a56073b | 283 | |
| AnnaBridge | 143:86740a56073b | 284 | /** @brief Disable the DAC interrupt |
| AnnaBridge | 143:86740a56073b | 285 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 143:86740a56073b | 286 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 143:86740a56073b | 287 | * @retval None |
| AnnaBridge | 143:86740a56073b | 288 | */ |
| AnnaBridge | 143:86740a56073b | 289 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 167:84c0a372a020 | 290 | CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| AnnaBridge | 143:86740a56073b | 291 | |
| AnnaBridge | 143:86740a56073b | 292 | /** @brief Check whether the specified DAC interrupt source is enabled or not. |
| AnnaBridge | 143:86740a56073b | 293 | * @param __HANDLE__: DAC handle |
| AnnaBridge | 143:86740a56073b | 294 | * @param __INTERRUPT__: DAC interrupt source to check |
| AnnaBridge | 143:86740a56073b | 295 | * This parameter can be any combination of the following values: |
| AnnaBridge | 143:86740a56073b | 296 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 143:86740a56073b | 297 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (STM32L072xx STM32L073xx STM32L082xx STM32L083xx only) |
| AnnaBridge | 143:86740a56073b | 298 | * @retval State of interruption (SET or RESET) |
| AnnaBridge | 143:86740a56073b | 299 | */ |
| AnnaBridge | 143:86740a56073b | 300 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 143:86740a56073b | 301 | (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
| AnnaBridge | 143:86740a56073b | 302 | |
| AnnaBridge | 143:86740a56073b | 303 | /** @brief Get the selected DAC's flag status. |
| AnnaBridge | 143:86740a56073b | 304 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 143:86740a56073b | 305 | * @param __FLAG__: specifies the FLAG. |
| AnnaBridge | 143:86740a56073b | 306 | * @retval None |
| AnnaBridge | 143:86740a56073b | 307 | */ |
| AnnaBridge | 143:86740a56073b | 308 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) \ |
| AnnaBridge | 143:86740a56073b | 309 | ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 143:86740a56073b | 310 | |
| AnnaBridge | 143:86740a56073b | 311 | /** @brief Clear the DAC's flag. |
| AnnaBridge | 143:86740a56073b | 312 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 143:86740a56073b | 313 | * @param __FLAG__: specifies the FLAG. |
| AnnaBridge | 143:86740a56073b | 314 | * @retval None |
| AnnaBridge | 143:86740a56073b | 315 | */ |
| AnnaBridge | 143:86740a56073b | 316 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| AnnaBridge | 143:86740a56073b | 317 | (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
| AnnaBridge | 143:86740a56073b | 318 | |
| AnnaBridge | 143:86740a56073b | 319 | /** |
| AnnaBridge | 143:86740a56073b | 320 | * @} |
| AnnaBridge | 143:86740a56073b | 321 | */ |
| AnnaBridge | 143:86740a56073b | 322 | |
| AnnaBridge | 143:86740a56073b | 323 | /* Private macro ------------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 324 | |
| AnnaBridge | 143:86740a56073b | 325 | /** @defgroup DAC_Private_Macros DAC Private Macros |
| AnnaBridge | 143:86740a56073b | 326 | * @{ |
| AnnaBridge | 143:86740a56073b | 327 | */ |
| AnnaBridge | 143:86740a56073b | 328 | |
| AnnaBridge | 143:86740a56073b | 329 | /** @brief Set DHR12R1 alignment |
| AnnaBridge | 143:86740a56073b | 330 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 143:86740a56073b | 331 | * @retval None |
| AnnaBridge | 143:86740a56073b | 332 | */ |
| AnnaBridge | 143:86740a56073b | 333 | #define DAC_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008U) + (__ALIGNEMENT__)) |
| AnnaBridge | 143:86740a56073b | 334 | |
| AnnaBridge | 143:86740a56073b | 335 | /** @brief Set DHR12R2 alignment |
| AnnaBridge | 143:86740a56073b | 336 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 143:86740a56073b | 337 | * @retval None |
| AnnaBridge | 143:86740a56073b | 338 | */ |
| AnnaBridge | 143:86740a56073b | 339 | #define DAC_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014U) + (__ALIGNEMENT__)) |
| AnnaBridge | 143:86740a56073b | 340 | |
| AnnaBridge | 143:86740a56073b | 341 | /** @brief Set DHR12RD alignment |
| AnnaBridge | 143:86740a56073b | 342 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 143:86740a56073b | 343 | * @retval None |
| AnnaBridge | 143:86740a56073b | 344 | */ |
| AnnaBridge | 143:86740a56073b | 345 | #define DAC_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020U) + (__ALIGNEMENT__)) |
| AnnaBridge | 143:86740a56073b | 346 | |
| AnnaBridge | 143:86740a56073b | 347 | /** @brief Enable the DAC interrupt |
| AnnaBridge | 143:86740a56073b | 348 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 143:86740a56073b | 349 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 143:86740a56073b | 350 | * @retval None |
| AnnaBridge | 143:86740a56073b | 351 | */ |
| AnnaBridge | 143:86740a56073b | 352 | |
| AnnaBridge | 143:86740a56073b | 353 | /** |
| AnnaBridge | 143:86740a56073b | 354 | * @} |
| AnnaBridge | 143:86740a56073b | 355 | */ |
| AnnaBridge | 143:86740a56073b | 356 | |
| AnnaBridge | 143:86740a56073b | 357 | |
| AnnaBridge | 143:86740a56073b | 358 | /* Include DAC HAL Extension module */ |
| AnnaBridge | 143:86740a56073b | 359 | #include "stm32l0xx_hal_dac_ex.h" |
| AnnaBridge | 143:86740a56073b | 360 | |
| AnnaBridge | 143:86740a56073b | 361 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 143:86740a56073b | 362 | |
| AnnaBridge | 143:86740a56073b | 363 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
| AnnaBridge | 143:86740a56073b | 364 | * @{ |
| AnnaBridge | 143:86740a56073b | 365 | */ |
| AnnaBridge | 143:86740a56073b | 366 | |
| AnnaBridge | 143:86740a56073b | 367 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 143:86740a56073b | 368 | * @{ |
| AnnaBridge | 143:86740a56073b | 369 | */ |
| AnnaBridge | 143:86740a56073b | 370 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 143:86740a56073b | 371 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 372 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 373 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 374 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 375 | |
| AnnaBridge | 143:86740a56073b | 376 | /** |
| AnnaBridge | 143:86740a56073b | 377 | * @} |
| AnnaBridge | 143:86740a56073b | 378 | */ |
| AnnaBridge | 143:86740a56073b | 379 | |
| AnnaBridge | 143:86740a56073b | 380 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 143:86740a56073b | 381 | * @{ |
| AnnaBridge | 143:86740a56073b | 382 | */ |
| AnnaBridge | 143:86740a56073b | 383 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 143:86740a56073b | 384 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 143:86740a56073b | 385 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 143:86740a56073b | 386 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
| AnnaBridge | 143:86740a56073b | 387 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 143:86740a56073b | 388 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
| AnnaBridge | 143:86740a56073b | 389 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 143:86740a56073b | 390 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 391 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 392 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 393 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 143:86740a56073b | 394 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 143:86740a56073b | 395 | |
| AnnaBridge | 143:86740a56073b | 396 | /** |
| AnnaBridge | 143:86740a56073b | 397 | * @} |
| AnnaBridge | 143:86740a56073b | 398 | */ |
| AnnaBridge | 143:86740a56073b | 399 | |
| AnnaBridge | 143:86740a56073b | 400 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
| AnnaBridge | 143:86740a56073b | 401 | * @{ |
| AnnaBridge | 143:86740a56073b | 402 | */ |
| AnnaBridge | 143:86740a56073b | 403 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 143:86740a56073b | 404 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
| AnnaBridge | 143:86740a56073b | 405 | |
| AnnaBridge | 143:86740a56073b | 406 | /** |
| AnnaBridge | 143:86740a56073b | 407 | * @} |
| AnnaBridge | 143:86740a56073b | 408 | */ |
| AnnaBridge | 143:86740a56073b | 409 | |
| AnnaBridge | 143:86740a56073b | 410 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
| AnnaBridge | 143:86740a56073b | 411 | * @{ |
| AnnaBridge | 143:86740a56073b | 412 | */ |
| AnnaBridge | 143:86740a56073b | 413 | /* Peripheral State functions ***************************************************/ |
| AnnaBridge | 143:86740a56073b | 414 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 143:86740a56073b | 415 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 143:86740a56073b | 416 | |
| AnnaBridge | 143:86740a56073b | 417 | /** |
| AnnaBridge | 143:86740a56073b | 418 | * @} |
| AnnaBridge | 143:86740a56073b | 419 | */ |
| AnnaBridge | 143:86740a56073b | 420 | |
| AnnaBridge | 143:86740a56073b | 421 | /** |
| AnnaBridge | 143:86740a56073b | 422 | * @} |
| AnnaBridge | 143:86740a56073b | 423 | */ |
| AnnaBridge | 143:86740a56073b | 424 | |
| AnnaBridge | 143:86740a56073b | 425 | /** |
| AnnaBridge | 143:86740a56073b | 426 | * @} |
| AnnaBridge | 143:86740a56073b | 427 | */ |
| AnnaBridge | 143:86740a56073b | 428 | |
| AnnaBridge | 143:86740a56073b | 429 | /** |
| AnnaBridge | 143:86740a56073b | 430 | * @} |
| AnnaBridge | 143:86740a56073b | 431 | */ |
| AnnaBridge | 143:86740a56073b | 432 | |
| AnnaBridge | 143:86740a56073b | 433 | #endif /* STM32L011xx && STM32L021xx && STM32L031xx && STM32L041xx && STM32L061xx && STM32L071xx && STM32L081xx*/ |
| AnnaBridge | 143:86740a56073b | 434 | |
| AnnaBridge | 143:86740a56073b | 435 | #ifdef __cplusplus |
| AnnaBridge | 143:86740a56073b | 436 | } |
| AnnaBridge | 143:86740a56073b | 437 | #endif |
| AnnaBridge | 143:86740a56073b | 438 | |
| AnnaBridge | 143:86740a56073b | 439 | #endif /*__STM32L0xx_HAL_DAC_H */ |
| AnnaBridge | 143:86740a56073b | 440 | |
| AnnaBridge | 143:86740a56073b | 441 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
