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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_hal.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal.h@167:84c0a372a020 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 157:e7ca05fa8600 1 /**
AnnaBridge 157:e7ca05fa8600 2 ******************************************************************************
AnnaBridge 157:e7ca05fa8600 3 * @file stm32l0xx_hal.h
AnnaBridge 157:e7ca05fa8600 4 * @author MCD Application Team
AnnaBridge 157:e7ca05fa8600 5 * @brief This file contains all the functions prototypes for the HAL
AnnaBridge 157:e7ca05fa8600 6 * module driver.
AnnaBridge 157:e7ca05fa8600 7 ******************************************************************************
AnnaBridge 157:e7ca05fa8600 8 * @attention
AnnaBridge 157:e7ca05fa8600 9 *
AnnaBridge 157:e7ca05fa8600 10 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 157:e7ca05fa8600 11 *
AnnaBridge 157:e7ca05fa8600 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 157:e7ca05fa8600 13 * are permitted provided that the following conditions are met:
AnnaBridge 157:e7ca05fa8600 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 157:e7ca05fa8600 15 * this list of conditions and the following disclaimer.
AnnaBridge 157:e7ca05fa8600 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 157:e7ca05fa8600 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 157:e7ca05fa8600 18 * and/or other materials provided with the distribution.
AnnaBridge 157:e7ca05fa8600 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 157:e7ca05fa8600 20 * may be used to endorse or promote products derived from this software
AnnaBridge 157:e7ca05fa8600 21 * without specific prior written permission.
AnnaBridge 157:e7ca05fa8600 22 *
AnnaBridge 157:e7ca05fa8600 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 157:e7ca05fa8600 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 157:e7ca05fa8600 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 157:e7ca05fa8600 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 157:e7ca05fa8600 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 157:e7ca05fa8600 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 157:e7ca05fa8600 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 157:e7ca05fa8600 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 157:e7ca05fa8600 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 157:e7ca05fa8600 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 157:e7ca05fa8600 33 *
AnnaBridge 157:e7ca05fa8600 34 ******************************************************************************
AnnaBridge 157:e7ca05fa8600 35 */
AnnaBridge 157:e7ca05fa8600 36
AnnaBridge 157:e7ca05fa8600 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 157:e7ca05fa8600 38 #ifndef __STM32L0xx_HAL_H
AnnaBridge 157:e7ca05fa8600 39 #define __STM32L0xx_HAL_H
AnnaBridge 157:e7ca05fa8600 40
AnnaBridge 157:e7ca05fa8600 41 #ifdef __cplusplus
AnnaBridge 157:e7ca05fa8600 42 extern "C" {
AnnaBridge 157:e7ca05fa8600 43 #endif
AnnaBridge 157:e7ca05fa8600 44
AnnaBridge 157:e7ca05fa8600 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 157:e7ca05fa8600 46 #include "stm32l0xx_hal_conf.h"
AnnaBridge 157:e7ca05fa8600 47
AnnaBridge 157:e7ca05fa8600 48 /** @addtogroup STM32L0xx_HAL_Driver
AnnaBridge 157:e7ca05fa8600 49 * @{
AnnaBridge 157:e7ca05fa8600 50 */
AnnaBridge 157:e7ca05fa8600 51
AnnaBridge 157:e7ca05fa8600 52 /** @defgroup HAL HAL
AnnaBridge 157:e7ca05fa8600 53 * @{
AnnaBridge 157:e7ca05fa8600 54 */
AnnaBridge 157:e7ca05fa8600 55 /** @defgroup HAL_Exported_Constants HAL Exported Constants
AnnaBridge 157:e7ca05fa8600 56 * @{
AnnaBridge 157:e7ca05fa8600 57 */
AnnaBridge 157:e7ca05fa8600 58
AnnaBridge 157:e7ca05fa8600 59 /** @defgroup SYSCFG_BootMode Boot Mode
AnnaBridge 157:e7ca05fa8600 60 * @{
AnnaBridge 157:e7ca05fa8600 61 */
AnnaBridge 157:e7ca05fa8600 62 #define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000U)
AnnaBridge 157:e7ca05fa8600 63 #define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_CFGR1_BOOT_MODE_0)
AnnaBridge 157:e7ca05fa8600 64 #define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_CFGR1_BOOT_MODE)
AnnaBridge 157:e7ca05fa8600 65
AnnaBridge 157:e7ca05fa8600 66 /**
AnnaBridge 157:e7ca05fa8600 67 * @}
AnnaBridge 157:e7ca05fa8600 68 */
AnnaBridge 157:e7ca05fa8600 69
AnnaBridge 157:e7ca05fa8600 70 /** @defgroup DBGMCU_Low_Power_Config DBGMCU Low Power Configuration
AnnaBridge 157:e7ca05fa8600 71 * @{
AnnaBridge 157:e7ca05fa8600 72 */
AnnaBridge 157:e7ca05fa8600 73 #define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP
AnnaBridge 157:e7ca05fa8600 74 #define DBGMCU_STOP DBGMCU_CR_DBG_STOP
AnnaBridge 157:e7ca05fa8600 75 #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
AnnaBridge 157:e7ca05fa8600 76 #define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00U) && ((__PERIPH__) != 0x00U))
AnnaBridge 157:e7ca05fa8600 77
AnnaBridge 157:e7ca05fa8600 78
AnnaBridge 157:e7ca05fa8600 79 /**
AnnaBridge 157:e7ca05fa8600 80 * @}
AnnaBridge 157:e7ca05fa8600 81 */
AnnaBridge 157:e7ca05fa8600 82
AnnaBridge 157:e7ca05fa8600 83 #if defined (LCD_BASE) /* STM32L0x3xx only */
AnnaBridge 157:e7ca05fa8600 84 /** @defgroup SYSCFG_LCD_EXT_CAPA SYSCFG LCD External Capacitors
AnnaBridge 157:e7ca05fa8600 85 * @{
AnnaBridge 157:e7ca05fa8600 86 */
AnnaBridge 157:e7ca05fa8600 87 #define SYSCFG_LCD_EXT_CAPA SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */
AnnaBridge 157:e7ca05fa8600 88 #define SYSCFG_VLCD_PB2_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_0 /*!< Connection on PB2 */
AnnaBridge 157:e7ca05fa8600 89 #define SYSCFG_VLCD_PB12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_1 /*!< Connection on PB12 */
AnnaBridge 157:e7ca05fa8600 90 #define SYSCFG_VLCD_PB0_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_2 /*!< Connection on PB0 */
AnnaBridge 157:e7ca05fa8600 91 #if defined (SYSCFG_CFGR2_CAPA_3)
AnnaBridge 157:e7ca05fa8600 92 #define SYSCFG_VLCD_PE11_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_3 /*!< Connection on PE11 */
AnnaBridge 157:e7ca05fa8600 93 #endif
AnnaBridge 157:e7ca05fa8600 94 #if defined (SYSCFG_CFGR2_CAPA_4)
AnnaBridge 157:e7ca05fa8600 95 #define SYSCFG_VLCD_PE12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_4 /*!< Connection on PE12 */
AnnaBridge 157:e7ca05fa8600 96 #endif
AnnaBridge 157:e7ca05fa8600 97
AnnaBridge 157:e7ca05fa8600 98 /**
AnnaBridge 157:e7ca05fa8600 99 * @}
AnnaBridge 157:e7ca05fa8600 100 */
AnnaBridge 157:e7ca05fa8600 101 #endif
AnnaBridge 157:e7ca05fa8600 102
AnnaBridge 157:e7ca05fa8600 103 /** @defgroup SYSCFG_VREFINT_OUT_SELECT SYSCFG VREFINT Out Selection
AnnaBridge 157:e7ca05fa8600 104 * @{
AnnaBridge 157:e7ca05fa8600 105 */
AnnaBridge 157:e7ca05fa8600 106 #define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000U) /* no pad connected */
AnnaBridge 157:e7ca05fa8600 107 #define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */
AnnaBridge 157:e7ca05fa8600 108 #define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */
AnnaBridge 157:e7ca05fa8600 109 #define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */
AnnaBridge 157:e7ca05fa8600 110
AnnaBridge 157:e7ca05fa8600 111 #define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE) || \
AnnaBridge 157:e7ca05fa8600 112 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \
AnnaBridge 157:e7ca05fa8600 113 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \
AnnaBridge 157:e7ca05fa8600 114 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1))
AnnaBridge 157:e7ca05fa8600 115 /**
AnnaBridge 157:e7ca05fa8600 116 * @}
AnnaBridge 157:e7ca05fa8600 117 */
AnnaBridge 157:e7ca05fa8600 118
AnnaBridge 157:e7ca05fa8600 119 /** @defgroup SYSCFG_flags_definition SYSCFG Flags Definition
AnnaBridge 157:e7ca05fa8600 120 * @{
AnnaBridge 157:e7ca05fa8600 121 */
AnnaBridge 157:e7ca05fa8600 122 #define SYSCFG_FLAG_VREFINT_READY SYSCFG_CFGR3_VREFINT_RDYF
AnnaBridge 157:e7ca05fa8600 123
AnnaBridge 157:e7ca05fa8600 124 #define IS_SYSCFG_FLAG(FLAG) ((FLAG) == SYSCFG_FLAG_VREFINT_READY))
AnnaBridge 157:e7ca05fa8600 125
AnnaBridge 157:e7ca05fa8600 126 /**
AnnaBridge 157:e7ca05fa8600 127 * @}
AnnaBridge 157:e7ca05fa8600 128 */
AnnaBridge 157:e7ca05fa8600 129
AnnaBridge 157:e7ca05fa8600 130 /** @defgroup SYSCFG_FastModePlus_GPIO Fast Mode Plus on GPIO
AnnaBridge 157:e7ca05fa8600 131 * @{
AnnaBridge 157:e7ca05fa8600 132 */
AnnaBridge 157:e7ca05fa8600 133 /** @brief Fast mode Plus driving capability on a specific GPIO
AnnaBridge 157:e7ca05fa8600 134 */
AnnaBridge 157:e7ca05fa8600 135 #if defined (SYSCFG_CFGR2_I2C_PB6_FMP)
AnnaBridge 157:e7ca05fa8600 136 #define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /* Enable Fast Mode Plus on PB6 */
AnnaBridge 157:e7ca05fa8600 137 #endif
AnnaBridge 157:e7ca05fa8600 138 #if defined (SYSCFG_CFGR2_I2C_PB7_FMP)
AnnaBridge 157:e7ca05fa8600 139 #define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /* Enable Fast Mode Plus on PB7 */
AnnaBridge 157:e7ca05fa8600 140 #endif
AnnaBridge 157:e7ca05fa8600 141 #if defined (SYSCFG_CFGR2_I2C_PB8_FMP)
AnnaBridge 157:e7ca05fa8600 142 #define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /* Enable Fast Mode Plus on PB8 */
AnnaBridge 157:e7ca05fa8600 143 #endif
AnnaBridge 157:e7ca05fa8600 144 #if defined (SYSCFG_CFGR2_I2C_PB9_FMP)
AnnaBridge 157:e7ca05fa8600 145 #define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /* Enable Fast Mode Plus on PB9 */
AnnaBridge 157:e7ca05fa8600 146 #endif
AnnaBridge 157:e7ca05fa8600 147
AnnaBridge 157:e7ca05fa8600 148 #define IS_SYSCFG_FASTMODEPLUS(PIN) ((((PIN) & (SYSCFG_FASTMODEPLUS_PB6)) == SYSCFG_FASTMODEPLUS_PB6) || \
AnnaBridge 157:e7ca05fa8600 149 (((PIN) & (SYSCFG_FASTMODEPLUS_PB7)) == SYSCFG_FASTMODEPLUS_PB7) || \
AnnaBridge 157:e7ca05fa8600 150 (((PIN) & (SYSCFG_FASTMODEPLUS_PB8)) == SYSCFG_FASTMODEPLUS_PB8) || \
AnnaBridge 157:e7ca05fa8600 151 (((PIN) & (SYSCFG_FASTMODEPLUS_PB9)) == SYSCFG_FASTMODEPLUS_PB9) )
AnnaBridge 157:e7ca05fa8600 152 /**
AnnaBridge 157:e7ca05fa8600 153 * @}
AnnaBridge 157:e7ca05fa8600 154 */
AnnaBridge 157:e7ca05fa8600 155 /**
AnnaBridge 157:e7ca05fa8600 156 * @}
AnnaBridge 157:e7ca05fa8600 157 */
AnnaBridge 157:e7ca05fa8600 158
AnnaBridge 157:e7ca05fa8600 159 /** @defgroup HAL_Exported_Macros HAL Exported Macros
AnnaBridge 157:e7ca05fa8600 160 * @{
AnnaBridge 157:e7ca05fa8600 161 */
AnnaBridge 157:e7ca05fa8600 162
AnnaBridge 157:e7ca05fa8600 163 /** @brief Freeze/Unfreeze Peripherals in Debug mode
AnnaBridge 157:e7ca05fa8600 164 */
AnnaBridge 157:e7ca05fa8600 165 #if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
AnnaBridge 157:e7ca05fa8600 166 /**
AnnaBridge 157:e7ca05fa8600 167 * @brief TIM2 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 168 */
AnnaBridge 157:e7ca05fa8600 169 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
AnnaBridge 157:e7ca05fa8600 170 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
AnnaBridge 157:e7ca05fa8600 171 #endif
AnnaBridge 157:e7ca05fa8600 172
AnnaBridge 157:e7ca05fa8600 173 #if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
AnnaBridge 157:e7ca05fa8600 174 /**
AnnaBridge 157:e7ca05fa8600 175 * @brief TIM3 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 176 */
AnnaBridge 157:e7ca05fa8600 177 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
AnnaBridge 157:e7ca05fa8600 178 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
AnnaBridge 157:e7ca05fa8600 179 #endif
AnnaBridge 157:e7ca05fa8600 180
AnnaBridge 157:e7ca05fa8600 181 #if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
AnnaBridge 157:e7ca05fa8600 182 /**
AnnaBridge 157:e7ca05fa8600 183 * @brief TIM6 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 184 */
AnnaBridge 157:e7ca05fa8600 185 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
AnnaBridge 157:e7ca05fa8600 186 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
AnnaBridge 157:e7ca05fa8600 187 #endif
AnnaBridge 157:e7ca05fa8600 188
AnnaBridge 157:e7ca05fa8600 189 #if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
AnnaBridge 157:e7ca05fa8600 190 /**
AnnaBridge 157:e7ca05fa8600 191 * @brief TIM7 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 192 */
AnnaBridge 157:e7ca05fa8600 193 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
AnnaBridge 157:e7ca05fa8600 194 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
AnnaBridge 157:e7ca05fa8600 195 #endif
AnnaBridge 157:e7ca05fa8600 196
AnnaBridge 157:e7ca05fa8600 197 #if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
AnnaBridge 157:e7ca05fa8600 198 /**
AnnaBridge 157:e7ca05fa8600 199 * @brief RTC Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 200 */
AnnaBridge 157:e7ca05fa8600 201 #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
AnnaBridge 157:e7ca05fa8600 202 #define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
AnnaBridge 157:e7ca05fa8600 203 #endif
AnnaBridge 157:e7ca05fa8600 204
AnnaBridge 157:e7ca05fa8600 205 #if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
AnnaBridge 157:e7ca05fa8600 206 /**
AnnaBridge 157:e7ca05fa8600 207 * @brief WWDG Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 208 */
AnnaBridge 157:e7ca05fa8600 209 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
AnnaBridge 157:e7ca05fa8600 210 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
AnnaBridge 157:e7ca05fa8600 211 #endif
AnnaBridge 157:e7ca05fa8600 212
AnnaBridge 157:e7ca05fa8600 213 #if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
AnnaBridge 157:e7ca05fa8600 214 /**
AnnaBridge 157:e7ca05fa8600 215 * @brief IWDG Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 216 */
AnnaBridge 157:e7ca05fa8600 217 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
AnnaBridge 157:e7ca05fa8600 218 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
AnnaBridge 157:e7ca05fa8600 219 #endif
AnnaBridge 157:e7ca05fa8600 220
AnnaBridge 157:e7ca05fa8600 221 #if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP)
AnnaBridge 157:e7ca05fa8600 222 /**
AnnaBridge 157:e7ca05fa8600 223 * @brief I2C1 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 224 */
AnnaBridge 157:e7ca05fa8600 225 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
AnnaBridge 157:e7ca05fa8600 226 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
AnnaBridge 157:e7ca05fa8600 227 #endif
AnnaBridge 157:e7ca05fa8600 228
AnnaBridge 157:e7ca05fa8600 229 #if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP)
AnnaBridge 157:e7ca05fa8600 230 /**
AnnaBridge 157:e7ca05fa8600 231 * @brief I2C2 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 232 */
AnnaBridge 157:e7ca05fa8600 233 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
AnnaBridge 157:e7ca05fa8600 234 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
AnnaBridge 157:e7ca05fa8600 235 #endif
AnnaBridge 157:e7ca05fa8600 236
AnnaBridge 157:e7ca05fa8600 237 #if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP)
AnnaBridge 157:e7ca05fa8600 238 /**
AnnaBridge 157:e7ca05fa8600 239 * @brief I2C3 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 240 */
AnnaBridge 157:e7ca05fa8600 241 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
AnnaBridge 157:e7ca05fa8600 242 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
AnnaBridge 157:e7ca05fa8600 243 #endif
AnnaBridge 157:e7ca05fa8600 244
AnnaBridge 157:e7ca05fa8600 245 #if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
AnnaBridge 157:e7ca05fa8600 246 /**
AnnaBridge 157:e7ca05fa8600 247 * @brief LPTIMER Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 248 */
AnnaBridge 157:e7ca05fa8600 249 #define __HAL_DBGMCU_FREEZE_LPTIMER() SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
AnnaBridge 157:e7ca05fa8600 250 #define __HAL_DBGMCU_UNFREEZE_LPTIMER() CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
AnnaBridge 157:e7ca05fa8600 251 #endif
AnnaBridge 157:e7ca05fa8600 252
AnnaBridge 157:e7ca05fa8600 253 #if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP)
AnnaBridge 157:e7ca05fa8600 254 /**
AnnaBridge 157:e7ca05fa8600 255 * @brief TIM22 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 256 */
AnnaBridge 157:e7ca05fa8600 257 #define __HAL_DBGMCU_FREEZE_TIM22() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
AnnaBridge 157:e7ca05fa8600 258 #define __HAL_DBGMCU_UNFREEZE_TIM22() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
AnnaBridge 157:e7ca05fa8600 259 #endif
AnnaBridge 157:e7ca05fa8600 260
AnnaBridge 157:e7ca05fa8600 261 #if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP)
AnnaBridge 157:e7ca05fa8600 262 /**
AnnaBridge 157:e7ca05fa8600 263 * @brief TIM21 Peripherals Debug mode
AnnaBridge 157:e7ca05fa8600 264 */
AnnaBridge 157:e7ca05fa8600 265 #define __HAL_DBGMCU_FREEZE_TIM21() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
AnnaBridge 157:e7ca05fa8600 266 #define __HAL_DBGMCU_UNFREEZE_TIM21() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
AnnaBridge 157:e7ca05fa8600 267 #endif
AnnaBridge 157:e7ca05fa8600 268
AnnaBridge 157:e7ca05fa8600 269 /** @brief Main Flash memory mapped at 0x00000000
AnnaBridge 157:e7ca05fa8600 270 */
AnnaBridge 157:e7ca05fa8600 271 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
AnnaBridge 157:e7ca05fa8600 272
AnnaBridge 157:e7ca05fa8600 273 /** @brief System Flash memory mapped at 0x00000000
AnnaBridge 157:e7ca05fa8600 274 */
AnnaBridge 157:e7ca05fa8600 275 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0)
AnnaBridge 157:e7ca05fa8600 276
AnnaBridge 157:e7ca05fa8600 277
AnnaBridge 157:e7ca05fa8600 278 /** @brief Embedded SRAM mapped at 0x00000000
AnnaBridge 157:e7ca05fa8600 279 */
AnnaBridge 157:e7ca05fa8600 280 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1)
AnnaBridge 157:e7ca05fa8600 281
AnnaBridge 157:e7ca05fa8600 282 /** @brief Configuration of the DBG Low Power mode.
AnnaBridge 157:e7ca05fa8600 283 * @param __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active.
AnnaBridge 157:e7ca05fa8600 284 * This parameter can be a value of
AnnaBridge 157:e7ca05fa8600 285 * - DBGMCU_SLEEP
AnnaBridge 157:e7ca05fa8600 286 * - DBGMCU_STOP
AnnaBridge 157:e7ca05fa8600 287 * - DBGMCU_STANDBY
AnnaBridge 157:e7ca05fa8600 288 */
AnnaBridge 157:e7ca05fa8600 289 #define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__) do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \
AnnaBridge 157:e7ca05fa8600 290 MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \
AnnaBridge 157:e7ca05fa8600 291 } while (0)
AnnaBridge 157:e7ca05fa8600 292
AnnaBridge 157:e7ca05fa8600 293 #if defined (LCD_BASE) /* STM32L0x3xx only */
AnnaBridge 157:e7ca05fa8600 294
AnnaBridge 157:e7ca05fa8600 295 /** @brief Macro to configure the VLCD Decoupling capacitance connection.
AnnaBridge 157:e7ca05fa8600 296 *
AnnaBridge 157:e7ca05fa8600 297 * @param __SYSCFG_VLCD_CAPA__: specifies the decoupling of LCD capacitance for rails connection on GPIO.
AnnaBridge 157:e7ca05fa8600 298 * This parameter can be a combination of following values (when available):
AnnaBridge 157:e7ca05fa8600 299 * @arg SYSCFG_VLCD_PB2_EXT_CAPA_ON: Connection on PB2
AnnaBridge 157:e7ca05fa8600 300 * @arg SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
AnnaBridge 157:e7ca05fa8600 301 * @arg SYSCFG_VLCD_PB0_EXT_CAPA_ON: Connection on PB0
AnnaBridge 157:e7ca05fa8600 302 * @arg SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
AnnaBridge 157:e7ca05fa8600 303 * @arg SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12
AnnaBridge 157:e7ca05fa8600 304 * @retval None
AnnaBridge 157:e7ca05fa8600 305 */
AnnaBridge 157:e7ca05fa8600 306 #define __HAL_SYSCFG_VLCD_CAPA_CONFIG(__SYSCFG_VLCD_CAPA__) \
AnnaBridge 157:e7ca05fa8600 307 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA, (uint32_t)(__SYSCFG_VLCD_CAPA__))
AnnaBridge 157:e7ca05fa8600 308
AnnaBridge 157:e7ca05fa8600 309 /**
AnnaBridge 157:e7ca05fa8600 310 * @brief Returns the decoupling of LCD capacitance configured by user.
AnnaBridge 157:e7ca05fa8600 311 * @retval The LCD capacitance connection as configured by user. The returned can be a combination of :
AnnaBridge 157:e7ca05fa8600 312 * SYSCFG_VLCD_PB2_EXT_CAPA_ON: Connection on PB2
AnnaBridge 157:e7ca05fa8600 313 * SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
AnnaBridge 157:e7ca05fa8600 314 * SYSCFG_VLCD_PB0_EXT_CAPA_ON: Connection on PB0
AnnaBridge 157:e7ca05fa8600 315 * SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
AnnaBridge 157:e7ca05fa8600 316 * SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12
AnnaBridge 157:e7ca05fa8600 317 */
AnnaBridge 157:e7ca05fa8600 318 #define __HAL_SYSCFG_GET_VLCD_CAPA_CONFIG() READ_BIT(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA)
AnnaBridge 157:e7ca05fa8600 319
AnnaBridge 157:e7ca05fa8600 320 #endif
AnnaBridge 157:e7ca05fa8600 321
AnnaBridge 157:e7ca05fa8600 322 /**
AnnaBridge 157:e7ca05fa8600 323 * @brief Returns the boot mode as configured by user.
AnnaBridge 157:e7ca05fa8600 324 * @retval The boot mode as configured by user. The returned can be a value of :
AnnaBridge 157:e7ca05fa8600 325 * - SYSCFG_BOOT_MAINFLASH
AnnaBridge 157:e7ca05fa8600 326 * - SYSCFG_BOOT_SYSTEMFLASH
AnnaBridge 157:e7ca05fa8600 327 * - SYSCFG_BOOT_SRAM
AnnaBridge 157:e7ca05fa8600 328 */
AnnaBridge 157:e7ca05fa8600 329 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)
AnnaBridge 157:e7ca05fa8600 330
AnnaBridge 157:e7ca05fa8600 331
AnnaBridge 157:e7ca05fa8600 332 /** @brief Check whether the specified SYSCFG flag is set or not.
AnnaBridge 157:e7ca05fa8600 333 * @param __FLAG__: specifies the flag to check.
AnnaBridge 157:e7ca05fa8600 334 * The only parameter supported is SYSCFG_FLAG_VREFINT_READY
AnnaBridge 157:e7ca05fa8600 335 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 157:e7ca05fa8600 336 */
AnnaBridge 157:e7ca05fa8600 337 #define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
AnnaBridge 157:e7ca05fa8600 338
AnnaBridge 157:e7ca05fa8600 339 /** @brief Fast mode Plus driving capability enable macro
AnnaBridge 157:e7ca05fa8600 340 * @param __FASTMODEPLUS__: This parameter can be a value of :
AnnaBridge 157:e7ca05fa8600 341 * @arg SYSCFG_FASTMODEPLUS_PB6
AnnaBridge 157:e7ca05fa8600 342 * @arg SYSCFG_FASTMODEPLUS_PB7
AnnaBridge 157:e7ca05fa8600 343 * @arg SYSCFG_FASTMODEPLUS_PB8
AnnaBridge 157:e7ca05fa8600 344 * @arg SYSCFG_FASTMODEPLUS_PB9
AnnaBridge 157:e7ca05fa8600 345 */
AnnaBridge 157:e7ca05fa8600 346 #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
AnnaBridge 167:84c0a372a020 347 SET_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__)); \
AnnaBridge 157:e7ca05fa8600 348 }while(0)
AnnaBridge 157:e7ca05fa8600 349 /** @brief Fast mode Plus driving capability disable macro
AnnaBridge 157:e7ca05fa8600 350 * @param __FASTMODEPLUS__: This parameter can be a value of :
AnnaBridge 157:e7ca05fa8600 351 * @arg SYSCFG_FASTMODEPLUS_PB6
AnnaBridge 157:e7ca05fa8600 352 * @arg SYSCFG_FASTMODEPLUS_PB7
AnnaBridge 157:e7ca05fa8600 353 * @arg SYSCFG_FASTMODEPLUS_PB8
AnnaBridge 157:e7ca05fa8600 354 * @arg SYSCFG_FASTMODEPLUS_PB9
AnnaBridge 157:e7ca05fa8600 355 */
AnnaBridge 157:e7ca05fa8600 356 #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
AnnaBridge 167:84c0a372a020 357 CLEAR_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__)); \
AnnaBridge 157:e7ca05fa8600 358 }while(0)
AnnaBridge 157:e7ca05fa8600 359
AnnaBridge 157:e7ca05fa8600 360
AnnaBridge 157:e7ca05fa8600 361 /**
AnnaBridge 157:e7ca05fa8600 362 * @}
AnnaBridge 157:e7ca05fa8600 363 */
AnnaBridge 157:e7ca05fa8600 364
AnnaBridge 157:e7ca05fa8600 365 /** @defgroup HAL_Exported_Functions HAL Exported Functions
AnnaBridge 157:e7ca05fa8600 366 * @{
AnnaBridge 157:e7ca05fa8600 367 */
AnnaBridge 157:e7ca05fa8600 368 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 157:e7ca05fa8600 369 * @brief Initialization and de-initialization functions
AnnaBridge 157:e7ca05fa8600 370 * @{
AnnaBridge 157:e7ca05fa8600 371 */
AnnaBridge 157:e7ca05fa8600 372 HAL_StatusTypeDef HAL_Init(void);
AnnaBridge 157:e7ca05fa8600 373 HAL_StatusTypeDef HAL_DeInit(void);
AnnaBridge 157:e7ca05fa8600 374 void HAL_MspInit(void);
AnnaBridge 157:e7ca05fa8600 375 void HAL_MspDeInit(void);
AnnaBridge 157:e7ca05fa8600 376 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
AnnaBridge 157:e7ca05fa8600 377
AnnaBridge 157:e7ca05fa8600 378 /**
AnnaBridge 157:e7ca05fa8600 379 * @}
AnnaBridge 157:e7ca05fa8600 380 */
AnnaBridge 157:e7ca05fa8600 381
AnnaBridge 157:e7ca05fa8600 382 /** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions
AnnaBridge 157:e7ca05fa8600 383 * @brief Peripheral Control functions
AnnaBridge 157:e7ca05fa8600 384 * @{
AnnaBridge 157:e7ca05fa8600 385 */
AnnaBridge 157:e7ca05fa8600 386 void HAL_IncTick(void);
AnnaBridge 157:e7ca05fa8600 387 void HAL_Delay(__IO uint32_t Delay);
AnnaBridge 157:e7ca05fa8600 388 uint32_t HAL_GetTick(void);
AnnaBridge 157:e7ca05fa8600 389 void HAL_SuspendTick(void);
AnnaBridge 157:e7ca05fa8600 390 void HAL_ResumeTick(void);
AnnaBridge 157:e7ca05fa8600 391 uint32_t HAL_GetHalVersion(void);
AnnaBridge 157:e7ca05fa8600 392 uint32_t HAL_GetREVID(void);
AnnaBridge 157:e7ca05fa8600 393 uint32_t HAL_GetDEVID(void);
AnnaBridge 157:e7ca05fa8600 394 void HAL_DBGMCU_EnableDBGSleepMode(void);
AnnaBridge 157:e7ca05fa8600 395 void HAL_DBGMCU_DisableDBGSleepMode(void);
AnnaBridge 157:e7ca05fa8600 396 void HAL_DBGMCU_EnableDBGStopMode(void);
AnnaBridge 157:e7ca05fa8600 397 void HAL_DBGMCU_DisableDBGStopMode(void);
AnnaBridge 157:e7ca05fa8600 398 void HAL_DBGMCU_EnableDBGStandbyMode(void);
AnnaBridge 157:e7ca05fa8600 399 void HAL_DBGMCU_DisableDBGStandbyMode(void);
AnnaBridge 157:e7ca05fa8600 400 void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph);
AnnaBridge 157:e7ca05fa8600 401 void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph);
AnnaBridge 157:e7ca05fa8600 402 uint32_t HAL_SYSCFG_GetBootMode(void);
AnnaBridge 157:e7ca05fa8600 403 void HAL_SYSCFG_Enable_Lock_VREFINT(void);
AnnaBridge 157:e7ca05fa8600 404 void HAL_SYSCFG_Disable_Lock_VREFINT(void);
AnnaBridge 157:e7ca05fa8600 405 void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT);
AnnaBridge 157:e7ca05fa8600 406
AnnaBridge 157:e7ca05fa8600 407 /**
AnnaBridge 157:e7ca05fa8600 408 * @}
AnnaBridge 157:e7ca05fa8600 409 */
AnnaBridge 157:e7ca05fa8600 410 /**
AnnaBridge 157:e7ca05fa8600 411 * @}
AnnaBridge 157:e7ca05fa8600 412 */
AnnaBridge 157:e7ca05fa8600 413
AnnaBridge 157:e7ca05fa8600 414 /* Define the private group ***********************************/
AnnaBridge 157:e7ca05fa8600 415 /**************************************************************/
AnnaBridge 157:e7ca05fa8600 416 /** @defgroup HAL_Private HAL Private
AnnaBridge 157:e7ca05fa8600 417 * @{
AnnaBridge 157:e7ca05fa8600 418 */
AnnaBridge 157:e7ca05fa8600 419 /**
AnnaBridge 157:e7ca05fa8600 420 * @}
AnnaBridge 157:e7ca05fa8600 421 */
AnnaBridge 157:e7ca05fa8600 422 /**************************************************************/
AnnaBridge 157:e7ca05fa8600 423
AnnaBridge 157:e7ca05fa8600 424
AnnaBridge 157:e7ca05fa8600 425 /**
AnnaBridge 157:e7ca05fa8600 426 * @}
AnnaBridge 157:e7ca05fa8600 427 */
AnnaBridge 157:e7ca05fa8600 428
AnnaBridge 157:e7ca05fa8600 429 /**
AnnaBridge 157:e7ca05fa8600 430 * @}
AnnaBridge 157:e7ca05fa8600 431 */
AnnaBridge 157:e7ca05fa8600 432
AnnaBridge 157:e7ca05fa8600 433 #ifdef __cplusplus
AnnaBridge 157:e7ca05fa8600 434 }
AnnaBridge 157:e7ca05fa8600 435 #endif
AnnaBridge 157:e7ca05fa8600 436
AnnaBridge 157:e7ca05fa8600 437 #endif /* __STM32L0xx_HAL_H */
AnnaBridge 157:e7ca05fa8600 438
AnnaBridge 157:e7ca05fa8600 439 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 157:e7ca05fa8600 440