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TARGET_NUCLEO_F756ZG/TOOLCHAIN_ARM_STD/stm32f7xx_hal_uart.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	171:3a7713b1edbc	1	/**
AnnaBridge	171:3a7713b1edbc	2	******************************************************************************
AnnaBridge	171:3a7713b1edbc	3	* @file stm32f7xx_hal_uart.h
AnnaBridge	171:3a7713b1edbc	4	* @author MCD Application Team
AnnaBridge	171:3a7713b1edbc	5	* @brief Header file of UART HAL module.
AnnaBridge	171:3a7713b1edbc	6	******************************************************************************
AnnaBridge	171:3a7713b1edbc	7	* @attention
AnnaBridge	171:3a7713b1edbc	8	*
AnnaBridge	171:3a7713b1edbc	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	171:3a7713b1edbc	10	*
AnnaBridge	171:3a7713b1edbc	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	171:3a7713b1edbc	12	* are permitted provided that the following conditions are met:
AnnaBridge	171:3a7713b1edbc	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	171:3a7713b1edbc	14	* this list of conditions and the following disclaimer.
AnnaBridge	171:3a7713b1edbc	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	171:3a7713b1edbc	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	171:3a7713b1edbc	17	* and/or other materials provided with the distribution.
AnnaBridge	171:3a7713b1edbc	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	171:3a7713b1edbc	19	* may be used to endorse or promote products derived from this software
AnnaBridge	171:3a7713b1edbc	20	* without specific prior written permission.
AnnaBridge	171:3a7713b1edbc	21	*
AnnaBridge	171:3a7713b1edbc	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	171:3a7713b1edbc	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	171:3a7713b1edbc	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	171:3a7713b1edbc	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	171:3a7713b1edbc	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	171:3a7713b1edbc	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	171:3a7713b1edbc	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	171:3a7713b1edbc	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	171:3a7713b1edbc	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	171:3a7713b1edbc	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	171:3a7713b1edbc	32	*
AnnaBridge	171:3a7713b1edbc	33	******************************************************************************
AnnaBridge	171:3a7713b1edbc	34	*/
AnnaBridge	171:3a7713b1edbc	35
AnnaBridge	171:3a7713b1edbc	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	171:3a7713b1edbc	37	#ifndef __STM32F7xx_HAL_UART_H
AnnaBridge	171:3a7713b1edbc	38	#define __STM32F7xx_HAL_UART_H
AnnaBridge	171:3a7713b1edbc	39
AnnaBridge	171:3a7713b1edbc	40	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	41	extern "C" {
AnnaBridge	171:3a7713b1edbc	42	#endif
AnnaBridge	171:3a7713b1edbc	43
AnnaBridge	171:3a7713b1edbc	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	45	#include "stm32f7xx_hal_def.h"
AnnaBridge	171:3a7713b1edbc	46
AnnaBridge	171:3a7713b1edbc	47	/** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge	171:3a7713b1edbc	48	* @{
AnnaBridge	171:3a7713b1edbc	49	*/
AnnaBridge	171:3a7713b1edbc	50
AnnaBridge	171:3a7713b1edbc	51	/** @addtogroup UART
AnnaBridge	171:3a7713b1edbc	52	* @{
AnnaBridge	171:3a7713b1edbc	53	*/
AnnaBridge	171:3a7713b1edbc	54
AnnaBridge	171:3a7713b1edbc	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	56	/** @defgroup UART_Exported_Types UART Exported Types
AnnaBridge	171:3a7713b1edbc	57	* @{
AnnaBridge	171:3a7713b1edbc	58	*/
AnnaBridge	171:3a7713b1edbc	59
AnnaBridge	171:3a7713b1edbc	60	/**
AnnaBridge	171:3a7713b1edbc	61	* @brief UART Init Structure definition
AnnaBridge	171:3a7713b1edbc	62	*/
AnnaBridge	171:3a7713b1edbc	63	typedef struct
AnnaBridge	171:3a7713b1edbc	64	{
AnnaBridge	171:3a7713b1edbc	65	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
AnnaBridge	171:3a7713b1edbc	66	The baud rate register is computed using the following formula:
AnnaBridge	171:3a7713b1edbc	67	- If oversampling is 16 or in LIN mode,
AnnaBridge	171:3a7713b1edbc	68	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
AnnaBridge	171:3a7713b1edbc	69	- If oversampling is 8,
AnnaBridge	171:3a7713b1edbc	70	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
AnnaBridge	171:3a7713b1edbc	71	Baud Rate Register[3] = 0
AnnaBridge	171:3a7713b1edbc	72	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
AnnaBridge	171:3a7713b1edbc	73
AnnaBridge	171:3a7713b1edbc	74	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge	171:3a7713b1edbc	75	This parameter can be a value of @ref UARTEx_Word_Length */
AnnaBridge	171:3a7713b1edbc	76
AnnaBridge	171:3a7713b1edbc	77	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge	171:3a7713b1edbc	78	This parameter can be a value of @ref UART_Stop_Bits */
AnnaBridge	171:3a7713b1edbc	79
AnnaBridge	171:3a7713b1edbc	80	uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge	171:3a7713b1edbc	81	This parameter can be a value of @ref UART_Parity
AnnaBridge	171:3a7713b1edbc	82	@note When parity is enabled, the computed parity is inserted
AnnaBridge	171:3a7713b1edbc	83	at the MSB position of the transmitted data (9th bit when
AnnaBridge	171:3a7713b1edbc	84	the word length is set to 9 data bits; 8th bit when the
AnnaBridge	171:3a7713b1edbc	85	word length is set to 8 data bits). */
AnnaBridge	171:3a7713b1edbc	86
AnnaBridge	171:3a7713b1edbc	87	uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
AnnaBridge	171:3a7713b1edbc	88	This parameter can be a value of @ref UART_Mode */
AnnaBridge	171:3a7713b1edbc	89
AnnaBridge	171:3a7713b1edbc	90	uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
AnnaBridge	171:3a7713b1edbc	91	or disabled.
AnnaBridge	171:3a7713b1edbc	92	This parameter can be a value of @ref UART_Hardware_Flow_Control */
AnnaBridge	171:3a7713b1edbc	93
AnnaBridge	171:3a7713b1edbc	94	uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
AnnaBridge	171:3a7713b1edbc	95	This parameter can be a value of @ref UART_Over_Sampling */
AnnaBridge	171:3a7713b1edbc	96
AnnaBridge	171:3a7713b1edbc	97	uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
AnnaBridge	171:3a7713b1edbc	98	Selecting the single sample method increases the receiver tolerance to clock
AnnaBridge	171:3a7713b1edbc	99	deviations. This parameter can be a value of @ref UART_OneBit_Sampling */
AnnaBridge	171:3a7713b1edbc	100	}UART_InitTypeDef;
AnnaBridge	171:3a7713b1edbc	101
AnnaBridge	171:3a7713b1edbc	102	/**
AnnaBridge	171:3a7713b1edbc	103	* @brief UART Advanced Features initialization structure definition
AnnaBridge	171:3a7713b1edbc	104	*/
AnnaBridge	171:3a7713b1edbc	105	typedef struct
AnnaBridge	171:3a7713b1edbc	106	{
AnnaBridge	171:3a7713b1edbc	107	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
AnnaBridge	171:3a7713b1edbc	108	Advanced Features may be initialized at the same time .
AnnaBridge	171:3a7713b1edbc	109	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
AnnaBridge	171:3a7713b1edbc	110
AnnaBridge	171:3a7713b1edbc	111	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
AnnaBridge	171:3a7713b1edbc	112	This parameter can be a value of @ref UART_Tx_Inv */
AnnaBridge	171:3a7713b1edbc	113
AnnaBridge	171:3a7713b1edbc	114	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
AnnaBridge	171:3a7713b1edbc	115	This parameter can be a value of @ref UART_Rx_Inv */
AnnaBridge	171:3a7713b1edbc	116
AnnaBridge	171:3a7713b1edbc	117	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
AnnaBridge	171:3a7713b1edbc	118	vs negative/inverted logic).
AnnaBridge	171:3a7713b1edbc	119	This parameter can be a value of @ref UART_Data_Inv */
AnnaBridge	171:3a7713b1edbc	120
AnnaBridge	171:3a7713b1edbc	121	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
AnnaBridge	171:3a7713b1edbc	122	This parameter can be a value of @ref UART_Rx_Tx_Swap */
AnnaBridge	171:3a7713b1edbc	123
AnnaBridge	171:3a7713b1edbc	124	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
AnnaBridge	171:3a7713b1edbc	125	This parameter can be a value of @ref UART_Overrun_Disable */
AnnaBridge	171:3a7713b1edbc	126
AnnaBridge	171:3a7713b1edbc	127	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
AnnaBridge	171:3a7713b1edbc	128	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
AnnaBridge	171:3a7713b1edbc	129
AnnaBridge	171:3a7713b1edbc	130	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
AnnaBridge	171:3a7713b1edbc	131	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
AnnaBridge	171:3a7713b1edbc	132
AnnaBridge	171:3a7713b1edbc	133	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
AnnaBridge	171:3a7713b1edbc	134	detection is carried out.
AnnaBridge	171:3a7713b1edbc	135	This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */
AnnaBridge	171:3a7713b1edbc	136
AnnaBridge	171:3a7713b1edbc	137	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
AnnaBridge	171:3a7713b1edbc	138	This parameter can be a value of @ref UART_MSB_First */
AnnaBridge	171:3a7713b1edbc	139	} UART_AdvFeatureInitTypeDef;
AnnaBridge	171:3a7713b1edbc	140
AnnaBridge	171:3a7713b1edbc	141
AnnaBridge	171:3a7713b1edbc	142
AnnaBridge	171:3a7713b1edbc	143	/**
AnnaBridge	171:3a7713b1edbc	144	* @brief HAL UART State structures definition
AnnaBridge	171:3a7713b1edbc	145	* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge	171:3a7713b1edbc	146	* - gState contains UART state information related to global Handle management
AnnaBridge	171:3a7713b1edbc	147	* and also information related to Tx operations.
AnnaBridge	171:3a7713b1edbc	148	* gState value coding follow below described bitmap :
AnnaBridge	171:3a7713b1edbc	149	* b7-b6 Error information
AnnaBridge	171:3a7713b1edbc	150	* 00 : No Error
AnnaBridge	171:3a7713b1edbc	151	* 01 : (Not Used)
AnnaBridge	171:3a7713b1edbc	152	* 10 : Timeout
AnnaBridge	171:3a7713b1edbc	153	* 11 : Error
AnnaBridge	171:3a7713b1edbc	154	* b5 IP initilisation status
AnnaBridge	171:3a7713b1edbc	155	* 0 : Reset (IP not initialized)
AnnaBridge	171:3a7713b1edbc	156	* 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge	171:3a7713b1edbc	157	* b4-b3 (not used)
AnnaBridge	171:3a7713b1edbc	158	* xx : Should be set to 00
AnnaBridge	171:3a7713b1edbc	159	* b2 Intrinsic process state
AnnaBridge	171:3a7713b1edbc	160	* 0 : Ready
AnnaBridge	171:3a7713b1edbc	161	* 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge	171:3a7713b1edbc	162	* b1 (not used)
AnnaBridge	171:3a7713b1edbc	163	* x : Should be set to 0
AnnaBridge	171:3a7713b1edbc	164	* b0 Tx state
AnnaBridge	171:3a7713b1edbc	165	* 0 : Ready (no Tx operation ongoing)
AnnaBridge	171:3a7713b1edbc	166	* 1 : Busy (Tx operation ongoing)
AnnaBridge	171:3a7713b1edbc	167	* - RxState contains information related to Rx operations.
AnnaBridge	171:3a7713b1edbc	168	* RxState value coding follow below described bitmap :
AnnaBridge	171:3a7713b1edbc	169	* b7-b6 (not used)
AnnaBridge	171:3a7713b1edbc	170	* xx : Should be set to 00
AnnaBridge	171:3a7713b1edbc	171	* b5 IP initilisation status
AnnaBridge	171:3a7713b1edbc	172	* 0 : Reset (IP not initialized)
AnnaBridge	171:3a7713b1edbc	173	* 1 : Init done (IP not initialized)
AnnaBridge	171:3a7713b1edbc	174	* b4-b2 (not used)
AnnaBridge	171:3a7713b1edbc	175	* xxx : Should be set to 000
AnnaBridge	171:3a7713b1edbc	176	* b1 Rx state
AnnaBridge	171:3a7713b1edbc	177	* 0 : Ready (no Rx operation ongoing)
AnnaBridge	171:3a7713b1edbc	178	* 1 : Busy (Rx operation ongoing)
AnnaBridge	171:3a7713b1edbc	179	* b0 (not used)
AnnaBridge	171:3a7713b1edbc	180	* x : Should be set to 0.
AnnaBridge	171:3a7713b1edbc	181	*/
AnnaBridge	171:3a7713b1edbc	182	typedef enum
AnnaBridge	171:3a7713b1edbc	183	{
AnnaBridge	171:3a7713b1edbc	184	HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
AnnaBridge	171:3a7713b1edbc	185	Value is allowed for gState and RxState */
AnnaBridge	171:3a7713b1edbc	186	HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge	171:3a7713b1edbc	187	Value is allowed for gState and RxState */
AnnaBridge	171:3a7713b1edbc	188	HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge	171:3a7713b1edbc	189	Value is allowed for gState only */
AnnaBridge	171:3a7713b1edbc	190	HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge	171:3a7713b1edbc	191	Value is allowed for gState only */
AnnaBridge	171:3a7713b1edbc	192	HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge	171:3a7713b1edbc	193	Value is allowed for RxState only */
AnnaBridge	171:3a7713b1edbc	194	HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge	171:3a7713b1edbc	195	Not to be used for neither gState nor RxState.
AnnaBridge	171:3a7713b1edbc	196	Value is result of combination (Or) between gState and RxState values */
AnnaBridge	171:3a7713b1edbc	197	HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge	171:3a7713b1edbc	198	Value is allowed for gState only */
AnnaBridge	171:3a7713b1edbc	199	HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge	171:3a7713b1edbc	200	Value is allowed for gState only */
AnnaBridge	171:3a7713b1edbc	201	}HAL_UART_StateTypeDef;
AnnaBridge	171:3a7713b1edbc	202
AnnaBridge	171:3a7713b1edbc	203	/**
AnnaBridge	171:3a7713b1edbc	204	* @brief UART clock sources definition
AnnaBridge	171:3a7713b1edbc	205	*/
AnnaBridge	171:3a7713b1edbc	206	typedef enum
AnnaBridge	171:3a7713b1edbc	207	{
AnnaBridge	171:3a7713b1edbc	208	UART_CLOCKSOURCE_PCLK1 = 0x00U, /!< PCLK1 clock source /
AnnaBridge	171:3a7713b1edbc	209	UART_CLOCKSOURCE_PCLK2 = 0x01U, /!< PCLK2 clock source /
AnnaBridge	171:3a7713b1edbc	210	UART_CLOCKSOURCE_HSI = 0x02U, /!< HSI clock source /
AnnaBridge	171:3a7713b1edbc	211	UART_CLOCKSOURCE_SYSCLK = 0x04U, /!< SYSCLK clock source /
AnnaBridge	171:3a7713b1edbc	212	UART_CLOCKSOURCE_LSE = 0x08U, /!< LSE clock source /
AnnaBridge	171:3a7713b1edbc	213	UART_CLOCKSOURCE_UNDEFINED = 0x10U /!< Undefined clock source /
AnnaBridge	171:3a7713b1edbc	214	}UART_ClockSourceTypeDef;
AnnaBridge	171:3a7713b1edbc	215
AnnaBridge	171:3a7713b1edbc	216	/**
AnnaBridge	171:3a7713b1edbc	217	* @brief UART handle Structure definition
AnnaBridge	171:3a7713b1edbc	218	*/
AnnaBridge	171:3a7713b1edbc	219	typedef struct
AnnaBridge	171:3a7713b1edbc	220	{
AnnaBridge	171:3a7713b1edbc	221	USART_TypeDef Instance; /!< UART registers base address */
AnnaBridge	171:3a7713b1edbc	222
AnnaBridge	171:3a7713b1edbc	223	UART_InitTypeDef Init; /!< UART communication parameters /
AnnaBridge	171:3a7713b1edbc	224
AnnaBridge	171:3a7713b1edbc	225	UART_AdvFeatureInitTypeDef AdvancedInit; /!< UART Advanced Features initialization parameters /
AnnaBridge	171:3a7713b1edbc	226
AnnaBridge	171:3a7713b1edbc	227	uint8_t pTxBuffPtr; /!< Pointer to UART Tx transfer Buffer */
AnnaBridge	171:3a7713b1edbc	228
AnnaBridge	171:3a7713b1edbc	229	uint16_t TxXferSize; /!< UART Tx Transfer size /
AnnaBridge	171:3a7713b1edbc	230
AnnaBridge	171:3a7713b1edbc	231	__IO uint16_t TxXferCount; /!< UART Tx Transfer Counter /
AnnaBridge	171:3a7713b1edbc	232
AnnaBridge	171:3a7713b1edbc	233	uint8_t pRxBuffPtr; /!< Pointer to UART Rx transfer Buffer */
AnnaBridge	171:3a7713b1edbc	234
AnnaBridge	171:3a7713b1edbc	235	uint16_t RxXferSize; /!< UART Rx Transfer size /
AnnaBridge	171:3a7713b1edbc	236
AnnaBridge	171:3a7713b1edbc	237	__IO uint16_t RxXferCount; /!< UART Rx Transfer Counter /
AnnaBridge	171:3a7713b1edbc	238
AnnaBridge	171:3a7713b1edbc	239	uint16_t Mask; /!< UART Rx RDR register mask /
AnnaBridge	171:3a7713b1edbc	240
AnnaBridge	171:3a7713b1edbc	241	DMA_HandleTypeDef hdmatx; /!< UART Tx DMA Handle parameters */
AnnaBridge	171:3a7713b1edbc	242
AnnaBridge	171:3a7713b1edbc	243	DMA_HandleTypeDef hdmarx; /!< UART Rx DMA Handle parameters */
AnnaBridge	171:3a7713b1edbc	244
AnnaBridge	171:3a7713b1edbc	245	HAL_LockTypeDef Lock; /!< Locking object /
AnnaBridge	171:3a7713b1edbc	246
AnnaBridge	171:3a7713b1edbc	247	__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge	171:3a7713b1edbc	248	and also related to Tx operations.
AnnaBridge	171:3a7713b1edbc	249	This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge	171:3a7713b1edbc	250
AnnaBridge	171:3a7713b1edbc	251	__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge	171:3a7713b1edbc	252	This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge	171:3a7713b1edbc	253
AnnaBridge	171:3a7713b1edbc	254	__IO uint32_t ErrorCode; /!< UART Error code /
AnnaBridge	171:3a7713b1edbc	255
AnnaBridge	171:3a7713b1edbc	256	}UART_HandleTypeDef;
AnnaBridge	171:3a7713b1edbc	257
AnnaBridge	171:3a7713b1edbc	258	/**
AnnaBridge	171:3a7713b1edbc	259	* @}
AnnaBridge	171:3a7713b1edbc	260	*/
AnnaBridge	171:3a7713b1edbc	261
AnnaBridge	171:3a7713b1edbc	262	/* Exported constants --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	263	/** @defgroup UART_Exported_Constants UART Exported Constants
AnnaBridge	171:3a7713b1edbc	264	* @{
AnnaBridge	171:3a7713b1edbc	265	*/
AnnaBridge	171:3a7713b1edbc	266	/** @defgroup UART_Error_Definition UART Error Definition
AnnaBridge	171:3a7713b1edbc	267	* @{
AnnaBridge	171:3a7713b1edbc	268	*/
AnnaBridge	171:3a7713b1edbc	269	#define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /!< No error /
AnnaBridge	171:3a7713b1edbc	270	#define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /!< Parity error /
AnnaBridge	171:3a7713b1edbc	271	#define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /!< Noise error /
AnnaBridge	171:3a7713b1edbc	272	#define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /!< frame error /
AnnaBridge	171:3a7713b1edbc	273	#define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /!< Overrun error /
AnnaBridge	171:3a7713b1edbc	274	#define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /!< DMA transfer error /
AnnaBridge	171:3a7713b1edbc	275	/**
AnnaBridge	171:3a7713b1edbc	276	* @}
AnnaBridge	171:3a7713b1edbc	277	*/
AnnaBridge	171:3a7713b1edbc	278	/** @defgroup UART_Stop_Bits UART Number of Stop Bits
AnnaBridge	171:3a7713b1edbc	279	* @{
AnnaBridge	171:3a7713b1edbc	280	*/
AnnaBridge	171:3a7713b1edbc	281	#define UART_STOPBITS_1 ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	282	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
AnnaBridge	171:3a7713b1edbc	283	/**
AnnaBridge	171:3a7713b1edbc	284	* @}
AnnaBridge	171:3a7713b1edbc	285	*/
AnnaBridge	171:3a7713b1edbc	286
AnnaBridge	171:3a7713b1edbc	287	/** @defgroup UART_Parity UART Parity
AnnaBridge	171:3a7713b1edbc	288	* @{
AnnaBridge	171:3a7713b1edbc	289	*/
AnnaBridge	171:3a7713b1edbc	290	#define UART_PARITY_NONE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	291	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
AnnaBridge	171:3a7713b1edbc	292	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS))
AnnaBridge	171:3a7713b1edbc	293	/**
AnnaBridge	171:3a7713b1edbc	294	* @}
AnnaBridge	171:3a7713b1edbc	295	*/
AnnaBridge	171:3a7713b1edbc	296
AnnaBridge	171:3a7713b1edbc	297	/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
AnnaBridge	171:3a7713b1edbc	298	* @{
AnnaBridge	171:3a7713b1edbc	299	*/
AnnaBridge	171:3a7713b1edbc	300	#define UART_HWCONTROL_NONE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	301	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
AnnaBridge	171:3a7713b1edbc	302	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
AnnaBridge	171:3a7713b1edbc	303	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE))
AnnaBridge	171:3a7713b1edbc	304	/**
AnnaBridge	171:3a7713b1edbc	305	* @}
AnnaBridge	171:3a7713b1edbc	306	*/
AnnaBridge	171:3a7713b1edbc	307
AnnaBridge	171:3a7713b1edbc	308	/** @defgroup UART_Mode UART Transfer Mode
AnnaBridge	171:3a7713b1edbc	309	* @{
AnnaBridge	171:3a7713b1edbc	310	*/
AnnaBridge	171:3a7713b1edbc	311	#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
AnnaBridge	171:3a7713b1edbc	312	#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
AnnaBridge	171:3a7713b1edbc	313	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE))
AnnaBridge	171:3a7713b1edbc	314	/**
AnnaBridge	171:3a7713b1edbc	315	* @}
AnnaBridge	171:3a7713b1edbc	316	*/
AnnaBridge	171:3a7713b1edbc	317
AnnaBridge	171:3a7713b1edbc	318	/** @defgroup UART_State UART State
AnnaBridge	171:3a7713b1edbc	319	* @{
AnnaBridge	171:3a7713b1edbc	320	*/
AnnaBridge	171:3a7713b1edbc	321	#define UART_STATE_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	322	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
AnnaBridge	171:3a7713b1edbc	323	/**
AnnaBridge	171:3a7713b1edbc	324	* @}
AnnaBridge	171:3a7713b1edbc	325	*/
AnnaBridge	171:3a7713b1edbc	326
AnnaBridge	171:3a7713b1edbc	327	/** @defgroup UART_Over_Sampling UART Over Sampling
AnnaBridge	171:3a7713b1edbc	328	* @{
AnnaBridge	171:3a7713b1edbc	329	*/
AnnaBridge	171:3a7713b1edbc	330	#define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	331	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
AnnaBridge	171:3a7713b1edbc	332	/**
AnnaBridge	171:3a7713b1edbc	333	* @}
AnnaBridge	171:3a7713b1edbc	334	*/
AnnaBridge	171:3a7713b1edbc	335
AnnaBridge	171:3a7713b1edbc	336	/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
AnnaBridge	171:3a7713b1edbc	337	* @{
AnnaBridge	171:3a7713b1edbc	338	*/
AnnaBridge	171:3a7713b1edbc	339	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	340	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
AnnaBridge	171:3a7713b1edbc	341	/**
AnnaBridge	171:3a7713b1edbc	342	* @}
AnnaBridge	171:3a7713b1edbc	343	*/
AnnaBridge	171:3a7713b1edbc	344
AnnaBridge	171:3a7713b1edbc	345	/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
AnnaBridge	171:3a7713b1edbc	346	* @{
AnnaBridge	171:3a7713b1edbc	347	*/
AnnaBridge	171:3a7713b1edbc	348	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000U)
AnnaBridge	171:3a7713b1edbc	349	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
AnnaBridge	171:3a7713b1edbc	350	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
AnnaBridge	171:3a7713b1edbc	351	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
AnnaBridge	171:3a7713b1edbc	352	/**
AnnaBridge	171:3a7713b1edbc	353	* @}
AnnaBridge	171:3a7713b1edbc	354	*/
AnnaBridge	171:3a7713b1edbc	355
AnnaBridge	171:3a7713b1edbc	356	/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
AnnaBridge	171:3a7713b1edbc	357	* @{
AnnaBridge	171:3a7713b1edbc	358	*/
AnnaBridge	171:3a7713b1edbc	359	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	360	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
AnnaBridge	171:3a7713b1edbc	361	/**
AnnaBridge	171:3a7713b1edbc	362	* @}
AnnaBridge	171:3a7713b1edbc	363	*/
AnnaBridge	171:3a7713b1edbc	364
AnnaBridge	171:3a7713b1edbc	365	/** @defgroup UART_LIN UART Local Interconnection Network mode
AnnaBridge	171:3a7713b1edbc	366	* @{
AnnaBridge	171:3a7713b1edbc	367	*/
AnnaBridge	171:3a7713b1edbc	368	#define UART_LIN_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	369	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
AnnaBridge	171:3a7713b1edbc	370	/**
AnnaBridge	171:3a7713b1edbc	371	* @}
AnnaBridge	171:3a7713b1edbc	372	*/
AnnaBridge	171:3a7713b1edbc	373
AnnaBridge	171:3a7713b1edbc	374	/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
AnnaBridge	171:3a7713b1edbc	375	* @{
AnnaBridge	171:3a7713b1edbc	376	*/
AnnaBridge	171:3a7713b1edbc	377	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	378	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
AnnaBridge	171:3a7713b1edbc	379	/**
AnnaBridge	171:3a7713b1edbc	380	* @}
AnnaBridge	171:3a7713b1edbc	381	*/
AnnaBridge	171:3a7713b1edbc	382
AnnaBridge	171:3a7713b1edbc	383	/** @defgroup UART_DMA_Tx UART DMA Tx
AnnaBridge	171:3a7713b1edbc	384	* @{
AnnaBridge	171:3a7713b1edbc	385	*/
AnnaBridge	171:3a7713b1edbc	386	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	387	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
AnnaBridge	171:3a7713b1edbc	388	/**
AnnaBridge	171:3a7713b1edbc	389	* @}
AnnaBridge	171:3a7713b1edbc	390	*/
AnnaBridge	171:3a7713b1edbc	391
AnnaBridge	171:3a7713b1edbc	392	/** @defgroup UART_DMA_Rx UART DMA Rx
AnnaBridge	171:3a7713b1edbc	393	* @{
AnnaBridge	171:3a7713b1edbc	394	*/
AnnaBridge	171:3a7713b1edbc	395	#define UART_DMA_RX_DISABLE ((uint32_t)0x0000U)
AnnaBridge	171:3a7713b1edbc	396	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
AnnaBridge	171:3a7713b1edbc	397	/**
AnnaBridge	171:3a7713b1edbc	398	* @}
AnnaBridge	171:3a7713b1edbc	399	*/
AnnaBridge	171:3a7713b1edbc	400
AnnaBridge	171:3a7713b1edbc	401	/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
AnnaBridge	171:3a7713b1edbc	402	* @{
AnnaBridge	171:3a7713b1edbc	403	*/
AnnaBridge	171:3a7713b1edbc	404	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000U)
AnnaBridge	171:3a7713b1edbc	405	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
AnnaBridge	171:3a7713b1edbc	406	/**
AnnaBridge	171:3a7713b1edbc	407	* @}
AnnaBridge	171:3a7713b1edbc	408	*/
AnnaBridge	171:3a7713b1edbc	409
AnnaBridge	171:3a7713b1edbc	410	/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
AnnaBridge	171:3a7713b1edbc	411	* @{
AnnaBridge	171:3a7713b1edbc	412	*/
AnnaBridge	171:3a7713b1edbc	413	#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	414	#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
AnnaBridge	171:3a7713b1edbc	415	/**
AnnaBridge	171:3a7713b1edbc	416	* @}
AnnaBridge	171:3a7713b1edbc	417	*/
AnnaBridge	171:3a7713b1edbc	418
AnnaBridge	171:3a7713b1edbc	419	/** @defgroup UART_Request_Parameters UART Request Parameters
AnnaBridge	171:3a7713b1edbc	420	* @{
AnnaBridge	171:3a7713b1edbc	421	*/
AnnaBridge	171:3a7713b1edbc	422	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
AnnaBridge	171:3a7713b1edbc	423	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
AnnaBridge	171:3a7713b1edbc	424	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
AnnaBridge	171:3a7713b1edbc	425	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
AnnaBridge	171:3a7713b1edbc	426	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
AnnaBridge	171:3a7713b1edbc	427	/**
AnnaBridge	171:3a7713b1edbc	428	* @}
AnnaBridge	171:3a7713b1edbc	429	*/
AnnaBridge	171:3a7713b1edbc	430
AnnaBridge	171:3a7713b1edbc	431	/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
AnnaBridge	171:3a7713b1edbc	432	* @{
AnnaBridge	171:3a7713b1edbc	433	*/
AnnaBridge	171:3a7713b1edbc	434	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	435	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001U)
AnnaBridge	171:3a7713b1edbc	436	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002U)
AnnaBridge	171:3a7713b1edbc	437	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004U)
AnnaBridge	171:3a7713b1edbc	438	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008U)
AnnaBridge	171:3a7713b1edbc	439	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010U)
AnnaBridge	171:3a7713b1edbc	440	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020U)
AnnaBridge	171:3a7713b1edbc	441	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040U)
AnnaBridge	171:3a7713b1edbc	442	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080U)
AnnaBridge	171:3a7713b1edbc	443	/**
AnnaBridge	171:3a7713b1edbc	444	* @}
AnnaBridge	171:3a7713b1edbc	445	*/
AnnaBridge	171:3a7713b1edbc	446
AnnaBridge	171:3a7713b1edbc	447	/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
AnnaBridge	171:3a7713b1edbc	448	* @{
AnnaBridge	171:3a7713b1edbc	449	*/
AnnaBridge	171:3a7713b1edbc	450	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	451	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
AnnaBridge	171:3a7713b1edbc	452	/**
AnnaBridge	171:3a7713b1edbc	453	* @}
AnnaBridge	171:3a7713b1edbc	454	*/
AnnaBridge	171:3a7713b1edbc	455
AnnaBridge	171:3a7713b1edbc	456	/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
AnnaBridge	171:3a7713b1edbc	457	* @{
AnnaBridge	171:3a7713b1edbc	458	*/
AnnaBridge	171:3a7713b1edbc	459	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	460	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
AnnaBridge	171:3a7713b1edbc	461	/**
AnnaBridge	171:3a7713b1edbc	462	* @}
AnnaBridge	171:3a7713b1edbc	463	*/
AnnaBridge	171:3a7713b1edbc	464
AnnaBridge	171:3a7713b1edbc	465	/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
AnnaBridge	171:3a7713b1edbc	466	* @{
AnnaBridge	171:3a7713b1edbc	467	*/
AnnaBridge	171:3a7713b1edbc	468	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	469	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
AnnaBridge	171:3a7713b1edbc	470	/**
AnnaBridge	171:3a7713b1edbc	471	* @}
AnnaBridge	171:3a7713b1edbc	472	*/
AnnaBridge	171:3a7713b1edbc	473
AnnaBridge	171:3a7713b1edbc	474	/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
AnnaBridge	171:3a7713b1edbc	475	* @{
AnnaBridge	171:3a7713b1edbc	476	*/
AnnaBridge	171:3a7713b1edbc	477	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	478	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
AnnaBridge	171:3a7713b1edbc	479	/**
AnnaBridge	171:3a7713b1edbc	480	* @}
AnnaBridge	171:3a7713b1edbc	481	*/
AnnaBridge	171:3a7713b1edbc	482
AnnaBridge	171:3a7713b1edbc	483	/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
AnnaBridge	171:3a7713b1edbc	484	* @{
AnnaBridge	171:3a7713b1edbc	485	*/
AnnaBridge	171:3a7713b1edbc	486	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	487	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
AnnaBridge	171:3a7713b1edbc	488	/**
AnnaBridge	171:3a7713b1edbc	489	* @}
AnnaBridge	171:3a7713b1edbc	490	*/
AnnaBridge	171:3a7713b1edbc	491
AnnaBridge	171:3a7713b1edbc	492	/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
AnnaBridge	171:3a7713b1edbc	493	* @{
AnnaBridge	171:3a7713b1edbc	494	*/
AnnaBridge	171:3a7713b1edbc	495	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	496	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
AnnaBridge	171:3a7713b1edbc	497	/**
AnnaBridge	171:3a7713b1edbc	498	* @}
AnnaBridge	171:3a7713b1edbc	499	*/
AnnaBridge	171:3a7713b1edbc	500
AnnaBridge	171:3a7713b1edbc	501	/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
AnnaBridge	171:3a7713b1edbc	502	* @{
AnnaBridge	171:3a7713b1edbc	503	*/
AnnaBridge	171:3a7713b1edbc	504	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	505	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
AnnaBridge	171:3a7713b1edbc	506	/**
AnnaBridge	171:3a7713b1edbc	507	* @}
AnnaBridge	171:3a7713b1edbc	508	*/
AnnaBridge	171:3a7713b1edbc	509
AnnaBridge	171:3a7713b1edbc	510	/** @defgroup UART_MSB_First UART Advanced Feature MSB First
AnnaBridge	171:3a7713b1edbc	511	* @{
AnnaBridge	171:3a7713b1edbc	512	*/
AnnaBridge	171:3a7713b1edbc	513	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	514	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
AnnaBridge	171:3a7713b1edbc	515	/**
AnnaBridge	171:3a7713b1edbc	516	* @}
AnnaBridge	171:3a7713b1edbc	517	*/
AnnaBridge	171:3a7713b1edbc	518
AnnaBridge	171:3a7713b1edbc	519	/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
AnnaBridge	171:3a7713b1edbc	520	* @{
AnnaBridge	171:3a7713b1edbc	521	*/
AnnaBridge	171:3a7713b1edbc	522	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	523	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
AnnaBridge	171:3a7713b1edbc	524	/**
AnnaBridge	171:3a7713b1edbc	525	* @}
AnnaBridge	171:3a7713b1edbc	526	*/
AnnaBridge	171:3a7713b1edbc	527
AnnaBridge	171:3a7713b1edbc	528	/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
AnnaBridge	171:3a7713b1edbc	529	* @{
AnnaBridge	171:3a7713b1edbc	530	*/
AnnaBridge	171:3a7713b1edbc	531	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24U)
AnnaBridge	171:3a7713b1edbc	532	/**
AnnaBridge	171:3a7713b1edbc	533	* @}
AnnaBridge	171:3a7713b1edbc	534	*/
AnnaBridge	171:3a7713b1edbc	535
AnnaBridge	171:3a7713b1edbc	536	/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
AnnaBridge	171:3a7713b1edbc	537	* @{
AnnaBridge	171:3a7713b1edbc	538	*/
AnnaBridge	171:3a7713b1edbc	539	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000U)
AnnaBridge	171:3a7713b1edbc	540	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
AnnaBridge	171:3a7713b1edbc	541	/**
AnnaBridge	171:3a7713b1edbc	542	* @}
AnnaBridge	171:3a7713b1edbc	543	*/
AnnaBridge	171:3a7713b1edbc	544
AnnaBridge	171:3a7713b1edbc	545	/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
AnnaBridge	171:3a7713b1edbc	546	* @{
AnnaBridge	171:3a7713b1edbc	547	*/
AnnaBridge	171:3a7713b1edbc	548	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21U)
AnnaBridge	171:3a7713b1edbc	549	/**
AnnaBridge	171:3a7713b1edbc	550	* @}
AnnaBridge	171:3a7713b1edbc	551	*/
AnnaBridge	171:3a7713b1edbc	552
AnnaBridge	171:3a7713b1edbc	553	/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
AnnaBridge	171:3a7713b1edbc	554	* @{
AnnaBridge	171:3a7713b1edbc	555	*/
AnnaBridge	171:3a7713b1edbc	556	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16U)
AnnaBridge	171:3a7713b1edbc	557	/**
AnnaBridge	171:3a7713b1edbc	558	* @}
AnnaBridge	171:3a7713b1edbc	559	*/
AnnaBridge	171:3a7713b1edbc	560
AnnaBridge	171:3a7713b1edbc	561	/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
AnnaBridge	171:3a7713b1edbc	562	* @{
AnnaBridge	171:3a7713b1edbc	563	*/
AnnaBridge	171:3a7713b1edbc	564	#define UART_IT_MASK ((uint32_t)0x001FU)
AnnaBridge	171:3a7713b1edbc	565	/**
AnnaBridge	171:3a7713b1edbc	566	* @}
AnnaBridge	171:3a7713b1edbc	567	*/
AnnaBridge	171:3a7713b1edbc	568
AnnaBridge	171:3a7713b1edbc	569	/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
AnnaBridge	171:3a7713b1edbc	570	* @{
AnnaBridge	171:3a7713b1edbc	571	*/
AnnaBridge	171:3a7713b1edbc	572	#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU
AnnaBridge	171:3a7713b1edbc	573	/**
AnnaBridge	171:3a7713b1edbc	574	* @}
AnnaBridge	171:3a7713b1edbc	575	*/
AnnaBridge	171:3a7713b1edbc	576
AnnaBridge	171:3a7713b1edbc	577	/** @defgroup UART_Flags UART Status Flags
AnnaBridge	171:3a7713b1edbc	578	* Elements values convention: 0xXXXX
AnnaBridge	171:3a7713b1edbc	579	* - 0xXXXX : Flag mask in the ISR register
AnnaBridge	171:3a7713b1edbc	580	* @{
AnnaBridge	171:3a7713b1edbc	581	*/
AnnaBridge	171:3a7713b1edbc	582	#define UART_FLAG_TEACK ((uint32_t)0x00200000U)
AnnaBridge	171:3a7713b1edbc	583	#define UART_FLAG_SBKF ((uint32_t)0x00040000U)
AnnaBridge	171:3a7713b1edbc	584	#define UART_FLAG_CMF ((uint32_t)0x00020000U)
AnnaBridge	171:3a7713b1edbc	585	#define UART_FLAG_BUSY ((uint32_t)0x00010000U)
AnnaBridge	171:3a7713b1edbc	586	#define UART_FLAG_ABRF ((uint32_t)0x00008000U)
AnnaBridge	171:3a7713b1edbc	587	#define UART_FLAG_ABRE ((uint32_t)0x00004000U)
AnnaBridge	171:3a7713b1edbc	588	#define UART_FLAG_EOBF ((uint32_t)0x00001000U)
AnnaBridge	171:3a7713b1edbc	589	#define UART_FLAG_RTOF ((uint32_t)0x00000800U)
AnnaBridge	171:3a7713b1edbc	590	#define UART_FLAG_CTS ((uint32_t)0x00000400U)
AnnaBridge	171:3a7713b1edbc	591	#define UART_FLAG_CTSIF ((uint32_t)0x00000200U)
AnnaBridge	171:3a7713b1edbc	592	#define UART_FLAG_LBDF ((uint32_t)0x00000100U)
AnnaBridge	171:3a7713b1edbc	593	#define UART_FLAG_TXE ((uint32_t)0x00000080U)
AnnaBridge	171:3a7713b1edbc	594	#define UART_FLAG_TC ((uint32_t)0x00000040U)
AnnaBridge	171:3a7713b1edbc	595	#define UART_FLAG_RXNE ((uint32_t)0x00000020U)
AnnaBridge	171:3a7713b1edbc	596	#define UART_FLAG_IDLE ((uint32_t)0x00000010U)
AnnaBridge	171:3a7713b1edbc	597	#define UART_FLAG_ORE ((uint32_t)0x00000008U)
AnnaBridge	171:3a7713b1edbc	598	#define UART_FLAG_NE ((uint32_t)0x00000004U)
AnnaBridge	171:3a7713b1edbc	599	#define UART_FLAG_FE ((uint32_t)0x00000002U)
AnnaBridge	171:3a7713b1edbc	600	#define UART_FLAG_PE ((uint32_t)0x00000001U)
AnnaBridge	171:3a7713b1edbc	601	/**
AnnaBridge	171:3a7713b1edbc	602	* @}
AnnaBridge	171:3a7713b1edbc	603	*/
AnnaBridge	171:3a7713b1edbc	604
AnnaBridge	171:3a7713b1edbc	605	/** @defgroup UART_Interrupt_definition UART Interrupts Definition
AnnaBridge	171:3a7713b1edbc	606	* Elements values convention: 0000ZZZZ0XXYYYYYb
AnnaBridge	171:3a7713b1edbc	607	* - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge	171:3a7713b1edbc	608	* - XX : Interrupt source register (2bits)
AnnaBridge	171:3a7713b1edbc	609	* - 01: CR1 register
AnnaBridge	171:3a7713b1edbc	610	* - 10: CR2 register
AnnaBridge	171:3a7713b1edbc	611	* - 11: CR3 register
AnnaBridge	171:3a7713b1edbc	612	* - ZZZZ : Flag position in the ISR register(4bits)
AnnaBridge	171:3a7713b1edbc	613	* @{
AnnaBridge	171:3a7713b1edbc	614	*/
AnnaBridge	171:3a7713b1edbc	615	#define UART_IT_PE ((uint32_t)0x0028U)
AnnaBridge	171:3a7713b1edbc	616	#define UART_IT_TXE ((uint32_t)0x0727U)
AnnaBridge	171:3a7713b1edbc	617	#define UART_IT_TC ((uint32_t)0x0626U)
AnnaBridge	171:3a7713b1edbc	618	#define UART_IT_RXNE ((uint32_t)0x0525U)
AnnaBridge	171:3a7713b1edbc	619	#define UART_IT_IDLE ((uint32_t)0x0424U)
AnnaBridge	171:3a7713b1edbc	620	#define UART_IT_LBD ((uint32_t)0x0846U)
AnnaBridge	171:3a7713b1edbc	621	#define UART_IT_CTS ((uint32_t)0x096AU)
AnnaBridge	171:3a7713b1edbc	622	#define UART_IT_CM ((uint32_t)0x112EU)
AnnaBridge	171:3a7713b1edbc	623
AnnaBridge	171:3a7713b1edbc	624	/** Elements values convention: 000000000XXYYYYYb
AnnaBridge	171:3a7713b1edbc	625	* - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge	171:3a7713b1edbc	626	* - XX : Interrupt source register (2bits)
AnnaBridge	171:3a7713b1edbc	627	* - 01: CR1 register
AnnaBridge	171:3a7713b1edbc	628	* - 10: CR2 register
AnnaBridge	171:3a7713b1edbc	629	* - 11: CR3 register
AnnaBridge	171:3a7713b1edbc	630	*/
AnnaBridge	171:3a7713b1edbc	631	#define UART_IT_ERR ((uint32_t)0x0060U)
AnnaBridge	171:3a7713b1edbc	632
AnnaBridge	171:3a7713b1edbc	633	/** Elements values convention: 0000ZZZZ00000000b
AnnaBridge	171:3a7713b1edbc	634	* - ZZZZ : Flag position in the ISR register(4bits)
AnnaBridge	171:3a7713b1edbc	635	*/
AnnaBridge	171:3a7713b1edbc	636	#define UART_IT_ORE ((uint32_t)0x0300U)
AnnaBridge	171:3a7713b1edbc	637	#define UART_IT_NE ((uint32_t)0x0200U)
AnnaBridge	171:3a7713b1edbc	638	#define UART_IT_FE ((uint32_t)0x0100U)
AnnaBridge	171:3a7713b1edbc	639	/**
AnnaBridge	171:3a7713b1edbc	640	* @}
AnnaBridge	171:3a7713b1edbc	641	*/
AnnaBridge	171:3a7713b1edbc	642
AnnaBridge	171:3a7713b1edbc	643	/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
AnnaBridge	171:3a7713b1edbc	644	* @{
AnnaBridge	171:3a7713b1edbc	645	*/
AnnaBridge	171:3a7713b1edbc	646	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	647	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	648	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
AnnaBridge	171:3a7713b1edbc	649	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	650	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
AnnaBridge	171:3a7713b1edbc	651	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
AnnaBridge	171:3a7713b1edbc	652	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
AnnaBridge	171:3a7713b1edbc	653	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
AnnaBridge	171:3a7713b1edbc	654	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
AnnaBridge	171:3a7713b1edbc	655	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
AnnaBridge	171:3a7713b1edbc	656	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
AnnaBridge	171:3a7713b1edbc	657	/**
AnnaBridge	171:3a7713b1edbc	658	* @}
AnnaBridge	171:3a7713b1edbc	659	*/
AnnaBridge	171:3a7713b1edbc	660
AnnaBridge	171:3a7713b1edbc	661
AnnaBridge	171:3a7713b1edbc	662	/**
AnnaBridge	171:3a7713b1edbc	663	* @}
AnnaBridge	171:3a7713b1edbc	664	*/
AnnaBridge	171:3a7713b1edbc	665
AnnaBridge	171:3a7713b1edbc	666	/* Exported macros -----------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	667	/** @defgroup UART_Exported_Macros UART Exported Macros
AnnaBridge	171:3a7713b1edbc	668	* @{
AnnaBridge	171:3a7713b1edbc	669	*/
AnnaBridge	171:3a7713b1edbc	670
AnnaBridge	171:3a7713b1edbc	671	/** @brief Reset UART handle state
AnnaBridge	171:3a7713b1edbc	672	* @param __HANDLE__ UART handle.
AnnaBridge	171:3a7713b1edbc	673	* @retval None
AnnaBridge	171:3a7713b1edbc	674	*/
AnnaBridge	171:3a7713b1edbc	675	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge	171:3a7713b1edbc	676	(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge	171:3a7713b1edbc	677	(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge	171:3a7713b1edbc	678	} while(0)
AnnaBridge	171:3a7713b1edbc	679
AnnaBridge	171:3a7713b1edbc	680	/** @brief Flush the UART Data registers
AnnaBridge	171:3a7713b1edbc	681	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	682	*/
AnnaBridge	171:3a7713b1edbc	683	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	684	do{ \
AnnaBridge	171:3a7713b1edbc	685	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
AnnaBridge	171:3a7713b1edbc	686	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
AnnaBridge	171:3a7713b1edbc	687	} while(0)
AnnaBridge	171:3a7713b1edbc	688
AnnaBridge	171:3a7713b1edbc	689	/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
AnnaBridge	171:3a7713b1edbc	690	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	691	* @param __FLAG__ specifies the interrupt clear register flag that needs to be set
AnnaBridge	171:3a7713b1edbc	692	* to clear the corresponding interrupt
AnnaBridge	171:3a7713b1edbc	693	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	694	* @arg UART_CLEAR_PEF: Parity Error Clear Flag
AnnaBridge	171:3a7713b1edbc	695	* @arg UART_CLEAR_FEF: Framing Error Clear Flag
AnnaBridge	171:3a7713b1edbc	696	* @arg UART_CLEAR_NEF: Noise detected Clear Flag
AnnaBridge	171:3a7713b1edbc	697	* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
AnnaBridge	171:3a7713b1edbc	698	* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
AnnaBridge	171:3a7713b1edbc	699	* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
AnnaBridge	171:3a7713b1edbc	700	* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
AnnaBridge	171:3a7713b1edbc	701	* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
AnnaBridge	171:3a7713b1edbc	702	* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
AnnaBridge	171:3a7713b1edbc	703	* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
AnnaBridge	171:3a7713b1edbc	704	* @arg UART_CLEAR_CMF: Character Match Clear Flag
AnnaBridge	171:3a7713b1edbc	705	* @retval None
AnnaBridge	171:3a7713b1edbc	706	*/
AnnaBridge	171:3a7713b1edbc	707	#define __HAL_UART_CLEAR_IT(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__FLAG__))
AnnaBridge	171:3a7713b1edbc	708
AnnaBridge	171:3a7713b1edbc	709	/** @brief Clear the UART PE pending flag.
AnnaBridge	171:3a7713b1edbc	710	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	711	* @retval None
AnnaBridge	171:3a7713b1edbc	712	*/
AnnaBridge	171:3a7713b1edbc	713	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_PEF)
AnnaBridge	171:3a7713b1edbc	714
AnnaBridge	171:3a7713b1edbc	715	/** @brief Clear the UART FE pending flag.
AnnaBridge	171:3a7713b1edbc	716	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	717	* @retval None
AnnaBridge	171:3a7713b1edbc	718	*/
AnnaBridge	171:3a7713b1edbc	719	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_FEF)
AnnaBridge	171:3a7713b1edbc	720
AnnaBridge	171:3a7713b1edbc	721	/** @brief Clear the UART NE pending flag.
AnnaBridge	171:3a7713b1edbc	722	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	723	* @retval None
AnnaBridge	171:3a7713b1edbc	724	*/
AnnaBridge	171:3a7713b1edbc	725	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_NEF)
AnnaBridge	171:3a7713b1edbc	726
AnnaBridge	171:3a7713b1edbc	727	/** @brief Clear the UART ORE pending flag.
AnnaBridge	171:3a7713b1edbc	728	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	729	* @retval None
AnnaBridge	171:3a7713b1edbc	730	*/
AnnaBridge	171:3a7713b1edbc	731	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_OREF)
AnnaBridge	171:3a7713b1edbc	732
AnnaBridge	171:3a7713b1edbc	733	/** @brief Clear the UART IDLE pending flag.
AnnaBridge	171:3a7713b1edbc	734	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	735	* @retval None
AnnaBridge	171:3a7713b1edbc	736	*/
AnnaBridge	171:3a7713b1edbc	737	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_IDLEF)
AnnaBridge	171:3a7713b1edbc	738
AnnaBridge	171:3a7713b1edbc	739	/** @brief Checks whether the specified UART flag is set or not.
AnnaBridge	171:3a7713b1edbc	740	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	741	* @param __FLAG__ specifies the flag to check.
AnnaBridge	171:3a7713b1edbc	742	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	743	* @arg UART_FLAG_REACK: Receive enable acknowledge flag
AnnaBridge	171:3a7713b1edbc	744	* @arg UART_FLAG_TEACK: Transmit enable acknowledge flag
AnnaBridge	171:3a7713b1edbc	745	* @arg UART_FLAG_WUF: Wake up from stop mode flag
AnnaBridge	171:3a7713b1edbc	746	* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
AnnaBridge	171:3a7713b1edbc	747	* @arg UART_FLAG_SBKF: Send Break flag
AnnaBridge	171:3a7713b1edbc	748	* @arg UART_FLAG_CMF: Character match flag
AnnaBridge	171:3a7713b1edbc	749	* @arg UART_FLAG_BUSY: Busy flag
AnnaBridge	171:3a7713b1edbc	750	* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
AnnaBridge	171:3a7713b1edbc	751	* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
AnnaBridge	171:3a7713b1edbc	752	* @arg UART_FLAG_EOBF: End of block flag
AnnaBridge	171:3a7713b1edbc	753	* @arg UART_FLAG_RTOF: Receiver timeout flag
AnnaBridge	171:3a7713b1edbc	754	* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
AnnaBridge	171:3a7713b1edbc	755	* @arg UART_FLAG_LBD: LIN Break detection flag
AnnaBridge	171:3a7713b1edbc	756	* @arg UART_FLAG_TXE: Transmit data register empty flag
AnnaBridge	171:3a7713b1edbc	757	* @arg UART_FLAG_TC: Transmission Complete flag
AnnaBridge	171:3a7713b1edbc	758	* @arg UART_FLAG_RXNE: Receive data register not empty flag
AnnaBridge	171:3a7713b1edbc	759	* @arg UART_FLAG_IDLE: Idle Line detection flag
AnnaBridge	171:3a7713b1edbc	760	* @arg UART_FLAG_ORE: OverRun Error flag
AnnaBridge	171:3a7713b1edbc	761	* @arg UART_FLAG_NE: Noise Error flag
AnnaBridge	171:3a7713b1edbc	762	* @arg UART_FLAG_FE: Framing Error flag
AnnaBridge	171:3a7713b1edbc	763	* @arg UART_FLAG_PE: Parity Error flag
AnnaBridge	171:3a7713b1edbc	764	* @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	765	*/
AnnaBridge	171:3a7713b1edbc	766	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
AnnaBridge	171:3a7713b1edbc	767
AnnaBridge	171:3a7713b1edbc	768	/** @brief Enables the specified UART interrupt.
AnnaBridge	171:3a7713b1edbc	769	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	770	* @param __INTERRUPT__ specifies the UART interrupt source to enable.
AnnaBridge	171:3a7713b1edbc	771	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	772	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
AnnaBridge	171:3a7713b1edbc	773	* @arg UART_IT_CM: Character match interrupt
AnnaBridge	171:3a7713b1edbc	774	* @arg UART_IT_CTS: CTS change interrupt
AnnaBridge	171:3a7713b1edbc	775	* @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge	171:3a7713b1edbc	776	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge	171:3a7713b1edbc	777	* @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge	171:3a7713b1edbc	778	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge	171:3a7713b1edbc	779	* @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge	171:3a7713b1edbc	780	* @arg UART_IT_PE: Parity Error interrupt
AnnaBridge	171:3a7713b1edbc	781	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge	171:3a7713b1edbc	782	* @retval None
AnnaBridge	171:3a7713b1edbc	783	*/
AnnaBridge	171:3a7713b1edbc	784	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	171:3a7713b1edbc	785	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	171:3a7713b1edbc	786	((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge	171:3a7713b1edbc	787
AnnaBridge	171:3a7713b1edbc	788
AnnaBridge	171:3a7713b1edbc	789	/** @brief Disables the specified UART interrupt.
AnnaBridge	171:3a7713b1edbc	790	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	791	* @param __INTERRUPT__ specifies the UART interrupt source to disable.
AnnaBridge	171:3a7713b1edbc	792	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	793	* @arg UART_IT_CM: Character match interrupt
AnnaBridge	171:3a7713b1edbc	794	* @arg UART_IT_CTS: CTS change interrupt
AnnaBridge	171:3a7713b1edbc	795	* @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge	171:3a7713b1edbc	796	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge	171:3a7713b1edbc	797	* @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge	171:3a7713b1edbc	798	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge	171:3a7713b1edbc	799	* @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge	171:3a7713b1edbc	800	* @arg UART_IT_PE: Parity Error interrupt
AnnaBridge	171:3a7713b1edbc	801	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge	171:3a7713b1edbc	802	* @retval None
AnnaBridge	171:3a7713b1edbc	803	*/
AnnaBridge	171:3a7713b1edbc	804	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	171:3a7713b1edbc	805	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge	171:3a7713b1edbc	806	((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge	171:3a7713b1edbc	807
AnnaBridge	171:3a7713b1edbc	808	/** @brief Checks whether the specified UART interrupt has occurred or not.
AnnaBridge	171:3a7713b1edbc	809	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	810	* @param __IT__ specifies the UART interrupt to check.
AnnaBridge	171:3a7713b1edbc	811	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	812	* @arg UART_IT_CM: Character match interrupt
AnnaBridge	171:3a7713b1edbc	813	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
AnnaBridge	171:3a7713b1edbc	814	* @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge	171:3a7713b1edbc	815	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge	171:3a7713b1edbc	816	* @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge	171:3a7713b1edbc	817	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge	171:3a7713b1edbc	818	* @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge	171:3a7713b1edbc	819	* @arg UART_IT_ORE: OverRun Error interrupt
AnnaBridge	171:3a7713b1edbc	820	* @arg UART_IT_NE: Noise Error interrupt
AnnaBridge	171:3a7713b1edbc	821	* @arg UART_IT_FE: Framing Error interrupt
AnnaBridge	171:3a7713b1edbc	822	* @arg UART_IT_PE: Parity Error interrupt
AnnaBridge	171:3a7713b1edbc	823	* @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	824	*/
AnnaBridge	171:3a7713b1edbc	825	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
AnnaBridge	171:3a7713b1edbc	826
AnnaBridge	171:3a7713b1edbc	827	/** @brief Checks whether the specified UART interrupt source is enabled.
AnnaBridge	171:3a7713b1edbc	828	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	829	* @param __IT__ specifies the UART interrupt source to check.
AnnaBridge	171:3a7713b1edbc	830	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	831	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
AnnaBridge	171:3a7713b1edbc	832	* @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge	171:3a7713b1edbc	833	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge	171:3a7713b1edbc	834	* @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge	171:3a7713b1edbc	835	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge	171:3a7713b1edbc	836	* @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge	171:3a7713b1edbc	837	* @arg UART_IT_ORE: OverRun Error interrupt
AnnaBridge	171:3a7713b1edbc	838	* @arg UART_IT_NE: Noise Error interrupt
AnnaBridge	171:3a7713b1edbc	839	* @arg UART_IT_FE: Framing Error interrupt
AnnaBridge	171:3a7713b1edbc	840	* @arg UART_IT_PE: Parity Error interrupt
AnnaBridge	171:3a7713b1edbc	841	* @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	842	*/
AnnaBridge	171:3a7713b1edbc	843	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \
AnnaBridge	171:3a7713b1edbc	844	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
AnnaBridge	171:3a7713b1edbc	845
AnnaBridge	171:3a7713b1edbc	846	/** @brief Set a specific UART request flag.
AnnaBridge	171:3a7713b1edbc	847	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	848	* @param __REQ__ specifies the request flag to set
AnnaBridge	171:3a7713b1edbc	849	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	850	* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
AnnaBridge	171:3a7713b1edbc	851	* @arg UART_SENDBREAK_REQUEST: Send Break Request
AnnaBridge	171:3a7713b1edbc	852	* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
AnnaBridge	171:3a7713b1edbc	853	* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
AnnaBridge	171:3a7713b1edbc	854	* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
AnnaBridge	171:3a7713b1edbc	855	* @retval None
AnnaBridge	171:3a7713b1edbc	856	*/
AnnaBridge	171:3a7713b1edbc	857	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
AnnaBridge	171:3a7713b1edbc	858
AnnaBridge	171:3a7713b1edbc	859	/** @brief Enables the UART one bit sample method
AnnaBridge	171:3a7713b1edbc	860	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	861	* @retval None
AnnaBridge	171:3a7713b1edbc	862	*/
AnnaBridge	171:3a7713b1edbc	863	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
AnnaBridge	171:3a7713b1edbc	864
AnnaBridge	171:3a7713b1edbc	865	/** @brief Disables the UART one bit sample method
AnnaBridge	171:3a7713b1edbc	866	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	867	* @retval None
AnnaBridge	171:3a7713b1edbc	868	*/
AnnaBridge	171:3a7713b1edbc	869	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
AnnaBridge	171:3a7713b1edbc	870
AnnaBridge	171:3a7713b1edbc	871	/** @brief Enable UART
AnnaBridge	171:3a7713b1edbc	872	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	873	* @retval None
AnnaBridge	171:3a7713b1edbc	874	*/
AnnaBridge	171:3a7713b1edbc	875	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
AnnaBridge	171:3a7713b1edbc	876
AnnaBridge	171:3a7713b1edbc	877	/** @brief Disable UART
AnnaBridge	171:3a7713b1edbc	878	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	879	* @retval None
AnnaBridge	171:3a7713b1edbc	880	*/
AnnaBridge	171:3a7713b1edbc	881	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge	171:3a7713b1edbc	882
AnnaBridge	171:3a7713b1edbc	883	/** @brief Enable CTS flow control
AnnaBridge	171:3a7713b1edbc	884	* This macro allows to enable CTS hardware flow control for a given UART instance,
AnnaBridge	171:3a7713b1edbc	885	* without need to call HAL_UART_Init() function.
AnnaBridge	171:3a7713b1edbc	886	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	171:3a7713b1edbc	887	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge	171:3a7713b1edbc	888	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	171:3a7713b1edbc	889	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	171:3a7713b1edbc	890	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	171:3a7713b1edbc	891	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	171:3a7713b1edbc	892	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	893	* The Handle Instance can be USART1, USART2 or LPUART.
AnnaBridge	171:3a7713b1edbc	894	* @retval None
AnnaBridge	171:3a7713b1edbc	895	*/
AnnaBridge	171:3a7713b1edbc	896	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	897	do{ \
AnnaBridge	171:3a7713b1edbc	898	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge	171:3a7713b1edbc	899	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
AnnaBridge	171:3a7713b1edbc	900	} while(0)
AnnaBridge	171:3a7713b1edbc	901
AnnaBridge	171:3a7713b1edbc	902	/** @brief Disable CTS flow control
AnnaBridge	171:3a7713b1edbc	903	* This macro allows to disable CTS hardware flow control for a given UART instance,
AnnaBridge	171:3a7713b1edbc	904	* without need to call HAL_UART_Init() function.
AnnaBridge	171:3a7713b1edbc	905	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	171:3a7713b1edbc	906	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge	171:3a7713b1edbc	907	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	171:3a7713b1edbc	908	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	171:3a7713b1edbc	909	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	171:3a7713b1edbc	910	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	171:3a7713b1edbc	911	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	912	* The Handle Instance can be USART1, USART2 or LPUART.
AnnaBridge	171:3a7713b1edbc	913	* @retval None
AnnaBridge	171:3a7713b1edbc	914	*/
AnnaBridge	171:3a7713b1edbc	915	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	916	do{ \
AnnaBridge	171:3a7713b1edbc	917	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge	171:3a7713b1edbc	918	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge	171:3a7713b1edbc	919	} while(0)
AnnaBridge	171:3a7713b1edbc	920
AnnaBridge	171:3a7713b1edbc	921	/** @brief Enable RTS flow control
AnnaBridge	171:3a7713b1edbc	922	* This macro allows to enable RTS hardware flow control for a given UART instance,
AnnaBridge	171:3a7713b1edbc	923	* without need to call HAL_UART_Init() function.
AnnaBridge	171:3a7713b1edbc	924	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	171:3a7713b1edbc	925	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge	171:3a7713b1edbc	926	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	171:3a7713b1edbc	927	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	171:3a7713b1edbc	928	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	171:3a7713b1edbc	929	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	171:3a7713b1edbc	930	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	931	* The Handle Instance can be USART1, USART2 or LPUART.
AnnaBridge	171:3a7713b1edbc	932	* @retval None
AnnaBridge	171:3a7713b1edbc	933	*/
AnnaBridge	171:3a7713b1edbc	934	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	935	do{ \
AnnaBridge	171:3a7713b1edbc	936	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
AnnaBridge	171:3a7713b1edbc	937	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
AnnaBridge	171:3a7713b1edbc	938	} while(0)
AnnaBridge	171:3a7713b1edbc	939
AnnaBridge	171:3a7713b1edbc	940	/** @brief Disable RTS flow control
AnnaBridge	171:3a7713b1edbc	941	* This macro allows to disable RTS hardware flow control for a given UART instance,
AnnaBridge	171:3a7713b1edbc	942	* without need to call HAL_UART_Init() function.
AnnaBridge	171:3a7713b1edbc	943	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge	171:3a7713b1edbc	944	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge	171:3a7713b1edbc	945	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge	171:3a7713b1edbc	946	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge	171:3a7713b1edbc	947	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge	171:3a7713b1edbc	948	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge	171:3a7713b1edbc	949	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	950	* The Handle Instance can be USART1, USART2 or LPUART.
AnnaBridge	171:3a7713b1edbc	951	* @retval None
AnnaBridge	171:3a7713b1edbc	952	*/
AnnaBridge	171:3a7713b1edbc	953	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	954	do{ \
AnnaBridge	171:3a7713b1edbc	955	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
AnnaBridge	171:3a7713b1edbc	956	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge	171:3a7713b1edbc	957	} while(0)
AnnaBridge	171:3a7713b1edbc	958
AnnaBridge	171:3a7713b1edbc	959	/**
AnnaBridge	171:3a7713b1edbc	960	* @}
AnnaBridge	171:3a7713b1edbc	961	*/
AnnaBridge	171:3a7713b1edbc	962
AnnaBridge	171:3a7713b1edbc	963	/* Private macros --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	964	/** @defgroup UART_Private_Macros UART Private Macros
AnnaBridge	171:3a7713b1edbc	965	* @{
AnnaBridge	171:3a7713b1edbc	966	*/
AnnaBridge	171:3a7713b1edbc	967	/** @brief BRR division operation to set BRR register with LPUART
AnnaBridge	171:3a7713b1edbc	968	* @param _PCLK_ LPUART clock
AnnaBridge	171:3a7713b1edbc	969	* @param _BAUD_ Baud rate set by the user
AnnaBridge	171:3a7713b1edbc	970	* @retval Division result
AnnaBridge	171:3a7713b1edbc	971	*/
AnnaBridge	171:3a7713b1edbc	972	#define UART_DIV_LPUART(_PCLK_, _BAUD_) ((((_PCLK_)*256)+((_BAUD_)/2))/((_BAUD_)))
AnnaBridge	171:3a7713b1edbc	973
AnnaBridge	171:3a7713b1edbc	974	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
AnnaBridge	171:3a7713b1edbc	975	* @param _PCLK_ UART clock
AnnaBridge	171:3a7713b1edbc	976	* @param _BAUD_ Baud rate set by the user
AnnaBridge	171:3a7713b1edbc	977	* @retval Division result
AnnaBridge	171:3a7713b1edbc	978	*/
AnnaBridge	171:3a7713b1edbc	979	#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((((_PCLK_)*2)+((_BAUD_)/2))/((_BAUD_)))
AnnaBridge	171:3a7713b1edbc	980
AnnaBridge	171:3a7713b1edbc	981	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
AnnaBridge	171:3a7713b1edbc	982	* @param _PCLK_ UART clock
AnnaBridge	171:3a7713b1edbc	983	* @param _BAUD_ Baud rate set by the user
AnnaBridge	171:3a7713b1edbc	984	* @retval Division result
AnnaBridge	171:3a7713b1edbc	985	*/
AnnaBridge	171:3a7713b1edbc	986	#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((((_PCLK_))+((_BAUD_)/2))/((_BAUD_)))
AnnaBridge	171:3a7713b1edbc	987
AnnaBridge	171:3a7713b1edbc	988	/** @brief Check UART Baud rate
AnnaBridge	171:3a7713b1edbc	989	* @param BAUDRATE Baudrate specified by the user
AnnaBridge	171:3a7713b1edbc	990	* The maximum Baud Rate is derived from the maximum clock on F7 (i.e. 216 MHz)
AnnaBridge	171:3a7713b1edbc	991	* divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge	171:3a7713b1edbc	992	* @retval Test result (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	993	*/
AnnaBridge	171:3a7713b1edbc	994	#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001)
AnnaBridge	171:3a7713b1edbc	995
AnnaBridge	171:3a7713b1edbc	996	/** @brief Check UART assertion time
AnnaBridge	171:3a7713b1edbc	997	* @param TIME 5-bit value assertion time
AnnaBridge	171:3a7713b1edbc	998	* @retval Test result (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	999	*/
AnnaBridge	171:3a7713b1edbc	1000	#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
AnnaBridge	171:3a7713b1edbc	1001
AnnaBridge	171:3a7713b1edbc	1002	/** @brief Check UART deassertion time
AnnaBridge	171:3a7713b1edbc	1003	* @param TIME 5-bit value deassertion time
AnnaBridge	171:3a7713b1edbc	1004	* @retval Test result (TRUE or FALSE).
AnnaBridge	171:3a7713b1edbc	1005	*/
AnnaBridge	171:3a7713b1edbc	1006	#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
AnnaBridge	171:3a7713b1edbc	1007
AnnaBridge	171:3a7713b1edbc	1008	#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) \|\| \
AnnaBridge	171:3a7713b1edbc	1009	((STOPBITS) == UART_STOPBITS_2))
AnnaBridge	171:3a7713b1edbc	1010
AnnaBridge	171:3a7713b1edbc	1011	#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) \|\| \
AnnaBridge	171:3a7713b1edbc	1012	((PARITY) == UART_PARITY_EVEN) \|\| \
AnnaBridge	171:3a7713b1edbc	1013	((PARITY) == UART_PARITY_ODD))
AnnaBridge	171:3a7713b1edbc	1014
AnnaBridge	171:3a7713b1edbc	1015	#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
AnnaBridge	171:3a7713b1edbc	1016	(((CONTROL) == UART_HWCONTROL_NONE) \|\| \
AnnaBridge	171:3a7713b1edbc	1017	((CONTROL) == UART_HWCONTROL_RTS) \|\| \
AnnaBridge	171:3a7713b1edbc	1018	((CONTROL) == UART_HWCONTROL_CTS) \|\| \
AnnaBridge	171:3a7713b1edbc	1019	((CONTROL) == UART_HWCONTROL_RTS_CTS))
AnnaBridge	171:3a7713b1edbc	1020
AnnaBridge	171:3a7713b1edbc	1021	#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
AnnaBridge	171:3a7713b1edbc	1022
AnnaBridge	171:3a7713b1edbc	1023	#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1024	((STATE) == UART_STATE_ENABLE))
AnnaBridge	171:3a7713b1edbc	1025
AnnaBridge	171:3a7713b1edbc	1026	#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) \|\| \
AnnaBridge	171:3a7713b1edbc	1027	((SAMPLING) == UART_OVERSAMPLING_8))
AnnaBridge	171:3a7713b1edbc	1028
AnnaBridge	171:3a7713b1edbc	1029	#define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1030	((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
AnnaBridge	171:3a7713b1edbc	1031
AnnaBridge	171:3a7713b1edbc	1032	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
AnnaBridge	171:3a7713b1edbc	1033	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
AnnaBridge	171:3a7713b1edbc	1034	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
AnnaBridge	171:3a7713b1edbc	1035	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
AnnaBridge	171:3a7713b1edbc	1036
AnnaBridge	171:3a7713b1edbc	1037	#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1038	((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
AnnaBridge	171:3a7713b1edbc	1039
AnnaBridge	171:3a7713b1edbc	1040	#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1041	((LIN) == UART_LIN_ENABLE))
AnnaBridge	171:3a7713b1edbc	1042
AnnaBridge	171:3a7713b1edbc	1043	#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) \|\| \
AnnaBridge	171:3a7713b1edbc	1044	((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge	171:3a7713b1edbc	1045
AnnaBridge	171:3a7713b1edbc	1046	#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
AnnaBridge	171:3a7713b1edbc	1047	((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge	171:3a7713b1edbc	1048
AnnaBridge	171:3a7713b1edbc	1049	#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1050	((DMATX) == UART_DMA_TX_ENABLE))
AnnaBridge	171:3a7713b1edbc	1051
AnnaBridge	171:3a7713b1edbc	1052	#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1053	((DMARX) == UART_DMA_RX_ENABLE))
AnnaBridge	171:3a7713b1edbc	1054
AnnaBridge	171:3a7713b1edbc	1055	#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1056	((HDSEL) == UART_HALF_DUPLEX_ENABLE))
AnnaBridge	171:3a7713b1edbc	1057
AnnaBridge	171:3a7713b1edbc	1058	#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	1059	((PARAM) == UART_SENDBREAK_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	1060	((PARAM) == UART_MUTE_MODE_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	1061	((PARAM) == UART_RXDATA_FLUSH_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	1062	((PARAM) == UART_TXDATA_FLUSH_REQUEST))
AnnaBridge	171:3a7713b1edbc	1063
AnnaBridge	171:3a7713b1edbc	1064	#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT \| \
AnnaBridge	171:3a7713b1edbc	1065	UART_ADVFEATURE_TXINVERT_INIT \| \
AnnaBridge	171:3a7713b1edbc	1066	UART_ADVFEATURE_RXINVERT_INIT \| \
AnnaBridge	171:3a7713b1edbc	1067	UART_ADVFEATURE_DATAINVERT_INIT \| \
AnnaBridge	171:3a7713b1edbc	1068	UART_ADVFEATURE_SWAP_INIT \| \
AnnaBridge	171:3a7713b1edbc	1069	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
AnnaBridge	171:3a7713b1edbc	1070	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
AnnaBridge	171:3a7713b1edbc	1071	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
AnnaBridge	171:3a7713b1edbc	1072	UART_ADVFEATURE_MSBFIRST_INIT))
AnnaBridge	171:3a7713b1edbc	1073
AnnaBridge	171:3a7713b1edbc	1074	#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1075	((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
AnnaBridge	171:3a7713b1edbc	1076
AnnaBridge	171:3a7713b1edbc	1077	#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1078	((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
AnnaBridge	171:3a7713b1edbc	1079
AnnaBridge	171:3a7713b1edbc	1080	#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1081	((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
AnnaBridge	171:3a7713b1edbc	1082
AnnaBridge	171:3a7713b1edbc	1083	#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1084	((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
AnnaBridge	171:3a7713b1edbc	1085
AnnaBridge	171:3a7713b1edbc	1086	#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1087	((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
AnnaBridge	171:3a7713b1edbc	1088
AnnaBridge	171:3a7713b1edbc	1089	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1090	((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
AnnaBridge	171:3a7713b1edbc	1091
AnnaBridge	171:3a7713b1edbc	1092	#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
AnnaBridge	171:3a7713b1edbc	1093	((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
AnnaBridge	171:3a7713b1edbc	1094
AnnaBridge	171:3a7713b1edbc	1095	#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1096	((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
AnnaBridge	171:3a7713b1edbc	1097
AnnaBridge	171:3a7713b1edbc	1098	#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	1099	((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
AnnaBridge	171:3a7713b1edbc	1100
AnnaBridge	171:3a7713b1edbc	1101	#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) \|\| \
AnnaBridge	171:3a7713b1edbc	1102	((POLARITY) == UART_DE_POLARITY_LOW))
AnnaBridge	171:3a7713b1edbc	1103
AnnaBridge	171:3a7713b1edbc	1104	/**
AnnaBridge	171:3a7713b1edbc	1105	* @}
AnnaBridge	171:3a7713b1edbc	1106	*/
AnnaBridge	171:3a7713b1edbc	1107	/* Include UART HAL Extension module */
AnnaBridge	171:3a7713b1edbc	1108	#include "stm32f7xx_hal_uart_ex.h"
AnnaBridge	171:3a7713b1edbc	1109	/* Exported functions --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	1110	/** @addtogroup UART_Exported_Functions UART Exported Functions
AnnaBridge	171:3a7713b1edbc	1111	* @{
AnnaBridge	171:3a7713b1edbc	1112	*/
AnnaBridge	171:3a7713b1edbc	1113
AnnaBridge	171:3a7713b1edbc	1114	/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge	171:3a7713b1edbc	1115	* @{
AnnaBridge	171:3a7713b1edbc	1116	*/
AnnaBridge	171:3a7713b1edbc	1117
AnnaBridge	171:3a7713b1edbc	1118	/* Initialization and de-initialization functions ****************************/
AnnaBridge	171:3a7713b1edbc	1119	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1120	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1121	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
AnnaBridge	171:3a7713b1edbc	1122	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
AnnaBridge	171:3a7713b1edbc	1123	HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
AnnaBridge	171:3a7713b1edbc	1124	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1125	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1126	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1127
AnnaBridge	171:3a7713b1edbc	1128	/**
AnnaBridge	171:3a7713b1edbc	1129	* @}
AnnaBridge	171:3a7713b1edbc	1130	*/
AnnaBridge	171:3a7713b1edbc	1131
AnnaBridge	171:3a7713b1edbc	1132	/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
AnnaBridge	171:3a7713b1edbc	1133	* @{
AnnaBridge	171:3a7713b1edbc	1134	*/
AnnaBridge	171:3a7713b1edbc	1135
AnnaBridge	171:3a7713b1edbc	1136	/* IO operation functions *****************************************************/
AnnaBridge	171:3a7713b1edbc	1137	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
AnnaBridge	171:3a7713b1edbc	1138	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
AnnaBridge	171:3a7713b1edbc	1139	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	171:3a7713b1edbc	1140	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	171:3a7713b1edbc	1141	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	171:3a7713b1edbc	1142	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
AnnaBridge	171:3a7713b1edbc	1143	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1144	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1145	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1146
AnnaBridge	171:3a7713b1edbc	1147	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1148	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1149	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1150	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1151	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1152	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1153
AnnaBridge	171:3a7713b1edbc	1154	/**
AnnaBridge	171:3a7713b1edbc	1155	* @}
AnnaBridge	171:3a7713b1edbc	1156	*/
AnnaBridge	171:3a7713b1edbc	1157
AnnaBridge	171:3a7713b1edbc	1158	/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge	171:3a7713b1edbc	1159	* @{
AnnaBridge	171:3a7713b1edbc	1160	*/
AnnaBridge	171:3a7713b1edbc	1161
AnnaBridge	171:3a7713b1edbc	1162	/* Peripheral Control functions ************************************************/
AnnaBridge	171:3a7713b1edbc	1163	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1164	HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
AnnaBridge	171:3a7713b1edbc	1165	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1166	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1167	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1168	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1169	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1170
AnnaBridge	171:3a7713b1edbc	1171	/**
AnnaBridge	171:3a7713b1edbc	1172	* @}
AnnaBridge	171:3a7713b1edbc	1173	*/
AnnaBridge	171:3a7713b1edbc	1174
AnnaBridge	171:3a7713b1edbc	1175	/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
AnnaBridge	171:3a7713b1edbc	1176	* @{
AnnaBridge	171:3a7713b1edbc	1177	*/
AnnaBridge	171:3a7713b1edbc	1178
AnnaBridge	171:3a7713b1edbc	1179	/* Peripheral State and Errors functions **************************************************/
AnnaBridge	171:3a7713b1edbc	1180	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1181	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1182
AnnaBridge	171:3a7713b1edbc	1183	/**
AnnaBridge	171:3a7713b1edbc	1184	* @}
AnnaBridge	171:3a7713b1edbc	1185	*/
AnnaBridge	171:3a7713b1edbc	1186
AnnaBridge	171:3a7713b1edbc	1187	/**
AnnaBridge	171:3a7713b1edbc	1188	* @}
AnnaBridge	171:3a7713b1edbc	1189	*/
AnnaBridge	171:3a7713b1edbc	1190
AnnaBridge	171:3a7713b1edbc	1191	/* Private functions -----------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	1192	/** @addtogroup UART_Private_Functions UART Private Functions
AnnaBridge	171:3a7713b1edbc	1193	* @{
AnnaBridge	171:3a7713b1edbc	1194	*/
AnnaBridge	171:3a7713b1edbc	1195
AnnaBridge	171:3a7713b1edbc	1196	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1197	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1198	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
AnnaBridge	171:3a7713b1edbc	1199	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	1200
AnnaBridge	171:3a7713b1edbc	1201	/**
AnnaBridge	171:3a7713b1edbc	1202	* @}
AnnaBridge	171:3a7713b1edbc	1203	*/
AnnaBridge	171:3a7713b1edbc	1204
AnnaBridge	171:3a7713b1edbc	1205	/**
AnnaBridge	171:3a7713b1edbc	1206	* @}
AnnaBridge	171:3a7713b1edbc	1207	*/
AnnaBridge	171:3a7713b1edbc	1208
AnnaBridge	171:3a7713b1edbc	1209	/**
AnnaBridge	171:3a7713b1edbc	1210	* @}
AnnaBridge	171:3a7713b1edbc	1211	*/
AnnaBridge	171:3a7713b1edbc	1212
AnnaBridge	171:3a7713b1edbc	1213	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	1214	}
AnnaBridge	171:3a7713b1edbc	1215	#endif
AnnaBridge	171:3a7713b1edbc	1216
AnnaBridge	171:3a7713b1edbc	1217	#endif /* __STM32F7xx_HAL_UART_H */
AnnaBridge	171:3a7713b1edbc	1218
AnnaBridge	171:3a7713b1edbc	1219	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/