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TARGET_NUCLEO_F746ZG/TOOLCHAIN_ARM_STD/stm32f7xx_ll_usart.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f7xx_ll_usart.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of USART LL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F7xx_LL_USART_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F7xx_LL_USART_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f7xx.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F7xx_LL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup USART_LL USART
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61 /** @defgroup USART_LL_Private_Constants USART Private Constants
AnnaBridge 171:3a7713b1edbc 62 * @{
AnnaBridge 171:3a7713b1edbc 63 */
AnnaBridge 171:3a7713b1edbc 64 /**
AnnaBridge 171:3a7713b1edbc 65 * @}
AnnaBridge 171:3a7713b1edbc 66 */
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 69 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 70 /** @defgroup USART_LL_Private_Macros USART Private Macros
AnnaBridge 171:3a7713b1edbc 71 * @{
AnnaBridge 171:3a7713b1edbc 72 */
AnnaBridge 171:3a7713b1edbc 73 /**
AnnaBridge 171:3a7713b1edbc 74 * @}
AnnaBridge 171:3a7713b1edbc 75 */
AnnaBridge 171:3a7713b1edbc 76 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 79 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 80 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
AnnaBridge 171:3a7713b1edbc 81 * @{
AnnaBridge 171:3a7713b1edbc 82 */
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 /**
AnnaBridge 171:3a7713b1edbc 85 * @brief LL USART Init Structure definition
AnnaBridge 171:3a7713b1edbc 86 */
AnnaBridge 171:3a7713b1edbc 87 typedef struct
AnnaBridge 171:3a7713b1edbc 88 {
AnnaBridge 171:3a7713b1edbc 89 uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 171:3a7713b1edbc 94 This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96 This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 171:3a7713b1edbc 99 This parameter can be a value of @ref USART_LL_EC_STOPBITS.
AnnaBridge 171:3a7713b1edbc 100
AnnaBridge 171:3a7713b1edbc 101 This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 171:3a7713b1edbc 104 This parameter can be a value of @ref USART_LL_EC_PARITY.
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 109 This parameter can be a value of @ref USART_LL_EC_DIRECTION.
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 114 This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
AnnaBridge 171:3a7713b1edbc 119 This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 } LL_USART_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 /**
AnnaBridge 171:3a7713b1edbc 126 * @brief LL USART Clock Init Structure definition
AnnaBridge 171:3a7713b1edbc 127 */
AnnaBridge 171:3a7713b1edbc 128 typedef struct
AnnaBridge 171:3a7713b1edbc 129 {
AnnaBridge 171:3a7713b1edbc 130 uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 131 This parameter can be a value of @ref USART_LL_EC_CLOCK.
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 USART HW configuration can be modified afterwards using unitary functions
AnnaBridge 171:3a7713b1edbc 134 @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
AnnaBridge 171:3a7713b1edbc 135 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
AnnaBridge 171:3a7713b1edbc 138 This parameter can be a value of @ref USART_LL_EC_POLARITY.
AnnaBridge 171:3a7713b1edbc 139
AnnaBridge 171:3a7713b1edbc 140 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
AnnaBridge 171:3a7713b1edbc 141 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
AnnaBridge 171:3a7713b1edbc 144 This parameter can be a value of @ref USART_LL_EC_PHASE.
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
AnnaBridge 171:3a7713b1edbc 147 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
AnnaBridge 171:3a7713b1edbc 150 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
AnnaBridge 171:3a7713b1edbc 151 This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
AnnaBridge 171:3a7713b1edbc 154 For more details, refer to description of this function. */
AnnaBridge 171:3a7713b1edbc 155
AnnaBridge 171:3a7713b1edbc 156 } LL_USART_ClockInitTypeDef;
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /**
AnnaBridge 171:3a7713b1edbc 159 * @}
AnnaBridge 171:3a7713b1edbc 160 */
AnnaBridge 171:3a7713b1edbc 161 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 164 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
AnnaBridge 171:3a7713b1edbc 165 * @{
AnnaBridge 171:3a7713b1edbc 166 */
AnnaBridge 171:3a7713b1edbc 167
AnnaBridge 171:3a7713b1edbc 168 /** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 171:3a7713b1edbc 169 * @brief Flags defines which can be used with LL_USART_WriteReg function
AnnaBridge 171:3a7713b1edbc 170 * @{
AnnaBridge 171:3a7713b1edbc 171 */
AnnaBridge 171:3a7713b1edbc 172 #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
AnnaBridge 171:3a7713b1edbc 173 #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
AnnaBridge 171:3a7713b1edbc 174 #define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
AnnaBridge 171:3a7713b1edbc 175 #define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
AnnaBridge 171:3a7713b1edbc 176 #define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
AnnaBridge 171:3a7713b1edbc 177 #define LL_USART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
AnnaBridge 171:3a7713b1edbc 178 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 179 #define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF /*!< Transmission completed before guard time flag */
AnnaBridge 171:3a7713b1edbc 180 #endif
AnnaBridge 171:3a7713b1edbc 181 #define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detection flag */
AnnaBridge 171:3a7713b1edbc 182 #define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
AnnaBridge 171:3a7713b1edbc 183 #define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout flag */
AnnaBridge 171:3a7713b1edbc 184 #define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block flag */
AnnaBridge 171:3a7713b1edbc 185 #define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
AnnaBridge 171:3a7713b1edbc 186 /**
AnnaBridge 171:3a7713b1edbc 187 * @}
AnnaBridge 171:3a7713b1edbc 188 */
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 171:3a7713b1edbc 191 * @brief Flags defines which can be used with LL_USART_ReadReg function
AnnaBridge 171:3a7713b1edbc 192 * @{
AnnaBridge 171:3a7713b1edbc 193 */
AnnaBridge 171:3a7713b1edbc 194 #define LL_USART_ISR_PE USART_ISR_PE /*!< Parity error flag */
AnnaBridge 171:3a7713b1edbc 195 #define LL_USART_ISR_FE USART_ISR_FE /*!< Framing error flag */
AnnaBridge 171:3a7713b1edbc 196 #define LL_USART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
AnnaBridge 171:3a7713b1edbc 197 #define LL_USART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
AnnaBridge 171:3a7713b1edbc 198 #define LL_USART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
AnnaBridge 171:3a7713b1edbc 199 #define LL_USART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
AnnaBridge 171:3a7713b1edbc 200 #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
AnnaBridge 171:3a7713b1edbc 201 #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
AnnaBridge 171:3a7713b1edbc 202 #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detection flag */
AnnaBridge 171:3a7713b1edbc 203 #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
AnnaBridge 171:3a7713b1edbc 204 #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
AnnaBridge 171:3a7713b1edbc 205 #define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout flag */
AnnaBridge 171:3a7713b1edbc 206 #define LL_USART_ISR_EOBF USART_ISR_EOBF /*!< End of block flag */
AnnaBridge 171:3a7713b1edbc 207 #define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate error flag */
AnnaBridge 171:3a7713b1edbc 208 #define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate flag */
AnnaBridge 171:3a7713b1edbc 209 #define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
AnnaBridge 171:3a7713b1edbc 210 #define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
AnnaBridge 171:3a7713b1edbc 211 #define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
AnnaBridge 171:3a7713b1edbc 212 #define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
AnnaBridge 171:3a7713b1edbc 213 #define LL_USART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
AnnaBridge 171:3a7713b1edbc 214 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 215 #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission complete before guard time completion flag */
AnnaBridge 171:3a7713b1edbc 216 #endif
AnnaBridge 171:3a7713b1edbc 217 /**
AnnaBridge 171:3a7713b1edbc 218 * @}
AnnaBridge 171:3a7713b1edbc 219 */
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /** @defgroup USART_LL_EC_IT IT Defines
AnnaBridge 171:3a7713b1edbc 222 * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
AnnaBridge 171:3a7713b1edbc 223 * @{
AnnaBridge 171:3a7713b1edbc 224 */
AnnaBridge 171:3a7713b1edbc 225 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
AnnaBridge 171:3a7713b1edbc 226 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
AnnaBridge 171:3a7713b1edbc 227 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
AnnaBridge 171:3a7713b1edbc 228 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
AnnaBridge 171:3a7713b1edbc 229 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
AnnaBridge 171:3a7713b1edbc 230 #define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
AnnaBridge 171:3a7713b1edbc 231 #define LL_USART_CR1_RTOIE USART_CR1_RTOIE /*!< Receiver timeout interrupt enable */
AnnaBridge 171:3a7713b1edbc 232 #define LL_USART_CR1_EOBIE USART_CR1_EOBIE /*!< End of Block interrupt enable */
AnnaBridge 171:3a7713b1edbc 233 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
AnnaBridge 171:3a7713b1edbc 234 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
AnnaBridge 171:3a7713b1edbc 235 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
AnnaBridge 171:3a7713b1edbc 236 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 237 #define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE /*!< Transmission complete before guard time interrupt enable */
AnnaBridge 171:3a7713b1edbc 238 #endif
AnnaBridge 171:3a7713b1edbc 239 /**
AnnaBridge 171:3a7713b1edbc 240 * @}
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
AnnaBridge 171:3a7713b1edbc 244 * @{
AnnaBridge 171:3a7713b1edbc 245 */
AnnaBridge 171:3a7713b1edbc 246 #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
AnnaBridge 171:3a7713b1edbc 247 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
AnnaBridge 171:3a7713b1edbc 248 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
AnnaBridge 171:3a7713b1edbc 249 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
AnnaBridge 171:3a7713b1edbc 250 /**
AnnaBridge 171:3a7713b1edbc 251 * @}
AnnaBridge 171:3a7713b1edbc 252 */
AnnaBridge 171:3a7713b1edbc 253
AnnaBridge 171:3a7713b1edbc 254 /** @defgroup USART_LL_EC_PARITY Parity Control
AnnaBridge 171:3a7713b1edbc 255 * @{
AnnaBridge 171:3a7713b1edbc 256 */
AnnaBridge 171:3a7713b1edbc 257 #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
AnnaBridge 171:3a7713b1edbc 258 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
AnnaBridge 171:3a7713b1edbc 259 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @}
AnnaBridge 171:3a7713b1edbc 262 */
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 /** @defgroup USART_LL_EC_WAKEUP Wakeup
AnnaBridge 171:3a7713b1edbc 265 * @{
AnnaBridge 171:3a7713b1edbc 266 */
AnnaBridge 171:3a7713b1edbc 267 #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
AnnaBridge 171:3a7713b1edbc 268 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
AnnaBridge 171:3a7713b1edbc 269 /**
AnnaBridge 171:3a7713b1edbc 270 * @}
AnnaBridge 171:3a7713b1edbc 271 */
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
AnnaBridge 171:3a7713b1edbc 274 * @{
AnnaBridge 171:3a7713b1edbc 275 */
AnnaBridge 171:3a7713b1edbc 276 #define LL_USART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
AnnaBridge 171:3a7713b1edbc 277 #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
AnnaBridge 171:3a7713b1edbc 278 #define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
AnnaBridge 171:3a7713b1edbc 279 /**
AnnaBridge 171:3a7713b1edbc 280 * @}
AnnaBridge 171:3a7713b1edbc 281 */
AnnaBridge 171:3a7713b1edbc 282
AnnaBridge 171:3a7713b1edbc 283 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
AnnaBridge 171:3a7713b1edbc 284 * @{
AnnaBridge 171:3a7713b1edbc 285 */
AnnaBridge 171:3a7713b1edbc 286 #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
AnnaBridge 171:3a7713b1edbc 287 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
AnnaBridge 171:3a7713b1edbc 288 /**
AnnaBridge 171:3a7713b1edbc 289 * @}
AnnaBridge 171:3a7713b1edbc 290 */
AnnaBridge 171:3a7713b1edbc 291
AnnaBridge 171:3a7713b1edbc 292 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 293 /** @defgroup USART_LL_EC_CLOCK Clock Signal
AnnaBridge 171:3a7713b1edbc 294 * @{
AnnaBridge 171:3a7713b1edbc 295 */
AnnaBridge 171:3a7713b1edbc 296
AnnaBridge 171:3a7713b1edbc 297 #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
AnnaBridge 171:3a7713b1edbc 298 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
AnnaBridge 171:3a7713b1edbc 299 /**
AnnaBridge 171:3a7713b1edbc 300 * @}
AnnaBridge 171:3a7713b1edbc 301 */
AnnaBridge 171:3a7713b1edbc 302 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
AnnaBridge 171:3a7713b1edbc 305 * @{
AnnaBridge 171:3a7713b1edbc 306 */
AnnaBridge 171:3a7713b1edbc 307 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
AnnaBridge 171:3a7713b1edbc 308 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
AnnaBridge 171:3a7713b1edbc 309 /**
AnnaBridge 171:3a7713b1edbc 310 * @}
AnnaBridge 171:3a7713b1edbc 311 */
AnnaBridge 171:3a7713b1edbc 312
AnnaBridge 171:3a7713b1edbc 313 /** @defgroup USART_LL_EC_PHASE Clock Phase
AnnaBridge 171:3a7713b1edbc 314 * @{
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
AnnaBridge 171:3a7713b1edbc 317 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
AnnaBridge 171:3a7713b1edbc 318 /**
AnnaBridge 171:3a7713b1edbc 319 * @}
AnnaBridge 171:3a7713b1edbc 320 */
AnnaBridge 171:3a7713b1edbc 321
AnnaBridge 171:3a7713b1edbc 322 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
AnnaBridge 171:3a7713b1edbc 323 * @{
AnnaBridge 171:3a7713b1edbc 324 */
AnnaBridge 171:3a7713b1edbc 325 #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
AnnaBridge 171:3a7713b1edbc 326 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
AnnaBridge 171:3a7713b1edbc 327 /**
AnnaBridge 171:3a7713b1edbc 328 * @}
AnnaBridge 171:3a7713b1edbc 329 */
AnnaBridge 171:3a7713b1edbc 330
AnnaBridge 171:3a7713b1edbc 331 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
AnnaBridge 171:3a7713b1edbc 332 * @{
AnnaBridge 171:3a7713b1edbc 333 */
AnnaBridge 171:3a7713b1edbc 334 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
AnnaBridge 171:3a7713b1edbc 335 #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
AnnaBridge 171:3a7713b1edbc 336 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
AnnaBridge 171:3a7713b1edbc 337 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
AnnaBridge 171:3a7713b1edbc 338 /**
AnnaBridge 171:3a7713b1edbc 339 * @}
AnnaBridge 171:3a7713b1edbc 340 */
AnnaBridge 171:3a7713b1edbc 341
AnnaBridge 171:3a7713b1edbc 342 /** @defgroup USART_LL_EC_TXRX TX RX Pins Swap
AnnaBridge 171:3a7713b1edbc 343 * @{
AnnaBridge 171:3a7713b1edbc 344 */
AnnaBridge 171:3a7713b1edbc 345 #define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
AnnaBridge 171:3a7713b1edbc 346 #define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
AnnaBridge 171:3a7713b1edbc 347 /**
AnnaBridge 171:3a7713b1edbc 348 * @}
AnnaBridge 171:3a7713b1edbc 349 */
AnnaBridge 171:3a7713b1edbc 350
AnnaBridge 171:3a7713b1edbc 351 /** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
AnnaBridge 171:3a7713b1edbc 352 * @{
AnnaBridge 171:3a7713b1edbc 353 */
AnnaBridge 171:3a7713b1edbc 354 #define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */
AnnaBridge 171:3a7713b1edbc 355 #define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
AnnaBridge 171:3a7713b1edbc 356 /**
AnnaBridge 171:3a7713b1edbc 357 * @}
AnnaBridge 171:3a7713b1edbc 358 */
AnnaBridge 171:3a7713b1edbc 359
AnnaBridge 171:3a7713b1edbc 360 /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
AnnaBridge 171:3a7713b1edbc 361 * @{
AnnaBridge 171:3a7713b1edbc 362 */
AnnaBridge 171:3a7713b1edbc 363 #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */
AnnaBridge 171:3a7713b1edbc 364 #define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
AnnaBridge 171:3a7713b1edbc 365 /**
AnnaBridge 171:3a7713b1edbc 366 * @}
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368
AnnaBridge 171:3a7713b1edbc 369 /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion
AnnaBridge 171:3a7713b1edbc 370 * @{
AnnaBridge 171:3a7713b1edbc 371 */
AnnaBridge 171:3a7713b1edbc 372 #define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
AnnaBridge 171:3a7713b1edbc 373 #define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
AnnaBridge 171:3a7713b1edbc 374 /**
AnnaBridge 171:3a7713b1edbc 375 * @}
AnnaBridge 171:3a7713b1edbc 376 */
AnnaBridge 171:3a7713b1edbc 377
AnnaBridge 171:3a7713b1edbc 378 /** @defgroup USART_LL_EC_BITORDER Bit Order
AnnaBridge 171:3a7713b1edbc 379 * @{
AnnaBridge 171:3a7713b1edbc 380 */
AnnaBridge 171:3a7713b1edbc 381 #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
AnnaBridge 171:3a7713b1edbc 382 #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */
AnnaBridge 171:3a7713b1edbc 383 /**
AnnaBridge 171:3a7713b1edbc 384 * @}
AnnaBridge 171:3a7713b1edbc 385 */
AnnaBridge 171:3a7713b1edbc 386
AnnaBridge 171:3a7713b1edbc 387 /** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection
AnnaBridge 171:3a7713b1edbc 388 * @{
AnnaBridge 171:3a7713b1edbc 389 */
AnnaBridge 171:3a7713b1edbc 390 #define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U /*!< Measurement of the start bit is used to detect the baud rate */
AnnaBridge 171:3a7713b1edbc 391 #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Falling edge to falling edge measurement. Received frame must start with a single bit = 1 -> Frame = Start10xxxxxx */
AnnaBridge 171:3a7713b1edbc 392 #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x7F frame detection */
AnnaBridge 171:3a7713b1edbc 393 #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x55 frame detection */
AnnaBridge 171:3a7713b1edbc 394 /**
AnnaBridge 171:3a7713b1edbc 395 * @}
AnnaBridge 171:3a7713b1edbc 396 */
AnnaBridge 171:3a7713b1edbc 397
AnnaBridge 171:3a7713b1edbc 398 /** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection
AnnaBridge 171:3a7713b1edbc 399 * @{
AnnaBridge 171:3a7713b1edbc 400 */
AnnaBridge 171:3a7713b1edbc 401 #define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */
AnnaBridge 171:3a7713b1edbc 402 #define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
AnnaBridge 171:3a7713b1edbc 403 /**
AnnaBridge 171:3a7713b1edbc 404 * @}
AnnaBridge 171:3a7713b1edbc 405 */
AnnaBridge 171:3a7713b1edbc 406
AnnaBridge 171:3a7713b1edbc 407 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
AnnaBridge 171:3a7713b1edbc 408 * @{
AnnaBridge 171:3a7713b1edbc 409 */
AnnaBridge 171:3a7713b1edbc 410 #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
AnnaBridge 171:3a7713b1edbc 411 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
AnnaBridge 171:3a7713b1edbc 412 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
AnnaBridge 171:3a7713b1edbc 413 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
AnnaBridge 171:3a7713b1edbc 414 /**
AnnaBridge 171:3a7713b1edbc 415 * @}
AnnaBridge 171:3a7713b1edbc 416 */
AnnaBridge 171:3a7713b1edbc 417
AnnaBridge 171:3a7713b1edbc 418
AnnaBridge 171:3a7713b1edbc 419 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
AnnaBridge 171:3a7713b1edbc 420 * @{
AnnaBridge 171:3a7713b1edbc 421 */
AnnaBridge 171:3a7713b1edbc 422 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
AnnaBridge 171:3a7713b1edbc 423 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
AnnaBridge 171:3a7713b1edbc 424 /**
AnnaBridge 171:3a7713b1edbc 425 * @}
AnnaBridge 171:3a7713b1edbc 426 */
AnnaBridge 171:3a7713b1edbc 427
AnnaBridge 171:3a7713b1edbc 428 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 429 * @{
AnnaBridge 171:3a7713b1edbc 430 */
AnnaBridge 171:3a7713b1edbc 431 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
AnnaBridge 171:3a7713b1edbc 432 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
AnnaBridge 171:3a7713b1edbc 433 /**
AnnaBridge 171:3a7713b1edbc 434 * @}
AnnaBridge 171:3a7713b1edbc 435 */
AnnaBridge 171:3a7713b1edbc 436
AnnaBridge 171:3a7713b1edbc 437 /** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity
AnnaBridge 171:3a7713b1edbc 438 * @{
AnnaBridge 171:3a7713b1edbc 439 */
AnnaBridge 171:3a7713b1edbc 440 #define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */
AnnaBridge 171:3a7713b1edbc 441 #define LL_USART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
AnnaBridge 171:3a7713b1edbc 442 /**
AnnaBridge 171:3a7713b1edbc 443 * @}
AnnaBridge 171:3a7713b1edbc 444 */
AnnaBridge 171:3a7713b1edbc 445
AnnaBridge 171:3a7713b1edbc 446 /** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge 171:3a7713b1edbc 447 * @{
AnnaBridge 171:3a7713b1edbc 448 */
AnnaBridge 171:3a7713b1edbc 449 #define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
AnnaBridge 171:3a7713b1edbc 450 #define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
AnnaBridge 171:3a7713b1edbc 451 /**
AnnaBridge 171:3a7713b1edbc 452 * @}
AnnaBridge 171:3a7713b1edbc 453 */
AnnaBridge 171:3a7713b1edbc 454
AnnaBridge 171:3a7713b1edbc 455 /**
AnnaBridge 171:3a7713b1edbc 456 * @}
AnnaBridge 171:3a7713b1edbc 457 */
AnnaBridge 171:3a7713b1edbc 458
AnnaBridge 171:3a7713b1edbc 459 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 460 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
AnnaBridge 171:3a7713b1edbc 461 * @{
AnnaBridge 171:3a7713b1edbc 462 */
AnnaBridge 171:3a7713b1edbc 463
AnnaBridge 171:3a7713b1edbc 464 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 171:3a7713b1edbc 465 * @{
AnnaBridge 171:3a7713b1edbc 466 */
AnnaBridge 171:3a7713b1edbc 467
AnnaBridge 171:3a7713b1edbc 468 /**
AnnaBridge 171:3a7713b1edbc 469 * @brief Write a value in USART register
AnnaBridge 171:3a7713b1edbc 470 * @param __INSTANCE__ USART Instance
AnnaBridge 171:3a7713b1edbc 471 * @param __REG__ Register to be written
AnnaBridge 171:3a7713b1edbc 472 * @param __VALUE__ Value to be written in the register
AnnaBridge 171:3a7713b1edbc 473 * @retval None
AnnaBridge 171:3a7713b1edbc 474 */
AnnaBridge 171:3a7713b1edbc 475 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 171:3a7713b1edbc 476
AnnaBridge 171:3a7713b1edbc 477 /**
AnnaBridge 171:3a7713b1edbc 478 * @brief Read a value in USART register
AnnaBridge 171:3a7713b1edbc 479 * @param __INSTANCE__ USART Instance
AnnaBridge 171:3a7713b1edbc 480 * @param __REG__ Register to be read
AnnaBridge 171:3a7713b1edbc 481 * @retval Register value
AnnaBridge 171:3a7713b1edbc 482 */
AnnaBridge 171:3a7713b1edbc 483 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 171:3a7713b1edbc 484 /**
AnnaBridge 171:3a7713b1edbc 485 * @}
AnnaBridge 171:3a7713b1edbc 486 */
AnnaBridge 171:3a7713b1edbc 487
AnnaBridge 171:3a7713b1edbc 488 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
AnnaBridge 171:3a7713b1edbc 489 * @{
AnnaBridge 171:3a7713b1edbc 490 */
AnnaBridge 171:3a7713b1edbc 491
AnnaBridge 171:3a7713b1edbc 492 /**
AnnaBridge 171:3a7713b1edbc 493 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 171:3a7713b1edbc 494 * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 171:3a7713b1edbc 495 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 171:3a7713b1edbc 496 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 171:3a7713b1edbc 497 * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
AnnaBridge 171:3a7713b1edbc 498 */
AnnaBridge 171:3a7713b1edbc 499 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
AnnaBridge 171:3a7713b1edbc 500
AnnaBridge 171:3a7713b1edbc 501 /**
AnnaBridge 171:3a7713b1edbc 502 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 171:3a7713b1edbc 503 * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 171:3a7713b1edbc 504 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 171:3a7713b1edbc 505 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 171:3a7713b1edbc 506 * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
AnnaBridge 171:3a7713b1edbc 507 */
AnnaBridge 171:3a7713b1edbc 508 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
AnnaBridge 171:3a7713b1edbc 509
AnnaBridge 171:3a7713b1edbc 510 /**
AnnaBridge 171:3a7713b1edbc 511 * @}
AnnaBridge 171:3a7713b1edbc 512 */
AnnaBridge 171:3a7713b1edbc 513
AnnaBridge 171:3a7713b1edbc 514 /**
AnnaBridge 171:3a7713b1edbc 515 * @}
AnnaBridge 171:3a7713b1edbc 516 */
AnnaBridge 171:3a7713b1edbc 517
AnnaBridge 171:3a7713b1edbc 518 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 519
AnnaBridge 171:3a7713b1edbc 520 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
AnnaBridge 171:3a7713b1edbc 521 * @{
AnnaBridge 171:3a7713b1edbc 522 */
AnnaBridge 171:3a7713b1edbc 523
AnnaBridge 171:3a7713b1edbc 524 /** @defgroup USART_LL_EF_Configuration Configuration functions
AnnaBridge 171:3a7713b1edbc 525 * @{
AnnaBridge 171:3a7713b1edbc 526 */
AnnaBridge 171:3a7713b1edbc 527
AnnaBridge 171:3a7713b1edbc 528 /**
AnnaBridge 171:3a7713b1edbc 529 * @brief USART Enable
AnnaBridge 171:3a7713b1edbc 530 * @rmtoll CR1 UE LL_USART_Enable
AnnaBridge 171:3a7713b1edbc 531 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 532 * @retval None
AnnaBridge 171:3a7713b1edbc 533 */
AnnaBridge 171:3a7713b1edbc 534 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 535 {
AnnaBridge 171:3a7713b1edbc 536 SET_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 171:3a7713b1edbc 537 }
AnnaBridge 171:3a7713b1edbc 538
AnnaBridge 171:3a7713b1edbc 539 /**
AnnaBridge 171:3a7713b1edbc 540 * @brief USART Disable (all USART prescalers and outputs are disabled)
AnnaBridge 171:3a7713b1edbc 541 * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
AnnaBridge 171:3a7713b1edbc 542 * and current operations are discarded. The configuration of the USART is kept, but all the status
AnnaBridge 171:3a7713b1edbc 543 * flags, in the USARTx_ISR are set to their default values.
AnnaBridge 171:3a7713b1edbc 544 * @rmtoll CR1 UE LL_USART_Disable
AnnaBridge 171:3a7713b1edbc 545 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 546 * @retval None
AnnaBridge 171:3a7713b1edbc 547 */
AnnaBridge 171:3a7713b1edbc 548 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 549 {
AnnaBridge 171:3a7713b1edbc 550 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 171:3a7713b1edbc 551 }
AnnaBridge 171:3a7713b1edbc 552
AnnaBridge 171:3a7713b1edbc 553 /**
AnnaBridge 171:3a7713b1edbc 554 * @brief Indicate if USART is enabled
AnnaBridge 171:3a7713b1edbc 555 * @rmtoll CR1 UE LL_USART_IsEnabled
AnnaBridge 171:3a7713b1edbc 556 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 557 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 560 {
AnnaBridge 171:3a7713b1edbc 561 return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
AnnaBridge 171:3a7713b1edbc 562 }
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564
AnnaBridge 171:3a7713b1edbc 565 /**
AnnaBridge 171:3a7713b1edbc 566 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
AnnaBridge 171:3a7713b1edbc 567 * @rmtoll CR1 RE LL_USART_EnableDirectionRx
AnnaBridge 171:3a7713b1edbc 568 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 569 * @retval None
AnnaBridge 171:3a7713b1edbc 570 */
AnnaBridge 171:3a7713b1edbc 571 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 572 {
AnnaBridge 171:3a7713b1edbc 573 SET_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 171:3a7713b1edbc 574 }
AnnaBridge 171:3a7713b1edbc 575
AnnaBridge 171:3a7713b1edbc 576 /**
AnnaBridge 171:3a7713b1edbc 577 * @brief Receiver Disable
AnnaBridge 171:3a7713b1edbc 578 * @rmtoll CR1 RE LL_USART_DisableDirectionRx
AnnaBridge 171:3a7713b1edbc 579 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 580 * @retval None
AnnaBridge 171:3a7713b1edbc 581 */
AnnaBridge 171:3a7713b1edbc 582 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 583 {
AnnaBridge 171:3a7713b1edbc 584 CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 171:3a7713b1edbc 585 }
AnnaBridge 171:3a7713b1edbc 586
AnnaBridge 171:3a7713b1edbc 587 /**
AnnaBridge 171:3a7713b1edbc 588 * @brief Transmitter Enable
AnnaBridge 171:3a7713b1edbc 589 * @rmtoll CR1 TE LL_USART_EnableDirectionTx
AnnaBridge 171:3a7713b1edbc 590 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 591 * @retval None
AnnaBridge 171:3a7713b1edbc 592 */
AnnaBridge 171:3a7713b1edbc 593 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 594 {
AnnaBridge 171:3a7713b1edbc 595 SET_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 171:3a7713b1edbc 596 }
AnnaBridge 171:3a7713b1edbc 597
AnnaBridge 171:3a7713b1edbc 598 /**
AnnaBridge 171:3a7713b1edbc 599 * @brief Transmitter Disable
AnnaBridge 171:3a7713b1edbc 600 * @rmtoll CR1 TE LL_USART_DisableDirectionTx
AnnaBridge 171:3a7713b1edbc 601 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 602 * @retval None
AnnaBridge 171:3a7713b1edbc 603 */
AnnaBridge 171:3a7713b1edbc 604 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 605 {
AnnaBridge 171:3a7713b1edbc 606 CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 171:3a7713b1edbc 607 }
AnnaBridge 171:3a7713b1edbc 608
AnnaBridge 171:3a7713b1edbc 609 /**
AnnaBridge 171:3a7713b1edbc 610 * @brief Configure simultaneously enabled/disabled states
AnnaBridge 171:3a7713b1edbc 611 * of Transmitter and Receiver
AnnaBridge 171:3a7713b1edbc 612 * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
AnnaBridge 171:3a7713b1edbc 613 * CR1 TE LL_USART_SetTransferDirection
AnnaBridge 171:3a7713b1edbc 614 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 615 * @param TransferDirection This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 616 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 171:3a7713b1edbc 617 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 171:3a7713b1edbc 618 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 171:3a7713b1edbc 619 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 171:3a7713b1edbc 620 * @retval None
AnnaBridge 171:3a7713b1edbc 621 */
AnnaBridge 171:3a7713b1edbc 622 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
AnnaBridge 171:3a7713b1edbc 623 {
AnnaBridge 171:3a7713b1edbc 624 MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
AnnaBridge 171:3a7713b1edbc 625 }
AnnaBridge 171:3a7713b1edbc 626
AnnaBridge 171:3a7713b1edbc 627 /**
AnnaBridge 171:3a7713b1edbc 628 * @brief Return enabled/disabled states of Transmitter and Receiver
AnnaBridge 171:3a7713b1edbc 629 * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
AnnaBridge 171:3a7713b1edbc 630 * CR1 TE LL_USART_GetTransferDirection
AnnaBridge 171:3a7713b1edbc 631 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 632 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 633 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 171:3a7713b1edbc 634 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 171:3a7713b1edbc 635 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 171:3a7713b1edbc 636 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 171:3a7713b1edbc 637 */
AnnaBridge 171:3a7713b1edbc 638 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 639 {
AnnaBridge 171:3a7713b1edbc 640 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
AnnaBridge 171:3a7713b1edbc 641 }
AnnaBridge 171:3a7713b1edbc 642
AnnaBridge 171:3a7713b1edbc 643 /**
AnnaBridge 171:3a7713b1edbc 644 * @brief Configure Parity (enabled/disabled and parity mode if enabled).
AnnaBridge 171:3a7713b1edbc 645 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 646 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
AnnaBridge 171:3a7713b1edbc 647 * (9th or 8th bit depending on data width) and parity is checked on the received data.
AnnaBridge 171:3a7713b1edbc 648 * @rmtoll CR1 PS LL_USART_SetParity\n
AnnaBridge 171:3a7713b1edbc 649 * CR1 PCE LL_USART_SetParity
AnnaBridge 171:3a7713b1edbc 650 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 651 * @param Parity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 652 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 653 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 654 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 655 * @retval None
AnnaBridge 171:3a7713b1edbc 656 */
AnnaBridge 171:3a7713b1edbc 657 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
AnnaBridge 171:3a7713b1edbc 658 {
AnnaBridge 171:3a7713b1edbc 659 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
AnnaBridge 171:3a7713b1edbc 660 }
AnnaBridge 171:3a7713b1edbc 661
AnnaBridge 171:3a7713b1edbc 662 /**
AnnaBridge 171:3a7713b1edbc 663 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
AnnaBridge 171:3a7713b1edbc 664 * @rmtoll CR1 PS LL_USART_GetParity\n
AnnaBridge 171:3a7713b1edbc 665 * CR1 PCE LL_USART_GetParity
AnnaBridge 171:3a7713b1edbc 666 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 667 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 668 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 669 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 670 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 671 */
AnnaBridge 171:3a7713b1edbc 672 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 673 {
AnnaBridge 171:3a7713b1edbc 674 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
AnnaBridge 171:3a7713b1edbc 675 }
AnnaBridge 171:3a7713b1edbc 676
AnnaBridge 171:3a7713b1edbc 677 /**
AnnaBridge 171:3a7713b1edbc 678 * @brief Set Receiver Wake Up method from Mute mode.
AnnaBridge 171:3a7713b1edbc 679 * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
AnnaBridge 171:3a7713b1edbc 680 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 681 * @param Method This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 682 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 171:3a7713b1edbc 683 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 171:3a7713b1edbc 684 * @retval None
AnnaBridge 171:3a7713b1edbc 685 */
AnnaBridge 171:3a7713b1edbc 686 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
AnnaBridge 171:3a7713b1edbc 687 {
AnnaBridge 171:3a7713b1edbc 688 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
AnnaBridge 171:3a7713b1edbc 689 }
AnnaBridge 171:3a7713b1edbc 690
AnnaBridge 171:3a7713b1edbc 691 /**
AnnaBridge 171:3a7713b1edbc 692 * @brief Return Receiver Wake Up method from Mute mode
AnnaBridge 171:3a7713b1edbc 693 * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
AnnaBridge 171:3a7713b1edbc 694 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 695 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 696 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 171:3a7713b1edbc 697 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 171:3a7713b1edbc 698 */
AnnaBridge 171:3a7713b1edbc 699 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 700 {
AnnaBridge 171:3a7713b1edbc 701 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
AnnaBridge 171:3a7713b1edbc 702 }
AnnaBridge 171:3a7713b1edbc 703
AnnaBridge 171:3a7713b1edbc 704 /**
AnnaBridge 171:3a7713b1edbc 705 * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 171:3a7713b1edbc 706 * @rmtoll CR1 M0 LL_USART_SetDataWidth\n
AnnaBridge 171:3a7713b1edbc 707 * CR1 M1 LL_USART_SetDataWidth
AnnaBridge 171:3a7713b1edbc 708 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 709 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 710 * @arg @ref LL_USART_DATAWIDTH_7B
AnnaBridge 171:3a7713b1edbc 711 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 712 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 713 * @retval None
AnnaBridge 171:3a7713b1edbc 714 */
AnnaBridge 171:3a7713b1edbc 715 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
AnnaBridge 171:3a7713b1edbc 716 {
AnnaBridge 171:3a7713b1edbc 717 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
AnnaBridge 171:3a7713b1edbc 718 }
AnnaBridge 171:3a7713b1edbc 719
AnnaBridge 171:3a7713b1edbc 720 /**
AnnaBridge 171:3a7713b1edbc 721 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 171:3a7713b1edbc 722 * @rmtoll CR1 M0 LL_USART_GetDataWidth\n
AnnaBridge 171:3a7713b1edbc 723 * CR1 M1 LL_USART_GetDataWidth
AnnaBridge 171:3a7713b1edbc 724 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 725 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 726 * @arg @ref LL_USART_DATAWIDTH_7B
AnnaBridge 171:3a7713b1edbc 727 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 728 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 729 */
AnnaBridge 171:3a7713b1edbc 730 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 731 {
AnnaBridge 171:3a7713b1edbc 732 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
AnnaBridge 171:3a7713b1edbc 733 }
AnnaBridge 171:3a7713b1edbc 734
AnnaBridge 171:3a7713b1edbc 735 /**
AnnaBridge 171:3a7713b1edbc 736 * @brief Allow switch between Mute Mode and Active mode
AnnaBridge 171:3a7713b1edbc 737 * @rmtoll CR1 MME LL_USART_EnableMuteMode
AnnaBridge 171:3a7713b1edbc 738 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 739 * @retval None
AnnaBridge 171:3a7713b1edbc 740 */
AnnaBridge 171:3a7713b1edbc 741 __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 742 {
AnnaBridge 171:3a7713b1edbc 743 SET_BIT(USARTx->CR1, USART_CR1_MME);
AnnaBridge 171:3a7713b1edbc 744 }
AnnaBridge 171:3a7713b1edbc 745
AnnaBridge 171:3a7713b1edbc 746 /**
AnnaBridge 171:3a7713b1edbc 747 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
AnnaBridge 171:3a7713b1edbc 748 * @rmtoll CR1 MME LL_USART_DisableMuteMode
AnnaBridge 171:3a7713b1edbc 749 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 750 * @retval None
AnnaBridge 171:3a7713b1edbc 751 */
AnnaBridge 171:3a7713b1edbc 752 __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 753 {
AnnaBridge 171:3a7713b1edbc 754 CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
AnnaBridge 171:3a7713b1edbc 755 }
AnnaBridge 171:3a7713b1edbc 756
AnnaBridge 171:3a7713b1edbc 757 /**
AnnaBridge 171:3a7713b1edbc 758 * @brief Indicate if switch between Mute Mode and Active mode is allowed
AnnaBridge 171:3a7713b1edbc 759 * @rmtoll CR1 MME LL_USART_IsEnabledMuteMode
AnnaBridge 171:3a7713b1edbc 760 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 761 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 762 */
AnnaBridge 171:3a7713b1edbc 763 __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 764 {
AnnaBridge 171:3a7713b1edbc 765 return (READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
AnnaBridge 171:3a7713b1edbc 766 }
AnnaBridge 171:3a7713b1edbc 767
AnnaBridge 171:3a7713b1edbc 768 /**
AnnaBridge 171:3a7713b1edbc 769 * @brief Set Oversampling to 8-bit or 16-bit mode
AnnaBridge 171:3a7713b1edbc 770 * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
AnnaBridge 171:3a7713b1edbc 771 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 772 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 773 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 774 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 775 * @retval None
AnnaBridge 171:3a7713b1edbc 776 */
AnnaBridge 171:3a7713b1edbc 777 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
AnnaBridge 171:3a7713b1edbc 778 {
AnnaBridge 171:3a7713b1edbc 779 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
AnnaBridge 171:3a7713b1edbc 780 }
AnnaBridge 171:3a7713b1edbc 781
AnnaBridge 171:3a7713b1edbc 782 /**
AnnaBridge 171:3a7713b1edbc 783 * @brief Return Oversampling mode
AnnaBridge 171:3a7713b1edbc 784 * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
AnnaBridge 171:3a7713b1edbc 785 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 786 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 787 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 788 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 789 */
AnnaBridge 171:3a7713b1edbc 790 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 791 {
AnnaBridge 171:3a7713b1edbc 792 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
AnnaBridge 171:3a7713b1edbc 793 }
AnnaBridge 171:3a7713b1edbc 794
AnnaBridge 171:3a7713b1edbc 795 /**
AnnaBridge 171:3a7713b1edbc 796 * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
AnnaBridge 171:3a7713b1edbc 797 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 798 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 799 * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
AnnaBridge 171:3a7713b1edbc 800 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 801 * @param LastBitClockPulse This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 802 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 803 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 804 * @retval None
AnnaBridge 171:3a7713b1edbc 805 */
AnnaBridge 171:3a7713b1edbc 806 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
AnnaBridge 171:3a7713b1edbc 807 {
AnnaBridge 171:3a7713b1edbc 808 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
AnnaBridge 171:3a7713b1edbc 809 }
AnnaBridge 171:3a7713b1edbc 810
AnnaBridge 171:3a7713b1edbc 811 /**
AnnaBridge 171:3a7713b1edbc 812 * @brief Retrieve Clock pulse of the last data bit output configuration
AnnaBridge 171:3a7713b1edbc 813 * (Last bit Clock pulse output to the SCLK pin or not)
AnnaBridge 171:3a7713b1edbc 814 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 815 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 816 * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
AnnaBridge 171:3a7713b1edbc 817 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 818 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 819 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 820 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 821 */
AnnaBridge 171:3a7713b1edbc 822 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 823 {
AnnaBridge 171:3a7713b1edbc 824 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
AnnaBridge 171:3a7713b1edbc 825 }
AnnaBridge 171:3a7713b1edbc 826
AnnaBridge 171:3a7713b1edbc 827 /**
AnnaBridge 171:3a7713b1edbc 828 * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 829 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 830 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 831 * @rmtoll CR2 CPHA LL_USART_SetClockPhase
AnnaBridge 171:3a7713b1edbc 832 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 833 * @param ClockPhase This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 834 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 835 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 836 * @retval None
AnnaBridge 171:3a7713b1edbc 837 */
AnnaBridge 171:3a7713b1edbc 838 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
AnnaBridge 171:3a7713b1edbc 839 {
AnnaBridge 171:3a7713b1edbc 840 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
AnnaBridge 171:3a7713b1edbc 841 }
AnnaBridge 171:3a7713b1edbc 842
AnnaBridge 171:3a7713b1edbc 843 /**
AnnaBridge 171:3a7713b1edbc 844 * @brief Return phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 845 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 846 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 847 * @rmtoll CR2 CPHA LL_USART_GetClockPhase
AnnaBridge 171:3a7713b1edbc 848 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 849 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 850 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 851 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 852 */
AnnaBridge 171:3a7713b1edbc 853 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 854 {
AnnaBridge 171:3a7713b1edbc 855 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
AnnaBridge 171:3a7713b1edbc 856 }
AnnaBridge 171:3a7713b1edbc 857
AnnaBridge 171:3a7713b1edbc 858 /**
AnnaBridge 171:3a7713b1edbc 859 * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 860 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 861 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 862 * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
AnnaBridge 171:3a7713b1edbc 863 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 864 * @param ClockPolarity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 865 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 866 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 867 * @retval None
AnnaBridge 171:3a7713b1edbc 868 */
AnnaBridge 171:3a7713b1edbc 869 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
AnnaBridge 171:3a7713b1edbc 870 {
AnnaBridge 171:3a7713b1edbc 871 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
AnnaBridge 171:3a7713b1edbc 872 }
AnnaBridge 171:3a7713b1edbc 873
AnnaBridge 171:3a7713b1edbc 874 /**
AnnaBridge 171:3a7713b1edbc 875 * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 171:3a7713b1edbc 876 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 877 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 878 * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
AnnaBridge 171:3a7713b1edbc 879 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 880 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 881 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 882 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 883 */
AnnaBridge 171:3a7713b1edbc 884 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 885 {
AnnaBridge 171:3a7713b1edbc 886 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
AnnaBridge 171:3a7713b1edbc 887 }
AnnaBridge 171:3a7713b1edbc 888
AnnaBridge 171:3a7713b1edbc 889 /**
AnnaBridge 171:3a7713b1edbc 890 * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
AnnaBridge 171:3a7713b1edbc 891 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 892 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 893 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 894 * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
AnnaBridge 171:3a7713b1edbc 895 * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
AnnaBridge 171:3a7713b1edbc 896 * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
AnnaBridge 171:3a7713b1edbc 897 * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
AnnaBridge 171:3a7713b1edbc 898 * CR2 CPOL LL_USART_ConfigClock\n
AnnaBridge 171:3a7713b1edbc 899 * CR2 LBCL LL_USART_ConfigClock
AnnaBridge 171:3a7713b1edbc 900 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 901 * @param Phase This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 902 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 171:3a7713b1edbc 903 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 904 * @param Polarity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 905 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 906 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 907 * @param LBCPOutput This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 908 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 171:3a7713b1edbc 909 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 171:3a7713b1edbc 910 * @retval None
AnnaBridge 171:3a7713b1edbc 911 */
AnnaBridge 171:3a7713b1edbc 912 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
AnnaBridge 171:3a7713b1edbc 913 {
AnnaBridge 171:3a7713b1edbc 914 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
AnnaBridge 171:3a7713b1edbc 915 }
AnnaBridge 171:3a7713b1edbc 916
AnnaBridge 171:3a7713b1edbc 917 /**
AnnaBridge 171:3a7713b1edbc 918 * @brief Enable Clock output on SCLK pin
AnnaBridge 171:3a7713b1edbc 919 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 920 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 921 * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
AnnaBridge 171:3a7713b1edbc 922 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 923 * @retval None
AnnaBridge 171:3a7713b1edbc 924 */
AnnaBridge 171:3a7713b1edbc 925 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 926 {
AnnaBridge 171:3a7713b1edbc 927 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 928 }
AnnaBridge 171:3a7713b1edbc 929
AnnaBridge 171:3a7713b1edbc 930 /**
AnnaBridge 171:3a7713b1edbc 931 * @brief Disable Clock output on SCLK pin
AnnaBridge 171:3a7713b1edbc 932 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 933 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 934 * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
AnnaBridge 171:3a7713b1edbc 935 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 936 * @retval None
AnnaBridge 171:3a7713b1edbc 937 */
AnnaBridge 171:3a7713b1edbc 938 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 939 {
AnnaBridge 171:3a7713b1edbc 940 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 941 }
AnnaBridge 171:3a7713b1edbc 942
AnnaBridge 171:3a7713b1edbc 943 /**
AnnaBridge 171:3a7713b1edbc 944 * @brief Indicate if Clock output on SCLK pin is enabled
AnnaBridge 171:3a7713b1edbc 945 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 946 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 947 * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
AnnaBridge 171:3a7713b1edbc 948 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 949 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 950 */
AnnaBridge 171:3a7713b1edbc 951 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 952 {
AnnaBridge 171:3a7713b1edbc 953 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 954 }
AnnaBridge 171:3a7713b1edbc 955
AnnaBridge 171:3a7713b1edbc 956 /**
AnnaBridge 171:3a7713b1edbc 957 * @brief Set the length of the stop bits
AnnaBridge 171:3a7713b1edbc 958 * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
AnnaBridge 171:3a7713b1edbc 959 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 960 * @param StopBits This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 961 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 962 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 963 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 964 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 965 * @retval None
AnnaBridge 171:3a7713b1edbc 966 */
AnnaBridge 171:3a7713b1edbc 967 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
AnnaBridge 171:3a7713b1edbc 968 {
AnnaBridge 171:3a7713b1edbc 969 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 171:3a7713b1edbc 970 }
AnnaBridge 171:3a7713b1edbc 971
AnnaBridge 171:3a7713b1edbc 972 /**
AnnaBridge 171:3a7713b1edbc 973 * @brief Retrieve the length of the stop bits
AnnaBridge 171:3a7713b1edbc 974 * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
AnnaBridge 171:3a7713b1edbc 975 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 976 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 977 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 978 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 979 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 980 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 981 */
AnnaBridge 171:3a7713b1edbc 982 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 983 {
AnnaBridge 171:3a7713b1edbc 984 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 985 }
AnnaBridge 171:3a7713b1edbc 986
AnnaBridge 171:3a7713b1edbc 987 /**
AnnaBridge 171:3a7713b1edbc 988 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
AnnaBridge 171:3a7713b1edbc 989 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 990 * - Data Width configuration using @ref LL_USART_SetDataWidth() function
AnnaBridge 171:3a7713b1edbc 991 * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
AnnaBridge 171:3a7713b1edbc 992 * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 993 * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 994 * CR1 PCE LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 995 * CR1 M0 LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 996 * CR1 M1 LL_USART_ConfigCharacter\n
AnnaBridge 171:3a7713b1edbc 997 * CR2 STOP LL_USART_ConfigCharacter
AnnaBridge 171:3a7713b1edbc 998 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 999 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1000 * @arg @ref LL_USART_DATAWIDTH_7B
AnnaBridge 171:3a7713b1edbc 1001 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 171:3a7713b1edbc 1002 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 171:3a7713b1edbc 1003 * @param Parity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1004 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 171:3a7713b1edbc 1005 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 171:3a7713b1edbc 1006 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 171:3a7713b1edbc 1007 * @param StopBits This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1008 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 171:3a7713b1edbc 1009 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 171:3a7713b1edbc 1010 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 171:3a7713b1edbc 1011 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 171:3a7713b1edbc 1012 * @retval None
AnnaBridge 171:3a7713b1edbc 1013 */
AnnaBridge 171:3a7713b1edbc 1014 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
AnnaBridge 171:3a7713b1edbc 1015 uint32_t StopBits)
AnnaBridge 171:3a7713b1edbc 1016 {
AnnaBridge 171:3a7713b1edbc 1017 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
AnnaBridge 171:3a7713b1edbc 1018 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 171:3a7713b1edbc 1019 }
AnnaBridge 171:3a7713b1edbc 1020
AnnaBridge 171:3a7713b1edbc 1021 /**
AnnaBridge 171:3a7713b1edbc 1022 * @brief Configure TX/RX pins swapping setting.
AnnaBridge 171:3a7713b1edbc 1023 * @rmtoll CR2 SWAP LL_USART_SetTXRXSwap
AnnaBridge 171:3a7713b1edbc 1024 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1025 * @param SwapConfig This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1026 * @arg @ref LL_USART_TXRX_STANDARD
AnnaBridge 171:3a7713b1edbc 1027 * @arg @ref LL_USART_TXRX_SWAPPED
AnnaBridge 171:3a7713b1edbc 1028 * @retval None
AnnaBridge 171:3a7713b1edbc 1029 */
AnnaBridge 171:3a7713b1edbc 1030 __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
AnnaBridge 171:3a7713b1edbc 1031 {
AnnaBridge 171:3a7713b1edbc 1032 MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
AnnaBridge 171:3a7713b1edbc 1033 }
AnnaBridge 171:3a7713b1edbc 1034
AnnaBridge 171:3a7713b1edbc 1035 /**
AnnaBridge 171:3a7713b1edbc 1036 * @brief Retrieve TX/RX pins swapping configuration.
AnnaBridge 171:3a7713b1edbc 1037 * @rmtoll CR2 SWAP LL_USART_GetTXRXSwap
AnnaBridge 171:3a7713b1edbc 1038 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1039 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1040 * @arg @ref LL_USART_TXRX_STANDARD
AnnaBridge 171:3a7713b1edbc 1041 * @arg @ref LL_USART_TXRX_SWAPPED
AnnaBridge 171:3a7713b1edbc 1042 */
AnnaBridge 171:3a7713b1edbc 1043 __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1044 {
AnnaBridge 171:3a7713b1edbc 1045 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
AnnaBridge 171:3a7713b1edbc 1046 }
AnnaBridge 171:3a7713b1edbc 1047
AnnaBridge 171:3a7713b1edbc 1048 /**
AnnaBridge 171:3a7713b1edbc 1049 * @brief Configure RX pin active level logic
AnnaBridge 171:3a7713b1edbc 1050 * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel
AnnaBridge 171:3a7713b1edbc 1051 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1052 * @param PinInvMethod This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1053 * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
AnnaBridge 171:3a7713b1edbc 1054 * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
AnnaBridge 171:3a7713b1edbc 1055 * @retval None
AnnaBridge 171:3a7713b1edbc 1056 */
AnnaBridge 171:3a7713b1edbc 1057 __STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
AnnaBridge 171:3a7713b1edbc 1058 {
AnnaBridge 171:3a7713b1edbc 1059 MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
AnnaBridge 171:3a7713b1edbc 1060 }
AnnaBridge 171:3a7713b1edbc 1061
AnnaBridge 171:3a7713b1edbc 1062 /**
AnnaBridge 171:3a7713b1edbc 1063 * @brief Retrieve RX pin active level logic configuration
AnnaBridge 171:3a7713b1edbc 1064 * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel
AnnaBridge 171:3a7713b1edbc 1065 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1066 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1067 * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
AnnaBridge 171:3a7713b1edbc 1068 * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
AnnaBridge 171:3a7713b1edbc 1069 */
AnnaBridge 171:3a7713b1edbc 1070 __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1071 {
AnnaBridge 171:3a7713b1edbc 1072 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
AnnaBridge 171:3a7713b1edbc 1073 }
AnnaBridge 171:3a7713b1edbc 1074
AnnaBridge 171:3a7713b1edbc 1075 /**
AnnaBridge 171:3a7713b1edbc 1076 * @brief Configure TX pin active level logic
AnnaBridge 171:3a7713b1edbc 1077 * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel
AnnaBridge 171:3a7713b1edbc 1078 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1079 * @param PinInvMethod This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1080 * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
AnnaBridge 171:3a7713b1edbc 1081 * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
AnnaBridge 171:3a7713b1edbc 1082 * @retval None
AnnaBridge 171:3a7713b1edbc 1083 */
AnnaBridge 171:3a7713b1edbc 1084 __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
AnnaBridge 171:3a7713b1edbc 1085 {
AnnaBridge 171:3a7713b1edbc 1086 MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
AnnaBridge 171:3a7713b1edbc 1087 }
AnnaBridge 171:3a7713b1edbc 1088
AnnaBridge 171:3a7713b1edbc 1089 /**
AnnaBridge 171:3a7713b1edbc 1090 * @brief Retrieve TX pin active level logic configuration
AnnaBridge 171:3a7713b1edbc 1091 * @rmtoll CR2 TXINV LL_USART_GetTXPinLevel
AnnaBridge 171:3a7713b1edbc 1092 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1093 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1094 * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
AnnaBridge 171:3a7713b1edbc 1095 * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
AnnaBridge 171:3a7713b1edbc 1096 */
AnnaBridge 171:3a7713b1edbc 1097 __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1098 {
AnnaBridge 171:3a7713b1edbc 1099 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
AnnaBridge 171:3a7713b1edbc 1100 }
AnnaBridge 171:3a7713b1edbc 1101
AnnaBridge 171:3a7713b1edbc 1102 /**
AnnaBridge 171:3a7713b1edbc 1103 * @brief Configure Binary data logic.
AnnaBridge 171:3a7713b1edbc 1104 * @note Allow to define how Logical data from the data register are send/received :
AnnaBridge 171:3a7713b1edbc 1105 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
AnnaBridge 171:3a7713b1edbc 1106 * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic
AnnaBridge 171:3a7713b1edbc 1107 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1108 * @param DataLogic This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1109 * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
AnnaBridge 171:3a7713b1edbc 1110 * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
AnnaBridge 171:3a7713b1edbc 1111 * @retval None
AnnaBridge 171:3a7713b1edbc 1112 */
AnnaBridge 171:3a7713b1edbc 1113 __STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
AnnaBridge 171:3a7713b1edbc 1114 {
AnnaBridge 171:3a7713b1edbc 1115 MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
AnnaBridge 171:3a7713b1edbc 1116 }
AnnaBridge 171:3a7713b1edbc 1117
AnnaBridge 171:3a7713b1edbc 1118 /**
AnnaBridge 171:3a7713b1edbc 1119 * @brief Retrieve Binary data configuration
AnnaBridge 171:3a7713b1edbc 1120 * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic
AnnaBridge 171:3a7713b1edbc 1121 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1122 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1123 * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
AnnaBridge 171:3a7713b1edbc 1124 * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
AnnaBridge 171:3a7713b1edbc 1125 */
AnnaBridge 171:3a7713b1edbc 1126 __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1127 {
AnnaBridge 171:3a7713b1edbc 1128 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
AnnaBridge 171:3a7713b1edbc 1129 }
AnnaBridge 171:3a7713b1edbc 1130
AnnaBridge 171:3a7713b1edbc 1131 /**
AnnaBridge 171:3a7713b1edbc 1132 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
AnnaBridge 171:3a7713b1edbc 1133 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge 171:3a7713b1edbc 1134 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge 171:3a7713b1edbc 1135 * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder
AnnaBridge 171:3a7713b1edbc 1136 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1137 * @param BitOrder This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1138 * @arg @ref LL_USART_BITORDER_LSBFIRST
AnnaBridge 171:3a7713b1edbc 1139 * @arg @ref LL_USART_BITORDER_MSBFIRST
AnnaBridge 171:3a7713b1edbc 1140 * @retval None
AnnaBridge 171:3a7713b1edbc 1141 */
AnnaBridge 171:3a7713b1edbc 1142 __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
AnnaBridge 171:3a7713b1edbc 1143 {
AnnaBridge 171:3a7713b1edbc 1144 MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
AnnaBridge 171:3a7713b1edbc 1145 }
AnnaBridge 171:3a7713b1edbc 1146
AnnaBridge 171:3a7713b1edbc 1147 /**
AnnaBridge 171:3a7713b1edbc 1148 * @brief Return transfer bit order (either Less or Most Significant Bit First)
AnnaBridge 171:3a7713b1edbc 1149 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge 171:3a7713b1edbc 1150 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge 171:3a7713b1edbc 1151 * @rmtoll CR2 MSBFIRST LL_USART_GetTransferBitOrder
AnnaBridge 171:3a7713b1edbc 1152 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1153 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1154 * @arg @ref LL_USART_BITORDER_LSBFIRST
AnnaBridge 171:3a7713b1edbc 1155 * @arg @ref LL_USART_BITORDER_MSBFIRST
AnnaBridge 171:3a7713b1edbc 1156 */
AnnaBridge 171:3a7713b1edbc 1157 __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1158 {
AnnaBridge 171:3a7713b1edbc 1159 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
AnnaBridge 171:3a7713b1edbc 1160 }
AnnaBridge 171:3a7713b1edbc 1161
AnnaBridge 171:3a7713b1edbc 1162 /**
AnnaBridge 171:3a7713b1edbc 1163 * @brief Enable Auto Baud-Rate Detection
AnnaBridge 171:3a7713b1edbc 1164 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1165 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1166 * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate
AnnaBridge 171:3a7713b1edbc 1167 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1168 * @retval None
AnnaBridge 171:3a7713b1edbc 1169 */
AnnaBridge 171:3a7713b1edbc 1170 __STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1171 {
AnnaBridge 171:3a7713b1edbc 1172 SET_BIT(USARTx->CR2, USART_CR2_ABREN);
AnnaBridge 171:3a7713b1edbc 1173 }
AnnaBridge 171:3a7713b1edbc 1174
AnnaBridge 171:3a7713b1edbc 1175 /**
AnnaBridge 171:3a7713b1edbc 1176 * @brief Disable Auto Baud-Rate Detection
AnnaBridge 171:3a7713b1edbc 1177 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1178 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1179 * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate
AnnaBridge 171:3a7713b1edbc 1180 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1181 * @retval None
AnnaBridge 171:3a7713b1edbc 1182 */
AnnaBridge 171:3a7713b1edbc 1183 __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1184 {
AnnaBridge 171:3a7713b1edbc 1185 CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
AnnaBridge 171:3a7713b1edbc 1186 }
AnnaBridge 171:3a7713b1edbc 1187
AnnaBridge 171:3a7713b1edbc 1188 /**
AnnaBridge 171:3a7713b1edbc 1189 * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled
AnnaBridge 171:3a7713b1edbc 1190 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1191 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1192 * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud
AnnaBridge 171:3a7713b1edbc 1193 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1194 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1195 */
AnnaBridge 171:3a7713b1edbc 1196 __STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1197 {
AnnaBridge 171:3a7713b1edbc 1198 return (READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN));
AnnaBridge 171:3a7713b1edbc 1199 }
AnnaBridge 171:3a7713b1edbc 1200
AnnaBridge 171:3a7713b1edbc 1201 /**
AnnaBridge 171:3a7713b1edbc 1202 * @brief Set Auto Baud-Rate mode bits
AnnaBridge 171:3a7713b1edbc 1203 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1204 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1205 * @rmtoll CR2 ABRMODE LL_USART_SetAutoBaudRateMode
AnnaBridge 171:3a7713b1edbc 1206 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1207 * @param AutoBaudRateMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1208 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
AnnaBridge 171:3a7713b1edbc 1209 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
AnnaBridge 171:3a7713b1edbc 1210 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
AnnaBridge 171:3a7713b1edbc 1211 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
AnnaBridge 171:3a7713b1edbc 1212 * @retval None
AnnaBridge 171:3a7713b1edbc 1213 */
AnnaBridge 171:3a7713b1edbc 1214 __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
AnnaBridge 171:3a7713b1edbc 1215 {
AnnaBridge 171:3a7713b1edbc 1216 MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
AnnaBridge 171:3a7713b1edbc 1217 }
AnnaBridge 171:3a7713b1edbc 1218
AnnaBridge 171:3a7713b1edbc 1219 /**
AnnaBridge 171:3a7713b1edbc 1220 * @brief Return Auto Baud-Rate mode
AnnaBridge 171:3a7713b1edbc 1221 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1222 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1223 * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode
AnnaBridge 171:3a7713b1edbc 1224 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1225 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1226 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
AnnaBridge 171:3a7713b1edbc 1227 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
AnnaBridge 171:3a7713b1edbc 1228 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
AnnaBridge 171:3a7713b1edbc 1229 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
AnnaBridge 171:3a7713b1edbc 1230 */
AnnaBridge 171:3a7713b1edbc 1231 __STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1232 {
AnnaBridge 171:3a7713b1edbc 1233 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
AnnaBridge 171:3a7713b1edbc 1234 }
AnnaBridge 171:3a7713b1edbc 1235
AnnaBridge 171:3a7713b1edbc 1236 /**
AnnaBridge 171:3a7713b1edbc 1237 * @brief Enable Receiver Timeout
AnnaBridge 171:3a7713b1edbc 1238 * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout
AnnaBridge 171:3a7713b1edbc 1239 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1240 * @retval None
AnnaBridge 171:3a7713b1edbc 1241 */
AnnaBridge 171:3a7713b1edbc 1242 __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1243 {
AnnaBridge 171:3a7713b1edbc 1244 SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
AnnaBridge 171:3a7713b1edbc 1245 }
AnnaBridge 171:3a7713b1edbc 1246
AnnaBridge 171:3a7713b1edbc 1247 /**
AnnaBridge 171:3a7713b1edbc 1248 * @brief Disable Receiver Timeout
AnnaBridge 171:3a7713b1edbc 1249 * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout
AnnaBridge 171:3a7713b1edbc 1250 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1251 * @retval None
AnnaBridge 171:3a7713b1edbc 1252 */
AnnaBridge 171:3a7713b1edbc 1253 __STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1254 {
AnnaBridge 171:3a7713b1edbc 1255 CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
AnnaBridge 171:3a7713b1edbc 1256 }
AnnaBridge 171:3a7713b1edbc 1257
AnnaBridge 171:3a7713b1edbc 1258 /**
AnnaBridge 171:3a7713b1edbc 1259 * @brief Indicate if Receiver Timeout feature is enabled
AnnaBridge 171:3a7713b1edbc 1260 * @rmtoll CR2 RTOEN LL_USART_IsEnabledRxTimeout
AnnaBridge 171:3a7713b1edbc 1261 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1262 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1263 */
AnnaBridge 171:3a7713b1edbc 1264 __STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1265 {
AnnaBridge 171:3a7713b1edbc 1266 return (READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN));
AnnaBridge 171:3a7713b1edbc 1267 }
AnnaBridge 171:3a7713b1edbc 1268
AnnaBridge 171:3a7713b1edbc 1269 /**
AnnaBridge 171:3a7713b1edbc 1270 * @brief Set Address of the USART node.
AnnaBridge 171:3a7713b1edbc 1271 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 171:3a7713b1edbc 1272 * for wake up with address mark detection.
AnnaBridge 171:3a7713b1edbc 1273 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
AnnaBridge 171:3a7713b1edbc 1274 * (b7-b4 should be set to 0)
AnnaBridge 171:3a7713b1edbc 1275 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
AnnaBridge 171:3a7713b1edbc 1276 * (This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 171:3a7713b1edbc 1277 * for wake up with 7-bit address mark detection.
AnnaBridge 171:3a7713b1edbc 1278 * The MSB of the character sent by the transmitter should be equal to 1.
AnnaBridge 171:3a7713b1edbc 1279 * It may also be used for character detection during normal reception,
AnnaBridge 171:3a7713b1edbc 1280 * Mute mode inactive (for example, end of block detection in ModBus protocol).
AnnaBridge 171:3a7713b1edbc 1281 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
AnnaBridge 171:3a7713b1edbc 1282 * value and CMF flag is set on match)
AnnaBridge 171:3a7713b1edbc 1283 * @rmtoll CR2 ADD LL_USART_ConfigNodeAddress\n
AnnaBridge 171:3a7713b1edbc 1284 * CR2 ADDM7 LL_USART_ConfigNodeAddress
AnnaBridge 171:3a7713b1edbc 1285 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1286 * @param AddressLen This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1287 * @arg @ref LL_USART_ADDRESS_DETECT_4B
AnnaBridge 171:3a7713b1edbc 1288 * @arg @ref LL_USART_ADDRESS_DETECT_7B
AnnaBridge 171:3a7713b1edbc 1289 * @param NodeAddress 4 or 7 bit Address of the USART node.
AnnaBridge 171:3a7713b1edbc 1290 * @retval None
AnnaBridge 171:3a7713b1edbc 1291 */
AnnaBridge 171:3a7713b1edbc 1292 __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
AnnaBridge 171:3a7713b1edbc 1293 {
AnnaBridge 171:3a7713b1edbc 1294 MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
AnnaBridge 171:3a7713b1edbc 1295 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
AnnaBridge 171:3a7713b1edbc 1296 }
AnnaBridge 171:3a7713b1edbc 1297
AnnaBridge 171:3a7713b1edbc 1298 /**
AnnaBridge 171:3a7713b1edbc 1299 * @brief Return 8 bit Address of the USART node as set in ADD field of CR2.
AnnaBridge 171:3a7713b1edbc 1300 * @note If 4-bit Address Detection is selected in ADDM7,
AnnaBridge 171:3a7713b1edbc 1301 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
AnnaBridge 171:3a7713b1edbc 1302 * If 7-bit Address Detection is selected in ADDM7,
AnnaBridge 171:3a7713b1edbc 1303 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
AnnaBridge 171:3a7713b1edbc 1304 * @rmtoll CR2 ADD LL_USART_GetNodeAddress
AnnaBridge 171:3a7713b1edbc 1305 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1306 * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
AnnaBridge 171:3a7713b1edbc 1307 */
AnnaBridge 171:3a7713b1edbc 1308 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1309 {
AnnaBridge 171:3a7713b1edbc 1310 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
AnnaBridge 171:3a7713b1edbc 1311 }
AnnaBridge 171:3a7713b1edbc 1312
AnnaBridge 171:3a7713b1edbc 1313 /**
AnnaBridge 171:3a7713b1edbc 1314 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
AnnaBridge 171:3a7713b1edbc 1315 * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen
AnnaBridge 171:3a7713b1edbc 1316 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1317 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1318 * @arg @ref LL_USART_ADDRESS_DETECT_4B
AnnaBridge 171:3a7713b1edbc 1319 * @arg @ref LL_USART_ADDRESS_DETECT_7B
AnnaBridge 171:3a7713b1edbc 1320 */
AnnaBridge 171:3a7713b1edbc 1321 __STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1322 {
AnnaBridge 171:3a7713b1edbc 1323 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
AnnaBridge 171:3a7713b1edbc 1324 }
AnnaBridge 171:3a7713b1edbc 1325
AnnaBridge 171:3a7713b1edbc 1326 /**
AnnaBridge 171:3a7713b1edbc 1327 * @brief Enable RTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 1328 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1329 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1330 * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1331 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1332 * @retval None
AnnaBridge 171:3a7713b1edbc 1333 */
AnnaBridge 171:3a7713b1edbc 1334 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1335 {
AnnaBridge 171:3a7713b1edbc 1336 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 171:3a7713b1edbc 1337 }
AnnaBridge 171:3a7713b1edbc 1338
AnnaBridge 171:3a7713b1edbc 1339 /**
AnnaBridge 171:3a7713b1edbc 1340 * @brief Disable RTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 1341 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1342 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1343 * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1344 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1345 * @retval None
AnnaBridge 171:3a7713b1edbc 1346 */
AnnaBridge 171:3a7713b1edbc 1347 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1348 {
AnnaBridge 171:3a7713b1edbc 1349 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 171:3a7713b1edbc 1350 }
AnnaBridge 171:3a7713b1edbc 1351
AnnaBridge 171:3a7713b1edbc 1352 /**
AnnaBridge 171:3a7713b1edbc 1353 * @brief Enable CTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 1354 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1355 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1356 * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1357 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1358 * @retval None
AnnaBridge 171:3a7713b1edbc 1359 */
AnnaBridge 171:3a7713b1edbc 1360 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1361 {
AnnaBridge 171:3a7713b1edbc 1362 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 171:3a7713b1edbc 1363 }
AnnaBridge 171:3a7713b1edbc 1364
AnnaBridge 171:3a7713b1edbc 1365 /**
AnnaBridge 171:3a7713b1edbc 1366 * @brief Disable CTS HW Flow Control
AnnaBridge 171:3a7713b1edbc 1367 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1368 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1369 * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1370 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1371 * @retval None
AnnaBridge 171:3a7713b1edbc 1372 */
AnnaBridge 171:3a7713b1edbc 1373 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1374 {
AnnaBridge 171:3a7713b1edbc 1375 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 171:3a7713b1edbc 1376 }
AnnaBridge 171:3a7713b1edbc 1377
AnnaBridge 171:3a7713b1edbc 1378 /**
AnnaBridge 171:3a7713b1edbc 1379 * @brief Configure HW Flow Control mode (both CTS and RTS)
AnnaBridge 171:3a7713b1edbc 1380 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1381 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1382 * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
AnnaBridge 171:3a7713b1edbc 1383 * CR3 CTSE LL_USART_SetHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1384 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1385 * @param HardwareFlowControl This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1386 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 171:3a7713b1edbc 1387 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 171:3a7713b1edbc 1388 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 171:3a7713b1edbc 1389 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 171:3a7713b1edbc 1390 * @retval None
AnnaBridge 171:3a7713b1edbc 1391 */
AnnaBridge 171:3a7713b1edbc 1392 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
AnnaBridge 171:3a7713b1edbc 1393 {
AnnaBridge 171:3a7713b1edbc 1394 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
AnnaBridge 171:3a7713b1edbc 1395 }
AnnaBridge 171:3a7713b1edbc 1396
AnnaBridge 171:3a7713b1edbc 1397 /**
AnnaBridge 171:3a7713b1edbc 1398 * @brief Return HW Flow Control configuration (both CTS and RTS)
AnnaBridge 171:3a7713b1edbc 1399 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1400 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1401 * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
AnnaBridge 171:3a7713b1edbc 1402 * CR3 CTSE LL_USART_GetHWFlowCtrl
AnnaBridge 171:3a7713b1edbc 1403 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1404 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1405 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 171:3a7713b1edbc 1406 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 171:3a7713b1edbc 1407 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 171:3a7713b1edbc 1408 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 171:3a7713b1edbc 1409 */
AnnaBridge 171:3a7713b1edbc 1410 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1411 {
AnnaBridge 171:3a7713b1edbc 1412 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
AnnaBridge 171:3a7713b1edbc 1413 }
AnnaBridge 171:3a7713b1edbc 1414
AnnaBridge 171:3a7713b1edbc 1415 /**
AnnaBridge 171:3a7713b1edbc 1416 * @brief Enable One bit sampling method
AnnaBridge 171:3a7713b1edbc 1417 * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
AnnaBridge 171:3a7713b1edbc 1418 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1419 * @retval None
AnnaBridge 171:3a7713b1edbc 1420 */
AnnaBridge 171:3a7713b1edbc 1421 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1422 {
AnnaBridge 171:3a7713b1edbc 1423 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 171:3a7713b1edbc 1424 }
AnnaBridge 171:3a7713b1edbc 1425
AnnaBridge 171:3a7713b1edbc 1426 /**
AnnaBridge 171:3a7713b1edbc 1427 * @brief Disable One bit sampling method
AnnaBridge 171:3a7713b1edbc 1428 * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
AnnaBridge 171:3a7713b1edbc 1429 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1430 * @retval None
AnnaBridge 171:3a7713b1edbc 1431 */
AnnaBridge 171:3a7713b1edbc 1432 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1433 {
AnnaBridge 171:3a7713b1edbc 1434 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 171:3a7713b1edbc 1435 }
AnnaBridge 171:3a7713b1edbc 1436
AnnaBridge 171:3a7713b1edbc 1437 /**
AnnaBridge 171:3a7713b1edbc 1438 * @brief Indicate if One bit sampling method is enabled
AnnaBridge 171:3a7713b1edbc 1439 * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
AnnaBridge 171:3a7713b1edbc 1440 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1441 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1442 */
AnnaBridge 171:3a7713b1edbc 1443 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1444 {
AnnaBridge 171:3a7713b1edbc 1445 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
AnnaBridge 171:3a7713b1edbc 1446 }
AnnaBridge 171:3a7713b1edbc 1447
AnnaBridge 171:3a7713b1edbc 1448 /**
AnnaBridge 171:3a7713b1edbc 1449 * @brief Enable Overrun detection
AnnaBridge 171:3a7713b1edbc 1450 * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect
AnnaBridge 171:3a7713b1edbc 1451 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1452 * @retval None
AnnaBridge 171:3a7713b1edbc 1453 */
AnnaBridge 171:3a7713b1edbc 1454 __STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1455 {
AnnaBridge 171:3a7713b1edbc 1456 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge 171:3a7713b1edbc 1457 }
AnnaBridge 171:3a7713b1edbc 1458
AnnaBridge 171:3a7713b1edbc 1459 /**
AnnaBridge 171:3a7713b1edbc 1460 * @brief Disable Overrun detection
AnnaBridge 171:3a7713b1edbc 1461 * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect
AnnaBridge 171:3a7713b1edbc 1462 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1463 * @retval None
AnnaBridge 171:3a7713b1edbc 1464 */
AnnaBridge 171:3a7713b1edbc 1465 __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1466 {
AnnaBridge 171:3a7713b1edbc 1467 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge 171:3a7713b1edbc 1468 }
AnnaBridge 171:3a7713b1edbc 1469
AnnaBridge 171:3a7713b1edbc 1470 /**
AnnaBridge 171:3a7713b1edbc 1471 * @brief Indicate if Overrun detection is enabled
AnnaBridge 171:3a7713b1edbc 1472 * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect
AnnaBridge 171:3a7713b1edbc 1473 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1474 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1475 */
AnnaBridge 171:3a7713b1edbc 1476 __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1477 {
AnnaBridge 171:3a7713b1edbc 1478 return (READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
AnnaBridge 171:3a7713b1edbc 1479 }
AnnaBridge 171:3a7713b1edbc 1480
AnnaBridge 171:3a7713b1edbc 1481
AnnaBridge 171:3a7713b1edbc 1482 /**
AnnaBridge 171:3a7713b1edbc 1483 * @brief Configure USART BRR register for achieving expected Baud Rate value.
AnnaBridge 171:3a7713b1edbc 1484 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
AnnaBridge 171:3a7713b1edbc 1485 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
AnnaBridge 171:3a7713b1edbc 1486 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
AnnaBridge 171:3a7713b1edbc 1487 * (Baud rate value != 0)
AnnaBridge 171:3a7713b1edbc 1488 * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d.
AnnaBridge 171:3a7713b1edbc 1489 * @rmtoll BRR BRR LL_USART_SetBaudRate
AnnaBridge 171:3a7713b1edbc 1490 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1491 * @param PeriphClk Peripheral Clock
AnnaBridge 171:3a7713b1edbc 1492 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1493 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 1494 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 1495 * @param BaudRate Baud Rate
AnnaBridge 171:3a7713b1edbc 1496 * @retval None
AnnaBridge 171:3a7713b1edbc 1497 */
AnnaBridge 171:3a7713b1edbc 1498 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
AnnaBridge 171:3a7713b1edbc 1499 uint32_t BaudRate)
AnnaBridge 171:3a7713b1edbc 1500 {
AnnaBridge 171:3a7713b1edbc 1501 register uint32_t usartdiv = 0x0U;
AnnaBridge 171:3a7713b1edbc 1502 register uint32_t brrtemp = 0x0U;
AnnaBridge 171:3a7713b1edbc 1503
AnnaBridge 171:3a7713b1edbc 1504 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 171:3a7713b1edbc 1505 {
AnnaBridge 171:3a7713b1edbc 1506 usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
AnnaBridge 171:3a7713b1edbc 1507 brrtemp = usartdiv & 0xFFF0U;
AnnaBridge 171:3a7713b1edbc 1508 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
AnnaBridge 171:3a7713b1edbc 1509 USARTx->BRR = brrtemp;
AnnaBridge 171:3a7713b1edbc 1510 }
AnnaBridge 171:3a7713b1edbc 1511 else
AnnaBridge 171:3a7713b1edbc 1512 {
AnnaBridge 171:3a7713b1edbc 1513 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
AnnaBridge 171:3a7713b1edbc 1514 }
AnnaBridge 171:3a7713b1edbc 1515 }
AnnaBridge 171:3a7713b1edbc 1516
AnnaBridge 171:3a7713b1edbc 1517 /**
AnnaBridge 171:3a7713b1edbc 1518 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
AnnaBridge 171:3a7713b1edbc 1519 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
AnnaBridge 171:3a7713b1edbc 1520 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge 171:3a7713b1edbc 1521 * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d.
AnnaBridge 171:3a7713b1edbc 1522 * @rmtoll BRR BRR LL_USART_GetBaudRate
AnnaBridge 171:3a7713b1edbc 1523 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1524 * @param PeriphClk Peripheral Clock
AnnaBridge 171:3a7713b1edbc 1525 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1526 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 171:3a7713b1edbc 1527 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 171:3a7713b1edbc 1528 * @retval Baud Rate
AnnaBridge 171:3a7713b1edbc 1529 */
AnnaBridge 171:3a7713b1edbc 1530 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
AnnaBridge 171:3a7713b1edbc 1531 {
AnnaBridge 171:3a7713b1edbc 1532 register uint32_t usartdiv = 0x0U;
AnnaBridge 171:3a7713b1edbc 1533 register uint32_t brrresult = 0x0U;
AnnaBridge 171:3a7713b1edbc 1534
AnnaBridge 171:3a7713b1edbc 1535 usartdiv = USARTx->BRR;
AnnaBridge 171:3a7713b1edbc 1536
AnnaBridge 171:3a7713b1edbc 1537 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 171:3a7713b1edbc 1538 {
AnnaBridge 171:3a7713b1edbc 1539 if ((usartdiv & 0xFFF7U) != 0U)
AnnaBridge 171:3a7713b1edbc 1540 {
AnnaBridge 171:3a7713b1edbc 1541 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
AnnaBridge 171:3a7713b1edbc 1542 brrresult = (PeriphClk * 2U) / usartdiv;
AnnaBridge 171:3a7713b1edbc 1543 }
AnnaBridge 171:3a7713b1edbc 1544 }
AnnaBridge 171:3a7713b1edbc 1545 else
AnnaBridge 171:3a7713b1edbc 1546 {
AnnaBridge 171:3a7713b1edbc 1547 if ((usartdiv & 0xFFFFU) != 0U)
AnnaBridge 171:3a7713b1edbc 1548 {
AnnaBridge 171:3a7713b1edbc 1549 brrresult = PeriphClk / usartdiv;
AnnaBridge 171:3a7713b1edbc 1550 }
AnnaBridge 171:3a7713b1edbc 1551 }
AnnaBridge 171:3a7713b1edbc 1552 return (brrresult);
AnnaBridge 171:3a7713b1edbc 1553 }
AnnaBridge 171:3a7713b1edbc 1554
AnnaBridge 171:3a7713b1edbc 1555 /**
AnnaBridge 171:3a7713b1edbc 1556 * @brief Set Receiver Time Out Value (expressed in nb of bits duration)
AnnaBridge 171:3a7713b1edbc 1557 * @rmtoll RTOR RTO LL_USART_SetRxTimeout
AnnaBridge 171:3a7713b1edbc 1558 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1559 * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
AnnaBridge 171:3a7713b1edbc 1560 * @retval None
AnnaBridge 171:3a7713b1edbc 1561 */
AnnaBridge 171:3a7713b1edbc 1562 __STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
AnnaBridge 171:3a7713b1edbc 1563 {
AnnaBridge 171:3a7713b1edbc 1564 MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
AnnaBridge 171:3a7713b1edbc 1565 }
AnnaBridge 171:3a7713b1edbc 1566
AnnaBridge 171:3a7713b1edbc 1567 /**
AnnaBridge 171:3a7713b1edbc 1568 * @brief Get Receiver Time Out Value (expressed in nb of bits duration)
AnnaBridge 171:3a7713b1edbc 1569 * @rmtoll RTOR RTO LL_USART_GetRxTimeout
AnnaBridge 171:3a7713b1edbc 1570 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1571 * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
AnnaBridge 171:3a7713b1edbc 1572 */
AnnaBridge 171:3a7713b1edbc 1573 __STATIC_INLINE uint32_t LL_USART_GetRxTimeout(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1574 {
AnnaBridge 171:3a7713b1edbc 1575 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
AnnaBridge 171:3a7713b1edbc 1576 }
AnnaBridge 171:3a7713b1edbc 1577
AnnaBridge 171:3a7713b1edbc 1578 /**
AnnaBridge 171:3a7713b1edbc 1579 * @brief Set Block Length value in reception
AnnaBridge 171:3a7713b1edbc 1580 * @rmtoll RTOR BLEN LL_USART_SetBlockLength
AnnaBridge 171:3a7713b1edbc 1581 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1582 * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1583 * @retval None
AnnaBridge 171:3a7713b1edbc 1584 */
AnnaBridge 171:3a7713b1edbc 1585 __STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
AnnaBridge 171:3a7713b1edbc 1586 {
AnnaBridge 171:3a7713b1edbc 1587 MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos);
AnnaBridge 171:3a7713b1edbc 1588 }
AnnaBridge 171:3a7713b1edbc 1589
AnnaBridge 171:3a7713b1edbc 1590 /**
AnnaBridge 171:3a7713b1edbc 1591 * @brief Get Block Length value in reception
AnnaBridge 171:3a7713b1edbc 1592 * @rmtoll RTOR BLEN LL_USART_GetBlockLength
AnnaBridge 171:3a7713b1edbc 1593 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1594 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1595 */
AnnaBridge 171:3a7713b1edbc 1596 __STATIC_INLINE uint32_t LL_USART_GetBlockLength(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1597 {
AnnaBridge 171:3a7713b1edbc 1598 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos);
AnnaBridge 171:3a7713b1edbc 1599 }
AnnaBridge 171:3a7713b1edbc 1600
AnnaBridge 171:3a7713b1edbc 1601 /**
AnnaBridge 171:3a7713b1edbc 1602 * @}
AnnaBridge 171:3a7713b1edbc 1603 */
AnnaBridge 171:3a7713b1edbc 1604
AnnaBridge 171:3a7713b1edbc 1605 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
AnnaBridge 171:3a7713b1edbc 1606 * @{
AnnaBridge 171:3a7713b1edbc 1607 */
AnnaBridge 171:3a7713b1edbc 1608
AnnaBridge 171:3a7713b1edbc 1609 /**
AnnaBridge 171:3a7713b1edbc 1610 * @brief Enable IrDA mode
AnnaBridge 171:3a7713b1edbc 1611 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1612 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1613 * @rmtoll CR3 IREN LL_USART_EnableIrda
AnnaBridge 171:3a7713b1edbc 1614 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1615 * @retval None
AnnaBridge 171:3a7713b1edbc 1616 */
AnnaBridge 171:3a7713b1edbc 1617 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1618 {
AnnaBridge 171:3a7713b1edbc 1619 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 1620 }
AnnaBridge 171:3a7713b1edbc 1621
AnnaBridge 171:3a7713b1edbc 1622 /**
AnnaBridge 171:3a7713b1edbc 1623 * @brief Disable IrDA mode
AnnaBridge 171:3a7713b1edbc 1624 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1625 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1626 * @rmtoll CR3 IREN LL_USART_DisableIrda
AnnaBridge 171:3a7713b1edbc 1627 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1628 * @retval None
AnnaBridge 171:3a7713b1edbc 1629 */
AnnaBridge 171:3a7713b1edbc 1630 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1631 {
AnnaBridge 171:3a7713b1edbc 1632 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 1633 }
AnnaBridge 171:3a7713b1edbc 1634
AnnaBridge 171:3a7713b1edbc 1635 /**
AnnaBridge 171:3a7713b1edbc 1636 * @brief Indicate if IrDA mode is enabled
AnnaBridge 171:3a7713b1edbc 1637 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1638 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1639 * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
AnnaBridge 171:3a7713b1edbc 1640 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1641 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1642 */
AnnaBridge 171:3a7713b1edbc 1643 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1644 {
AnnaBridge 171:3a7713b1edbc 1645 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 1646 }
AnnaBridge 171:3a7713b1edbc 1647
AnnaBridge 171:3a7713b1edbc 1648 /**
AnnaBridge 171:3a7713b1edbc 1649 * @brief Configure IrDA Power Mode (Normal or Low Power)
AnnaBridge 171:3a7713b1edbc 1650 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1651 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1652 * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
AnnaBridge 171:3a7713b1edbc 1653 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1654 * @param PowerMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1655 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 171:3a7713b1edbc 1656 * @arg @ref LL_USART_IRDA_POWER_LOW
AnnaBridge 171:3a7713b1edbc 1657 * @retval None
AnnaBridge 171:3a7713b1edbc 1658 */
AnnaBridge 171:3a7713b1edbc 1659 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
AnnaBridge 171:3a7713b1edbc 1660 {
AnnaBridge 171:3a7713b1edbc 1661 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
AnnaBridge 171:3a7713b1edbc 1662 }
AnnaBridge 171:3a7713b1edbc 1663
AnnaBridge 171:3a7713b1edbc 1664 /**
AnnaBridge 171:3a7713b1edbc 1665 * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
AnnaBridge 171:3a7713b1edbc 1666 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1667 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1668 * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
AnnaBridge 171:3a7713b1edbc 1669 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1670 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1671 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 171:3a7713b1edbc 1672 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 171:3a7713b1edbc 1673 */
AnnaBridge 171:3a7713b1edbc 1674 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1675 {
AnnaBridge 171:3a7713b1edbc 1676 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
AnnaBridge 171:3a7713b1edbc 1677 }
AnnaBridge 171:3a7713b1edbc 1678
AnnaBridge 171:3a7713b1edbc 1679 /**
AnnaBridge 171:3a7713b1edbc 1680 * @brief Set Irda prescaler value, used for dividing the USART clock source
AnnaBridge 171:3a7713b1edbc 1681 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 171:3a7713b1edbc 1682 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1683 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1684 * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
AnnaBridge 171:3a7713b1edbc 1685 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1686 * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1687 * @retval None
AnnaBridge 171:3a7713b1edbc 1688 */
AnnaBridge 171:3a7713b1edbc 1689 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 171:3a7713b1edbc 1690 {
AnnaBridge 171:3a7713b1edbc 1691 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 171:3a7713b1edbc 1692 }
AnnaBridge 171:3a7713b1edbc 1693
AnnaBridge 171:3a7713b1edbc 1694 /**
AnnaBridge 171:3a7713b1edbc 1695 * @brief Return Irda prescaler value, used for dividing the USART clock source
AnnaBridge 171:3a7713b1edbc 1696 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 171:3a7713b1edbc 1697 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1698 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1699 * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
AnnaBridge 171:3a7713b1edbc 1700 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1701 * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 171:3a7713b1edbc 1702 */
AnnaBridge 171:3a7713b1edbc 1703 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1704 {
AnnaBridge 171:3a7713b1edbc 1705 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 171:3a7713b1edbc 1706 }
AnnaBridge 171:3a7713b1edbc 1707
AnnaBridge 171:3a7713b1edbc 1708 /**
AnnaBridge 171:3a7713b1edbc 1709 * @}
AnnaBridge 171:3a7713b1edbc 1710 */
AnnaBridge 171:3a7713b1edbc 1711
AnnaBridge 171:3a7713b1edbc 1712 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
AnnaBridge 171:3a7713b1edbc 1713 * @{
AnnaBridge 171:3a7713b1edbc 1714 */
AnnaBridge 171:3a7713b1edbc 1715
AnnaBridge 171:3a7713b1edbc 1716 /**
AnnaBridge 171:3a7713b1edbc 1717 * @brief Enable Smartcard NACK transmission
AnnaBridge 171:3a7713b1edbc 1718 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1719 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1720 * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1721 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1722 * @retval None
AnnaBridge 171:3a7713b1edbc 1723 */
AnnaBridge 171:3a7713b1edbc 1724 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1725 {
AnnaBridge 171:3a7713b1edbc 1726 SET_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 171:3a7713b1edbc 1727 }
AnnaBridge 171:3a7713b1edbc 1728
AnnaBridge 171:3a7713b1edbc 1729 /**
AnnaBridge 171:3a7713b1edbc 1730 * @brief Disable Smartcard NACK transmission
AnnaBridge 171:3a7713b1edbc 1731 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1732 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1733 * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1734 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1735 * @retval None
AnnaBridge 171:3a7713b1edbc 1736 */
AnnaBridge 171:3a7713b1edbc 1737 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1738 {
AnnaBridge 171:3a7713b1edbc 1739 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 171:3a7713b1edbc 1740 }
AnnaBridge 171:3a7713b1edbc 1741
AnnaBridge 171:3a7713b1edbc 1742 /**
AnnaBridge 171:3a7713b1edbc 1743 * @brief Indicate if Smartcard NACK transmission is enabled
AnnaBridge 171:3a7713b1edbc 1744 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1745 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1746 * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
AnnaBridge 171:3a7713b1edbc 1747 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1748 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1749 */
AnnaBridge 171:3a7713b1edbc 1750 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1751 {
AnnaBridge 171:3a7713b1edbc 1752 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
AnnaBridge 171:3a7713b1edbc 1753 }
AnnaBridge 171:3a7713b1edbc 1754
AnnaBridge 171:3a7713b1edbc 1755 /**
AnnaBridge 171:3a7713b1edbc 1756 * @brief Enable Smartcard mode
AnnaBridge 171:3a7713b1edbc 1757 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1758 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1759 * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
AnnaBridge 171:3a7713b1edbc 1760 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1761 * @retval None
AnnaBridge 171:3a7713b1edbc 1762 */
AnnaBridge 171:3a7713b1edbc 1763 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1764 {
AnnaBridge 171:3a7713b1edbc 1765 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 1766 }
AnnaBridge 171:3a7713b1edbc 1767
AnnaBridge 171:3a7713b1edbc 1768 /**
AnnaBridge 171:3a7713b1edbc 1769 * @brief Disable Smartcard mode
AnnaBridge 171:3a7713b1edbc 1770 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1771 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1772 * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
AnnaBridge 171:3a7713b1edbc 1773 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1774 * @retval None
AnnaBridge 171:3a7713b1edbc 1775 */
AnnaBridge 171:3a7713b1edbc 1776 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1777 {
AnnaBridge 171:3a7713b1edbc 1778 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 1779 }
AnnaBridge 171:3a7713b1edbc 1780
AnnaBridge 171:3a7713b1edbc 1781 /**
AnnaBridge 171:3a7713b1edbc 1782 * @brief Indicate if Smartcard mode is enabled
AnnaBridge 171:3a7713b1edbc 1783 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1784 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1785 * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
AnnaBridge 171:3a7713b1edbc 1786 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1787 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1788 */
AnnaBridge 171:3a7713b1edbc 1789 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1790 {
AnnaBridge 171:3a7713b1edbc 1791 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
AnnaBridge 171:3a7713b1edbc 1792 }
AnnaBridge 171:3a7713b1edbc 1793
AnnaBridge 171:3a7713b1edbc 1794 /**
AnnaBridge 171:3a7713b1edbc 1795 * @brief Set Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
AnnaBridge 171:3a7713b1edbc 1796 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1797 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1798 * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mode.
AnnaBridge 171:3a7713b1edbc 1799 * In transmission mode, it specifies the number of automatic retransmission retries, before
AnnaBridge 171:3a7713b1edbc 1800 * generating a transmission error (FE bit set).
AnnaBridge 171:3a7713b1edbc 1801 * In reception mode, it specifies the number or erroneous reception trials, before generating a
AnnaBridge 171:3a7713b1edbc 1802 * reception error (RXNE and PE bits set)
AnnaBridge 171:3a7713b1edbc 1803 * @rmtoll CR3 SCARCNT LL_USART_SetSmartcardAutoRetryCount
AnnaBridge 171:3a7713b1edbc 1804 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1805 * @param AutoRetryCount Value between Min_Data=0 and Max_Data=7
AnnaBridge 171:3a7713b1edbc 1806 * @retval None
AnnaBridge 171:3a7713b1edbc 1807 */
AnnaBridge 171:3a7713b1edbc 1808 __STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
AnnaBridge 171:3a7713b1edbc 1809 {
AnnaBridge 171:3a7713b1edbc 1810 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);
AnnaBridge 171:3a7713b1edbc 1811 }
AnnaBridge 171:3a7713b1edbc 1812
AnnaBridge 171:3a7713b1edbc 1813 /**
AnnaBridge 171:3a7713b1edbc 1814 * @brief Return Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
AnnaBridge 171:3a7713b1edbc 1815 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1816 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1817 * @rmtoll CR3 SCARCNT LL_USART_GetSmartcardAutoRetryCount
AnnaBridge 171:3a7713b1edbc 1818 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1819 * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7)
AnnaBridge 171:3a7713b1edbc 1820 */
AnnaBridge 171:3a7713b1edbc 1821 __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1822 {
AnnaBridge 171:3a7713b1edbc 1823 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
AnnaBridge 171:3a7713b1edbc 1824 }
AnnaBridge 171:3a7713b1edbc 1825
AnnaBridge 171:3a7713b1edbc 1826 /**
AnnaBridge 171:3a7713b1edbc 1827 * @brief Set Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 171:3a7713b1edbc 1828 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 171:3a7713b1edbc 1829 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1830 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1831 * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
AnnaBridge 171:3a7713b1edbc 1832 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1833 * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 1834 * @retval None
AnnaBridge 171:3a7713b1edbc 1835 */
AnnaBridge 171:3a7713b1edbc 1836 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 171:3a7713b1edbc 1837 {
AnnaBridge 171:3a7713b1edbc 1838 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 171:3a7713b1edbc 1839 }
AnnaBridge 171:3a7713b1edbc 1840
AnnaBridge 171:3a7713b1edbc 1841 /**
AnnaBridge 171:3a7713b1edbc 1842 * @brief Return Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 171:3a7713b1edbc 1843 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 171:3a7713b1edbc 1844 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1845 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1846 * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
AnnaBridge 171:3a7713b1edbc 1847 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1848 * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
AnnaBridge 171:3a7713b1edbc 1849 */
AnnaBridge 171:3a7713b1edbc 1850 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1851 {
AnnaBridge 171:3a7713b1edbc 1852 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 171:3a7713b1edbc 1853 }
AnnaBridge 171:3a7713b1edbc 1854
AnnaBridge 171:3a7713b1edbc 1855 /**
AnnaBridge 171:3a7713b1edbc 1856 * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 171:3a7713b1edbc 1857 * (GT[7:0] bits : Guard time value)
AnnaBridge 171:3a7713b1edbc 1858 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1859 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1860 * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
AnnaBridge 171:3a7713b1edbc 1861 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1862 * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 1863 * @retval None
AnnaBridge 171:3a7713b1edbc 1864 */
AnnaBridge 171:3a7713b1edbc 1865 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
AnnaBridge 171:3a7713b1edbc 1866 {
AnnaBridge 171:3a7713b1edbc 1867 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_GTPR_GT_Pos);
AnnaBridge 171:3a7713b1edbc 1868 }
AnnaBridge 171:3a7713b1edbc 1869
AnnaBridge 171:3a7713b1edbc 1870 /**
AnnaBridge 171:3a7713b1edbc 1871 * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 171:3a7713b1edbc 1872 * (GT[7:0] bits : Guard time value)
AnnaBridge 171:3a7713b1edbc 1873 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1874 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1875 * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
AnnaBridge 171:3a7713b1edbc 1876 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1877 * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 171:3a7713b1edbc 1878 */
AnnaBridge 171:3a7713b1edbc 1879 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1880 {
AnnaBridge 171:3a7713b1edbc 1881 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
AnnaBridge 171:3a7713b1edbc 1882 }
AnnaBridge 171:3a7713b1edbc 1883
AnnaBridge 171:3a7713b1edbc 1884 /**
AnnaBridge 171:3a7713b1edbc 1885 * @}
AnnaBridge 171:3a7713b1edbc 1886 */
AnnaBridge 171:3a7713b1edbc 1887
AnnaBridge 171:3a7713b1edbc 1888 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
AnnaBridge 171:3a7713b1edbc 1889 * @{
AnnaBridge 171:3a7713b1edbc 1890 */
AnnaBridge 171:3a7713b1edbc 1891
AnnaBridge 171:3a7713b1edbc 1892 /**
AnnaBridge 171:3a7713b1edbc 1893 * @brief Enable Single Wire Half-Duplex mode
AnnaBridge 171:3a7713b1edbc 1894 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1895 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1896 * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
AnnaBridge 171:3a7713b1edbc 1897 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1898 * @retval None
AnnaBridge 171:3a7713b1edbc 1899 */
AnnaBridge 171:3a7713b1edbc 1900 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1901 {
AnnaBridge 171:3a7713b1edbc 1902 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 1903 }
AnnaBridge 171:3a7713b1edbc 1904
AnnaBridge 171:3a7713b1edbc 1905 /**
AnnaBridge 171:3a7713b1edbc 1906 * @brief Disable Single Wire Half-Duplex mode
AnnaBridge 171:3a7713b1edbc 1907 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1908 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1909 * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
AnnaBridge 171:3a7713b1edbc 1910 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1911 * @retval None
AnnaBridge 171:3a7713b1edbc 1912 */
AnnaBridge 171:3a7713b1edbc 1913 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1914 {
AnnaBridge 171:3a7713b1edbc 1915 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 1916 }
AnnaBridge 171:3a7713b1edbc 1917
AnnaBridge 171:3a7713b1edbc 1918 /**
AnnaBridge 171:3a7713b1edbc 1919 * @brief Indicate if Single Wire Half-Duplex mode is enabled
AnnaBridge 171:3a7713b1edbc 1920 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1921 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1922 * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
AnnaBridge 171:3a7713b1edbc 1923 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1924 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 1925 */
AnnaBridge 171:3a7713b1edbc 1926 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1927 {
AnnaBridge 171:3a7713b1edbc 1928 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 1929 }
AnnaBridge 171:3a7713b1edbc 1930
AnnaBridge 171:3a7713b1edbc 1931 /**
AnnaBridge 171:3a7713b1edbc 1932 * @}
AnnaBridge 171:3a7713b1edbc 1933 */
AnnaBridge 171:3a7713b1edbc 1934
AnnaBridge 171:3a7713b1edbc 1935 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
AnnaBridge 171:3a7713b1edbc 1936 * @{
AnnaBridge 171:3a7713b1edbc 1937 */
AnnaBridge 171:3a7713b1edbc 1938
AnnaBridge 171:3a7713b1edbc 1939 /**
AnnaBridge 171:3a7713b1edbc 1940 * @brief Set LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 1941 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1942 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1943 * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
AnnaBridge 171:3a7713b1edbc 1944 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1945 * @param LINBDLength This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1946 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 171:3a7713b1edbc 1947 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 171:3a7713b1edbc 1948 * @retval None
AnnaBridge 171:3a7713b1edbc 1949 */
AnnaBridge 171:3a7713b1edbc 1950 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
AnnaBridge 171:3a7713b1edbc 1951 {
AnnaBridge 171:3a7713b1edbc 1952 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
AnnaBridge 171:3a7713b1edbc 1953 }
AnnaBridge 171:3a7713b1edbc 1954
AnnaBridge 171:3a7713b1edbc 1955 /**
AnnaBridge 171:3a7713b1edbc 1956 * @brief Return LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 1957 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1958 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1959 * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
AnnaBridge 171:3a7713b1edbc 1960 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1961 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 1962 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 171:3a7713b1edbc 1963 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 171:3a7713b1edbc 1964 */
AnnaBridge 171:3a7713b1edbc 1965 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1966 {
AnnaBridge 171:3a7713b1edbc 1967 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
AnnaBridge 171:3a7713b1edbc 1968 }
AnnaBridge 171:3a7713b1edbc 1969
AnnaBridge 171:3a7713b1edbc 1970 /**
AnnaBridge 171:3a7713b1edbc 1971 * @brief Enable LIN mode
AnnaBridge 171:3a7713b1edbc 1972 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1973 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1974 * @rmtoll CR2 LINEN LL_USART_EnableLIN
AnnaBridge 171:3a7713b1edbc 1975 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1976 * @retval None
AnnaBridge 171:3a7713b1edbc 1977 */
AnnaBridge 171:3a7713b1edbc 1978 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1979 {
AnnaBridge 171:3a7713b1edbc 1980 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 1981 }
AnnaBridge 171:3a7713b1edbc 1982
AnnaBridge 171:3a7713b1edbc 1983 /**
AnnaBridge 171:3a7713b1edbc 1984 * @brief Disable LIN mode
AnnaBridge 171:3a7713b1edbc 1985 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1986 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 1987 * @rmtoll CR2 LINEN LL_USART_DisableLIN
AnnaBridge 171:3a7713b1edbc 1988 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 1989 * @retval None
AnnaBridge 171:3a7713b1edbc 1990 */
AnnaBridge 171:3a7713b1edbc 1991 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 1992 {
AnnaBridge 171:3a7713b1edbc 1993 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 1994 }
AnnaBridge 171:3a7713b1edbc 1995
AnnaBridge 171:3a7713b1edbc 1996 /**
AnnaBridge 171:3a7713b1edbc 1997 * @brief Indicate if LIN mode is enabled
AnnaBridge 171:3a7713b1edbc 1998 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 1999 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2000 * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
AnnaBridge 171:3a7713b1edbc 2001 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2002 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2003 */
AnnaBridge 171:3a7713b1edbc 2004 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2005 {
AnnaBridge 171:3a7713b1edbc 2006 return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 2007 }
AnnaBridge 171:3a7713b1edbc 2008
AnnaBridge 171:3a7713b1edbc 2009 /**
AnnaBridge 171:3a7713b1edbc 2010 * @}
AnnaBridge 171:3a7713b1edbc 2011 */
AnnaBridge 171:3a7713b1edbc 2012
AnnaBridge 171:3a7713b1edbc 2013 /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
AnnaBridge 171:3a7713b1edbc 2014 * @{
AnnaBridge 171:3a7713b1edbc 2015 */
AnnaBridge 171:3a7713b1edbc 2016
AnnaBridge 171:3a7713b1edbc 2017 /**
AnnaBridge 171:3a7713b1edbc 2018 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge 171:3a7713b1edbc 2019 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2020 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2021 * @rmtoll CR1 DEDT LL_USART_SetDEDeassertionTime
AnnaBridge 171:3a7713b1edbc 2022 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2023 * @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 2024 * @retval None
AnnaBridge 171:3a7713b1edbc 2025 */
AnnaBridge 171:3a7713b1edbc 2026 __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
AnnaBridge 171:3a7713b1edbc 2027 {
AnnaBridge 171:3a7713b1edbc 2028 MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
AnnaBridge 171:3a7713b1edbc 2029 }
AnnaBridge 171:3a7713b1edbc 2030
AnnaBridge 171:3a7713b1edbc 2031 /**
AnnaBridge 171:3a7713b1edbc 2032 * @brief Return DEDT (Driver Enable De-Assertion Time)
AnnaBridge 171:3a7713b1edbc 2033 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2034 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2035 * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime
AnnaBridge 171:3a7713b1edbc 2036 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2037 * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 2038 */
AnnaBridge 171:3a7713b1edbc 2039 __STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2040 {
AnnaBridge 171:3a7713b1edbc 2041 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
AnnaBridge 171:3a7713b1edbc 2042 }
AnnaBridge 171:3a7713b1edbc 2043
AnnaBridge 171:3a7713b1edbc 2044 /**
AnnaBridge 171:3a7713b1edbc 2045 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge 171:3a7713b1edbc 2046 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2047 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2048 * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime
AnnaBridge 171:3a7713b1edbc 2049 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2050 * @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 2051 * @retval None
AnnaBridge 171:3a7713b1edbc 2052 */
AnnaBridge 171:3a7713b1edbc 2053 __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
AnnaBridge 171:3a7713b1edbc 2054 {
AnnaBridge 171:3a7713b1edbc 2055 MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
AnnaBridge 171:3a7713b1edbc 2056 }
AnnaBridge 171:3a7713b1edbc 2057
AnnaBridge 171:3a7713b1edbc 2058 /**
AnnaBridge 171:3a7713b1edbc 2059 * @brief Return DEAT (Driver Enable Assertion Time)
AnnaBridge 171:3a7713b1edbc 2060 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2061 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2062 * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime
AnnaBridge 171:3a7713b1edbc 2063 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2064 * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
AnnaBridge 171:3a7713b1edbc 2065 */
AnnaBridge 171:3a7713b1edbc 2066 __STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2067 {
AnnaBridge 171:3a7713b1edbc 2068 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
AnnaBridge 171:3a7713b1edbc 2069 }
AnnaBridge 171:3a7713b1edbc 2070
AnnaBridge 171:3a7713b1edbc 2071 /**
AnnaBridge 171:3a7713b1edbc 2072 * @brief Enable Driver Enable (DE) Mode
AnnaBridge 171:3a7713b1edbc 2073 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2074 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2075 * @rmtoll CR3 DEM LL_USART_EnableDEMode
AnnaBridge 171:3a7713b1edbc 2076 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2077 * @retval None
AnnaBridge 171:3a7713b1edbc 2078 */
AnnaBridge 171:3a7713b1edbc 2079 __STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2080 {
AnnaBridge 171:3a7713b1edbc 2081 SET_BIT(USARTx->CR3, USART_CR3_DEM);
AnnaBridge 171:3a7713b1edbc 2082 }
AnnaBridge 171:3a7713b1edbc 2083
AnnaBridge 171:3a7713b1edbc 2084 /**
AnnaBridge 171:3a7713b1edbc 2085 * @brief Disable Driver Enable (DE) Mode
AnnaBridge 171:3a7713b1edbc 2086 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2087 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2088 * @rmtoll CR3 DEM LL_USART_DisableDEMode
AnnaBridge 171:3a7713b1edbc 2089 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2090 * @retval None
AnnaBridge 171:3a7713b1edbc 2091 */
AnnaBridge 171:3a7713b1edbc 2092 __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2093 {
AnnaBridge 171:3a7713b1edbc 2094 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
AnnaBridge 171:3a7713b1edbc 2095 }
AnnaBridge 171:3a7713b1edbc 2096
AnnaBridge 171:3a7713b1edbc 2097 /**
AnnaBridge 171:3a7713b1edbc 2098 * @brief Indicate if Driver Enable (DE) Mode is enabled
AnnaBridge 171:3a7713b1edbc 2099 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2100 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2101 * @rmtoll CR3 DEM LL_USART_IsEnabledDEMode
AnnaBridge 171:3a7713b1edbc 2102 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2103 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2104 */
AnnaBridge 171:3a7713b1edbc 2105 __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2106 {
AnnaBridge 171:3a7713b1edbc 2107 return (READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
AnnaBridge 171:3a7713b1edbc 2108 }
AnnaBridge 171:3a7713b1edbc 2109
AnnaBridge 171:3a7713b1edbc 2110 /**
AnnaBridge 171:3a7713b1edbc 2111 * @brief Select Driver Enable Polarity
AnnaBridge 171:3a7713b1edbc 2112 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2113 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2114 * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity
AnnaBridge 171:3a7713b1edbc 2115 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2116 * @param Polarity This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 2117 * @arg @ref LL_USART_DE_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 2118 * @arg @ref LL_USART_DE_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 2119 * @retval None
AnnaBridge 171:3a7713b1edbc 2120 */
AnnaBridge 171:3a7713b1edbc 2121 __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
AnnaBridge 171:3a7713b1edbc 2122 {
AnnaBridge 171:3a7713b1edbc 2123 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
AnnaBridge 171:3a7713b1edbc 2124 }
AnnaBridge 171:3a7713b1edbc 2125
AnnaBridge 171:3a7713b1edbc 2126 /**
AnnaBridge 171:3a7713b1edbc 2127 * @brief Return Driver Enable Polarity
AnnaBridge 171:3a7713b1edbc 2128 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2129 * Driver Enable feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2130 * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity
AnnaBridge 171:3a7713b1edbc 2131 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2132 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 2133 * @arg @ref LL_USART_DE_POLARITY_HIGH
AnnaBridge 171:3a7713b1edbc 2134 * @arg @ref LL_USART_DE_POLARITY_LOW
AnnaBridge 171:3a7713b1edbc 2135 */
AnnaBridge 171:3a7713b1edbc 2136 __STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2137 {
AnnaBridge 171:3a7713b1edbc 2138 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
AnnaBridge 171:3a7713b1edbc 2139 }
AnnaBridge 171:3a7713b1edbc 2140
AnnaBridge 171:3a7713b1edbc 2141 /**
AnnaBridge 171:3a7713b1edbc 2142 * @}
AnnaBridge 171:3a7713b1edbc 2143 */
AnnaBridge 171:3a7713b1edbc 2144
AnnaBridge 171:3a7713b1edbc 2145 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
AnnaBridge 171:3a7713b1edbc 2146 * @{
AnnaBridge 171:3a7713b1edbc 2147 */
AnnaBridge 171:3a7713b1edbc 2148
AnnaBridge 171:3a7713b1edbc 2149 /**
AnnaBridge 171:3a7713b1edbc 2150 * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
AnnaBridge 171:3a7713b1edbc 2151 * @note In UART mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2152 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2153 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2154 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2155 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2156 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2157 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2158 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2159 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2160 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2161 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2162 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2163 * @note Other remaining configurations items related to Asynchronous Mode
AnnaBridge 171:3a7713b1edbc 2164 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2165 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2166 * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 2167 * CR2 CLKEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 2168 * CR3 SCEN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 2169 * CR3 IREN LL_USART_ConfigAsyncMode\n
AnnaBridge 171:3a7713b1edbc 2170 * CR3 HDSEL LL_USART_ConfigAsyncMode
AnnaBridge 171:3a7713b1edbc 2171 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2172 * @retval None
AnnaBridge 171:3a7713b1edbc 2173 */
AnnaBridge 171:3a7713b1edbc 2174 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2175 {
AnnaBridge 171:3a7713b1edbc 2176 /* In Asynchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2177 - LINEN, CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2178 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2179 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 2180 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 2181 }
AnnaBridge 171:3a7713b1edbc 2182
AnnaBridge 171:3a7713b1edbc 2183 /**
AnnaBridge 171:3a7713b1edbc 2184 * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
AnnaBridge 171:3a7713b1edbc 2185 * @note In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2186 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2187 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2188 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2189 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2190 * This function also sets the USART in Synchronous mode.
AnnaBridge 171:3a7713b1edbc 2191 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2192 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2193 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2194 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2195 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2196 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2197 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2198 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2199 * @note Other remaining configurations items related to Synchronous Mode
AnnaBridge 171:3a7713b1edbc 2200 * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2201 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2202 * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 2203 * CR2 CLKEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 2204 * CR3 SCEN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 2205 * CR3 IREN LL_USART_ConfigSyncMode\n
AnnaBridge 171:3a7713b1edbc 2206 * CR3 HDSEL LL_USART_ConfigSyncMode
AnnaBridge 171:3a7713b1edbc 2207 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2208 * @retval None
AnnaBridge 171:3a7713b1edbc 2209 */
AnnaBridge 171:3a7713b1edbc 2210 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2211 {
AnnaBridge 171:3a7713b1edbc 2212 /* In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2213 - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2214 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2215 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 2216 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 2217 /* set the UART/USART in Synchronous mode */
AnnaBridge 171:3a7713b1edbc 2218 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 171:3a7713b1edbc 2219 }
AnnaBridge 171:3a7713b1edbc 2220
AnnaBridge 171:3a7713b1edbc 2221 /**
AnnaBridge 171:3a7713b1edbc 2222 * @brief Perform basic configuration of USART for enabling use in LIN Mode
AnnaBridge 171:3a7713b1edbc 2223 * @note In LIN mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2224 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2225 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2226 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2227 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2228 * This function also set the UART/USART in LIN mode.
AnnaBridge 171:3a7713b1edbc 2229 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2230 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2231 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2232 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2233 * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 2234 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2235 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2236 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2237 * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
AnnaBridge 171:3a7713b1edbc 2238 * @note Other remaining configurations items related to LIN Mode
AnnaBridge 171:3a7713b1edbc 2239 * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2240 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2241 * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 2242 * CR2 STOP LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 2243 * CR2 LINEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 2244 * CR3 IREN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 2245 * CR3 SCEN LL_USART_ConfigLINMode\n
AnnaBridge 171:3a7713b1edbc 2246 * CR3 HDSEL LL_USART_ConfigLINMode
AnnaBridge 171:3a7713b1edbc 2247 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2248 * @retval None
AnnaBridge 171:3a7713b1edbc 2249 */
AnnaBridge 171:3a7713b1edbc 2250 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2251 {
AnnaBridge 171:3a7713b1edbc 2252 /* In LIN mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2253 - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2254 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2255 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 2256 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 2257 /* Set the UART/USART in LIN mode */
AnnaBridge 171:3a7713b1edbc 2258 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 171:3a7713b1edbc 2259 }
AnnaBridge 171:3a7713b1edbc 2260
AnnaBridge 171:3a7713b1edbc 2261 /**
AnnaBridge 171:3a7713b1edbc 2262 * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
AnnaBridge 171:3a7713b1edbc 2263 * @note In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2264 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2265 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2266 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2267 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2268 * This function also sets the UART/USART in Half Duplex mode.
AnnaBridge 171:3a7713b1edbc 2269 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2270 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2271 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2272 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2273 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2274 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2275 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2276 * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2277 * @note Other remaining configurations items related to Half Duplex Mode
AnnaBridge 171:3a7713b1edbc 2278 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2279 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2280 * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 2281 * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 2282 * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 2283 * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 171:3a7713b1edbc 2284 * CR3 IREN LL_USART_ConfigHalfDuplexMode
AnnaBridge 171:3a7713b1edbc 2285 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2286 * @retval None
AnnaBridge 171:3a7713b1edbc 2287 */
AnnaBridge 171:3a7713b1edbc 2288 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2289 {
AnnaBridge 171:3a7713b1edbc 2290 /* In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2291 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2292 - SCEN and IREN bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2293 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 2294 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 2295 /* set the UART/USART in Half Duplex mode */
AnnaBridge 171:3a7713b1edbc 2296 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 171:3a7713b1edbc 2297 }
AnnaBridge 171:3a7713b1edbc 2298
AnnaBridge 171:3a7713b1edbc 2299 /**
AnnaBridge 171:3a7713b1edbc 2300 * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
AnnaBridge 171:3a7713b1edbc 2301 * @note In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2302 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2303 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2304 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2305 * This function also configures Stop bits to 1.5 bits and
AnnaBridge 171:3a7713b1edbc 2306 * sets the USART in Smartcard mode (SCEN bit).
AnnaBridge 171:3a7713b1edbc 2307 * Clock Output is also enabled (CLKEN).
AnnaBridge 171:3a7713b1edbc 2308 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2309 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2310 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2311 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2312 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2313 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2314 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 2315 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2316 * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2317 * @note Other remaining configurations items related to Smartcard Mode
AnnaBridge 171:3a7713b1edbc 2318 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2319 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2320 * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 2321 * CR2 STOP LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 2322 * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 2323 * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
AnnaBridge 171:3a7713b1edbc 2324 * CR3 SCEN LL_USART_ConfigSmartcardMode
AnnaBridge 171:3a7713b1edbc 2325 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2326 * @retval None
AnnaBridge 171:3a7713b1edbc 2327 */
AnnaBridge 171:3a7713b1edbc 2328 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2329 {
AnnaBridge 171:3a7713b1edbc 2330 /* In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2331 - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2332 - IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2333 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 171:3a7713b1edbc 2334 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 2335 /* Configure Stop bits to 1.5 bits */
AnnaBridge 171:3a7713b1edbc 2336 /* Synchronous mode is activated by default */
AnnaBridge 171:3a7713b1edbc 2337 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 2338 /* set the UART/USART in Smartcard mode */
AnnaBridge 171:3a7713b1edbc 2339 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 171:3a7713b1edbc 2340 }
AnnaBridge 171:3a7713b1edbc 2341
AnnaBridge 171:3a7713b1edbc 2342 /**
AnnaBridge 171:3a7713b1edbc 2343 * @brief Perform basic configuration of USART for enabling use in Irda Mode
AnnaBridge 171:3a7713b1edbc 2344 * @note In IRDA mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2345 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2346 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2347 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2348 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2349 * This function also sets the UART/USART in IRDA mode (IREN bit).
AnnaBridge 171:3a7713b1edbc 2350 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2351 * IrDA feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2352 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2353 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2354 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2355 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2356 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2357 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 171:3a7713b1edbc 2358 * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
AnnaBridge 171:3a7713b1edbc 2359 * @note Other remaining configurations items related to Irda Mode
AnnaBridge 171:3a7713b1edbc 2360 * (as Baud Rate, Word length, Power mode, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2361 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2362 * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 2363 * CR2 CLKEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 2364 * CR2 STOP LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 2365 * CR3 SCEN LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 2366 * CR3 HDSEL LL_USART_ConfigIrdaMode\n
AnnaBridge 171:3a7713b1edbc 2367 * CR3 IREN LL_USART_ConfigIrdaMode
AnnaBridge 171:3a7713b1edbc 2368 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2369 * @retval None
AnnaBridge 171:3a7713b1edbc 2370 */
AnnaBridge 171:3a7713b1edbc 2371 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2372 {
AnnaBridge 171:3a7713b1edbc 2373 /* In IRDA mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2374 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2375 - SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2376 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 171:3a7713b1edbc 2377 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 171:3a7713b1edbc 2378 /* set the UART/USART in IRDA mode */
AnnaBridge 171:3a7713b1edbc 2379 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 171:3a7713b1edbc 2380 }
AnnaBridge 171:3a7713b1edbc 2381
AnnaBridge 171:3a7713b1edbc 2382 /**
AnnaBridge 171:3a7713b1edbc 2383 * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
AnnaBridge 171:3a7713b1edbc 2384 * (several USARTs connected in a network, one of the USARTs can be the master,
AnnaBridge 171:3a7713b1edbc 2385 * its TX output connected to the RX inputs of the other slaves USARTs).
AnnaBridge 171:3a7713b1edbc 2386 * @note In MultiProcessor mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2387 * - LINEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2388 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2389 * - SCEN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2390 * - IREN bit in the USART_CR3 register,
AnnaBridge 171:3a7713b1edbc 2391 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 171:3a7713b1edbc 2392 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 171:3a7713b1edbc 2393 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 171:3a7713b1edbc 2394 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 171:3a7713b1edbc 2395 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 171:3a7713b1edbc 2396 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 171:3a7713b1edbc 2397 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 171:3a7713b1edbc 2398 * @note Other remaining configurations items related to Multi processor Mode
AnnaBridge 171:3a7713b1edbc 2399 * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
AnnaBridge 171:3a7713b1edbc 2400 * dedicated functions
AnnaBridge 171:3a7713b1edbc 2401 * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 2402 * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 2403 * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 2404 * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
AnnaBridge 171:3a7713b1edbc 2405 * CR3 IREN LL_USART_ConfigMultiProcessMode
AnnaBridge 171:3a7713b1edbc 2406 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2407 * @retval None
AnnaBridge 171:3a7713b1edbc 2408 */
AnnaBridge 171:3a7713b1edbc 2409 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2410 {
AnnaBridge 171:3a7713b1edbc 2411 /* In Multi Processor mode, the following bits must be kept cleared:
AnnaBridge 171:3a7713b1edbc 2412 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 171:3a7713b1edbc 2413 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 171:3a7713b1edbc 2414 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 171:3a7713b1edbc 2415 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
AnnaBridge 171:3a7713b1edbc 2416 }
AnnaBridge 171:3a7713b1edbc 2417
AnnaBridge 171:3a7713b1edbc 2418 /**
AnnaBridge 171:3a7713b1edbc 2419 * @}
AnnaBridge 171:3a7713b1edbc 2420 */
AnnaBridge 171:3a7713b1edbc 2421
AnnaBridge 171:3a7713b1edbc 2422 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 171:3a7713b1edbc 2423 * @{
AnnaBridge 171:3a7713b1edbc 2424 */
AnnaBridge 171:3a7713b1edbc 2425
AnnaBridge 171:3a7713b1edbc 2426 /**
AnnaBridge 171:3a7713b1edbc 2427 * @brief Check if the USART Parity Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 2428 * @rmtoll ISR PE LL_USART_IsActiveFlag_PE
AnnaBridge 171:3a7713b1edbc 2429 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2430 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2431 */
AnnaBridge 171:3a7713b1edbc 2432 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2433 {
AnnaBridge 171:3a7713b1edbc 2434 return (READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
AnnaBridge 171:3a7713b1edbc 2435 }
AnnaBridge 171:3a7713b1edbc 2436
AnnaBridge 171:3a7713b1edbc 2437 /**
AnnaBridge 171:3a7713b1edbc 2438 * @brief Check if the USART Framing Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 2439 * @rmtoll ISR FE LL_USART_IsActiveFlag_FE
AnnaBridge 171:3a7713b1edbc 2440 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2441 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2442 */
AnnaBridge 171:3a7713b1edbc 2443 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2444 {
AnnaBridge 171:3a7713b1edbc 2445 return (READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
AnnaBridge 171:3a7713b1edbc 2446 }
AnnaBridge 171:3a7713b1edbc 2447
AnnaBridge 171:3a7713b1edbc 2448 /**
AnnaBridge 171:3a7713b1edbc 2449 * @brief Check if the USART Noise error detected Flag is set or not
AnnaBridge 171:3a7713b1edbc 2450 * @rmtoll ISR NF LL_USART_IsActiveFlag_NE
AnnaBridge 171:3a7713b1edbc 2451 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2452 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2453 */
AnnaBridge 171:3a7713b1edbc 2454 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2455 {
AnnaBridge 171:3a7713b1edbc 2456 return (READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
AnnaBridge 171:3a7713b1edbc 2457 }
AnnaBridge 171:3a7713b1edbc 2458
AnnaBridge 171:3a7713b1edbc 2459 /**
AnnaBridge 171:3a7713b1edbc 2460 * @brief Check if the USART OverRun Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 2461 * @rmtoll ISR ORE LL_USART_IsActiveFlag_ORE
AnnaBridge 171:3a7713b1edbc 2462 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2463 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2464 */
AnnaBridge 171:3a7713b1edbc 2465 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2466 {
AnnaBridge 171:3a7713b1edbc 2467 return (READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
AnnaBridge 171:3a7713b1edbc 2468 }
AnnaBridge 171:3a7713b1edbc 2469
AnnaBridge 171:3a7713b1edbc 2470 /**
AnnaBridge 171:3a7713b1edbc 2471 * @brief Check if the USART IDLE line detected Flag is set or not
AnnaBridge 171:3a7713b1edbc 2472 * @rmtoll ISR IDLE LL_USART_IsActiveFlag_IDLE
AnnaBridge 171:3a7713b1edbc 2473 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2474 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2475 */
AnnaBridge 171:3a7713b1edbc 2476 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2477 {
AnnaBridge 171:3a7713b1edbc 2478 return (READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
AnnaBridge 171:3a7713b1edbc 2479 }
AnnaBridge 171:3a7713b1edbc 2480
AnnaBridge 171:3a7713b1edbc 2481 /**
AnnaBridge 171:3a7713b1edbc 2482 * @brief Check if the USART Read Data Register Not Empty Flag is set or not
AnnaBridge 171:3a7713b1edbc 2483 * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE
AnnaBridge 171:3a7713b1edbc 2484 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2485 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2486 */
AnnaBridge 171:3a7713b1edbc 2487 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2488 {
AnnaBridge 171:3a7713b1edbc 2489 return (READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
AnnaBridge 171:3a7713b1edbc 2490 }
AnnaBridge 171:3a7713b1edbc 2491
AnnaBridge 171:3a7713b1edbc 2492 /**
AnnaBridge 171:3a7713b1edbc 2493 * @brief Check if the USART Transmission Complete Flag is set or not
AnnaBridge 171:3a7713b1edbc 2494 * @rmtoll ISR TC LL_USART_IsActiveFlag_TC
AnnaBridge 171:3a7713b1edbc 2495 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2496 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2497 */
AnnaBridge 171:3a7713b1edbc 2498 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2499 {
AnnaBridge 171:3a7713b1edbc 2500 return (READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
AnnaBridge 171:3a7713b1edbc 2501 }
AnnaBridge 171:3a7713b1edbc 2502
AnnaBridge 171:3a7713b1edbc 2503 /**
AnnaBridge 171:3a7713b1edbc 2504 * @brief Check if the USART Transmit Data Register Empty Flag is set or not
AnnaBridge 171:3a7713b1edbc 2505 * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE
AnnaBridge 171:3a7713b1edbc 2506 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2507 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2508 */
AnnaBridge 171:3a7713b1edbc 2509 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2510 {
AnnaBridge 171:3a7713b1edbc 2511 return (READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
AnnaBridge 171:3a7713b1edbc 2512 }
AnnaBridge 171:3a7713b1edbc 2513
AnnaBridge 171:3a7713b1edbc 2514 /**
AnnaBridge 171:3a7713b1edbc 2515 * @brief Check if the USART LIN Break Detection Flag is set or not
AnnaBridge 171:3a7713b1edbc 2516 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2517 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2518 * @rmtoll ISR LBDF LL_USART_IsActiveFlag_LBD
AnnaBridge 171:3a7713b1edbc 2519 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2520 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2521 */
AnnaBridge 171:3a7713b1edbc 2522 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2523 {
AnnaBridge 171:3a7713b1edbc 2524 return (READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF));
AnnaBridge 171:3a7713b1edbc 2525 }
AnnaBridge 171:3a7713b1edbc 2526
AnnaBridge 171:3a7713b1edbc 2527 /**
AnnaBridge 171:3a7713b1edbc 2528 * @brief Check if the USART CTS interrupt Flag is set or not
AnnaBridge 171:3a7713b1edbc 2529 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2530 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2531 * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS
AnnaBridge 171:3a7713b1edbc 2532 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2533 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2534 */
AnnaBridge 171:3a7713b1edbc 2535 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2536 {
AnnaBridge 171:3a7713b1edbc 2537 return (READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
AnnaBridge 171:3a7713b1edbc 2538 }
AnnaBridge 171:3a7713b1edbc 2539
AnnaBridge 171:3a7713b1edbc 2540 /**
AnnaBridge 171:3a7713b1edbc 2541 * @brief Check if the USART CTS Flag is set or not
AnnaBridge 171:3a7713b1edbc 2542 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2543 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2544 * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS
AnnaBridge 171:3a7713b1edbc 2545 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2546 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2547 */
AnnaBridge 171:3a7713b1edbc 2548 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2549 {
AnnaBridge 171:3a7713b1edbc 2550 return (READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
AnnaBridge 171:3a7713b1edbc 2551 }
AnnaBridge 171:3a7713b1edbc 2552
AnnaBridge 171:3a7713b1edbc 2553 /**
AnnaBridge 171:3a7713b1edbc 2554 * @brief Check if the USART Receiver Time Out Flag is set or not
AnnaBridge 171:3a7713b1edbc 2555 * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO
AnnaBridge 171:3a7713b1edbc 2556 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2557 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2558 */
AnnaBridge 171:3a7713b1edbc 2559 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2560 {
AnnaBridge 171:3a7713b1edbc 2561 return (READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF));
AnnaBridge 171:3a7713b1edbc 2562 }
AnnaBridge 171:3a7713b1edbc 2563
AnnaBridge 171:3a7713b1edbc 2564 /**
AnnaBridge 171:3a7713b1edbc 2565 * @brief Check if the USART End Of Block Flag is set or not
AnnaBridge 171:3a7713b1edbc 2566 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2567 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2568 * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB
AnnaBridge 171:3a7713b1edbc 2569 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2570 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2571 */
AnnaBridge 171:3a7713b1edbc 2572 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2573 {
AnnaBridge 171:3a7713b1edbc 2574 return (READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF));
AnnaBridge 171:3a7713b1edbc 2575 }
AnnaBridge 171:3a7713b1edbc 2576
AnnaBridge 171:3a7713b1edbc 2577 /**
AnnaBridge 171:3a7713b1edbc 2578 * @brief Check if the USART Auto-Baud Rate Error Flag is set or not
AnnaBridge 171:3a7713b1edbc 2579 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2580 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2581 * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE
AnnaBridge 171:3a7713b1edbc 2582 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2583 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2584 */
AnnaBridge 171:3a7713b1edbc 2585 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2586 {
AnnaBridge 171:3a7713b1edbc 2587 return (READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE));
AnnaBridge 171:3a7713b1edbc 2588 }
AnnaBridge 171:3a7713b1edbc 2589
AnnaBridge 171:3a7713b1edbc 2590 /**
AnnaBridge 171:3a7713b1edbc 2591 * @brief Check if the USART Auto-Baud Rate Flag is set or not
AnnaBridge 171:3a7713b1edbc 2592 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2593 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2594 * @rmtoll ISR ABRF LL_USART_IsActiveFlag_ABR
AnnaBridge 171:3a7713b1edbc 2595 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2596 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2597 */
AnnaBridge 171:3a7713b1edbc 2598 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2599 {
AnnaBridge 171:3a7713b1edbc 2600 return (READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF));
AnnaBridge 171:3a7713b1edbc 2601 }
AnnaBridge 171:3a7713b1edbc 2602
AnnaBridge 171:3a7713b1edbc 2603 /**
AnnaBridge 171:3a7713b1edbc 2604 * @brief Check if the USART Busy Flag is set or not
AnnaBridge 171:3a7713b1edbc 2605 * @rmtoll ISR BUSY LL_USART_IsActiveFlag_BUSY
AnnaBridge 171:3a7713b1edbc 2606 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2607 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2608 */
AnnaBridge 171:3a7713b1edbc 2609 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2610 {
AnnaBridge 171:3a7713b1edbc 2611 return (READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
AnnaBridge 171:3a7713b1edbc 2612 }
AnnaBridge 171:3a7713b1edbc 2613
AnnaBridge 171:3a7713b1edbc 2614 /**
AnnaBridge 171:3a7713b1edbc 2615 * @brief Check if the USART Character Match Flag is set or not
AnnaBridge 171:3a7713b1edbc 2616 * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM
AnnaBridge 171:3a7713b1edbc 2617 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2618 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2619 */
AnnaBridge 171:3a7713b1edbc 2620 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2621 {
AnnaBridge 171:3a7713b1edbc 2622 return (READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
AnnaBridge 171:3a7713b1edbc 2623 }
AnnaBridge 171:3a7713b1edbc 2624
AnnaBridge 171:3a7713b1edbc 2625 /**
AnnaBridge 171:3a7713b1edbc 2626 * @brief Check if the USART Send Break Flag is set or not
AnnaBridge 171:3a7713b1edbc 2627 * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK
AnnaBridge 171:3a7713b1edbc 2628 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2629 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2630 */
AnnaBridge 171:3a7713b1edbc 2631 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2632 {
AnnaBridge 171:3a7713b1edbc 2633 return (READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
AnnaBridge 171:3a7713b1edbc 2634 }
AnnaBridge 171:3a7713b1edbc 2635
AnnaBridge 171:3a7713b1edbc 2636 /**
AnnaBridge 171:3a7713b1edbc 2637 * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
AnnaBridge 171:3a7713b1edbc 2638 * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU
AnnaBridge 171:3a7713b1edbc 2639 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2640 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2641 */
AnnaBridge 171:3a7713b1edbc 2642 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2643 {
AnnaBridge 171:3a7713b1edbc 2644 return (READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
AnnaBridge 171:3a7713b1edbc 2645 }
AnnaBridge 171:3a7713b1edbc 2646
AnnaBridge 171:3a7713b1edbc 2647
AnnaBridge 171:3a7713b1edbc 2648 /**
AnnaBridge 171:3a7713b1edbc 2649 * @brief Check if the USART Transmit Enable Acknowledge Flag is set or not
AnnaBridge 171:3a7713b1edbc 2650 * @rmtoll ISR TEACK LL_USART_IsActiveFlag_TEACK
AnnaBridge 171:3a7713b1edbc 2651 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2652 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2653 */
AnnaBridge 171:3a7713b1edbc 2654 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2655 {
AnnaBridge 171:3a7713b1edbc 2656 return (READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
AnnaBridge 171:3a7713b1edbc 2657 }
AnnaBridge 171:3a7713b1edbc 2658
AnnaBridge 171:3a7713b1edbc 2659
AnnaBridge 171:3a7713b1edbc 2660 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 2661 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
AnnaBridge 171:3a7713b1edbc 2662 /**
AnnaBridge 171:3a7713b1edbc 2663 * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
AnnaBridge 171:3a7713b1edbc 2664 * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT
AnnaBridge 171:3a7713b1edbc 2665 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2666 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 2667 */
AnnaBridge 171:3a7713b1edbc 2668 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2669 {
AnnaBridge 171:3a7713b1edbc 2670 return (READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT));
AnnaBridge 171:3a7713b1edbc 2671 }
AnnaBridge 171:3a7713b1edbc 2672 #endif
AnnaBridge 171:3a7713b1edbc 2673
AnnaBridge 171:3a7713b1edbc 2674 /**
AnnaBridge 171:3a7713b1edbc 2675 * @brief Clear Parity Error Flag
AnnaBridge 171:3a7713b1edbc 2676 * @rmtoll ICR PECF LL_USART_ClearFlag_PE
AnnaBridge 171:3a7713b1edbc 2677 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2678 * @retval None
AnnaBridge 171:3a7713b1edbc 2679 */
AnnaBridge 171:3a7713b1edbc 2680 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2681 {
AnnaBridge 171:3a7713b1edbc 2682 WRITE_REG(USARTx->ICR, USART_ICR_PECF);
AnnaBridge 171:3a7713b1edbc 2683 }
AnnaBridge 171:3a7713b1edbc 2684
AnnaBridge 171:3a7713b1edbc 2685 /**
AnnaBridge 171:3a7713b1edbc 2686 * @brief Clear Framing Error Flag
AnnaBridge 171:3a7713b1edbc 2687 * @rmtoll ICR FECF LL_USART_ClearFlag_FE
AnnaBridge 171:3a7713b1edbc 2688 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2689 * @retval None
AnnaBridge 171:3a7713b1edbc 2690 */
AnnaBridge 171:3a7713b1edbc 2691 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2692 {
AnnaBridge 171:3a7713b1edbc 2693 WRITE_REG(USARTx->ICR, USART_ICR_FECF);
AnnaBridge 171:3a7713b1edbc 2694 }
AnnaBridge 171:3a7713b1edbc 2695
AnnaBridge 171:3a7713b1edbc 2696 /**
AnnaBridge 171:3a7713b1edbc 2697 * @brief Clear Noise detected Flag
AnnaBridge 171:3a7713b1edbc 2698 * @rmtoll ICR NCF LL_USART_ClearFlag_NE
AnnaBridge 171:3a7713b1edbc 2699 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2700 * @retval None
AnnaBridge 171:3a7713b1edbc 2701 */
AnnaBridge 171:3a7713b1edbc 2702 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2703 {
AnnaBridge 171:3a7713b1edbc 2704 WRITE_REG(USARTx->ICR, USART_ICR_NCF);
AnnaBridge 171:3a7713b1edbc 2705 }
AnnaBridge 171:3a7713b1edbc 2706
AnnaBridge 171:3a7713b1edbc 2707 /**
AnnaBridge 171:3a7713b1edbc 2708 * @brief Clear OverRun Error Flag
AnnaBridge 171:3a7713b1edbc 2709 * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE
AnnaBridge 171:3a7713b1edbc 2710 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2711 * @retval None
AnnaBridge 171:3a7713b1edbc 2712 */
AnnaBridge 171:3a7713b1edbc 2713 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2714 {
AnnaBridge 171:3a7713b1edbc 2715 WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
AnnaBridge 171:3a7713b1edbc 2716 }
AnnaBridge 171:3a7713b1edbc 2717
AnnaBridge 171:3a7713b1edbc 2718 /**
AnnaBridge 171:3a7713b1edbc 2719 * @brief Clear IDLE line detected Flag
AnnaBridge 171:3a7713b1edbc 2720 * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE
AnnaBridge 171:3a7713b1edbc 2721 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2722 * @retval None
AnnaBridge 171:3a7713b1edbc 2723 */
AnnaBridge 171:3a7713b1edbc 2724 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2725 {
AnnaBridge 171:3a7713b1edbc 2726 WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
AnnaBridge 171:3a7713b1edbc 2727 }
AnnaBridge 171:3a7713b1edbc 2728
AnnaBridge 171:3a7713b1edbc 2729 /**
AnnaBridge 171:3a7713b1edbc 2730 * @brief Clear Transmission Complete Flag
AnnaBridge 171:3a7713b1edbc 2731 * @rmtoll ICR TCCF LL_USART_ClearFlag_TC
AnnaBridge 171:3a7713b1edbc 2732 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2733 * @retval None
AnnaBridge 171:3a7713b1edbc 2734 */
AnnaBridge 171:3a7713b1edbc 2735 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2736 {
AnnaBridge 171:3a7713b1edbc 2737 WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
AnnaBridge 171:3a7713b1edbc 2738 }
AnnaBridge 171:3a7713b1edbc 2739
AnnaBridge 171:3a7713b1edbc 2740 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 2741 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
AnnaBridge 171:3a7713b1edbc 2742 /**
AnnaBridge 171:3a7713b1edbc 2743 * @brief Clear Smartcard Transmission Complete Before Guard Time Flag
AnnaBridge 171:3a7713b1edbc 2744 * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT
AnnaBridge 171:3a7713b1edbc 2745 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2746 * @retval None
AnnaBridge 171:3a7713b1edbc 2747 */
AnnaBridge 171:3a7713b1edbc 2748 __STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2749 {
AnnaBridge 171:3a7713b1edbc 2750 WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
AnnaBridge 171:3a7713b1edbc 2751 }
AnnaBridge 171:3a7713b1edbc 2752 #endif
AnnaBridge 171:3a7713b1edbc 2753
AnnaBridge 171:3a7713b1edbc 2754 /**
AnnaBridge 171:3a7713b1edbc 2755 * @brief Clear LIN Break Detection Flag
AnnaBridge 171:3a7713b1edbc 2756 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2757 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2758 * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD
AnnaBridge 171:3a7713b1edbc 2759 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2760 * @retval None
AnnaBridge 171:3a7713b1edbc 2761 */
AnnaBridge 171:3a7713b1edbc 2762 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2763 {
AnnaBridge 171:3a7713b1edbc 2764 WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
AnnaBridge 171:3a7713b1edbc 2765 }
AnnaBridge 171:3a7713b1edbc 2766
AnnaBridge 171:3a7713b1edbc 2767 /**
AnnaBridge 171:3a7713b1edbc 2768 * @brief Clear CTS Interrupt Flag
AnnaBridge 171:3a7713b1edbc 2769 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2770 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2771 * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS
AnnaBridge 171:3a7713b1edbc 2772 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2773 * @retval None
AnnaBridge 171:3a7713b1edbc 2774 */
AnnaBridge 171:3a7713b1edbc 2775 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2776 {
AnnaBridge 171:3a7713b1edbc 2777 WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
AnnaBridge 171:3a7713b1edbc 2778 }
AnnaBridge 171:3a7713b1edbc 2779
AnnaBridge 171:3a7713b1edbc 2780 /**
AnnaBridge 171:3a7713b1edbc 2781 * @brief Clear Receiver Time Out Flag
AnnaBridge 171:3a7713b1edbc 2782 * @rmtoll ICR RTOCF LL_USART_ClearFlag_RTO
AnnaBridge 171:3a7713b1edbc 2783 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2784 * @retval None
AnnaBridge 171:3a7713b1edbc 2785 */
AnnaBridge 171:3a7713b1edbc 2786 __STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2787 {
AnnaBridge 171:3a7713b1edbc 2788 WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
AnnaBridge 171:3a7713b1edbc 2789 }
AnnaBridge 171:3a7713b1edbc 2790
AnnaBridge 171:3a7713b1edbc 2791 /**
AnnaBridge 171:3a7713b1edbc 2792 * @brief Clear End Of Block Flag
AnnaBridge 171:3a7713b1edbc 2793 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2794 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2795 * @rmtoll ICR EOBCF LL_USART_ClearFlag_EOB
AnnaBridge 171:3a7713b1edbc 2796 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2797 * @retval None
AnnaBridge 171:3a7713b1edbc 2798 */
AnnaBridge 171:3a7713b1edbc 2799 __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2800 {
AnnaBridge 171:3a7713b1edbc 2801 WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
AnnaBridge 171:3a7713b1edbc 2802 }
AnnaBridge 171:3a7713b1edbc 2803
AnnaBridge 171:3a7713b1edbc 2804 /**
AnnaBridge 171:3a7713b1edbc 2805 * @brief Clear Character Match Flag
AnnaBridge 171:3a7713b1edbc 2806 * @rmtoll ICR CMCF LL_USART_ClearFlag_CM
AnnaBridge 171:3a7713b1edbc 2807 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2808 * @retval None
AnnaBridge 171:3a7713b1edbc 2809 */
AnnaBridge 171:3a7713b1edbc 2810 __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2811 {
AnnaBridge 171:3a7713b1edbc 2812 WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
AnnaBridge 171:3a7713b1edbc 2813 }
AnnaBridge 171:3a7713b1edbc 2814
AnnaBridge 171:3a7713b1edbc 2815
AnnaBridge 171:3a7713b1edbc 2816 /**
AnnaBridge 171:3a7713b1edbc 2817 * @}
AnnaBridge 171:3a7713b1edbc 2818 */
AnnaBridge 171:3a7713b1edbc 2819
AnnaBridge 171:3a7713b1edbc 2820 /** @defgroup USART_LL_EF_IT_Management IT_Management
AnnaBridge 171:3a7713b1edbc 2821 * @{
AnnaBridge 171:3a7713b1edbc 2822 */
AnnaBridge 171:3a7713b1edbc 2823
AnnaBridge 171:3a7713b1edbc 2824 /**
AnnaBridge 171:3a7713b1edbc 2825 * @brief Enable IDLE Interrupt
AnnaBridge 171:3a7713b1edbc 2826 * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
AnnaBridge 171:3a7713b1edbc 2827 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2828 * @retval None
AnnaBridge 171:3a7713b1edbc 2829 */
AnnaBridge 171:3a7713b1edbc 2830 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2831 {
AnnaBridge 171:3a7713b1edbc 2832 SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 171:3a7713b1edbc 2833 }
AnnaBridge 171:3a7713b1edbc 2834
AnnaBridge 171:3a7713b1edbc 2835 /**
AnnaBridge 171:3a7713b1edbc 2836 * @brief Enable RX Not Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2837 * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
AnnaBridge 171:3a7713b1edbc 2838 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2839 * @retval None
AnnaBridge 171:3a7713b1edbc 2840 */
AnnaBridge 171:3a7713b1edbc 2841 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2842 {
AnnaBridge 171:3a7713b1edbc 2843 SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 171:3a7713b1edbc 2844 }
AnnaBridge 171:3a7713b1edbc 2845
AnnaBridge 171:3a7713b1edbc 2846 /**
AnnaBridge 171:3a7713b1edbc 2847 * @brief Enable Transmission Complete Interrupt
AnnaBridge 171:3a7713b1edbc 2848 * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
AnnaBridge 171:3a7713b1edbc 2849 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2850 * @retval None
AnnaBridge 171:3a7713b1edbc 2851 */
AnnaBridge 171:3a7713b1edbc 2852 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2853 {
AnnaBridge 171:3a7713b1edbc 2854 SET_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 171:3a7713b1edbc 2855 }
AnnaBridge 171:3a7713b1edbc 2856
AnnaBridge 171:3a7713b1edbc 2857 /**
AnnaBridge 171:3a7713b1edbc 2858 * @brief Enable TX Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2859 * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
AnnaBridge 171:3a7713b1edbc 2860 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2861 * @retval None
AnnaBridge 171:3a7713b1edbc 2862 */
AnnaBridge 171:3a7713b1edbc 2863 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2864 {
AnnaBridge 171:3a7713b1edbc 2865 SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 171:3a7713b1edbc 2866 }
AnnaBridge 171:3a7713b1edbc 2867
AnnaBridge 171:3a7713b1edbc 2868 /**
AnnaBridge 171:3a7713b1edbc 2869 * @brief Enable Parity Error Interrupt
AnnaBridge 171:3a7713b1edbc 2870 * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
AnnaBridge 171:3a7713b1edbc 2871 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2872 * @retval None
AnnaBridge 171:3a7713b1edbc 2873 */
AnnaBridge 171:3a7713b1edbc 2874 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2875 {
AnnaBridge 171:3a7713b1edbc 2876 SET_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 171:3a7713b1edbc 2877 }
AnnaBridge 171:3a7713b1edbc 2878
AnnaBridge 171:3a7713b1edbc 2879 /**
AnnaBridge 171:3a7713b1edbc 2880 * @brief Enable Character Match Interrupt
AnnaBridge 171:3a7713b1edbc 2881 * @rmtoll CR1 CMIE LL_USART_EnableIT_CM
AnnaBridge 171:3a7713b1edbc 2882 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2883 * @retval None
AnnaBridge 171:3a7713b1edbc 2884 */
AnnaBridge 171:3a7713b1edbc 2885 __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2886 {
AnnaBridge 171:3a7713b1edbc 2887 SET_BIT(USARTx->CR1, USART_CR1_CMIE);
AnnaBridge 171:3a7713b1edbc 2888 }
AnnaBridge 171:3a7713b1edbc 2889
AnnaBridge 171:3a7713b1edbc 2890 /**
AnnaBridge 171:3a7713b1edbc 2891 * @brief Enable Receiver Timeout Interrupt
AnnaBridge 171:3a7713b1edbc 2892 * @rmtoll CR1 RTOIE LL_USART_EnableIT_RTO
AnnaBridge 171:3a7713b1edbc 2893 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2894 * @retval None
AnnaBridge 171:3a7713b1edbc 2895 */
AnnaBridge 171:3a7713b1edbc 2896 __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2897 {
AnnaBridge 171:3a7713b1edbc 2898 SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
AnnaBridge 171:3a7713b1edbc 2899 }
AnnaBridge 171:3a7713b1edbc 2900
AnnaBridge 171:3a7713b1edbc 2901 /**
AnnaBridge 171:3a7713b1edbc 2902 * @brief Enable End Of Block Interrupt
AnnaBridge 171:3a7713b1edbc 2903 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2904 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2905 * @rmtoll CR1 EOBIE LL_USART_EnableIT_EOB
AnnaBridge 171:3a7713b1edbc 2906 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2907 * @retval None
AnnaBridge 171:3a7713b1edbc 2908 */
AnnaBridge 171:3a7713b1edbc 2909 __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2910 {
AnnaBridge 171:3a7713b1edbc 2911 SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
AnnaBridge 171:3a7713b1edbc 2912 }
AnnaBridge 171:3a7713b1edbc 2913
AnnaBridge 171:3a7713b1edbc 2914 /**
AnnaBridge 171:3a7713b1edbc 2915 * @brief Enable LIN Break Detection Interrupt
AnnaBridge 171:3a7713b1edbc 2916 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2917 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2918 * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
AnnaBridge 171:3a7713b1edbc 2919 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2920 * @retval None
AnnaBridge 171:3a7713b1edbc 2921 */
AnnaBridge 171:3a7713b1edbc 2922 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2923 {
AnnaBridge 171:3a7713b1edbc 2924 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 171:3a7713b1edbc 2925 }
AnnaBridge 171:3a7713b1edbc 2926
AnnaBridge 171:3a7713b1edbc 2927 /**
AnnaBridge 171:3a7713b1edbc 2928 * @brief Enable Error Interrupt
AnnaBridge 171:3a7713b1edbc 2929 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 171:3a7713b1edbc 2930 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
AnnaBridge 171:3a7713b1edbc 2931 * 0: Interrupt is inhibited
AnnaBridge 171:3a7713b1edbc 2932 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
AnnaBridge 171:3a7713b1edbc 2933 * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
AnnaBridge 171:3a7713b1edbc 2934 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2935 * @retval None
AnnaBridge 171:3a7713b1edbc 2936 */
AnnaBridge 171:3a7713b1edbc 2937 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2938 {
AnnaBridge 171:3a7713b1edbc 2939 SET_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 171:3a7713b1edbc 2940 }
AnnaBridge 171:3a7713b1edbc 2941
AnnaBridge 171:3a7713b1edbc 2942 /**
AnnaBridge 171:3a7713b1edbc 2943 * @brief Enable CTS Interrupt
AnnaBridge 171:3a7713b1edbc 2944 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2945 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2946 * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
AnnaBridge 171:3a7713b1edbc 2947 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2948 * @retval None
AnnaBridge 171:3a7713b1edbc 2949 */
AnnaBridge 171:3a7713b1edbc 2950 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2951 {
AnnaBridge 171:3a7713b1edbc 2952 SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 171:3a7713b1edbc 2953 }
AnnaBridge 171:3a7713b1edbc 2954
AnnaBridge 171:3a7713b1edbc 2955
AnnaBridge 171:3a7713b1edbc 2956 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 2957 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
AnnaBridge 171:3a7713b1edbc 2958 /**
AnnaBridge 171:3a7713b1edbc 2959 * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt
AnnaBridge 171:3a7713b1edbc 2960 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 2961 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 2962 * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT
AnnaBridge 171:3a7713b1edbc 2963 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2964 * @retval None
AnnaBridge 171:3a7713b1edbc 2965 */
AnnaBridge 171:3a7713b1edbc 2966 __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2967 {
AnnaBridge 171:3a7713b1edbc 2968 SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
AnnaBridge 171:3a7713b1edbc 2969 }
AnnaBridge 171:3a7713b1edbc 2970 #endif
AnnaBridge 171:3a7713b1edbc 2971
AnnaBridge 171:3a7713b1edbc 2972 /**
AnnaBridge 171:3a7713b1edbc 2973 * @brief Disable IDLE Interrupt
AnnaBridge 171:3a7713b1edbc 2974 * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
AnnaBridge 171:3a7713b1edbc 2975 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2976 * @retval None
AnnaBridge 171:3a7713b1edbc 2977 */
AnnaBridge 171:3a7713b1edbc 2978 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2979 {
AnnaBridge 171:3a7713b1edbc 2980 CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 171:3a7713b1edbc 2981 }
AnnaBridge 171:3a7713b1edbc 2982
AnnaBridge 171:3a7713b1edbc 2983 /**
AnnaBridge 171:3a7713b1edbc 2984 * @brief Disable RX Not Empty Interrupt
AnnaBridge 171:3a7713b1edbc 2985 * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
AnnaBridge 171:3a7713b1edbc 2986 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2987 * @retval None
AnnaBridge 171:3a7713b1edbc 2988 */
AnnaBridge 171:3a7713b1edbc 2989 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 2990 {
AnnaBridge 171:3a7713b1edbc 2991 CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 171:3a7713b1edbc 2992 }
AnnaBridge 171:3a7713b1edbc 2993
AnnaBridge 171:3a7713b1edbc 2994 /**
AnnaBridge 171:3a7713b1edbc 2995 * @brief Disable Transmission Complete Interrupt
AnnaBridge 171:3a7713b1edbc 2996 * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
AnnaBridge 171:3a7713b1edbc 2997 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 2998 * @retval None
AnnaBridge 171:3a7713b1edbc 2999 */
AnnaBridge 171:3a7713b1edbc 3000 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3001 {
AnnaBridge 171:3a7713b1edbc 3002 CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 171:3a7713b1edbc 3003 }
AnnaBridge 171:3a7713b1edbc 3004
AnnaBridge 171:3a7713b1edbc 3005 /**
AnnaBridge 171:3a7713b1edbc 3006 * @brief Disable TX Empty Interrupt
AnnaBridge 171:3a7713b1edbc 3007 * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
AnnaBridge 171:3a7713b1edbc 3008 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3009 * @retval None
AnnaBridge 171:3a7713b1edbc 3010 */
AnnaBridge 171:3a7713b1edbc 3011 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3012 {
AnnaBridge 171:3a7713b1edbc 3013 CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 171:3a7713b1edbc 3014 }
AnnaBridge 171:3a7713b1edbc 3015
AnnaBridge 171:3a7713b1edbc 3016 /**
AnnaBridge 171:3a7713b1edbc 3017 * @brief Disable Parity Error Interrupt
AnnaBridge 171:3a7713b1edbc 3018 * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
AnnaBridge 171:3a7713b1edbc 3019 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3020 * @retval None
AnnaBridge 171:3a7713b1edbc 3021 */
AnnaBridge 171:3a7713b1edbc 3022 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3023 {
AnnaBridge 171:3a7713b1edbc 3024 CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 171:3a7713b1edbc 3025 }
AnnaBridge 171:3a7713b1edbc 3026
AnnaBridge 171:3a7713b1edbc 3027 /**
AnnaBridge 171:3a7713b1edbc 3028 * @brief Disable Character Match Interrupt
AnnaBridge 171:3a7713b1edbc 3029 * @rmtoll CR1 CMIE LL_USART_DisableIT_CM
AnnaBridge 171:3a7713b1edbc 3030 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3031 * @retval None
AnnaBridge 171:3a7713b1edbc 3032 */
AnnaBridge 171:3a7713b1edbc 3033 __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3034 {
AnnaBridge 171:3a7713b1edbc 3035 CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
AnnaBridge 171:3a7713b1edbc 3036 }
AnnaBridge 171:3a7713b1edbc 3037
AnnaBridge 171:3a7713b1edbc 3038 /**
AnnaBridge 171:3a7713b1edbc 3039 * @brief Disable Receiver Timeout Interrupt
AnnaBridge 171:3a7713b1edbc 3040 * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO
AnnaBridge 171:3a7713b1edbc 3041 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3042 * @retval None
AnnaBridge 171:3a7713b1edbc 3043 */
AnnaBridge 171:3a7713b1edbc 3044 __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3045 {
AnnaBridge 171:3a7713b1edbc 3046 CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
AnnaBridge 171:3a7713b1edbc 3047 }
AnnaBridge 171:3a7713b1edbc 3048
AnnaBridge 171:3a7713b1edbc 3049 /**
AnnaBridge 171:3a7713b1edbc 3050 * @brief Disable End Of Block Interrupt
AnnaBridge 171:3a7713b1edbc 3051 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3052 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3053 * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB
AnnaBridge 171:3a7713b1edbc 3054 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3055 * @retval None
AnnaBridge 171:3a7713b1edbc 3056 */
AnnaBridge 171:3a7713b1edbc 3057 __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3058 {
AnnaBridge 171:3a7713b1edbc 3059 CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
AnnaBridge 171:3a7713b1edbc 3060 }
AnnaBridge 171:3a7713b1edbc 3061
AnnaBridge 171:3a7713b1edbc 3062 /**
AnnaBridge 171:3a7713b1edbc 3063 * @brief Disable LIN Break Detection Interrupt
AnnaBridge 171:3a7713b1edbc 3064 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3065 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3066 * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
AnnaBridge 171:3a7713b1edbc 3067 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3068 * @retval None
AnnaBridge 171:3a7713b1edbc 3069 */
AnnaBridge 171:3a7713b1edbc 3070 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3071 {
AnnaBridge 171:3a7713b1edbc 3072 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 171:3a7713b1edbc 3073 }
AnnaBridge 171:3a7713b1edbc 3074
AnnaBridge 171:3a7713b1edbc 3075 /**
AnnaBridge 171:3a7713b1edbc 3076 * @brief Disable Error Interrupt
AnnaBridge 171:3a7713b1edbc 3077 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 171:3a7713b1edbc 3078 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
AnnaBridge 171:3a7713b1edbc 3079 * 0: Interrupt is inhibited
AnnaBridge 171:3a7713b1edbc 3080 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
AnnaBridge 171:3a7713b1edbc 3081 * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
AnnaBridge 171:3a7713b1edbc 3082 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3083 * @retval None
AnnaBridge 171:3a7713b1edbc 3084 */
AnnaBridge 171:3a7713b1edbc 3085 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3086 {
AnnaBridge 171:3a7713b1edbc 3087 CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 171:3a7713b1edbc 3088 }
AnnaBridge 171:3a7713b1edbc 3089
AnnaBridge 171:3a7713b1edbc 3090 /**
AnnaBridge 171:3a7713b1edbc 3091 * @brief Disable CTS Interrupt
AnnaBridge 171:3a7713b1edbc 3092 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3093 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3094 * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
AnnaBridge 171:3a7713b1edbc 3095 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3096 * @retval None
AnnaBridge 171:3a7713b1edbc 3097 */
AnnaBridge 171:3a7713b1edbc 3098 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3099 {
AnnaBridge 171:3a7713b1edbc 3100 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 171:3a7713b1edbc 3101 }
AnnaBridge 171:3a7713b1edbc 3102
AnnaBridge 171:3a7713b1edbc 3103
AnnaBridge 171:3a7713b1edbc 3104 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 3105 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
AnnaBridge 171:3a7713b1edbc 3106 /**
AnnaBridge 171:3a7713b1edbc 3107 * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt
AnnaBridge 171:3a7713b1edbc 3108 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3109 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3110 * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT
AnnaBridge 171:3a7713b1edbc 3111 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3112 * @retval None
AnnaBridge 171:3a7713b1edbc 3113 */
AnnaBridge 171:3a7713b1edbc 3114 __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3115 {
AnnaBridge 171:3a7713b1edbc 3116 CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
AnnaBridge 171:3a7713b1edbc 3117 }
AnnaBridge 171:3a7713b1edbc 3118 #endif
AnnaBridge 171:3a7713b1edbc 3119
AnnaBridge 171:3a7713b1edbc 3120 /**
AnnaBridge 171:3a7713b1edbc 3121 * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3122 * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
AnnaBridge 171:3a7713b1edbc 3123 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3124 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3125 */
AnnaBridge 171:3a7713b1edbc 3126 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3127 {
AnnaBridge 171:3a7713b1edbc 3128 return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
AnnaBridge 171:3a7713b1edbc 3129 }
AnnaBridge 171:3a7713b1edbc 3130
AnnaBridge 171:3a7713b1edbc 3131 /**
AnnaBridge 171:3a7713b1edbc 3132 * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3133 * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
AnnaBridge 171:3a7713b1edbc 3134 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3135 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3136 */
AnnaBridge 171:3a7713b1edbc 3137 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3138 {
AnnaBridge 171:3a7713b1edbc 3139 return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
AnnaBridge 171:3a7713b1edbc 3140 }
AnnaBridge 171:3a7713b1edbc 3141
AnnaBridge 171:3a7713b1edbc 3142 /**
AnnaBridge 171:3a7713b1edbc 3143 * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3144 * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
AnnaBridge 171:3a7713b1edbc 3145 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3146 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3147 */
AnnaBridge 171:3a7713b1edbc 3148 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3149 {
AnnaBridge 171:3a7713b1edbc 3150 return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
AnnaBridge 171:3a7713b1edbc 3151 }
AnnaBridge 171:3a7713b1edbc 3152
AnnaBridge 171:3a7713b1edbc 3153 /**
AnnaBridge 171:3a7713b1edbc 3154 * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3155 * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
AnnaBridge 171:3a7713b1edbc 3156 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3157 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3158 */
AnnaBridge 171:3a7713b1edbc 3159 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3160 {
AnnaBridge 171:3a7713b1edbc 3161 return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
AnnaBridge 171:3a7713b1edbc 3162 }
AnnaBridge 171:3a7713b1edbc 3163
AnnaBridge 171:3a7713b1edbc 3164 /**
AnnaBridge 171:3a7713b1edbc 3165 * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3166 * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
AnnaBridge 171:3a7713b1edbc 3167 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3168 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3169 */
AnnaBridge 171:3a7713b1edbc 3170 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3171 {
AnnaBridge 171:3a7713b1edbc 3172 return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
AnnaBridge 171:3a7713b1edbc 3173 }
AnnaBridge 171:3a7713b1edbc 3174
AnnaBridge 171:3a7713b1edbc 3175 /**
AnnaBridge 171:3a7713b1edbc 3176 * @brief Check if the USART Character Match Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3177 * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM
AnnaBridge 171:3a7713b1edbc 3178 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3179 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3180 */
AnnaBridge 171:3a7713b1edbc 3181 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3182 {
AnnaBridge 171:3a7713b1edbc 3183 return (READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
AnnaBridge 171:3a7713b1edbc 3184 }
AnnaBridge 171:3a7713b1edbc 3185
AnnaBridge 171:3a7713b1edbc 3186 /**
AnnaBridge 171:3a7713b1edbc 3187 * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3188 * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO
AnnaBridge 171:3a7713b1edbc 3189 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3190 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3191 */
AnnaBridge 171:3a7713b1edbc 3192 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3193 {
AnnaBridge 171:3a7713b1edbc 3194 return (READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE));
AnnaBridge 171:3a7713b1edbc 3195 }
AnnaBridge 171:3a7713b1edbc 3196
AnnaBridge 171:3a7713b1edbc 3197 /**
AnnaBridge 171:3a7713b1edbc 3198 * @brief Check if the USART End Of Block Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3199 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3200 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3201 * @rmtoll CR1 EOBIE LL_USART_IsEnabledIT_EOB
AnnaBridge 171:3a7713b1edbc 3202 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3203 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3204 */
AnnaBridge 171:3a7713b1edbc 3205 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3206 {
AnnaBridge 171:3a7713b1edbc 3207 return (READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE));
AnnaBridge 171:3a7713b1edbc 3208 }
AnnaBridge 171:3a7713b1edbc 3209
AnnaBridge 171:3a7713b1edbc 3210 /**
AnnaBridge 171:3a7713b1edbc 3211 * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3212 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3213 * LIN feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3214 * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
AnnaBridge 171:3a7713b1edbc 3215 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3216 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3217 */
AnnaBridge 171:3a7713b1edbc 3218 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3219 {
AnnaBridge 171:3a7713b1edbc 3220 return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
AnnaBridge 171:3a7713b1edbc 3221 }
AnnaBridge 171:3a7713b1edbc 3222
AnnaBridge 171:3a7713b1edbc 3223 /**
AnnaBridge 171:3a7713b1edbc 3224 * @brief Check if the USART Error Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3225 * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
AnnaBridge 171:3a7713b1edbc 3226 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3227 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3228 */
AnnaBridge 171:3a7713b1edbc 3229 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3230 {
AnnaBridge 171:3a7713b1edbc 3231 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
AnnaBridge 171:3a7713b1edbc 3232 }
AnnaBridge 171:3a7713b1edbc 3233
AnnaBridge 171:3a7713b1edbc 3234 /**
AnnaBridge 171:3a7713b1edbc 3235 * @brief Check if the USART CTS Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3236 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3237 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3238 * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
AnnaBridge 171:3a7713b1edbc 3239 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3240 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3241 */
AnnaBridge 171:3a7713b1edbc 3242 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3243 {
AnnaBridge 171:3a7713b1edbc 3244 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
AnnaBridge 171:3a7713b1edbc 3245 }
AnnaBridge 171:3a7713b1edbc 3246
AnnaBridge 171:3a7713b1edbc 3247
AnnaBridge 171:3a7713b1edbc 3248 #if defined(USART_TCBGT_SUPPORT)
AnnaBridge 171:3a7713b1edbc 3249 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
AnnaBridge 171:3a7713b1edbc 3250 /**
AnnaBridge 171:3a7713b1edbc 3251 * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 3252 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3253 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3254 * @rmtoll CR3 TCBGTIE LL_USART_IsEnabledIT_TCBGT
AnnaBridge 171:3a7713b1edbc 3255 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3256 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3257 */
AnnaBridge 171:3a7713b1edbc 3258 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3259 {
AnnaBridge 171:3a7713b1edbc 3260 return (READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE));
AnnaBridge 171:3a7713b1edbc 3261 }
AnnaBridge 171:3a7713b1edbc 3262 #endif
AnnaBridge 171:3a7713b1edbc 3263
AnnaBridge 171:3a7713b1edbc 3264 /**
AnnaBridge 171:3a7713b1edbc 3265 * @}
AnnaBridge 171:3a7713b1edbc 3266 */
AnnaBridge 171:3a7713b1edbc 3267
AnnaBridge 171:3a7713b1edbc 3268 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
AnnaBridge 171:3a7713b1edbc 3269 * @{
AnnaBridge 171:3a7713b1edbc 3270 */
AnnaBridge 171:3a7713b1edbc 3271
AnnaBridge 171:3a7713b1edbc 3272 /**
AnnaBridge 171:3a7713b1edbc 3273 * @brief Enable DMA Mode for reception
AnnaBridge 171:3a7713b1edbc 3274 * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
AnnaBridge 171:3a7713b1edbc 3275 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3276 * @retval None
AnnaBridge 171:3a7713b1edbc 3277 */
AnnaBridge 171:3a7713b1edbc 3278 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3279 {
AnnaBridge 171:3a7713b1edbc 3280 SET_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 171:3a7713b1edbc 3281 }
AnnaBridge 171:3a7713b1edbc 3282
AnnaBridge 171:3a7713b1edbc 3283 /**
AnnaBridge 171:3a7713b1edbc 3284 * @brief Disable DMA Mode for reception
AnnaBridge 171:3a7713b1edbc 3285 * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
AnnaBridge 171:3a7713b1edbc 3286 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3287 * @retval None
AnnaBridge 171:3a7713b1edbc 3288 */
AnnaBridge 171:3a7713b1edbc 3289 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3290 {
AnnaBridge 171:3a7713b1edbc 3291 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 171:3a7713b1edbc 3292 }
AnnaBridge 171:3a7713b1edbc 3293
AnnaBridge 171:3a7713b1edbc 3294 /**
AnnaBridge 171:3a7713b1edbc 3295 * @brief Check if DMA Mode is enabled for reception
AnnaBridge 171:3a7713b1edbc 3296 * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
AnnaBridge 171:3a7713b1edbc 3297 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3298 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3299 */
AnnaBridge 171:3a7713b1edbc 3300 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3301 {
AnnaBridge 171:3a7713b1edbc 3302 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
AnnaBridge 171:3a7713b1edbc 3303 }
AnnaBridge 171:3a7713b1edbc 3304
AnnaBridge 171:3a7713b1edbc 3305 /**
AnnaBridge 171:3a7713b1edbc 3306 * @brief Enable DMA Mode for transmission
AnnaBridge 171:3a7713b1edbc 3307 * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
AnnaBridge 171:3a7713b1edbc 3308 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3309 * @retval None
AnnaBridge 171:3a7713b1edbc 3310 */
AnnaBridge 171:3a7713b1edbc 3311 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3312 {
AnnaBridge 171:3a7713b1edbc 3313 SET_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 171:3a7713b1edbc 3314 }
AnnaBridge 171:3a7713b1edbc 3315
AnnaBridge 171:3a7713b1edbc 3316 /**
AnnaBridge 171:3a7713b1edbc 3317 * @brief Disable DMA Mode for transmission
AnnaBridge 171:3a7713b1edbc 3318 * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
AnnaBridge 171:3a7713b1edbc 3319 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3320 * @retval None
AnnaBridge 171:3a7713b1edbc 3321 */
AnnaBridge 171:3a7713b1edbc 3322 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3323 {
AnnaBridge 171:3a7713b1edbc 3324 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 171:3a7713b1edbc 3325 }
AnnaBridge 171:3a7713b1edbc 3326
AnnaBridge 171:3a7713b1edbc 3327 /**
AnnaBridge 171:3a7713b1edbc 3328 * @brief Check if DMA Mode is enabled for transmission
AnnaBridge 171:3a7713b1edbc 3329 * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
AnnaBridge 171:3a7713b1edbc 3330 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3331 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3332 */
AnnaBridge 171:3a7713b1edbc 3333 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3334 {
AnnaBridge 171:3a7713b1edbc 3335 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
AnnaBridge 171:3a7713b1edbc 3336 }
AnnaBridge 171:3a7713b1edbc 3337
AnnaBridge 171:3a7713b1edbc 3338 /**
AnnaBridge 171:3a7713b1edbc 3339 * @brief Enable DMA Disabling on Reception Error
AnnaBridge 171:3a7713b1edbc 3340 * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr
AnnaBridge 171:3a7713b1edbc 3341 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3342 * @retval None
AnnaBridge 171:3a7713b1edbc 3343 */
AnnaBridge 171:3a7713b1edbc 3344 __STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3345 {
AnnaBridge 171:3a7713b1edbc 3346 SET_BIT(USARTx->CR3, USART_CR3_DDRE);
AnnaBridge 171:3a7713b1edbc 3347 }
AnnaBridge 171:3a7713b1edbc 3348
AnnaBridge 171:3a7713b1edbc 3349 /**
AnnaBridge 171:3a7713b1edbc 3350 * @brief Disable DMA Disabling on Reception Error
AnnaBridge 171:3a7713b1edbc 3351 * @rmtoll CR3 DDRE LL_USART_DisableDMADeactOnRxErr
AnnaBridge 171:3a7713b1edbc 3352 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3353 * @retval None
AnnaBridge 171:3a7713b1edbc 3354 */
AnnaBridge 171:3a7713b1edbc 3355 __STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3356 {
AnnaBridge 171:3a7713b1edbc 3357 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
AnnaBridge 171:3a7713b1edbc 3358 }
AnnaBridge 171:3a7713b1edbc 3359
AnnaBridge 171:3a7713b1edbc 3360 /**
AnnaBridge 171:3a7713b1edbc 3361 * @brief Indicate if DMA Disabling on Reception Error is disabled
AnnaBridge 171:3a7713b1edbc 3362 * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr
AnnaBridge 171:3a7713b1edbc 3363 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3364 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 3365 */
AnnaBridge 171:3a7713b1edbc 3366 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3367 {
AnnaBridge 171:3a7713b1edbc 3368 return (READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
AnnaBridge 171:3a7713b1edbc 3369 }
AnnaBridge 171:3a7713b1edbc 3370
AnnaBridge 171:3a7713b1edbc 3371 /**
AnnaBridge 171:3a7713b1edbc 3372 * @brief Get the data register address used for DMA transfer
AnnaBridge 171:3a7713b1edbc 3373 * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n
AnnaBridge 171:3a7713b1edbc 3374 * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr
AnnaBridge 171:3a7713b1edbc 3375 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3376 * @param Direction This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 3377 * @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT
AnnaBridge 171:3a7713b1edbc 3378 * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE
AnnaBridge 171:3a7713b1edbc 3379 * @retval Address of data register
AnnaBridge 171:3a7713b1edbc 3380 */
AnnaBridge 171:3a7713b1edbc 3381 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction)
AnnaBridge 171:3a7713b1edbc 3382 {
AnnaBridge 171:3a7713b1edbc 3383 register uint32_t data_reg_addr = 0U;
AnnaBridge 171:3a7713b1edbc 3384
AnnaBridge 171:3a7713b1edbc 3385 if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
AnnaBridge 171:3a7713b1edbc 3386 {
AnnaBridge 171:3a7713b1edbc 3387 /* return address of TDR register */
AnnaBridge 171:3a7713b1edbc 3388 data_reg_addr = (uint32_t) &(USARTx->TDR);
AnnaBridge 171:3a7713b1edbc 3389 }
AnnaBridge 171:3a7713b1edbc 3390 else
AnnaBridge 171:3a7713b1edbc 3391 {
AnnaBridge 171:3a7713b1edbc 3392 /* return address of RDR register */
AnnaBridge 171:3a7713b1edbc 3393 data_reg_addr = (uint32_t) &(USARTx->RDR);
AnnaBridge 171:3a7713b1edbc 3394 }
AnnaBridge 171:3a7713b1edbc 3395
AnnaBridge 171:3a7713b1edbc 3396 return data_reg_addr;
AnnaBridge 171:3a7713b1edbc 3397 }
AnnaBridge 171:3a7713b1edbc 3398
AnnaBridge 171:3a7713b1edbc 3399 /**
AnnaBridge 171:3a7713b1edbc 3400 * @}
AnnaBridge 171:3a7713b1edbc 3401 */
AnnaBridge 171:3a7713b1edbc 3402
AnnaBridge 171:3a7713b1edbc 3403 /** @defgroup USART_LL_EF_Data_Management Data_Management
AnnaBridge 171:3a7713b1edbc 3404 * @{
AnnaBridge 171:3a7713b1edbc 3405 */
AnnaBridge 171:3a7713b1edbc 3406
AnnaBridge 171:3a7713b1edbc 3407 /**
AnnaBridge 171:3a7713b1edbc 3408 * @brief Read Receiver Data register (Receive Data value, 8 bits)
AnnaBridge 171:3a7713b1edbc 3409 * @rmtoll RDR RDR LL_USART_ReceiveData8
AnnaBridge 171:3a7713b1edbc 3410 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3411 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 3412 */
AnnaBridge 171:3a7713b1edbc 3413 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3414 {
AnnaBridge 171:3a7713b1edbc 3415 return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
AnnaBridge 171:3a7713b1edbc 3416 }
AnnaBridge 171:3a7713b1edbc 3417
AnnaBridge 171:3a7713b1edbc 3418 /**
AnnaBridge 171:3a7713b1edbc 3419 * @brief Read Receiver Data register (Receive Data value, 9 bits)
AnnaBridge 171:3a7713b1edbc 3420 * @rmtoll RDR RDR LL_USART_ReceiveData9
AnnaBridge 171:3a7713b1edbc 3421 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3422 * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 171:3a7713b1edbc 3423 */
AnnaBridge 171:3a7713b1edbc 3424 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3425 {
AnnaBridge 171:3a7713b1edbc 3426 return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
AnnaBridge 171:3a7713b1edbc 3427 }
AnnaBridge 171:3a7713b1edbc 3428
AnnaBridge 171:3a7713b1edbc 3429 /**
AnnaBridge 171:3a7713b1edbc 3430 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
AnnaBridge 171:3a7713b1edbc 3431 * @rmtoll TDR TDR LL_USART_TransmitData8
AnnaBridge 171:3a7713b1edbc 3432 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3433 * @param Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 171:3a7713b1edbc 3434 * @retval None
AnnaBridge 171:3a7713b1edbc 3435 */
AnnaBridge 171:3a7713b1edbc 3436 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
AnnaBridge 171:3a7713b1edbc 3437 {
AnnaBridge 171:3a7713b1edbc 3438 USARTx->TDR = Value;
AnnaBridge 171:3a7713b1edbc 3439 }
AnnaBridge 171:3a7713b1edbc 3440
AnnaBridge 171:3a7713b1edbc 3441 /**
AnnaBridge 171:3a7713b1edbc 3442 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
AnnaBridge 171:3a7713b1edbc 3443 * @rmtoll TDR TDR LL_USART_TransmitData9
AnnaBridge 171:3a7713b1edbc 3444 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3445 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 171:3a7713b1edbc 3446 * @retval None
AnnaBridge 171:3a7713b1edbc 3447 */
AnnaBridge 171:3a7713b1edbc 3448 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
AnnaBridge 171:3a7713b1edbc 3449 {
AnnaBridge 171:3a7713b1edbc 3450 USARTx->TDR = Value & 0x1FFU;
AnnaBridge 171:3a7713b1edbc 3451 }
AnnaBridge 171:3a7713b1edbc 3452
AnnaBridge 171:3a7713b1edbc 3453 /**
AnnaBridge 171:3a7713b1edbc 3454 * @}
AnnaBridge 171:3a7713b1edbc 3455 */
AnnaBridge 171:3a7713b1edbc 3456
AnnaBridge 171:3a7713b1edbc 3457 /** @defgroup USART_LL_EF_Execution Execution
AnnaBridge 171:3a7713b1edbc 3458 * @{
AnnaBridge 171:3a7713b1edbc 3459 */
AnnaBridge 171:3a7713b1edbc 3460
AnnaBridge 171:3a7713b1edbc 3461 /**
AnnaBridge 171:3a7713b1edbc 3462 * @brief Request an Automatic Baud Rate measurement on next received data frame
AnnaBridge 171:3a7713b1edbc 3463 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3464 * Auto Baud Rate detection feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3465 * @rmtoll RQR ABRRQ LL_USART_RequestAutoBaudRate
AnnaBridge 171:3a7713b1edbc 3466 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3467 * @retval None
AnnaBridge 171:3a7713b1edbc 3468 */
AnnaBridge 171:3a7713b1edbc 3469 __STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3470 {
AnnaBridge 171:3a7713b1edbc 3471 SET_BIT(USARTx->RQR, USART_RQR_ABRRQ);
AnnaBridge 171:3a7713b1edbc 3472 }
AnnaBridge 171:3a7713b1edbc 3473
AnnaBridge 171:3a7713b1edbc 3474 /**
AnnaBridge 171:3a7713b1edbc 3475 * @brief Request Break sending
AnnaBridge 171:3a7713b1edbc 3476 * @rmtoll RQR SBKRQ LL_USART_RequestBreakSending
AnnaBridge 171:3a7713b1edbc 3477 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3478 * @retval None
AnnaBridge 171:3a7713b1edbc 3479 */
AnnaBridge 171:3a7713b1edbc 3480 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3481 {
AnnaBridge 171:3a7713b1edbc 3482 SET_BIT(USARTx->RQR, USART_RQR_SBKRQ);
AnnaBridge 171:3a7713b1edbc 3483 }
AnnaBridge 171:3a7713b1edbc 3484
AnnaBridge 171:3a7713b1edbc 3485 /**
AnnaBridge 171:3a7713b1edbc 3486 * @brief Put USART in mute mode and set the RWU flag
AnnaBridge 171:3a7713b1edbc 3487 * @rmtoll RQR MMRQ LL_USART_RequestEnterMuteMode
AnnaBridge 171:3a7713b1edbc 3488 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3489 * @retval None
AnnaBridge 171:3a7713b1edbc 3490 */
AnnaBridge 171:3a7713b1edbc 3491 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3492 {
AnnaBridge 171:3a7713b1edbc 3493 SET_BIT(USARTx->RQR, USART_RQR_MMRQ);
AnnaBridge 171:3a7713b1edbc 3494 }
AnnaBridge 171:3a7713b1edbc 3495
AnnaBridge 171:3a7713b1edbc 3496 /**
AnnaBridge 171:3a7713b1edbc 3497 * @brief Request a Receive Data flush
AnnaBridge 171:3a7713b1edbc 3498 * @rmtoll RQR RXFRQ LL_USART_RequestRxDataFlush
AnnaBridge 171:3a7713b1edbc 3499 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3500 * @retval None
AnnaBridge 171:3a7713b1edbc 3501 */
AnnaBridge 171:3a7713b1edbc 3502 __STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3503 {
AnnaBridge 171:3a7713b1edbc 3504 SET_BIT(USARTx->RQR, USART_RQR_RXFRQ);
AnnaBridge 171:3a7713b1edbc 3505 }
AnnaBridge 171:3a7713b1edbc 3506
AnnaBridge 171:3a7713b1edbc 3507 /**
AnnaBridge 171:3a7713b1edbc 3508 * @brief Request a Transmit data flush
AnnaBridge 171:3a7713b1edbc 3509 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 171:3a7713b1edbc 3510 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 171:3a7713b1edbc 3511 * @rmtoll RQR TXFRQ LL_USART_RequestTxDataFlush
AnnaBridge 171:3a7713b1edbc 3512 * @param USARTx USART Instance
AnnaBridge 171:3a7713b1edbc 3513 * @retval None
AnnaBridge 171:3a7713b1edbc 3514 */
AnnaBridge 171:3a7713b1edbc 3515 __STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
AnnaBridge 171:3a7713b1edbc 3516 {
AnnaBridge 171:3a7713b1edbc 3517 SET_BIT(USARTx->RQR, USART_RQR_TXFRQ);
AnnaBridge 171:3a7713b1edbc 3518 }
AnnaBridge 171:3a7713b1edbc 3519
AnnaBridge 171:3a7713b1edbc 3520 /**
AnnaBridge 171:3a7713b1edbc 3521 * @}
AnnaBridge 171:3a7713b1edbc 3522 */
AnnaBridge 171:3a7713b1edbc 3523
AnnaBridge 171:3a7713b1edbc 3524 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 3525 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 3526 * @{
AnnaBridge 171:3a7713b1edbc 3527 */
AnnaBridge 171:3a7713b1edbc 3528 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
AnnaBridge 171:3a7713b1edbc 3529 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 171:3a7713b1edbc 3530 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 171:3a7713b1edbc 3531 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 171:3a7713b1edbc 3532 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 171:3a7713b1edbc 3533 /**
AnnaBridge 171:3a7713b1edbc 3534 * @}
AnnaBridge 171:3a7713b1edbc 3535 */
AnnaBridge 171:3a7713b1edbc 3536 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 3537
AnnaBridge 171:3a7713b1edbc 3538 /**
AnnaBridge 171:3a7713b1edbc 3539 * @}
AnnaBridge 171:3a7713b1edbc 3540 */
AnnaBridge 171:3a7713b1edbc 3541
AnnaBridge 171:3a7713b1edbc 3542 /**
AnnaBridge 171:3a7713b1edbc 3543 * @}
AnnaBridge 171:3a7713b1edbc 3544 */
AnnaBridge 171:3a7713b1edbc 3545
AnnaBridge 171:3a7713b1edbc 3546 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
AnnaBridge 171:3a7713b1edbc 3547
AnnaBridge 171:3a7713b1edbc 3548 /**
AnnaBridge 171:3a7713b1edbc 3549 * @}
AnnaBridge 171:3a7713b1edbc 3550 */
AnnaBridge 171:3a7713b1edbc 3551
AnnaBridge 171:3a7713b1edbc 3552 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 3553 }
AnnaBridge 171:3a7713b1edbc 3554 #endif
AnnaBridge 171:3a7713b1edbc 3555
AnnaBridge 171:3a7713b1edbc 3556 #endif /* __STM32F7xx_LL_USART_H */
AnnaBridge 171:3a7713b1edbc 3557
AnnaBridge 171:3a7713b1edbc 3558 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/