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TARGET_NUCLEO_F413ZH/TOOLCHAIN_ARM_STD/stm32f4xx_hal_pwr.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_WIO_3G/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.h@169:a7c7b631e539
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Anna Bridge |
169:a7c7b631e539 | 1 | /** |
| Anna Bridge |
169:a7c7b631e539 | 2 | ****************************************************************************** |
| Anna Bridge |
169:a7c7b631e539 | 3 | * @file stm32f4xx_hal_pwr.h |
| Anna Bridge |
169:a7c7b631e539 | 4 | * @author MCD Application Team |
| Anna Bridge |
169:a7c7b631e539 | 5 | * @brief Header file of PWR HAL module. |
| Anna Bridge |
169:a7c7b631e539 | 6 | ****************************************************************************** |
| Anna Bridge |
169:a7c7b631e539 | 7 | * @attention |
| Anna Bridge |
169:a7c7b631e539 | 8 | * |
| Anna Bridge |
169:a7c7b631e539 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| Anna Bridge |
169:a7c7b631e539 | 10 | * |
| Anna Bridge |
169:a7c7b631e539 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| Anna Bridge |
169:a7c7b631e539 | 12 | * are permitted provided that the following conditions are met: |
| Anna Bridge |
169:a7c7b631e539 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| Anna Bridge |
169:a7c7b631e539 | 14 | * this list of conditions and the following disclaimer. |
| Anna Bridge |
169:a7c7b631e539 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Anna Bridge |
169:a7c7b631e539 | 16 | * this list of conditions and the following disclaimer in the documentation |
| Anna Bridge |
169:a7c7b631e539 | 17 | * and/or other materials provided with the distribution. |
| Anna Bridge |
169:a7c7b631e539 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Anna Bridge |
169:a7c7b631e539 | 19 | * may be used to endorse or promote products derived from this software |
| Anna Bridge |
169:a7c7b631e539 | 20 | * without specific prior written permission. |
| Anna Bridge |
169:a7c7b631e539 | 21 | * |
| Anna Bridge |
169:a7c7b631e539 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Anna Bridge |
169:a7c7b631e539 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Anna Bridge |
169:a7c7b631e539 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Anna Bridge |
169:a7c7b631e539 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Anna Bridge |
169:a7c7b631e539 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Anna Bridge |
169:a7c7b631e539 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Anna Bridge |
169:a7c7b631e539 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Anna Bridge |
169:a7c7b631e539 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Anna Bridge |
169:a7c7b631e539 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Anna Bridge |
169:a7c7b631e539 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Anna Bridge |
169:a7c7b631e539 | 32 | * |
| Anna Bridge |
169:a7c7b631e539 | 33 | ****************************************************************************** |
| Anna Bridge |
169:a7c7b631e539 | 34 | */ |
| Anna Bridge |
169:a7c7b631e539 | 35 | |
| Anna Bridge |
169:a7c7b631e539 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 37 | #ifndef __STM32F4xx_HAL_PWR_H |
| Anna Bridge |
169:a7c7b631e539 | 38 | #define __STM32F4xx_HAL_PWR_H |
| Anna Bridge |
169:a7c7b631e539 | 39 | |
| Anna Bridge |
169:a7c7b631e539 | 40 | #ifdef __cplusplus |
| Anna Bridge |
169:a7c7b631e539 | 41 | extern "C" { |
| Anna Bridge |
169:a7c7b631e539 | 42 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 43 | |
| Anna Bridge |
169:a7c7b631e539 | 44 | /* Includes ------------------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 45 | #include "stm32f4xx_hal_def.h" |
| Anna Bridge |
169:a7c7b631e539 | 46 | |
| Anna Bridge |
169:a7c7b631e539 | 47 | /** @addtogroup STM32F4xx_HAL_Driver |
| Anna Bridge |
169:a7c7b631e539 | 48 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 49 | */ |
| Anna Bridge |
169:a7c7b631e539 | 50 | |
| Anna Bridge |
169:a7c7b631e539 | 51 | /** @addtogroup PWR |
| Anna Bridge |
169:a7c7b631e539 | 52 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 53 | */ |
| Anna Bridge |
169:a7c7b631e539 | 54 | |
| Anna Bridge |
169:a7c7b631e539 | 55 | /* Exported types ------------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 56 | |
| Anna Bridge |
169:a7c7b631e539 | 57 | /** @defgroup PWR_Exported_Types PWR Exported Types |
| Anna Bridge |
169:a7c7b631e539 | 58 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 59 | */ |
| Anna Bridge |
169:a7c7b631e539 | 60 | |
| Anna Bridge |
169:a7c7b631e539 | 61 | /** |
| Anna Bridge |
169:a7c7b631e539 | 62 | * @brief PWR PVD configuration structure definition |
| Anna Bridge |
169:a7c7b631e539 | 63 | */ |
| Anna Bridge |
169:a7c7b631e539 | 64 | typedef struct |
| Anna Bridge |
169:a7c7b631e539 | 65 | { |
| Anna Bridge |
169:a7c7b631e539 | 66 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
| Anna Bridge |
169:a7c7b631e539 | 67 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
| Anna Bridge |
169:a7c7b631e539 | 68 | |
| Anna Bridge |
169:a7c7b631e539 | 69 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
| Anna Bridge |
169:a7c7b631e539 | 70 | This parameter can be a value of @ref PWR_PVD_Mode */ |
| Anna Bridge |
169:a7c7b631e539 | 71 | }PWR_PVDTypeDef; |
| Anna Bridge |
169:a7c7b631e539 | 72 | |
| Anna Bridge |
169:a7c7b631e539 | 73 | /** |
| Anna Bridge |
169:a7c7b631e539 | 74 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 75 | */ |
| Anna Bridge |
169:a7c7b631e539 | 76 | |
| Anna Bridge |
169:a7c7b631e539 | 77 | /* Exported constants --------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 78 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
| Anna Bridge |
169:a7c7b631e539 | 79 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 80 | */ |
| Anna Bridge |
169:a7c7b631e539 | 81 | |
| Anna Bridge |
169:a7c7b631e539 | 82 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins |
| Anna Bridge |
169:a7c7b631e539 | 83 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 84 | */ |
| Anna Bridge |
169:a7c7b631e539 | 85 | #define PWR_WAKEUP_PIN1 0x00000100U |
| Anna Bridge |
169:a7c7b631e539 | 86 | /** |
| Anna Bridge |
169:a7c7b631e539 | 87 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 88 | */ |
| Anna Bridge |
169:a7c7b631e539 | 89 | |
| Anna Bridge |
169:a7c7b631e539 | 90 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
| Anna Bridge |
169:a7c7b631e539 | 91 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 92 | */ |
| Anna Bridge |
169:a7c7b631e539 | 93 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| Anna Bridge |
169:a7c7b631e539 | 94 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| Anna Bridge |
169:a7c7b631e539 | 95 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| Anna Bridge |
169:a7c7b631e539 | 96 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| Anna Bridge |
169:a7c7b631e539 | 97 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| Anna Bridge |
169:a7c7b631e539 | 98 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| Anna Bridge |
169:a7c7b631e539 | 99 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| Anna Bridge |
169:a7c7b631e539 | 100 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage |
| Anna Bridge |
169:a7c7b631e539 | 101 | (Compare internally to VREFINT) */ |
| Anna Bridge |
169:a7c7b631e539 | 102 | /** |
| Anna Bridge |
169:a7c7b631e539 | 103 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 104 | */ |
| Anna Bridge |
169:a7c7b631e539 | 105 | |
| Anna Bridge |
169:a7c7b631e539 | 106 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
| Anna Bridge |
169:a7c7b631e539 | 107 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 108 | */ |
| Anna Bridge |
169:a7c7b631e539 | 109 | #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ |
| Anna Bridge |
169:a7c7b631e539 | 110 | #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 111 | #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 112 | #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 113 | #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 114 | #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 115 | #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ |
| Anna Bridge |
169:a7c7b631e539 | 116 | /** |
| Anna Bridge |
169:a7c7b631e539 | 117 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 118 | */ |
| Anna Bridge |
169:a7c7b631e539 | 119 | |
| Anna Bridge |
169:a7c7b631e539 | 120 | |
| Anna Bridge |
169:a7c7b631e539 | 121 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode |
| Anna Bridge |
169:a7c7b631e539 | 122 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 123 | */ |
| Anna Bridge |
169:a7c7b631e539 | 124 | #define PWR_MAINREGULATOR_ON 0x00000000U |
| Anna Bridge |
169:a7c7b631e539 | 125 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS |
| Anna Bridge |
169:a7c7b631e539 | 126 | /** |
| Anna Bridge |
169:a7c7b631e539 | 127 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 128 | */ |
| Anna Bridge |
169:a7c7b631e539 | 129 | |
| Anna Bridge |
169:a7c7b631e539 | 130 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
| Anna Bridge |
169:a7c7b631e539 | 131 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 132 | */ |
| Anna Bridge |
169:a7c7b631e539 | 133 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
| Anna Bridge |
169:a7c7b631e539 | 134 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
| Anna Bridge |
169:a7c7b631e539 | 135 | /** |
| Anna Bridge |
169:a7c7b631e539 | 136 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 137 | */ |
| Anna Bridge |
169:a7c7b631e539 | 138 | |
| Anna Bridge |
169:a7c7b631e539 | 139 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
| Anna Bridge |
169:a7c7b631e539 | 140 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 141 | */ |
| Anna Bridge |
169:a7c7b631e539 | 142 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
| Anna Bridge |
169:a7c7b631e539 | 143 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
| Anna Bridge |
169:a7c7b631e539 | 144 | /** |
| Anna Bridge |
169:a7c7b631e539 | 145 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 146 | */ |
| Anna Bridge |
169:a7c7b631e539 | 147 | |
| Anna Bridge |
169:a7c7b631e539 | 148 | /** @defgroup PWR_Flag PWR Flag |
| Anna Bridge |
169:a7c7b631e539 | 149 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 150 | */ |
| Anna Bridge |
169:a7c7b631e539 | 151 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Anna Bridge |
169:a7c7b631e539 | 152 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Anna Bridge |
169:a7c7b631e539 | 153 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
| Anna Bridge |
169:a7c7b631e539 | 154 | #define PWR_FLAG_BRR PWR_CSR_BRR |
| Anna Bridge |
169:a7c7b631e539 | 155 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY |
| Anna Bridge |
169:a7c7b631e539 | 156 | /** |
| Anna Bridge |
169:a7c7b631e539 | 157 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 158 | */ |
| Anna Bridge |
169:a7c7b631e539 | 159 | |
| Anna Bridge |
169:a7c7b631e539 | 160 | /** |
| Anna Bridge |
169:a7c7b631e539 | 161 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 162 | */ |
| Anna Bridge |
169:a7c7b631e539 | 163 | |
| Anna Bridge |
169:a7c7b631e539 | 164 | /* Exported macro ------------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 165 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
| Anna Bridge |
169:a7c7b631e539 | 166 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 167 | */ |
| Anna Bridge |
169:a7c7b631e539 | 168 | |
| Anna Bridge |
169:a7c7b631e539 | 169 | /** @brief Check PWR flag is set or not. |
| Anna Bridge |
169:a7c7b631e539 | 170 | * @param __FLAG__ specifies the flag to check. |
| Anna Bridge |
169:a7c7b631e539 | 171 | * This parameter can be one of the following values: |
| Anna Bridge |
169:a7c7b631e539 | 172 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| Anna Bridge |
169:a7c7b631e539 | 173 | * was received from the WKUP pin or from the RTC alarm (Alarm A |
| Anna Bridge |
169:a7c7b631e539 | 174 | * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
| Anna Bridge |
169:a7c7b631e539 | 175 | * An additional wakeup event is detected if the WKUP pin is enabled |
| Anna Bridge |
169:a7c7b631e539 | 176 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
| Anna Bridge |
169:a7c7b631e539 | 177 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| Anna Bridge |
169:a7c7b631e539 | 178 | * resumed from StandBy mode. |
| Anna Bridge |
169:a7c7b631e539 | 179 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| Anna Bridge |
169:a7c7b631e539 | 180 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
| Anna Bridge |
169:a7c7b631e539 | 181 | * For this reason, this bit is equal to 0 after Standby or reset |
| Anna Bridge |
169:a7c7b631e539 | 182 | * until the PVDE bit is set. |
| Anna Bridge |
169:a7c7b631e539 | 183 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset |
| Anna Bridge |
169:a7c7b631e539 | 184 | * when the device wakes up from Standby mode or by a system reset |
| Anna Bridge |
169:a7c7b631e539 | 185 | * or power reset. |
| Anna Bridge |
169:a7c7b631e539 | 186 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage |
| Anna Bridge |
169:a7c7b631e539 | 187 | * scaling output selection is ready. |
| Anna Bridge |
169:a7c7b631e539 | 188 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| Anna Bridge |
169:a7c7b631e539 | 189 | */ |
| Anna Bridge |
169:a7c7b631e539 | 190 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
| Anna Bridge |
169:a7c7b631e539 | 191 | |
| Anna Bridge |
169:a7c7b631e539 | 192 | /** @brief Clear the PWR's pending flags. |
| Anna Bridge |
169:a7c7b631e539 | 193 | * @param __FLAG__ specifies the flag to clear. |
| Anna Bridge |
169:a7c7b631e539 | 194 | * This parameter can be one of the following values: |
| Anna Bridge |
169:a7c7b631e539 | 195 | * @arg PWR_FLAG_WU: Wake Up flag |
| Anna Bridge |
169:a7c7b631e539 | 196 | * @arg PWR_FLAG_SB: StandBy flag |
| Anna Bridge |
169:a7c7b631e539 | 197 | */ |
| Anna Bridge |
169:a7c7b631e539 | 198 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) |
| Anna Bridge |
169:a7c7b631e539 | 199 | |
| Anna Bridge |
169:a7c7b631e539 | 200 | /** |
| Anna Bridge |
169:a7c7b631e539 | 201 | * @brief Enable the PVD Exti Line 16. |
| Anna Bridge |
169:a7c7b631e539 | 202 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 203 | */ |
| Anna Bridge |
169:a7c7b631e539 | 204 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 205 | |
| Anna Bridge |
169:a7c7b631e539 | 206 | /** |
| Anna Bridge |
169:a7c7b631e539 | 207 | * @brief Disable the PVD EXTI Line 16. |
| Anna Bridge |
169:a7c7b631e539 | 208 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 209 | */ |
| Anna Bridge |
169:a7c7b631e539 | 210 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 211 | |
| Anna Bridge |
169:a7c7b631e539 | 212 | /** |
| Anna Bridge |
169:a7c7b631e539 | 213 | * @brief Enable event on PVD Exti Line 16. |
| Anna Bridge |
169:a7c7b631e539 | 214 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 215 | */ |
| Anna Bridge |
169:a7c7b631e539 | 216 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 217 | |
| Anna Bridge |
169:a7c7b631e539 | 218 | /** |
| Anna Bridge |
169:a7c7b631e539 | 219 | * @brief Disable event on PVD Exti Line 16. |
| Anna Bridge |
169:a7c7b631e539 | 220 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 221 | */ |
| Anna Bridge |
169:a7c7b631e539 | 222 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 223 | |
| Anna Bridge |
169:a7c7b631e539 | 224 | /** |
| Anna Bridge |
169:a7c7b631e539 | 225 | * @brief Enable the PVD Extended Interrupt Rising Trigger. |
| Anna Bridge |
169:a7c7b631e539 | 226 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 227 | */ |
| Anna Bridge |
169:a7c7b631e539 | 228 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| Anna Bridge |
169:a7c7b631e539 | 229 | |
| Anna Bridge |
169:a7c7b631e539 | 230 | /** |
| Anna Bridge |
169:a7c7b631e539 | 231 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
| Anna Bridge |
169:a7c7b631e539 | 232 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 233 | */ |
| Anna Bridge |
169:a7c7b631e539 | 234 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| Anna Bridge |
169:a7c7b631e539 | 235 | |
| Anna Bridge |
169:a7c7b631e539 | 236 | /** |
| Anna Bridge |
169:a7c7b631e539 | 237 | * @brief Enable the PVD Extended Interrupt Falling Trigger. |
| Anna Bridge |
169:a7c7b631e539 | 238 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 239 | */ |
| Anna Bridge |
169:a7c7b631e539 | 240 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| Anna Bridge |
169:a7c7b631e539 | 241 | |
| Anna Bridge |
169:a7c7b631e539 | 242 | |
| Anna Bridge |
169:a7c7b631e539 | 243 | /** |
| Anna Bridge |
169:a7c7b631e539 | 244 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
| Anna Bridge |
169:a7c7b631e539 | 245 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 246 | */ |
| Anna Bridge |
169:a7c7b631e539 | 247 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| Anna Bridge |
169:a7c7b631e539 | 248 | |
| Anna Bridge |
169:a7c7b631e539 | 249 | |
| Anna Bridge |
169:a7c7b631e539 | 250 | /** |
| Anna Bridge |
169:a7c7b631e539 | 251 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
| Anna Bridge |
169:a7c7b631e539 | 252 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 253 | */ |
| Anna Bridge |
169:a7c7b631e539 | 254 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ |
| Anna Bridge |
169:a7c7b631e539 | 255 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ |
| Anna Bridge |
169:a7c7b631e539 | 256 | }while(0U) |
| Anna Bridge |
169:a7c7b631e539 | 257 | |
| Anna Bridge |
169:a7c7b631e539 | 258 | /** |
| Anna Bridge |
169:a7c7b631e539 | 259 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
| Anna Bridge |
169:a7c7b631e539 | 260 | * This parameter can be: |
| Anna Bridge |
169:a7c7b631e539 | 261 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 262 | */ |
| Anna Bridge |
169:a7c7b631e539 | 263 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ |
| Anna Bridge |
169:a7c7b631e539 | 264 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ |
| Anna Bridge |
169:a7c7b631e539 | 265 | }while(0U) |
| Anna Bridge |
169:a7c7b631e539 | 266 | |
| Anna Bridge |
169:a7c7b631e539 | 267 | /** |
| Anna Bridge |
169:a7c7b631e539 | 268 | * @brief checks whether the specified PVD Exti interrupt flag is set or not. |
| Anna Bridge |
169:a7c7b631e539 | 269 | * @retval EXTI PVD Line Status. |
| Anna Bridge |
169:a7c7b631e539 | 270 | */ |
| Anna Bridge |
169:a7c7b631e539 | 271 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 272 | |
| Anna Bridge |
169:a7c7b631e539 | 273 | /** |
| Anna Bridge |
169:a7c7b631e539 | 274 | * @brief Clear the PVD Exti flag. |
| Anna Bridge |
169:a7c7b631e539 | 275 | * @retval None. |
| Anna Bridge |
169:a7c7b631e539 | 276 | */ |
| Anna Bridge |
169:a7c7b631e539 | 277 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 278 | |
| Anna Bridge |
169:a7c7b631e539 | 279 | /** |
| Anna Bridge |
169:a7c7b631e539 | 280 | * @brief Generates a Software interrupt on PVD EXTI line. |
| Anna Bridge |
169:a7c7b631e539 | 281 | * @retval None |
| Anna Bridge |
169:a7c7b631e539 | 282 | */ |
| Anna Bridge |
169:a7c7b631e539 | 283 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
| Anna Bridge |
169:a7c7b631e539 | 284 | |
| Anna Bridge |
169:a7c7b631e539 | 285 | /** |
| Anna Bridge |
169:a7c7b631e539 | 286 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 287 | */ |
| Anna Bridge |
169:a7c7b631e539 | 288 | |
| Anna Bridge |
169:a7c7b631e539 | 289 | /* Include PWR HAL Extension module */ |
| Anna Bridge |
169:a7c7b631e539 | 290 | #include "stm32f4xx_hal_pwr_ex.h" |
| Anna Bridge |
169:a7c7b631e539 | 291 | |
| Anna Bridge |
169:a7c7b631e539 | 292 | /* Exported functions --------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 293 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
| Anna Bridge |
169:a7c7b631e539 | 294 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 295 | */ |
| Anna Bridge |
169:a7c7b631e539 | 296 | |
| Anna Bridge |
169:a7c7b631e539 | 297 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
| Anna Bridge |
169:a7c7b631e539 | 298 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 299 | */ |
| Anna Bridge |
169:a7c7b631e539 | 300 | /* Initialization and de-initialization functions *****************************/ |
| Anna Bridge |
169:a7c7b631e539 | 301 | void HAL_PWR_DeInit(void); |
| Anna Bridge |
169:a7c7b631e539 | 302 | void HAL_PWR_EnableBkUpAccess(void); |
| Anna Bridge |
169:a7c7b631e539 | 303 | void HAL_PWR_DisableBkUpAccess(void); |
| Anna Bridge |
169:a7c7b631e539 | 304 | /** |
| Anna Bridge |
169:a7c7b631e539 | 305 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 306 | */ |
| Anna Bridge |
169:a7c7b631e539 | 307 | |
| Anna Bridge |
169:a7c7b631e539 | 308 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
| Anna Bridge |
169:a7c7b631e539 | 309 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 310 | */ |
| Anna Bridge |
169:a7c7b631e539 | 311 | /* Peripheral Control functions **********************************************/ |
| Anna Bridge |
169:a7c7b631e539 | 312 | /* PVD configuration */ |
| Anna Bridge |
169:a7c7b631e539 | 313 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
| Anna Bridge |
169:a7c7b631e539 | 314 | void HAL_PWR_EnablePVD(void); |
| Anna Bridge |
169:a7c7b631e539 | 315 | void HAL_PWR_DisablePVD(void); |
| Anna Bridge |
169:a7c7b631e539 | 316 | |
| Anna Bridge |
169:a7c7b631e539 | 317 | /* WakeUp pins configuration */ |
| Anna Bridge |
169:a7c7b631e539 | 318 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
| Anna Bridge |
169:a7c7b631e539 | 319 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
| Anna Bridge |
169:a7c7b631e539 | 320 | |
| Anna Bridge |
169:a7c7b631e539 | 321 | /* Low Power modes entry */ |
| Anna Bridge |
169:a7c7b631e539 | 322 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
| Anna Bridge |
169:a7c7b631e539 | 323 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
| Anna Bridge |
169:a7c7b631e539 | 324 | void HAL_PWR_EnterSTANDBYMode(void); |
| Anna Bridge |
169:a7c7b631e539 | 325 | |
| Anna Bridge |
169:a7c7b631e539 | 326 | /* Power PVD IRQ Handler */ |
| Anna Bridge |
169:a7c7b631e539 | 327 | void HAL_PWR_PVD_IRQHandler(void); |
| Anna Bridge |
169:a7c7b631e539 | 328 | void HAL_PWR_PVDCallback(void); |
| Anna Bridge |
169:a7c7b631e539 | 329 | |
| Anna Bridge |
169:a7c7b631e539 | 330 | /* Cortex System Control functions *******************************************/ |
| Anna Bridge |
169:a7c7b631e539 | 331 | void HAL_PWR_EnableSleepOnExit(void); |
| Anna Bridge |
169:a7c7b631e539 | 332 | void HAL_PWR_DisableSleepOnExit(void); |
| Anna Bridge |
169:a7c7b631e539 | 333 | void HAL_PWR_EnableSEVOnPend(void); |
| Anna Bridge |
169:a7c7b631e539 | 334 | void HAL_PWR_DisableSEVOnPend(void); |
| Anna Bridge |
169:a7c7b631e539 | 335 | /** |
| Anna Bridge |
169:a7c7b631e539 | 336 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 337 | */ |
| Anna Bridge |
169:a7c7b631e539 | 338 | |
| Anna Bridge |
169:a7c7b631e539 | 339 | /** |
| Anna Bridge |
169:a7c7b631e539 | 340 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 341 | */ |
| Anna Bridge |
169:a7c7b631e539 | 342 | |
| Anna Bridge |
169:a7c7b631e539 | 343 | /* Private types -------------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 344 | /* Private variables ---------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 345 | /* Private constants ---------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 346 | /** @defgroup PWR_Private_Constants PWR Private Constants |
| Anna Bridge |
169:a7c7b631e539 | 347 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 348 | */ |
| Anna Bridge |
169:a7c7b631e539 | 349 | |
| Anna Bridge |
169:a7c7b631e539 | 350 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line |
| Anna Bridge |
169:a7c7b631e539 | 351 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 352 | */ |
| Anna Bridge |
169:a7c7b631e539 | 353 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| Anna Bridge |
169:a7c7b631e539 | 354 | /** |
| Anna Bridge |
169:a7c7b631e539 | 355 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 356 | */ |
| Anna Bridge |
169:a7c7b631e539 | 357 | |
| Anna Bridge |
169:a7c7b631e539 | 358 | /** @defgroup PWR_register_alias_address PWR Register alias address |
| Anna Bridge |
169:a7c7b631e539 | 359 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 360 | */ |
| Anna Bridge |
169:a7c7b631e539 | 361 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 362 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
| Anna Bridge |
169:a7c7b631e539 | 363 | #define PWR_CR_OFFSET 0x00U |
| Anna Bridge |
169:a7c7b631e539 | 364 | #define PWR_CSR_OFFSET 0x04U |
| Anna Bridge |
169:a7c7b631e539 | 365 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
| Anna Bridge |
169:a7c7b631e539 | 366 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
| Anna Bridge |
169:a7c7b631e539 | 367 | /** |
| Anna Bridge |
169:a7c7b631e539 | 368 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 369 | */ |
| Anna Bridge |
169:a7c7b631e539 | 370 | |
| Anna Bridge |
169:a7c7b631e539 | 371 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
| Anna Bridge |
169:a7c7b631e539 | 372 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 373 | */ |
| Anna Bridge |
169:a7c7b631e539 | 374 | /* --- CR Register ---*/ |
| Anna Bridge |
169:a7c7b631e539 | 375 | /* Alias word address of DBP bit */ |
| Anna Bridge |
169:a7c7b631e539 | 376 | #define DBP_BIT_NUMBER PWR_CR_DBP_Pos |
| Anna Bridge |
169:a7c7b631e539 | 377 | #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) |
| Anna Bridge |
169:a7c7b631e539 | 378 | |
| Anna Bridge |
169:a7c7b631e539 | 379 | /* Alias word address of PVDE bit */ |
| Anna Bridge |
169:a7c7b631e539 | 380 | #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos |
| Anna Bridge |
169:a7c7b631e539 | 381 | #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) |
| Anna Bridge |
169:a7c7b631e539 | 382 | |
| Anna Bridge |
169:a7c7b631e539 | 383 | /* Alias word address of VOS bit */ |
| Anna Bridge |
169:a7c7b631e539 | 384 | #define VOS_BIT_NUMBER PWR_CR_VOS_Pos |
| Anna Bridge |
169:a7c7b631e539 | 385 | #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) |
| Anna Bridge |
169:a7c7b631e539 | 386 | /** |
| Anna Bridge |
169:a7c7b631e539 | 387 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 388 | */ |
| Anna Bridge |
169:a7c7b631e539 | 389 | |
| Anna Bridge |
169:a7c7b631e539 | 390 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address |
| Anna Bridge |
169:a7c7b631e539 | 391 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 392 | */ |
| Anna Bridge |
169:a7c7b631e539 | 393 | /* --- CSR Register ---*/ |
| Anna Bridge |
169:a7c7b631e539 | 394 | /* Alias word address of EWUP bit */ |
| Anna Bridge |
169:a7c7b631e539 | 395 | #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos |
| Anna Bridge |
169:a7c7b631e539 | 396 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) |
| Anna Bridge |
169:a7c7b631e539 | 397 | /** |
| Anna Bridge |
169:a7c7b631e539 | 398 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 399 | */ |
| Anna Bridge |
169:a7c7b631e539 | 400 | |
| Anna Bridge |
169:a7c7b631e539 | 401 | /** |
| Anna Bridge |
169:a7c7b631e539 | 402 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 403 | */ |
| Anna Bridge |
169:a7c7b631e539 | 404 | /* Private macros ------------------------------------------------------------*/ |
| Anna Bridge |
169:a7c7b631e539 | 405 | /** @defgroup PWR_Private_Macros PWR Private Macros |
| Anna Bridge |
169:a7c7b631e539 | 406 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 407 | */ |
| Anna Bridge |
169:a7c7b631e539 | 408 | |
| Anna Bridge |
169:a7c7b631e539 | 409 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters |
| Anna Bridge |
169:a7c7b631e539 | 410 | * @{ |
| Anna Bridge |
169:a7c7b631e539 | 411 | */ |
| Anna Bridge |
169:a7c7b631e539 | 412 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
| Anna Bridge |
169:a7c7b631e539 | 413 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| Anna Bridge |
169:a7c7b631e539 | 414 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| Anna Bridge |
169:a7c7b631e539 | 415 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| Anna Bridge |
169:a7c7b631e539 | 416 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
| Anna Bridge |
169:a7c7b631e539 | 417 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| Anna Bridge |
169:a7c7b631e539 | 418 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| Anna Bridge |
169:a7c7b631e539 | 419 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| Anna Bridge |
169:a7c7b631e539 | 420 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
| Anna Bridge |
169:a7c7b631e539 | 421 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
| Anna Bridge |
169:a7c7b631e539 | 422 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
| Anna Bridge |
169:a7c7b631e539 | 423 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
| Anna Bridge |
169:a7c7b631e539 | 424 | /** |
| Anna Bridge |
169:a7c7b631e539 | 425 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 426 | */ |
| Anna Bridge |
169:a7c7b631e539 | 427 | |
| Anna Bridge |
169:a7c7b631e539 | 428 | /** |
| Anna Bridge |
169:a7c7b631e539 | 429 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 430 | */ |
| Anna Bridge |
169:a7c7b631e539 | 431 | |
| Anna Bridge |
169:a7c7b631e539 | 432 | /** |
| Anna Bridge |
169:a7c7b631e539 | 433 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 434 | */ |
| Anna Bridge |
169:a7c7b631e539 | 435 | |
| Anna Bridge |
169:a7c7b631e539 | 436 | /** |
| Anna Bridge |
169:a7c7b631e539 | 437 | * @} |
| Anna Bridge |
169:a7c7b631e539 | 438 | */ |
| Anna Bridge |
169:a7c7b631e539 | 439 | |
| Anna Bridge |
169:a7c7b631e539 | 440 | #ifdef __cplusplus |
| Anna Bridge |
169:a7c7b631e539 | 441 | } |
| Anna Bridge |
169:a7c7b631e539 | 442 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 443 | |
| Anna Bridge |
169:a7c7b631e539 | 444 | |
| Anna Bridge |
169:a7c7b631e539 | 445 | #endif /* __STM32F4xx_HAL_PWR_H */ |
| Anna Bridge |
169:a7c7b631e539 | 446 | |
| Anna Bridge |
169:a7c7b631e539 | 447 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
