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TARGET_NUCLEO_F412ZG/TOOLCHAIN_IAR/stm32f4xx_hal_uart.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_F407VG/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_uart.h@163:e59c8e839560
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 161:aa5281ff4a02 | 1 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 2 | ****************************************************************************** |
| AnnaBridge | 161:aa5281ff4a02 | 3 | * @file stm32f4xx_hal_uart.h |
| AnnaBridge | 161:aa5281ff4a02 | 4 | * @author MCD Application Team |
| AnnaBridge | 161:aa5281ff4a02 | 5 | * @brief Header file of UART HAL module. |
| AnnaBridge | 161:aa5281ff4a02 | 6 | ****************************************************************************** |
| AnnaBridge | 161:aa5281ff4a02 | 7 | * @attention |
| AnnaBridge | 161:aa5281ff4a02 | 8 | * |
| AnnaBridge | 161:aa5281ff4a02 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 161:aa5281ff4a02 | 10 | * |
| AnnaBridge | 161:aa5281ff4a02 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 161:aa5281ff4a02 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 161:aa5281ff4a02 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 161:aa5281ff4a02 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 161:aa5281ff4a02 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 161:aa5281ff4a02 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 161:aa5281ff4a02 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 161:aa5281ff4a02 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 161:aa5281ff4a02 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 161:aa5281ff4a02 | 20 | * without specific prior written permission. |
| AnnaBridge | 161:aa5281ff4a02 | 21 | * |
| AnnaBridge | 161:aa5281ff4a02 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 161:aa5281ff4a02 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 161:aa5281ff4a02 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 161:aa5281ff4a02 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 161:aa5281ff4a02 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 161:aa5281ff4a02 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 161:aa5281ff4a02 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 161:aa5281ff4a02 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 161:aa5281ff4a02 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 161:aa5281ff4a02 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 161:aa5281ff4a02 | 32 | * |
| AnnaBridge | 161:aa5281ff4a02 | 33 | ****************************************************************************** |
| AnnaBridge | 161:aa5281ff4a02 | 34 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 35 | |
| AnnaBridge | 161:aa5281ff4a02 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 37 | #ifndef __STM32F4xx_HAL_UART_H |
| AnnaBridge | 161:aa5281ff4a02 | 38 | #define __STM32F4xx_HAL_UART_H |
| AnnaBridge | 161:aa5281ff4a02 | 39 | |
| AnnaBridge | 161:aa5281ff4a02 | 40 | #ifdef __cplusplus |
| AnnaBridge | 161:aa5281ff4a02 | 41 | extern "C" { |
| AnnaBridge | 161:aa5281ff4a02 | 42 | #endif |
| AnnaBridge | 161:aa5281ff4a02 | 43 | |
| AnnaBridge | 161:aa5281ff4a02 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 45 | #include "stm32f4xx_hal_def.h" |
| AnnaBridge | 161:aa5281ff4a02 | 46 | |
| AnnaBridge | 161:aa5281ff4a02 | 47 | /** @addtogroup STM32F4xx_HAL_Driver |
| AnnaBridge | 161:aa5281ff4a02 | 48 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 49 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 50 | |
| AnnaBridge | 161:aa5281ff4a02 | 51 | /** @addtogroup UART |
| AnnaBridge | 161:aa5281ff4a02 | 52 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 53 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 54 | |
| AnnaBridge | 161:aa5281ff4a02 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 56 | /** @defgroup UART_Exported_Types UART Exported Types |
| AnnaBridge | 161:aa5281ff4a02 | 57 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 58 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 59 | |
| AnnaBridge | 161:aa5281ff4a02 | 60 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 61 | * @brief UART Init Structure definition |
| AnnaBridge | 161:aa5281ff4a02 | 62 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 63 | typedef struct |
| AnnaBridge | 161:aa5281ff4a02 | 64 | { |
| AnnaBridge | 161:aa5281ff4a02 | 65 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
| AnnaBridge | 161:aa5281ff4a02 | 66 | The baud rate is computed using the following formula: |
| AnnaBridge | 161:aa5281ff4a02 | 67 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
| AnnaBridge | 161:aa5281ff4a02 | 68 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
| AnnaBridge | 161:aa5281ff4a02 | 69 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
| AnnaBridge | 161:aa5281ff4a02 | 70 | |
| AnnaBridge | 161:aa5281ff4a02 | 71 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| AnnaBridge | 161:aa5281ff4a02 | 72 | This parameter can be a value of @ref UART_Word_Length */ |
| AnnaBridge | 161:aa5281ff4a02 | 73 | |
| AnnaBridge | 161:aa5281ff4a02 | 74 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
| AnnaBridge | 161:aa5281ff4a02 | 75 | This parameter can be a value of @ref UART_Stop_Bits */ |
| AnnaBridge | 161:aa5281ff4a02 | 76 | |
| AnnaBridge | 161:aa5281ff4a02 | 77 | uint32_t Parity; /*!< Specifies the parity mode. |
| AnnaBridge | 161:aa5281ff4a02 | 78 | This parameter can be a value of @ref UART_Parity |
| AnnaBridge | 161:aa5281ff4a02 | 79 | @note When parity is enabled, the computed parity is inserted |
| AnnaBridge | 161:aa5281ff4a02 | 80 | at the MSB position of the transmitted data (9th bit when |
| AnnaBridge | 161:aa5281ff4a02 | 81 | the word length is set to 9 data bits; 8th bit when the |
| AnnaBridge | 161:aa5281ff4a02 | 82 | word length is set to 8 data bits). */ |
| AnnaBridge | 161:aa5281ff4a02 | 83 | |
| AnnaBridge | 161:aa5281ff4a02 | 84 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| AnnaBridge | 161:aa5281ff4a02 | 85 | This parameter can be a value of @ref UART_Mode */ |
| AnnaBridge | 161:aa5281ff4a02 | 86 | |
| AnnaBridge | 161:aa5281ff4a02 | 87 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled |
| AnnaBridge | 161:aa5281ff4a02 | 88 | or disabled. |
| AnnaBridge | 161:aa5281ff4a02 | 89 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
| AnnaBridge | 161:aa5281ff4a02 | 90 | |
| AnnaBridge | 161:aa5281ff4a02 | 91 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
| AnnaBridge | 161:aa5281ff4a02 | 92 | This parameter can be a value of @ref UART_Over_Sampling */ |
| AnnaBridge | 161:aa5281ff4a02 | 93 | }UART_InitTypeDef; |
| AnnaBridge | 161:aa5281ff4a02 | 94 | |
| AnnaBridge | 161:aa5281ff4a02 | 95 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 96 | * @brief HAL UART State structures definition |
| AnnaBridge | 161:aa5281ff4a02 | 97 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
| AnnaBridge | 161:aa5281ff4a02 | 98 | * - gState contains UART state information related to global Handle management |
| AnnaBridge | 161:aa5281ff4a02 | 99 | * and also information related to Tx operations. |
| AnnaBridge | 161:aa5281ff4a02 | 100 | * gState value coding follow below described bitmap : |
| AnnaBridge | 161:aa5281ff4a02 | 101 | * b7-b6 Error information |
| AnnaBridge | 161:aa5281ff4a02 | 102 | * 00 : No Error |
| AnnaBridge | 161:aa5281ff4a02 | 103 | * 01 : (Not Used) |
| AnnaBridge | 161:aa5281ff4a02 | 104 | * 10 : Timeout |
| AnnaBridge | 161:aa5281ff4a02 | 105 | * 11 : Error |
| AnnaBridge | 161:aa5281ff4a02 | 106 | * b5 IP initilisation status |
| AnnaBridge | 161:aa5281ff4a02 | 107 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 161:aa5281ff4a02 | 108 | * 1 : Init done (IP not initialized. HAL UART Init function already called) |
| AnnaBridge | 161:aa5281ff4a02 | 109 | * b4-b3 (not used) |
| AnnaBridge | 161:aa5281ff4a02 | 110 | * xx : Should be set to 00 |
| AnnaBridge | 161:aa5281ff4a02 | 111 | * b2 Intrinsic process state |
| AnnaBridge | 161:aa5281ff4a02 | 112 | * 0 : Ready |
| AnnaBridge | 161:aa5281ff4a02 | 113 | * 1 : Busy (IP busy with some configuration or internal operations) |
| AnnaBridge | 161:aa5281ff4a02 | 114 | * b1 (not used) |
| AnnaBridge | 161:aa5281ff4a02 | 115 | * x : Should be set to 0 |
| AnnaBridge | 161:aa5281ff4a02 | 116 | * b0 Tx state |
| AnnaBridge | 161:aa5281ff4a02 | 117 | * 0 : Ready (no Tx operation ongoing) |
| AnnaBridge | 161:aa5281ff4a02 | 118 | * 1 : Busy (Tx operation ongoing) |
| AnnaBridge | 161:aa5281ff4a02 | 119 | * - RxState contains information related to Rx operations. |
| AnnaBridge | 161:aa5281ff4a02 | 120 | * RxState value coding follow below described bitmap : |
| AnnaBridge | 161:aa5281ff4a02 | 121 | * b7-b6 (not used) |
| AnnaBridge | 161:aa5281ff4a02 | 122 | * xx : Should be set to 00 |
| AnnaBridge | 161:aa5281ff4a02 | 123 | * b5 IP initilisation status |
| AnnaBridge | 161:aa5281ff4a02 | 124 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 161:aa5281ff4a02 | 125 | * 1 : Init done (IP not initialized) |
| AnnaBridge | 161:aa5281ff4a02 | 126 | * b4-b2 (not used) |
| AnnaBridge | 161:aa5281ff4a02 | 127 | * xxx : Should be set to 000 |
| AnnaBridge | 161:aa5281ff4a02 | 128 | * b1 Rx state |
| AnnaBridge | 161:aa5281ff4a02 | 129 | * 0 : Ready (no Rx operation ongoing) |
| AnnaBridge | 161:aa5281ff4a02 | 130 | * 1 : Busy (Rx operation ongoing) |
| AnnaBridge | 161:aa5281ff4a02 | 131 | * b0 (not used) |
| AnnaBridge | 161:aa5281ff4a02 | 132 | * x : Should be set to 0. |
| AnnaBridge | 161:aa5281ff4a02 | 133 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 134 | typedef enum |
| AnnaBridge | 161:aa5281ff4a02 | 135 | { |
| AnnaBridge | 161:aa5281ff4a02 | 136 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
| AnnaBridge | 161:aa5281ff4a02 | 137 | Value is allowed for gState and RxState */ |
| AnnaBridge | 161:aa5281ff4a02 | 138 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
| AnnaBridge | 161:aa5281ff4a02 | 139 | Value is allowed for gState and RxState */ |
| AnnaBridge | 161:aa5281ff4a02 | 140 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
| AnnaBridge | 161:aa5281ff4a02 | 141 | Value is allowed for gState only */ |
| AnnaBridge | 161:aa5281ff4a02 | 142 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
| AnnaBridge | 161:aa5281ff4a02 | 143 | Value is allowed for gState only */ |
| AnnaBridge | 161:aa5281ff4a02 | 144 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
| AnnaBridge | 161:aa5281ff4a02 | 145 | Value is allowed for RxState only */ |
| AnnaBridge | 161:aa5281ff4a02 | 146 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
| AnnaBridge | 161:aa5281ff4a02 | 147 | Not to be used for neither gState nor RxState. |
| AnnaBridge | 161:aa5281ff4a02 | 148 | Value is result of combination (Or) between gState and RxState values */ |
| AnnaBridge | 161:aa5281ff4a02 | 149 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
| AnnaBridge | 161:aa5281ff4a02 | 150 | Value is allowed for gState only */ |
| AnnaBridge | 161:aa5281ff4a02 | 151 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
| AnnaBridge | 161:aa5281ff4a02 | 152 | Value is allowed for gState only */ |
| AnnaBridge | 161:aa5281ff4a02 | 153 | }HAL_UART_StateTypeDef; |
| AnnaBridge | 161:aa5281ff4a02 | 154 | |
| AnnaBridge | 161:aa5281ff4a02 | 155 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 156 | * @brief UART handle Structure definition |
| AnnaBridge | 161:aa5281ff4a02 | 157 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 158 | typedef struct |
| AnnaBridge | 161:aa5281ff4a02 | 159 | { |
| AnnaBridge | 161:aa5281ff4a02 | 160 | USART_TypeDef *Instance; /*!< UART registers base address */ |
| AnnaBridge | 161:aa5281ff4a02 | 161 | |
| AnnaBridge | 161:aa5281ff4a02 | 162 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
| AnnaBridge | 161:aa5281ff4a02 | 163 | |
| AnnaBridge | 161:aa5281ff4a02 | 164 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
| AnnaBridge | 161:aa5281ff4a02 | 165 | |
| AnnaBridge | 161:aa5281ff4a02 | 166 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
| AnnaBridge | 161:aa5281ff4a02 | 167 | |
| AnnaBridge | 161:aa5281ff4a02 | 168 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
| AnnaBridge | 161:aa5281ff4a02 | 169 | |
| AnnaBridge | 161:aa5281ff4a02 | 170 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
| AnnaBridge | 161:aa5281ff4a02 | 171 | |
| AnnaBridge | 161:aa5281ff4a02 | 172 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
| AnnaBridge | 161:aa5281ff4a02 | 173 | |
| AnnaBridge | 161:aa5281ff4a02 | 174 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
| AnnaBridge | 161:aa5281ff4a02 | 175 | |
| AnnaBridge | 161:aa5281ff4a02 | 176 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
| AnnaBridge | 161:aa5281ff4a02 | 177 | |
| AnnaBridge | 161:aa5281ff4a02 | 178 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
| AnnaBridge | 161:aa5281ff4a02 | 179 | |
| AnnaBridge | 161:aa5281ff4a02 | 180 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| AnnaBridge | 161:aa5281ff4a02 | 181 | |
| AnnaBridge | 161:aa5281ff4a02 | 182 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
| AnnaBridge | 161:aa5281ff4a02 | 183 | and also related to Tx operations. |
| AnnaBridge | 161:aa5281ff4a02 | 184 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| AnnaBridge | 161:aa5281ff4a02 | 185 | |
| AnnaBridge | 161:aa5281ff4a02 | 186 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
| AnnaBridge | 161:aa5281ff4a02 | 187 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| AnnaBridge | 161:aa5281ff4a02 | 188 | |
| AnnaBridge | 161:aa5281ff4a02 | 189 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
| AnnaBridge | 161:aa5281ff4a02 | 190 | |
| AnnaBridge | 161:aa5281ff4a02 | 191 | }UART_HandleTypeDef; |
| AnnaBridge | 161:aa5281ff4a02 | 192 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 193 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 194 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 195 | |
| AnnaBridge | 161:aa5281ff4a02 | 196 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 197 | /** @defgroup UART_Exported_Constants UART Exported constants |
| AnnaBridge | 161:aa5281ff4a02 | 198 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 199 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 200 | |
| AnnaBridge | 161:aa5281ff4a02 | 201 | /** @defgroup UART_Error_Code UART Error Code |
| AnnaBridge | 161:aa5281ff4a02 | 202 | * @brief UART Error Code |
| AnnaBridge | 161:aa5281ff4a02 | 203 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 204 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 205 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
| AnnaBridge | 161:aa5281ff4a02 | 206 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
| AnnaBridge | 161:aa5281ff4a02 | 207 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
| AnnaBridge | 161:aa5281ff4a02 | 208 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
| AnnaBridge | 161:aa5281ff4a02 | 209 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
| AnnaBridge | 161:aa5281ff4a02 | 210 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
| AnnaBridge | 161:aa5281ff4a02 | 211 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 212 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 213 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 214 | |
| AnnaBridge | 161:aa5281ff4a02 | 215 | /** @defgroup UART_Word_Length UART Word Length |
| AnnaBridge | 161:aa5281ff4a02 | 216 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 217 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 218 | #define UART_WORDLENGTH_8B 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 219 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| AnnaBridge | 161:aa5281ff4a02 | 220 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 221 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 222 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 223 | |
| AnnaBridge | 161:aa5281ff4a02 | 224 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
| AnnaBridge | 161:aa5281ff4a02 | 225 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 226 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 227 | #define UART_STOPBITS_1 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 228 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| AnnaBridge | 161:aa5281ff4a02 | 229 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 230 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 231 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 232 | |
| AnnaBridge | 161:aa5281ff4a02 | 233 | /** @defgroup UART_Parity UART Parity |
| AnnaBridge | 161:aa5281ff4a02 | 234 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 235 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 236 | #define UART_PARITY_NONE 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 237 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| AnnaBridge | 161:aa5281ff4a02 | 238 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| AnnaBridge | 161:aa5281ff4a02 | 239 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 240 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 241 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 242 | |
| AnnaBridge | 161:aa5281ff4a02 | 243 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
| AnnaBridge | 161:aa5281ff4a02 | 244 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 245 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 246 | #define UART_HWCONTROL_NONE 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 247 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
| AnnaBridge | 161:aa5281ff4a02 | 248 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
| AnnaBridge | 161:aa5281ff4a02 | 249 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
| AnnaBridge | 161:aa5281ff4a02 | 250 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 251 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 252 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 253 | |
| AnnaBridge | 161:aa5281ff4a02 | 254 | /** @defgroup UART_Mode UART Transfer Mode |
| AnnaBridge | 161:aa5281ff4a02 | 255 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 256 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 257 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
| AnnaBridge | 161:aa5281ff4a02 | 258 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
| AnnaBridge | 161:aa5281ff4a02 | 259 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| AnnaBridge | 161:aa5281ff4a02 | 260 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 261 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 262 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 263 | |
| AnnaBridge | 161:aa5281ff4a02 | 264 | /** @defgroup UART_State UART State |
| AnnaBridge | 161:aa5281ff4a02 | 265 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 266 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 267 | #define UART_STATE_DISABLE 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 268 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
| AnnaBridge | 161:aa5281ff4a02 | 269 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 270 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 271 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 272 | |
| AnnaBridge | 161:aa5281ff4a02 | 273 | /** @defgroup UART_Over_Sampling UART Over Sampling |
| AnnaBridge | 161:aa5281ff4a02 | 274 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 275 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 276 | #define UART_OVERSAMPLING_16 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 277 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
| AnnaBridge | 161:aa5281ff4a02 | 278 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 279 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 280 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 281 | |
| AnnaBridge | 161:aa5281ff4a02 | 282 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
| AnnaBridge | 161:aa5281ff4a02 | 283 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 284 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 285 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 286 | #define UART_LINBREAKDETECTLENGTH_11B 0x00000020U |
| AnnaBridge | 161:aa5281ff4a02 | 287 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 288 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 289 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 290 | |
| AnnaBridge | 161:aa5281ff4a02 | 291 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
| AnnaBridge | 161:aa5281ff4a02 | 292 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 293 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 294 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
| AnnaBridge | 161:aa5281ff4a02 | 295 | #define UART_WAKEUPMETHOD_ADDRESSMARK 0x00000800U |
| AnnaBridge | 161:aa5281ff4a02 | 296 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 297 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 298 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 299 | |
| AnnaBridge | 161:aa5281ff4a02 | 300 | /** @defgroup UART_Flags UART FLags |
| AnnaBridge | 161:aa5281ff4a02 | 301 | * Elements values convention: 0xXXXX |
| AnnaBridge | 161:aa5281ff4a02 | 302 | * - 0xXXXX : Flag mask in the SR register |
| AnnaBridge | 161:aa5281ff4a02 | 303 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 304 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 305 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
| AnnaBridge | 161:aa5281ff4a02 | 306 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
| AnnaBridge | 161:aa5281ff4a02 | 307 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
| AnnaBridge | 161:aa5281ff4a02 | 308 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
| AnnaBridge | 161:aa5281ff4a02 | 309 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
| AnnaBridge | 161:aa5281ff4a02 | 310 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
| AnnaBridge | 161:aa5281ff4a02 | 311 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
| AnnaBridge | 161:aa5281ff4a02 | 312 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
| AnnaBridge | 161:aa5281ff4a02 | 313 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
| AnnaBridge | 161:aa5281ff4a02 | 314 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
| AnnaBridge | 161:aa5281ff4a02 | 315 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 316 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 317 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 318 | |
| AnnaBridge | 161:aa5281ff4a02 | 319 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
| AnnaBridge | 161:aa5281ff4a02 | 320 | * Elements values convention: 0xY000XXXX |
| AnnaBridge | 161:aa5281ff4a02 | 321 | * - XXXX : Interrupt mask (16 bits) in the Y register |
| AnnaBridge | 161:aa5281ff4a02 | 322 | * - Y : Interrupt source register (2bits) |
| AnnaBridge | 161:aa5281ff4a02 | 323 | * - 0001: CR1 register |
| AnnaBridge | 161:aa5281ff4a02 | 324 | * - 0010: CR2 register |
| AnnaBridge | 161:aa5281ff4a02 | 325 | * - 0011: CR3 register |
| AnnaBridge | 161:aa5281ff4a02 | 326 | * |
| AnnaBridge | 161:aa5281ff4a02 | 327 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 328 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 329 | |
| AnnaBridge | 161:aa5281ff4a02 | 330 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 331 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 332 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 333 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 334 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 335 | |
| AnnaBridge | 161:aa5281ff4a02 | 336 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 337 | |
| AnnaBridge | 161:aa5281ff4a02 | 338 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 339 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
| AnnaBridge | 161:aa5281ff4a02 | 340 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 341 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 342 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 343 | |
| AnnaBridge | 161:aa5281ff4a02 | 344 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 345 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 346 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 347 | |
| AnnaBridge | 161:aa5281ff4a02 | 348 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 349 | /** @defgroup UART_Exported_Macros UART Exported Macros |
| AnnaBridge | 161:aa5281ff4a02 | 350 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 351 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 352 | |
| AnnaBridge | 161:aa5281ff4a02 | 353 | /** @brief Reset UART handle gstate & RxState |
| AnnaBridge | 163:e59c8e839560 | 354 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 355 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 356 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 357 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 358 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 359 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 360 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
| AnnaBridge | 161:aa5281ff4a02 | 361 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
| AnnaBridge | 161:aa5281ff4a02 | 362 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 363 | |
| AnnaBridge | 161:aa5281ff4a02 | 364 | /** @brief Flushes the UART DR register |
| AnnaBridge | 163:e59c8e839560 | 365 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 366 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 367 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
| AnnaBridge | 161:aa5281ff4a02 | 368 | |
| AnnaBridge | 161:aa5281ff4a02 | 369 | /** @brief Checks whether the specified UART flag is set or not. |
| AnnaBridge | 163:e59c8e839560 | 370 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 371 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 372 | * UART peripheral. |
| AnnaBridge | 163:e59c8e839560 | 373 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 161:aa5281ff4a02 | 374 | * This parameter can be one of the following values: |
| AnnaBridge | 161:aa5281ff4a02 | 375 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
| AnnaBridge | 161:aa5281ff4a02 | 376 | * @arg UART_FLAG_LBD: LIN Break detection flag |
| AnnaBridge | 161:aa5281ff4a02 | 377 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
| AnnaBridge | 161:aa5281ff4a02 | 378 | * @arg UART_FLAG_TC: Transmission Complete flag |
| AnnaBridge | 161:aa5281ff4a02 | 379 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
| AnnaBridge | 161:aa5281ff4a02 | 380 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
| AnnaBridge | 161:aa5281ff4a02 | 381 | * @arg UART_FLAG_ORE: Overrun Error flag |
| AnnaBridge | 161:aa5281ff4a02 | 382 | * @arg UART_FLAG_NE: Noise Error flag |
| AnnaBridge | 161:aa5281ff4a02 | 383 | * @arg UART_FLAG_FE: Framing Error flag |
| AnnaBridge | 161:aa5281ff4a02 | 384 | * @arg UART_FLAG_PE: Parity Error flag |
| AnnaBridge | 161:aa5281ff4a02 | 385 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 161:aa5281ff4a02 | 386 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 387 | |
| AnnaBridge | 161:aa5281ff4a02 | 388 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 161:aa5281ff4a02 | 389 | |
| AnnaBridge | 161:aa5281ff4a02 | 390 | /** @brief Clears the specified UART pending flag. |
| AnnaBridge | 163:e59c8e839560 | 391 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 392 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 393 | * UART peripheral. |
| AnnaBridge | 163:e59c8e839560 | 394 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 161:aa5281ff4a02 | 395 | * This parameter can be any combination of the following values: |
| AnnaBridge | 161:aa5281ff4a02 | 396 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
| AnnaBridge | 161:aa5281ff4a02 | 397 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
| AnnaBridge | 161:aa5281ff4a02 | 398 | * @arg UART_FLAG_TC: Transmission Complete flag. |
| AnnaBridge | 161:aa5281ff4a02 | 399 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
| AnnaBridge | 161:aa5281ff4a02 | 400 | * |
| AnnaBridge | 161:aa5281ff4a02 | 401 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
| AnnaBridge | 161:aa5281ff4a02 | 402 | * error) and IDLE (Idle line detected) flags are cleared by software |
| AnnaBridge | 161:aa5281ff4a02 | 403 | * sequence: a read operation to USART_SR register followed by a read |
| AnnaBridge | 161:aa5281ff4a02 | 404 | * operation to USART_DR register. |
| AnnaBridge | 161:aa5281ff4a02 | 405 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
| AnnaBridge | 161:aa5281ff4a02 | 406 | * @note TC flag can be also cleared by software sequence: a read operation to |
| AnnaBridge | 161:aa5281ff4a02 | 407 | * USART_SR register followed by a write operation to USART_DR register. |
| AnnaBridge | 161:aa5281ff4a02 | 408 | * @note TXE flag is cleared only by a write to the USART_DR register. |
| AnnaBridge | 161:aa5281ff4a02 | 409 | * |
| AnnaBridge | 161:aa5281ff4a02 | 410 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 411 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 412 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
| AnnaBridge | 161:aa5281ff4a02 | 413 | |
| AnnaBridge | 161:aa5281ff4a02 | 414 | /** @brief Clear the UART PE pending flag. |
| AnnaBridge | 163:e59c8e839560 | 415 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 416 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 417 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 418 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 419 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 420 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
| AnnaBridge | 161:aa5281ff4a02 | 421 | do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 422 | __IO uint32_t tmpreg = 0x00U; \ |
| AnnaBridge | 161:aa5281ff4a02 | 423 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| AnnaBridge | 161:aa5281ff4a02 | 424 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| AnnaBridge | 161:aa5281ff4a02 | 425 | UNUSED(tmpreg); \ |
| AnnaBridge | 161:aa5281ff4a02 | 426 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 427 | |
| AnnaBridge | 161:aa5281ff4a02 | 428 | /** @brief Clear the UART FE pending flag. |
| AnnaBridge | 163:e59c8e839560 | 429 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 430 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 431 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 432 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 433 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 434 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 161:aa5281ff4a02 | 435 | |
| AnnaBridge | 161:aa5281ff4a02 | 436 | /** @brief Clear the UART NE pending flag. |
| AnnaBridge | 163:e59c8e839560 | 437 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 438 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 439 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 440 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 441 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 442 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 161:aa5281ff4a02 | 443 | |
| AnnaBridge | 161:aa5281ff4a02 | 444 | /** @brief Clear the UART ORE pending flag. |
| AnnaBridge | 163:e59c8e839560 | 445 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 446 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 447 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 448 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 449 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 450 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 161:aa5281ff4a02 | 451 | |
| AnnaBridge | 161:aa5281ff4a02 | 452 | /** @brief Clear the UART IDLE pending flag. |
| AnnaBridge | 163:e59c8e839560 | 453 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 454 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 455 | * UART peripheral. |
| AnnaBridge | 161:aa5281ff4a02 | 456 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 457 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 458 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 161:aa5281ff4a02 | 459 | |
| AnnaBridge | 161:aa5281ff4a02 | 460 | /** @brief Enable the specified UART interrupt. |
| AnnaBridge | 163:e59c8e839560 | 461 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 462 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 463 | * UART peripheral. |
| AnnaBridge | 163:e59c8e839560 | 464 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
| AnnaBridge | 161:aa5281ff4a02 | 465 | * This parameter can be one of the following values: |
| AnnaBridge | 161:aa5281ff4a02 | 466 | * @arg UART_IT_CTS: CTS change interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 467 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 468 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 469 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 470 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 471 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 472 | * @arg UART_IT_PE: Parity Error interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 473 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 161:aa5281ff4a02 | 474 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 475 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 476 | #define UART_IT_MASK 0x0000FFFFU |
| AnnaBridge | 161:aa5281ff4a02 | 477 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 161:aa5281ff4a02 | 478 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 161:aa5281ff4a02 | 479 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
| AnnaBridge | 161:aa5281ff4a02 | 480 | /** @brief Disable the specified UART interrupt. |
| AnnaBridge | 163:e59c8e839560 | 481 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 482 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 483 | * UART peripheral. |
| AnnaBridge | 163:e59c8e839560 | 484 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
| AnnaBridge | 161:aa5281ff4a02 | 485 | * This parameter can be one of the following values: |
| AnnaBridge | 161:aa5281ff4a02 | 486 | * @arg UART_IT_CTS: CTS change interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 487 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 488 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 489 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 490 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 491 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 492 | * @arg UART_IT_PE: Parity Error interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 493 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 161:aa5281ff4a02 | 494 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 495 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 496 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 161:aa5281ff4a02 | 497 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 161:aa5281ff4a02 | 498 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
| AnnaBridge | 161:aa5281ff4a02 | 499 | |
| AnnaBridge | 161:aa5281ff4a02 | 500 | /** @brief Checks whether the specified UART interrupt has occurred or not. |
| AnnaBridge | 163:e59c8e839560 | 501 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 502 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 161:aa5281ff4a02 | 503 | * UART peripheral. |
| AnnaBridge | 163:e59c8e839560 | 504 | * @param __IT__ specifies the UART interrupt source to check. |
| AnnaBridge | 161:aa5281ff4a02 | 505 | * This parameter can be one of the following values: |
| AnnaBridge | 161:aa5281ff4a02 | 506 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
| AnnaBridge | 161:aa5281ff4a02 | 507 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 508 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 509 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 510 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 511 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 512 | * @arg USART_IT_ERR: Error interrupt |
| AnnaBridge | 161:aa5281ff4a02 | 513 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 161:aa5281ff4a02 | 514 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 515 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \ |
| AnnaBridge | 161:aa5281ff4a02 | 516 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
| AnnaBridge | 161:aa5281ff4a02 | 517 | |
| AnnaBridge | 161:aa5281ff4a02 | 518 | /** @brief Enable CTS flow control |
| AnnaBridge | 161:aa5281ff4a02 | 519 | * This macro allows to enable CTS hardware flow control for a given UART instance, |
| AnnaBridge | 161:aa5281ff4a02 | 520 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 161:aa5281ff4a02 | 521 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 161:aa5281ff4a02 | 522 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| AnnaBridge | 161:aa5281ff4a02 | 523 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 161:aa5281ff4a02 | 524 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 161:aa5281ff4a02 | 525 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 161:aa5281ff4a02 | 526 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 163:e59c8e839560 | 527 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 528 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 161:aa5281ff4a02 | 529 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 530 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 531 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 161:aa5281ff4a02 | 532 | do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 533 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| AnnaBridge | 161:aa5281ff4a02 | 534 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
| AnnaBridge | 161:aa5281ff4a02 | 535 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 536 | |
| AnnaBridge | 161:aa5281ff4a02 | 537 | /** @brief Disable CTS flow control |
| AnnaBridge | 161:aa5281ff4a02 | 538 | * This macro allows to disable CTS hardware flow control for a given UART instance, |
| AnnaBridge | 161:aa5281ff4a02 | 539 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 161:aa5281ff4a02 | 540 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 161:aa5281ff4a02 | 541 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| AnnaBridge | 161:aa5281ff4a02 | 542 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 161:aa5281ff4a02 | 543 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 161:aa5281ff4a02 | 544 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 161:aa5281ff4a02 | 545 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 163:e59c8e839560 | 546 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 547 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 161:aa5281ff4a02 | 548 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 549 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 550 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
| AnnaBridge | 161:aa5281ff4a02 | 551 | do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 552 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| AnnaBridge | 161:aa5281ff4a02 | 553 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
| AnnaBridge | 161:aa5281ff4a02 | 554 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 555 | |
| AnnaBridge | 161:aa5281ff4a02 | 556 | /** @brief Enable RTS flow control |
| AnnaBridge | 161:aa5281ff4a02 | 557 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
| AnnaBridge | 161:aa5281ff4a02 | 558 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 161:aa5281ff4a02 | 559 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 161:aa5281ff4a02 | 560 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| AnnaBridge | 161:aa5281ff4a02 | 561 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 161:aa5281ff4a02 | 562 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 161:aa5281ff4a02 | 563 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 161:aa5281ff4a02 | 564 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 163:e59c8e839560 | 565 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 566 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 161:aa5281ff4a02 | 567 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 568 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 569 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 161:aa5281ff4a02 | 570 | do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 571 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
| AnnaBridge | 161:aa5281ff4a02 | 572 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
| AnnaBridge | 161:aa5281ff4a02 | 573 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 574 | |
| AnnaBridge | 161:aa5281ff4a02 | 575 | /** @brief Disable RTS flow control |
| AnnaBridge | 161:aa5281ff4a02 | 576 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
| AnnaBridge | 161:aa5281ff4a02 | 577 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 161:aa5281ff4a02 | 578 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 161:aa5281ff4a02 | 579 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| AnnaBridge | 161:aa5281ff4a02 | 580 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 161:aa5281ff4a02 | 581 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 161:aa5281ff4a02 | 582 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 161:aa5281ff4a02 | 583 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 163:e59c8e839560 | 584 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 585 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 161:aa5281ff4a02 | 586 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 587 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 588 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
| AnnaBridge | 161:aa5281ff4a02 | 589 | do{ \ |
| AnnaBridge | 161:aa5281ff4a02 | 590 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
| AnnaBridge | 161:aa5281ff4a02 | 591 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
| AnnaBridge | 161:aa5281ff4a02 | 592 | } while(0U) |
| AnnaBridge | 161:aa5281ff4a02 | 593 | |
| AnnaBridge | 161:aa5281ff4a02 | 594 | /** @brief macros to enables the UART's one bit sample method |
| AnnaBridge | 163:e59c8e839560 | 595 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 596 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 597 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 598 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
| AnnaBridge | 161:aa5281ff4a02 | 599 | |
| AnnaBridge | 161:aa5281ff4a02 | 600 | /** @brief macros to disables the UART's one bit sample method |
| AnnaBridge | 163:e59c8e839560 | 601 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 602 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 603 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 604 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
| AnnaBridge | 161:aa5281ff4a02 | 605 | |
| AnnaBridge | 161:aa5281ff4a02 | 606 | /** @brief Enable UART |
| AnnaBridge | 163:e59c8e839560 | 607 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 608 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 609 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 610 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| AnnaBridge | 161:aa5281ff4a02 | 611 | |
| AnnaBridge | 161:aa5281ff4a02 | 612 | /** @brief Disable UART |
| AnnaBridge | 163:e59c8e839560 | 613 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 161:aa5281ff4a02 | 614 | * @retval None |
| AnnaBridge | 161:aa5281ff4a02 | 615 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 616 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| AnnaBridge | 161:aa5281ff4a02 | 617 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 618 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 619 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 620 | |
| AnnaBridge | 161:aa5281ff4a02 | 621 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 622 | /** @addtogroup UART_Exported_Functions |
| AnnaBridge | 161:aa5281ff4a02 | 623 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 624 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 625 | |
| AnnaBridge | 161:aa5281ff4a02 | 626 | /** @addtogroup UART_Exported_Functions_Group1 |
| AnnaBridge | 161:aa5281ff4a02 | 627 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 628 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 629 | /* Initialization/de-initialization functions **********************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 630 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 631 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 632 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
| AnnaBridge | 161:aa5281ff4a02 | 633 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
| AnnaBridge | 161:aa5281ff4a02 | 634 | HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 635 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 636 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 637 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 638 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 639 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 640 | |
| AnnaBridge | 161:aa5281ff4a02 | 641 | /** @addtogroup UART_Exported_Functions_Group2 |
| AnnaBridge | 161:aa5281ff4a02 | 642 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 643 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 644 | /* IO operation functions *******************************************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 645 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 161:aa5281ff4a02 | 646 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 161:aa5281ff4a02 | 647 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 161:aa5281ff4a02 | 648 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 161:aa5281ff4a02 | 649 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 161:aa5281ff4a02 | 650 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 161:aa5281ff4a02 | 651 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 652 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 653 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 654 | /* Transfer Abort functions */ |
| AnnaBridge | 161:aa5281ff4a02 | 655 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 656 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 657 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 658 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 659 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 660 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 661 | |
| AnnaBridge | 161:aa5281ff4a02 | 662 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 663 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 664 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 665 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 666 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 667 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 668 | void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 669 | void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 670 | void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 671 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 672 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 673 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 674 | |
| AnnaBridge | 161:aa5281ff4a02 | 675 | /** @addtogroup UART_Exported_Functions_Group3 |
| AnnaBridge | 161:aa5281ff4a02 | 676 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 677 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 678 | /* Peripheral Control functions ************************************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 679 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 680 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 681 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 682 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 683 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 684 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 685 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 686 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 687 | |
| AnnaBridge | 161:aa5281ff4a02 | 688 | /** @addtogroup UART_Exported_Functions_Group4 |
| AnnaBridge | 161:aa5281ff4a02 | 689 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 690 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 691 | /* Peripheral State functions **************************************************/ |
| AnnaBridge | 161:aa5281ff4a02 | 692 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 693 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
| AnnaBridge | 161:aa5281ff4a02 | 694 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 695 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 696 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 697 | |
| AnnaBridge | 161:aa5281ff4a02 | 698 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 699 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 700 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 701 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 702 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 703 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 704 | /** @defgroup UART_Private_Constants UART Private Constants |
| AnnaBridge | 161:aa5281ff4a02 | 705 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 706 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 707 | /** @brief UART interruptions flag mask |
| AnnaBridge | 161:aa5281ff4a02 | 708 | * |
| AnnaBridge | 161:aa5281ff4a02 | 709 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 710 | #define UART_CR1_REG_INDEX 1U |
| AnnaBridge | 161:aa5281ff4a02 | 711 | #define UART_CR2_REG_INDEX 2U |
| AnnaBridge | 161:aa5281ff4a02 | 712 | #define UART_CR3_REG_INDEX 3U |
| AnnaBridge | 161:aa5281ff4a02 | 713 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 714 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 715 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 716 | |
| AnnaBridge | 161:aa5281ff4a02 | 717 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 718 | /** @defgroup UART_Private_Macros UART Private Macros |
| AnnaBridge | 161:aa5281ff4a02 | 719 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 720 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 721 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 722 | ((LENGTH) == UART_WORDLENGTH_9B)) |
| AnnaBridge | 161:aa5281ff4a02 | 723 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
| AnnaBridge | 161:aa5281ff4a02 | 724 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 725 | ((STOPBITS) == UART_STOPBITS_2)) |
| AnnaBridge | 161:aa5281ff4a02 | 726 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 727 | ((PARITY) == UART_PARITY_EVEN) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 728 | ((PARITY) == UART_PARITY_ODD)) |
| AnnaBridge | 161:aa5281ff4a02 | 729 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
| AnnaBridge | 161:aa5281ff4a02 | 730 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 731 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 732 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 733 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
| AnnaBridge | 161:aa5281ff4a02 | 734 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
| AnnaBridge | 161:aa5281ff4a02 | 735 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 736 | ((STATE) == UART_STATE_ENABLE)) |
| AnnaBridge | 161:aa5281ff4a02 | 737 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 738 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
| AnnaBridge | 161:aa5281ff4a02 | 739 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
| AnnaBridge | 161:aa5281ff4a02 | 740 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 741 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
| AnnaBridge | 161:aa5281ff4a02 | 742 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
| AnnaBridge | 161:aa5281ff4a02 | 743 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
| AnnaBridge | 161:aa5281ff4a02 | 744 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U) |
| AnnaBridge | 161:aa5281ff4a02 | 745 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
| AnnaBridge | 161:aa5281ff4a02 | 746 | |
| AnnaBridge | 161:aa5281ff4a02 | 747 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
| AnnaBridge | 161:aa5281ff4a02 | 748 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
| AnnaBridge | 161:aa5281ff4a02 | 749 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) |
| AnnaBridge | 161:aa5281ff4a02 | 750 | /* UART BRR = mantissa + overflow + fraction |
| AnnaBridge | 161:aa5281ff4a02 | 751 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
| AnnaBridge | 161:aa5281ff4a02 | 752 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
| AnnaBridge | 161:aa5281ff4a02 | 753 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
| AnnaBridge | 161:aa5281ff4a02 | 754 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
| AnnaBridge | 161:aa5281ff4a02 | 755 | |
| AnnaBridge | 161:aa5281ff4a02 | 756 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
| AnnaBridge | 161:aa5281ff4a02 | 757 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
| AnnaBridge | 161:aa5281ff4a02 | 758 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) |
| AnnaBridge | 161:aa5281ff4a02 | 759 | /* UART BRR = mantissa + overflow + fraction |
| AnnaBridge | 161:aa5281ff4a02 | 760 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
| AnnaBridge | 161:aa5281ff4a02 | 761 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
| AnnaBridge | 161:aa5281ff4a02 | 762 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
| AnnaBridge | 161:aa5281ff4a02 | 763 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
| AnnaBridge | 161:aa5281ff4a02 | 764 | |
| AnnaBridge | 161:aa5281ff4a02 | 765 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 766 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 767 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 768 | |
| AnnaBridge | 161:aa5281ff4a02 | 769 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 161:aa5281ff4a02 | 770 | /** @defgroup UART_Private_Functions UART Private Functions |
| AnnaBridge | 161:aa5281ff4a02 | 771 | * @{ |
| AnnaBridge | 161:aa5281ff4a02 | 772 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 773 | |
| AnnaBridge | 161:aa5281ff4a02 | 774 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 775 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 776 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 777 | |
| AnnaBridge | 161:aa5281ff4a02 | 778 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 779 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 780 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 781 | |
| AnnaBridge | 161:aa5281ff4a02 | 782 | /** |
| AnnaBridge | 161:aa5281ff4a02 | 783 | * @} |
| AnnaBridge | 161:aa5281ff4a02 | 784 | */ |
| AnnaBridge | 161:aa5281ff4a02 | 785 | |
| AnnaBridge | 161:aa5281ff4a02 | 786 | #ifdef __cplusplus |
| AnnaBridge | 161:aa5281ff4a02 | 787 | } |
| AnnaBridge | 161:aa5281ff4a02 | 788 | #endif |
| AnnaBridge | 161:aa5281ff4a02 | 789 | |
| AnnaBridge | 161:aa5281ff4a02 | 790 | #endif /* __STM32F4xx_HAL_UART_H */ |
| AnnaBridge | 161:aa5281ff4a02 | 791 | |
| AnnaBridge | 161:aa5281ff4a02 | 792 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
