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TARGET_NUCLEO_F412ZG/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sdram.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_STEVAL_3DP001V1/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sdram.h@163:e59c8e839560 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 163:e59c8e839560 1 /**
AnnaBridge 163:e59c8e839560 2 ******************************************************************************
AnnaBridge 163:e59c8e839560 3 * @file stm32f4xx_hal_sdram.h
AnnaBridge 163:e59c8e839560 4 * @author MCD Application Team
AnnaBridge 163:e59c8e839560 5 * @brief Header file of SDRAM HAL module.
AnnaBridge 163:e59c8e839560 6 ******************************************************************************
AnnaBridge 163:e59c8e839560 7 * @attention
AnnaBridge 163:e59c8e839560 8 *
AnnaBridge 163:e59c8e839560 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 163:e59c8e839560 10 *
AnnaBridge 163:e59c8e839560 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 163:e59c8e839560 12 * are permitted provided that the following conditions are met:
AnnaBridge 163:e59c8e839560 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 163:e59c8e839560 14 * this list of conditions and the following disclaimer.
AnnaBridge 163:e59c8e839560 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 163:e59c8e839560 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 163:e59c8e839560 17 * and/or other materials provided with the distribution.
AnnaBridge 163:e59c8e839560 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 163:e59c8e839560 19 * may be used to endorse or promote products derived from this software
AnnaBridge 163:e59c8e839560 20 * without specific prior written permission.
AnnaBridge 163:e59c8e839560 21 *
AnnaBridge 163:e59c8e839560 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 163:e59c8e839560 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 163:e59c8e839560 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 163:e59c8e839560 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 163:e59c8e839560 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 163:e59c8e839560 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 163:e59c8e839560 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 163:e59c8e839560 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 163:e59c8e839560 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 163:e59c8e839560 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 163:e59c8e839560 32 *
AnnaBridge 163:e59c8e839560 33 ******************************************************************************
AnnaBridge 163:e59c8e839560 34 */
AnnaBridge 163:e59c8e839560 35
AnnaBridge 163:e59c8e839560 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 163:e59c8e839560 37 #ifndef __STM32F4xx_HAL_SDRAM_H
AnnaBridge 163:e59c8e839560 38 #define __STM32F4xx_HAL_SDRAM_H
AnnaBridge 163:e59c8e839560 39
AnnaBridge 163:e59c8e839560 40 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 41 extern "C" {
AnnaBridge 163:e59c8e839560 42 #endif
AnnaBridge 163:e59c8e839560 43
AnnaBridge 163:e59c8e839560 44 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 163:e59c8e839560 45 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 46
AnnaBridge 163:e59c8e839560 47 /* Includes ------------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 48 #include "stm32f4xx_ll_fmc.h"
AnnaBridge 163:e59c8e839560 49
AnnaBridge 163:e59c8e839560 50 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 163:e59c8e839560 51 * @{
AnnaBridge 163:e59c8e839560 52 */
AnnaBridge 163:e59c8e839560 53
AnnaBridge 163:e59c8e839560 54 /** @addtogroup SDRAM
AnnaBridge 163:e59c8e839560 55 * @{
AnnaBridge 163:e59c8e839560 56 */
AnnaBridge 163:e59c8e839560 57
AnnaBridge 163:e59c8e839560 58 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 59 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
AnnaBridge 163:e59c8e839560 60 * @{
AnnaBridge 163:e59c8e839560 61 */
AnnaBridge 163:e59c8e839560 62
AnnaBridge 163:e59c8e839560 63 /**
AnnaBridge 163:e59c8e839560 64 * @brief HAL SDRAM State structure definition
AnnaBridge 163:e59c8e839560 65 */
AnnaBridge 163:e59c8e839560 66 typedef enum
AnnaBridge 163:e59c8e839560 67 {
AnnaBridge 163:e59c8e839560 68 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */
AnnaBridge 163:e59c8e839560 69 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */
AnnaBridge 163:e59c8e839560 70 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */
AnnaBridge 163:e59c8e839560 71 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */
AnnaBridge 163:e59c8e839560 72 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */
AnnaBridge 163:e59c8e839560 73 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */
AnnaBridge 163:e59c8e839560 74
AnnaBridge 163:e59c8e839560 75 }HAL_SDRAM_StateTypeDef;
AnnaBridge 163:e59c8e839560 76
AnnaBridge 163:e59c8e839560 77 /**
AnnaBridge 163:e59c8e839560 78 * @brief SDRAM handle Structure definition
AnnaBridge 163:e59c8e839560 79 */
AnnaBridge 163:e59c8e839560 80 typedef struct
AnnaBridge 163:e59c8e839560 81 {
AnnaBridge 163:e59c8e839560 82 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 163:e59c8e839560 83
AnnaBridge 163:e59c8e839560 84 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
AnnaBridge 163:e59c8e839560 85
AnnaBridge 163:e59c8e839560 86 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
AnnaBridge 163:e59c8e839560 87
AnnaBridge 163:e59c8e839560 88 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
AnnaBridge 163:e59c8e839560 89
AnnaBridge 163:e59c8e839560 90 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
AnnaBridge 163:e59c8e839560 91
AnnaBridge 163:e59c8e839560 92 }SDRAM_HandleTypeDef;
AnnaBridge 163:e59c8e839560 93 /**
AnnaBridge 163:e59c8e839560 94 * @}
AnnaBridge 163:e59c8e839560 95 */
AnnaBridge 163:e59c8e839560 96
AnnaBridge 163:e59c8e839560 97 /* Exported constants --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 98 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 99 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
AnnaBridge 163:e59c8e839560 100 * @{
AnnaBridge 163:e59c8e839560 101 */
AnnaBridge 163:e59c8e839560 102
AnnaBridge 163:e59c8e839560 103 /** @brief Reset SDRAM handle state
AnnaBridge 163:e59c8e839560 104 * @param __HANDLE__ specifies the SDRAM handle.
AnnaBridge 163:e59c8e839560 105 * @retval None
AnnaBridge 163:e59c8e839560 106 */
AnnaBridge 163:e59c8e839560 107 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
AnnaBridge 163:e59c8e839560 108 /**
AnnaBridge 163:e59c8e839560 109 * @}
AnnaBridge 163:e59c8e839560 110 */
AnnaBridge 163:e59c8e839560 111
AnnaBridge 163:e59c8e839560 112 /* Exported functions --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 113 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
AnnaBridge 163:e59c8e839560 114 * @{
AnnaBridge 163:e59c8e839560 115 */
AnnaBridge 163:e59c8e839560 116
AnnaBridge 163:e59c8e839560 117 /** @addtogroup SDRAM_Exported_Functions_Group1
AnnaBridge 163:e59c8e839560 118 * @{
AnnaBridge 163:e59c8e839560 119 */
AnnaBridge 163:e59c8e839560 120
AnnaBridge 163:e59c8e839560 121 /* Initialization/de-initialization functions *********************************/
AnnaBridge 163:e59c8e839560 122 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
AnnaBridge 163:e59c8e839560 123 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 124 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 125 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 126
AnnaBridge 163:e59c8e839560 127 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 128 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 129 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 163:e59c8e839560 130 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 163:e59c8e839560 131 /**
AnnaBridge 163:e59c8e839560 132 * @}
AnnaBridge 163:e59c8e839560 133 */
AnnaBridge 163:e59c8e839560 134
AnnaBridge 163:e59c8e839560 135 /** @addtogroup SDRAM_Exported_Functions_Group2
AnnaBridge 163:e59c8e839560 136 * @{
AnnaBridge 163:e59c8e839560 137 */
AnnaBridge 163:e59c8e839560 138 /* I/O operation functions ****************************************************/
AnnaBridge 163:e59c8e839560 139 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 140 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 141 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 142 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 143 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 144 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 145
AnnaBridge 163:e59c8e839560 146 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 147 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 148 /**
AnnaBridge 163:e59c8e839560 149 * @}
AnnaBridge 163:e59c8e839560 150 */
AnnaBridge 163:e59c8e839560 151
AnnaBridge 163:e59c8e839560 152 /** @addtogroup SDRAM_Exported_Functions_Group3
AnnaBridge 163:e59c8e839560 153 * @{
AnnaBridge 163:e59c8e839560 154 */
AnnaBridge 163:e59c8e839560 155 /* SDRAM Control functions *****************************************************/
AnnaBridge 163:e59c8e839560 156 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 157 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 158 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
AnnaBridge 163:e59c8e839560 159 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
AnnaBridge 163:e59c8e839560 160 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
AnnaBridge 163:e59c8e839560 161 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 162 /**
AnnaBridge 163:e59c8e839560 163 * @}
AnnaBridge 163:e59c8e839560 164 */
AnnaBridge 163:e59c8e839560 165
AnnaBridge 163:e59c8e839560 166 /** @addtogroup SDRAM_Exported_Functions_Group4
AnnaBridge 163:e59c8e839560 167 * @{
AnnaBridge 163:e59c8e839560 168 */
AnnaBridge 163:e59c8e839560 169 /* SDRAM State functions ********************************************************/
AnnaBridge 163:e59c8e839560 170 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
AnnaBridge 163:e59c8e839560 171 /**
AnnaBridge 163:e59c8e839560 172 * @}
AnnaBridge 163:e59c8e839560 173 */
AnnaBridge 163:e59c8e839560 174
AnnaBridge 163:e59c8e839560 175 /**
AnnaBridge 163:e59c8e839560 176 * @}
AnnaBridge 163:e59c8e839560 177 */
AnnaBridge 163:e59c8e839560 178
AnnaBridge 163:e59c8e839560 179 /**
AnnaBridge 163:e59c8e839560 180 * @}
AnnaBridge 163:e59c8e839560 181 */
AnnaBridge 163:e59c8e839560 182
AnnaBridge 163:e59c8e839560 183 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 184
AnnaBridge 163:e59c8e839560 185 /**
AnnaBridge 163:e59c8e839560 186 * @}
AnnaBridge 163:e59c8e839560 187 */
AnnaBridge 163:e59c8e839560 188
AnnaBridge 163:e59c8e839560 189 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 190 }
AnnaBridge 163:e59c8e839560 191 #endif
AnnaBridge 163:e59c8e839560 192
AnnaBridge 163:e59c8e839560 193 #endif /* __STM32F4xx_HAL_SDRAM_H */
AnnaBridge 163:e59c8e839560 194
AnnaBridge 163:e59c8e839560 195 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/