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TARGET_NUCLEO_F303RE/TOOLCHAIN_ARM_STD/stm32f3xx_hal_sram.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_sram.h@168:b9e159c1930a 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 163:e59c8e839560 1 /**
AnnaBridge 163:e59c8e839560 2 ******************************************************************************
AnnaBridge 163:e59c8e839560 3 * @file stm32f3xx_hal_sram.h
AnnaBridge 163:e59c8e839560 4 * @author MCD Application Team
AnnaBridge 163:e59c8e839560 5 * @brief Header file of SRAM HAL module.
AnnaBridge 163:e59c8e839560 6 ******************************************************************************
AnnaBridge 163:e59c8e839560 7 * @attention
AnnaBridge 163:e59c8e839560 8 *
AnnaBridge 163:e59c8e839560 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 163:e59c8e839560 10 *
AnnaBridge 163:e59c8e839560 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 163:e59c8e839560 12 * are permitted provided that the following conditions are met:
AnnaBridge 163:e59c8e839560 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 163:e59c8e839560 14 * this list of conditions and the following disclaimer.
AnnaBridge 163:e59c8e839560 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 163:e59c8e839560 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 163:e59c8e839560 17 * and/or other materials provided with the distribution.
AnnaBridge 163:e59c8e839560 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 163:e59c8e839560 19 * may be used to endorse or promote products derived from this software
AnnaBridge 163:e59c8e839560 20 * without specific prior written permission.
AnnaBridge 163:e59c8e839560 21 *
AnnaBridge 163:e59c8e839560 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 163:e59c8e839560 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 163:e59c8e839560 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 163:e59c8e839560 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 163:e59c8e839560 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 163:e59c8e839560 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 163:e59c8e839560 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 163:e59c8e839560 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 163:e59c8e839560 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 163:e59c8e839560 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 163:e59c8e839560 32 *
AnnaBridge 163:e59c8e839560 33 ******************************************************************************
AnnaBridge 163:e59c8e839560 34 */
AnnaBridge 163:e59c8e839560 35
AnnaBridge 163:e59c8e839560 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 163:e59c8e839560 37 #ifndef __STM32F3xx_HAL_SRAM_H
AnnaBridge 163:e59c8e839560 38 #define __STM32F3xx_HAL_SRAM_H
AnnaBridge 163:e59c8e839560 39
AnnaBridge 163:e59c8e839560 40 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 41 extern "C" {
AnnaBridge 163:e59c8e839560 42 #endif
AnnaBridge 163:e59c8e839560 43
AnnaBridge 163:e59c8e839560 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 45 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
AnnaBridge 163:e59c8e839560 46 #include "stm32f3xx_ll_fmc.h"
AnnaBridge 163:e59c8e839560 47
AnnaBridge 163:e59c8e839560 48 /** @addtogroup STM32F3xx_HAL_Driver
AnnaBridge 163:e59c8e839560 49 * @{
AnnaBridge 163:e59c8e839560 50 */
AnnaBridge 163:e59c8e839560 51
AnnaBridge 163:e59c8e839560 52 /** @addtogroup SRAM
AnnaBridge 163:e59c8e839560 53 * @{
AnnaBridge 163:e59c8e839560 54 */
AnnaBridge 163:e59c8e839560 55
AnnaBridge 163:e59c8e839560 56 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 57
AnnaBridge 163:e59c8e839560 58 /** @defgroup SRAM_Exported_Types SRAM Exported Types
AnnaBridge 163:e59c8e839560 59 * @{
AnnaBridge 163:e59c8e839560 60 */
AnnaBridge 163:e59c8e839560 61 /**
AnnaBridge 163:e59c8e839560 62 * @brief HAL SRAM State structures definition
AnnaBridge 163:e59c8e839560 63 */
AnnaBridge 163:e59c8e839560 64 typedef enum
AnnaBridge 163:e59c8e839560 65 {
AnnaBridge 163:e59c8e839560 66 HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */
AnnaBridge 163:e59c8e839560 67 HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
AnnaBridge 163:e59c8e839560 68 HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
AnnaBridge 163:e59c8e839560 69 HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
AnnaBridge 163:e59c8e839560 70 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
AnnaBridge 163:e59c8e839560 71
AnnaBridge 163:e59c8e839560 72 }HAL_SRAM_StateTypeDef;
AnnaBridge 163:e59c8e839560 73
AnnaBridge 163:e59c8e839560 74 /**
AnnaBridge 163:e59c8e839560 75 * @brief SRAM handle Structure definition
AnnaBridge 163:e59c8e839560 76 */
AnnaBridge 163:e59c8e839560 77 typedef struct
AnnaBridge 163:e59c8e839560 78 {
AnnaBridge 163:e59c8e839560 79 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 163:e59c8e839560 80
AnnaBridge 163:e59c8e839560 81 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 163:e59c8e839560 82
AnnaBridge 163:e59c8e839560 83 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
AnnaBridge 163:e59c8e839560 84
AnnaBridge 163:e59c8e839560 85 HAL_LockTypeDef Lock; /*!< SRAM locking object */
AnnaBridge 163:e59c8e839560 86
AnnaBridge 163:e59c8e839560 87 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
AnnaBridge 163:e59c8e839560 88
AnnaBridge 163:e59c8e839560 89 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
AnnaBridge 163:e59c8e839560 90
AnnaBridge 163:e59c8e839560 91 }SRAM_HandleTypeDef;
AnnaBridge 163:e59c8e839560 92
AnnaBridge 163:e59c8e839560 93 /**
AnnaBridge 163:e59c8e839560 94 * @}
AnnaBridge 163:e59c8e839560 95 */
AnnaBridge 163:e59c8e839560 96
AnnaBridge 163:e59c8e839560 97 /* Exported constants --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 98 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 99
AnnaBridge 163:e59c8e839560 100 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
AnnaBridge 163:e59c8e839560 101 * @{
AnnaBridge 163:e59c8e839560 102 */
AnnaBridge 163:e59c8e839560 103
AnnaBridge 163:e59c8e839560 104 /** @brief Reset SRAM handle state
AnnaBridge 168:b9e159c1930a 105 * @param __HANDLE__ SRAM handle
AnnaBridge 163:e59c8e839560 106 * @retval None
AnnaBridge 163:e59c8e839560 107 */
AnnaBridge 163:e59c8e839560 108 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
AnnaBridge 163:e59c8e839560 109
AnnaBridge 163:e59c8e839560 110 /**
AnnaBridge 163:e59c8e839560 111 * @}
AnnaBridge 163:e59c8e839560 112 */
AnnaBridge 163:e59c8e839560 113
AnnaBridge 163:e59c8e839560 114 /* Exported functions --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 115 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
AnnaBridge 163:e59c8e839560 116 * @{
AnnaBridge 163:e59c8e839560 117 */
AnnaBridge 163:e59c8e839560 118
AnnaBridge 163:e59c8e839560 119 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 163:e59c8e839560 120 * @{
AnnaBridge 163:e59c8e839560 121 */
AnnaBridge 163:e59c8e839560 122
AnnaBridge 163:e59c8e839560 123 /* Initialization/de-initialization functions ********************************/
AnnaBridge 163:e59c8e839560 124 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 163:e59c8e839560 125 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 126 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 127 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 128
AnnaBridge 163:e59c8e839560 129 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 163:e59c8e839560 130 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 163:e59c8e839560 131
AnnaBridge 163:e59c8e839560 132 /**
AnnaBridge 163:e59c8e839560 133 * @}
AnnaBridge 163:e59c8e839560 134 */
AnnaBridge 163:e59c8e839560 135
AnnaBridge 163:e59c8e839560 136 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
AnnaBridge 163:e59c8e839560 137 * @{
AnnaBridge 163:e59c8e839560 138 */
AnnaBridge 163:e59c8e839560 139
AnnaBridge 163:e59c8e839560 140 /* I/O operation functions ***************************************************/
AnnaBridge 163:e59c8e839560 141 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 142 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 143 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 144 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 145 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 146 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 147 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 148 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 163:e59c8e839560 149
AnnaBridge 163:e59c8e839560 150 /**
AnnaBridge 163:e59c8e839560 151 * @}
AnnaBridge 163:e59c8e839560 152 */
AnnaBridge 163:e59c8e839560 153
AnnaBridge 163:e59c8e839560 154 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
AnnaBridge 163:e59c8e839560 155 * @{
AnnaBridge 163:e59c8e839560 156 */
AnnaBridge 163:e59c8e839560 157
AnnaBridge 163:e59c8e839560 158 /* SRAM Control functions ****************************************************/
AnnaBridge 163:e59c8e839560 159 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 160 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 161
AnnaBridge 163:e59c8e839560 162 /**
AnnaBridge 163:e59c8e839560 163 * @}
AnnaBridge 163:e59c8e839560 164 */
AnnaBridge 163:e59c8e839560 165
AnnaBridge 163:e59c8e839560 166 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 163:e59c8e839560 167 * @{
AnnaBridge 163:e59c8e839560 168 */
AnnaBridge 163:e59c8e839560 169
AnnaBridge 163:e59c8e839560 170 /* SRAM Peripheral State functions ********************************************/
AnnaBridge 163:e59c8e839560 171 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
AnnaBridge 163:e59c8e839560 172
AnnaBridge 163:e59c8e839560 173 /**
AnnaBridge 163:e59c8e839560 174 * @}
AnnaBridge 163:e59c8e839560 175 */
AnnaBridge 163:e59c8e839560 176
AnnaBridge 163:e59c8e839560 177 /**
AnnaBridge 163:e59c8e839560 178 * @}
AnnaBridge 163:e59c8e839560 179 */
AnnaBridge 163:e59c8e839560 180
AnnaBridge 163:e59c8e839560 181 /**
AnnaBridge 163:e59c8e839560 182 * @}
AnnaBridge 163:e59c8e839560 183 */
AnnaBridge 163:e59c8e839560 184
AnnaBridge 163:e59c8e839560 185 /**
AnnaBridge 163:e59c8e839560 186 * @}
AnnaBridge 163:e59c8e839560 187 */
AnnaBridge 163:e59c8e839560 188
AnnaBridge 163:e59c8e839560 189 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
AnnaBridge 163:e59c8e839560 190
AnnaBridge 163:e59c8e839560 191 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 192 }
AnnaBridge 163:e59c8e839560 193 #endif
AnnaBridge 163:e59c8e839560 194
AnnaBridge 163:e59c8e839560 195 #endif /* __STM32F3xx_HAL_SRAM_H */
AnnaBridge 163:e59c8e839560 196
AnnaBridge 163:e59c8e839560 197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/