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TARGET_NUCLEO_F303RE/TOOLCHAIN_ARM_MICRO/stm32f3xx_ll_pwr.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_pwr.h@168:b9e159c1930a
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 163:e59c8e839560 | 1 | /** |
| AnnaBridge | 163:e59c8e839560 | 2 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 3 | * @file stm32f3xx_ll_pwr.h |
| AnnaBridge | 163:e59c8e839560 | 4 | * @author MCD Application Team |
| AnnaBridge | 163:e59c8e839560 | 5 | * @brief Header file of PWR LL module. |
| AnnaBridge | 163:e59c8e839560 | 6 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 7 | * @attention |
| AnnaBridge | 163:e59c8e839560 | 8 | * |
| AnnaBridge | 163:e59c8e839560 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 163:e59c8e839560 | 10 | * |
| AnnaBridge | 163:e59c8e839560 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 163:e59c8e839560 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 163:e59c8e839560 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 163:e59c8e839560 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 163:e59c8e839560 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 163:e59c8e839560 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 163:e59c8e839560 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 163:e59c8e839560 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 163:e59c8e839560 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 163:e59c8e839560 | 20 | * without specific prior written permission. |
| AnnaBridge | 163:e59c8e839560 | 21 | * |
| AnnaBridge | 163:e59c8e839560 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 163:e59c8e839560 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 163:e59c8e839560 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 163:e59c8e839560 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 163:e59c8e839560 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 163:e59c8e839560 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 163:e59c8e839560 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 163:e59c8e839560 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 163:e59c8e839560 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 163:e59c8e839560 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 163:e59c8e839560 | 32 | * |
| AnnaBridge | 163:e59c8e839560 | 33 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 34 | */ |
| AnnaBridge | 163:e59c8e839560 | 35 | |
| AnnaBridge | 163:e59c8e839560 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 37 | #ifndef __STM32F3xx_LL_PWR_H |
| AnnaBridge | 163:e59c8e839560 | 38 | #define __STM32F3xx_LL_PWR_H |
| AnnaBridge | 163:e59c8e839560 | 39 | |
| AnnaBridge | 163:e59c8e839560 | 40 | #ifdef __cplusplus |
| AnnaBridge | 163:e59c8e839560 | 41 | extern "C" { |
| AnnaBridge | 163:e59c8e839560 | 42 | #endif |
| AnnaBridge | 163:e59c8e839560 | 43 | |
| AnnaBridge | 163:e59c8e839560 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 45 | #include "stm32f3xx.h" |
| AnnaBridge | 163:e59c8e839560 | 46 | |
| AnnaBridge | 163:e59c8e839560 | 47 | /** @addtogroup STM32F3xx_LL_Driver |
| AnnaBridge | 163:e59c8e839560 | 48 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 49 | */ |
| AnnaBridge | 163:e59c8e839560 | 50 | |
| AnnaBridge | 163:e59c8e839560 | 51 | #if defined(PWR) |
| AnnaBridge | 163:e59c8e839560 | 52 | |
| AnnaBridge | 163:e59c8e839560 | 53 | /** @defgroup PWR_LL PWR |
| AnnaBridge | 163:e59c8e839560 | 54 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 55 | */ |
| AnnaBridge | 163:e59c8e839560 | 56 | |
| AnnaBridge | 163:e59c8e839560 | 57 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 58 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 59 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 60 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 61 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 62 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 63 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
| AnnaBridge | 163:e59c8e839560 | 64 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 65 | */ |
| AnnaBridge | 163:e59c8e839560 | 66 | |
| AnnaBridge | 163:e59c8e839560 | 67 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
| AnnaBridge | 163:e59c8e839560 | 68 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
| AnnaBridge | 163:e59c8e839560 | 69 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 70 | */ |
| AnnaBridge | 163:e59c8e839560 | 71 | #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
| AnnaBridge | 163:e59c8e839560 | 72 | #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
| AnnaBridge | 163:e59c8e839560 | 73 | /** |
| AnnaBridge | 163:e59c8e839560 | 74 | * @} |
| AnnaBridge | 163:e59c8e839560 | 75 | */ |
| AnnaBridge | 163:e59c8e839560 | 76 | |
| AnnaBridge | 163:e59c8e839560 | 77 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
| AnnaBridge | 163:e59c8e839560 | 78 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
| AnnaBridge | 163:e59c8e839560 | 79 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 80 | */ |
| AnnaBridge | 163:e59c8e839560 | 81 | #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
| AnnaBridge | 163:e59c8e839560 | 82 | #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
| AnnaBridge | 163:e59c8e839560 | 83 | #if defined(PWR_PVD_SUPPORT) |
| AnnaBridge | 163:e59c8e839560 | 84 | #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
| AnnaBridge | 163:e59c8e839560 | 85 | #endif /* PWR_PVD_SUPPORT */ |
| AnnaBridge | 163:e59c8e839560 | 86 | #if defined(PWR_CSR_VREFINTRDYF) |
| AnnaBridge | 163:e59c8e839560 | 87 | #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */ |
| AnnaBridge | 163:e59c8e839560 | 88 | #endif /* PWR_CSR_VREFINTRDYF */ |
| AnnaBridge | 163:e59c8e839560 | 89 | #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */ |
| AnnaBridge | 163:e59c8e839560 | 90 | #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */ |
| AnnaBridge | 163:e59c8e839560 | 91 | #if defined(PWR_CSR_EWUP3) |
| AnnaBridge | 163:e59c8e839560 | 92 | #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */ |
| AnnaBridge | 163:e59c8e839560 | 93 | #endif /* PWR_CSR_EWUP3 */ |
| AnnaBridge | 163:e59c8e839560 | 94 | /** |
| AnnaBridge | 163:e59c8e839560 | 95 | * @} |
| AnnaBridge | 163:e59c8e839560 | 96 | */ |
| AnnaBridge | 163:e59c8e839560 | 97 | |
| AnnaBridge | 163:e59c8e839560 | 98 | |
| AnnaBridge | 163:e59c8e839560 | 99 | /** @defgroup PWR_LL_EC_MODE_PWR Mode Power |
| AnnaBridge | 163:e59c8e839560 | 100 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 101 | */ |
| AnnaBridge | 163:e59c8e839560 | 102 | #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ |
| AnnaBridge | 168:b9e159c1930a | 103 | #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */ |
| AnnaBridge | 163:e59c8e839560 | 104 | #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
| AnnaBridge | 163:e59c8e839560 | 105 | /** |
| AnnaBridge | 163:e59c8e839560 | 106 | * @} |
| AnnaBridge | 163:e59c8e839560 | 107 | */ |
| AnnaBridge | 163:e59c8e839560 | 108 | |
| AnnaBridge | 163:e59c8e839560 | 109 | #if defined(PWR_CR_LPDS) |
| AnnaBridge | 163:e59c8e839560 | 110 | /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode |
| AnnaBridge | 163:e59c8e839560 | 111 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 112 | */ |
| AnnaBridge | 168:b9e159c1930a | 113 | #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */ |
| AnnaBridge | 168:b9e159c1930a | 114 | #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */ |
| AnnaBridge | 163:e59c8e839560 | 115 | /** |
| AnnaBridge | 163:e59c8e839560 | 116 | * @} |
| AnnaBridge | 163:e59c8e839560 | 117 | */ |
| AnnaBridge | 163:e59c8e839560 | 118 | #endif /* PWR_CR_LPDS */ |
| AnnaBridge | 163:e59c8e839560 | 119 | |
| AnnaBridge | 163:e59c8e839560 | 120 | #if defined(PWR_PVD_SUPPORT) |
| AnnaBridge | 163:e59c8e839560 | 121 | /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level |
| AnnaBridge | 163:e59c8e839560 | 122 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 123 | */ |
| AnnaBridge | 163:e59c8e839560 | 124 | #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */ |
| AnnaBridge | 163:e59c8e839560 | 125 | #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */ |
| AnnaBridge | 163:e59c8e839560 | 126 | #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */ |
| AnnaBridge | 163:e59c8e839560 | 127 | #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
| AnnaBridge | 163:e59c8e839560 | 128 | #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */ |
| AnnaBridge | 163:e59c8e839560 | 129 | #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */ |
| AnnaBridge | 163:e59c8e839560 | 130 | #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */ |
| AnnaBridge | 163:e59c8e839560 | 131 | #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */ |
| AnnaBridge | 163:e59c8e839560 | 132 | /** |
| AnnaBridge | 163:e59c8e839560 | 133 | * @} |
| AnnaBridge | 163:e59c8e839560 | 134 | */ |
| AnnaBridge | 163:e59c8e839560 | 135 | #endif /* PWR_PVD_SUPPORT */ |
| AnnaBridge | 163:e59c8e839560 | 136 | /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins |
| AnnaBridge | 163:e59c8e839560 | 137 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 138 | */ |
| AnnaBridge | 163:e59c8e839560 | 139 | #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */ |
| AnnaBridge | 163:e59c8e839560 | 140 | #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */ |
| AnnaBridge | 163:e59c8e839560 | 141 | #if defined(PWR_CSR_EWUP3) |
| AnnaBridge | 163:e59c8e839560 | 142 | #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */ |
| AnnaBridge | 163:e59c8e839560 | 143 | #endif /* PWR_CSR_EWUP3 */ |
| AnnaBridge | 163:e59c8e839560 | 144 | /** |
| AnnaBridge | 163:e59c8e839560 | 145 | * @} |
| AnnaBridge | 163:e59c8e839560 | 146 | */ |
| AnnaBridge | 163:e59c8e839560 | 147 | |
| AnnaBridge | 163:e59c8e839560 | 148 | /** @defgroup PWR_LL_EC_SDADC_ANALOG_X SDADC Analogx |
| AnnaBridge | 163:e59c8e839560 | 149 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 150 | */ |
| AnnaBridge | 163:e59c8e839560 | 151 | #if defined(SDADC1) |
| AnnaBridge | 163:e59c8e839560 | 152 | #define LL_PWR_SDADC_ANALOG1 (PWR_CR_ENSD1) /*!< Enable SDADC1 */ |
| AnnaBridge | 163:e59c8e839560 | 153 | #endif /* SDADC1 */ |
| AnnaBridge | 163:e59c8e839560 | 154 | #if defined(SDADC2) |
| AnnaBridge | 163:e59c8e839560 | 155 | #define LL_PWR_SDADC_ANALOG2 (PWR_CR_ENSD2) /*!< Enable SDADC2 */ |
| AnnaBridge | 163:e59c8e839560 | 156 | #endif /* SDADC2 */ |
| AnnaBridge | 163:e59c8e839560 | 157 | #if defined(SDADC3) |
| AnnaBridge | 163:e59c8e839560 | 158 | #define LL_PWR_SDADC_ANALOG3 (PWR_CR_ENSD3) /*!< Enable SDADC3 */ |
| AnnaBridge | 163:e59c8e839560 | 159 | #endif /* SDADC3 */ |
| AnnaBridge | 163:e59c8e839560 | 160 | /** |
| AnnaBridge | 163:e59c8e839560 | 161 | * @} |
| AnnaBridge | 163:e59c8e839560 | 162 | */ |
| AnnaBridge | 163:e59c8e839560 | 163 | /** |
| AnnaBridge | 163:e59c8e839560 | 164 | * @} |
| AnnaBridge | 163:e59c8e839560 | 165 | */ |
| AnnaBridge | 163:e59c8e839560 | 166 | |
| AnnaBridge | 163:e59c8e839560 | 167 | |
| AnnaBridge | 163:e59c8e839560 | 168 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 169 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
| AnnaBridge | 163:e59c8e839560 | 170 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 171 | */ |
| AnnaBridge | 163:e59c8e839560 | 172 | |
| AnnaBridge | 163:e59c8e839560 | 173 | /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros |
| AnnaBridge | 163:e59c8e839560 | 174 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 175 | */ |
| AnnaBridge | 163:e59c8e839560 | 176 | |
| AnnaBridge | 163:e59c8e839560 | 177 | /** |
| AnnaBridge | 163:e59c8e839560 | 178 | * @brief Write a value in PWR register |
| AnnaBridge | 163:e59c8e839560 | 179 | * @param __REG__ Register to be written |
| AnnaBridge | 163:e59c8e839560 | 180 | * @param __VALUE__ Value to be written in the register |
| AnnaBridge | 163:e59c8e839560 | 181 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 182 | */ |
| AnnaBridge | 163:e59c8e839560 | 183 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
| AnnaBridge | 163:e59c8e839560 | 184 | |
| AnnaBridge | 163:e59c8e839560 | 185 | /** |
| AnnaBridge | 163:e59c8e839560 | 186 | * @brief Read a value in PWR register |
| AnnaBridge | 163:e59c8e839560 | 187 | * @param __REG__ Register to be read |
| AnnaBridge | 163:e59c8e839560 | 188 | * @retval Register value |
| AnnaBridge | 163:e59c8e839560 | 189 | */ |
| AnnaBridge | 163:e59c8e839560 | 190 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
| AnnaBridge | 163:e59c8e839560 | 191 | /** |
| AnnaBridge | 163:e59c8e839560 | 192 | * @} |
| AnnaBridge | 163:e59c8e839560 | 193 | */ |
| AnnaBridge | 163:e59c8e839560 | 194 | |
| AnnaBridge | 163:e59c8e839560 | 195 | /** |
| AnnaBridge | 163:e59c8e839560 | 196 | * @} |
| AnnaBridge | 163:e59c8e839560 | 197 | */ |
| AnnaBridge | 163:e59c8e839560 | 198 | |
| AnnaBridge | 163:e59c8e839560 | 199 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 200 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
| AnnaBridge | 163:e59c8e839560 | 201 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 202 | */ |
| AnnaBridge | 163:e59c8e839560 | 203 | |
| AnnaBridge | 163:e59c8e839560 | 204 | /** @defgroup PWR_LL_EF_Configuration Configuration |
| AnnaBridge | 163:e59c8e839560 | 205 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 206 | */ |
| AnnaBridge | 163:e59c8e839560 | 207 | /** |
| AnnaBridge | 163:e59c8e839560 | 208 | * @brief Enables the SDADC peripheral functionality |
| AnnaBridge | 163:e59c8e839560 | 209 | * @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 210 | * CR ENSD2 LL_PWR_EnableSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 211 | * CR ENSD3 LL_PWR_EnableSDADC |
| AnnaBridge | 163:e59c8e839560 | 212 | * @param Analogx This parameter can be a combination of the following values: |
| AnnaBridge | 163:e59c8e839560 | 213 | * @arg @ref LL_PWR_SDADC_ANALOG1 |
| AnnaBridge | 163:e59c8e839560 | 214 | * @arg @ref LL_PWR_SDADC_ANALOG2 |
| AnnaBridge | 163:e59c8e839560 | 215 | * @arg @ref LL_PWR_SDADC_ANALOG3 |
| AnnaBridge | 163:e59c8e839560 | 216 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 217 | */ |
| AnnaBridge | 163:e59c8e839560 | 218 | __STATIC_INLINE void LL_PWR_EnableSDADC(uint32_t Analogx) |
| AnnaBridge | 163:e59c8e839560 | 219 | { |
| AnnaBridge | 163:e59c8e839560 | 220 | SET_BIT(PWR->CR, Analogx); |
| AnnaBridge | 163:e59c8e839560 | 221 | } |
| AnnaBridge | 163:e59c8e839560 | 222 | |
| AnnaBridge | 163:e59c8e839560 | 223 | /** |
| AnnaBridge | 163:e59c8e839560 | 224 | * @brief Disables the SDADC peripheral functionality |
| AnnaBridge | 163:e59c8e839560 | 225 | * @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 226 | * CR ENSD2 LL_PWR_EnableSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 227 | * CR ENSD3 LL_PWR_EnableSDADC |
| AnnaBridge | 163:e59c8e839560 | 228 | * @param Analogx This parameter can be a combination of the following values: |
| AnnaBridge | 163:e59c8e839560 | 229 | * @arg @ref LL_PWR_SDADC_ANALOG1 |
| AnnaBridge | 163:e59c8e839560 | 230 | * @arg @ref LL_PWR_SDADC_ANALOG2 |
| AnnaBridge | 163:e59c8e839560 | 231 | * @arg @ref LL_PWR_SDADC_ANALOG3 |
| AnnaBridge | 163:e59c8e839560 | 232 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 233 | */ |
| AnnaBridge | 163:e59c8e839560 | 234 | __STATIC_INLINE void LL_PWR_DisableSDADC(uint32_t Analogx) |
| AnnaBridge | 163:e59c8e839560 | 235 | { |
| AnnaBridge | 163:e59c8e839560 | 236 | CLEAR_BIT(PWR->CR, Analogx); |
| AnnaBridge | 163:e59c8e839560 | 237 | } |
| AnnaBridge | 163:e59c8e839560 | 238 | |
| AnnaBridge | 163:e59c8e839560 | 239 | /** |
| AnnaBridge | 163:e59c8e839560 | 240 | * @brief Check if SDADCx has been enabled or not |
| AnnaBridge | 163:e59c8e839560 | 241 | * @rmtoll CR ENSD1 LL_PWR_IsEnabledSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 242 | * CR ENSD2 LL_PWR_IsEnabledSDADC\n |
| AnnaBridge | 163:e59c8e839560 | 243 | * CR ENSD3 LL_PWR_IsEnabledSDADC |
| AnnaBridge | 163:e59c8e839560 | 244 | * @param Analogx This parameter can be a combination of the following values: |
| AnnaBridge | 163:e59c8e839560 | 245 | * @arg @ref LL_PWR_SDADC_ANALOG1 |
| AnnaBridge | 163:e59c8e839560 | 246 | * @arg @ref LL_PWR_SDADC_ANALOG2 |
| AnnaBridge | 163:e59c8e839560 | 247 | * @arg @ref LL_PWR_SDADC_ANALOG3 |
| AnnaBridge | 163:e59c8e839560 | 248 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 249 | */ |
| AnnaBridge | 163:e59c8e839560 | 250 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledSDADC(uint32_t Analogx) |
| AnnaBridge | 163:e59c8e839560 | 251 | { |
| AnnaBridge | 163:e59c8e839560 | 252 | return (READ_BIT(PWR->CR, Analogx) == (Analogx)); |
| AnnaBridge | 163:e59c8e839560 | 253 | } |
| AnnaBridge | 163:e59c8e839560 | 254 | |
| AnnaBridge | 163:e59c8e839560 | 255 | /** |
| AnnaBridge | 163:e59c8e839560 | 256 | * @brief Enable access to the backup domain |
| AnnaBridge | 163:e59c8e839560 | 257 | * @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
| AnnaBridge | 163:e59c8e839560 | 258 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 259 | */ |
| AnnaBridge | 163:e59c8e839560 | 260 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
| AnnaBridge | 163:e59c8e839560 | 261 | { |
| AnnaBridge | 163:e59c8e839560 | 262 | SET_BIT(PWR->CR, PWR_CR_DBP); |
| AnnaBridge | 163:e59c8e839560 | 263 | } |
| AnnaBridge | 163:e59c8e839560 | 264 | |
| AnnaBridge | 163:e59c8e839560 | 265 | /** |
| AnnaBridge | 163:e59c8e839560 | 266 | * @brief Disable access to the backup domain |
| AnnaBridge | 163:e59c8e839560 | 267 | * @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
| AnnaBridge | 163:e59c8e839560 | 268 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 269 | */ |
| AnnaBridge | 163:e59c8e839560 | 270 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
| AnnaBridge | 163:e59c8e839560 | 271 | { |
| AnnaBridge | 163:e59c8e839560 | 272 | CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
| AnnaBridge | 163:e59c8e839560 | 273 | } |
| AnnaBridge | 163:e59c8e839560 | 274 | |
| AnnaBridge | 163:e59c8e839560 | 275 | /** |
| AnnaBridge | 163:e59c8e839560 | 276 | * @brief Check if the backup domain is enabled |
| AnnaBridge | 163:e59c8e839560 | 277 | * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
| AnnaBridge | 163:e59c8e839560 | 278 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 279 | */ |
| AnnaBridge | 163:e59c8e839560 | 280 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
| AnnaBridge | 163:e59c8e839560 | 281 | { |
| AnnaBridge | 163:e59c8e839560 | 282 | return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); |
| AnnaBridge | 163:e59c8e839560 | 283 | } |
| AnnaBridge | 163:e59c8e839560 | 284 | |
| AnnaBridge | 163:e59c8e839560 | 285 | #if defined(PWR_CR_LPDS) |
| AnnaBridge | 163:e59c8e839560 | 286 | /** |
| AnnaBridge | 168:b9e159c1930a | 287 | * @brief Set voltage Regulator mode during deep sleep mode |
| AnnaBridge | 163:e59c8e839560 | 288 | * @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
| AnnaBridge | 163:e59c8e839560 | 289 | * @param RegulMode This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 290 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
| AnnaBridge | 163:e59c8e839560 | 291 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
| AnnaBridge | 163:e59c8e839560 | 292 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 293 | */ |
| AnnaBridge | 163:e59c8e839560 | 294 | __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
| AnnaBridge | 163:e59c8e839560 | 295 | { |
| AnnaBridge | 163:e59c8e839560 | 296 | MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
| AnnaBridge | 163:e59c8e839560 | 297 | } |
| AnnaBridge | 163:e59c8e839560 | 298 | |
| AnnaBridge | 163:e59c8e839560 | 299 | /** |
| AnnaBridge | 168:b9e159c1930a | 300 | * @brief Get voltage Regulator mode during deep sleep mode |
| AnnaBridge | 163:e59c8e839560 | 301 | * @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
| AnnaBridge | 163:e59c8e839560 | 302 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 303 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
| AnnaBridge | 163:e59c8e839560 | 304 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
| AnnaBridge | 163:e59c8e839560 | 305 | */ |
| AnnaBridge | 163:e59c8e839560 | 306 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
| AnnaBridge | 163:e59c8e839560 | 307 | { |
| AnnaBridge | 163:e59c8e839560 | 308 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
| AnnaBridge | 163:e59c8e839560 | 309 | } |
| AnnaBridge | 163:e59c8e839560 | 310 | #endif /* PWR_CR_LPDS */ |
| AnnaBridge | 163:e59c8e839560 | 311 | |
| AnnaBridge | 163:e59c8e839560 | 312 | /** |
| AnnaBridge | 168:b9e159c1930a | 313 | * @brief Set Power Down mode when CPU enters deepsleep |
| AnnaBridge | 163:e59c8e839560 | 314 | * @rmtoll CR PDDS LL_PWR_SetPowerMode\n |
| AnnaBridge | 163:e59c8e839560 | 315 | * @rmtoll CR LPDS LL_PWR_SetPowerMode |
| AnnaBridge | 163:e59c8e839560 | 316 | * @param PDMode This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 317 | * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
| AnnaBridge | 163:e59c8e839560 | 318 | * @arg @ref LL_PWR_MODE_STOP_LPREGU |
| AnnaBridge | 163:e59c8e839560 | 319 | * @arg @ref LL_PWR_MODE_STANDBY |
| AnnaBridge | 163:e59c8e839560 | 320 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 321 | */ |
| AnnaBridge | 163:e59c8e839560 | 322 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
| AnnaBridge | 163:e59c8e839560 | 323 | { |
| AnnaBridge | 163:e59c8e839560 | 324 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode); |
| AnnaBridge | 163:e59c8e839560 | 325 | } |
| AnnaBridge | 163:e59c8e839560 | 326 | |
| AnnaBridge | 163:e59c8e839560 | 327 | /** |
| AnnaBridge | 168:b9e159c1930a | 328 | * @brief Get Power Down mode when CPU enters deepsleep |
| AnnaBridge | 163:e59c8e839560 | 329 | * @rmtoll CR PDDS LL_PWR_GetPowerMode\n |
| AnnaBridge | 163:e59c8e839560 | 330 | * @rmtoll CR LPDS LL_PWR_GetPowerMode |
| AnnaBridge | 163:e59c8e839560 | 331 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 332 | * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
| AnnaBridge | 163:e59c8e839560 | 333 | * @arg @ref LL_PWR_MODE_STOP_LPREGU |
| AnnaBridge | 163:e59c8e839560 | 334 | * @arg @ref LL_PWR_MODE_STANDBY |
| AnnaBridge | 163:e59c8e839560 | 335 | */ |
| AnnaBridge | 163:e59c8e839560 | 336 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
| AnnaBridge | 163:e59c8e839560 | 337 | { |
| AnnaBridge | 163:e59c8e839560 | 338 | return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS))); |
| AnnaBridge | 163:e59c8e839560 | 339 | } |
| AnnaBridge | 163:e59c8e839560 | 340 | |
| AnnaBridge | 163:e59c8e839560 | 341 | #if defined(PWR_PVD_SUPPORT) |
| AnnaBridge | 163:e59c8e839560 | 342 | /** |
| AnnaBridge | 163:e59c8e839560 | 343 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
| AnnaBridge | 163:e59c8e839560 | 344 | * @rmtoll CR PLS LL_PWR_SetPVDLevel |
| AnnaBridge | 163:e59c8e839560 | 345 | * @param PVDLevel This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 346 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| AnnaBridge | 163:e59c8e839560 | 347 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| AnnaBridge | 163:e59c8e839560 | 348 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| AnnaBridge | 163:e59c8e839560 | 349 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| AnnaBridge | 163:e59c8e839560 | 350 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| AnnaBridge | 163:e59c8e839560 | 351 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| AnnaBridge | 163:e59c8e839560 | 352 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| AnnaBridge | 163:e59c8e839560 | 353 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| AnnaBridge | 163:e59c8e839560 | 354 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 355 | */ |
| AnnaBridge | 163:e59c8e839560 | 356 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
| AnnaBridge | 163:e59c8e839560 | 357 | { |
| AnnaBridge | 163:e59c8e839560 | 358 | MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
| AnnaBridge | 163:e59c8e839560 | 359 | } |
| AnnaBridge | 163:e59c8e839560 | 360 | |
| AnnaBridge | 163:e59c8e839560 | 361 | /** |
| AnnaBridge | 163:e59c8e839560 | 362 | * @brief Get the voltage threshold detection |
| AnnaBridge | 163:e59c8e839560 | 363 | * @rmtoll CR PLS LL_PWR_GetPVDLevel |
| AnnaBridge | 163:e59c8e839560 | 364 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 365 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| AnnaBridge | 163:e59c8e839560 | 366 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| AnnaBridge | 163:e59c8e839560 | 367 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| AnnaBridge | 163:e59c8e839560 | 368 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| AnnaBridge | 163:e59c8e839560 | 369 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| AnnaBridge | 163:e59c8e839560 | 370 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| AnnaBridge | 163:e59c8e839560 | 371 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| AnnaBridge | 163:e59c8e839560 | 372 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| AnnaBridge | 163:e59c8e839560 | 373 | */ |
| AnnaBridge | 163:e59c8e839560 | 374 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
| AnnaBridge | 163:e59c8e839560 | 375 | { |
| AnnaBridge | 163:e59c8e839560 | 376 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
| AnnaBridge | 163:e59c8e839560 | 377 | } |
| AnnaBridge | 163:e59c8e839560 | 378 | |
| AnnaBridge | 163:e59c8e839560 | 379 | /** |
| AnnaBridge | 163:e59c8e839560 | 380 | * @brief Enable Power Voltage Detector |
| AnnaBridge | 163:e59c8e839560 | 381 | * @rmtoll CR PVDE LL_PWR_EnablePVD |
| AnnaBridge | 163:e59c8e839560 | 382 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 383 | */ |
| AnnaBridge | 163:e59c8e839560 | 384 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
| AnnaBridge | 163:e59c8e839560 | 385 | { |
| AnnaBridge | 163:e59c8e839560 | 386 | SET_BIT(PWR->CR, PWR_CR_PVDE); |
| AnnaBridge | 163:e59c8e839560 | 387 | } |
| AnnaBridge | 163:e59c8e839560 | 388 | |
| AnnaBridge | 163:e59c8e839560 | 389 | /** |
| AnnaBridge | 163:e59c8e839560 | 390 | * @brief Disable Power Voltage Detector |
| AnnaBridge | 163:e59c8e839560 | 391 | * @rmtoll CR PVDE LL_PWR_DisablePVD |
| AnnaBridge | 163:e59c8e839560 | 392 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 393 | */ |
| AnnaBridge | 163:e59c8e839560 | 394 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
| AnnaBridge | 163:e59c8e839560 | 395 | { |
| AnnaBridge | 163:e59c8e839560 | 396 | CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
| AnnaBridge | 163:e59c8e839560 | 397 | } |
| AnnaBridge | 163:e59c8e839560 | 398 | |
| AnnaBridge | 163:e59c8e839560 | 399 | /** |
| AnnaBridge | 163:e59c8e839560 | 400 | * @brief Check if Power Voltage Detector is enabled |
| AnnaBridge | 163:e59c8e839560 | 401 | * @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
| AnnaBridge | 163:e59c8e839560 | 402 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 403 | */ |
| AnnaBridge | 163:e59c8e839560 | 404 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
| AnnaBridge | 163:e59c8e839560 | 405 | { |
| AnnaBridge | 163:e59c8e839560 | 406 | return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); |
| AnnaBridge | 163:e59c8e839560 | 407 | } |
| AnnaBridge | 163:e59c8e839560 | 408 | #endif /* PWR_PVD_SUPPORT */ |
| AnnaBridge | 163:e59c8e839560 | 409 | |
| AnnaBridge | 163:e59c8e839560 | 410 | /** |
| AnnaBridge | 163:e59c8e839560 | 411 | * @brief Enable the WakeUp PINx functionality |
| AnnaBridge | 163:e59c8e839560 | 412 | * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 413 | * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 414 | * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin |
| AnnaBridge | 163:e59c8e839560 | 415 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 416 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 163:e59c8e839560 | 417 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 163:e59c8e839560 | 418 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| AnnaBridge | 163:e59c8e839560 | 419 | * |
| AnnaBridge | 163:e59c8e839560 | 420 | * (*) not available on all devices |
| AnnaBridge | 163:e59c8e839560 | 421 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 422 | */ |
| AnnaBridge | 163:e59c8e839560 | 423 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 163:e59c8e839560 | 424 | { |
| AnnaBridge | 163:e59c8e839560 | 425 | SET_BIT(PWR->CSR, WakeUpPin); |
| AnnaBridge | 163:e59c8e839560 | 426 | } |
| AnnaBridge | 163:e59c8e839560 | 427 | |
| AnnaBridge | 163:e59c8e839560 | 428 | /** |
| AnnaBridge | 163:e59c8e839560 | 429 | * @brief Disable the WakeUp PINx functionality |
| AnnaBridge | 163:e59c8e839560 | 430 | * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 431 | * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 432 | * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin |
| AnnaBridge | 163:e59c8e839560 | 433 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 434 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 163:e59c8e839560 | 435 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 163:e59c8e839560 | 436 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| AnnaBridge | 163:e59c8e839560 | 437 | * |
| AnnaBridge | 163:e59c8e839560 | 438 | * (*) not available on all devices |
| AnnaBridge | 163:e59c8e839560 | 439 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 440 | */ |
| AnnaBridge | 163:e59c8e839560 | 441 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 163:e59c8e839560 | 442 | { |
| AnnaBridge | 163:e59c8e839560 | 443 | CLEAR_BIT(PWR->CSR, WakeUpPin); |
| AnnaBridge | 163:e59c8e839560 | 444 | } |
| AnnaBridge | 163:e59c8e839560 | 445 | |
| AnnaBridge | 163:e59c8e839560 | 446 | /** |
| AnnaBridge | 163:e59c8e839560 | 447 | * @brief Check if the WakeUp PINx functionality is enabled |
| AnnaBridge | 163:e59c8e839560 | 448 | * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 449 | * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 163:e59c8e839560 | 450 | * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin |
| AnnaBridge | 163:e59c8e839560 | 451 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 452 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 163:e59c8e839560 | 453 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 163:e59c8e839560 | 454 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| AnnaBridge | 163:e59c8e839560 | 455 | * |
| AnnaBridge | 163:e59c8e839560 | 456 | * (*) not available on all devices |
| AnnaBridge | 163:e59c8e839560 | 457 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 458 | */ |
| AnnaBridge | 163:e59c8e839560 | 459 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 163:e59c8e839560 | 460 | { |
| AnnaBridge | 163:e59c8e839560 | 461 | return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); |
| AnnaBridge | 163:e59c8e839560 | 462 | } |
| AnnaBridge | 163:e59c8e839560 | 463 | |
| AnnaBridge | 163:e59c8e839560 | 464 | |
| AnnaBridge | 163:e59c8e839560 | 465 | /** |
| AnnaBridge | 163:e59c8e839560 | 466 | * @} |
| AnnaBridge | 163:e59c8e839560 | 467 | */ |
| AnnaBridge | 163:e59c8e839560 | 468 | |
| AnnaBridge | 163:e59c8e839560 | 469 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
| AnnaBridge | 163:e59c8e839560 | 470 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 471 | */ |
| AnnaBridge | 163:e59c8e839560 | 472 | |
| AnnaBridge | 163:e59c8e839560 | 473 | /** |
| AnnaBridge | 163:e59c8e839560 | 474 | * @brief Get Wake-up Flag |
| AnnaBridge | 163:e59c8e839560 | 475 | * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
| AnnaBridge | 163:e59c8e839560 | 476 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 477 | */ |
| AnnaBridge | 163:e59c8e839560 | 478 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
| AnnaBridge | 163:e59c8e839560 | 479 | { |
| AnnaBridge | 163:e59c8e839560 | 480 | return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); |
| AnnaBridge | 163:e59c8e839560 | 481 | } |
| AnnaBridge | 163:e59c8e839560 | 482 | |
| AnnaBridge | 163:e59c8e839560 | 483 | /** |
| AnnaBridge | 163:e59c8e839560 | 484 | * @brief Get Standby Flag |
| AnnaBridge | 163:e59c8e839560 | 485 | * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
| AnnaBridge | 163:e59c8e839560 | 486 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 487 | */ |
| AnnaBridge | 163:e59c8e839560 | 488 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
| AnnaBridge | 163:e59c8e839560 | 489 | { |
| AnnaBridge | 163:e59c8e839560 | 490 | return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); |
| AnnaBridge | 163:e59c8e839560 | 491 | } |
| AnnaBridge | 163:e59c8e839560 | 492 | |
| AnnaBridge | 163:e59c8e839560 | 493 | #if defined(PWR_PVD_SUPPORT) |
| AnnaBridge | 163:e59c8e839560 | 494 | /** |
| AnnaBridge | 163:e59c8e839560 | 495 | * @brief Indicate whether VDD voltage is below the selected PVD threshold |
| AnnaBridge | 163:e59c8e839560 | 496 | * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
| AnnaBridge | 163:e59c8e839560 | 497 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 498 | */ |
| AnnaBridge | 163:e59c8e839560 | 499 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
| AnnaBridge | 163:e59c8e839560 | 500 | { |
| AnnaBridge | 163:e59c8e839560 | 501 | return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); |
| AnnaBridge | 163:e59c8e839560 | 502 | } |
| AnnaBridge | 163:e59c8e839560 | 503 | #endif /* PWR_PVD_SUPPORT */ |
| AnnaBridge | 163:e59c8e839560 | 504 | |
| AnnaBridge | 163:e59c8e839560 | 505 | #if defined(PWR_CSR_VREFINTRDYF) |
| AnnaBridge | 163:e59c8e839560 | 506 | /** |
| AnnaBridge | 163:e59c8e839560 | 507 | * @brief Get Internal Reference VrefInt Flag |
| AnnaBridge | 163:e59c8e839560 | 508 | * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY |
| AnnaBridge | 163:e59c8e839560 | 509 | * @retval State of bit (1 or 0). |
| AnnaBridge | 163:e59c8e839560 | 510 | */ |
| AnnaBridge | 163:e59c8e839560 | 511 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void) |
| AnnaBridge | 163:e59c8e839560 | 512 | { |
| AnnaBridge | 163:e59c8e839560 | 513 | return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); |
| AnnaBridge | 163:e59c8e839560 | 514 | } |
| AnnaBridge | 163:e59c8e839560 | 515 | #endif /* PWR_CSR_VREFINTRDYF */ |
| AnnaBridge | 163:e59c8e839560 | 516 | /** |
| AnnaBridge | 163:e59c8e839560 | 517 | * @brief Clear Standby Flag |
| AnnaBridge | 163:e59c8e839560 | 518 | * @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
| AnnaBridge | 163:e59c8e839560 | 519 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 520 | */ |
| AnnaBridge | 163:e59c8e839560 | 521 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
| AnnaBridge | 163:e59c8e839560 | 522 | { |
| AnnaBridge | 163:e59c8e839560 | 523 | SET_BIT(PWR->CR, PWR_CR_CSBF); |
| AnnaBridge | 163:e59c8e839560 | 524 | } |
| AnnaBridge | 163:e59c8e839560 | 525 | |
| AnnaBridge | 163:e59c8e839560 | 526 | /** |
| AnnaBridge | 163:e59c8e839560 | 527 | * @brief Clear Wake-up Flags |
| AnnaBridge | 163:e59c8e839560 | 528 | * @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
| AnnaBridge | 163:e59c8e839560 | 529 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 530 | */ |
| AnnaBridge | 163:e59c8e839560 | 531 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
| AnnaBridge | 163:e59c8e839560 | 532 | { |
| AnnaBridge | 163:e59c8e839560 | 533 | SET_BIT(PWR->CR, PWR_CR_CWUF); |
| AnnaBridge | 163:e59c8e839560 | 534 | } |
| AnnaBridge | 168:b9e159c1930a | 535 | |
| AnnaBridge | 168:b9e159c1930a | 536 | /** |
| AnnaBridge | 168:b9e159c1930a | 537 | * @} |
| AnnaBridge | 168:b9e159c1930a | 538 | */ |
| AnnaBridge | 168:b9e159c1930a | 539 | |
| AnnaBridge | 163:e59c8e839560 | 540 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 163:e59c8e839560 | 541 | /** @defgroup PWR_LL_EF_Init De-initialization function |
| AnnaBridge | 163:e59c8e839560 | 542 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 543 | */ |
| AnnaBridge | 163:e59c8e839560 | 544 | ErrorStatus LL_PWR_DeInit(void); |
| AnnaBridge | 163:e59c8e839560 | 545 | /** |
| AnnaBridge | 163:e59c8e839560 | 546 | * @} |
| AnnaBridge | 163:e59c8e839560 | 547 | */ |
| AnnaBridge | 163:e59c8e839560 | 548 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 163:e59c8e839560 | 549 | |
| AnnaBridge | 163:e59c8e839560 | 550 | /** |
| AnnaBridge | 163:e59c8e839560 | 551 | * @} |
| AnnaBridge | 163:e59c8e839560 | 552 | */ |
| AnnaBridge | 163:e59c8e839560 | 553 | |
| AnnaBridge | 163:e59c8e839560 | 554 | /** |
| AnnaBridge | 163:e59c8e839560 | 555 | * @} |
| AnnaBridge | 163:e59c8e839560 | 556 | */ |
| AnnaBridge | 163:e59c8e839560 | 557 | |
| AnnaBridge | 163:e59c8e839560 | 558 | #endif /* defined(PWR) */ |
| AnnaBridge | 163:e59c8e839560 | 559 | |
| AnnaBridge | 163:e59c8e839560 | 560 | /** |
| AnnaBridge | 163:e59c8e839560 | 561 | * @} |
| AnnaBridge | 163:e59c8e839560 | 562 | */ |
| AnnaBridge | 163:e59c8e839560 | 563 | |
| AnnaBridge | 163:e59c8e839560 | 564 | #ifdef __cplusplus |
| AnnaBridge | 163:e59c8e839560 | 565 | } |
| AnnaBridge | 163:e59c8e839560 | 566 | #endif |
| AnnaBridge | 163:e59c8e839560 | 567 | |
| AnnaBridge | 163:e59c8e839560 | 568 | #endif /* __STM32F3xx_LL_PWR_H */ |
| AnnaBridge | 163:e59c8e839560 | 569 | |
| AnnaBridge | 163:e59c8e839560 | 570 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
