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TARGET_NUCLEO_F303RE/TOOLCHAIN_ARM_MICRO/stm32f3xx_hal_dma_ex.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_dma_ex.h@168:b9e159c1930a 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 163:e59c8e839560 1 /**
AnnaBridge 163:e59c8e839560 2 ******************************************************************************
AnnaBridge 163:e59c8e839560 3 * @file stm32f3xx_hal_dma_ex.h
AnnaBridge 163:e59c8e839560 4 * @author MCD Application Team
AnnaBridge 163:e59c8e839560 5 * @brief Header file of DMA HAL extension module.
AnnaBridge 163:e59c8e839560 6 ******************************************************************************
AnnaBridge 163:e59c8e839560 7 * @attention
AnnaBridge 163:e59c8e839560 8 *
AnnaBridge 163:e59c8e839560 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 163:e59c8e839560 10 *
AnnaBridge 163:e59c8e839560 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 163:e59c8e839560 12 * are permitted provided that the following conditions are met:
AnnaBridge 163:e59c8e839560 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 163:e59c8e839560 14 * this list of conditions and the following disclaimer.
AnnaBridge 163:e59c8e839560 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 163:e59c8e839560 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 163:e59c8e839560 17 * and/or other materials provided with the distribution.
AnnaBridge 163:e59c8e839560 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 163:e59c8e839560 19 * may be used to endorse or promote products derived from this software
AnnaBridge 163:e59c8e839560 20 * without specific prior written permission.
AnnaBridge 163:e59c8e839560 21 *
AnnaBridge 163:e59c8e839560 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 163:e59c8e839560 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 163:e59c8e839560 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 163:e59c8e839560 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 163:e59c8e839560 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 163:e59c8e839560 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 163:e59c8e839560 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 163:e59c8e839560 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 163:e59c8e839560 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 163:e59c8e839560 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 163:e59c8e839560 32 *
AnnaBridge 163:e59c8e839560 33 ******************************************************************************
AnnaBridge 163:e59c8e839560 34 */
AnnaBridge 163:e59c8e839560 35
AnnaBridge 163:e59c8e839560 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 163:e59c8e839560 37 #ifndef __STM32F3xx_HAL_DMA_EX_H
AnnaBridge 163:e59c8e839560 38 #define __STM32F3xx_HAL_DMA_EX_H
AnnaBridge 163:e59c8e839560 39
AnnaBridge 163:e59c8e839560 40 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 41 extern "C" {
AnnaBridge 163:e59c8e839560 42 #endif
AnnaBridge 163:e59c8e839560 43
AnnaBridge 163:e59c8e839560 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 45 #include "stm32f3xx_hal_def.h"
AnnaBridge 163:e59c8e839560 46
AnnaBridge 163:e59c8e839560 47 /** @addtogroup STM32F3xx_HAL_Driver
AnnaBridge 163:e59c8e839560 48 * @{
AnnaBridge 163:e59c8e839560 49 */
AnnaBridge 163:e59c8e839560 50
AnnaBridge 163:e59c8e839560 51 /** @addtogroup DMAEx
AnnaBridge 163:e59c8e839560 52 * @{
AnnaBridge 163:e59c8e839560 53 */
AnnaBridge 163:e59c8e839560 54
AnnaBridge 163:e59c8e839560 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 56 /* Exported constants --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 57 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 58 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
AnnaBridge 163:e59c8e839560 59 * @{
AnnaBridge 163:e59c8e839560 60 */
AnnaBridge 163:e59c8e839560 61 /* Interrupt & Flag management */
AnnaBridge 163:e59c8e839560 62
AnnaBridge 163:e59c8e839560 63 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
AnnaBridge 163:e59c8e839560 64 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
AnnaBridge 163:e59c8e839560 65 defined(STM32F373xC) || defined(STM32F378xx)
AnnaBridge 163:e59c8e839560 66 /**
AnnaBridge 163:e59c8e839560 67 * @brief Returns the current DMA Channel transfer complete flag.
AnnaBridge 168:b9e159c1930a 68 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 69 * @retval The specified transfer complete flag index.
AnnaBridge 163:e59c8e839560 70 */
AnnaBridge 163:e59c8e839560 71 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
AnnaBridge 163:e59c8e839560 72 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
AnnaBridge 163:e59c8e839560 73 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
AnnaBridge 163:e59c8e839560 74 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
AnnaBridge 163:e59c8e839560 75 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
AnnaBridge 163:e59c8e839560 76 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
AnnaBridge 163:e59c8e839560 77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
AnnaBridge 163:e59c8e839560 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
AnnaBridge 163:e59c8e839560 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
AnnaBridge 163:e59c8e839560 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
AnnaBridge 163:e59c8e839560 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
AnnaBridge 163:e59c8e839560 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
AnnaBridge 163:e59c8e839560 83 DMA_FLAG_TC5)
AnnaBridge 163:e59c8e839560 84
AnnaBridge 163:e59c8e839560 85 /**
AnnaBridge 163:e59c8e839560 86 * @brief Returns the current DMA Channel half transfer complete flag.
AnnaBridge 168:b9e159c1930a 87 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 88 * @retval The specified half transfer complete flag index.
AnnaBridge 163:e59c8e839560 89 */
AnnaBridge 163:e59c8e839560 90 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 91 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
AnnaBridge 163:e59c8e839560 92 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
AnnaBridge 163:e59c8e839560 93 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
AnnaBridge 163:e59c8e839560 94 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
AnnaBridge 163:e59c8e839560 95 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
AnnaBridge 163:e59c8e839560 96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
AnnaBridge 163:e59c8e839560 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
AnnaBridge 163:e59c8e839560 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
AnnaBridge 163:e59c8e839560 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
AnnaBridge 163:e59c8e839560 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
AnnaBridge 163:e59c8e839560 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
AnnaBridge 163:e59c8e839560 102 DMA_FLAG_HT5)
AnnaBridge 163:e59c8e839560 103
AnnaBridge 163:e59c8e839560 104 /**
AnnaBridge 163:e59c8e839560 105 * @brief Returns the current DMA Channel transfer error flag.
AnnaBridge 168:b9e159c1930a 106 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 107 * @retval The specified transfer error flag index.
AnnaBridge 163:e59c8e839560 108 */
AnnaBridge 163:e59c8e839560 109 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 110 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
AnnaBridge 163:e59c8e839560 111 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
AnnaBridge 163:e59c8e839560 112 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
AnnaBridge 163:e59c8e839560 113 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
AnnaBridge 163:e59c8e839560 114 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
AnnaBridge 163:e59c8e839560 115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
AnnaBridge 163:e59c8e839560 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
AnnaBridge 163:e59c8e839560 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
AnnaBridge 163:e59c8e839560 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
AnnaBridge 163:e59c8e839560 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
AnnaBridge 163:e59c8e839560 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
AnnaBridge 163:e59c8e839560 121 DMA_FLAG_TE5)
AnnaBridge 163:e59c8e839560 122
AnnaBridge 163:e59c8e839560 123 /**
AnnaBridge 163:e59c8e839560 124 * @brief Return the current DMA Channel Global interrupt flag.
AnnaBridge 168:b9e159c1930a 125 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 126 * @retval The specified transfer error flag index.
AnnaBridge 163:e59c8e839560 127 */
AnnaBridge 163:e59c8e839560 128 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 129 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
AnnaBridge 163:e59c8e839560 130 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
AnnaBridge 163:e59c8e839560 131 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
AnnaBridge 163:e59c8e839560 132 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
AnnaBridge 163:e59c8e839560 133 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
AnnaBridge 163:e59c8e839560 134 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
AnnaBridge 163:e59c8e839560 135 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
AnnaBridge 163:e59c8e839560 136 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
AnnaBridge 163:e59c8e839560 137 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
AnnaBridge 163:e59c8e839560 138 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
AnnaBridge 163:e59c8e839560 139 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
AnnaBridge 163:e59c8e839560 140 DMA_FLAG_GL5)
AnnaBridge 163:e59c8e839560 141
AnnaBridge 163:e59c8e839560 142 /**
AnnaBridge 163:e59c8e839560 143 * @brief Get the DMA Channel pending flags.
AnnaBridge 168:b9e159c1930a 144 * @param __HANDLE__ DMA handle
AnnaBridge 168:b9e159c1930a 145 * @param __FLAG__ Get the specified flag.
AnnaBridge 163:e59c8e839560 146 * This parameter can be any combination of the following values:
AnnaBridge 163:e59c8e839560 147 * @arg DMA_FLAG_TCx: Transfer complete flag
AnnaBridge 163:e59c8e839560 148 * @arg DMA_FLAG_HTx: Half transfer complete flag
AnnaBridge 163:e59c8e839560 149 * @arg DMA_FLAG_TEx: Transfer error flag
AnnaBridge 163:e59c8e839560 150 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
AnnaBridge 163:e59c8e839560 151 * @retval The state of FLAG (SET or RESET).
AnnaBridge 163:e59c8e839560 152 */
AnnaBridge 163:e59c8e839560 153 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
AnnaBridge 163:e59c8e839560 154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
AnnaBridge 163:e59c8e839560 155 (DMA1->ISR & (__FLAG__)))
AnnaBridge 163:e59c8e839560 156
AnnaBridge 163:e59c8e839560 157 /**
AnnaBridge 163:e59c8e839560 158 * @brief Clears the DMA Channel pending flags.
AnnaBridge 168:b9e159c1930a 159 * @param __HANDLE__ DMA handle
AnnaBridge 168:b9e159c1930a 160 * @param __FLAG__ specifies the flag to clear.
AnnaBridge 163:e59c8e839560 161 * This parameter can be any combination of the following values:
AnnaBridge 163:e59c8e839560 162 * @arg DMA_FLAG_TCx: Transfer complete flag
AnnaBridge 163:e59c8e839560 163 * @arg DMA_FLAG_HTx: Half transfer complete flag
AnnaBridge 163:e59c8e839560 164 * @arg DMA_FLAG_TEx: Transfer error flag
AnnaBridge 163:e59c8e839560 165 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
AnnaBridge 163:e59c8e839560 166 * @retval None
AnnaBridge 163:e59c8e839560 167 */
AnnaBridge 163:e59c8e839560 168 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
AnnaBridge 163:e59c8e839560 169 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
AnnaBridge 163:e59c8e839560 170 (DMA1->IFCR = (__FLAG__)))
AnnaBridge 163:e59c8e839560 171
AnnaBridge 163:e59c8e839560 172 /**
AnnaBridge 163:e59c8e839560 173 * @}
AnnaBridge 163:e59c8e839560 174 */
AnnaBridge 163:e59c8e839560 175
AnnaBridge 163:e59c8e839560 176 #else /* STM32F301x8_STM32F302x8_STM32F318xx_STM32F303x8_STM32F334x8_STM32F328xx Product devices */
AnnaBridge 163:e59c8e839560 177 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
AnnaBridge 163:e59c8e839560 178 * @{
AnnaBridge 163:e59c8e839560 179 */
AnnaBridge 163:e59c8e839560 180
AnnaBridge 163:e59c8e839560 181 /**
AnnaBridge 163:e59c8e839560 182 * @brief Returns the current DMA Channel transfer complete flag.
AnnaBridge 168:b9e159c1930a 183 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 184 * @retval The specified transfer complete flag index.
AnnaBridge 163:e59c8e839560 185 */
AnnaBridge 163:e59c8e839560 186 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
AnnaBridge 163:e59c8e839560 187 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
AnnaBridge 163:e59c8e839560 188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
AnnaBridge 163:e59c8e839560 189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
AnnaBridge 163:e59c8e839560 190 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
AnnaBridge 163:e59c8e839560 191 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
AnnaBridge 163:e59c8e839560 192 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
AnnaBridge 163:e59c8e839560 193 DMA_FLAG_TC7)
AnnaBridge 163:e59c8e839560 194
AnnaBridge 163:e59c8e839560 195 /**
AnnaBridge 163:e59c8e839560 196 * @brief Returns the current DMA Channel half transfer complete flag.
AnnaBridge 168:b9e159c1930a 197 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 198 * @retval The specified half transfer complete flag index.
AnnaBridge 163:e59c8e839560 199 */
AnnaBridge 163:e59c8e839560 200 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 201 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
AnnaBridge 163:e59c8e839560 202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
AnnaBridge 163:e59c8e839560 203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
AnnaBridge 163:e59c8e839560 204 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
AnnaBridge 163:e59c8e839560 205 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
AnnaBridge 163:e59c8e839560 206 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
AnnaBridge 163:e59c8e839560 207 DMA_FLAG_HT7)
AnnaBridge 163:e59c8e839560 208
AnnaBridge 163:e59c8e839560 209 /**
AnnaBridge 163:e59c8e839560 210 * @brief Returns the current DMA Channel transfer error flag.
AnnaBridge 168:b9e159c1930a 211 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 212 * @retval The specified transfer error flag index.
AnnaBridge 163:e59c8e839560 213 */
AnnaBridge 163:e59c8e839560 214 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 215 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
AnnaBridge 163:e59c8e839560 216 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
AnnaBridge 163:e59c8e839560 217 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
AnnaBridge 163:e59c8e839560 218 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
AnnaBridge 163:e59c8e839560 219 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
AnnaBridge 163:e59c8e839560 220 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
AnnaBridge 163:e59c8e839560 221 DMA_FLAG_TE7)
AnnaBridge 163:e59c8e839560 222
AnnaBridge 163:e59c8e839560 223 /**
AnnaBridge 163:e59c8e839560 224 * @brief Return the current DMA Channel Global interrupt flag.
AnnaBridge 168:b9e159c1930a 225 * @param __HANDLE__ DMA handle
AnnaBridge 163:e59c8e839560 226 * @retval The specified transfer error flag index.
AnnaBridge 163:e59c8e839560 227 */
AnnaBridge 163:e59c8e839560 228 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
AnnaBridge 163:e59c8e839560 229 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
AnnaBridge 163:e59c8e839560 230 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
AnnaBridge 163:e59c8e839560 231 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
AnnaBridge 163:e59c8e839560 232 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
AnnaBridge 163:e59c8e839560 233 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
AnnaBridge 163:e59c8e839560 234 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
AnnaBridge 163:e59c8e839560 235 DMA_FLAG_GL7)
AnnaBridge 163:e59c8e839560 236
AnnaBridge 163:e59c8e839560 237 /**
AnnaBridge 163:e59c8e839560 238 * @brief Get the DMA Channel pending flags.
AnnaBridge 168:b9e159c1930a 239 * @param __HANDLE__ DMA handle
AnnaBridge 168:b9e159c1930a 240 * @param __FLAG__ Get the specified flag.
AnnaBridge 163:e59c8e839560 241 * This parameter can be any combination of the following values:
AnnaBridge 163:e59c8e839560 242 * @arg DMA_FLAG_TCx: Transfer complete flag
AnnaBridge 163:e59c8e839560 243 * @arg DMA_FLAG_HTx: Half transfer complete flag
AnnaBridge 163:e59c8e839560 244 * @arg DMA_FLAG_TEx: Transfer error flag
AnnaBridge 163:e59c8e839560 245 * Where x can be 1_7 to select the DMA Channel flag.
AnnaBridge 163:e59c8e839560 246 * @retval The state of FLAG (SET or RESET).
AnnaBridge 163:e59c8e839560 247 */
AnnaBridge 163:e59c8e839560 248
AnnaBridge 163:e59c8e839560 249 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
AnnaBridge 163:e59c8e839560 250
AnnaBridge 163:e59c8e839560 251 /**
AnnaBridge 163:e59c8e839560 252 * @brief Clears the DMA Channel pending flags.
AnnaBridge 168:b9e159c1930a 253 * @param __HANDLE__ DMA handle
AnnaBridge 168:b9e159c1930a 254 * @param __FLAG__ specifies the flag to clear.
AnnaBridge 163:e59c8e839560 255 * This parameter can be any combination of the following values:
AnnaBridge 163:e59c8e839560 256 * @arg DMA_FLAG_TCx: Transfer complete flag
AnnaBridge 163:e59c8e839560 257 * @arg DMA_FLAG_HTx: Half transfer complete flag
AnnaBridge 163:e59c8e839560 258 * @arg DMA_FLAG_TEx: Transfer error flag
AnnaBridge 163:e59c8e839560 259 * Where x can be 1_7 to select the DMA Channel flag.
AnnaBridge 163:e59c8e839560 260 * @retval None
AnnaBridge 163:e59c8e839560 261 */
AnnaBridge 163:e59c8e839560 262 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
AnnaBridge 163:e59c8e839560 263
AnnaBridge 163:e59c8e839560 264 /**
AnnaBridge 163:e59c8e839560 265 * @}
AnnaBridge 163:e59c8e839560 266 */
AnnaBridge 163:e59c8e839560 267
AnnaBridge 163:e59c8e839560 268 #endif
AnnaBridge 163:e59c8e839560 269
AnnaBridge 163:e59c8e839560 270 /**
AnnaBridge 163:e59c8e839560 271 * @}
AnnaBridge 163:e59c8e839560 272 */
AnnaBridge 163:e59c8e839560 273
AnnaBridge 163:e59c8e839560 274 /**
AnnaBridge 163:e59c8e839560 275 * @}
AnnaBridge 163:e59c8e839560 276 */
AnnaBridge 163:e59c8e839560 277
AnnaBridge 163:e59c8e839560 278 /**
AnnaBridge 163:e59c8e839560 279 * @}
AnnaBridge 163:e59c8e839560 280 */
AnnaBridge 163:e59c8e839560 281
AnnaBridge 163:e59c8e839560 282 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 283 }
AnnaBridge 163:e59c8e839560 284 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
AnnaBridge 163:e59c8e839560 285 /* STM32F302xC || STM32F303xC || STM32F358xx || */
AnnaBridge 163:e59c8e839560 286 /* STM32F373xC || STM32F378xx */
AnnaBridge 163:e59c8e839560 287
AnnaBridge 163:e59c8e839560 288 #endif /* __STM32F3xx_HAL_DMA_H */
AnnaBridge 163:e59c8e839560 289
AnnaBridge 163:e59c8e839560 290 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/