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TARGET_NUCLEO_F303RE/TOOLCHAIN_ARM_MICRO/stm32f3xx_hal_dma.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_dma.h@168:b9e159c1930a
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 163:e59c8e839560 | 1 | /** |
| AnnaBridge | 163:e59c8e839560 | 2 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 3 | * @file stm32f3xx_hal_dma.h |
| AnnaBridge | 163:e59c8e839560 | 4 | * @author MCD Application Team |
| AnnaBridge | 163:e59c8e839560 | 5 | * @brief Header file of DMA HAL module. |
| AnnaBridge | 163:e59c8e839560 | 6 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 7 | * @attention |
| AnnaBridge | 163:e59c8e839560 | 8 | * |
| AnnaBridge | 163:e59c8e839560 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 163:e59c8e839560 | 10 | * |
| AnnaBridge | 163:e59c8e839560 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 163:e59c8e839560 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 163:e59c8e839560 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 163:e59c8e839560 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 163:e59c8e839560 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 163:e59c8e839560 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 163:e59c8e839560 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 163:e59c8e839560 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 163:e59c8e839560 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 163:e59c8e839560 | 20 | * without specific prior written permission. |
| AnnaBridge | 163:e59c8e839560 | 21 | * |
| AnnaBridge | 163:e59c8e839560 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 163:e59c8e839560 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 163:e59c8e839560 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 163:e59c8e839560 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 163:e59c8e839560 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 163:e59c8e839560 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 163:e59c8e839560 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 163:e59c8e839560 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 163:e59c8e839560 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 163:e59c8e839560 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 163:e59c8e839560 | 32 | * |
| AnnaBridge | 163:e59c8e839560 | 33 | ****************************************************************************** |
| AnnaBridge | 163:e59c8e839560 | 34 | */ |
| AnnaBridge | 163:e59c8e839560 | 35 | |
| AnnaBridge | 163:e59c8e839560 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 37 | #ifndef __STM32F3xx_HAL_DMA_H |
| AnnaBridge | 163:e59c8e839560 | 38 | #define __STM32F3xx_HAL_DMA_H |
| AnnaBridge | 163:e59c8e839560 | 39 | |
| AnnaBridge | 163:e59c8e839560 | 40 | #ifdef __cplusplus |
| AnnaBridge | 163:e59c8e839560 | 41 | extern "C" { |
| AnnaBridge | 163:e59c8e839560 | 42 | #endif |
| AnnaBridge | 163:e59c8e839560 | 43 | |
| AnnaBridge | 163:e59c8e839560 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 45 | #include "stm32f3xx_hal_def.h" |
| AnnaBridge | 163:e59c8e839560 | 46 | |
| AnnaBridge | 163:e59c8e839560 | 47 | /** @addtogroup STM32F3xx_HAL_Driver |
| AnnaBridge | 163:e59c8e839560 | 48 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 49 | */ |
| AnnaBridge | 163:e59c8e839560 | 50 | |
| AnnaBridge | 163:e59c8e839560 | 51 | /** @addtogroup DMA |
| AnnaBridge | 163:e59c8e839560 | 52 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 53 | */ |
| AnnaBridge | 163:e59c8e839560 | 54 | |
| AnnaBridge | 163:e59c8e839560 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 56 | |
| AnnaBridge | 163:e59c8e839560 | 57 | /** @defgroup DMA_Exported_Types DMA Exported Types |
| AnnaBridge | 163:e59c8e839560 | 58 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 59 | */ |
| AnnaBridge | 163:e59c8e839560 | 60 | |
| AnnaBridge | 163:e59c8e839560 | 61 | /** |
| AnnaBridge | 163:e59c8e839560 | 62 | * @brief DMA Configuration Structure definition |
| AnnaBridge | 163:e59c8e839560 | 63 | */ |
| AnnaBridge | 163:e59c8e839560 | 64 | typedef struct |
| AnnaBridge | 163:e59c8e839560 | 65 | { |
| AnnaBridge | 163:e59c8e839560 | 66 | uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, |
| AnnaBridge | 163:e59c8e839560 | 67 | from memory to memory or from peripheral to memory. |
| AnnaBridge | 163:e59c8e839560 | 68 | This parameter can be a value of @ref DMA_Data_transfer_direction */ |
| AnnaBridge | 163:e59c8e839560 | 69 | |
| AnnaBridge | 163:e59c8e839560 | 70 | uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not. |
| AnnaBridge | 163:e59c8e839560 | 71 | This parameter can be a value of @ref DMA_Peripheral_incremented_mode */ |
| AnnaBridge | 163:e59c8e839560 | 72 | |
| AnnaBridge | 163:e59c8e839560 | 73 | uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not. |
| AnnaBridge | 163:e59c8e839560 | 74 | This parameter can be a value of @ref DMA_Memory_incremented_mode */ |
| AnnaBridge | 163:e59c8e839560 | 75 | |
| AnnaBridge | 163:e59c8e839560 | 76 | uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width. |
| AnnaBridge | 163:e59c8e839560 | 77 | This parameter can be a value of @ref DMA_Peripheral_data_size */ |
| AnnaBridge | 163:e59c8e839560 | 78 | |
| AnnaBridge | 163:e59c8e839560 | 79 | uint32_t MemDataAlignment; /*!< Specifies the Memory data width. |
| AnnaBridge | 163:e59c8e839560 | 80 | This parameter can be a value of @ref DMA_Memory_data_size */ |
| AnnaBridge | 163:e59c8e839560 | 81 | |
| AnnaBridge | 163:e59c8e839560 | 82 | uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx. |
| AnnaBridge | 163:e59c8e839560 | 83 | This parameter can be a value of @ref DMA_mode |
| AnnaBridge | 163:e59c8e839560 | 84 | @note The circular buffer mode cannot be used if the memory-to-memory |
| AnnaBridge | 163:e59c8e839560 | 85 | data transfer is configured on the selected Channel */ |
| AnnaBridge | 163:e59c8e839560 | 86 | |
| AnnaBridge | 163:e59c8e839560 | 87 | uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. |
| AnnaBridge | 163:e59c8e839560 | 88 | This parameter can be a value of @ref DMA_Priority_level */ |
| AnnaBridge | 163:e59c8e839560 | 89 | } DMA_InitTypeDef; |
| AnnaBridge | 163:e59c8e839560 | 90 | |
| AnnaBridge | 163:e59c8e839560 | 91 | /** |
| AnnaBridge | 163:e59c8e839560 | 92 | * @brief HAL DMA State structures definition |
| AnnaBridge | 163:e59c8e839560 | 93 | */ |
| AnnaBridge | 163:e59c8e839560 | 94 | typedef enum |
| AnnaBridge | 163:e59c8e839560 | 95 | { |
| AnnaBridge | 163:e59c8e839560 | 96 | HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */ |
| AnnaBridge | 163:e59c8e839560 | 97 | HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */ |
| AnnaBridge | 163:e59c8e839560 | 98 | HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */ |
| AnnaBridge | 163:e59c8e839560 | 99 | HAL_DMA_STATE_TIMEOUT = 0x03 /*!< DMA timeout state */ |
| AnnaBridge | 163:e59c8e839560 | 100 | }HAL_DMA_StateTypeDef; |
| AnnaBridge | 163:e59c8e839560 | 101 | |
| AnnaBridge | 163:e59c8e839560 | 102 | /** |
| AnnaBridge | 163:e59c8e839560 | 103 | * @brief HAL DMA Error Code structure definition |
| AnnaBridge | 163:e59c8e839560 | 104 | */ |
| AnnaBridge | 163:e59c8e839560 | 105 | typedef enum |
| AnnaBridge | 163:e59c8e839560 | 106 | { |
| AnnaBridge | 163:e59c8e839560 | 107 | HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */ |
| AnnaBridge | 163:e59c8e839560 | 108 | HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */ |
| AnnaBridge | 163:e59c8e839560 | 109 | }HAL_DMA_LevelCompleteTypeDef; |
| AnnaBridge | 163:e59c8e839560 | 110 | |
| AnnaBridge | 163:e59c8e839560 | 111 | /** |
| AnnaBridge | 163:e59c8e839560 | 112 | * @brief HAL DMA Callback ID structure definition |
| AnnaBridge | 163:e59c8e839560 | 113 | */ |
| AnnaBridge | 163:e59c8e839560 | 114 | typedef enum |
| AnnaBridge | 163:e59c8e839560 | 115 | { |
| AnnaBridge | 163:e59c8e839560 | 116 | HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */ |
| AnnaBridge | 163:e59c8e839560 | 117 | HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half transfer */ |
| AnnaBridge | 163:e59c8e839560 | 118 | HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */ |
| AnnaBridge | 163:e59c8e839560 | 119 | HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */ |
| AnnaBridge | 163:e59c8e839560 | 120 | HAL_DMA_XFER_ALL_CB_ID = 0x04 /*!< All */ |
| AnnaBridge | 163:e59c8e839560 | 121 | }HAL_DMA_CallbackIDTypeDef; |
| AnnaBridge | 163:e59c8e839560 | 122 | |
| AnnaBridge | 163:e59c8e839560 | 123 | /** |
| AnnaBridge | 163:e59c8e839560 | 124 | * @brief DMA handle Structure definition |
| AnnaBridge | 163:e59c8e839560 | 125 | */ |
| AnnaBridge | 163:e59c8e839560 | 126 | typedef struct __DMA_HandleTypeDef |
| AnnaBridge | 163:e59c8e839560 | 127 | { |
| AnnaBridge | 163:e59c8e839560 | 128 | DMA_Channel_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 163:e59c8e839560 | 129 | |
| AnnaBridge | 163:e59c8e839560 | 130 | DMA_InitTypeDef Init; /*!< DMA communication parameters */ |
| AnnaBridge | 163:e59c8e839560 | 131 | |
| AnnaBridge | 163:e59c8e839560 | 132 | HAL_LockTypeDef Lock; /*!< DMA locking object */ |
| AnnaBridge | 163:e59c8e839560 | 133 | |
| AnnaBridge | 163:e59c8e839560 | 134 | HAL_DMA_StateTypeDef State; /*!< DMA transfer state */ |
| AnnaBridge | 163:e59c8e839560 | 135 | |
| AnnaBridge | 163:e59c8e839560 | 136 | void *Parent; /*!< Parent object state */ |
| AnnaBridge | 163:e59c8e839560 | 137 | |
| AnnaBridge | 163:e59c8e839560 | 138 | void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ |
| AnnaBridge | 163:e59c8e839560 | 139 | |
| AnnaBridge | 163:e59c8e839560 | 140 | void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ |
| AnnaBridge | 163:e59c8e839560 | 141 | |
| AnnaBridge | 163:e59c8e839560 | 142 | void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ |
| AnnaBridge | 163:e59c8e839560 | 143 | |
| AnnaBridge | 163:e59c8e839560 | 144 | void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */ |
| AnnaBridge | 163:e59c8e839560 | 145 | |
| AnnaBridge | 163:e59c8e839560 | 146 | __IO uint32_t ErrorCode; /*!< DMA Error code */ |
| AnnaBridge | 163:e59c8e839560 | 147 | |
| AnnaBridge | 163:e59c8e839560 | 148 | DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */ |
| AnnaBridge | 163:e59c8e839560 | 149 | |
| AnnaBridge | 163:e59c8e839560 | 150 | uint32_t ChannelIndex; /*!< DMA Channel Index */ |
| AnnaBridge | 163:e59c8e839560 | 151 | } DMA_HandleTypeDef; |
| AnnaBridge | 163:e59c8e839560 | 152 | /** |
| AnnaBridge | 163:e59c8e839560 | 153 | * @} |
| AnnaBridge | 163:e59c8e839560 | 154 | */ |
| AnnaBridge | 163:e59c8e839560 | 155 | |
| AnnaBridge | 163:e59c8e839560 | 156 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 157 | |
| AnnaBridge | 163:e59c8e839560 | 158 | /** @defgroup DMA_Exported_Constants DMA Exported Constants |
| AnnaBridge | 163:e59c8e839560 | 159 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 160 | */ |
| AnnaBridge | 163:e59c8e839560 | 161 | |
| AnnaBridge | 163:e59c8e839560 | 162 | /** @defgroup DMA_Error_Code DMA Error Code |
| AnnaBridge | 163:e59c8e839560 | 163 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 164 | */ |
| AnnaBridge | 163:e59c8e839560 | 165 | #define HAL_DMA_ERROR_NONE (0x00000000U) /*!< No error */ |
| AnnaBridge | 163:e59c8e839560 | 166 | #define HAL_DMA_ERROR_TE (0x00000001U) /*!< Transfer error */ |
| AnnaBridge | 163:e59c8e839560 | 167 | #define HAL_DMA_ERROR_NO_XFER (0x00000004U) /*!< no ongoin transfer */ |
| AnnaBridge | 163:e59c8e839560 | 168 | #define HAL_DMA_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ |
| AnnaBridge | 163:e59c8e839560 | 169 | #define HAL_DMA_ERROR_NOT_SUPPORTED (0x00000100U) /*!< Not supported mode */ |
| AnnaBridge | 163:e59c8e839560 | 170 | /** |
| AnnaBridge | 163:e59c8e839560 | 171 | * @} |
| AnnaBridge | 163:e59c8e839560 | 172 | */ |
| AnnaBridge | 163:e59c8e839560 | 173 | |
| AnnaBridge | 163:e59c8e839560 | 174 | /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction |
| AnnaBridge | 163:e59c8e839560 | 175 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 176 | */ |
| AnnaBridge | 163:e59c8e839560 | 177 | #define DMA_PERIPH_TO_MEMORY (0x00000000U) /*!< Peripheral to memory direction */ |
| AnnaBridge | 163:e59c8e839560 | 178 | #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ |
| AnnaBridge | 163:e59c8e839560 | 179 | #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */ |
| AnnaBridge | 163:e59c8e839560 | 180 | |
| AnnaBridge | 163:e59c8e839560 | 181 | /** |
| AnnaBridge | 163:e59c8e839560 | 182 | * @} |
| AnnaBridge | 163:e59c8e839560 | 183 | */ |
| AnnaBridge | 163:e59c8e839560 | 184 | |
| AnnaBridge | 163:e59c8e839560 | 185 | /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode |
| AnnaBridge | 163:e59c8e839560 | 186 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 187 | */ |
| AnnaBridge | 163:e59c8e839560 | 188 | #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ |
| AnnaBridge | 163:e59c8e839560 | 189 | #define DMA_PINC_DISABLE (0x00000000U) /*!< Peripheral increment mode Disable */ |
| AnnaBridge | 163:e59c8e839560 | 190 | /** |
| AnnaBridge | 163:e59c8e839560 | 191 | * @} |
| AnnaBridge | 163:e59c8e839560 | 192 | */ |
| AnnaBridge | 163:e59c8e839560 | 193 | |
| AnnaBridge | 163:e59c8e839560 | 194 | /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode |
| AnnaBridge | 163:e59c8e839560 | 195 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 196 | */ |
| AnnaBridge | 163:e59c8e839560 | 197 | #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ |
| AnnaBridge | 163:e59c8e839560 | 198 | #define DMA_MINC_DISABLE (0x00000000U) /*!< Memory increment mode Disable */ |
| AnnaBridge | 163:e59c8e839560 | 199 | /** |
| AnnaBridge | 163:e59c8e839560 | 200 | * @} |
| AnnaBridge | 163:e59c8e839560 | 201 | */ |
| AnnaBridge | 163:e59c8e839560 | 202 | |
| AnnaBridge | 163:e59c8e839560 | 203 | /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size |
| AnnaBridge | 163:e59c8e839560 | 204 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 205 | */ |
| AnnaBridge | 163:e59c8e839560 | 206 | #define DMA_PDATAALIGN_BYTE (0x00000000U) /*!< Peripheral data alignment : Byte */ |
| AnnaBridge | 163:e59c8e839560 | 207 | #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */ |
| AnnaBridge | 163:e59c8e839560 | 208 | #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */ |
| AnnaBridge | 163:e59c8e839560 | 209 | /** |
| AnnaBridge | 163:e59c8e839560 | 210 | * @} |
| AnnaBridge | 163:e59c8e839560 | 211 | */ |
| AnnaBridge | 163:e59c8e839560 | 212 | |
| AnnaBridge | 163:e59c8e839560 | 213 | /** @defgroup DMA_Memory_data_size DMA Memory data size |
| AnnaBridge | 163:e59c8e839560 | 214 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 215 | */ |
| AnnaBridge | 163:e59c8e839560 | 216 | #define DMA_MDATAALIGN_BYTE (0x00000000U) /*!< Memory data alignment : Byte */ |
| AnnaBridge | 163:e59c8e839560 | 217 | #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */ |
| AnnaBridge | 163:e59c8e839560 | 218 | #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */ |
| AnnaBridge | 163:e59c8e839560 | 219 | /** |
| AnnaBridge | 163:e59c8e839560 | 220 | * @} |
| AnnaBridge | 163:e59c8e839560 | 221 | */ |
| AnnaBridge | 163:e59c8e839560 | 222 | |
| AnnaBridge | 163:e59c8e839560 | 223 | /** @defgroup DMA_mode DMA mode |
| AnnaBridge | 163:e59c8e839560 | 224 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 225 | */ |
| AnnaBridge | 163:e59c8e839560 | 226 | #define DMA_NORMAL (0x00000000U) /*!< Normal Mode */ |
| AnnaBridge | 163:e59c8e839560 | 227 | #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */ |
| AnnaBridge | 163:e59c8e839560 | 228 | /** |
| AnnaBridge | 163:e59c8e839560 | 229 | * @} |
| AnnaBridge | 163:e59c8e839560 | 230 | */ |
| AnnaBridge | 163:e59c8e839560 | 231 | |
| AnnaBridge | 163:e59c8e839560 | 232 | /** @defgroup DMA_Priority_level DMA Priority level |
| AnnaBridge | 163:e59c8e839560 | 233 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 234 | */ |
| AnnaBridge | 163:e59c8e839560 | 235 | #define DMA_PRIORITY_LOW (0x00000000U) /*!< Priority level : Low */ |
| AnnaBridge | 163:e59c8e839560 | 236 | #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ |
| AnnaBridge | 163:e59c8e839560 | 237 | #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ |
| AnnaBridge | 163:e59c8e839560 | 238 | #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ |
| AnnaBridge | 163:e59c8e839560 | 239 | /** |
| AnnaBridge | 163:e59c8e839560 | 240 | * @} |
| AnnaBridge | 163:e59c8e839560 | 241 | */ |
| AnnaBridge | 163:e59c8e839560 | 242 | |
| AnnaBridge | 163:e59c8e839560 | 243 | |
| AnnaBridge | 163:e59c8e839560 | 244 | /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions |
| AnnaBridge | 163:e59c8e839560 | 245 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 246 | */ |
| AnnaBridge | 163:e59c8e839560 | 247 | #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) |
| AnnaBridge | 163:e59c8e839560 | 248 | #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) |
| AnnaBridge | 163:e59c8e839560 | 249 | #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) |
| AnnaBridge | 163:e59c8e839560 | 250 | /** |
| AnnaBridge | 163:e59c8e839560 | 251 | * @} |
| AnnaBridge | 163:e59c8e839560 | 252 | */ |
| AnnaBridge | 163:e59c8e839560 | 253 | |
| AnnaBridge | 163:e59c8e839560 | 254 | /** @defgroup DMA_flag_definitions DMA flag definitions |
| AnnaBridge | 163:e59c8e839560 | 255 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 256 | */ |
| AnnaBridge | 163:e59c8e839560 | 257 | #define DMA_FLAG_GL1 (0x00000001U) |
| AnnaBridge | 163:e59c8e839560 | 258 | #define DMA_FLAG_TC1 (0x00000002U) |
| AnnaBridge | 163:e59c8e839560 | 259 | #define DMA_FLAG_HT1 (0x00000004U) |
| AnnaBridge | 163:e59c8e839560 | 260 | #define DMA_FLAG_TE1 (0x00000008U) |
| AnnaBridge | 163:e59c8e839560 | 261 | #define DMA_FLAG_GL2 (0x00000010U) |
| AnnaBridge | 163:e59c8e839560 | 262 | #define DMA_FLAG_TC2 (0x00000020U) |
| AnnaBridge | 163:e59c8e839560 | 263 | #define DMA_FLAG_HT2 (0x00000040U) |
| AnnaBridge | 163:e59c8e839560 | 264 | #define DMA_FLAG_TE2 (0x00000080U) |
| AnnaBridge | 163:e59c8e839560 | 265 | #define DMA_FLAG_GL3 (0x00000100U) |
| AnnaBridge | 163:e59c8e839560 | 266 | #define DMA_FLAG_TC3 (0x00000200U) |
| AnnaBridge | 163:e59c8e839560 | 267 | #define DMA_FLAG_HT3 (0x00000400U) |
| AnnaBridge | 163:e59c8e839560 | 268 | #define DMA_FLAG_TE3 (0x00000800U) |
| AnnaBridge | 163:e59c8e839560 | 269 | #define DMA_FLAG_GL4 (0x00001000U) |
| AnnaBridge | 163:e59c8e839560 | 270 | #define DMA_FLAG_TC4 (0x00002000U) |
| AnnaBridge | 163:e59c8e839560 | 271 | #define DMA_FLAG_HT4 (0x00004000U) |
| AnnaBridge | 163:e59c8e839560 | 272 | #define DMA_FLAG_TE4 (0x00008000U) |
| AnnaBridge | 163:e59c8e839560 | 273 | #define DMA_FLAG_GL5 (0x00010000U) |
| AnnaBridge | 163:e59c8e839560 | 274 | #define DMA_FLAG_TC5 (0x00020000U) |
| AnnaBridge | 163:e59c8e839560 | 275 | #define DMA_FLAG_HT5 (0x00040000U) |
| AnnaBridge | 163:e59c8e839560 | 276 | #define DMA_FLAG_TE5 (0x00080000U) |
| AnnaBridge | 163:e59c8e839560 | 277 | #define DMA_FLAG_GL6 (0x00100000U) |
| AnnaBridge | 163:e59c8e839560 | 278 | #define DMA_FLAG_TC6 (0x00200000U) |
| AnnaBridge | 163:e59c8e839560 | 279 | #define DMA_FLAG_HT6 (0x00400000U) |
| AnnaBridge | 163:e59c8e839560 | 280 | #define DMA_FLAG_TE6 (0x00800000U) |
| AnnaBridge | 163:e59c8e839560 | 281 | #define DMA_FLAG_GL7 (0x01000000U) |
| AnnaBridge | 163:e59c8e839560 | 282 | #define DMA_FLAG_TC7 (0x02000000U) |
| AnnaBridge | 163:e59c8e839560 | 283 | #define DMA_FLAG_HT7 (0x04000000U) |
| AnnaBridge | 163:e59c8e839560 | 284 | #define DMA_FLAG_TE7 (0x08000000U) |
| AnnaBridge | 163:e59c8e839560 | 285 | /** |
| AnnaBridge | 163:e59c8e839560 | 286 | * @} |
| AnnaBridge | 163:e59c8e839560 | 287 | */ |
| AnnaBridge | 163:e59c8e839560 | 288 | |
| AnnaBridge | 163:e59c8e839560 | 289 | /** |
| AnnaBridge | 163:e59c8e839560 | 290 | * @} |
| AnnaBridge | 163:e59c8e839560 | 291 | */ |
| AnnaBridge | 163:e59c8e839560 | 292 | |
| AnnaBridge | 163:e59c8e839560 | 293 | |
| AnnaBridge | 163:e59c8e839560 | 294 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 295 | /** @defgroup DMA_Exported_Macros DMA Exported Macros |
| AnnaBridge | 163:e59c8e839560 | 296 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 297 | */ |
| AnnaBridge | 163:e59c8e839560 | 298 | |
| AnnaBridge | 163:e59c8e839560 | 299 | /** @brief Reset DMA handle state |
| AnnaBridge | 168:b9e159c1930a | 300 | * @param __HANDLE__ DMA handle. |
| AnnaBridge | 163:e59c8e839560 | 301 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 302 | */ |
| AnnaBridge | 163:e59c8e839560 | 303 | #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) |
| AnnaBridge | 163:e59c8e839560 | 304 | |
| AnnaBridge | 163:e59c8e839560 | 305 | /** |
| AnnaBridge | 163:e59c8e839560 | 306 | * @brief Enable the specified DMA Channel. |
| AnnaBridge | 168:b9e159c1930a | 307 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 163:e59c8e839560 | 308 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 309 | */ |
| AnnaBridge | 163:e59c8e839560 | 310 | #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN) |
| AnnaBridge | 163:e59c8e839560 | 311 | |
| AnnaBridge | 163:e59c8e839560 | 312 | /** |
| AnnaBridge | 163:e59c8e839560 | 313 | * @brief Disable the specified DMA Channel. |
| AnnaBridge | 168:b9e159c1930a | 314 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 163:e59c8e839560 | 315 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 316 | */ |
| AnnaBridge | 163:e59c8e839560 | 317 | #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN) |
| AnnaBridge | 163:e59c8e839560 | 318 | |
| AnnaBridge | 163:e59c8e839560 | 319 | |
| AnnaBridge | 163:e59c8e839560 | 320 | /* Interrupt & Flag management */ |
| AnnaBridge | 163:e59c8e839560 | 321 | |
| AnnaBridge | 163:e59c8e839560 | 322 | /** |
| AnnaBridge | 163:e59c8e839560 | 323 | * @brief Enables the specified DMA Channel interrupts. |
| AnnaBridge | 168:b9e159c1930a | 324 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 168:b9e159c1930a | 325 | * @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled. |
| AnnaBridge | 163:e59c8e839560 | 326 | * This parameter can be any combination of the following values: |
| AnnaBridge | 163:e59c8e839560 | 327 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 328 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 329 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 330 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 331 | */ |
| AnnaBridge | 163:e59c8e839560 | 332 | #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) |
| AnnaBridge | 163:e59c8e839560 | 333 | |
| AnnaBridge | 163:e59c8e839560 | 334 | /** |
| AnnaBridge | 163:e59c8e839560 | 335 | * @brief Disables the specified DMA Channel interrupts. |
| AnnaBridge | 168:b9e159c1930a | 336 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 168:b9e159c1930a | 337 | * @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled. |
| AnnaBridge | 163:e59c8e839560 | 338 | * This parameter can be any combination of the following values: |
| AnnaBridge | 163:e59c8e839560 | 339 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 340 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 341 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 342 | * @retval None |
| AnnaBridge | 163:e59c8e839560 | 343 | */ |
| AnnaBridge | 163:e59c8e839560 | 344 | #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) |
| AnnaBridge | 163:e59c8e839560 | 345 | |
| AnnaBridge | 163:e59c8e839560 | 346 | /** |
| AnnaBridge | 163:e59c8e839560 | 347 | * @brief Checks whether the specified DMA Channel interrupt is enabled or disabled. |
| AnnaBridge | 168:b9e159c1930a | 348 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 168:b9e159c1930a | 349 | * @param __INTERRUPT__ specifies the DMA interrupt source to check. |
| AnnaBridge | 163:e59c8e839560 | 350 | * This parameter can be one of the following values: |
| AnnaBridge | 163:e59c8e839560 | 351 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 352 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 353 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 163:e59c8e839560 | 354 | * @retval The state of DMA_IT (SET or RESET). |
| AnnaBridge | 163:e59c8e839560 | 355 | */ |
| AnnaBridge | 163:e59c8e839560 | 356 | #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__))) |
| AnnaBridge | 163:e59c8e839560 | 357 | |
| AnnaBridge | 163:e59c8e839560 | 358 | /** |
| AnnaBridge | 163:e59c8e839560 | 359 | * @brief Returns the number of remaining data units in the current DMAy Channelx transfer. |
| AnnaBridge | 168:b9e159c1930a | 360 | * @param __HANDLE__ DMA handle |
| AnnaBridge | 163:e59c8e839560 | 361 | * |
| AnnaBridge | 163:e59c8e839560 | 362 | * @retval The number of remaining data units in the current DMA Channel transfer. |
| AnnaBridge | 163:e59c8e839560 | 363 | */ |
| AnnaBridge | 163:e59c8e839560 | 364 | #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) |
| AnnaBridge | 163:e59c8e839560 | 365 | |
| AnnaBridge | 163:e59c8e839560 | 366 | /** |
| AnnaBridge | 163:e59c8e839560 | 367 | * @} |
| AnnaBridge | 163:e59c8e839560 | 368 | */ |
| AnnaBridge | 163:e59c8e839560 | 369 | |
| AnnaBridge | 163:e59c8e839560 | 370 | /* Include DMA HAL Extended module */ |
| AnnaBridge | 163:e59c8e839560 | 371 | #include "stm32f3xx_hal_dma_ex.h" |
| AnnaBridge | 163:e59c8e839560 | 372 | |
| AnnaBridge | 163:e59c8e839560 | 373 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 374 | /** @addtogroup DMA_Exported_Functions |
| AnnaBridge | 163:e59c8e839560 | 375 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 376 | */ |
| AnnaBridge | 163:e59c8e839560 | 377 | |
| AnnaBridge | 163:e59c8e839560 | 378 | /** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 163:e59c8e839560 | 379 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 380 | */ |
| AnnaBridge | 163:e59c8e839560 | 381 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 163:e59c8e839560 | 382 | HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 383 | HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 384 | /** |
| AnnaBridge | 163:e59c8e839560 | 385 | * @} |
| AnnaBridge | 163:e59c8e839560 | 386 | */ |
| AnnaBridge | 163:e59c8e839560 | 387 | |
| AnnaBridge | 163:e59c8e839560 | 388 | /** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions |
| AnnaBridge | 163:e59c8e839560 | 389 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 390 | */ |
| AnnaBridge | 163:e59c8e839560 | 391 | /* Input and Output operation functions *****************************************************/ |
| AnnaBridge | 163:e59c8e839560 | 392 | HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| AnnaBridge | 163:e59c8e839560 | 393 | HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| AnnaBridge | 163:e59c8e839560 | 394 | HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 395 | HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 396 | HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout); |
| AnnaBridge | 163:e59c8e839560 | 397 | void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 398 | HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)); |
| AnnaBridge | 163:e59c8e839560 | 399 | HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID); |
| AnnaBridge | 163:e59c8e839560 | 400 | /** |
| AnnaBridge | 163:e59c8e839560 | 401 | * @} |
| AnnaBridge | 163:e59c8e839560 | 402 | */ |
| AnnaBridge | 163:e59c8e839560 | 403 | |
| AnnaBridge | 163:e59c8e839560 | 404 | /** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions |
| AnnaBridge | 163:e59c8e839560 | 405 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 406 | */ |
| AnnaBridge | 163:e59c8e839560 | 407 | /* Peripheral State and Error functions ***************************************/ |
| AnnaBridge | 163:e59c8e839560 | 408 | HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 409 | uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 163:e59c8e839560 | 410 | /** |
| AnnaBridge | 163:e59c8e839560 | 411 | * @} |
| AnnaBridge | 163:e59c8e839560 | 412 | */ |
| AnnaBridge | 163:e59c8e839560 | 413 | |
| AnnaBridge | 163:e59c8e839560 | 414 | /** |
| AnnaBridge | 163:e59c8e839560 | 415 | * @} |
| AnnaBridge | 163:e59c8e839560 | 416 | */ |
| AnnaBridge | 163:e59c8e839560 | 417 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 163:e59c8e839560 | 418 | /** @defgroup DMA_Private_Macros DMA Private Macros |
| AnnaBridge | 163:e59c8e839560 | 419 | * @brief DMA private macros |
| AnnaBridge | 163:e59c8e839560 | 420 | * @{ |
| AnnaBridge | 163:e59c8e839560 | 421 | */ |
| AnnaBridge | 163:e59c8e839560 | 422 | |
| AnnaBridge | 163:e59c8e839560 | 423 | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U)) |
| AnnaBridge | 163:e59c8e839560 | 424 | |
| AnnaBridge | 163:e59c8e839560 | 425 | #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ |
| AnnaBridge | 163:e59c8e839560 | 426 | ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ |
| AnnaBridge | 163:e59c8e839560 | 427 | ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) |
| AnnaBridge | 163:e59c8e839560 | 428 | |
| AnnaBridge | 163:e59c8e839560 | 429 | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ |
| AnnaBridge | 163:e59c8e839560 | 430 | ((STATE) == DMA_PINC_DISABLE)) |
| AnnaBridge | 163:e59c8e839560 | 431 | |
| AnnaBridge | 163:e59c8e839560 | 432 | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ |
| AnnaBridge | 163:e59c8e839560 | 433 | ((STATE) == DMA_MINC_DISABLE)) |
| AnnaBridge | 163:e59c8e839560 | 434 | |
| AnnaBridge | 163:e59c8e839560 | 435 | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ |
| AnnaBridge | 163:e59c8e839560 | 436 | ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ |
| AnnaBridge | 163:e59c8e839560 | 437 | ((SIZE) == DMA_PDATAALIGN_WORD)) |
| AnnaBridge | 163:e59c8e839560 | 438 | |
| AnnaBridge | 163:e59c8e839560 | 439 | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ |
| AnnaBridge | 163:e59c8e839560 | 440 | ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ |
| AnnaBridge | 163:e59c8e839560 | 441 | ((SIZE) == DMA_MDATAALIGN_WORD )) |
| AnnaBridge | 163:e59c8e839560 | 442 | |
| AnnaBridge | 163:e59c8e839560 | 443 | #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ |
| AnnaBridge | 163:e59c8e839560 | 444 | ((MODE) == DMA_CIRCULAR)) |
| AnnaBridge | 163:e59c8e839560 | 445 | |
| AnnaBridge | 163:e59c8e839560 | 446 | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ |
| AnnaBridge | 163:e59c8e839560 | 447 | ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ |
| AnnaBridge | 163:e59c8e839560 | 448 | ((PRIORITY) == DMA_PRIORITY_HIGH) || \ |
| AnnaBridge | 163:e59c8e839560 | 449 | ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) |
| AnnaBridge | 163:e59c8e839560 | 450 | |
| AnnaBridge | 163:e59c8e839560 | 451 | /** |
| AnnaBridge | 163:e59c8e839560 | 452 | * @} |
| AnnaBridge | 163:e59c8e839560 | 453 | */ |
| AnnaBridge | 163:e59c8e839560 | 454 | |
| AnnaBridge | 163:e59c8e839560 | 455 | |
| AnnaBridge | 163:e59c8e839560 | 456 | /** |
| AnnaBridge | 163:e59c8e839560 | 457 | * @} |
| AnnaBridge | 163:e59c8e839560 | 458 | */ |
| AnnaBridge | 163:e59c8e839560 | 459 | |
| AnnaBridge | 163:e59c8e839560 | 460 | /** |
| AnnaBridge | 163:e59c8e839560 | 461 | * @} |
| AnnaBridge | 163:e59c8e839560 | 462 | */ |
| AnnaBridge | 163:e59c8e839560 | 463 | |
| AnnaBridge | 163:e59c8e839560 | 464 | #ifdef __cplusplus |
| AnnaBridge | 163:e59c8e839560 | 465 | } |
| AnnaBridge | 163:e59c8e839560 | 466 | #endif |
| AnnaBridge | 163:e59c8e839560 | 467 | |
| AnnaBridge | 163:e59c8e839560 | 468 | #endif /* __STM32F3xx_HAL_DMA_H */ |
| AnnaBridge | 163:e59c8e839560 | 469 | |
| AnnaBridge | 163:e59c8e839560 | 470 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
