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TARGET_NUCLEO_F207ZG/TOOLCHAIN_IAR/pin_device.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Child:
172:65be27845400
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2016, STMicroelectronics
AnnaBridge 171:3a7713b1edbc 4 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 5 *
AnnaBridge 171:3a7713b1edbc 6 * Redistribution and use in source and binary forms, with or without
AnnaBridge 171:3a7713b1edbc 7 * modification, are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 10 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 12 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 13 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 15 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 16 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 28 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef MBED_PIN_DEVICE_H
AnnaBridge 171:3a7713b1edbc 31 #define MBED_PIN_DEVICE_H
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "cmsis.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 // when LL is available, below include can be used
AnnaBridge 171:3a7713b1edbc 36 // #include "stm32f2xx_ll_gpio.h"
AnnaBridge 171:3a7713b1edbc 37 // until then let's define locally the required functions
AnnaBridge 171:3a7713b1edbc 38 #define LL_GPIO_PIN_0 GPIO_BSRR_BS0 /*!< Select pin 0 */
AnnaBridge 171:3a7713b1edbc 39 #define LL_GPIO_PIN_1 GPIO_BSRR_BS1 /*!< Select pin 1 */
AnnaBridge 171:3a7713b1edbc 40 #define LL_GPIO_PIN_2 GPIO_BSRR_BS2 /*!< Select pin 2 */
AnnaBridge 171:3a7713b1edbc 41 #define LL_GPIO_PIN_3 GPIO_BSRR_BS3 /*!< Select pin 3 */
AnnaBridge 171:3a7713b1edbc 42 #define LL_GPIO_PIN_4 GPIO_BSRR_BS4 /*!< Select pin 4 */
AnnaBridge 171:3a7713b1edbc 43 #define LL_GPIO_PIN_5 GPIO_BSRR_BS5 /*!< Select pin 5 */
AnnaBridge 171:3a7713b1edbc 44 #define LL_GPIO_PIN_6 GPIO_BSRR_BS6 /*!< Select pin 6 */
AnnaBridge 171:3a7713b1edbc 45 #define LL_GPIO_PIN_7 GPIO_BSRR_BS7 /*!< Select pin 7 */
AnnaBridge 171:3a7713b1edbc 46 #define LL_GPIO_PIN_8 GPIO_BSRR_BS8 /*!< Select pin 8 */
AnnaBridge 171:3a7713b1edbc 47 #define LL_GPIO_PIN_9 GPIO_BSRR_BS9 /*!< Select pin 9 */
AnnaBridge 171:3a7713b1edbc 48 #define LL_GPIO_PIN_10 GPIO_BSRR_BS10 /*!< Select pin 10 */
AnnaBridge 171:3a7713b1edbc 49 #define LL_GPIO_PIN_11 GPIO_BSRR_BS11 /*!< Select pin 11 */
AnnaBridge 171:3a7713b1edbc 50 #define LL_GPIO_PIN_12 GPIO_BSRR_BS12 /*!< Select pin 12 */
AnnaBridge 171:3a7713b1edbc 51 #define LL_GPIO_PIN_13 GPIO_BSRR_BS13 /*!< Select pin 13 */
AnnaBridge 171:3a7713b1edbc 52 #define LL_GPIO_PIN_14 GPIO_BSRR_BS14 /*!< Select pin 14 */
AnnaBridge 171:3a7713b1edbc 53 #define LL_GPIO_PIN_15 GPIO_BSRR_BS15 /*!< Select pin 15 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 #define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */
AnnaBridge 171:3a7713b1edbc 56 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODE0_0 /*!< Select output mode */
AnnaBridge 171:3a7713b1edbc 57 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODE0_1 /*!< Select alternate function mode */
AnnaBridge 171:3a7713b1edbc 58 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODE0 /*!< Select analog mode */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 #define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
AnnaBridge 171:3a7713b1edbc 61 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT0 /*!< Select open-drain as output type */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 #define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */
AnnaBridge 171:3a7713b1edbc 64 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPD0_0 /*!< Select I/O pull up */
AnnaBridge 171:3a7713b1edbc 65 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPD0_1 /*!< Select I/O pull down */
AnnaBridge 171:3a7713b1edbc 66
AnnaBridge 171:3a7713b1edbc 67 #define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */
AnnaBridge 171:3a7713b1edbc 68 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
AnnaBridge 171:3a7713b1edbc 69 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
AnnaBridge 171:3a7713b1edbc 70 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
AnnaBridge 171:3a7713b1edbc 73 {
AnnaBridge 171:3a7713b1edbc 74 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
AnnaBridge 171:3a7713b1edbc 75 (Alternate << (POSITION_VAL(Pin) * 4U)));
AnnaBridge 171:3a7713b1edbc 76 }
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
AnnaBridge 171:3a7713b1edbc 79 {
AnnaBridge 171:3a7713b1edbc 80 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
AnnaBridge 171:3a7713b1edbc 81 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
AnnaBridge 171:3a7713b1edbc 82 }
AnnaBridge 171:3a7713b1edbc 83 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
AnnaBridge 171:3a7713b1edbc 84 {
AnnaBridge 171:3a7713b1edbc 85 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
AnnaBridge 171:3a7713b1edbc 86 }
AnnaBridge 171:3a7713b1edbc 87 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
AnnaBridge 171:3a7713b1edbc 88 {
AnnaBridge 171:3a7713b1edbc 89 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
AnnaBridge 171:3a7713b1edbc 90 }
AnnaBridge 171:3a7713b1edbc 91 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
AnnaBridge 171:3a7713b1edbc 92 {
AnnaBridge 171:3a7713b1edbc 93 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
AnnaBridge 171:3a7713b1edbc 94 }
AnnaBridge 171:3a7713b1edbc 95 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
AnnaBridge 171:3a7713b1edbc 96 {
AnnaBridge 171:3a7713b1edbc 97 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
AnnaBridge 171:3a7713b1edbc 98 }
AnnaBridge 171:3a7713b1edbc 99 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
AnnaBridge 171:3a7713b1edbc 100 {
AnnaBridge 171:3a7713b1edbc 101 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
AnnaBridge 171:3a7713b1edbc 102 (Speed << (POSITION_VAL(Pin) * 2U)));
AnnaBridge 171:3a7713b1edbc 103 }
AnnaBridge 171:3a7713b1edbc 104 // Above lines shall be defined in LL when available
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 extern const uint32_t ll_pin_defines[16];
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 /* Family specific implementations */
AnnaBridge 171:3a7713b1edbc 109 static inline void stm_pin_DisconnectDebug(PinName pin)
AnnaBridge 171:3a7713b1edbc 110 {
AnnaBridge 171:3a7713b1edbc 111 /* empty for now */
AnnaBridge 171:3a7713b1edbc 112 }
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
AnnaBridge 171:3a7713b1edbc 115 {
AnnaBridge 171:3a7713b1edbc 116 switch (pull_config) {
AnnaBridge 171:3a7713b1edbc 117 case GPIO_PULLUP:
AnnaBridge 171:3a7713b1edbc 118 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
AnnaBridge 171:3a7713b1edbc 119 break;
AnnaBridge 171:3a7713b1edbc 120 case GPIO_PULLDOWN:
AnnaBridge 171:3a7713b1edbc 121 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
AnnaBridge 171:3a7713b1edbc 122 break;
AnnaBridge 171:3a7713b1edbc 123 default:
AnnaBridge 171:3a7713b1edbc 124 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_NO);
AnnaBridge 171:3a7713b1edbc 125 break;
AnnaBridge 171:3a7713b1edbc 126 }
AnnaBridge 171:3a7713b1edbc 127 }
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
AnnaBridge 171:3a7713b1edbc 130 {
AnnaBridge 171:3a7713b1edbc 131 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 if (STM_PIN(pin) > 7) {
AnnaBridge 171:3a7713b1edbc 134 LL_GPIO_SetAFPin_8_15(gpio, ll_pin, afnum);
AnnaBridge 171:3a7713b1edbc 135 } else {
AnnaBridge 171:3a7713b1edbc 136 LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum);
AnnaBridge 171:3a7713b1edbc 137 }
AnnaBridge 171:3a7713b1edbc 138 }
AnnaBridge 171:3a7713b1edbc 139
AnnaBridge 171:3a7713b1edbc 140 #endif