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mbed 2

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Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f2xx_ll_usb.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @version V1.2.1
AnnaBridge 171:3a7713b1edbc 6 * @date 14-April-2017
AnnaBridge 171:3a7713b1edbc 7 * @brief Header file of USB Core HAL module.
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 * @attention
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 14 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 19 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 21 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 22 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 23 *
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 *
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 36 */
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 39 #ifndef __STM32F2xx_LL_USB_H
AnnaBridge 171:3a7713b1edbc 40 #define __STM32F2xx_LL_USB_H
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32f2xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** @addtogroup STM32F2xx_HAL
AnnaBridge 171:3a7713b1edbc 50 * @{
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @addtogroup USB_Core
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /**
AnnaBridge 171:3a7713b1edbc 60 * @brief USB Mode definition
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62 typedef enum
AnnaBridge 171:3a7713b1edbc 63 {
AnnaBridge 171:3a7713b1edbc 64 USB_OTG_DEVICE_MODE = 0U,
AnnaBridge 171:3a7713b1edbc 65 USB_OTG_HOST_MODE = 1U,
AnnaBridge 171:3a7713b1edbc 66 USB_OTG_DRD_MODE = 2U
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 }USB_OTG_ModeTypeDef;
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 /**
AnnaBridge 171:3a7713b1edbc 71 * @brief URB States definition
AnnaBridge 171:3a7713b1edbc 72 */
AnnaBridge 171:3a7713b1edbc 73 typedef enum {
AnnaBridge 171:3a7713b1edbc 74 URB_IDLE = 0U,
AnnaBridge 171:3a7713b1edbc 75 URB_DONE,
AnnaBridge 171:3a7713b1edbc 76 URB_NOTREADY,
AnnaBridge 171:3a7713b1edbc 77 URB_NYET,
AnnaBridge 171:3a7713b1edbc 78 URB_ERROR,
AnnaBridge 171:3a7713b1edbc 79 URB_STALL
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 }USB_OTG_URBStateTypeDef;
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /**
AnnaBridge 171:3a7713b1edbc 84 * @brief Host channel States definition
AnnaBridge 171:3a7713b1edbc 85 */
AnnaBridge 171:3a7713b1edbc 86 typedef enum {
AnnaBridge 171:3a7713b1edbc 87 HC_IDLE = 0U,
AnnaBridge 171:3a7713b1edbc 88 HC_XFRC,
AnnaBridge 171:3a7713b1edbc 89 HC_HALTED,
AnnaBridge 171:3a7713b1edbc 90 HC_NAK,
AnnaBridge 171:3a7713b1edbc 91 HC_NYET,
AnnaBridge 171:3a7713b1edbc 92 HC_STALL,
AnnaBridge 171:3a7713b1edbc 93 HC_XACTERR,
AnnaBridge 171:3a7713b1edbc 94 HC_BBLERR,
AnnaBridge 171:3a7713b1edbc 95 HC_DATATGLERR
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 }USB_OTG_HCStateTypeDef;
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 /**
AnnaBridge 171:3a7713b1edbc 100 * @brief PCD Initialization Structure definition
AnnaBridge 171:3a7713b1edbc 101 */
AnnaBridge 171:3a7713b1edbc 102 typedef struct
AnnaBridge 171:3a7713b1edbc 103 {
AnnaBridge 171:3a7713b1edbc 104 uint32_t dev_endpoints; /*!< Device Endpoints number.
AnnaBridge 171:3a7713b1edbc 105 This parameter depends on the used USB core.
AnnaBridge 171:3a7713b1edbc 106 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 uint32_t Host_channels; /*!< Host Channels number.
AnnaBridge 171:3a7713b1edbc 109 This parameter Depends on the used USB core.
AnnaBridge 171:3a7713b1edbc 110 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 uint32_t speed; /*!< USB Core speed.
AnnaBridge 171:3a7713b1edbc 113 This parameter can be any value of @ref USB_Core_Speed_ */
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
AnnaBridge 171:3a7713b1edbc 118 This parameter can be any value of @ref USB_EP0_MPS_ */
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 uint32_t phy_itface; /*!< Select the used PHY interface.
AnnaBridge 171:3a7713b1edbc 121 This parameter can be any value of @ref USB_Core_PHY_ */
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 }USB_OTG_CfgTypeDef;
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 typedef struct
AnnaBridge 171:3a7713b1edbc 136 {
AnnaBridge 171:3a7713b1edbc 137 uint8_t num; /*!< Endpoint number
AnnaBridge 171:3a7713b1edbc 138 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 139
AnnaBridge 171:3a7713b1edbc 140 uint8_t is_in; /*!< Endpoint direction
AnnaBridge 171:3a7713b1edbc 141 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 uint8_t is_stall; /*!< Endpoint stall condition
AnnaBridge 171:3a7713b1edbc 144 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 uint8_t type; /*!< Endpoint type
AnnaBridge 171:3a7713b1edbc 147 This parameter can be any value of @ref USB_EP_Type_ */
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 uint8_t data_pid_start; /*!< Initial data PID
AnnaBridge 171:3a7713b1edbc 150 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 uint8_t even_odd_frame; /*!< IFrame parity
AnnaBridge 171:3a7713b1edbc 153 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 uint16_t tx_fifo_num; /*!< Transmission FIFO number
AnnaBridge 171:3a7713b1edbc 156 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 uint32_t maxpacket; /*!< Endpoint Max packet size
AnnaBridge 171:3a7713b1edbc 159 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 uint32_t xfer_len; /*!< Current transfer length */
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 }USB_OTG_EPTypeDef;
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 typedef struct
AnnaBridge 171:3a7713b1edbc 172 {
AnnaBridge 171:3a7713b1edbc 173 uint8_t dev_addr ; /*!< USB device address.
AnnaBridge 171:3a7713b1edbc 174 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 uint8_t ch_num; /*!< Host channel number.
AnnaBridge 171:3a7713b1edbc 177 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 uint8_t ep_num; /*!< Endpoint number.
AnnaBridge 171:3a7713b1edbc 180 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
AnnaBridge 171:3a7713b1edbc 181
AnnaBridge 171:3a7713b1edbc 182 uint8_t ep_is_in; /*!< Endpoint direction
AnnaBridge 171:3a7713b1edbc 183 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 uint8_t speed; /*!< USB Host speed.
AnnaBridge 171:3a7713b1edbc 186 This parameter can be any value of @ref USB_Core_Speed_ */
AnnaBridge 171:3a7713b1edbc 187
AnnaBridge 171:3a7713b1edbc 188 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 uint8_t ep_type; /*!< Endpoint Type.
AnnaBridge 171:3a7713b1edbc 193 This parameter can be any value of @ref USB_EP_Type_ */
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 uint16_t max_packet; /*!< Endpoint Max packet size.
AnnaBridge 171:3a7713b1edbc 196 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 uint8_t data_pid; /*!< Initial data PID.
AnnaBridge 171:3a7713b1edbc 199 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 uint32_t xfer_len; /*!< Current transfer length. */
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
AnnaBridge 171:3a7713b1edbc 206
AnnaBridge 171:3a7713b1edbc 207 uint8_t toggle_in; /*!< IN transfer current toggle flag.
AnnaBridge 171:3a7713b1edbc 208 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 209
AnnaBridge 171:3a7713b1edbc 210 uint8_t toggle_out; /*!< OUT transfer current toggle flag
AnnaBridge 171:3a7713b1edbc 211 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
AnnaBridge 171:3a7713b1edbc 212
AnnaBridge 171:3a7713b1edbc 213 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 uint32_t ErrCnt; /*!< Host channel error count.*/
AnnaBridge 171:3a7713b1edbc 216
AnnaBridge 171:3a7713b1edbc 217 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
AnnaBridge 171:3a7713b1edbc 218 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
AnnaBridge 171:3a7713b1edbc 219
AnnaBridge 171:3a7713b1edbc 220 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
AnnaBridge 171:3a7713b1edbc 221 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
AnnaBridge 171:3a7713b1edbc 222
AnnaBridge 171:3a7713b1edbc 223 }USB_OTG_HCTypeDef;
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 226
AnnaBridge 171:3a7713b1edbc 227 /** @defgroup PCD_Exported_Constants PCD Exported Constants
AnnaBridge 171:3a7713b1edbc 228 * @{
AnnaBridge 171:3a7713b1edbc 229 */
AnnaBridge 171:3a7713b1edbc 230
AnnaBridge 171:3a7713b1edbc 231 /** @defgroup USB_Core_Mode_ USB Core Mode
AnnaBridge 171:3a7713b1edbc 232 * @{
AnnaBridge 171:3a7713b1edbc 233 */
AnnaBridge 171:3a7713b1edbc 234 #define USB_OTG_MODE_DEVICE 0U
AnnaBridge 171:3a7713b1edbc 235 #define USB_OTG_MODE_HOST 1U
AnnaBridge 171:3a7713b1edbc 236 #define USB_OTG_MODE_DRD 2U
AnnaBridge 171:3a7713b1edbc 237 /**
AnnaBridge 171:3a7713b1edbc 238 * @}
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 /** @defgroup USB_Core_Speed_ USB Core Speed
AnnaBridge 171:3a7713b1edbc 242 * @{
AnnaBridge 171:3a7713b1edbc 243 */
AnnaBridge 171:3a7713b1edbc 244 #define USB_OTG_SPEED_HIGH 0U
AnnaBridge 171:3a7713b1edbc 245 #define USB_OTG_SPEED_HIGH_IN_FULL 1U
AnnaBridge 171:3a7713b1edbc 246 #define USB_OTG_SPEED_LOW 2U
AnnaBridge 171:3a7713b1edbc 247 #define USB_OTG_SPEED_FULL 3U
AnnaBridge 171:3a7713b1edbc 248 /**
AnnaBridge 171:3a7713b1edbc 249 * @}
AnnaBridge 171:3a7713b1edbc 250 */
AnnaBridge 171:3a7713b1edbc 251
AnnaBridge 171:3a7713b1edbc 252 /** @defgroup USB_Core_PHY_ USB Core PHY
AnnaBridge 171:3a7713b1edbc 253 * @{
AnnaBridge 171:3a7713b1edbc 254 */
AnnaBridge 171:3a7713b1edbc 255 #define USB_OTG_ULPI_PHY 1U
AnnaBridge 171:3a7713b1edbc 256 #define USB_OTG_EMBEDDED_PHY 2U
AnnaBridge 171:3a7713b1edbc 257 /**
AnnaBridge 171:3a7713b1edbc 258 * @}
AnnaBridge 171:3a7713b1edbc 259 */
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261 /** @defgroup USB_Core_MPS_ USB Core MPS
AnnaBridge 171:3a7713b1edbc 262 * @{
AnnaBridge 171:3a7713b1edbc 263 */
AnnaBridge 171:3a7713b1edbc 264 #define USB_OTG_HS_MAX_PACKET_SIZE 512U
AnnaBridge 171:3a7713b1edbc 265 #define USB_OTG_FS_MAX_PACKET_SIZE 64U
AnnaBridge 171:3a7713b1edbc 266 #define USB_OTG_MAX_EP0_SIZE 64U
AnnaBridge 171:3a7713b1edbc 267 /**
AnnaBridge 171:3a7713b1edbc 268 * @}
AnnaBridge 171:3a7713b1edbc 269 */
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 /** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency
AnnaBridge 171:3a7713b1edbc 272 * @{
AnnaBridge 171:3a7713b1edbc 273 */
AnnaBridge 171:3a7713b1edbc 274 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1U)
AnnaBridge 171:3a7713b1edbc 275 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1U)
AnnaBridge 171:3a7713b1edbc 276 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1U)
AnnaBridge 171:3a7713b1edbc 277 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1U)
AnnaBridge 171:3a7713b1edbc 278 /**
AnnaBridge 171:3a7713b1edbc 279 * @}
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 /** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval
AnnaBridge 171:3a7713b1edbc 283 * @{
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285 #define DCFG_FRAME_INTERVAL_80 0U
AnnaBridge 171:3a7713b1edbc 286 #define DCFG_FRAME_INTERVAL_85 1U
AnnaBridge 171:3a7713b1edbc 287 #define DCFG_FRAME_INTERVAL_90 2U
AnnaBridge 171:3a7713b1edbc 288 #define DCFG_FRAME_INTERVAL_95 3U
AnnaBridge 171:3a7713b1edbc 289 /**
AnnaBridge 171:3a7713b1edbc 290 * @}
AnnaBridge 171:3a7713b1edbc 291 */
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 /** @defgroup USB_EP0_MPS_ USB EP0 MPS
AnnaBridge 171:3a7713b1edbc 294 * @{
AnnaBridge 171:3a7713b1edbc 295 */
AnnaBridge 171:3a7713b1edbc 296 #define DEP0CTL_MPS_64 0U
AnnaBridge 171:3a7713b1edbc 297 #define DEP0CTL_MPS_32 1U
AnnaBridge 171:3a7713b1edbc 298 #define DEP0CTL_MPS_16 2U
AnnaBridge 171:3a7713b1edbc 299 #define DEP0CTL_MPS_8 3U
AnnaBridge 171:3a7713b1edbc 300 /**
AnnaBridge 171:3a7713b1edbc 301 * @}
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304 /** @defgroup USB_EP_Speed_ USB EP Speed
AnnaBridge 171:3a7713b1edbc 305 * @{
AnnaBridge 171:3a7713b1edbc 306 */
AnnaBridge 171:3a7713b1edbc 307 #define EP_SPEED_LOW 0U
AnnaBridge 171:3a7713b1edbc 308 #define EP_SPEED_FULL 1U
AnnaBridge 171:3a7713b1edbc 309 #define EP_SPEED_HIGH 2U
AnnaBridge 171:3a7713b1edbc 310 /**
AnnaBridge 171:3a7713b1edbc 311 * @}
AnnaBridge 171:3a7713b1edbc 312 */
AnnaBridge 171:3a7713b1edbc 313
AnnaBridge 171:3a7713b1edbc 314 /** @defgroup USB_EP_Type_ USB EP Type
AnnaBridge 171:3a7713b1edbc 315 * @{
AnnaBridge 171:3a7713b1edbc 316 */
AnnaBridge 171:3a7713b1edbc 317 #define EP_TYPE_CTRL 0U
AnnaBridge 171:3a7713b1edbc 318 #define EP_TYPE_ISOC 1U
AnnaBridge 171:3a7713b1edbc 319 #define EP_TYPE_BULK 2U
AnnaBridge 171:3a7713b1edbc 320 #define EP_TYPE_INTR 3U
AnnaBridge 171:3a7713b1edbc 321 #define EP_TYPE_MSK 3U
AnnaBridge 171:3a7713b1edbc 322 /**
AnnaBridge 171:3a7713b1edbc 323 * @}
AnnaBridge 171:3a7713b1edbc 324 */
AnnaBridge 171:3a7713b1edbc 325
AnnaBridge 171:3a7713b1edbc 326 /** @defgroup USB_STS_Defines_ USB STS Defines
AnnaBridge 171:3a7713b1edbc 327 * @{
AnnaBridge 171:3a7713b1edbc 328 */
AnnaBridge 171:3a7713b1edbc 329 #define STS_GOUT_NAK 1U
AnnaBridge 171:3a7713b1edbc 330 #define STS_DATA_UPDT 2U
AnnaBridge 171:3a7713b1edbc 331 #define STS_XFER_COMP 3U
AnnaBridge 171:3a7713b1edbc 332 #define STS_SETUP_COMP 4U
AnnaBridge 171:3a7713b1edbc 333 #define STS_SETUP_UPDT 6U
AnnaBridge 171:3a7713b1edbc 334 /**
AnnaBridge 171:3a7713b1edbc 335 * @}
AnnaBridge 171:3a7713b1edbc 336 */
AnnaBridge 171:3a7713b1edbc 337
AnnaBridge 171:3a7713b1edbc 338 /** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines
AnnaBridge 171:3a7713b1edbc 339 * @{
AnnaBridge 171:3a7713b1edbc 340 */
AnnaBridge 171:3a7713b1edbc 341 #define HCFG_30_60_MHZ 0U
AnnaBridge 171:3a7713b1edbc 342 #define HCFG_48_MHZ 1U
AnnaBridge 171:3a7713b1edbc 343 #define HCFG_6_MHZ 2U
AnnaBridge 171:3a7713b1edbc 344 /**
AnnaBridge 171:3a7713b1edbc 345 * @}
AnnaBridge 171:3a7713b1edbc 346 */
AnnaBridge 171:3a7713b1edbc 347
AnnaBridge 171:3a7713b1edbc 348 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines
AnnaBridge 171:3a7713b1edbc 349 * @{
AnnaBridge 171:3a7713b1edbc 350 */
AnnaBridge 171:3a7713b1edbc 351 #define HPRT0_PRTSPD_HIGH_SPEED 0U
AnnaBridge 171:3a7713b1edbc 352 #define HPRT0_PRTSPD_FULL_SPEED 1U
AnnaBridge 171:3a7713b1edbc 353 #define HPRT0_PRTSPD_LOW_SPEED 2U
AnnaBridge 171:3a7713b1edbc 354 /**
AnnaBridge 171:3a7713b1edbc 355 * @}
AnnaBridge 171:3a7713b1edbc 356 */
AnnaBridge 171:3a7713b1edbc 357
AnnaBridge 171:3a7713b1edbc 358 #define HCCHAR_CTRL 0U
AnnaBridge 171:3a7713b1edbc 359 #define HCCHAR_ISOC 1U
AnnaBridge 171:3a7713b1edbc 360 #define HCCHAR_BULK 2U
AnnaBridge 171:3a7713b1edbc 361 #define HCCHAR_INTR 3U
AnnaBridge 171:3a7713b1edbc 362
AnnaBridge 171:3a7713b1edbc 363 #define HC_PID_DATA0 0U
AnnaBridge 171:3a7713b1edbc 364 #define HC_PID_DATA2 1U
AnnaBridge 171:3a7713b1edbc 365 #define HC_PID_DATA1 2U
AnnaBridge 171:3a7713b1edbc 366 #define HC_PID_SETUP 3U
AnnaBridge 171:3a7713b1edbc 367
AnnaBridge 171:3a7713b1edbc 368 #define GRXSTS_PKTSTS_IN 2U
AnnaBridge 171:3a7713b1edbc 369 #define GRXSTS_PKTSTS_IN_XFER_COMP 3U
AnnaBridge 171:3a7713b1edbc 370 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U
AnnaBridge 171:3a7713b1edbc 371 #define GRXSTS_PKTSTS_CH_HALTED 7U
AnnaBridge 171:3a7713b1edbc 372
AnnaBridge 171:3a7713b1edbc 373 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
AnnaBridge 171:3a7713b1edbc 374 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
AnnaBridge 171:3a7713b1edbc 375
AnnaBridge 171:3a7713b1edbc 376 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
AnnaBridge 171:3a7713b1edbc 377 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
AnnaBridge 171:3a7713b1edbc 378 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
AnnaBridge 171:3a7713b1edbc 379 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
AnnaBridge 171:3a7713b1edbc 380
AnnaBridge 171:3a7713b1edbc 381 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
AnnaBridge 171:3a7713b1edbc 382 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
AnnaBridge 171:3a7713b1edbc 383 /**
AnnaBridge 171:3a7713b1edbc 384 * @}
AnnaBridge 171:3a7713b1edbc 385 */
AnnaBridge 171:3a7713b1edbc 386 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 387 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 388 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 389
AnnaBridge 171:3a7713b1edbc 390 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 391 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 392
AnnaBridge 171:3a7713b1edbc 393 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 394 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
AnnaBridge 171:3a7713b1edbc 395 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
AnnaBridge 171:3a7713b1edbc 396 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 397 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 398 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
AnnaBridge 171:3a7713b1edbc 399 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
AnnaBridge 171:3a7713b1edbc 400 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 401 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
AnnaBridge 171:3a7713b1edbc 402 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 403 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 404 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 405 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 406 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
AnnaBridge 171:3a7713b1edbc 407 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
AnnaBridge 171:3a7713b1edbc 408 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
AnnaBridge 171:3a7713b1edbc 409 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
AnnaBridge 171:3a7713b1edbc 410 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 411 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
AnnaBridge 171:3a7713b1edbc 412 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
AnnaBridge 171:3a7713b1edbc 413 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 414 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 415 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 416 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 417 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
AnnaBridge 171:3a7713b1edbc 418 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 419 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 420 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 421 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 422 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 423 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 424 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 425 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
AnnaBridge 171:3a7713b1edbc 426
AnnaBridge 171:3a7713b1edbc 427 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
AnnaBridge 171:3a7713b1edbc 428 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
AnnaBridge 171:3a7713b1edbc 429 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 430 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
AnnaBridge 171:3a7713b1edbc 431 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 432 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 433 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
AnnaBridge 171:3a7713b1edbc 434 uint8_t ch_num,
AnnaBridge 171:3a7713b1edbc 435 uint8_t epnum,
AnnaBridge 171:3a7713b1edbc 436 uint8_t dev_address,
AnnaBridge 171:3a7713b1edbc 437 uint8_t speed,
AnnaBridge 171:3a7713b1edbc 438 uint8_t ep_type,
AnnaBridge 171:3a7713b1edbc 439 uint16_t mps);
AnnaBridge 171:3a7713b1edbc 440 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
AnnaBridge 171:3a7713b1edbc 441 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 442 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
AnnaBridge 171:3a7713b1edbc 443 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
AnnaBridge 171:3a7713b1edbc 444 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
AnnaBridge 171:3a7713b1edbc 445
AnnaBridge 171:3a7713b1edbc 446 /**
AnnaBridge 171:3a7713b1edbc 447 * @}
AnnaBridge 171:3a7713b1edbc 448 */
AnnaBridge 171:3a7713b1edbc 449
AnnaBridge 171:3a7713b1edbc 450 /**
AnnaBridge 171:3a7713b1edbc 451 * @}
AnnaBridge 171:3a7713b1edbc 452 */
AnnaBridge 171:3a7713b1edbc 453
AnnaBridge 171:3a7713b1edbc 454 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 455 }
AnnaBridge 171:3a7713b1edbc 456 #endif
AnnaBridge 171:3a7713b1edbc 457
AnnaBridge 171:3a7713b1edbc 458
AnnaBridge 171:3a7713b1edbc 459 #endif /* __STM32F2xx_LL_USB_H */
AnnaBridge 171:3a7713b1edbc 460
AnnaBridge 171:3a7713b1edbc 461 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/